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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2006-09-26 02:32:16 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 11:48:54 -0400
commitbc157b75960f1f33566074e820342690216629b9 (patch)
tree3f494ec585eb4bf3e7def5de2b2455b13b5c42c8 /arch/avr32/mach-at32ap/at32ap7000.c
parent5f97f7f9400de47ae837170bb274e90ad3934386 (diff)
[PATCH] AVR32 MTD: Static Memory Controller driver
This patchset adds the necessary drivers and infrastructure to access the external flash on the ATSTK1000 board through the MTD subsystem. With this stuff in place, it will be possible to use a jffs2 filesystem stored in the external flash as a root filesystem. It might also be possible to update the boot loader if you drop the write protection of partition 0. As suggested by David Woodhouse, I reworked the patches to use the physmap driver instead of introducing a separate mapping driver for the ATSTK1000. I've also cleaned up the hsmc header by removing useless comments and converting spaces to tabs (my headerfile generator needs some work.) Unfortunately, I couldn't unlock the flash in fixup_use_atmel_lock because the erase regions hadn't been set up yet, so I had to do it from cfi_amdstd_setup instead. This patch: This adds a simple API for configuring the static memory controller along with an implementation for the Atmel HSMC. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/avr32/mach-at32ap/at32ap7000.c')
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index e8c6893a1c23..37982b60398e 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -450,6 +450,13 @@ static struct clk hramc_clk = {
450 .users = 1, 450 .users = 1,
451}; 451};
452 452
453static struct resource smc0_resource[] = {
454 PBMEM(0xfff03400),
455};
456DEFINE_DEV(smc, 0);
457DEV_CLK(pclk, smc0, pbb, 13);
458DEV_CLK(mck, smc0, hsb, 0);
459
453static struct platform_device pdc_device = { 460static struct platform_device pdc_device = {
454 .name = "pdc", 461 .name = "pdc",
455 .id = 0, 462 .id = 0,
@@ -503,6 +510,7 @@ void __init at32_add_system_devices(void)
503 510
504 platform_device_register(&at32_sm_device); 511 platform_device_register(&at32_sm_device);
505 platform_device_register(&at32_intc0_device); 512 platform_device_register(&at32_intc0_device);
513 platform_device_register(&smc0_device);
506 platform_device_register(&pdc_device); 514 platform_device_register(&pdc_device);
507 515
508 platform_device_register(&pio0_device); 516 platform_device_register(&pio0_device);
@@ -796,6 +804,8 @@ struct clk *at32_clock_list[] = {
796 &at32_intc0_pclk, 804 &at32_intc0_pclk,
797 &ebi_clk, 805 &ebi_clk,
798 &hramc_clk, 806 &hramc_clk,
807 &smc0_pclk,
808 &smc0_mck,
799 &pdc_hclk, 809 &pdc_hclk,
800 &pdc_pclk, 810 &pdc_pclk,
801 &pico_clk, 811 &pico_clk,