[PATCH] avr32 architecture

This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.

AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.

The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.

Full data sheet is available from

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

Information about the AT32STK1000 development board can be found at

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.

Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.

This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.

[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 62 insertions, 0 deletions

diff --git a/arch/avr32/lib/memcpy.S b/arch/avr32/lib/memcpy.S
new file mode 100644
index 000000000000..0abb26142b64
--- /dev/null
+++ b/arch/avr32/lib/memcpy.S
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+        /*
+         * void *memcpy(void *to, const void *from, unsigned long n)
+         *
+         * This implementation does word-aligned loads in the main loop,
+         * possibly sacrificing alignment of stores.
+         *
+         * Hopefully, in most cases, both "to" and "from" will be
+         * word-aligned to begin with.
+         */
+        .text
+        .global memcpy
+        .type   memcpy, @function
+memcpy:
+        mov     r9, r11
+        andl    r9, 3, COH
+        brne    1f
+
+        /* At this point, "from" is word-aligned */
+2:      sub     r10, 4
+        mov     r9, r12
+        brlt    4f
+
+3:      ld.w    r8, r11++
+        sub     r10, 4
+        st.w    r12++, r8
+        brge    3b
+
+4:      neg     r10
+        reteq   r9
+
+        /* Handle unaligned count */
+        lsl     r10, 2
+        add     pc, pc, r10
+        ld.ub   r8, r11++
+        st.b    r12++, r8
+        ld.ub   r8, r11++
+        st.b    r12++, r8
+        ld.ub   r8, r11++
+        st.b    r12++, r8
+        retal   r9
+
+        /* Handle unaligned "from" pointer */
+1:      sub     r10, 4
+        brlt    4b
+        add     r10, r9
+        lsl     r9, 2
+        add     pc, pc, r9
+        ld.ub   r8, r11++
+        st.b    r12++, r8
+        ld.ub   r8, r11++
+        st.b    r12++, r8
+        ld.ub   r8, r11++
+        st.b    r12++, r8
+        rjmp    2b