[PATCH] avr32 architecture

This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.

AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.

The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.

Full data sheet is available from

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

Information about the AT32STK1000 development board can be found at

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.

Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.

This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.

[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 76 insertions, 0 deletions

diff --git a/arch/avr32/lib/clear_user.S b/arch/avr32/lib/clear_user.S
new file mode 100644
index 000000000000..d8991b6f8eb7
--- /dev/null
+++ b/arch/avr32/lib/clear_user.S
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/page.h>
+#include <asm/thread_info.h>
+#include <asm/asm.h>
+
+        .text
+        .align  1
+        .global clear_user
+        .type   clear_user, "function"
+clear_user:
+        branch_if_kernel r8, __clear_user
+        ret_if_privileged r8, r12, r11, r11
+
+        .global __clear_user
+        .type   __clear_user, "function"
+__clear_user:
+        mov     r9, r12
+        mov     r8, 0
+        andl    r9, 3, COH
+        brne    5f
+
+1:      sub     r11, 4
+        brlt    2f
+
+10:     st.w    r12++, r8
+        sub     r11, 4
+        brge    10b
+
+2:      sub     r11, -4
+        reteq   0
+
+        /* Unaligned count or address */
+        bld     r11, 1
+        brcc    12f
+11:     st.h    r12++, r8
+        sub     r11, 2
+        reteq   0
+12:     st.b    r12++, r8
+        retal   0
+
+        /* Unaligned address */
+5:      cp.w    r11, 4
+        brlt    2b
+
+        lsl     r9, 2
+        add     pc, pc, r9
+13:     st.b    r12++, r8
+        sub     r11, 1
+14:     st.b    r12++, r8
+        sub     r11, 1
+15:     st.b    r12++, r8
+        sub     r11, 1
+        rjmp    1b
+
+        .size   clear_user, . - clear_user
+        .size   __clear_user, . - __clear_user
+
+        .section .fixup, "ax"
+        .align  1
+18:     sub     r11, -4
+19:     retal   r11
+
+        .section __ex_table, "a"
+        .align  2
+        .long   10b, 18b
+        .long   11b, 19b
+        .long   12b, 19b
+        .long   13b, 19b
+        .long   14b, 19b
+        .long   15b, 19b