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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-01-30 05:16:16 -0500
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-02-09 09:01:58 -0500
commit7f9f4678637f9ee1a999cc0870c4668f32e1a7eb (patch)
tree557c08cbc47b9936c3a8c2f550bb3acd8781332e /arch/avr32/boards
parente7f70b8cc69b1bcc56ed8d70f8e3671ec3956374 (diff)
[AVR32] Add PIOE device and reserve SDRAM pins
The PIOE device was left out before because it muxes SDRAM pins (and is therefore a bit dangerous to mess with) and because no existing drivers had any use for it. It is needed for CompactFlash, however, and now that we have a way to protect the SDRAM pins, it can be safely added. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/boards')
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 3787d6bfe0d7..bca815ff11f2 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -19,6 +19,7 @@
19#include <asm/setup.h> 19#include <asm/setup.h>
20#include <asm/arch/board.h> 20#include <asm/arch/board.h>
21#include <asm/arch/init.h> 21#include <asm/arch/init.h>
22#include <asm/arch/portmux.h>
22 23
23 24
24#define SW2_DEFAULT /* MMCI and UART_A available */ 25#define SW2_DEFAULT /* MMCI and UART_A available */
@@ -102,6 +103,28 @@ void __init setup_board(void)
102 103
103static int __init atstk1002_init(void) 104static int __init atstk1002_init(void)
104{ 105{
106 /*
107 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
108 * SDRAM-specific pins so that nobody messes with them.
109 */
110 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
111 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
112 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
113 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
114 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
115 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
116 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
117 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
118 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
119 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
120 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
121 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
122 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
123 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
124 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
125 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
126 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
127
105 at32_add_system_devices(); 128 at32_add_system_devices();
106 129
107#ifdef SW2_DEFAULT 130#ifdef SW2_DEFAULT