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authorLinus Torvalds <torvalds@linux-foundation.org>2009-12-15 12:01:00 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-12-15 12:01:00 -0500
commit050cbb09dac0402672edeaeac06094ef8ff1749a (patch)
tree89cbe4ac48e8e8f80ff5849e2cc33f045f5ccd52 /arch/avr32/boards
parent17c330f98383629cfd359ee62b3adde1d2a3ff7c (diff)
parent0386f9e68fc92a3650088b86d908b07de4fb1744 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: avr32: update default configurations for ATNGW100, ATSTK1002 and ATSTK1006 avr32: add default configurations for ATNGW100 mkII and EVKLCD10X avr32: add support for ATNGW100 mkII board avr32: convert to asm-generic/hardirq.h avr32: add two new at91 to cpu.h definition avr32: clean up linker script using standard macros. avr32: MRMT: correct setup of SPI slaves avr32: function for independently setting up SPI slaves avr32: re-instate MCI WP/CD pin assignments for ATNGW100
Diffstat (limited to 'arch/avr32/boards')
-rw-r--r--arch/avr32/boards/atngw100/Kconfig25
-rw-r--r--arch/avr32/boards/atngw100/evklcd10x.c7
-rw-r--r--arch/avr32/boards/atngw100/mrmt.c1
-rw-r--r--arch/avr32/boards/atngw100/setup.c121
4 files changed, 133 insertions, 21 deletions
diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
index be27a0218ab4..4e55617ade2d 100644
--- a/arch/avr32/boards/atngw100/Kconfig
+++ b/arch/avr32/boards/atngw100/Kconfig
@@ -1,6 +1,17 @@
1# NGW100 customization 1# NGW100 customization
2 2
3if BOARD_ATNGW100 3if BOARD_ATNGW100_COMMON
4
5config BOARD_ATNGW100_MKII_LCD
6 bool "Enable ATNGW100 mkII LCD interface"
7 depends on BOARD_ATNGW100_MKII
8 help
9 This enables the LCD controller (LCDC) in the AT32AP7000. Since the
10 LCDC is multiplexed with MACB1 (LAN) Ethernet port, only one can be
11 enabled at a time.
12
13 This choice enables the LCDC and disables the MACB1 interface marked
14 LAN on the PCB.
4 15
5choice 16choice
6 prompt "Select an NGW100 add-on board to support" 17 prompt "Select an NGW100 add-on board to support"
@@ -11,15 +22,11 @@ config BOARD_ATNGW100_ADDON_NONE
11 22
12config BOARD_ATNGW100_EVKLCD10X 23config BOARD_ATNGW100_EVKLCD10X
13 bool "EVKLCD10X addon board" 24 bool "EVKLCD10X addon board"
25 depends on BOARD_ATNGW100_MKI || BOARD_ATNGW100_MKII_LCD
14 help 26 help
15 This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA) 27 This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA)
16 addon board for the NGW100. By enabling this the LCD controller and 28 addon board for the NGW100 and NGW100 mkII. By enabling this the LCD
17 AC97 controller is added as platform devices. 29 controller and AC97 controller is added as platform devices.
18
19 This choice disables the detect pin and the write-protect pin for the
20 MCI platform device, since it conflicts with the LCD platform device.
21 The MCI pins can be reenabled by editing the "add device function" but
22 this may break the setup for other displays that use these pins.
23 30
24config BOARD_ATNGW100_MRMT 31config BOARD_ATNGW100_MRMT
25 bool "Mediama RMT1/2 add-on board" 32 bool "Mediama RMT1/2 add-on board"
@@ -55,4 +62,4 @@ if BOARD_ATNGW100_MRMT
55source "arch/avr32/boards/atngw100/Kconfig_mrmt" 62source "arch/avr32/boards/atngw100/Kconfig_mrmt"
56endif 63endif
57 64
58endif # BOARD_ATNGW100 65endif # BOARD_ATNGW100_COMMON
diff --git a/arch/avr32/boards/atngw100/evklcd10x.c b/arch/avr32/boards/atngw100/evklcd10x.c
index 00337112c5ac..20388750d564 100644
--- a/arch/avr32/boards/atngw100/evklcd10x.c
+++ b/arch/avr32/boards/atngw100/evklcd10x.c
@@ -164,7 +164,12 @@ static int __init atevklcd10x_init(void)
164 164
165 at32_add_device_lcdc(0, &atevklcd10x_lcdc_data, 165 at32_add_device_lcdc(0, &atevklcd10x_lcdc_data,
166 fbmem_start, fbmem_size, 166 fbmem_start, fbmem_size,
167 ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL); 167#ifdef CONFIG_BOARD_ATNGW100_MKII
168 ATMEL_LCDC_PRI_18BIT | ATMEL_LCDC_PC_DVAL
169#else
170 ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL
171#endif
172 );
168 173
169 at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH); 174 at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);
170 175
diff --git a/arch/avr32/boards/atngw100/mrmt.c b/arch/avr32/boards/atngw100/mrmt.c
index bf78e516a85f..7919be311f4a 100644
--- a/arch/avr32/boards/atngw100/mrmt.c
+++ b/arch/avr32/boards/atngw100/mrmt.c
@@ -302,6 +302,7 @@ static int __init mrmt1_init(void)
302 at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), 302 at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
303 GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); 303 GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
304 set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING ); 304 set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING );
305 at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
305 spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info)); 306 spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
306#endif 307#endif
307 308
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index bc299fbbeb4e..8c6a2440e345 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -20,6 +20,7 @@
20#include <linux/leds.h> 20#include <linux/leds.h>
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/atmel-mci.h> 22#include <linux/atmel-mci.h>
23#include <linux/usb/atmel_usba_udc.h>
23 24
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/setup.h> 26#include <asm/setup.h>
@@ -36,6 +37,75 @@ unsigned long at32_board_osc_rates[3] = {
36 [2] = 12000000, /* 12 MHz on osc1 */ 37 [2] = 12000000, /* 12 MHz on osc1 */
37}; 38};
38 39
40/*
41 * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000
42 * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit
43 * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash
44 * (the ATNGW100 has none.)
45 *
46 * The RAM difference is handled by the boot loader, so the only difference we
47 * end up handling here is the NAND flash, EBI pin reservation and if LCDC or
48 * MACB1 should be enabled.
49 */
50#ifdef CONFIG_BOARD_ATNGW100_MKII
51#include <linux/mtd/partitions.h>
52#include <mach/smc.h>
53
54static struct smc_timing nand_timing __initdata = {
55 .ncs_read_setup = 0,
56 .nrd_setup = 10,
57 .ncs_write_setup = 0,
58 .nwe_setup = 10,
59
60 .ncs_read_pulse = 30,
61 .nrd_pulse = 15,
62 .ncs_write_pulse = 30,
63 .nwe_pulse = 15,
64
65 .read_cycle = 30,
66 .write_cycle = 30,
67
68 .ncs_read_recover = 0,
69 .nrd_recover = 15,
70 .ncs_write_recover = 0,
71 /* WE# high -> RE# low min 60 ns */
72 .nwe_recover = 50,
73};
74
75static struct smc_config nand_config __initdata = {
76 .bus_width = 2,
77 .nrd_controlled = 1,
78 .nwe_controlled = 1,
79 .nwait_mode = 0,
80 .byte_write = 0,
81 .tdf_cycles = 2,
82 .tdf_mode = 0,
83};
84
85static struct mtd_partition nand_partitions[] = {
86 {
87 .name = "main",
88 .offset = 0x00000000,
89 .size = MTDPART_SIZ_FULL,
90 },
91};
92
93static struct mtd_partition *nand_part_info(int size, int *num_partitions)
94{
95 *num_partitions = ARRAY_SIZE(nand_partitions);
96 return nand_partitions;
97}
98
99static struct atmel_nand_data atngw100mkii_nand_data __initdata = {
100 .cle = 21,
101 .ale = 22,
102 .rdy_pin = GPIO_PIN_PB(28),
103 .enable_pin = GPIO_PIN_PE(23),
104 .bus_width_16 = true,
105 .partition_info = nand_part_info,
106};
107#endif
108
39/* Initialized by bootloader-specific startup code. */ 109/* Initialized by bootloader-specific startup code. */
40struct tag *bootloader_tags __initdata; 110struct tag *bootloader_tags __initdata;
41 111
@@ -56,9 +126,9 @@ static struct spi_board_info spi0_board_info[] __initdata = {
56static struct mci_platform_data __initdata mci0_data = { 126static struct mci_platform_data __initdata mci0_data = {
57 .slot[0] = { 127 .slot[0] = {
58 .bus_width = 4, 128 .bus_width = 4,
59#if defined(CONFIG_BOARD_ATNGW100_EVKLCD10X) || defined(CONFIG_BOARD_ATNGW100_MRMT1) 129#if defined(CONFIG_BOARD_ATNGW100_MKII)
60 .detect_pin = GPIO_PIN_NONE, 130 .detect_pin = GPIO_PIN_PC(25),
61 .wp_pin = GPIO_PIN_NONE, 131 .wp_pin = GPIO_PIN_PE(22),
62#else 132#else
63 .detect_pin = GPIO_PIN_PC(25), 133 .detect_pin = GPIO_PIN_PC(25),
64 .wp_pin = GPIO_PIN_PE(0), 134 .wp_pin = GPIO_PIN_PE(0),
@@ -66,6 +136,14 @@ static struct mci_platform_data __initdata mci0_data = {
66 }, 136 },
67}; 137};
68 138
139static struct usba_platform_data atngw100_usba_data __initdata = {
140#if defined(CONFIG_BOARD_ATNGW100_MKII)
141 .vbus_pin = GPIO_PIN_PE(26),
142#else
143 .vbus_pin = -ENODEV,
144#endif
145};
146
69/* 147/*
70 * The next two functions should go away as the boot loader is 148 * The next two functions should go away as the boot loader is
71 * supposed to initialize the macb address registers with a valid 149 * supposed to initialize the macb address registers with a valid
@@ -173,18 +251,27 @@ static int __init atngw100_init(void)
173 unsigned i; 251 unsigned i;
174 252
175 /* 253 /*
176 * ATNGW100 uses 16-bit SDRAM interface, so we don't need to 254 * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the
177 * reserve any pins for it. 255 * SDRAM-specific pins so that nobody messes with them.
178 */ 256 */
257#ifdef CONFIG_BOARD_ATNGW100_MKII
258 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
259
260 smc_set_timing(&nand_config, &nand_timing);
261 smc_set_configuration(3, &nand_config);
262 at32_add_device_nand(0, &atngw100mkii_nand_data);
263#endif
179 264
180 at32_add_device_usart(0); 265 at32_add_device_usart(0);
181 266
182 set_hw_addr(at32_add_device_eth(0, &eth_data[0])); 267 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
268#ifndef CONFIG_BOARD_ATNGW100_MKII_LCD
183 set_hw_addr(at32_add_device_eth(1, &eth_data[1])); 269 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
270#endif
184 271
185 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); 272 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
186 at32_add_device_mci(0, &mci0_data); 273 at32_add_device_mci(0, &mci0_data);
187 at32_add_device_usba(0, NULL); 274 at32_add_device_usba(0, &atngw100_usba_data);
188 275
189 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { 276 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
190 at32_select_gpio(ngw_leds[i].gpio, 277 at32_select_gpio(ngw_leds[i].gpio,
@@ -194,10 +281,14 @@ static int __init atngw100_init(void)
194 281
195 /* all these i2c/smbus pins should have external pullups for 282 /* all these i2c/smbus pins should have external pullups for
196 * open-drain sharing among all I2C devices. SDA and SCL do; 283 * open-drain sharing among all I2C devices. SDA and SCL do;
197 * PB28/EXTINT3 doesn't; it should be SMBALERT# (for PMBus), 284 * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should
198 * but it's not available off-board. 285 * be SMBALERT# (for PMBus), but it's not available off-board.
199 */ 286 */
287#ifdef CONFIG_BOARD_ATNGW100_MKII
288 at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP);
289#else
200 at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP); 290 at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
291#endif
201 at32_select_gpio(i2c_gpio_data.sda_pin, 292 at32_select_gpio(i2c_gpio_data.sda_pin,
202 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); 293 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
203 at32_select_gpio(i2c_gpio_data.scl_pin, 294 at32_select_gpio(i2c_gpio_data.scl_pin,
@@ -211,14 +302,22 @@ postcore_initcall(atngw100_init);
211 302
212static int __init atngw100_arch_init(void) 303static int __init atngw100_arch_init(void)
213{ 304{
214 /* PB30 is the otherwise unused jumper on the mainboard, with an 305 /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused
215 * external pullup; the jumper grounds it. Use it however you 306 * jumper on the mainboard, with an external pullup; the jumper grounds
216 * like, including letting U-Boot or Linux tweak boot sequences. 307 * it. Use it however you like, including letting U-Boot or Linux tweak
308 * boot sequences.
217 */ 309 */
310#ifdef CONFIG_BOARD_ATNGW100_MKII
311 at32_select_gpio(GPIO_PIN_PE(30), 0);
312 gpio_request(GPIO_PIN_PE(30), "j15");
313 gpio_direction_input(GPIO_PIN_PE(30));
314 gpio_export(GPIO_PIN_PE(30), false);
315#else
218 at32_select_gpio(GPIO_PIN_PB(30), 0); 316 at32_select_gpio(GPIO_PIN_PB(30), 0);
219 gpio_request(GPIO_PIN_PB(30), "j15"); 317 gpio_request(GPIO_PIN_PB(30), "j15");
220 gpio_direction_input(GPIO_PIN_PB(30)); 318 gpio_direction_input(GPIO_PIN_PB(30));
221 gpio_export(GPIO_PIN_PB(30), false); 319 gpio_export(GPIO_PIN_PB(30), false);
320#endif
222 321
223 /* set_irq_type() after the arch_initcall for EIC has run, and 322 /* set_irq_type() after the arch_initcall for EIC has run, and
224 * before the I2C subsystem could try using this IRQ. 323 * before the I2C subsystem could try using this IRQ.