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authorMark Jackson <mpfj@mimc.co.uk>2008-10-13 09:14:50 -0400
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-10-13 10:36:25 -0400
commit5b50c166b79ffa0a2e3b0f3785fa5263685a81f2 (patch)
treef3dbd0082c413dccd3ed6cb5c0c9ac46cce2e4cc /arch/avr32/boards/mimc200
parent198f29358a31cdca1a496d19da90bd5d6c8527ce (diff)
avr32: Add MIMC200 board support
Please consider the following patch which adds support for a new AVR32 based board. The board is closely based on Atmel's NGW100 reference board, but has an extra 8MByte FLASH and 128KByte FRAM. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/boards/mimc200')
-rw-r--r--arch/avr32/boards/mimc200/Makefile1
-rw-r--r--arch/avr32/boards/mimc200/flash.c143
-rw-r--r--arch/avr32/boards/mimc200/fram.c80
-rw-r--r--arch/avr32/boards/mimc200/setup.c237
4 files changed, 461 insertions, 0 deletions
diff --git a/arch/avr32/boards/mimc200/Makefile b/arch/avr32/boards/mimc200/Makefile
new file mode 100644
index 000000000000..79c076e168a8
--- /dev/null
+++ b/arch/avr32/boards/mimc200/Makefile
@@ -0,0 +1 @@
obj-y += setup.o flash.o fram.o
diff --git a/arch/avr32/boards/mimc200/flash.c b/arch/avr32/boards/mimc200/flash.c
new file mode 100644
index 000000000000..d83d650fc13f
--- /dev/null
+++ b/arch/avr32/boards/mimc200/flash.c
@@ -0,0 +1,143 @@
1/*
2 * MIMC200 board-specific flash initialization
3 *
4 * Copyright (C) 2008 Mercury IMC Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15
16#include <mach/smc.h>
17
18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0,
20 .nrd_setup = 15,
21 .ncs_write_setup = 0,
22 .nwe_setup = 0,
23
24 .ncs_read_pulse = 115,
25 .nrd_pulse = 110,
26 .ncs_write_pulse = 60,
27 .nwe_pulse = 60,
28
29 .read_cycle = 115,
30 .write_cycle = 100,
31};
32
33static struct smc_config flash_config __initdata = {
34 .bus_width = 2,
35 .nrd_controlled = 1,
36 .nwe_controlled = 1,
37 .byte_write = 1,
38};
39
40/* system flash definition */
41
42static struct mtd_partition flash_parts_system[] = {
43 {
44 .name = "u-boot",
45 .offset = 0x00000000,
46 .size = 0x00020000, /* 128 KiB */
47 .mask_flags = MTD_WRITEABLE,
48 },
49 {
50 .name = "root",
51 .offset = 0x00020000,
52 .size = 0x007c0000,
53 },
54 {
55 .name = "splash",
56 .offset = 0x007e0000,
57 .size = 0x00010000, /* 64KiB */
58 },
59 {
60 .name = "env",
61 .offset = 0x007f0000,
62 .size = 0x00010000,
63 .mask_flags = MTD_WRITEABLE,
64 },
65};
66
67static struct physmap_flash_data flash_system = {
68 .width = 2,
69 .nr_parts = ARRAY_SIZE(flash_parts_system),
70 .parts = flash_parts_system,
71};
72
73static struct resource flash_resource_system = {
74 .start = 0x00000000,
75 .end = 0x007fffff,
76 .flags = IORESOURCE_MEM,
77};
78
79static struct platform_device flash_device_system = {
80 .name = "physmap-flash",
81 .id = 0,
82 .resource = &flash_resource_system,
83 .num_resources = 1,
84 .dev = {
85 .platform_data = &flash_system,
86 },
87};
88
89/* data flash definition */
90
91static struct mtd_partition flash_parts_data[] = {
92 {
93 .name = "data",
94 .offset = 0x00000000,
95 .size = 0x00800000,
96 },
97};
98
99static struct physmap_flash_data flash_data = {
100 .width = 2,
101 .nr_parts = ARRAY_SIZE(flash_parts_data),
102 .parts = flash_parts_data,
103};
104
105static struct resource flash_resource_data = {
106 .start = 0x08000000,
107 .end = 0x087fffff,
108 .flags = IORESOURCE_MEM,
109};
110
111static struct platform_device flash_device_data = {
112 .name = "physmap-flash",
113 .id = 1,
114 .resource = &flash_resource_data,
115 .num_resources = 1,
116 .dev = {
117 .platform_data = &flash_data,
118 },
119};
120
121/* This needs to be called after the SMC has been initialized */
122static int __init mimc200_flash_init(void)
123{
124 int ret;
125
126 smc_set_timing(&flash_config, &flash_timing);
127 ret = smc_set_configuration(0, &flash_config);
128 if (ret < 0) {
129 printk(KERN_ERR "mimc200: failed to set 'System' NOR flash timing\n");
130 return ret;
131 }
132 ret = smc_set_configuration(1, &flash_config);
133 if (ret < 0) {
134 printk(KERN_ERR "mimc200: failed to set 'Data' NOR flash timing\n");
135 return ret;
136 }
137
138 platform_device_register(&flash_device_system);
139 platform_device_register(&flash_device_data);
140
141 return 0;
142}
143device_initcall(mimc200_flash_init);
diff --git a/arch/avr32/boards/mimc200/fram.c b/arch/avr32/boards/mimc200/fram.c
new file mode 100644
index 000000000000..54fbd95cee9b
--- /dev/null
+++ b/arch/avr32/boards/mimc200/fram.c
@@ -0,0 +1,80 @@
1/*
2 * FRAM driver for MIMC200 board
3 *
4 * Copyright 2008 Mark Jackson <mpfj@mimc.co.uk>
5 *
6 * This module adds *very* simply support for the system's FRAM device.
7 * At the moment, this is hard-coded to the MIMC200 platform, and only
8 * supports mmap().
9 */
10
11#define FRAM_VERSION "1.0"
12
13#include <linux/miscdevice.h>
14#include <linux/proc_fs.h>
15#include <linux/mm.h>
16#include <linux/io.h>
17
18#define FRAM_BASE 0xac000000
19#define FRAM_SIZE 0x20000
20
21/*
22 * The are the file operation function for user access to /dev/fram
23 */
24
25static int fram_mmap(struct file *filp, struct vm_area_struct *vma)
26{
27 int ret;
28
29 ret = remap_pfn_range(vma,
30 vma->vm_start,
31 virt_to_phys((void *)((unsigned long)FRAM_BASE)) >> PAGE_SHIFT,
32 vma->vm_end-vma->vm_start,
33 PAGE_SHARED);
34
35 if (ret != 0)
36 return -EAGAIN;
37
38 return 0;
39}
40
41static const struct file_operations fram_fops = {
42 .owner = THIS_MODULE,
43 .mmap = fram_mmap,
44};
45
46#define FRAM_MINOR 0
47
48static struct miscdevice fram_dev = {
49 FRAM_MINOR,
50 "fram",
51 &fram_fops
52};
53
54static int __init
55fram_init(void)
56{
57 int ret;
58
59 ret = misc_register(&fram_dev);
60 if (ret) {
61 printk(KERN_ERR "fram: can't misc_register on minor=%d\n",
62 FRAM_MINOR);
63 return ret;
64 }
65 printk(KERN_INFO "FRAM memory driver v" FRAM_VERSION "\n");
66 return 0;
67}
68
69static void __exit
70fram_cleanup_module(void)
71{
72 misc_deregister(&fram_dev);
73}
74
75module_init(fram_init);
76module_exit(fram_cleanup_module);
77
78MODULE_LICENSE("GPL");
79
80MODULE_ALIAS_MISCDEV(FRAM_MINOR);
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c
new file mode 100644
index 000000000000..397cbb8f44c8
--- /dev/null
+++ b/arch/avr32/boards/mimc200/setup.c
@@ -0,0 +1,237 @@
1/*
2 * Board-specific setup code for the MIMC200
3 *
4 * Copyright (C) 2008 Mercury IMC Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11extern struct atmel_lcdfb_info mimc200_lcdc_data;
12
13#include <linux/clk.h>
14#include <linux/etherdevice.h>
15#include <linux/i2c-gpio.h>
16#include <linux/init.h>
17#include <linux/linkage.h>
18#include <linux/platform_device.h>
19#include <linux/types.h>
20#include <linux/leds.h>
21#include <linux/spi/spi.h>
22#include <linux/spi/eeprom.h>
23
24#include <video/atmel_lcdc.h>
25#include <linux/fb.h>
26
27#include <asm/atmel-mci.h>
28#include <linux/io.h>
29#include <asm/setup.h>
30
31#include <mach/at32ap700x.h>
32#include <mach/board.h>
33#include <mach/init.h>
34#include <mach/portmux.h>
35
36/* Oscillator frequencies. These are board-specific */
37unsigned long at32_board_osc_rates[3] = {
38 [0] = 32768, /* 32.768 kHz on RTC osc */
39 [1] = 10000000, /* 10 MHz on osc0 */
40 [2] = 12000000, /* 12 MHz on osc1 */
41};
42
43/* Initialized by bootloader-specific startup code. */
44struct tag *bootloader_tags __initdata;
45
46static struct fb_videomode __initdata tx14d14_modes[] = {
47 {
48 .name = "640x480 @ 60",
49 .refresh = 60,
50 .xres = 640, .yres = 480,
51 .pixclock = KHZ2PICOS(11666),
52
53 .left_margin = 80, .right_margin = 1,
54 .upper_margin = 13, .lower_margin = 2,
55 .hsync_len = 64, .vsync_len = 1,
56
57 .sync = 0,
58 .vmode = FB_VMODE_NONINTERLACED,
59 },
60};
61
62static struct fb_monspecs __initdata mimc200_default_monspecs = {
63 .manufacturer = "HIT",
64 .monitor = "TX14D14VM1BAB",
65 .modedb = tx14d14_modes,
66 .modedb_len = ARRAY_SIZE(tx14d14_modes),
67 .hfmin = 14820,
68 .hfmax = 22230,
69 .vfmin = 60,
70 .vfmax = 73.3,
71 .dclkmax = 25200000,
72};
73
74struct atmel_lcdfb_info __initdata mimc200_lcdc_data = {
75 .default_bpp = 16,
76 .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
77 .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
78 | ATMEL_LCDC_INVCLK
79 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
80 | ATMEL_LCDC_MEMOR_BIG),
81 .default_monspecs = &mimc200_default_monspecs,
82 .guard_time = 2,
83};
84
85struct eth_addr {
86 u8 addr[6];
87};
88static struct eth_addr __initdata hw_addr[2];
89static struct eth_platform_data __initdata eth_data[2];
90
91static struct spi_eeprom eeprom_25lc010 = {
92 .name = "25lc010",
93 .byte_len = 128,
94 .page_size = 16,
95 .flags = EE_ADDR1,
96};
97
98static struct spi_board_info spi0_board_info[] __initdata = {
99 {
100 .modalias = "rtc-ds1390",
101 .max_speed_hz = 4000000,
102 .chip_select = 2,
103 },
104 {
105 .modalias = "at25",
106 .max_speed_hz = 1000000,
107 .chip_select = 1,
108 .mode = SPI_MODE_3,
109 .platform_data = &eeprom_25lc010,
110 },
111};
112
113static struct mci_platform_data __initdata mci0_data = {
114 .slot[0] = {
115 .bus_width = 4,
116 .detect_pin = GPIO_PIN_PA(26),
117 .wp_pin = GPIO_PIN_PA(27),
118 },
119};
120
121/*
122 * The next two functions should go away as the boot loader is
123 * supposed to initialize the macb address registers with a valid
124 * ethernet address. But we need to keep it around for a while until
125 * we can be reasonably sure the boot loader does this.
126 *
127 * The phy_id is ignored as the driver will probe for it.
128 */
129static int __init parse_tag_ethernet(struct tag *tag)
130{
131 int i;
132
133 i = tag->u.ethernet.mac_index;
134 if (i < ARRAY_SIZE(hw_addr))
135 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
136 sizeof(hw_addr[i].addr));
137
138 return 0;
139}
140__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
141
142static void __init set_hw_addr(struct platform_device *pdev)
143{
144 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
145 const u8 *addr;
146 void __iomem *regs;
147 struct clk *pclk;
148
149 if (!res)
150 return;
151 if (pdev->id >= ARRAY_SIZE(hw_addr))
152 return;
153
154 addr = hw_addr[pdev->id].addr;
155 if (!is_valid_ether_addr(addr))
156 return;
157
158 /*
159 * Since this is board-specific code, we'll cheat and use the
160 * physical address directly as we happen to know that it's
161 * the same as the virtual address.
162 */
163 regs = (void __iomem __force *)res->start;
164 pclk = clk_get(&pdev->dev, "pclk");
165 if (!pclk)
166 return;
167
168 clk_enable(pclk);
169 __raw_writel((addr[3] << 24) | (addr[2] << 16)
170 | (addr[1] << 8) | addr[0], regs + 0x98);
171 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
172 clk_disable(pclk);
173 clk_put(pclk);
174}
175
176void __init setup_board(void)
177{
178 at32_map_usart(0, 0); /* USART 0: /dev/ttyS0 (TTL --> Altera) */
179 at32_map_usart(1, 1); /* USART 1: /dev/ttyS1 (RS232) */
180 at32_map_usart(2, 2); /* USART 2: /dev/ttyS2 (RS485) */
181 at32_map_usart(3, 3); /* USART 3: /dev/ttyS3 (RS422 Multidrop) */
182}
183
184static struct i2c_gpio_platform_data i2c_gpio_data = {
185 .sda_pin = GPIO_PIN_PA(6),
186 .scl_pin = GPIO_PIN_PA(7),
187 .sda_is_open_drain = 1,
188 .scl_is_open_drain = 1,
189 .udelay = 2, /* close to 100 kHz */
190};
191
192static struct platform_device i2c_gpio_device = {
193 .name = "i2c-gpio",
194 .id = 0,
195 .dev = {
196 .platform_data = &i2c_gpio_data,
197 },
198};
199
200static struct i2c_board_info __initdata i2c_info[] = {
201};
202
203static int __init mimc200_init(void)
204{
205 /*
206 * MIMC200 uses 16-bit SDRAM interface, so we don't need to
207 * reserve any pins for it.
208 */
209
210 at32_add_system_devices();
211
212 at32_add_device_usart(0);
213 at32_add_device_usart(1);
214 at32_add_device_usart(2);
215 at32_add_device_usart(3);
216
217 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
218 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
219
220 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
221 at32_add_device_mci(0, &mci0_data);
222 at32_add_device_usba(0, NULL);
223
224 at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
225 at32_select_gpio(i2c_gpio_data.sda_pin,
226 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
227 at32_select_gpio(i2c_gpio_data.scl_pin,
228 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
229 platform_device_register(&i2c_gpio_device);
230 i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
231
232 at32_add_device_lcdc(0, &mimc200_lcdc_data,
233 fbmem_start, fbmem_size, 1);
234
235 return 0;
236}
237postcore_initcall(mimc200_init);