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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-22 14:22:59 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-22 14:22:59 -0400
commit7578634990fb47cc30083fbd812689aa6deacfc0 (patch)
treef493860658579d9572a19b3a41fcea2de035e49f /arch/arm
parentd7f5e3df3574c6e38b99f5fe22f15540b2b9811d (diff)
parent5957a4eb284dd6f522b248b674792416466555b2 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (60 commits) [ARM] 4524/1: S3C: Move register out of include/asm-arm/arch-s3c2410 [ARM] 4523/1: S3C: Remove FIFO_MAX from uncompression headers [ARM] 4522/1: S3C: split include/asm-arm/arch/memory.h [ARM] 4521/2: S3C: Reorganise VA mapping headers [ARM] 4520/1: S3C: Remove old VA values from static map [ARM] 4519/1: S3C: split S3C2400 values out of S3C24XX map.h [ARM] 4518/1: S3C: Rename watchdog configuration options [ARM] 4517/1: S3C: Fix debug macros for ARM926 output [ARM] 4516/1: S3C: Fix uncompressor serial output for ARM926 [ARM] 4515/1: S3C: Move uncompress code to plat-s3c [ARM] 4514/1: S3C: Rename DEBUG_S3C2410_PORT and DEBUG_S3C_UART [ARM] 4513/1: S3C: Rename CONFIG_S3C2410_LOWLEVEL_UART_PORT [ARM] 4512/1: S3C: rename the debug macros for per-cpu updates [ARM] 4511/1: S3C: updated LLSERIAL Kconfig defines for CPU support [ARM] 4510/1: S3C: split debug-macro support into plat-s3c [ARM] 4509/1: S3C: Create initial arch/arm/plat-s3c [ARM] 4508/1: S3C: Move items to include/asm-arm/plat-s3c [ARM] 4461/1: MXC platform and i.MX31ADS core support [ARM] 4507/1: pxa2xx clock_event_device [ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/Kconfig.debug18
-rw-r--r--arch/arm/Makefile3
-rw-r--r--arch/arm/boot/Makefile8
-rw-r--r--arch/arm/boot/compressed/Makefile2
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/configs/em_x270_defconfig1265
-rw-r--r--arch/arm/configs/s3c2410_defconfig10
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c10
-rw-r--r--arch/arm/mach-iop32x/Kconfig7
-rw-r--r--arch/arm/mach-iop32x/Makefile1
-rw-r--r--arch/arm/mach-iop32x/em7210.c215
-rw-r--r--arch/arm/mach-iop32x/irq.c3
-rw-r--r--arch/arm/mach-ixp4xx/common.c2
-rw-r--r--arch/arm/mach-ks8695/irq.c1
-rw-r--r--arch/arm/mach-mx3/Kconfig12
-rw-r--r--arch/arm/mach-mx3/Makefile8
-rw-r--r--arch/arm/mach-mx3/Makefile.boot3
-rw-r--r--arch/arm/mach-mx3/mm.c64
-rw-r--r--arch/arm/mach-mx3/mx31ads.c142
-rw-r--r--arch/arm/mach-mx3/time.c152
-rw-r--r--arch/arm/mach-ns9xxx/Makefile1
-rw-r--r--arch/arm/mach-ns9xxx/board-a9m9750dev.c7
-rw-r--r--arch/arm/mach-ns9xxx/generic.c2
-rw-r--r--arch/arm/mach-ns9xxx/irq.c11
-rw-r--r--arch/arm/mach-ns9xxx/mach-cc9p9360js.c2
-rw-r--r--arch/arm/mach-pxa/Kconfig4
-rw-r--r--arch/arm/mach-pxa/Makefile1
-rw-r--r--arch/arm/mach-pxa/devices.h22
-rw-r--r--arch/arm/mach-pxa/em-x270.c354
-rw-r--r--arch/arm/mach-pxa/generic.c32
-rw-r--r--arch/arm/mach-pxa/pm.c169
-rw-r--r--arch/arm/mach-pxa/pxa25x.c109
-rw-r--r--arch/arm/mach-pxa/pxa27x.c151
-rw-r--r--arch/arm/mach-pxa/sleep.S112
-rw-r--r--arch/arm/mach-pxa/time.c258
-rw-r--r--arch/arm/mach-rpc/riscpc.c2
-rw-r--r--arch/arm/mach-s3c2410/Kconfig1
-rw-r--r--arch/arm/mach-s3c2410/clock.c2
-rw-r--r--arch/arm/mach-s3c2410/dma.c8
-rw-r--r--arch/arm/mach-s3c2410/mach-amlm5900.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c6
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c4
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c4
-rw-r--r--arch/arm/mach-s3c2410/mach-otom.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c6
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2410.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c2
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c3
-rw-r--r--arch/arm/mach-s3c2410/sleep.S2
-rw-r--r--arch/arm/mach-s3c2412/Kconfig1
-rw-r--r--arch/arm/mach-s3c2412/clock.c2
-rw-r--r--arch/arm/mach-s3c2412/dma.c8
-rw-r--r--arch/arm/mach-s3c2412/mach-smdk2413.c4
-rw-r--r--arch/arm/mach-s3c2412/mach-vstms.c4
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c5
-rw-r--r--arch/arm/mach-s3c2440/Kconfig1
-rw-r--r--arch/arm/mach-s3c2440/dma.c8
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c4
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c4
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c4
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2442/Kconfig1
-rw-r--r--arch/arm/mach-s3c2443/Kconfig1
-rw-r--r--arch/arm/mach-s3c2443/dma.c8
-rw-r--r--arch/arm/mach-s3c2443/mach-smdk2443.c2
-rw-r--r--arch/arm/mach-sa1100/Kconfig13
-rw-r--r--arch/arm/mach-sa1100/Makefile2
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c201
-rw-r--r--arch/arm/mach-sa1100/neponset.c2
-rw-r--r--arch/arm/mm/Kconfig18
-rw-r--r--arch/arm/mm/cache-l2x0.c6
-rw-r--r--arch/arm/mm/mmu.c14
-rw-r--r--arch/arm/mm/proc-syms.c2
-rw-r--r--arch/arm/mm/proc-v7.S33
-rw-r--r--arch/arm/plat-iop/time.c8
-rw-r--r--arch/arm/plat-mxc/Kconfig20
-rw-r--r--arch/arm/plat-mxc/Makefile10
-rw-r--r--arch/arm/plat-mxc/irq.c83
-rw-r--r--arch/arm/plat-s3c/Kconfig104
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig60
-rw-r--r--arch/arm/plat-s3c24xx/common-smdk.c2
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c2
-rw-r--r--arch/arm/plat-s3c24xx/devs.c6
-rw-r--r--arch/arm/plat-s3c24xx/pm.c2
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x.c3
-rw-r--r--arch/arm/plat-s3c24xx/sleep.S2
-rw-r--r--arch/arm/plat-s3c24xx/time.c2
-rw-r--r--arch/arm/vfp/vfphw.S12
-rw-r--r--arch/arm/vfp/vfpmodule.c12
91 files changed, 3332 insertions, 566 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a44c6da9bf83..85016313bd11 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -324,6 +324,12 @@ config ARCH_NS9XXX
324 324
325 <http://www.digi.com/products/microprocessors/index.jsp> 325 <http://www.digi.com/products/microprocessors/index.jsp>
326 326
327config ARCH_MXC
328 bool "Freescale MXC/iMX-based"
329 select ARCH_MTD_XIP
330 help
331 Support for Freescale MXC/iMX-based family of processors
332
327config ARCH_PNX4008 333config ARCH_PNX4008
328 bool "Philips Nexperia PNX4008 Mobile" 334 bool "Philips Nexperia PNX4008 Mobile"
329 help 335 help
@@ -432,6 +438,7 @@ source "arch/arm/mach-omap1/Kconfig"
432source "arch/arm/mach-omap2/Kconfig" 438source "arch/arm/mach-omap2/Kconfig"
433 439
434source "arch/arm/plat-s3c24xx/Kconfig" 440source "arch/arm/plat-s3c24xx/Kconfig"
441source "arch/arm/plat-s3c/Kconfig"
435 442
436if ARCH_S3C2410 443if ARCH_S3C2410
437source "arch/arm/mach-s3c2400/Kconfig" 444source "arch/arm/mach-s3c2400/Kconfig"
@@ -456,6 +463,8 @@ source "arch/arm/mach-realview/Kconfig"
456 463
457source "arch/arm/mach-at91/Kconfig" 464source "arch/arm/mach-at91/Kconfig"
458 465
466source "arch/arm/plat-mxc/Kconfig"
467
459source "arch/arm/mach-netx/Kconfig" 468source "arch/arm/mach-netx/Kconfig"
460 469
461source "arch/arm/mach-ns9xxx/Kconfig" 470source "arch/arm/mach-ns9xxx/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 40c5eb1f55c7..18101f5f5f24 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -82,24 +82,24 @@ config DEBUG_CLPS711X_UART2
82 output to the second serial port on these devices. Saying N will 82 output to the second serial port on these devices. Saying N will
83 cause the debug messages to appear on the first serial port. 83 cause the debug messages to appear on the first serial port.
84 84
85config DEBUG_S3C2410_PORT 85config DEBUG_S3C_PORT
86 depends on DEBUG_LL && ARCH_S3C2410 86 depends on DEBUG_LL && PLAT_S3C
87 bool "Kernel low-level debugging messages via S3C2410 UART" 87 bool "Kernel low-level debugging messages via S3C UART"
88 help 88 help
89 Say Y here if you want debug print routines to go to one of the 89 Say Y here if you want debug print routines to go to one of the
90 S3C2410 internal UARTs. The chosen UART must have been configured 90 S3C internal UARTs. The chosen UART must have been configured
91 before it is used. 91 before it is used.
92 92
93config DEBUG_S3C2410_UART 93config DEBUG_S3C_UART
94 depends on ARCH_S3C2410 94 depends on PLAT_S3C
95 int "S3C2410 UART to use for low-level debug" 95 int "S3C UART to use for low-level debug"
96 default "0" 96 default "0"
97 help 97 help
98 Choice for UART for kernel low-level using S3C2410 UARTS, 98 Choice for UART for kernel low-level using S3C UARTS,
99 should be between zero and two. The port must have been 99 should be between zero and two. The port must have been
100 initialised by the boot-loader before use. 100 initialised by the boot-loader before use.
101 101
102 The uncompressor code port configuration is now handled 102 The uncompressor code port configuration is now handled
103 by CONFIG_S3C2410_LOWLEVEL_UART_PORT. 103 by CONFIG_S3C_LOWLEVEL_UART_PORT.
104 104
105endmenu 105endmenu
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index cbd5010d3bc3..fa4ea9ff0797 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -137,6 +137,8 @@ endif
137 textofs-$(CONFIG_ARCH_NS9XXX) := 0x00108000 137 textofs-$(CONFIG_ARCH_NS9XXX) := 0x00108000
138 machine-$(CONFIG_ARCH_DAVINCI) := davinci 138 machine-$(CONFIG_ARCH_DAVINCI) := davinci
139 machine-$(CONFIG_ARCH_KS8695) := ks8695 139 machine-$(CONFIG_ARCH_KS8695) := ks8695
140 incdir-$(CONFIG_ARCH_MXC) := mxc
141 machine-$(CONFIG_ARCH_MX3) := mx3
140 142
141ifeq ($(CONFIG_ARCH_EBSA110),y) 143ifeq ($(CONFIG_ARCH_EBSA110),y)
142# This is what happens if you forget the IOCS16 line. 144# This is what happens if you forget the IOCS16 line.
@@ -183,6 +185,7 @@ core-$(CONFIG_VFP) += arch/arm/vfp/
183core-$(CONFIG_PLAT_IOP) += arch/arm/plat-iop/ 185core-$(CONFIG_PLAT_IOP) += arch/arm/plat-iop/
184core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/ 186core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/
185core-$(CONFIG_PLAT_S3C24XX) += arch/arm/plat-s3c24xx/ 187core-$(CONFIG_PLAT_S3C24XX) += arch/arm/plat-s3c24xx/
188core-$(CONFIG_ARCH_MXC) += arch/arm/plat-mxc/
186 189
187drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/ 190drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/
188drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/ 191drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index ec9c400c7f82..25f12303b106 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -91,4 +91,12 @@ zinstall: $(obj)/zImage
91 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ 91 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
92 $(obj)/zImage System.map "$(INSTALL_PATH)" 92 $(obj)/zImage System.map "$(INSTALL_PATH)"
93 93
94zi:
95 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
96 $(obj)/zImage System.map "$(INSTALL_PATH)"
97
98i:
99 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
100 $(obj)/Image System.map "$(INSTALL_PATH)"
101
94subdir- := bootp compressed 102subdir- := bootp compressed
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index a1f1691b67fe..6b8cbd69f249 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -73,7 +73,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
73 73
74targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ 74targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
75 head.o misc.o $(OBJS) 75 head.o misc.o $(OBJS)
76EXTRA_CFLAGS := -fpic 76EXTRA_CFLAGS := -fpic -fno-builtin
77EXTRA_AFLAGS := 77EXTRA_AFLAGS :=
78 78
79# Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via 79# Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index d7fb5ee1637e..b9b03eda70e5 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -55,7 +55,7 @@
55#elif defined(CONFIG_ARCH_S3C2410) 55#elif defined(CONFIG_ARCH_S3C2410)
56 .macro loadsp, rb 56 .macro loadsp, rb
57 mov \rb, #0x50000000 57 mov \rb, #0x50000000
58 add \rb, \rb, #0x4000 * CONFIG_S3C2410_LOWLEVEL_UART_PORT 58 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
59 .endm 59 .endm
60#else 60#else
61 .macro loadsp, rb 61 .macro loadsp, rb
diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig
new file mode 100644
index 000000000000..6bea0901bdf0
--- /dev/null
+++ b/arch/arm/configs/em_x270_defconfig
@@ -0,0 +1,1265 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22
4# Mon Jul 9 15:18:20 2007
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10# CONFIG_GENERIC_CLOCKEVENTS is not set
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ZONE_DMA=y
25CONFIG_ARCH_MTD_XIP=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# Code maturity level options
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35
36#
37# General setup
38#
39CONFIG_LOCALVERSION="-em-x270"
40# CONFIG_LOCALVERSION_AUTO is not set
41CONFIG_SWAP=y
42CONFIG_SYSVIPC=y
43# CONFIG_IPC_NS is not set
44CONFIG_SYSVIPC_SYSCTL=y
45# CONFIG_POSIX_MQUEUE is not set
46# CONFIG_BSD_PROCESS_ACCT is not set
47# CONFIG_TASKSTATS is not set
48# CONFIG_UTS_NS is not set
49# CONFIG_AUDIT is not set
50CONFIG_IKCONFIG=y
51CONFIG_IKCONFIG_PROC=y
52CONFIG_LOG_BUF_SHIFT=17
53CONFIG_SYSFS_DEPRECATED=y
54# CONFIG_RELAY is not set
55CONFIG_BLK_DEV_INITRD=y
56CONFIG_INITRAMFS_SOURCE=""
57CONFIG_CC_OPTIMIZE_FOR_SIZE=y
58CONFIG_SYSCTL=y
59CONFIG_EMBEDDED=y
60CONFIG_UID16=y
61CONFIG_SYSCTL_SYSCALL=y
62CONFIG_KALLSYMS=y
63# CONFIG_KALLSYMS_ALL is not set
64# CONFIG_KALLSYMS_EXTRA_PASS is not set
65CONFIG_HOTPLUG=y
66CONFIG_PRINTK=y
67CONFIG_BUG=y
68CONFIG_ELF_CORE=y
69CONFIG_BASE_FULL=y
70CONFIG_FUTEX=y
71CONFIG_ANON_INODES=y
72CONFIG_EPOLL=y
73CONFIG_SIGNALFD=y
74CONFIG_TIMERFD=y
75CONFIG_EVENTFD=y
76CONFIG_SHMEM=y
77CONFIG_VM_EVENT_COUNTERS=y
78CONFIG_SLAB=y
79# CONFIG_SLUB is not set
80# CONFIG_SLOB is not set
81CONFIG_RT_MUTEXES=y
82# CONFIG_TINY_SHMEM is not set
83CONFIG_BASE_SMALL=0
84
85#
86# Loadable module support
87#
88CONFIG_MODULES=y
89CONFIG_MODULE_UNLOAD=y
90CONFIG_MODULE_FORCE_UNLOAD=y
91# CONFIG_MODVERSIONS is not set
92# CONFIG_MODULE_SRCVERSION_ALL is not set
93CONFIG_KMOD=y
94
95#
96# Block layer
97#
98CONFIG_BLOCK=y
99# CONFIG_LBD is not set
100# CONFIG_BLK_DEV_IO_TRACE is not set
101# CONFIG_LSF is not set
102
103#
104# IO Schedulers
105#
106CONFIG_IOSCHED_NOOP=y
107CONFIG_IOSCHED_AS=y
108CONFIG_IOSCHED_DEADLINE=y
109CONFIG_IOSCHED_CFQ=y
110CONFIG_DEFAULT_AS=y
111# CONFIG_DEFAULT_DEADLINE is not set
112# CONFIG_DEFAULT_CFQ is not set
113# CONFIG_DEFAULT_NOOP is not set
114CONFIG_DEFAULT_IOSCHED="anticipatory"
115
116#
117# System Type
118#
119# CONFIG_ARCH_AAEC2000 is not set
120# CONFIG_ARCH_INTEGRATOR is not set
121# CONFIG_ARCH_REALVIEW is not set
122# CONFIG_ARCH_VERSATILE is not set
123# CONFIG_ARCH_AT91 is not set
124# CONFIG_ARCH_CLPS7500 is not set
125# CONFIG_ARCH_CLPS711X is not set
126# CONFIG_ARCH_CO285 is not set
127# CONFIG_ARCH_EBSA110 is not set
128# CONFIG_ARCH_EP93XX is not set
129# CONFIG_ARCH_FOOTBRIDGE is not set
130# CONFIG_ARCH_NETX is not set
131# CONFIG_ARCH_H720X is not set
132# CONFIG_ARCH_IMX is not set
133# CONFIG_ARCH_IOP13XX is not set
134# CONFIG_ARCH_IOP32X is not set
135# CONFIG_ARCH_IOP33X is not set
136# CONFIG_ARCH_IXP23XX is not set
137# CONFIG_ARCH_IXP2000 is not set
138# CONFIG_ARCH_IXP4XX is not set
139# CONFIG_ARCH_L7200 is not set
140# CONFIG_ARCH_KS8695 is not set
141# CONFIG_ARCH_NS9XXX is not set
142# CONFIG_ARCH_PNX4008 is not set
143CONFIG_ARCH_PXA=y
144# CONFIG_ARCH_RPC is not set
145# CONFIG_ARCH_SA1100 is not set
146# CONFIG_ARCH_S3C2410 is not set
147# CONFIG_ARCH_SHARK is not set
148# CONFIG_ARCH_LH7A40X is not set
149# CONFIG_ARCH_DAVINCI is not set
150# CONFIG_ARCH_OMAP is not set
151
152#
153# Intel PXA2xx Implementations
154#
155# CONFIG_ARCH_LUBBOCK is not set
156# CONFIG_MACH_LOGICPD_PXA270 is not set
157# CONFIG_MACH_MAINSTONE is not set
158# CONFIG_ARCH_PXA_IDP is not set
159# CONFIG_PXA_SHARPSL is not set
160# CONFIG_MACH_TRIZEPS4 is not set
161CONFIG_MACH_EM_X270=y
162CONFIG_PXA27x=y
163
164#
165# Processor Type
166#
167CONFIG_CPU_32=y
168CONFIG_CPU_XSCALE=y
169CONFIG_CPU_32v5=y
170CONFIG_CPU_ABRT_EV5T=y
171CONFIG_CPU_CACHE_VIVT=y
172CONFIG_CPU_TLB_V4WBI=y
173CONFIG_CPU_CP15=y
174CONFIG_CPU_CP15_MMU=y
175
176#
177# Processor Features
178#
179CONFIG_ARM_THUMB=y
180# CONFIG_CPU_DCACHE_DISABLE is not set
181# CONFIG_OUTER_CACHE is not set
182CONFIG_IWMMXT=y
183CONFIG_XSCALE_PMU=y
184
185#
186# Bus support
187#
188# CONFIG_ARCH_SUPPORTS_MSI is not set
189
190#
191# PCCARD (PCMCIA/CardBus) support
192#
193# CONFIG_PCCARD is not set
194
195#
196# Kernel Features
197#
198# CONFIG_TICK_ONESHOT is not set
199# CONFIG_PREEMPT is not set
200# CONFIG_NO_IDLE_HZ is not set
201CONFIG_HZ=100
202CONFIG_AEABI=y
203CONFIG_OABI_COMPAT=y
204# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
205CONFIG_SELECT_MEMORY_MODEL=y
206CONFIG_FLATMEM_MANUAL=y
207# CONFIG_DISCONTIGMEM_MANUAL is not set
208# CONFIG_SPARSEMEM_MANUAL is not set
209CONFIG_FLATMEM=y
210CONFIG_FLAT_NODE_MEM_MAP=y
211# CONFIG_SPARSEMEM_STATIC is not set
212CONFIG_SPLIT_PTLOCK_CPUS=4096
213# CONFIG_RESOURCES_64BIT is not set
214CONFIG_ZONE_DMA_FLAG=1
215CONFIG_ALIGNMENT_TRAP=y
216
217#
218# Boot options
219#
220CONFIG_ZBOOT_ROM_TEXT=0x0
221CONFIG_ZBOOT_ROM_BSS=0x0
222CONFIG_CMDLINE=""
223# CONFIG_XIP_KERNEL is not set
224# CONFIG_KEXEC is not set
225
226#
227# Floating point emulation
228#
229
230#
231# At least one emulation must be selected
232#
233CONFIG_FPE_NWFPE=y
234# CONFIG_FPE_NWFPE_XP is not set
235# CONFIG_FPE_FASTFPE is not set
236
237#
238# Userspace binary formats
239#
240CONFIG_BINFMT_ELF=y
241# CONFIG_BINFMT_AOUT is not set
242# CONFIG_BINFMT_MISC is not set
243
244#
245# Power management options
246#
247CONFIG_PM=y
248CONFIG_PM_LEGACY=y
249# CONFIG_PM_DEBUG is not set
250# CONFIG_PM_SYSFS_DEPRECATED is not set
251CONFIG_APM_EMULATION=m
252
253#
254# Networking
255#
256CONFIG_NET=y
257
258#
259# Networking options
260#
261CONFIG_PACKET=y
262# CONFIG_PACKET_MMAP is not set
263CONFIG_UNIX=y
264CONFIG_XFRM=y
265# CONFIG_XFRM_USER is not set
266# CONFIG_XFRM_SUB_POLICY is not set
267# CONFIG_XFRM_MIGRATE is not set
268# CONFIG_NET_KEY is not set
269CONFIG_INET=y
270# CONFIG_IP_MULTICAST is not set
271# CONFIG_IP_ADVANCED_ROUTER is not set
272CONFIG_IP_FIB_HASH=y
273CONFIG_IP_PNP=y
274CONFIG_IP_PNP_DHCP=y
275CONFIG_IP_PNP_BOOTP=y
276# CONFIG_IP_PNP_RARP is not set
277# CONFIG_NET_IPIP is not set
278# CONFIG_NET_IPGRE is not set
279# CONFIG_ARPD is not set
280# CONFIG_SYN_COOKIES is not set
281# CONFIG_INET_AH is not set
282# CONFIG_INET_ESP is not set
283# CONFIG_INET_IPCOMP is not set
284# CONFIG_INET_XFRM_TUNNEL is not set
285# CONFIG_INET_TUNNEL is not set
286CONFIG_INET_XFRM_MODE_TRANSPORT=y
287CONFIG_INET_XFRM_MODE_TUNNEL=y
288CONFIG_INET_XFRM_MODE_BEET=y
289CONFIG_INET_DIAG=y
290CONFIG_INET_TCP_DIAG=y
291# CONFIG_TCP_CONG_ADVANCED is not set
292CONFIG_TCP_CONG_CUBIC=y
293CONFIG_DEFAULT_TCP_CONG="cubic"
294# CONFIG_TCP_MD5SIG is not set
295# CONFIG_IPV6 is not set
296# CONFIG_INET6_XFRM_TUNNEL is not set
297# CONFIG_INET6_TUNNEL is not set
298# CONFIG_NETWORK_SECMARK is not set
299# CONFIG_NETFILTER is not set
300# CONFIG_IP_DCCP is not set
301# CONFIG_IP_SCTP is not set
302# CONFIG_TIPC is not set
303# CONFIG_ATM is not set
304# CONFIG_BRIDGE is not set
305# CONFIG_VLAN_8021Q is not set
306# CONFIG_DECNET is not set
307# CONFIG_LLC2 is not set
308# CONFIG_IPX is not set
309# CONFIG_ATALK is not set
310# CONFIG_X25 is not set
311# CONFIG_LAPB is not set
312# CONFIG_ECONET is not set
313# CONFIG_WAN_ROUTER is not set
314
315#
316# QoS and/or fair queueing
317#
318# CONFIG_NET_SCHED is not set
319
320#
321# Network testing
322#
323# CONFIG_NET_PKTGEN is not set
324# CONFIG_HAMRADIO is not set
325# CONFIG_IRDA is not set
326CONFIG_BT=m
327CONFIG_BT_L2CAP=m
328CONFIG_BT_SCO=m
329CONFIG_BT_RFCOMM=m
330# CONFIG_BT_RFCOMM_TTY is not set
331CONFIG_BT_BNEP=m
332# CONFIG_BT_BNEP_MC_FILTER is not set
333# CONFIG_BT_BNEP_PROTO_FILTER is not set
334CONFIG_BT_HIDP=m
335
336#
337# Bluetooth device drivers
338#
339CONFIG_BT_HCIUSB=m
340# CONFIG_BT_HCIUSB_SCO is not set
341CONFIG_BT_HCIUART=m
342# CONFIG_BT_HCIUART_H4 is not set
343# CONFIG_BT_HCIUART_BCSP is not set
344CONFIG_BT_HCIBCM203X=m
345CONFIG_BT_HCIBPA10X=m
346CONFIG_BT_HCIBFUSB=m
347# CONFIG_BT_HCIVHCI is not set
348# CONFIG_AF_RXRPC is not set
349
350#
351# Wireless
352#
353# CONFIG_CFG80211 is not set
354# CONFIG_WIRELESS_EXT is not set
355# CONFIG_MAC80211 is not set
356CONFIG_IEEE80211=m
357# CONFIG_IEEE80211_DEBUG is not set
358CONFIG_IEEE80211_CRYPT_WEP=m
359CONFIG_IEEE80211_CRYPT_CCMP=m
360# CONFIG_IEEE80211_CRYPT_TKIP is not set
361# CONFIG_IEEE80211_SOFTMAC is not set
362# CONFIG_RFKILL is not set
363
364#
365# Device Drivers
366#
367
368#
369# Generic Driver Options
370#
371CONFIG_STANDALONE=y
372CONFIG_PREVENT_FIRMWARE_BUILD=y
373CONFIG_FW_LOADER=y
374# CONFIG_DEBUG_DRIVER is not set
375# CONFIG_DEBUG_DEVRES is not set
376# CONFIG_SYS_HYPERVISOR is not set
377
378#
379# Connector - unified userspace <-> kernelspace linker
380#
381# CONFIG_CONNECTOR is not set
382CONFIG_MTD=y
383# CONFIG_MTD_DEBUG is not set
384CONFIG_MTD_CONCAT=y
385CONFIG_MTD_PARTITIONS=y
386# CONFIG_MTD_REDBOOT_PARTS is not set
387# CONFIG_MTD_CMDLINE_PARTS is not set
388# CONFIG_MTD_AFS_PARTS is not set
389
390#
391# User Modules And Translation Layers
392#
393CONFIG_MTD_CHAR=y
394CONFIG_MTD_BLKDEVS=y
395CONFIG_MTD_BLOCK=y
396# CONFIG_FTL is not set
397# CONFIG_NFTL is not set
398# CONFIG_INFTL is not set
399# CONFIG_RFD_FTL is not set
400# CONFIG_SSFDC is not set
401
402#
403# RAM/ROM/Flash chip drivers
404#
405# CONFIG_MTD_CFI is not set
406# CONFIG_MTD_JEDECPROBE is not set
407# CONFIG_MTD_CFI_NOSWAP is not set
408# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
409# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
410CONFIG_MTD_MAP_BANK_WIDTH_1=y
411CONFIG_MTD_MAP_BANK_WIDTH_2=y
412CONFIG_MTD_MAP_BANK_WIDTH_4=y
413# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
414# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
415# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
416CONFIG_MTD_CFI_I1=y
417CONFIG_MTD_CFI_I2=y
418# CONFIG_MTD_CFI_I4 is not set
419# CONFIG_MTD_CFI_I8 is not set
420# CONFIG_MTD_RAM is not set
421# CONFIG_MTD_ROM is not set
422# CONFIG_MTD_ABSENT is not set
423
424#
425# Mapping drivers for chip access
426#
427# CONFIG_MTD_COMPLEX_MAPPINGS is not set
428# CONFIG_MTD_SHARP_SL is not set
429# CONFIG_MTD_PLATRAM is not set
430
431#
432# Self-contained MTD device drivers
433#
434# CONFIG_MTD_SLRAM is not set
435# CONFIG_MTD_PHRAM is not set
436# CONFIG_MTD_MTDRAM is not set
437# CONFIG_MTD_BLOCK2MTD is not set
438
439#
440# Disk-On-Chip Device Drivers
441#
442# CONFIG_MTD_DOC2000 is not set
443# CONFIG_MTD_DOC2001 is not set
444# CONFIG_MTD_DOC2001PLUS is not set
445CONFIG_MTD_NAND=y
446# CONFIG_MTD_NAND_VERIFY_WRITE is not set
447# CONFIG_MTD_NAND_ECC_SMC is not set
448# CONFIG_MTD_NAND_MUSEUM_IDS is not set
449# CONFIG_MTD_NAND_H1900 is not set
450CONFIG_MTD_NAND_IDS=y
451# CONFIG_MTD_NAND_DISKONCHIP is not set
452# CONFIG_MTD_NAND_SHARPSL is not set
453# CONFIG_MTD_NAND_NANDSIM is not set
454CONFIG_MTD_NAND_PLATFORM=y
455# CONFIG_MTD_ONENAND is not set
456
457#
458# UBI - Unsorted block images
459#
460# CONFIG_MTD_UBI is not set
461
462#
463# Parallel port support
464#
465# CONFIG_PARPORT is not set
466
467#
468# Plug and Play support
469#
470# CONFIG_PNPACPI is not set
471
472#
473# Block devices
474#
475# CONFIG_BLK_DEV_COW_COMMON is not set
476CONFIG_BLK_DEV_LOOP=y
477# CONFIG_BLK_DEV_CRYPTOLOOP is not set
478# CONFIG_BLK_DEV_NBD is not set
479# CONFIG_BLK_DEV_UB is not set
480CONFIG_BLK_DEV_RAM=y
481CONFIG_BLK_DEV_RAM_COUNT=16
482CONFIG_BLK_DEV_RAM_SIZE=12000
483CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
484# CONFIG_CDROM_PKTCDVD is not set
485# CONFIG_ATA_OVER_ETH is not set
486# CONFIG_IDE is not set
487
488#
489# SCSI device support
490#
491# CONFIG_RAID_ATTRS is not set
492CONFIG_SCSI=y
493# CONFIG_SCSI_TGT is not set
494# CONFIG_SCSI_NETLINK is not set
495# CONFIG_SCSI_PROC_FS is not set
496
497#
498# SCSI support type (disk, tape, CD-ROM)
499#
500CONFIG_BLK_DEV_SD=y
501# CONFIG_CHR_DEV_ST is not set
502# CONFIG_CHR_DEV_OSST is not set
503# CONFIG_BLK_DEV_SR is not set
504# CONFIG_CHR_DEV_SG is not set
505# CONFIG_CHR_DEV_SCH is not set
506
507#
508# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
509#
510# CONFIG_SCSI_MULTI_LUN is not set
511# CONFIG_SCSI_CONSTANTS is not set
512# CONFIG_SCSI_LOGGING is not set
513# CONFIG_SCSI_SCAN_ASYNC is not set
514CONFIG_SCSI_WAIT_SCAN=m
515
516#
517# SCSI Transports
518#
519# CONFIG_SCSI_SPI_ATTRS is not set
520# CONFIG_SCSI_FC_ATTRS is not set
521# CONFIG_SCSI_ISCSI_ATTRS is not set
522# CONFIG_SCSI_SAS_ATTRS is not set
523# CONFIG_SCSI_SAS_LIBSAS is not set
524
525#
526# SCSI low-level drivers
527#
528# CONFIG_ISCSI_TCP is not set
529# CONFIG_SCSI_DEBUG is not set
530# CONFIG_ATA is not set
531
532#
533# Multi-device support (RAID and LVM)
534#
535# CONFIG_MD is not set
536
537#
538# Network device support
539#
540CONFIG_NETDEVICES=y
541# CONFIG_DUMMY is not set
542# CONFIG_BONDING is not set
543# CONFIG_EQUALIZER is not set
544# CONFIG_TUN is not set
545# CONFIG_PHYLIB is not set
546
547#
548# Ethernet (10 or 100Mbit)
549#
550CONFIG_NET_ETHERNET=y
551CONFIG_MII=y
552# CONFIG_SMC91X is not set
553CONFIG_DM9000=y
554# CONFIG_SMC911X is not set
555# CONFIG_NETDEV_1000 is not set
556# CONFIG_NETDEV_10000 is not set
557
558#
559# Wireless LAN
560#
561# CONFIG_WLAN_PRE80211 is not set
562# CONFIG_WLAN_80211 is not set
563
564#
565# USB Network Adapters
566#
567# CONFIG_USB_CATC is not set
568# CONFIG_USB_KAWETH is not set
569# CONFIG_USB_PEGASUS is not set
570# CONFIG_USB_RTL8150 is not set
571# CONFIG_USB_USBNET_MII is not set
572# CONFIG_USB_USBNET is not set
573# CONFIG_WAN is not set
574# CONFIG_PPP is not set
575# CONFIG_SLIP is not set
576# CONFIG_SHAPER is not set
577# CONFIG_NETCONSOLE is not set
578# CONFIG_NETPOLL is not set
579# CONFIG_NET_POLL_CONTROLLER is not set
580
581#
582# ISDN subsystem
583#
584# CONFIG_ISDN is not set
585
586#
587# Input device support
588#
589CONFIG_INPUT=y
590# CONFIG_INPUT_FF_MEMLESS is not set
591# CONFIG_INPUT_POLLDEV is not set
592
593#
594# Userland interfaces
595#
596CONFIG_INPUT_MOUSEDEV=y
597# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
598CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
599CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
600# CONFIG_INPUT_JOYDEV is not set
601# CONFIG_INPUT_TSDEV is not set
602CONFIG_INPUT_EVDEV=y
603# CONFIG_INPUT_EVBUG is not set
604
605#
606# Input Device Drivers
607#
608CONFIG_INPUT_KEYBOARD=y
609# CONFIG_KEYBOARD_ATKBD is not set
610# CONFIG_KEYBOARD_SUNKBD is not set
611# CONFIG_KEYBOARD_LKKBD is not set
612# CONFIG_KEYBOARD_XTKBD is not set
613# CONFIG_KEYBOARD_NEWTON is not set
614# CONFIG_KEYBOARD_STOWAWAY is not set
615CONFIG_KEYBOARD_PXA27x=m
616# CONFIG_KEYBOARD_GPIO is not set
617# CONFIG_INPUT_MOUSE is not set
618# CONFIG_INPUT_JOYSTICK is not set
619# CONFIG_INPUT_TABLET is not set
620CONFIG_INPUT_TOUCHSCREEN=y
621# CONFIG_TOUCHSCREEN_GUNZE is not set
622# CONFIG_TOUCHSCREEN_ELO is not set
623# CONFIG_TOUCHSCREEN_MTOUCH is not set
624# CONFIG_TOUCHSCREEN_MK712 is not set
625# CONFIG_TOUCHSCREEN_PENMOUNT is not set
626# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
627# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
628# CONFIG_TOUCHSCREEN_UCB1400 is not set
629# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
630# CONFIG_INPUT_MISC is not set
631
632#
633# Hardware I/O ports
634#
635CONFIG_SERIO=y
636# CONFIG_SERIO_SERPORT is not set
637CONFIG_SERIO_LIBPS2=y
638# CONFIG_SERIO_RAW is not set
639# CONFIG_GAMEPORT is not set
640
641#
642# Character devices
643#
644CONFIG_VT=y
645CONFIG_VT_CONSOLE=y
646CONFIG_HW_CONSOLE=y
647# CONFIG_VT_HW_CONSOLE_BINDING is not set
648# CONFIG_SERIAL_NONSTANDARD is not set
649
650#
651# Serial drivers
652#
653# CONFIG_SERIAL_8250 is not set
654
655#
656# Non-8250 serial port support
657#
658CONFIG_SERIAL_PXA=y
659CONFIG_SERIAL_PXA_CONSOLE=y
660CONFIG_SERIAL_CORE=y
661CONFIG_SERIAL_CORE_CONSOLE=y
662CONFIG_UNIX98_PTYS=y
663CONFIG_LEGACY_PTYS=y
664CONFIG_LEGACY_PTY_COUNT=256
665
666#
667# IPMI
668#
669# CONFIG_IPMI_HANDLER is not set
670# CONFIG_WATCHDOG is not set
671CONFIG_HW_RANDOM=m
672# CONFIG_NVRAM is not set
673# CONFIG_R3964 is not set
674# CONFIG_RAW_DRIVER is not set
675
676#
677# TPM devices
678#
679# CONFIG_TCG_TPM is not set
680# CONFIG_I2C is not set
681
682#
683# SPI support
684#
685# CONFIG_SPI is not set
686# CONFIG_SPI_MASTER is not set
687
688#
689# Dallas's 1-wire bus
690#
691# CONFIG_W1 is not set
692# CONFIG_HWMON is not set
693
694#
695# Misc devices
696#
697
698#
699# Multifunction device drivers
700#
701# CONFIG_MFD_SM501 is not set
702
703#
704# LED devices
705#
706# CONFIG_NEW_LEDS is not set
707
708#
709# LED drivers
710#
711
712#
713# LED Triggers
714#
715
716#
717# Multimedia devices
718#
719# CONFIG_VIDEO_DEV is not set
720# CONFIG_DVB_CORE is not set
721# CONFIG_DAB is not set
722
723#
724# Graphics support
725#
726# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
727
728#
729# Display device support
730#
731# CONFIG_DISPLAY_SUPPORT is not set
732# CONFIG_VGASTATE is not set
733CONFIG_FB=y
734# CONFIG_FIRMWARE_EDID is not set
735# CONFIG_FB_DDC is not set
736CONFIG_FB_CFB_FILLRECT=y
737CONFIG_FB_CFB_COPYAREA=y
738CONFIG_FB_CFB_IMAGEBLIT=y
739# CONFIG_FB_SYS_FILLRECT is not set
740# CONFIG_FB_SYS_COPYAREA is not set
741# CONFIG_FB_SYS_IMAGEBLIT is not set
742# CONFIG_FB_SYS_FOPS is not set
743CONFIG_FB_DEFERRED_IO=y
744# CONFIG_FB_SVGALIB is not set
745# CONFIG_FB_MACMODES is not set
746# CONFIG_FB_BACKLIGHT is not set
747# CONFIG_FB_MODE_HELPERS is not set
748# CONFIG_FB_TILEBLITTING is not set
749
750#
751# Frame buffer hardware drivers
752#
753# CONFIG_FB_S1D13XXX is not set
754CONFIG_FB_PXA=y
755# CONFIG_FB_PXA_PARAMETERS is not set
756# CONFIG_FB_MBX is not set
757# CONFIG_FB_VIRTUAL is not set
758
759#
760# Console display driver support
761#
762# CONFIG_VGA_CONSOLE is not set
763CONFIG_DUMMY_CONSOLE=y
764CONFIG_FRAMEBUFFER_CONSOLE=y
765# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
766# CONFIG_FONTS is not set
767CONFIG_FONT_8x8=y
768CONFIG_FONT_8x16=y
769CONFIG_LOGO=y
770CONFIG_LOGO_LINUX_MONO=y
771CONFIG_LOGO_LINUX_VGA16=y
772CONFIG_LOGO_LINUX_CLUT224=y
773
774#
775# Sound
776#
777CONFIG_SOUND=m
778
779#
780# Advanced Linux Sound Architecture
781#
782CONFIG_SND=m
783CONFIG_SND_TIMER=m
784CONFIG_SND_PCM=m
785# CONFIG_SND_SEQUENCER is not set
786CONFIG_SND_OSSEMUL=y
787CONFIG_SND_MIXER_OSS=m
788CONFIG_SND_PCM_OSS=m
789CONFIG_SND_PCM_OSS_PLUGINS=y
790# CONFIG_SND_DYNAMIC_MINORS is not set
791CONFIG_SND_SUPPORT_OLD_API=y
792CONFIG_SND_VERBOSE_PROCFS=y
793# CONFIG_SND_VERBOSE_PRINTK is not set
794# CONFIG_SND_DEBUG is not set
795
796#
797# Generic devices
798#
799CONFIG_SND_AC97_CODEC=m
800# CONFIG_SND_DUMMY is not set
801# CONFIG_SND_MTPAV is not set
802# CONFIG_SND_SERIAL_U16550 is not set
803# CONFIG_SND_MPU401 is not set
804
805#
806# ALSA ARM devices
807#
808CONFIG_SND_PXA2XX_PCM=m
809CONFIG_SND_PXA2XX_AC97=m
810
811#
812# USB devices
813#
814# CONFIG_SND_USB_AUDIO is not set
815# CONFIG_SND_USB_CAIAQ is not set
816
817#
818# System on Chip audio support
819#
820# CONFIG_SND_SOC is not set
821
822#
823# Open Sound System
824#
825# CONFIG_SOUND_PRIME is not set
826CONFIG_AC97_BUS=m
827
828#
829# HID Devices
830#
831CONFIG_HID=y
832# CONFIG_HID_DEBUG is not set
833
834#
835# USB Input Devices
836#
837CONFIG_USB_HID=y
838# CONFIG_USB_HIDINPUT_POWERBOOK is not set
839# CONFIG_HID_FF is not set
840# CONFIG_USB_HIDDEV is not set
841
842#
843# USB support
844#
845CONFIG_USB_ARCH_HAS_HCD=y
846CONFIG_USB_ARCH_HAS_OHCI=y
847# CONFIG_USB_ARCH_HAS_EHCI is not set
848CONFIG_USB=y
849# CONFIG_USB_DEBUG is not set
850
851#
852# Miscellaneous USB options
853#
854CONFIG_USB_DEVICEFS=y
855# CONFIG_USB_DEVICE_CLASS is not set
856# CONFIG_USB_DYNAMIC_MINORS is not set
857# CONFIG_USB_SUSPEND is not set
858# CONFIG_USB_OTG is not set
859
860#
861# USB Host Controller Drivers
862#
863# CONFIG_USB_ISP116X_HCD is not set
864CONFIG_USB_OHCI_HCD=y
865# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
866# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
867CONFIG_USB_OHCI_LITTLE_ENDIAN=y
868# CONFIG_USB_SL811_HCD is not set
869
870#
871# USB Device Class drivers
872#
873# CONFIG_USB_ACM is not set
874# CONFIG_USB_PRINTER is not set
875
876#
877# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
878#
879
880#
881# may also be needed; see USB_STORAGE Help for more information
882#
883CONFIG_USB_STORAGE=y
884# CONFIG_USB_STORAGE_DEBUG is not set
885# CONFIG_USB_STORAGE_DATAFAB is not set
886# CONFIG_USB_STORAGE_FREECOM is not set
887# CONFIG_USB_STORAGE_DPCM is not set
888# CONFIG_USB_STORAGE_USBAT is not set
889# CONFIG_USB_STORAGE_SDDR09 is not set
890# CONFIG_USB_STORAGE_SDDR55 is not set
891# CONFIG_USB_STORAGE_JUMPSHOT is not set
892# CONFIG_USB_STORAGE_ALAUDA is not set
893# CONFIG_USB_STORAGE_KARMA is not set
894# CONFIG_USB_LIBUSUAL is not set
895
896#
897# USB Imaging devices
898#
899# CONFIG_USB_MDC800 is not set
900# CONFIG_USB_MICROTEK is not set
901# CONFIG_USB_MON is not set
902
903#
904# USB port drivers
905#
906
907#
908# USB Serial Converter support
909#
910# CONFIG_USB_SERIAL is not set
911
912#
913# USB Miscellaneous drivers
914#
915# CONFIG_USB_EMI62 is not set
916# CONFIG_USB_EMI26 is not set
917# CONFIG_USB_ADUTUX is not set
918# CONFIG_USB_AUERSWALD is not set
919# CONFIG_USB_RIO500 is not set
920# CONFIG_USB_LEGOTOWER is not set
921# CONFIG_USB_LCD is not set
922# CONFIG_USB_BERRY_CHARGE is not set
923# CONFIG_USB_LED is not set
924# CONFIG_USB_CYPRESS_CY7C63 is not set
925# CONFIG_USB_CYTHERM is not set
926# CONFIG_USB_PHIDGET is not set
927# CONFIG_USB_IDMOUSE is not set
928# CONFIG_USB_FTDI_ELAN is not set
929# CONFIG_USB_APPLEDISPLAY is not set
930# CONFIG_USB_LD is not set
931# CONFIG_USB_TRANCEVIBRATOR is not set
932# CONFIG_USB_IOWARRIOR is not set
933# CONFIG_USB_TEST is not set
934
935#
936# USB DSL modem support
937#
938
939#
940# USB Gadget Support
941#
942# CONFIG_USB_GADGET is not set
943CONFIG_MMC=m
944# CONFIG_MMC_DEBUG is not set
945# CONFIG_MMC_UNSAFE_RESUME is not set
946
947#
948# MMC/SD Card Drivers
949#
950CONFIG_MMC_BLOCK=m
951
952#
953# MMC/SD Host Controller Drivers
954#
955CONFIG_MMC_PXA=m
956
957#
958# Real Time Clock
959#
960CONFIG_RTC_LIB=y
961CONFIG_RTC_CLASS=m
962
963#
964# RTC interfaces
965#
966CONFIG_RTC_INTF_SYSFS=y
967CONFIG_RTC_INTF_PROC=y
968CONFIG_RTC_INTF_DEV=y
969# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
970# CONFIG_RTC_DRV_TEST is not set
971
972#
973# I2C RTC drivers
974#
975
976#
977# SPI RTC drivers
978#
979
980#
981# Platform RTC drivers
982#
983# CONFIG_RTC_DRV_CMOS is not set
984# CONFIG_RTC_DRV_DS1553 is not set
985# CONFIG_RTC_DRV_DS1742 is not set
986# CONFIG_RTC_DRV_M48T86 is not set
987CONFIG_RTC_DRV_V3020=m
988
989#
990# on-CPU RTC drivers
991#
992CONFIG_RTC_DRV_SA1100=m
993
994#
995# File systems
996#
997CONFIG_EXT2_FS=y
998# CONFIG_EXT2_FS_XATTR is not set
999# CONFIG_EXT2_FS_XIP is not set
1000CONFIG_EXT3_FS=y
1001CONFIG_EXT3_FS_XATTR=y
1002# CONFIG_EXT3_FS_POSIX_ACL is not set
1003# CONFIG_EXT3_FS_SECURITY is not set
1004# CONFIG_EXT4DEV_FS is not set
1005CONFIG_JBD=y
1006# CONFIG_JBD_DEBUG is not set
1007CONFIG_FS_MBCACHE=y
1008# CONFIG_REISERFS_FS is not set
1009# CONFIG_JFS_FS is not set
1010# CONFIG_FS_POSIX_ACL is not set
1011# CONFIG_XFS_FS is not set
1012# CONFIG_GFS2_FS is not set
1013# CONFIG_OCFS2_FS is not set
1014# CONFIG_MINIX_FS is not set
1015# CONFIG_ROMFS_FS is not set
1016CONFIG_INOTIFY=y
1017CONFIG_INOTIFY_USER=y
1018# CONFIG_QUOTA is not set
1019CONFIG_DNOTIFY=y
1020# CONFIG_AUTOFS_FS is not set
1021# CONFIG_AUTOFS4_FS is not set
1022# CONFIG_FUSE_FS is not set
1023
1024#
1025# CD-ROM/DVD Filesystems
1026#
1027# CONFIG_ISO9660_FS is not set
1028# CONFIG_UDF_FS is not set
1029
1030#
1031# DOS/FAT/NT Filesystems
1032#
1033CONFIG_FAT_FS=y
1034CONFIG_MSDOS_FS=y
1035CONFIG_VFAT_FS=y
1036CONFIG_FAT_DEFAULT_CODEPAGE=437
1037CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1038# CONFIG_NTFS_FS is not set
1039
1040#
1041# Pseudo filesystems
1042#
1043CONFIG_PROC_FS=y
1044CONFIG_PROC_SYSCTL=y
1045CONFIG_SYSFS=y
1046CONFIG_TMPFS=y
1047# CONFIG_TMPFS_POSIX_ACL is not set
1048# CONFIG_HUGETLB_PAGE is not set
1049CONFIG_RAMFS=y
1050# CONFIG_CONFIGFS_FS is not set
1051
1052#
1053# Miscellaneous filesystems
1054#
1055# CONFIG_ADFS_FS is not set
1056# CONFIG_AFFS_FS is not set
1057# CONFIG_HFS_FS is not set
1058# CONFIG_HFSPLUS_FS is not set
1059# CONFIG_BEFS_FS is not set
1060# CONFIG_BFS_FS is not set
1061# CONFIG_EFS_FS is not set
1062CONFIG_JFFS2_FS=y
1063CONFIG_JFFS2_FS_DEBUG=0
1064CONFIG_JFFS2_FS_WRITEBUFFER=y
1065CONFIG_JFFS2_SUMMARY=y
1066# CONFIG_JFFS2_FS_XATTR is not set
1067# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1068CONFIG_JFFS2_ZLIB=y
1069CONFIG_JFFS2_RTIME=y
1070# CONFIG_JFFS2_RUBIN is not set
1071# CONFIG_CRAMFS is not set
1072# CONFIG_VXFS_FS is not set
1073# CONFIG_HPFS_FS is not set
1074# CONFIG_QNX4FS_FS is not set
1075# CONFIG_SYSV_FS is not set
1076# CONFIG_UFS_FS is not set
1077
1078#
1079# Network File Systems
1080#
1081CONFIG_NFS_FS=y
1082CONFIG_NFS_V3=y
1083# CONFIG_NFS_V3_ACL is not set
1084# CONFIG_NFS_V4 is not set
1085# CONFIG_NFS_DIRECTIO is not set
1086# CONFIG_NFSD is not set
1087CONFIG_ROOT_NFS=y
1088CONFIG_LOCKD=y
1089CONFIG_LOCKD_V4=y
1090CONFIG_NFS_COMMON=y
1091CONFIG_SUNRPC=y
1092# CONFIG_SUNRPC_BIND34 is not set
1093# CONFIG_RPCSEC_GSS_KRB5 is not set
1094# CONFIG_RPCSEC_GSS_SPKM3 is not set
1095CONFIG_SMB_FS=y
1096# CONFIG_SMB_NLS_DEFAULT is not set
1097# CONFIG_CIFS is not set
1098# CONFIG_NCP_FS is not set
1099# CONFIG_CODA_FS is not set
1100# CONFIG_AFS_FS is not set
1101# CONFIG_9P_FS is not set
1102
1103#
1104# Partition Types
1105#
1106# CONFIG_PARTITION_ADVANCED is not set
1107CONFIG_MSDOS_PARTITION=y
1108
1109#
1110# Native Language Support
1111#
1112CONFIG_NLS=y
1113CONFIG_NLS_DEFAULT="iso8859-1"
1114CONFIG_NLS_CODEPAGE_437=y
1115# CONFIG_NLS_CODEPAGE_737 is not set
1116# CONFIG_NLS_CODEPAGE_775 is not set
1117# CONFIG_NLS_CODEPAGE_850 is not set
1118# CONFIG_NLS_CODEPAGE_852 is not set
1119# CONFIG_NLS_CODEPAGE_855 is not set
1120# CONFIG_NLS_CODEPAGE_857 is not set
1121# CONFIG_NLS_CODEPAGE_860 is not set
1122# CONFIG_NLS_CODEPAGE_861 is not set
1123# CONFIG_NLS_CODEPAGE_862 is not set
1124# CONFIG_NLS_CODEPAGE_863 is not set
1125# CONFIG_NLS_CODEPAGE_864 is not set
1126# CONFIG_NLS_CODEPAGE_865 is not set
1127# CONFIG_NLS_CODEPAGE_866 is not set
1128# CONFIG_NLS_CODEPAGE_869 is not set
1129# CONFIG_NLS_CODEPAGE_936 is not set
1130# CONFIG_NLS_CODEPAGE_950 is not set
1131# CONFIG_NLS_CODEPAGE_932 is not set
1132# CONFIG_NLS_CODEPAGE_949 is not set
1133# CONFIG_NLS_CODEPAGE_874 is not set
1134# CONFIG_NLS_ISO8859_8 is not set
1135# CONFIG_NLS_CODEPAGE_1250 is not set
1136# CONFIG_NLS_CODEPAGE_1251 is not set
1137# CONFIG_NLS_ASCII is not set
1138CONFIG_NLS_ISO8859_1=y
1139# CONFIG_NLS_ISO8859_2 is not set
1140# CONFIG_NLS_ISO8859_3 is not set
1141# CONFIG_NLS_ISO8859_4 is not set
1142# CONFIG_NLS_ISO8859_5 is not set
1143# CONFIG_NLS_ISO8859_6 is not set
1144# CONFIG_NLS_ISO8859_7 is not set
1145# CONFIG_NLS_ISO8859_9 is not set
1146# CONFIG_NLS_ISO8859_13 is not set
1147# CONFIG_NLS_ISO8859_14 is not set
1148# CONFIG_NLS_ISO8859_15 is not set
1149# CONFIG_NLS_KOI8_R is not set
1150# CONFIG_NLS_KOI8_U is not set
1151CONFIG_NLS_UTF8=y
1152
1153#
1154# Distributed Lock Manager
1155#
1156# CONFIG_DLM is not set
1157
1158#
1159# Profiling support
1160#
1161# CONFIG_PROFILING is not set
1162
1163#
1164# Kernel hacking
1165#
1166# CONFIG_PRINTK_TIME is not set
1167CONFIG_ENABLE_MUST_CHECK=y
1168CONFIG_MAGIC_SYSRQ=y
1169# CONFIG_UNUSED_SYMBOLS is not set
1170# CONFIG_DEBUG_FS is not set
1171# CONFIG_HEADERS_CHECK is not set
1172CONFIG_DEBUG_KERNEL=y
1173# CONFIG_DEBUG_SHIRQ is not set
1174# CONFIG_DETECT_SOFTLOCKUP is not set
1175# CONFIG_SCHEDSTATS is not set
1176# CONFIG_TIMER_STATS is not set
1177# CONFIG_DEBUG_SLAB is not set
1178# CONFIG_DEBUG_RT_MUTEXES is not set
1179# CONFIG_RT_MUTEX_TESTER is not set
1180# CONFIG_DEBUG_SPINLOCK is not set
1181# CONFIG_DEBUG_MUTEXES is not set
1182# CONFIG_DEBUG_LOCK_ALLOC is not set
1183# CONFIG_PROVE_LOCKING is not set
1184# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1185# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1186# CONFIG_DEBUG_KOBJECT is not set
1187# CONFIG_DEBUG_BUGVERBOSE is not set
1188CONFIG_DEBUG_INFO=y
1189# CONFIG_DEBUG_VM is not set
1190# CONFIG_DEBUG_LIST is not set
1191CONFIG_FRAME_POINTER=y
1192CONFIG_FORCED_INLINING=y
1193# CONFIG_RCU_TORTURE_TEST is not set
1194# CONFIG_FAULT_INJECTION is not set
1195CONFIG_DEBUG_USER=y
1196CONFIG_DEBUG_ERRORS=y
1197CONFIG_DEBUG_LL=y
1198# CONFIG_DEBUG_ICEDCC is not set
1199
1200#
1201# Security options
1202#
1203# CONFIG_KEYS is not set
1204# CONFIG_SECURITY is not set
1205
1206#
1207# Cryptographic options
1208#
1209CONFIG_CRYPTO=y
1210CONFIG_CRYPTO_ALGAPI=m
1211CONFIG_CRYPTO_BLKCIPHER=m
1212CONFIG_CRYPTO_MANAGER=m
1213# CONFIG_CRYPTO_HMAC is not set
1214# CONFIG_CRYPTO_XCBC is not set
1215# CONFIG_CRYPTO_NULL is not set
1216# CONFIG_CRYPTO_MD4 is not set
1217# CONFIG_CRYPTO_MD5 is not set
1218# CONFIG_CRYPTO_SHA1 is not set
1219# CONFIG_CRYPTO_SHA256 is not set
1220# CONFIG_CRYPTO_SHA512 is not set
1221# CONFIG_CRYPTO_WP512 is not set
1222# CONFIG_CRYPTO_TGR192 is not set
1223# CONFIG_CRYPTO_GF128MUL is not set
1224CONFIG_CRYPTO_ECB=m
1225CONFIG_CRYPTO_CBC=m
1226CONFIG_CRYPTO_PCBC=m
1227# CONFIG_CRYPTO_LRW is not set
1228# CONFIG_CRYPTO_CRYPTD is not set
1229# CONFIG_CRYPTO_DES is not set
1230# CONFIG_CRYPTO_FCRYPT is not set
1231# CONFIG_CRYPTO_BLOWFISH is not set
1232# CONFIG_CRYPTO_TWOFISH is not set
1233# CONFIG_CRYPTO_SERPENT is not set
1234CONFIG_CRYPTO_AES=m
1235# CONFIG_CRYPTO_CAST5 is not set
1236# CONFIG_CRYPTO_CAST6 is not set
1237# CONFIG_CRYPTO_TEA is not set
1238CONFIG_CRYPTO_ARC4=m
1239# CONFIG_CRYPTO_KHAZAD is not set
1240# CONFIG_CRYPTO_ANUBIS is not set
1241# CONFIG_CRYPTO_DEFLATE is not set
1242# CONFIG_CRYPTO_MICHAEL_MIC is not set
1243# CONFIG_CRYPTO_CRC32C is not set
1244# CONFIG_CRYPTO_CAMELLIA is not set
1245# CONFIG_CRYPTO_TEST is not set
1246
1247#
1248# Hardware crypto devices
1249#
1250
1251#
1252# Library routines
1253#
1254CONFIG_BITREVERSE=y
1255# CONFIG_CRC_CCITT is not set
1256# CONFIG_CRC16 is not set
1257# CONFIG_CRC_ITU_T is not set
1258CONFIG_CRC32=y
1259# CONFIG_LIBCRC32C is not set
1260CONFIG_ZLIB_INFLATE=y
1261CONFIG_ZLIB_DEFLATE=y
1262CONFIG_PLIST=y
1263CONFIG_HAS_IOMEM=y
1264CONFIG_HAS_IOPORT=y
1265CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 1d5150e4d6b3..f8a1645b3d4a 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -138,11 +138,11 @@ CONFIG_ARCH_S3C2410=y
138CONFIG_PLAT_S3C24XX=y 138CONFIG_PLAT_S3C24XX=y
139CONFIG_CPU_S3C244X=y 139CONFIG_CPU_S3C244X=y
140CONFIG_PM_SIMTEC=y 140CONFIG_PM_SIMTEC=y
141# CONFIG_S3C2410_BOOT_WATCHDOG is not set 141# CONFIG_S3C_BOOT_WATCHDOG is not set
142# CONFIG_S3C2410_BOOT_ERROR_RESET is not set 142# CONFIG_S3C_BOOT_ERROR_RESET is not set
143# CONFIG_S3C2410_PM_DEBUG is not set 143# CONFIG_S3C2410_PM_DEBUG is not set
144# CONFIG_S3C2410_PM_CHECK is not set 144# CONFIG_S3C2410_PM_CHECK is not set
145CONFIG_S3C2410_LOWLEVEL_UART_PORT=0 145CONFIG_S3C_LOWLEVEL_UART_PORT=0
146CONFIG_S3C2410_DMA=y 146CONFIG_S3C2410_DMA=y
147# CONFIG_S3C2410_DMA_DEBUG is not set 147# CONFIG_S3C2410_DMA_DEBUG is not set
148CONFIG_MACH_SMDK=y 148CONFIG_MACH_SMDK=y
@@ -1392,8 +1392,8 @@ CONFIG_DEBUG_USER=y
1392# CONFIG_DEBUG_ERRORS is not set 1392# CONFIG_DEBUG_ERRORS is not set
1393CONFIG_DEBUG_LL=y 1393CONFIG_DEBUG_LL=y
1394# CONFIG_DEBUG_ICEDCC is not set 1394# CONFIG_DEBUG_ICEDCC is not set
1395CONFIG_DEBUG_S3C2410_PORT=y 1395CONFIG_DEBUG_S3C_PORT=y
1396CONFIG_DEBUG_S3C2410_UART=0 1396CONFIG_DEBUG_S3C_UART=0
1397 1397
1398# 1398#
1399# Security options 1399# Security options
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 70599bcf451c..0417c165d50d 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -477,7 +477,7 @@ void __init at91_add_device_i2c(void) {}
477 * SPI 477 * SPI
478 * -------------------------------------------------------------------- */ 478 * -------------------------------------------------------------------- */
479 479
480#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) 480#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
481static u64 spi_dmamask = 0xffffffffUL; 481static u64 spi_dmamask = 0xffffffffUL;
482 482
483static struct resource spi_resources[] = { 483static struct resource spi_resources[] = {
@@ -494,7 +494,7 @@ static struct resource spi_resources[] = {
494}; 494};
495 495
496static struct platform_device at91rm9200_spi_device = { 496static struct platform_device at91rm9200_spi_device = {
497 .name = "at91_spi", 497 .name = "atmel_spi",
498 .id = 0, 498 .id = 0,
499 .dev = { 499 .dev = {
500 .dma_mask = &spi_dmamask, 500 .dma_mask = &spi_dmamask,
@@ -522,18 +522,14 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
522 else 522 else
523 cs_pin = spi_standard_cs[devices[i].chip_select]; 523 cs_pin = spi_standard_cs[devices[i].chip_select];
524 524
525#ifdef CONFIG_SPI_AT91_MANUAL_CS 525 /* enable chip-select pin */
526 at91_set_gpio_output(cs_pin, 1); 526 at91_set_gpio_output(cs_pin, 1);
527#else
528 at91_set_A_periph(cs_pin, 0);
529#endif
530 527
531 /* pass chip-select pin to driver */ 528 /* pass chip-select pin to driver */
532 devices[i].controller_data = (void *) cs_pin; 529 devices[i].controller_data = (void *) cs_pin;
533 } 530 }
534 531
535 spi_register_board_info(devices, nr_devices); 532 spi_register_board_info(devices, nr_devices);
536 at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi");
537 platform_device_register(&at91rm9200_spi_device); 533 platform_device_register(&at91rm9200_spi_device);
538} 534}
539#else 535#else
diff --git a/arch/arm/mach-iop32x/Kconfig b/arch/arm/mach-iop32x/Kconfig
index 9bb02b6d7ae1..dbe07c9472ed 100644
--- a/arch/arm/mach-iop32x/Kconfig
+++ b/arch/arm/mach-iop32x/Kconfig
@@ -42,6 +42,13 @@ config IOP3XX_ATU
42 Say N if the IOP is an add in card, the host system owns the PCI 42 Say N if the IOP is an add in card, the host system owns the PCI
43 bus in this case. 43 bus in this case.
44 44
45config MACH_EM7210
46 bool "Enable support for the Lanner EM7210"
47 help
48 Say Y here if you want to run your kernel on the Lanner EM7210
49 board. Say also Y here if you have a SS4000e Baxter Creek NAS
50 appliance."
51
45endmenu 52endmenu
46 53
47endif 54endif
diff --git a/arch/arm/mach-iop32x/Makefile b/arch/arm/mach-iop32x/Makefile
index 7b05b37e1f94..cfdf8a137c2b 100644
--- a/arch/arm/mach-iop32x/Makefile
+++ b/arch/arm/mach-iop32x/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_MACH_GLANTANK) += glantank.o
11obj-$(CONFIG_ARCH_IQ80321) += iq80321.o 11obj-$(CONFIG_ARCH_IQ80321) += iq80321.o
12obj-$(CONFIG_ARCH_IQ31244) += iq31244.o 12obj-$(CONFIG_ARCH_IQ31244) += iq31244.o
13obj-$(CONFIG_MACH_N2100) += n2100.o 13obj-$(CONFIG_MACH_N2100) += n2100.o
14obj-$(CONFIG_MACH_EM7210) += em7210.o
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
new file mode 100644
index 000000000000..c947152f9a3c
--- /dev/null
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -0,0 +1,215 @@
1/*
2 * arch/arm/mach-iop32x/em7210.c
3 *
4 * Board support code for the Lanner EM7210 platforms.
5 *
6 * Based on arch/arm/mach-iop32x/iq31244.c file.
7 *
8 * Copyright (C) 2007 Arnaud Patard <arnaud.patard@rtp-net.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <linux/mm.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/pm.h>
21#include <linux/serial_core.h>
22#include <linux/serial_8250.h>
23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h>
25#include <linux/i2c.h>
26#include <asm/hardware.h>
27#include <linux/io.h>
28#include <linux/irq.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/pci.h>
32#include <asm/mach/time.h>
33#include <asm/mach-types.h>
34#include <asm/arch/time.h>
35
36static void __init em7210_timer_init(void)
37{
38 /* http://www.kwaak.net/fotos/fotos-nas/slide_24.html */
39 /* 33.333 MHz crystal. */
40 iop_init_time(200000000);
41}
42
43static struct sys_timer em7210_timer = {
44 .init = em7210_timer_init,
45 .offset = iop_gettimeoffset,
46};
47
48/*
49 * EM7210 RTC
50 */
51static struct i2c_board_info __initdata em7210_i2c_devices[] = {
52 {
53 I2C_BOARD_INFO("rtc-rs5c372", 0x32),
54 .type = "rs5c372a",
55 },
56};
57
58/*
59 * EM7210 I/O
60 */
61static struct map_desc em7210_io_desc[] __initdata = {
62 { /* on-board devices */
63 .virtual = IQ31244_UART,
64 .pfn = __phys_to_pfn(IQ31244_UART),
65 .length = 0x00100000,
66 .type = MT_DEVICE,
67 },
68};
69
70void __init em7210_map_io(void)
71{
72 iop3xx_map_io();
73 iotable_init(em7210_io_desc, ARRAY_SIZE(em7210_io_desc));
74}
75
76
77/*
78 * EM7210 PCI
79 */
80#define INTA IRQ_IOP32X_XINT0
81#define INTB IRQ_IOP32X_XINT1
82#define INTC IRQ_IOP32X_XINT2
83#define INTD IRQ_IOP32X_XINT3
84
85static int __init
86em7210_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
87{
88 static int pci_irq_table[][4] = {
89 /*
90 * PCI IDSEL/INTPIN->INTLINE
91 * A B C D
92 */
93 {INTB, INTB, INTB, INTB}, /* console / uart */
94 {INTA, INTA, INTA, INTA}, /* 1st 82541 */
95 {INTD, INTD, INTD, INTD}, /* 2nd 82541 */
96 {INTC, INTC, INTC, INTC}, /* GD31244 */
97 {INTD, INTA, INTA, INTA}, /* mini-PCI */
98 {INTD, INTC, INTA, INTA}, /* NEC USB */
99 };
100
101 if (pin < 1 || pin > 4)
102 return -1;
103
104 return pci_irq_table[slot % 6][pin - 1];
105}
106
107static struct hw_pci em7210_pci __initdata = {
108 .swizzle = pci_std_swizzle,
109 .nr_controllers = 1,
110 .setup = iop3xx_pci_setup,
111 .preinit = iop3xx_pci_preinit,
112 .scan = iop3xx_pci_scan_bus,
113 .map_irq = em7210_pci_map_irq,
114};
115
116static int __init em7210_pci_init(void)
117{
118 if (machine_is_em7210())
119 pci_common_init(&em7210_pci);
120
121 return 0;
122}
123
124subsys_initcall(em7210_pci_init);
125
126
127/*
128 * EM7210 Flash
129 */
130static struct physmap_flash_data em7210_flash_data = {
131 .width = 2,
132};
133
134static struct resource em7210_flash_resource = {
135 .start = 0xf0000000,
136 .end = 0xf1ffffff,
137 .flags = IORESOURCE_MEM,
138};
139
140static struct platform_device em7210_flash_device = {
141 .name = "physmap-flash",
142 .id = 0,
143 .dev = {
144 .platform_data = &em7210_flash_data,
145 },
146 .num_resources = 1,
147 .resource = &em7210_flash_resource,
148};
149
150
151/*
152 * EM7210 UART
153 * The physical address of the serial port is 0xfe800000,
154 * so it can be used for physical and virtual address.
155 */
156static struct plat_serial8250_port em7210_serial_port[] = {
157 {
158 .mapbase = IQ31244_UART,
159 .membase = (char *)IQ31244_UART,
160 .irq = IRQ_IOP32X_XINT1,
161 .flags = UPF_SKIP_TEST,
162 .iotype = UPIO_MEM,
163 .regshift = 0,
164 .uartclk = 1843200,
165 },
166 { },
167};
168
169static struct resource em7210_uart_resource = {
170 .start = IQ31244_UART,
171 .end = IQ31244_UART + 7,
172 .flags = IORESOURCE_MEM,
173};
174
175static struct platform_device em7210_serial_device = {
176 .name = "serial8250",
177 .id = PLAT8250_DEV_PLATFORM,
178 .dev = {
179 .platform_data = em7210_serial_port,
180 },
181 .num_resources = 1,
182 .resource = &em7210_uart_resource,
183};
184
185void em7210_power_off(void)
186{
187 *IOP3XX_GPOE &= 0xfe;
188 *IOP3XX_GPOD |= 0x01;
189}
190
191static void __init em7210_init_machine(void)
192{
193 platform_device_register(&em7210_serial_device);
194 platform_device_register(&iop3xx_i2c0_device);
195 platform_device_register(&iop3xx_i2c1_device);
196 platform_device_register(&em7210_flash_device);
197 platform_device_register(&iop3xx_dma_0_channel);
198 platform_device_register(&iop3xx_dma_1_channel);
199
200 i2c_register_board_info(0, em7210_i2c_devices,
201 ARRAY_SIZE(em7210_i2c_devices));
202
203
204 pm_power_off = em7210_power_off;
205}
206
207MACHINE_START(EM7210, "Lanner EM7210")
208 .phys_io = IQ31244_UART,
209 .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
210 .boot_params = 0xa0000100,
211 .map_io = em7210_map_io,
212 .init_irq = iop32x_init_irq,
213 .timer = &em7210_timer,
214 .init_machine = em7210_init_machine,
215MACHINE_END
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index c971171c2905..55cf0162e8c1 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -63,7 +63,8 @@ void __init iop32x_init_irq(void)
63 if (machine_is_glantank() || 63 if (machine_is_glantank() ||
64 machine_is_iq80321() || 64 machine_is_iq80321() ||
65 machine_is_iq31244() || 65 machine_is_iq31244() ||
66 machine_is_n2100()) 66 machine_is_n2100() ||
67 machine_is_em7210())
67 *IOP3XX_PCIIRSR = 0x0f; 68 *IOP3XX_PCIIRSR = 0x0f;
68 69
69 for (i = 0; i < NR_IRQS; i++) { 70 for (i = 0; i < NR_IRQS; i++) {
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 23e7fba6d3e1..c1271c449246 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -188,7 +188,7 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
188 *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); 188 *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
189 189
190 /* Configure the line as an input */ 190 /* Configure the line as an input */
191 gpio_line_config(line, IXP4XX_GPIO_IN); 191 gpio_line_config(irq2gpio[irq], IXP4XX_GPIO_IN);
192 192
193 return 0; 193 return 0;
194} 194}
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index 2407bba00547..4c3ab43e1046 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -23,7 +23,6 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/ptrace.h>
27#include <linux/sysdev.h> 26#include <linux/sysdev.h>
28 27
29#include <asm/hardware.h> 28#include <asm/hardware.h>
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
new file mode 100644
index 000000000000..5fe8606cac08
--- /dev/null
+++ b/arch/arm/mach-mx3/Kconfig
@@ -0,0 +1,12 @@
1menu "MX3 Options"
2 depends on ARCH_MX3
3
4config MACH_MX31ADS
5 bool "Support MX31ADS platforms"
6 default y
7 help
8 Include support for MX31ADS platform. This includes specific
9 configurations for the board and its peripherals.
10
11endmenu
12
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
new file mode 100644
index 000000000000..cbec997f332a
--- /dev/null
+++ b/arch/arm/mach-mx3/Makefile
@@ -0,0 +1,8 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6
7obj-y := mm.o time.o
8obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o
diff --git a/arch/arm/mach-mx3/Makefile.boot b/arch/arm/mach-mx3/Makefile.boot
new file mode 100644
index 000000000000..e1dd366f836b
--- /dev/null
+++ b/arch/arm/mach-mx3/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x80008000
2params_phys-y := 0x80000100
3initrd_phys-y := 0x80800000
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
new file mode 100644
index 000000000000..41dad485ded9
--- /dev/null
+++ b/arch/arm/mach-mx3/mm.c
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/mm.h>
24#include <linux/init.h>
25#include <asm/hardware.h>
26#include <asm/pgtable.h>
27#include <asm/mach/map.h>
28#include <asm/arch/common.h>
29
30/*!
31 * @file mm.c
32 *
33 * @brief This file creates static virtual to physical mappings, common to all MX3 boards.
34 *
35 * @ingroup Memory
36 */
37
38/*!
39 * This table defines static virtual address mappings for I/O regions.
40 * These are the mappings common across all MX3 boards.
41 */
42static struct map_desc mxc_io_desc[] __initdata = {
43 {
44 .virtual = X_MEMC_BASE_ADDR_VIRT,
45 .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR),
46 .length = X_MEMC_SIZE,
47 .type = MT_DEVICE
48 }, {
49 .virtual = AVIC_BASE_ADDR_VIRT,
50 .pfn = __phys_to_pfn(AVIC_BASE_ADDR),
51 .length = AVIC_SIZE,
52 .type = MT_NONSHARED_DEVICE
53 },
54};
55
56/*!
57 * This function initializes the memory map. It is called during the
58 * system startup to create static physical to virtual memory mappings
59 * for the IO modules.
60 */
61void __init mxc_map_io(void)
62{
63 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
64}
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
new file mode 100644
index 000000000000..7e89bdc23a9f
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -0,0 +1,142 @@
1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/types.h>
22#include <linux/init.h>
23#include <linux/clk.h>
24#include <linux/serial_8250.h>
25
26#include <asm/hardware.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/memory.h>
30#include <asm/mach/map.h>
31#include <asm/arch/common.h>
32
33/*!
34 * @file mx31ads.c
35 *
36 * @brief This file contains the board-specific initialization routines.
37 *
38 * @ingroup System
39 */
40
41#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
42/*!
43 * The serial port definition structure.
44 */
45static struct plat_serial8250_port serial_platform_data[] = {
46 {
47 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
48 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
49 .irq = EXPIO_INT_XUART_INTA,
50 .uartclk = 14745600,
51 .regshift = 0,
52 .iotype = UPIO_MEM,
53 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
54 }, {
55 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
56 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
57 .irq = EXPIO_INT_XUART_INTB,
58 .uartclk = 14745600,
59 .regshift = 0,
60 .iotype = UPIO_MEM,
61 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
62 },
63 {},
64};
65
66static struct platform_device serial_device = {
67 .name = "serial8250",
68 .id = 0,
69 .dev = {
70 .platform_data = serial_platform_data,
71 },
72};
73
74static int __init mxc_init_extuart(void)
75{
76 return platform_device_register(&serial_device);
77}
78#else
79static inline int mxc_init_extuart(void)
80{
81 return 0;
82}
83#endif
84
85/*!
86 * This structure defines static mappings for the i.MX31ADS board.
87 */
88static struct map_desc mx31ads_io_desc[] __initdata = {
89 {
90 .virtual = AIPS1_BASE_ADDR_VIRT,
91 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
92 .length = AIPS1_SIZE,
93 .type = MT_NONSHARED_DEVICE
94 }, {
95 .virtual = SPBA0_BASE_ADDR_VIRT,
96 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
97 .length = SPBA0_SIZE,
98 .type = MT_NONSHARED_DEVICE
99 }, {
100 .virtual = AIPS2_BASE_ADDR_VIRT,
101 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
102 .length = AIPS2_SIZE,
103 .type = MT_NONSHARED_DEVICE
104 }, {
105 .virtual = CS4_BASE_ADDR_VIRT,
106 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
107 .length = CS4_SIZE / 2,
108 .type = MT_DEVICE
109 },
110};
111
112/*!
113 * Set up static virtual mappings.
114 */
115void __init mx31ads_map_io(void)
116{
117 mxc_map_io();
118 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
119}
120
121/*!
122 * Board specific initialization.
123 */
124static void __init mxc_board_init(void)
125{
126 mxc_init_extuart();
127}
128
129/*
130 * The following uses standard kernel macros defined in arch.h in order to
131 * initialize __mach_desc_MX31ADS data structure.
132 */
133MACHINE_START(MX31ADS, "Freescale MX31ADS")
134 /* Maintainer: Freescale Semiconductor, Inc. */
135 .phys_io = AIPS1_BASE_ADDR,
136 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
137 .boot_params = PHYS_OFFSET + 0x100,
138 .map_io = mx31ads_map_io,
139 .init_irq = mxc_init_irq,
140 .init_machine = mxc_board_init,
141 .timer = &mxc_timer,
142MACHINE_END
diff --git a/arch/arm/mach-mx3/time.c b/arch/arm/mach-mx3/time.c
new file mode 100644
index 000000000000..e81fb5c5d7c3
--- /dev/null
+++ b/arch/arm/mach-mx3/time.c
@@ -0,0 +1,152 @@
1/*
2 * System Timer Interrupt reconfigured to run in free-run mode.
3 * Author: Vitaly Wool
4 * Copyright 2004 MontaVista Software Inc.
5 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 */
7
8/*
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14/*!
15 * @file time.c
16 * @brief This file contains OS tick and wdog timer implementations.
17 *
18 * This file contains OS tick and wdog timer implementations.
19 *
20 * @ingroup Timers
21 */
22
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <asm/hardware.h>
28#include <asm/mach/time.h>
29#include <asm/io.h>
30#include <asm/arch/common.h>
31
32/*!
33 * This is the timer interrupt service routine to do required tasks.
34 * It also services the WDOG timer at the frequency of twice per WDOG
35 * timeout value. For example, if the WDOG's timeout value is 4 (2
36 * seconds since the WDOG runs at 0.5Hz), it will be serviced once
37 * every 2/2=1 second.
38 *
39 * @param irq GPT interrupt source number (not used)
40 * @param dev_id this parameter is not used
41 * @return always returns \b IRQ_HANDLED as defined in
42 * include/linux/interrupt.h.
43 */
44static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
45{
46 unsigned int next_match;
47
48 write_seqlock(&xtime_lock);
49
50 if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) {
51 do {
52 timer_tick();
53 next_match = __raw_readl(MXC_GPT_GPTOCR1) + LATCH;
54 __raw_writel(GPTSR_OF1, MXC_GPT_GPTSR);
55 __raw_writel(next_match, MXC_GPT_GPTOCR1);
56 } while ((signed long)(next_match -
57 __raw_readl(MXC_GPT_GPTCNT)) <= 0);
58 }
59
60 write_sequnlock(&xtime_lock);
61
62 return IRQ_HANDLED;
63}
64
65/*!
66 * This function is used to obtain the number of microseconds since the last
67 * timer interrupt. Note that interrupts is disabled by do_gettimeofday().
68 *
69 * @return the number of microseconds since the last timer interrupt.
70 */
71static unsigned long mxc_gettimeoffset(void)
72{
73 unsigned long ticks_to_match, elapsed, usec, tick_usec, i;
74
75 /* Get ticks before next timer match */
76 ticks_to_match =
77 __raw_readl(MXC_GPT_GPTOCR1) - __raw_readl(MXC_GPT_GPTCNT);
78
79 /* We need elapsed ticks since last match */
80 elapsed = LATCH - ticks_to_match;
81
82 /* Now convert them to usec */
83 /* Insure no overflow when calculating the usec below */
84 for (i = 1, tick_usec = tick_nsec / 1000;; i *= 2) {
85 tick_usec /= i;
86 if ((0xFFFFFFFF / tick_usec) > elapsed)
87 break;
88 }
89 usec = (unsigned long)(elapsed * tick_usec) / (LATCH / i);
90
91 return usec;
92}
93
94/*!
95 * The OS tick timer interrupt structure.
96 */
97static struct irqaction timer_irq = {
98 .name = "MXC Timer Tick",
99 .flags = IRQF_DISABLED | IRQF_TIMER,
100 .handler = mxc_timer_interrupt
101};
102
103/*!
104 * This function is used to initialize the GPT to produce an interrupt
105 * based on HZ. It is called by start_kernel() during system startup.
106 */
107void __init mxc_init_time(void)
108{
109 u32 reg, v;
110 reg = __raw_readl(MXC_GPT_GPTCR);
111 reg &= ~GPTCR_ENABLE;
112 __raw_writel(reg, MXC_GPT_GPTCR);
113 reg |= GPTCR_SWR;
114 __raw_writel(reg, MXC_GPT_GPTCR);
115
116 while ((__raw_readl(MXC_GPT_GPTCR) & GPTCR_SWR) != 0)
117 cpu_relax();
118
119 reg = GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ;
120 __raw_writel(reg, MXC_GPT_GPTCR);
121
122 /* TODO: get timer rate from clk driver */
123 v = 66500000;
124
125 __raw_writel((v / CLOCK_TICK_RATE) - 1, MXC_GPT_GPTPR);
126
127 if ((v % CLOCK_TICK_RATE) != 0) {
128 pr_info("\nWARNING: Can't generate CLOCK_TICK_RATE at %d Hz\n",
129 CLOCK_TICK_RATE);
130 }
131 pr_info("Actual CLOCK_TICK_RATE is %d Hz\n",
132 v / ((__raw_readl(MXC_GPT_GPTPR) & 0xFFF) + 1));
133
134 reg = __raw_readl(MXC_GPT_GPTCNT);
135 reg += LATCH;
136 __raw_writel(reg, MXC_GPT_GPTOCR1);
137
138 setup_irq(MXC_INT_GPT, &timer_irq);
139
140 reg = __raw_readl(MXC_GPT_GPTCR);
141 reg =
142 GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ | GPTCR_STOPEN | GPTCR_DOZEN |
143 GPTCR_WAITEN | GPTCR_ENMOD | GPTCR_ENABLE;
144 __raw_writel(reg, MXC_GPT_GPTCR);
145
146 __raw_writel(GPTIR_OF1IE, MXC_GPT_GPTIR);
147}
148
149struct sys_timer mxc_timer = {
150 .init = mxc_init_time,
151 .offset = mxc_gettimeoffset,
152};
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile
index 53213a69f601..4476411b8140 100644
--- a/arch/arm/mach-ns9xxx/Makefile
+++ b/arch/arm/mach-ns9xxx/Makefile
@@ -1,6 +1,7 @@
1obj-y := irq.o time.o generic.o 1obj-y := irq.o time.o generic.o
2 2
3obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o 3obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o
4obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o
4 5
5obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o 6obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o
6obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o 7obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 25289884a607..925048e7adfe 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -77,7 +77,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
77 77
78 desc = irq_desc + FPGA_IRQ(irqno); 78 desc = irq_desc + FPGA_IRQ(irqno);
79 79
80 desc_handle_irq(irqno, desc); 80 desc_handle_irq(FPGA_IRQ(irqno), desc);
81 } 81 }
82} 82}
83 83
@@ -91,7 +91,7 @@ void __init board_a9m9750dev_init_irq(void)
91 * use GPIO 11, because GPIO 32 is used for the LCD 91 * use GPIO 11, because GPIO 32 is used for the LCD
92 */ 92 */
93 /* XXX: proper GPIO handling */ 93 /* XXX: proper GPIO handling */
94 BBU_GC(2) &= ~0x2000; 94 BBU_GCONFb1(1) &= ~0x2000;
95 95
96 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { 96 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
97 set_irq_chip(i, &a9m9750dev_fpga_chip); 97 set_irq_chip(i, &a9m9750dev_fpga_chip);
@@ -178,7 +178,7 @@ void __init board_a9m9750dev_init_machine(void)
178 178
179 /* setup static CS0: memory configuration */ 179 /* setup static CS0: memory configuration */
180 reg = MEM_SMC(0); 180 reg = MEM_SMC(0);
181 REGSET(reg, MEM_SMC, WSMC, OFF); 181 REGSET(reg, MEM_SMC, PSMC, OFF);
182 REGSET(reg, MEM_SMC, BSMC, OFF); 182 REGSET(reg, MEM_SMC, BSMC, OFF);
183 REGSET(reg, MEM_SMC, EW, OFF); 183 REGSET(reg, MEM_SMC, EW, OFF);
184 REGSET(reg, MEM_SMC, PB, 1); 184 REGSET(reg, MEM_SMC, PB, 1);
@@ -196,4 +196,3 @@ void __init board_a9m9750dev_init_machine(void)
196 platform_add_devices(board_a9m9750dev_devices, 196 platform_add_devices(board_a9m9750dev_devices,
197 ARRAY_SIZE(board_a9m9750dev_devices)); 197 ARRAY_SIZE(board_a9m9750dev_devices));
198} 198}
199
diff --git a/arch/arm/mach-ns9xxx/generic.c b/arch/arm/mach-ns9xxx/generic.c
index 83e2b6532b22..d742c921e34d 100644
--- a/arch/arm/mach-ns9xxx/generic.c
+++ b/arch/arm/mach-ns9xxx/generic.c
@@ -18,6 +18,8 @@
18#include <asm/arch-ns9xxx/regs-mem.h> 18#include <asm/arch-ns9xxx/regs-mem.h>
19#include <asm/arch-ns9xxx/board.h> 19#include <asm/arch-ns9xxx/board.h>
20 20
21#include "generic.h"
22
21static struct map_desc standard_io_desc[] __initdata = { 23static struct map_desc standard_io_desc[] __initdata = {
22 { /* BBus */ 24 { /* BBus */
23 .virtual = io_p2v(0x90000000), 25 .virtual = io_p2v(0x90000000),
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 83d92724a971..b8c7b00522e6 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -21,6 +21,15 @@ static void ns9xxx_ack_irq_timer(unsigned int irq)
21{ 21{
22 u32 tc = SYS_TC(irq - IRQ_TIMER0); 22 u32 tc = SYS_TC(irq - IRQ_TIMER0);
23 23
24 /*
25 * If the timer is programmed to halt on terminal count, the
26 * timer must be disabled before clearing the interrupt.
27 */
28 if (REGGET(tc, SYS_TCx, REN) == 0) {
29 REGSET(tc, SYS_TCx, TEN, DIS);
30 SYS_TC(irq - IRQ_TIMER0) = tc;
31 }
32
24 REGSET(tc, SYS_TCx, INTC, SET); 33 REGSET(tc, SYS_TCx, INTC, SET);
25 SYS_TC(irq - IRQ_TIMER0) = tc; 34 SYS_TC(irq - IRQ_TIMER0) = tc;
26 35
@@ -28,7 +37,7 @@ static void ns9xxx_ack_irq_timer(unsigned int irq)
28 SYS_TC(irq - IRQ_TIMER0) = tc; 37 SYS_TC(irq - IRQ_TIMER0) = tc;
29} 38}
30 39
31void (*ns9xxx_ack_irq_functions[NR_IRQS])(unsigned int) = { 40static void (*ns9xxx_ack_irq_functions[NR_IRQS])(unsigned int) = {
32 [IRQ_TIMER0] = ns9xxx_ack_irq_timer, 41 [IRQ_TIMER0] = ns9xxx_ack_irq_timer,
33 [IRQ_TIMER1] = ns9xxx_ack_irq_timer, 42 [IRQ_TIMER1] = ns9xxx_ack_irq_timer,
34 [IRQ_TIMER2] = ns9xxx_ack_irq_timer, 43 [IRQ_TIMER2] = ns9xxx_ack_irq_timer,
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
index d09d5fa5620a..85c8b41105c9 100644
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
+++ b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
@@ -20,7 +20,7 @@ static void __init mach_cc9p9360js_init_machine(void)
20 board_jscc9p9360_init_machine(); 20 board_jscc9p9360_init_machine();
21} 21}
22 22
23MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard") 23MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard")
24 .map_io = ns9xxx_map_io, 24 .map_io = ns9xxx_map_io,
25 .init_irq = ns9xxx_init_irq, 25 .init_irq = ns9xxx_init_irq,
26 .init_machine = mach_cc9p9360js_init_machine, 26 .init_machine = mach_cc9p9360js_init_machine,
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 5c0a10041cd1..5ebec6d88b51 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -37,6 +37,10 @@ config MACH_TRIZEPS4
37 bool "Keith und Koep Trizeps4 DIMM-Module" 37 bool "Keith und Koep Trizeps4 DIMM-Module"
38 select PXA27x 38 select PXA27x
39 39
40config MACH_EM_X270
41 bool "CompuLab EM-x270 platform"
42 select PXA27x
43
40endchoice 44endchoice
41 45
42if PXA_SHARPSL 46if PXA_SHARPSL
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 9093eb1c94eb..7d6ab5c59ab9 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o sp
18obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o 18obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o
19obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o 19obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o
20obj-$(CONFIG_MACH_TOSA) += tosa.o 20obj-$(CONFIG_MACH_TOSA) += tosa.o
21obj-$(CONFIG_MACH_EM_X270) += em-x270.o
21 22
22# Support for blinky lights 23# Support for blinky lights
23led-y := leds.o 24led-y := leds.o
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 9a6faff8e5a7..636fdb1c049c 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -1,11 +1,11 @@
1extern struct platform_device pxamci_device; 1extern struct platform_device pxa_device_mci;
2extern struct platform_device pxaudc_device; 2extern struct platform_device pxa_device_udc;
3extern struct platform_device pxafb_device; 3extern struct platform_device pxa_device_fb;
4extern struct platform_device ffuart_device; 4extern struct platform_device pxa_device_ffuart;
5extern struct platform_device btuart_device; 5extern struct platform_device pxa_device_btuart;
6extern struct platform_device stuart_device; 6extern struct platform_device pxa_device_stuart;
7extern struct platform_device hwuart_device; 7extern struct platform_device pxa_device_hwuart;
8extern struct platform_device pxai2c_device; 8extern struct platform_device pxa_device_i2c;
9extern struct platform_device pxai2s_device; 9extern struct platform_device pxa_device_i2s;
10extern struct platform_device pxaficp_device; 10extern struct platform_device pxa_device_ficp;
11extern struct platform_device pxartc_device; 11extern struct platform_device pxa_device_rtc;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
new file mode 100644
index 000000000000..3d0ad5065ee5
--- /dev/null
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -0,0 +1,354 @@
1/*
2 * Support for CompuLab EM-x270 platform
3 *
4 * Copyright (C) 2007 CompuLab, Ltd.
5 * Author: Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/irq.h>
13#include <linux/platform_device.h>
14
15#include <linux/dm9000.h>
16#include <linux/rtc-v3020.h>
17
18#include <linux/mtd/nand.h>
19#include <linux/mtd/partitions.h>
20
21#include <asm/mach-types.h>
22
23#include <asm/mach/arch.h>
24
25#include <asm/arch/pxa-regs.h>
26#include <asm/arch/pxafb.h>
27#include <asm/arch/ohci.h>
28#include <asm/arch/mmc.h>
29#include <asm/arch/bitfield.h>
30
31#include "generic.h"
32
33/* GPIO IRQ usage */
34#define EM_X270_MMC_PD (105)
35#define EM_X270_ETHIRQ IRQ_GPIO(41)
36#define EM_X270_MMC_IRQ IRQ_GPIO(13)
37
38static struct resource em_x270_dm9k_resource[] = {
39 [0] = {
40 .start = PXA_CS2_PHYS,
41 .end = PXA_CS2_PHYS + 3,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = PXA_CS2_PHYS + 8,
46 .end = PXA_CS2_PHYS + 8 + 0x3f,
47 .flags = IORESOURCE_MEM,
48 },
49 [2] = {
50 .start = EM_X270_ETHIRQ,
51 .end = EM_X270_ETHIRQ,
52 .flags = IORESOURCE_IRQ,
53 }
54};
55
56/* for the moment we limit ourselves to 32bit IO until some
57 * better IO routines can be written and tested
58 */
59static struct dm9000_plat_data em_x270_dm9k_platdata = {
60 .flags = DM9000_PLATF_32BITONLY,
61};
62
63/* Ethernet device */
64static struct platform_device em_x270_dm9k = {
65 .name = "dm9000",
66 .id = 0,
67 .num_resources = ARRAY_SIZE(em_x270_dm9k_resource),
68 .resource = em_x270_dm9k_resource,
69 .dev = {
70 .platform_data = &em_x270_dm9k_platdata,
71 }
72};
73
74/* audio device */
75static struct platform_device em_x270_audio = {
76 .name = "pxa2xx-ac97",
77 .id = -1,
78};
79
80/* WM9712 touchscreen controller. Hopefully the driver will make it to
81 * the mainstream sometime */
82static struct platform_device em_x270_ts = {
83 .name = "wm97xx-ts",
84 .id = -1,
85};
86
87/* RTC */
88static struct resource em_x270_v3020_resource[] = {
89 [0] = {
90 .start = PXA_CS4_PHYS,
91 .end = PXA_CS4_PHYS + 3,
92 .flags = IORESOURCE_MEM,
93 },
94};
95
96static struct v3020_platform_data em_x270_v3020_platdata = {
97 .leftshift = 0,
98};
99
100static struct platform_device em_x270_rtc = {
101 .name = "v3020",
102 .num_resources = ARRAY_SIZE(em_x270_v3020_resource),
103 .resource = em_x270_v3020_resource,
104 .id = -1,
105 .dev = {
106 .platform_data = &em_x270_v3020_platdata,
107 }
108};
109
110/* NAND flash */
111#define GPIO_NAND_CS (11)
112#define GPIO_NAND_RB (56)
113
114static inline void nand_cs_on(void)
115{
116 GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
117}
118
119static void nand_cs_off(void)
120{
121 dsb();
122
123 GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
124}
125
126/* hardware specific access to control-lines */
127static void em_x270_nand_cmd_ctl(struct mtd_info *mtd, int dat,
128 unsigned int ctrl)
129{
130 struct nand_chip *this = mtd->priv;
131 unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
132
133 dsb();
134
135 if (ctrl & NAND_CTRL_CHANGE) {
136 if (ctrl & NAND_ALE)
137 nandaddr |= (1 << 3);
138 else
139 nandaddr &= ~(1 << 3);
140 if (ctrl & NAND_CLE)
141 nandaddr |= (1 << 2);
142 else
143 nandaddr &= ~(1 << 2);
144 if (ctrl & NAND_NCE)
145 nand_cs_on();
146 else
147 nand_cs_off();
148 }
149
150 dsb();
151 this->IO_ADDR_W = (void __iomem *)nandaddr;
152 if (dat != NAND_CMD_NONE)
153 writel(dat, this->IO_ADDR_W);
154
155 dsb();
156}
157
158/* read device ready pin */
159static int em_x270_nand_device_ready(struct mtd_info *mtd)
160{
161 dsb();
162
163 return GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB);
164}
165
166static struct mtd_partition em_x270_partition_info[] = {
167 [0] = {
168 .name = "em_x270-0",
169 .offset = 0,
170 .size = SZ_4M,
171 },
172 [1] = {
173 .name = "em_x270-1",
174 .offset = MTDPART_OFS_APPEND,
175 .size = MTDPART_SIZ_FULL
176 },
177};
178
179static const char *em_x270_part_probes[] = { "cmdlinepart", NULL };
180
181struct platform_nand_data em_x270_nand_platdata = {
182 .chip = {
183 .nr_chips = 1,
184 .chip_offset = 0,
185 .nr_partitions = ARRAY_SIZE(em_x270_partition_info),
186 .partitions = em_x270_partition_info,
187 .chip_delay = 20,
188 .part_probe_types = em_x270_part_probes,
189 },
190 .ctrl = {
191 .hwcontrol = 0,
192 .dev_ready = em_x270_nand_device_ready,
193 .select_chip = 0,
194 .cmd_ctrl = em_x270_nand_cmd_ctl,
195 },
196};
197
198static struct resource em_x270_nand_resource[] = {
199 [0] = {
200 .start = PXA_CS1_PHYS,
201 .end = PXA_CS1_PHYS + 12,
202 .flags = IORESOURCE_MEM,
203 },
204};
205
206static struct platform_device em_x270_nand = {
207 .name = "gen_nand",
208 .num_resources = ARRAY_SIZE(em_x270_nand_resource),
209 .resource = em_x270_nand_resource,
210 .id = -1,
211 .dev = {
212 .platform_data = &em_x270_nand_platdata,
213 }
214};
215
216/* platform devices */
217static struct platform_device *platform_devices[] __initdata = {
218 &em_x270_dm9k,
219 &em_x270_audio,
220 &em_x270_ts,
221 &em_x270_rtc,
222 &em_x270_nand,
223};
224
225
226/* PXA27x OHCI controller setup */
227static int em_x270_ohci_init(struct device *dev)
228{
229 /* Set the Power Control Polarity Low */
230 UHCHR = (UHCHR | UHCHR_PCPL) &
231 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
232
233 /* enable port 2 transiever */
234 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
235
236 return 0;
237}
238
239static struct pxaohci_platform_data em_x270_ohci_platform_data = {
240 .port_mode = PMM_PERPORT_MODE,
241 .init = em_x270_ohci_init,
242};
243
244
245static int em_x270_mci_init(struct device *dev,
246 irq_handler_t em_x270_detect_int,
247 void *data)
248{
249 int err;
250
251 /* setup GPIO for PXA27x MMC controller */
252 pxa_gpio_mode(GPIO32_MMCCLK_MD);
253 pxa_gpio_mode(GPIO112_MMCCMD_MD);
254 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
255 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
256 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
257 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
258
259 /* EM-X270 uses GPIO13 as SD power enable */
260 pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
261
262 err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
263 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
264 "MMC card detect", data);
265 if (err) {
266 printk(KERN_ERR "%s: can't request MMC card detect IRQ: %d\n",
267 __FUNCTION__, err);
268 return err;
269 }
270
271 return 0;
272}
273
274static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
275{
276 /*
277 FIXME: current hardware implementation does not allow to
278 enable/disable MMC power. This will be fixed in next HW releases,
279 and we'll need to add implmentation here.
280 */
281 return;
282}
283
284static void em_x270_mci_exit(struct device *dev, void *data)
285{
286 free_irq(EM_X270_MMC_IRQ, data);
287}
288
289static struct pxamci_platform_data em_x270_mci_platform_data = {
290 .ocr_mask = MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31,
291 .init = em_x270_mci_init,
292 .setpower = em_x270_mci_setpower,
293 .exit = em_x270_mci_exit,
294};
295
296/* LCD 480x640 */
297static struct pxafb_mode_info em_x270_lcd_mode = {
298 .pixclock = 50000,
299 .bpp = 16,
300 .xres = 480,
301 .yres = 640,
302 .hsync_len = 8,
303 .vsync_len = 2,
304 .left_margin = 8,
305 .upper_margin = 0,
306 .right_margin = 24,
307 .lower_margin = 4,
308 .cmap_greyscale = 0,
309};
310
311static struct pxafb_mach_info em_x270_lcd = {
312 .modes = &em_x270_lcd_mode,
313 .num_modes = 1,
314 .cmap_inverse = 0,
315 .cmap_static = 0,
316 .lccr0 = LCCR0_PAS,
317 .lccr3 = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
318};
319
320static void __init em_x270_init(void)
321{
322 /* setup LCD */
323 set_pxa_fb_info(&em_x270_lcd);
324
325 /* register EM-X270 platform devices */
326 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
327
328 /* set MCI and OHCI platform parameters */
329 pxa_set_mci_info(&em_x270_mci_platform_data);
330 pxa_set_ohci_info(&em_x270_ohci_platform_data);
331
332 /* setup STUART GPIOs */
333 pxa_gpio_mode(GPIO46_STRXD_MD);
334 pxa_gpio_mode(GPIO47_STTXD_MD);
335
336 /* setup BTUART GPIOs */
337 pxa_gpio_mode(GPIO42_BTRXD_MD);
338 pxa_gpio_mode(GPIO43_BTTXD_MD);
339 pxa_gpio_mode(GPIO44_BTCTS_MD);
340 pxa_gpio_mode(GPIO45_BTRTS_MD);
341
342 /* Setup interrupt for dm9000 */
343 set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
344}
345
346MACHINE_START(EM_X270, "Compulab EM-x270")
347 .boot_params = 0xa0000100,
348 .phys_io = 0x40000000,
349 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
350 .map_io = pxa_map_io,
351 .init_irq = pxa27x_init_irq,
352 .timer = &pxa_timer,
353 .init_machine = em_x270_init,
354MACHINE_END
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 296539b6359c..5510f6fdce55 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -243,7 +243,7 @@ static struct resource pxamci_resources[] = {
243 243
244static u64 pxamci_dmamask = 0xffffffffUL; 244static u64 pxamci_dmamask = 0xffffffffUL;
245 245
246struct platform_device pxamci_device = { 246struct platform_device pxa_device_mci = {
247 .name = "pxa2xx-mci", 247 .name = "pxa2xx-mci",
248 .id = -1, 248 .id = -1,
249 .dev = { 249 .dev = {
@@ -256,7 +256,7 @@ struct platform_device pxamci_device = {
256 256
257void __init pxa_set_mci_info(struct pxamci_platform_data *info) 257void __init pxa_set_mci_info(struct pxamci_platform_data *info)
258{ 258{
259 pxamci_device.dev.platform_data = info; 259 pxa_device_mci.dev.platform_data = info;
260} 260}
261 261
262 262
@@ -282,7 +282,7 @@ static struct resource pxa2xx_udc_resources[] = {
282 282
283static u64 udc_dma_mask = ~(u32)0; 283static u64 udc_dma_mask = ~(u32)0;
284 284
285struct platform_device pxaudc_device = { 285struct platform_device pxa_device_udc = {
286 .name = "pxa2xx-udc", 286 .name = "pxa2xx-udc",
287 .id = -1, 287 .id = -1,
288 .resource = pxa2xx_udc_resources, 288 .resource = pxa2xx_udc_resources,
@@ -308,7 +308,7 @@ static struct resource pxafb_resources[] = {
308 308
309static u64 fb_dma_mask = ~(u64)0; 309static u64 fb_dma_mask = ~(u64)0;
310 310
311struct platform_device pxafb_device = { 311struct platform_device pxa_device_fb = {
312 .name = "pxa2xx-fb", 312 .name = "pxa2xx-fb",
313 .id = -1, 313 .id = -1,
314 .dev = { 314 .dev = {
@@ -321,27 +321,27 @@ struct platform_device pxafb_device = {
321 321
322void __init set_pxa_fb_info(struct pxafb_mach_info *info) 322void __init set_pxa_fb_info(struct pxafb_mach_info *info)
323{ 323{
324 pxafb_device.dev.platform_data = info; 324 pxa_device_fb.dev.platform_data = info;
325} 325}
326 326
327void __init set_pxa_fb_parent(struct device *parent_dev) 327void __init set_pxa_fb_parent(struct device *parent_dev)
328{ 328{
329 pxafb_device.dev.parent = parent_dev; 329 pxa_device_fb.dev.parent = parent_dev;
330} 330}
331 331
332struct platform_device ffuart_device = { 332struct platform_device pxa_device_ffuart= {
333 .name = "pxa2xx-uart", 333 .name = "pxa2xx-uart",
334 .id = 0, 334 .id = 0,
335}; 335};
336struct platform_device btuart_device = { 336struct platform_device pxa_device_btuart = {
337 .name = "pxa2xx-uart", 337 .name = "pxa2xx-uart",
338 .id = 1, 338 .id = 1,
339}; 339};
340struct platform_device stuart_device = { 340struct platform_device pxa_device_stuart = {
341 .name = "pxa2xx-uart", 341 .name = "pxa2xx-uart",
342 .id = 2, 342 .id = 2,
343}; 343};
344struct platform_device hwuart_device = { 344struct platform_device pxa_device_hwuart = {
345 .name = "pxa2xx-uart", 345 .name = "pxa2xx-uart",
346 .id = 3, 346 .id = 3,
347}; 347};
@@ -358,7 +358,7 @@ static struct resource pxai2c_resources[] = {
358 }, 358 },
359}; 359};
360 360
361struct platform_device pxai2c_device = { 361struct platform_device pxa_device_i2c = {
362 .name = "pxa2xx-i2c", 362 .name = "pxa2xx-i2c",
363 .id = 0, 363 .id = 0,
364 .resource = pxai2c_resources, 364 .resource = pxai2c_resources,
@@ -367,7 +367,7 @@ struct platform_device pxai2c_device = {
367 367
368void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) 368void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
369{ 369{
370 pxai2c_device.dev.platform_data = info; 370 pxa_device_i2c.dev.platform_data = info;
371} 371}
372 372
373static struct resource pxai2s_resources[] = { 373static struct resource pxai2s_resources[] = {
@@ -382,7 +382,7 @@ static struct resource pxai2s_resources[] = {
382 }, 382 },
383}; 383};
384 384
385struct platform_device pxai2s_device = { 385struct platform_device pxa_device_i2s = {
386 .name = "pxa2xx-i2s", 386 .name = "pxa2xx-i2s",
387 .id = -1, 387 .id = -1,
388 .resource = pxai2s_resources, 388 .resource = pxai2s_resources,
@@ -391,7 +391,7 @@ struct platform_device pxai2s_device = {
391 391
392static u64 pxaficp_dmamask = ~(u32)0; 392static u64 pxaficp_dmamask = ~(u32)0;
393 393
394struct platform_device pxaficp_device = { 394struct platform_device pxa_device_ficp = {
395 .name = "pxa2xx-ir", 395 .name = "pxa2xx-ir",
396 .id = -1, 396 .id = -1,
397 .dev = { 397 .dev = {
@@ -402,10 +402,10 @@ struct platform_device pxaficp_device = {
402 402
403void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) 403void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
404{ 404{
405 pxaficp_device.dev.platform_data = info; 405 pxa_device_ficp.dev.platform_data = info;
406} 406}
407 407
408struct platform_device pxartc_device = { 408struct platform_device pxa_device_rtc = {
409 .name = "sa1100-rtc", 409 .name = "sa1100-rtc",
410 .id = -1, 410 .id = -1,
411}; 411};
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index e66dbc26add1..b59a81a8e7d3 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -24,61 +24,13 @@
24#include <asm/arch/lubbock.h> 24#include <asm/arch/lubbock.h>
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26 26
27 27struct pxa_cpu_pm_fns *pxa_cpu_pm_fns;
28/* 28static unsigned long *sleep_save;
29 * Debug macros
30 */
31#undef DEBUG
32
33#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
34#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
35
36#define RESTORE_GPLEVEL(n) do { \
37 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
38 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
39} while (0)
40
41/*
42 * List of global PXA peripheral registers to preserve.
43 * More ones like CP and general purpose register values are preserved
44 * with the stack pointer in sleep.S.
45 */
46enum { SLEEP_SAVE_START = 0,
47
48 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
49 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
50 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
51 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
52 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
53
54 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
55 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
56 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
57 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
58
59 SLEEP_SAVE_PSTR,
60
61 SLEEP_SAVE_ICMR,
62 SLEEP_SAVE_CKEN,
63
64#ifdef CONFIG_PXA27x
65 SLEEP_SAVE_MDREFR,
66 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
67 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
68#endif
69
70 SLEEP_SAVE_CKSUM,
71
72 SLEEP_SAVE_SIZE
73};
74
75 29
76int pxa_pm_enter(suspend_state_t state) 30int pxa_pm_enter(suspend_state_t state)
77{ 31{
78 unsigned long sleep_save[SLEEP_SAVE_SIZE]; 32 unsigned long sleep_save_checksum = 0, checksum = 0;
79 unsigned long checksum = 0;
80 int i; 33 int i;
81 extern void pxa_cpu_pm_enter(suspend_state_t state);
82 34
83#ifdef CONFIG_IWMMXT 35#ifdef CONFIG_IWMMXT
84 /* force any iWMMXt context to ram **/ 36 /* force any iWMMXt context to ram **/
@@ -86,100 +38,35 @@ int pxa_pm_enter(suspend_state_t state)
86 iwmmxt_task_disable(NULL); 38 iwmmxt_task_disable(NULL);
87#endif 39#endif
88 40
89 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); 41 pxa_cpu_pm_fns->save(sleep_save);
90 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
91 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
92 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
93 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
94
95 SAVE(GAFR0_L); SAVE(GAFR0_U);
96 SAVE(GAFR1_L); SAVE(GAFR1_U);
97 SAVE(GAFR2_L); SAVE(GAFR2_U);
98
99#ifdef CONFIG_PXA27x
100 SAVE(MDREFR);
101 SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
102 SAVE(GAFR3_L); SAVE(GAFR3_U);
103 SAVE(PWER); SAVE(PCFR); SAVE(PRER);
104 SAVE(PFER); SAVE(PKWR);
105#endif
106
107 SAVE(ICMR);
108 ICMR = 0;
109
110 SAVE(CKEN);
111 SAVE(PSTR);
112
113 /* Note: wake up source are set up in each machine specific files */
114
115 /* clear GPIO transition detect bits */
116 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
117#ifdef CONFIG_PXA27x
118 GEDR3 = GEDR3;
119#endif
120 42
121 /* Clear sleep reset status */ 43 /* Clear sleep reset status */
122 RCSR = RCSR_SMR; 44 RCSR = RCSR_SMR;
123 45
124 /* before sleeping, calculate and save a checksum */ 46 /* before sleeping, calculate and save a checksum */
125 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++) 47 for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
126 checksum += sleep_save[i]; 48 sleep_save_checksum += sleep_save[i];
127 sleep_save[SLEEP_SAVE_CKSUM] = checksum;
128 49
129 /* *** go zzz *** */ 50 /* *** go zzz *** */
130 pxa_cpu_pm_enter(state); 51 pxa_cpu_pm_fns->enter(state);
131
132 cpu_init(); 52 cpu_init();
133 53
134 /* after sleeping, validate the checksum */ 54 /* after sleeping, validate the checksum */
135 checksum = 0; 55 for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
136 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
137 checksum += sleep_save[i]; 56 checksum += sleep_save[i];
138 57
139 /* if invalid, display message and wait for a hardware reset */ 58 /* if invalid, display message and wait for a hardware reset */
140 if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) { 59 if (checksum != sleep_save_checksum) {
141#ifdef CONFIG_ARCH_LUBBOCK 60#ifdef CONFIG_ARCH_LUBBOCK
142 LUB_HEXLED = 0xbadbadc5; 61 LUB_HEXLED = 0xbadbadc5;
143#endif 62#endif
144 while (1) 63 while (1)
145 pxa_cpu_pm_enter(state); 64 pxa_cpu_pm_fns->enter(state);
146 } 65 }
147 66
148 /* ensure not to come back here if it wasn't intended */ 67 pxa_cpu_pm_fns->restore(sleep_save);
149 PSPR = 0;
150
151 /* restore registers */
152 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
153 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
154 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
155 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
156 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
157 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
158 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
159 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
160
161#ifdef CONFIG_PXA27x
162 RESTORE(MDREFR);
163 RESTORE_GPLEVEL(3); RESTORE(GPDR3);
164 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
165 RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
166 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
167 RESTORE(PFER); RESTORE(PKWR);
168#endif
169
170 PSSR = PSSR_RDH | PSSR_PH;
171
172 RESTORE(CKEN);
173
174 ICLR = 0;
175 ICCR = 1;
176 RESTORE(ICMR);
177 68
178 RESTORE(PSTR); 69 pr_debug("*** made it back from resume\n");
179
180#ifdef DEBUG
181 printk(KERN_DEBUG "*** made it back from resume\n");
182#endif
183 70
184 return 0; 71 return 0;
185} 72}
@@ -190,3 +77,35 @@ unsigned long sleep_phys_sp(void *sp)
190{ 77{
191 return virt_to_phys(sp); 78 return virt_to_phys(sp);
192} 79}
80
81static int pxa_pm_valid(suspend_state_t state)
82{
83 if (pxa_cpu_pm_fns)
84 return pxa_cpu_pm_fns->valid(state);
85
86 return -EINVAL;
87}
88
89static struct pm_ops pxa_pm_ops = {
90 .valid = pxa_pm_valid,
91 .enter = pxa_pm_enter,
92};
93
94static int __init pxa_pm_init(void)
95{
96 if (!pxa_cpu_pm_fns) {
97 printk(KERN_ERR "no valid pxa_cpu_pm_fns defined\n");
98 return -EINVAL;
99 }
100
101 sleep_save = kmalloc(pxa_cpu_pm_fns->save_size, GFP_KERNEL);
102 if (!sleep_save) {
103 printk(KERN_ERR "failed to alloc memory for pm save\n");
104 return -ENOMEM;
105 }
106
107 pm_set_ops(&pxa_pm_ops);
108 return 0;
109}
110
111device_initcall(pxa_pm_init);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index f36ca448338e..6dfcca72e90f 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -110,26 +110,99 @@ EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
110 110
111#ifdef CONFIG_PM 111#ifdef CONFIG_PM
112 112
113void pxa_cpu_pm_enter(suspend_state_t state) 113#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
114#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
115
116#define RESTORE_GPLEVEL(n) do { \
117 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
118 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
119} while (0)
120
121/*
122 * List of global PXA peripheral registers to preserve.
123 * More ones like CP and general purpose register values are preserved
124 * with the stack pointer in sleep.S.
125 */
126enum { SLEEP_SAVE_START = 0,
127
128 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2,
129 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
130 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
131 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
132 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
133
134 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
135 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
136 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
137
138 SLEEP_SAVE_PSTR,
139
140 SLEEP_SAVE_ICMR,
141 SLEEP_SAVE_CKEN,
142
143 SLEEP_SAVE_SIZE
144};
145
146
147static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
148{
149 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
150 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
151 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
152 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
153 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
154
155 SAVE(GAFR0_L); SAVE(GAFR0_U);
156 SAVE(GAFR1_L); SAVE(GAFR1_U);
157 SAVE(GAFR2_L); SAVE(GAFR2_U);
158
159 SAVE(ICMR);
160 SAVE(CKEN);
161 SAVE(PSTR);
162}
163
164static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
114{ 165{
115 extern void pxa_cpu_suspend(unsigned int); 166 /* restore registers */
116 extern void pxa_cpu_resume(void); 167 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
168 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
169 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
170 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
171 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
172 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
173 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
174 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
175
176 RESTORE(CKEN);
177 RESTORE(ICMR);
178 RESTORE(PSTR);
179}
117 180
181static void pxa25x_cpu_pm_enter(suspend_state_t state)
182{
118 CKEN = 0; 183 CKEN = 0;
119 184
120 switch (state) { 185 switch (state) {
121 case PM_SUSPEND_MEM: 186 case PM_SUSPEND_MEM:
122 /* set resume return address */ 187 /* set resume return address */
123 PSPR = virt_to_phys(pxa_cpu_resume); 188 PSPR = virt_to_phys(pxa_cpu_resume);
124 pxa_cpu_suspend(PWRMODE_SLEEP); 189 pxa25x_cpu_suspend(PWRMODE_SLEEP);
125 break; 190 break;
126 } 191 }
127} 192}
128 193
129static struct pm_ops pxa25x_pm_ops = { 194static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
130 .enter = pxa_pm_enter, 195 .save_size = SLEEP_SAVE_SIZE,
131 .valid = pm_valid_only_mem, 196 .valid = pm_valid_only_mem,
197 .save = pxa25x_cpu_pm_save,
198 .restore = pxa25x_cpu_pm_restore,
199 .enter = pxa25x_cpu_pm_enter,
132}; 200};
201
202static void __init pxa25x_init_pm(void)
203{
204 pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
205}
133#endif 206#endif
134 207
135void __init pxa25x_init_irq(void) 208void __init pxa25x_init_irq(void)
@@ -139,16 +212,16 @@ void __init pxa25x_init_irq(void)
139} 212}
140 213
141static struct platform_device *pxa25x_devices[] __initdata = { 214static struct platform_device *pxa25x_devices[] __initdata = {
142 &pxamci_device, 215 &pxa_device_mci,
143 &pxaudc_device, 216 &pxa_device_udc,
144 &pxafb_device, 217 &pxa_device_fb,
145 &ffuart_device, 218 &pxa_device_ffuart,
146 &btuart_device, 219 &pxa_device_btuart,
147 &stuart_device, 220 &pxa_device_stuart,
148 &pxai2c_device, 221 &pxa_device_i2c,
149 &pxai2s_device, 222 &pxa_device_i2s,
150 &pxaficp_device, 223 &pxa_device_ficp,
151 &pxartc_device, 224 &pxa_device_rtc,
152}; 225};
153 226
154static int __init pxa25x_init(void) 227static int __init pxa25x_init(void)
@@ -159,14 +232,14 @@ static int __init pxa25x_init(void)
159 if ((ret = pxa_init_dma(16))) 232 if ((ret = pxa_init_dma(16)))
160 return ret; 233 return ret;
161#ifdef CONFIG_PM 234#ifdef CONFIG_PM
162 pm_set_ops(&pxa25x_pm_ops); 235 pxa25x_init_pm();
163#endif 236#endif
164 ret = platform_add_devices(pxa25x_devices, 237 ret = platform_add_devices(pxa25x_devices,
165 ARRAY_SIZE(pxa25x_devices)); 238 ARRAY_SIZE(pxa25x_devices));
166 } 239 }
167 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ 240 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
168 if (cpu_is_pxa25x()) 241 if (cpu_is_pxa25x())
169 ret = platform_device_register(&hwuart_device); 242 ret = platform_device_register(&pxa_device_hwuart);
170 243
171 return ret; 244 return ret;
172} 245}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index aa5bb02c897b..203371ab19db 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -126,14 +126,107 @@ EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
126 126
127#ifdef CONFIG_PM 127#ifdef CONFIG_PM
128 128
129void pxa_cpu_pm_enter(suspend_state_t state) 129#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
130#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
131
132#define RESTORE_GPLEVEL(n) do { \
133 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
134 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
135} while (0)
136
137/*
138 * List of global PXA peripheral registers to preserve.
139 * More ones like CP and general purpose register values are preserved
140 * with the stack pointer in sleep.S.
141 */
142enum { SLEEP_SAVE_START = 0,
143
144 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
145 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
146 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
147 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
148 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
149
150 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
151 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
152 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
153 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
154
155 SLEEP_SAVE_PSTR,
156
157 SLEEP_SAVE_ICMR,
158 SLEEP_SAVE_CKEN,
159
160 SLEEP_SAVE_MDREFR,
161 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
162 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
163
164 SLEEP_SAVE_SIZE
165};
166
167void pxa27x_cpu_pm_save(unsigned long *sleep_save)
168{
169 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); SAVE(GPLR3);
170 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); SAVE(GPDR3);
171 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); SAVE(GRER3);
172 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); SAVE(GFER3);
173 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
174
175 SAVE(GAFR0_L); SAVE(GAFR0_U);
176 SAVE(GAFR1_L); SAVE(GAFR1_U);
177 SAVE(GAFR2_L); SAVE(GAFR2_U);
178 SAVE(GAFR3_L); SAVE(GAFR3_U);
179
180 SAVE(MDREFR);
181 SAVE(PWER); SAVE(PCFR); SAVE(PRER);
182 SAVE(PFER); SAVE(PKWR);
183
184 SAVE(ICMR); ICMR = 0;
185 SAVE(CKEN);
186 SAVE(PSTR);
187
188 /* Clear GPIO transition detect bits */
189 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; GEDR3 = GEDR3;
190}
191
192void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
193{
194 /* ensure not to come back here if it wasn't intended */
195 PSPR = 0;
196
197 /* restore registers */
198 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1);
199 RESTORE_GPLEVEL(2); RESTORE_GPLEVEL(3);
200 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GPDR3);
201 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
202 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
203 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
204 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
205 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GRER3);
206 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(GFER3);
207 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
208
209 RESTORE(MDREFR);
210 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
211 RESTORE(PFER); RESTORE(PKWR);
212
213 PSSR = PSSR_RDH | PSSR_PH;
214
215 RESTORE(CKEN);
216
217 ICLR = 0;
218 ICCR = 1;
219 RESTORE(ICMR);
220 RESTORE(PSTR);
221}
222
223void pxa27x_cpu_pm_enter(suspend_state_t state)
130{ 224{
131 extern void pxa_cpu_standby(void); 225 extern void pxa_cpu_standby(void);
132 extern void pxa_cpu_suspend(unsigned int);
133 extern void pxa_cpu_resume(void);
134 226
135 if (state == PM_SUSPEND_STANDBY) 227 if (state == PM_SUSPEND_STANDBY)
136 CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER) | (1 << CKEN_LCD) | (1 << CKEN_PWM0); 228 CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER) |
229 (1 << CKEN_LCD) | (1 << CKEN_PWM0);
137 else 230 else
138 CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER); 231 CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER);
139 232
@@ -150,20 +243,28 @@ void pxa_cpu_pm_enter(suspend_state_t state)
150 case PM_SUSPEND_MEM: 243 case PM_SUSPEND_MEM:
151 /* set resume return address */ 244 /* set resume return address */
152 PSPR = virt_to_phys(pxa_cpu_resume); 245 PSPR = virt_to_phys(pxa_cpu_resume);
153 pxa_cpu_suspend(PWRMODE_SLEEP); 246 pxa27x_cpu_suspend(PWRMODE_SLEEP);
154 break; 247 break;
155 } 248 }
156} 249}
157 250
158static int pxa27x_pm_valid(suspend_state_t state) 251static int pxa27x_cpu_pm_valid(suspend_state_t state)
159{ 252{
160 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; 253 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
161} 254}
162 255
163static struct pm_ops pxa27x_pm_ops = { 256static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
164 .enter = pxa_pm_enter, 257 .save_size = SLEEP_SAVE_SIZE,
165 .valid = pxa27x_pm_valid, 258 .save = pxa27x_cpu_pm_save,
259 .restore = pxa27x_cpu_pm_restore,
260 .valid = pxa27x_cpu_pm_valid,
261 .enter = pxa27x_cpu_pm_enter,
166}; 262};
263
264static void __init pxa27x_init_pm(void)
265{
266 pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
267}
167#endif 268#endif
168 269
169/* 270/*
@@ -185,7 +286,7 @@ static struct resource pxa27x_ohci_resources[] = {
185 }, 286 },
186}; 287};
187 288
188static struct platform_device pxaohci_device = { 289static struct platform_device pxa27x_device_ohci = {
189 .name = "pxa27x-ohci", 290 .name = "pxa27x-ohci",
190 .id = -1, 291 .id = -1,
191 .dev = { 292 .dev = {
@@ -198,7 +299,7 @@ static struct platform_device pxaohci_device = {
198 299
199void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) 300void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
200{ 301{
201 pxaohci_device.dev.platform_data = info; 302 pxa27x_device_ohci.dev.platform_data = info;
202} 303}
203 304
204static struct resource i2c_power_resources[] = { 305static struct resource i2c_power_resources[] = {
@@ -213,7 +314,7 @@ static struct resource i2c_power_resources[] = {
213 }, 314 },
214}; 315};
215 316
216static struct platform_device pxai2c_power_device = { 317static struct platform_device pxa27x_device_i2c_power = {
217 .name = "pxa2xx-i2c", 318 .name = "pxa2xx-i2c",
218 .id = 1, 319 .id = 1,
219 .resource = i2c_power_resources, 320 .resource = i2c_power_resources,
@@ -221,18 +322,18 @@ static struct platform_device pxai2c_power_device = {
221}; 322};
222 323
223static struct platform_device *devices[] __initdata = { 324static struct platform_device *devices[] __initdata = {
224 &pxamci_device, 325 &pxa_device_mci,
225 &pxaudc_device, 326 &pxa_device_udc,
226 &pxafb_device, 327 &pxa_device_fb,
227 &ffuart_device, 328 &pxa_device_ffuart,
228 &btuart_device, 329 &pxa_device_btuart,
229 &stuart_device, 330 &pxa_device_stuart,
230 &pxai2c_device, 331 &pxa_device_i2c,
231 &pxai2c_power_device, 332 &pxa_device_i2s,
232 &pxai2s_device, 333 &pxa_device_ficp,
233 &pxaficp_device, 334 &pxa_device_rtc,
234 &pxartc_device, 335 &pxa27x_device_i2c_power,
235 &pxaohci_device, 336 &pxa27x_device_ohci,
236}; 337};
237 338
238void __init pxa27x_init_irq(void) 339void __init pxa27x_init_irq(void)
@@ -249,7 +350,7 @@ static int __init pxa27x_init(void)
249 if ((ret = pxa_init_dma(32))) 350 if ((ret = pxa_init_dma(32)))
250 return ret; 351 return ret;
251#ifdef CONFIG_PM 352#ifdef CONFIG_PM
252 pm_set_ops(&pxa27x_pm_ops); 353 pxa27x_init_pm();
253#endif 354#endif
254 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 355 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
255 } 356 }
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 15874b360e51..aff71fec618a 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -17,28 +17,12 @@
17 17
18#include <asm/arch/pxa-regs.h> 18#include <asm/arch/pxa-regs.h>
19 19
20#ifdef CONFIG_PXA27x // workaround for Errata 50
21#define MDREFR_KDIV 0x200a4000 // all banks 20#define MDREFR_KDIV 0x200a4000 // all banks
22#define CCCR_SLEEP 0x00000107 // L=7 2N=2 A=0 PPDIS=0 CPDIS=0 21#define CCCR_SLEEP 0x00000107 // L=7 2N=2 A=0 PPDIS=0 CPDIS=0
23#endif
24 22
25 .text 23 .text
26 24
27/* 25pxa_cpu_save_cp:
28 * pxa_cpu_suspend()
29 *
30 * Forces CPU into sleep state.
31 *
32 * r0 = value for PWRMODE M field for desired sleep state
33 */
34
35ENTRY(pxa_cpu_suspend)
36
37#ifndef CONFIG_IWMMXT
38 mra r2, r3, acc0
39#endif
40 stmfd sp!, {r2 - r12, lr} @ save registers on stack
41
42 @ get coprocessor registers 26 @ get coprocessor registers
43 mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode 27 mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode
44 mrc p15, 0, r4, c15, c1, 0 @ CP access reg 28 mrc p15, 0, r4, c15, c1, 0 @ CP access reg
@@ -54,12 +38,36 @@ ENTRY(pxa_cpu_suspend)
54 mov r10, sp 38 mov r10, sp
55 stmfd sp!, {r3 - r10} 39 stmfd sp!, {r3 - r10}
56 40
57 mov r5, r0 @ save sleep mode 41 mov pc, lr
42
43pxa_cpu_save_sp:
58 @ preserve phys address of stack 44 @ preserve phys address of stack
59 mov r0, sp 45 mov r0, sp
46 mov r2, lr
60 bl sleep_phys_sp 47 bl sleep_phys_sp
61 ldr r1, =sleep_save_sp 48 ldr r1, =sleep_save_sp
62 str r0, [r1] 49 str r0, [r1]
50 mov pc, r2
51
52/*
53 * pxa27x_cpu_suspend()
54 *
55 * Forces CPU into sleep state.
56 *
57 * r0 = value for PWRMODE M field for desired sleep state
58 */
59
60ENTRY(pxa27x_cpu_suspend)
61
62#ifndef CONFIG_IWMMXT
63 mra r2, r3, acc0
64#endif
65 stmfd sp!, {r2 - r12, lr} @ save registers on stack
66
67 bl pxa_cpu_save_cp
68
69 mov r5, r0 @ save sleep mode
70 bl pxa_cpu_save_sp
63 71
64 @ clean data cache 72 @ clean data cache
65 bl xscale_flush_kern_cache_all 73 bl xscale_flush_kern_cache_all
@@ -80,13 +88,55 @@ ENTRY(pxa_cpu_suspend)
80 @ enable SDRAM self-refresh mode 88 @ enable SDRAM self-refresh mode
81 orr r5, r5, #MDREFR_SLFRSH 89 orr r5, r5, #MDREFR_SLFRSH
82 90
83#ifdef CONFIG_PXA27x
84 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50) 91 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
85 ldr r6, =MDREFR_KDIV 92 ldr r6, =MDREFR_KDIV
86 orr r5, r5, r6 93 orr r5, r5, r6
87#endif
88 94
89#ifdef CONFIG_PXA25x 95 @ Intel PXA270 Specification Update notes problems sleeping
96 @ with core operating above 91 MHz
97 @ (see Errata 50, ...processor does not exit from sleep...)
98
99 ldr r6, =CCCR
100 ldr r8, [r6] @ keep original value for resume
101
102 ldr r7, =CCCR_SLEEP @ prepare CCCR sleep value
103 mov r0, #0x2 @ prepare value for CLKCFG
104
105 @ align execution to a cache line
106 b pxa_cpu_do_suspend
107
108/*
109 * pxa27x_cpu_suspend()
110 *
111 * Forces CPU into sleep state.
112 *
113 * r0 = value for PWRMODE M field for desired sleep state
114 */
115
116ENTRY(pxa25x_cpu_suspend)
117 stmfd sp!, {r2 - r12, lr} @ save registers on stack
118
119 bl pxa_cpu_save_cp
120
121 mov r5, r0 @ save sleep mode
122 bl pxa_cpu_save_sp
123
124 @ clean data cache
125 bl xscale_flush_kern_cache_all
126
127 @ prepare value for sleep mode
128 mov r1, r5 @ sleep mode
129
130 @ prepare pointer to physical address 0 (virtual mapping in generic.c)
131 mov r2, #UNCACHED_PHYS_0
132
133 @ prepare SDRAM refresh settings
134 ldr r4, =MDREFR
135 ldr r5, [r4]
136
137 @ enable SDRAM self-refresh mode
138 orr r5, r5, #MDREFR_SLFRSH
139
90 @ Intel PXA255 Specification Update notes problems 140 @ Intel PXA255 Specification Update notes problems
91 @ about suspending with PXBus operating above 133MHz 141 @ about suspending with PXBus operating above 133MHz
92 @ (see Errata 31, GPIO output signals, ... unpredictable in sleep 142 @ (see Errata 31, GPIO output signals, ... unpredictable in sleep
@@ -118,30 +168,15 @@ ENTRY(pxa_cpu_suspend)
118 mov r0, #0 168 mov r0, #0
119 mcr p14, 0, r0, c6, c0, 0 169 mcr p14, 0, r0, c6, c0, 0
120 orr r0, r0, #2 @ initiate change bit 170 orr r0, r0, #2 @ initiate change bit
121#endif 171 b pxa_cpu_do_suspend
122#ifdef CONFIG_PXA27x
123 @ Intel PXA270 Specification Update notes problems sleeping
124 @ with core operating above 91 MHz
125 @ (see Errata 50, ...processor does not exit from sleep...)
126
127 ldr r6, =CCCR
128 ldr r8, [r6] @ keep original value for resume
129
130 ldr r7, =CCCR_SLEEP @ prepare CCCR sleep value
131 mov r0, #0x2 @ prepare value for CLKCFG
132#endif
133
134 @ align execution to a cache line
135 b 1f
136 172
137 .ltorg 173 .ltorg
138 .align 5 174 .align 5
1391: 175pxa_cpu_do_suspend:
140 176
141 @ All needed values are now in registers. 177 @ All needed values are now in registers.
142 @ These last instructions should be in cache 178 @ These last instructions should be in cache
143 179
144#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
145 @ initiate the frequency change... 180 @ initiate the frequency change...
146 str r7, [r6] 181 str r7, [r6]
147 mcr p14, 0, r0, c6, c0, 0 182 mcr p14, 0, r0, c6, c0, 0
@@ -155,7 +190,6 @@ ENTRY(pxa_cpu_suspend)
155 mov r0, #42 190 mov r0, #42
15610: subs r0, r0, #1 19110: subs r0, r0, #1
157 bne 10b 192 bne 10b
158#endif
159 193
160 @ Do not reorder... 194 @ Do not reorder...
161 @ Intel PXA270 Specification Update notes problems performing 195 @ Intel PXA270 Specification Update notes problems performing
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 6f91fd2d061a..98d27e646b09 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -1,9 +1,11 @@
1/* 1/*
2 * arch/arm/mach-pxa/time.c 2 * arch/arm/mach-pxa/time.c
3 * 3 *
4 * Author: Nicolas Pitre 4 * PXA clocksource, clockevents, and OST interrupt handlers.
5 * Created: Jun 15, 2001 5 * Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>.
6 * Copyright: MontaVista Software Inc. 6 *
7 * Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001
8 * by MontaVista Software, Inc. (Nico, your code rocks!)
7 * 9 *
8 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -12,164 +14,160 @@
12 14
13#include <linux/kernel.h> 15#include <linux/kernel.h>
14#include <linux/init.h> 16#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h> 17#include <linux/interrupt.h>
17#include <linux/time.h> 18#include <linux/clockchips.h>
18#include <linux/signal.h> 19
19#include <linux/errno.h>
20#include <linux/sched.h>
21#include <linux/clocksource.h>
22
23#include <asm/system.h>
24#include <asm/hardware.h>
25#include <asm/io.h>
26#include <asm/leds.h>
27#include <asm/irq.h>
28#include <asm/mach/irq.h> 20#include <asm/mach/irq.h>
29#include <asm/mach/time.h> 21#include <asm/mach/time.h>
30#include <asm/arch/pxa-regs.h> 22#include <asm/arch/pxa-regs.h>
31 23
32
33static int pxa_set_rtc(void)
34{
35 unsigned long current_time = xtime.tv_sec;
36
37 if (RTSR & RTSR_ALE) {
38 /* make sure not to forward the clock over an alarm */
39 unsigned long alarm = RTAR;
40 if (current_time >= alarm && alarm >= RCNR)
41 return -ERESTARTSYS;
42 }
43 RCNR = current_time;
44 return 0;
45}
46
47#ifdef CONFIG_NO_IDLE_HZ
48static unsigned long initial_match;
49static int match_posponed;
50#endif
51
52static irqreturn_t 24static irqreturn_t
53pxa_timer_interrupt(int irq, void *dev_id) 25pxa_ost0_interrupt(int irq, void *dev_id)
54{ 26{
55 int next_match; 27 int next_match;
56 28 struct clock_event_device *c = dev_id;
57 write_seqlock(&xtime_lock); 29
58 30 if (c->mode == CLOCK_EVT_MODE_ONESHOT) {
59#ifdef CONFIG_NO_IDLE_HZ 31 /* Disarm the compare/match, signal the event. */
60 if (match_posponed) { 32 OIER &= ~OIER_E0;
61 match_posponed = 0; 33 c->event_handler(c);
62 OSMR0 = initial_match; 34 } else if (c->mode == CLOCK_EVT_MODE_PERIODIC) {
63 } 35 /* Call the event handler as many times as necessary
64#endif 36 * to recover missed events, if any (if we update
65 37 * OSMR0 and OSCR0 is still ahead of us, we've missed
66 /* Loop until we get ahead of the free running timer. 38 * the event). As we're dealing with that, re-arm the
67 * This ensures an exact clock tick count and time accuracy. 39 * compare/match for the next event.
68 * Since IRQs are disabled at this point, coherence between 40 *
69 * lost_ticks(updated in do_timer()) and the match reg value is 41 * HACK ALERT:
70 * ensured, hence we can use do_gettimeofday() from interrupt 42 *
71 * handlers. 43 * There's a latency between the instruction that
72 * 44 * writes to OSMR0 and the actual commit to the
73 * HACK ALERT: it seems that the PXA timer regs aren't updated right 45 * physical hardware, because the CPU doesn't (have
74 * away in all cases when a write occurs. We therefore compare with 46 * to) run at bus speed, there's a write buffer
75 * 8 instead of 0 in the while() condition below to avoid missing a 47 * between the CPU and the bus, etc. etc. So if the
76 * match if OSCR has already reached the next OSMR value. 48 * target OSCR0 is "very close", to the OSMR0 load
77 * Experience has shown that up to 6 ticks are needed to work around 49 * value, the update to OSMR0 might not get to the
78 * this problem, but let's use 8 to be conservative. Note that this 50 * hardware in time and we'll miss that interrupt.
79 * affect things only when the timer IRQ has been delayed by nearly 51 *
80 * exactly one tick period which should be a pretty rare event. 52 * To be safe, if the new OSMR0 is "very close" to the
53 * target OSCR0 value, we call the event_handler as
54 * though the event actually happened. According to
55 * Nico's comment in the previous version of this
56 * code, experience has shown that 6 OSCR ticks is
57 * "very close" but he went with 8. We will use 16,
58 * based on the results of testing on PXA270.
59 *
60 * To be doubly sure, we also tell clkevt via
61 * clockevents_register_device() not to ask for
62 * anything that might put us "very close".
81 */ 63 */
64#define MIN_OSCR_DELTA 16
82 do { 65 do {
83 timer_tick(); 66 OSSR = OSSR_M0;
84 OSSR = OSSR_M0; /* Clear match on timer 0 */
85 next_match = (OSMR0 += LATCH); 67 next_match = (OSMR0 += LATCH);
86 } while( (signed long)(next_match - OSCR) <= 8 ); 68 c->event_handler(c);
87 69 } while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA)
88 write_sequnlock(&xtime_lock); 70 && (c->mode == CLOCK_EVT_MODE_PERIODIC));
71 }
89 72
90 return IRQ_HANDLED; 73 return IRQ_HANDLED;
91} 74}
92 75
93static struct irqaction pxa_timer_irq = { 76static int
94 .name = "PXA Timer Tick", 77pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
95 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 78{
96 .handler = pxa_timer_interrupt, 79 unsigned long irqflags;
80
81 raw_local_irq_save(irqflags);
82 OSMR0 = OSCR + delta;
83 OSSR = OSSR_M0;
84 OIER |= OIER_E0;
85 raw_local_irq_restore(irqflags);
86 return 0;
87}
88
89static void
90pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
91{
92 unsigned long irqflags;
93
94 switch (mode) {
95 case CLOCK_EVT_MODE_PERIODIC:
96 raw_local_irq_save(irqflags);
97 OSMR0 = OSCR + LATCH;
98 OSSR = OSSR_M0;
99 OIER |= OIER_E0;
100 raw_local_irq_restore(irqflags);
101 break;
102
103 case CLOCK_EVT_MODE_ONESHOT:
104 raw_local_irq_save(irqflags);
105 OIER &= ~OIER_E0;
106 raw_local_irq_restore(irqflags);
107 break;
108
109 case CLOCK_EVT_MODE_UNUSED:
110 case CLOCK_EVT_MODE_SHUTDOWN:
111 /* initializing, released, or preparing for suspend */
112 raw_local_irq_save(irqflags);
113 OIER &= ~OIER_E0;
114 raw_local_irq_restore(irqflags);
115 break;
116 }
117}
118
119static struct clock_event_device ckevt_pxa_osmr0 = {
120 .name = "osmr0",
121 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
122 .shift = 32,
123 .rating = 200,
124 .cpumask = CPU_MASK_CPU0,
125 .set_next_event = pxa_osmr0_set_next_event,
126 .set_mode = pxa_osmr0_set_mode,
97}; 127};
98 128
99static cycle_t pxa_get_cycles(void) 129static cycle_t pxa_read_oscr(void)
100{ 130{
101 return OSCR; 131 return OSCR;
102} 132}
103 133
104static struct clocksource clocksource_pxa = { 134static struct clocksource cksrc_pxa_oscr0 = {
105 .name = "pxa_timer", 135 .name = "oscr0",
106 .rating = 200, 136 .rating = 200,
107 .read = pxa_get_cycles, 137 .read = pxa_read_oscr,
108 .mask = CLOCKSOURCE_MASK(32), 138 .mask = CLOCKSOURCE_MASK(32),
109 .shift = 20, 139 .shift = 20,
110 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 140 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
111}; 141};
112 142
143static struct irqaction pxa_ost0_irq = {
144 .name = "ost0",
145 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
146 .handler = pxa_ost0_interrupt,
147 .dev_id = &ckevt_pxa_osmr0,
148};
149
113static void __init pxa_timer_init(void) 150static void __init pxa_timer_init(void)
114{ 151{
115 struct timespec tv; 152 OIER = 0;
116 unsigned long flags; 153 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
117 154
118 set_rtc = pxa_set_rtc; 155 ckevt_pxa_osmr0.mult =
156 div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
157 ckevt_pxa_osmr0.max_delta_ns =
158 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
159 ckevt_pxa_osmr0.min_delta_ns =
160 clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1;
119 161
120 OIER = 0; /* disable any timer interrupts */ 162 cksrc_pxa_oscr0.mult =
121 OSSR = 0xf; /* clear status on all timers */ 163 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_pxa_oscr0.shift);
122 setup_irq(IRQ_OST0, &pxa_timer_irq);
123 local_irq_save(flags);
124 OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
125 OSMR0 = OSCR + LATCH; /* set initial match */
126 local_irq_restore(flags);
127
128 /*
129 * OSCR runs continuously on PXA and is not written to,
130 * so we can use it as clock source directly.
131 */
132 clocksource_pxa.mult =
133 clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
134 clocksource_register(&clocksource_pxa);
135}
136
137#ifdef CONFIG_NO_IDLE_HZ
138static int pxa_dyn_tick_enable_disable(void)
139{
140 /* nothing to do */
141 return 0;
142}
143 164
144static void pxa_dyn_tick_reprogram(unsigned long ticks) 165 setup_irq(IRQ_OST0, &pxa_ost0_irq);
145{
146 if (ticks > 1) {
147 initial_match = OSMR0;
148 OSMR0 = initial_match + ticks * LATCH;
149 match_posponed = 1;
150 }
151}
152 166
153static irqreturn_t 167 clocksource_register(&cksrc_pxa_oscr0);
154pxa_dyn_tick_handler(int irq, void *dev_id) 168 clockevents_register_device(&ckevt_pxa_osmr0);
155{
156 if (match_posponed) {
157 match_posponed = 0;
158 OSMR0 = initial_match;
159 if ( (signed long)(initial_match - OSCR) <= 8 )
160 return pxa_timer_interrupt(irq, dev_id);
161 }
162 return IRQ_NONE;
163} 169}
164 170
165static struct dyn_tick_timer pxa_dyn_tick = {
166 .enable = pxa_dyn_tick_enable_disable,
167 .disable = pxa_dyn_tick_enable_disable,
168 .reprogram = pxa_dyn_tick_reprogram,
169 .handler = pxa_dyn_tick_handler,
170};
171#endif
172
173#ifdef CONFIG_PM 171#ifdef CONFIG_PM
174static unsigned long osmr[4], oier; 172static unsigned long osmr[4], oier;
175 173
@@ -191,7 +189,10 @@ static void pxa_timer_resume(void)
191 OIER = oier; 189 OIER = oier;
192 190
193 /* 191 /*
194 * OSMR0 is the system timer: make sure OSCR is sufficiently behind 192 * OSCR0 is the system timer, which has to increase
193 * monotonically until it rolls over in hardware. The value
194 * (OSMR0 - LATCH) is OSCR0 at the most recent system tick,
195 * which is a handy value to restore to OSCR0.
195 */ 196 */
196 OSCR = OSMR0 - LATCH; 197 OSCR = OSMR0 - LATCH;
197} 198}
@@ -204,7 +205,4 @@ struct sys_timer pxa_timer = {
204 .init = pxa_timer_init, 205 .init = pxa_timer_init,
205 .suspend = pxa_timer_suspend, 206 .suspend = pxa_timer_suspend,
206 .resume = pxa_timer_resume, 207 .resume = pxa_timer_resume,
207#ifdef CONFIG_NO_IDLE_HZ
208 .dyn_tick = &pxa_dyn_tick,
209#endif
210}; 208};
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 570cf937e73b..a454451c97c3 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -87,7 +87,7 @@ static void __init rpc_map_io(void)
87 /* 87 /*
88 * Turn off floppy. 88 * Turn off floppy.
89 */ 89 */
90 outb(0xc, 0x3f2); 90 writeb(0xc, PCIO_BASE + (0x3f2 << 2));
91 91
92 /* 92 /*
93 * RiscPC can't handle half-word loads and stores 93 * RiscPC can't handle half-word loads and stores
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index d4b013b283c3..e2079cf9266f 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -9,6 +9,7 @@ config CPU_S3C2410
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select S3C2410_CLOCK 10 select S3C2410_CLOCK
11 select S3C2410_GPIO 11 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410
12 select S3C2410_PM if PM 13 select S3C2410_PM if PM
13 help 14 help
14 Support for S3C2410 and S3C2410A family from the S3C24XX line 15 Support for S3C2410 and S3C2410A family from the S3C24XX line
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 5b4831c4c1d8..cab9d6265e9e 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -37,7 +37,7 @@
37#include <asm/hardware.h> 37#include <asm/hardware.h>
38#include <asm/io.h> 38#include <asm/io.h>
39 39
40#include <asm/arch/regs-serial.h> 40#include <asm/plat-s3c/regs-serial.h>
41#include <asm/arch/regs-clock.h> 41#include <asm/arch/regs-clock.h>
42#include <asm/arch/regs-gpio.h> 42#include <asm/arch/regs-gpio.h>
43 43
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 67d1ad363973..80d83739ab9f 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -23,14 +23,14 @@
23#include <asm/plat-s3c24xx/cpu.h> 23#include <asm/plat-s3c24xx/cpu.h>
24#include <asm/plat-s3c24xx/dma.h> 24#include <asm/plat-s3c24xx/dma.h>
25 25
26#include <asm/arch/regs-serial.h> 26#include <asm/plat-s3c/regs-serial.h>
27#include <asm/arch/regs-gpio.h> 27#include <asm/arch/regs-gpio.h>
28#include <asm/arch/regs-ac97.h> 28#include <asm/plat-s3c/regs-ac97.h>
29#include <asm/arch/regs-mem.h> 29#include <asm/arch/regs-mem.h>
30#include <asm/arch/regs-lcd.h> 30#include <asm/arch/regs-lcd.h>
31#include <asm/arch/regs-sdi.h> 31#include <asm/arch/regs-sdi.h>
32#include <asm/arch/regs-iis.h> 32#include <asm/plat-s3c24xx/regs-iis.h>
33#include <asm/arch/regs-spi.h> 33#include <asm/plat-s3c24xx/regs-spi.h>
34 34
35static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { 35static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
36 [DMACH_XD0] = { 36 [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 435adcce6482..43bb5e106302 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -48,7 +48,7 @@
48#include <asm/mach-types.h> 48#include <asm/mach-types.h>
49#include <asm/arch/fb.h> 49#include <asm/arch/fb.h>
50 50
51#include <asm/arch/regs-serial.h> 51#include <asm/plat-s3c/regs-serial.h>
52#include <asm/arch/regs-lcd.h> 52#include <asm/arch/regs-lcd.h>
53#include <asm/arch/regs-gpio.h> 53#include <asm/arch/regs-gpio.h>
54 54
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 8b52ea95d4f6..bc926992b4e4 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -36,13 +36,13 @@
36#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37 37
38//#include <asm/debug-ll.h> 38//#include <asm/debug-ll.h>
39#include <asm/arch/regs-serial.h> 39#include <asm/plat-s3c/regs-serial.h>
40#include <asm/arch/regs-gpio.h> 40#include <asm/arch/regs-gpio.h>
41#include <asm/arch/regs-mem.h> 41#include <asm/arch/regs-mem.h>
42#include <asm/arch/regs-lcd.h> 42#include <asm/arch/regs-lcd.h>
43 43
44#include <asm/arch/nand.h> 44#include <asm/plat-s3c/nand.h>
45#include <asm/arch/iic.h> 45#include <asm/plat-s3c/iic.h>
46#include <asm/arch/fb.h> 46#include <asm/arch/fb.h>
47 47
48#include <linux/mtd/mtd.h> 48#include <linux/mtd/mtd.h>
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 5c9bcea74767..9a172b4ad720 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -30,7 +30,7 @@
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32 32
33#include <asm/arch/regs-serial.h> 33#include <asm/plat-s3c/regs-serial.h>
34#include <asm/arch/regs-lcd.h> 34#include <asm/arch/regs-lcd.h>
35#include <asm/arch/regs-gpio.h> 35#include <asm/arch/regs-gpio.h>
36#include <asm/arch/regs-clock.h> 36#include <asm/arch/regs-clock.h>
@@ -38,7 +38,7 @@
38#include <asm/arch/h1940.h> 38#include <asm/arch/h1940.h>
39#include <asm/arch/h1940-latch.h> 39#include <asm/arch/h1940-latch.h>
40#include <asm/arch/fb.h> 40#include <asm/arch/fb.h>
41#include <asm/arch/udc.h> 41#include <asm/plat-s3c24xx/udc.h>
42 42
43#include <asm/plat-s3c24xx/clock.h> 43#include <asm/plat-s3c24xx/clock.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <asm/plat-s3c24xx/devs.h>
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 412e50c3d28a..621f548da610 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -33,9 +33,9 @@
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35 35
36#include <asm/arch/regs-serial.h> 36#include <asm/plat-s3c/regs-serial.h>
37#include <asm/arch/regs-gpio.h> 37#include <asm/arch/regs-gpio.h>
38#include <asm/arch/iic.h> 38#include <asm/plat-s3c/iic.h>
39 39
40#include <asm/plat-s3c24xx/s3c2410.h> 40#include <asm/plat-s3c24xx/s3c2410.h>
41#include <asm/plat-s3c24xx/clock.h> 41#include <asm/plat-s3c24xx/clock.h>
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index 1f899fa588df..717af40e4477 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -29,7 +29,7 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31 31
32#include <asm/arch/regs-serial.h> 32#include <asm/plat-s3c/regs-serial.h>
33#include <asm/arch/regs-gpio.h> 33#include <asm/arch/regs-gpio.h>
34 34
35#include <asm/plat-s3c24xx/s3c2410.h> 35#include <asm/plat-s3c24xx/s3c2410.h>
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index d86e6f18bac9..e670b1e1631b 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -49,10 +49,10 @@
49 49
50#include <asm/arch/regs-gpio.h> 50#include <asm/arch/regs-gpio.h>
51#include <asm/arch/leds-gpio.h> 51#include <asm/arch/leds-gpio.h>
52#include <asm/arch/regs-serial.h> 52#include <asm/plat-s3c/regs-serial.h>
53#include <asm/arch/fb.h> 53#include <asm/arch/fb.h>
54#include <asm/arch/nand.h> 54#include <asm/plat-s3c/nand.h>
55#include <asm/arch/udc.h> 55#include <asm/plat-s3c24xx/udc.h>
56#include <asm/arch/spi.h> 56#include <asm/arch/spi.h>
57#include <asm/arch/spi-gpio.h> 57#include <asm/arch/spi-gpio.h>
58 58
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 5852d300d52f..226550504c85 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -47,7 +47,7 @@
47#include <asm/irq.h> 47#include <asm/irq.h>
48#include <asm/mach-types.h> 48#include <asm/mach-types.h>
49 49
50#include <asm/arch/regs-serial.h> 50#include <asm/plat-s3c/regs-serial.h>
51 51
52#include <asm/plat-s3c24xx/devs.h> 52#include <asm/plat-s3c24xx/devs.h>
53#include <asm/plat-s3c24xx/cpu.h> 53#include <asm/plat-s3c24xx/cpu.h>
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 7b624bb00490..9f43f3f124f5 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -39,7 +39,7 @@
39#include <asm/irq.h> 39#include <asm/irq.h>
40#include <asm/mach-types.h> 40#include <asm/mach-types.h>
41 41
42#include <asm/arch/regs-serial.h> 42#include <asm/plat-s3c/regs-serial.h>
43#include <asm/arch/regs-gpio.h> 43#include <asm/arch/regs-gpio.h>
44#include <asm/arch/leds-gpio.h> 44#include <asm/arch/leds-gpio.h>
45 45
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 1a86a9803753..e580303cb0ab 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -29,7 +29,7 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <asm/arch/regs-clock.h> 31#include <asm/arch/regs-clock.h>
32#include <asm/arch/regs-serial.h> 32#include <asm/plat-s3c/regs-serial.h>
33 33
34#include <asm/plat-s3c24xx/s3c2410.h> 34#include <asm/plat-s3c24xx/s3c2410.h>
35#include <asm/plat-s3c24xx/cpu.h> 35#include <asm/plat-s3c24xx/cpu.h>
@@ -40,7 +40,6 @@
40 40
41static struct map_desc s3c2410_iodesc[] __initdata = { 41static struct map_desc s3c2410_iodesc[] __initdata = {
42 IODESC_ENT(CLKPWR), 42 IODESC_ENT(CLKPWR),
43 IODESC_ENT(LCD),
44 IODESC_ENT(TIMER), 43 IODESC_ENT(TIMER),
45 IODESC_ENT(WATCHDOG), 44 IODESC_ENT(WATCHDOG),
46}; 45};
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index d1eeed2ad47c..8a9c5a2bb252 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -32,7 +32,7 @@
32#include <asm/arch/regs-gpio.h> 32#include <asm/arch/regs-gpio.h>
33#include <asm/arch/regs-clock.h> 33#include <asm/arch/regs-clock.h>
34#include <asm/arch/regs-mem.h> 34#include <asm/arch/regs-mem.h>
35#include <asm/arch/regs-serial.h> 35#include <asm/plat-s3c/regs-serial.h>
36 36
37 /* s3c2410_cpu_suspend 37 /* s3c2410_cpu_suspend
38 * 38 *
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index d5be5d053264..8e8fe48ea47f 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2412 7config CPU_S3C2412
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_LLSERIAL_S3C2440
10 select S3C2412_PM if PM 11 select S3C2412_PM if PM
11 select S3C2412_DMA if S3C2410_DMA 12 select S3C2412_DMA if S3C2410_DMA
12 help 13 help
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 6a8e4448770b..8543dd6df391 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -37,7 +37,7 @@
37#include <asm/hardware.h> 37#include <asm/hardware.h>
38#include <asm/io.h> 38#include <asm/io.h>
39 39
40#include <asm/arch/regs-serial.h> 40#include <asm/plat-s3c/regs-serial.h>
41#include <asm/arch/regs-clock.h> 41#include <asm/arch/regs-clock.h>
42#include <asm/arch/regs-gpio.h> 42#include <asm/arch/regs-gpio.h>
43 43
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 668cccefe7b0..4b9425c1bf72 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -24,14 +24,14 @@
24#include <asm/plat-s3c24xx/dma.h> 24#include <asm/plat-s3c24xx/dma.h>
25#include <asm/plat-s3c24xx/cpu.h> 25#include <asm/plat-s3c24xx/cpu.h>
26 26
27#include <asm/arch/regs-serial.h> 27#include <asm/plat-s3c/regs-serial.h>
28#include <asm/arch/regs-gpio.h> 28#include <asm/arch/regs-gpio.h>
29#include <asm/arch/regs-ac97.h> 29#include <asm/plat-s3c/regs-ac97.h>
30#include <asm/arch/regs-mem.h> 30#include <asm/arch/regs-mem.h>
31#include <asm/arch/regs-lcd.h> 31#include <asm/arch/regs-lcd.h>
32#include <asm/arch/regs-sdi.h> 32#include <asm/arch/regs-sdi.h>
33#include <asm/arch/regs-iis.h> 33#include <asm/plat-s3c24xx/regs-iis.h>
34#include <asm/arch/regs-spi.h> 34#include <asm/plat-s3c24xx/regs-spi.h>
35 35
36#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } 36#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
37 37
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 063af09f899d..b126a530daa6 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -32,12 +32,12 @@
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34//#include <asm/debug-ll.h> 34//#include <asm/debug-ll.h>
35#include <asm/arch/regs-serial.h> 35#include <asm/plat-s3c/regs-serial.h>
36#include <asm/arch/regs-gpio.h> 36#include <asm/arch/regs-gpio.h>
37#include <asm/arch/regs-lcd.h> 37#include <asm/arch/regs-lcd.h>
38 38
39#include <asm/arch/idle.h> 39#include <asm/arch/idle.h>
40#include <asm/arch/udc.h> 40#include <asm/plat-s3c24xx/udc.h>
41#include <asm/arch/fb.h> 41#include <asm/arch/fb.h>
42 42
43#include <asm/plat-s3c24xx/s3c2410.h> 43#include <asm/plat-s3c24xx/s3c2410.h>
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index f2fbd65956ac..32982547cd63 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -33,14 +33,14 @@
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35 35
36#include <asm/arch/regs-serial.h> 36#include <asm/plat-s3c/regs-serial.h>
37#include <asm/arch/regs-gpio.h> 37#include <asm/arch/regs-gpio.h>
38#include <asm/arch/regs-lcd.h> 38#include <asm/arch/regs-lcd.h>
39 39
40#include <asm/arch/idle.h> 40#include <asm/arch/idle.h>
41#include <asm/arch/fb.h> 41#include <asm/arch/fb.h>
42 42
43#include <asm/arch/nand.h> 43#include <asm/plat-s3c/nand.h>
44 44
45#include <asm/plat-s3c24xx/s3c2410.h> 45#include <asm/plat-s3c24xx/s3c2410.h>
46#include <asm/plat-s3c24xx/s3c2412.h> 46#include <asm/plat-s3c24xx/s3c2412.h>
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 782b5814ced2..e0ccb404623f 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -34,12 +34,12 @@
34#include <asm/arch/idle.h> 34#include <asm/arch/idle.h>
35 35
36#include <asm/arch/regs-clock.h> 36#include <asm/arch/regs-clock.h>
37#include <asm/arch/regs-serial.h> 37#include <asm/plat-s3c/regs-serial.h>
38#include <asm/arch/regs-power.h> 38#include <asm/arch/regs-power.h>
39#include <asm/arch/regs-gpio.h> 39#include <asm/arch/regs-gpio.h>
40#include <asm/arch/regs-gpioj.h> 40#include <asm/arch/regs-gpioj.h>
41#include <asm/arch/regs-dsc.h> 41#include <asm/arch/regs-dsc.h>
42#include <asm/arch/regs-spi.h> 42#include <asm/plat-s3c24xx/regs-spi.h>
43#include <asm/arch/regs-s3c2412.h> 43#include <asm/arch/regs-s3c2412.h>
44 44
45#include <asm/plat-s3c24xx/s3c2412.h> 45#include <asm/plat-s3c24xx/s3c2412.h>
@@ -63,7 +63,6 @@ static inline void s3c2412_init_gpio2(void)
63 63
64static struct map_desc s3c2412_iodesc[] __initdata = { 64static struct map_desc s3c2412_iodesc[] __initdata = {
65 IODESC_ENT(CLKPWR), 65 IODESC_ENT(CLKPWR),
66 IODESC_ENT(LCD),
67 IODESC_ENT(TIMER), 66 IODESC_ENT(TIMER),
68 IODESC_ENT(WATCHDOG), 67 IODESC_ENT(WATCHDOG),
69}; 68};
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index e3bfda098c0f..f1915bd61d15 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -12,6 +12,7 @@ config CPU_S3C2440
12 select S3C2410_GPIO 12 select S3C2410_GPIO
13 select S3C2440_DMA if S3C2410_DMA 13 select S3C2440_DMA if S3C2410_DMA
14 select CPU_S3C244X 14 select CPU_S3C244X
15 select CPU_LLSERIAL_S3C2440
15 help 16 help
16 Support for S3C2440 Samsung Mobile CPU based systems. 17 Support for S3C2440 Samsung Mobile CPU based systems.
17 18
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index cd035a3ec878..f509f062e749 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -23,14 +23,14 @@
23#include <asm/plat-s3c24xx/dma.h> 23#include <asm/plat-s3c24xx/dma.h>
24#include <asm/plat-s3c24xx/cpu.h> 24#include <asm/plat-s3c24xx/cpu.h>
25 25
26#include <asm/arch/regs-serial.h> 26#include <asm/plat-s3c/regs-serial.h>
27#include <asm/arch/regs-gpio.h> 27#include <asm/arch/regs-gpio.h>
28#include <asm/arch/regs-ac97.h> 28#include <asm/plat-s3c/regs-ac97.h>
29#include <asm/arch/regs-mem.h> 29#include <asm/arch/regs-mem.h>
30#include <asm/arch/regs-lcd.h> 30#include <asm/arch/regs-lcd.h>
31#include <asm/arch/regs-sdi.h> 31#include <asm/arch/regs-sdi.h>
32#include <asm/arch/regs-iis.h> 32#include <asm/plat-s3c24xx/regs-iis.h>
33#include <asm/arch/regs-spi.h> 33#include <asm/plat-s3c24xx/regs-spi.h>
34 34
35static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { 35static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
36 [DMACH_XD0] = { 36 [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 29c163d300d4..3d3dfa95db8e 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -34,11 +34,11 @@
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/mach-types.h> 35#include <asm/mach-types.h>
36 36
37#include <asm/arch/regs-serial.h> 37#include <asm/plat-s3c/regs-serial.h>
38#include <asm/arch/regs-gpio.h> 38#include <asm/arch/regs-gpio.h>
39#include <asm/arch/regs-mem.h> 39#include <asm/arch/regs-mem.h>
40#include <asm/arch/regs-lcd.h> 40#include <asm/arch/regs-lcd.h>
41#include <asm/arch/nand.h> 41#include <asm/plat-s3c/nand.h>
42 42
43#include <linux/mtd/mtd.h> 43#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h> 44#include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 5e61f2166c76..afe0d7b7e389 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -36,7 +36,7 @@
36 36
37//#include <asm/debug-ll.h> 37//#include <asm/debug-ll.h>
38#include <asm/arch/regs-gpio.h> 38#include <asm/arch/regs-gpio.h>
39#include <asm/arch/regs-serial.h> 39#include <asm/plat-s3c/regs-serial.h>
40 40
41#include <asm/plat-s3c24xx/s3c2410.h> 41#include <asm/plat-s3c24xx/s3c2410.h>
42#include <asm/plat-s3c24xx/s3c2440.h> 42#include <asm/plat-s3c24xx/s3c2440.h>
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 89f4c9c5777b..0ba7e9060c7b 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -31,11 +31,11 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34#include <asm/arch/regs-serial.h> 34#include <asm/plat-s3c/regs-serial.h>
35#include <asm/arch/regs-gpio.h> 35#include <asm/arch/regs-gpio.h>
36#include <asm/arch/regs-mem.h> 36#include <asm/arch/regs-mem.h>
37#include <asm/arch/regs-lcd.h> 37#include <asm/arch/regs-lcd.h>
38#include <asm/arch/nand.h> 38#include <asm/plat-s3c/nand.h>
39 39
40#include <linux/mtd/mtd.h> 40#include <linux/mtd/mtd.h>
41#include <linux/mtd/nand.h> 41#include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 866ff71c01dd..b59e6d39f2f2 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -38,12 +38,12 @@
38#include <asm/irq.h> 38#include <asm/irq.h>
39#include <asm/mach-types.h> 39#include <asm/mach-types.h>
40 40
41#include <asm/arch/regs-serial.h> 41#include <asm/plat-s3c/regs-serial.h>
42#include <asm/arch/regs-gpio.h> 42#include <asm/arch/regs-gpio.h>
43#include <asm/arch/regs-lcd.h> 43#include <asm/arch/regs-lcd.h>
44 44
45#include <asm/arch/h1940.h> 45#include <asm/arch/h1940.h>
46#include <asm/arch/nand.h> 46#include <asm/plat-s3c/nand.h>
47#include <asm/arch/fb.h> 47#include <asm/arch/fb.h>
48 48
49#include <asm/plat-s3c24xx/clock.h> 49#include <asm/plat-s3c24xx/clock.h>
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index e167254e232e..670115b8a12e 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -31,7 +31,7 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34#include <asm/arch/regs-serial.h> 34#include <asm/plat-s3c/regs-serial.h>
35#include <asm/arch/regs-gpio.h> 35#include <asm/arch/regs-gpio.h>
36#include <asm/arch/regs-lcd.h> 36#include <asm/arch/regs-lcd.h>
37 37
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index bf8d87abfab3..88d5fd34fe3b 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -11,6 +11,7 @@ config CPU_S3C2442
11 select S3C2410_GPIO 11 select S3C2410_GPIO
12 select S3C2410_PM if PM 12 select S3C2410_PM if PM
13 select CPU_S3C244X 13 select CPU_S3C244X
14 select CPU_LLSERIAL_S3C2440
14 help 15 help
15 Support for S3C2442 Samsung Mobile CPU based systems. 16 Support for S3C2442 Samsung Mobile CPU based systems.
16 17
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index c649bb2e7ce8..14252f573754 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -8,6 +8,7 @@ config CPU_S3C2443
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select S3C2443_DMA if S3C2410_DMA 10 select S3C2443_DMA if S3C2410_DMA
11 select CPU_LLSERIAL_S3C2440
11 help 12 help
12 Support for the S3C2443 SoC from the S3C24XX line 13 Support for the S3C2443 SoC from the S3C24XX line
13 14
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index f70e8ccffc3d..fc3ede82af8f 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -24,14 +24,14 @@
24#include <asm/plat-s3c24xx/dma.h> 24#include <asm/plat-s3c24xx/dma.h>
25#include <asm/plat-s3c24xx/cpu.h> 25#include <asm/plat-s3c24xx/cpu.h>
26 26
27#include <asm/arch/regs-serial.h> 27#include <asm/plat-s3c/regs-serial.h>
28#include <asm/arch/regs-gpio.h> 28#include <asm/arch/regs-gpio.h>
29#include <asm/arch/regs-ac97.h> 29#include <asm/plat-s3c/regs-ac97.h>
30#include <asm/arch/regs-mem.h> 30#include <asm/arch/regs-mem.h>
31#include <asm/arch/regs-lcd.h> 31#include <asm/arch/regs-lcd.h>
32#include <asm/arch/regs-sdi.h> 32#include <asm/arch/regs-sdi.h>
33#include <asm/arch/regs-iis.h> 33#include <asm/plat-s3c24xx/regs-iis.h>
34#include <asm/arch/regs-spi.h> 34#include <asm/plat-s3c24xx/regs-spi.h>
35 35
36#define MAP(x) { \ 36#define MAP(x) { \
37 [0] = (x) | DMA_CH_VALID, \ 37 [0] = (x) | DMA_CH_VALID, \
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index b1eb709ee65a..8cd93130ef36 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -31,7 +31,7 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34#include <asm/arch/regs-serial.h> 34#include <asm/plat-s3c/regs-serial.h>
35#include <asm/arch/regs-gpio.h> 35#include <asm/arch/regs-gpio.h>
36#include <asm/arch/regs-lcd.h> 36#include <asm/arch/regs-lcd.h>
37 37
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index cd67ab1b217b..f99d9013905f 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -101,6 +101,16 @@ config SA1100_JORNADA720
101 handheld computer. See <http://www.hp.com/jornada/products/720> 101 handheld computer. See <http://www.hp.com/jornada/products/720>
102 for details. 102 for details.
103 103
104config SA1100_JORNADA720_SSP
105 bool "HP Jornada 720 Extended SSP driver"
106 select SA1100_SSP
107 depends on SA1100_JORNADA720
108 help
109 Say Y here if you have a HP Jornada 7xx handheld computer and you
110 want to access devices connected to the MCU. Those include the
111 keyboard, touchscreen, backlight and battery. This driver also activates
112 the generic SSP which it extends.
113
104config SA1100_HACKKIT 114config SA1100_HACKKIT
105 bool "HackKit Core CPU Board" 115 bool "HackKit Core CPU Board"
106 help 116 help
@@ -145,8 +155,7 @@ config SA1100_SSP
145 help 155 help
146 Say Y here to enable support for the generic PIO SSP driver. 156 Say Y here to enable support for the generic PIO SSP driver.
147 This isn't for audio support, but for attached sensors and 157 This isn't for audio support, but for attached sensors and
148 other devices, eg for BadgePAD 4 sensor support, or Jornada 158 other devices, eg for BadgePAD 4 sensor support.
149 720 touchscreen support.
150 159
151config H3600_SLEEVE 160config H3600_SLEEVE
152 tristate "Compaq iPAQ Handheld sleeve support" 161 tristate "Compaq iPAQ Handheld sleeve support"
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index e27f15042a22..7a61e8d33ab7 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o
31led-$(CONFIG_SA1100_HACKKIT) += leds-hackkit.o 31led-$(CONFIG_SA1100_HACKKIT) += leds-hackkit.o
32 32
33obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o 33obj-$(CONFIG_SA1100_JORNADA720) += jornada720.o
34obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o
34 35
35obj-$(CONFIG_SA1100_LART) += lart.o 36obj-$(CONFIG_SA1100_LART) += lart.o
36led-$(CONFIG_SA1100_LART) += leds-lart.o 37led-$(CONFIG_SA1100_LART) += leds-lart.o
@@ -51,3 +52,4 @@ obj-$(CONFIG_LEDS) += $(led-y)
51# Miscelaneous functions 52# Miscelaneous functions
52obj-$(CONFIG_PM) += pm.o sleep.o 53obj-$(CONFIG_PM) += pm.o sleep.o
53obj-$(CONFIG_SA1100_SSP) += ssp.o 54obj-$(CONFIG_SA1100_SSP) += ssp.o
55
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
new file mode 100644
index 000000000000..0a45e1ac8ad6
--- /dev/null
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -0,0 +1,201 @@
1/**
2 * arch/arm/mac-sa1100/jornada720_ssp.c
3 *
4 * Copyright (C) 2006/2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
5 * Copyright (C) 2006 Filip Zyzniewski <filip.zyzniewski@tefnet.pl>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * SSP driver for the HP Jornada 710/720/728
12 */
13
14#include <linux/delay.h>
15#include <linux/errno.h>
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/sched.h>
21#include <linux/slab.h>
22
23#include <asm/hardware.h>
24#include <asm/hardware/ssp.h>
25#include <asm/arch/jornada720.h>
26
27static DEFINE_SPINLOCK(jornada_ssp_lock);
28static unsigned long jornada_ssp_flags;
29
30/**
31 * jornada_ssp_reverse - reverses input byte
32 *
33 * we need to reverse all data we recieve from the mcu due to its physical location
34 * returns : 01110111 -> 11101110
35 */
36u8 inline jornada_ssp_reverse(u8 byte)
37{
38 return
39 ((0x80 & byte) >> 7) |
40 ((0x40 & byte) >> 5) |
41 ((0x20 & byte) >> 3) |
42 ((0x10 & byte) >> 1) |
43 ((0x08 & byte) << 1) |
44 ((0x04 & byte) << 3) |
45 ((0x02 & byte) << 5) |
46 ((0x01 & byte) << 7);
47};
48EXPORT_SYMBOL(jornada_ssp_reverse);
49
50/**
51 * jornada_ssp_byte - waits for ready ssp bus and sends byte
52 *
53 * waits for fifo buffer to clear and then transmits, if it doesn't then we will
54 * timeout after <timeout> rounds. Needs mcu running before its called.
55 *
56 * returns : %mcu output on success
57 * : %-ETIMEOUT on timeout
58 */
59int jornada_ssp_byte(u8 byte)
60{
61 int timeout = 400000;
62 u16 ret;
63
64 while ((GPLR & GPIO_GPIO10)) {
65 if (!--timeout) {
66 printk(KERN_WARNING "SSP: timeout while waiting for transmit\n");
67 return -ETIMEDOUT;
68 }
69 cpu_relax();
70 }
71
72 ret = jornada_ssp_reverse(byte) << 8;
73
74 ssp_write_word(ret);
75 ssp_read_word(&ret);
76
77 return jornada_ssp_reverse(ret);
78};
79EXPORT_SYMBOL(jornada_ssp_byte);
80
81/**
82 * jornada_ssp_inout - decide if input is command or trading byte
83 *
84 * returns : (jornada_ssp_byte(byte)) on success
85 * : %-ETIMEOUT on timeout failure
86 */
87int jornada_ssp_inout(u8 byte)
88{
89 int ret, i;
90
91 /* true means command byte */
92 if (byte != TXDUMMY) {
93 ret = jornada_ssp_byte(byte);
94 /* Proper return to commands is TxDummy */
95 if (ret != TXDUMMY) {
96 for (i = 0; i < 256; i++)/* flushing bus */
97 if (jornada_ssp_byte(TXDUMMY) == -1)
98 break;
99 return -ETIMEDOUT;
100 }
101 } else /* Exchange TxDummy for data */
102 ret = jornada_ssp_byte(TXDUMMY);
103
104 return ret;
105};
106EXPORT_SYMBOL(jornada_ssp_inout);
107
108/**
109 * jornada_ssp_start - enable mcu
110 *
111 */
112int jornada_ssp_start()
113{
114 spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags);
115 GPCR = GPIO_GPIO25;
116 udelay(50);
117 return 0;
118};
119EXPORT_SYMBOL(jornada_ssp_start);
120
121/**
122 * jornada_ssp_end - disable mcu and turn off lock
123 *
124 */
125int jornada_ssp_end()
126{
127 GPSR = GPIO_GPIO25;
128 spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags);
129 return 0;
130};
131EXPORT_SYMBOL(jornada_ssp_end);
132
133static int __init jornada_ssp_probe(struct platform_device *dev)
134{
135 int ret;
136
137 GPSR = GPIO_GPIO25;
138
139 ret = ssp_init();
140
141 /* worked fine, lets not bother with anything else */
142 if (!ret) {
143 printk(KERN_INFO "SSP: device initialized with irq\n");
144 return ret;
145 }
146
147 printk(KERN_WARNING "SSP: initialization failed, trying non-irq solution \n");
148
149 /* init of Serial 4 port */
150 Ser4MCCR0 = 0;
151 Ser4SSCR0 = 0x0387;
152 Ser4SSCR1 = 0x18;
153
154 /* clear out any left over data */
155 ssp_flush();
156
157 /* enable MCU */
158 jornada_ssp_start();
159
160 /* see if return value makes sense */
161 ret = jornada_ssp_inout(GETBRIGHTNESS);
162
163 /* seems like it worked, just feed it with TxDummy to get rid of data */
164 if (ret == TxDummy)
165 jornada_ssp_inout(TXDUMMY);
166
167 jornada_ssp_end();
168
169 /* failed, lets just kill everything */
170 if (ret == -ETIMEDOUT) {
171 printk(KERN_WARNING "SSP: attempts failed, bailing\n");
172 ssp_exit();
173 return -ENODEV;
174 }
175
176 /* all fine */
177 printk(KERN_INFO "SSP: device initialized\n");
178 return 0;
179};
180
181static int jornada_ssp_remove(struct platform_device *dev)
182{
183 /* Note that this doesnt actually remove the driver, since theres nothing to remove
184 * It just makes sure everything is turned off */
185 GPSR = GPIO_GPIO25;
186 ssp_exit();
187 return 0;
188};
189
190struct platform_driver jornadassp_driver = {
191 .probe = jornada_ssp_probe,
192 .remove = jornada_ssp_remove,
193 .driver = {
194 .name = "jornada_ssp",
195 },
196};
197
198static int __init jornada_ssp_init(void)
199{
200 return platform_driver_register(&jornadassp_driver);
201}
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 3a0a1ee2542d..9f1ed1509301 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -292,6 +292,8 @@ static struct platform_device *devices[] __initdata = {
292 &smc91x_device, 292 &smc91x_device,
293}; 293};
294 294
295extern void sa1110_mb_disable(void);
296
295static int __init neponset_init(void) 297static int __init neponset_init(void)
296{ 298{
297 platform_driver_register(&neponset_device_driver); 299 platform_driver_register(&neponset_device_driver);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e7904bc92c73..12161ae445da 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -345,13 +345,14 @@ config CPU_XSC3
345# ARMv6 345# ARMv6
346config CPU_V6 346config CPU_V6
347 bool "Support ARM V6 processor" 347 bool "Support ARM V6 processor"
348 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 348 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3
349 default y if ARCH_MX3
349 select CPU_32v6 350 select CPU_32v6
350 select CPU_ABRT_EV6 351 select CPU_ABRT_EV6
351 select CPU_CACHE_V6 352 select CPU_CACHE_V6
352 select CPU_CACHE_VIPT 353 select CPU_CACHE_VIPT
353 select CPU_CP15_MMU 354 select CPU_CP15_MMU
354 select CPU_HAS_ASID 355 select CPU_HAS_ASID if MMU
355 select CPU_COPY_V6 if MMU 356 select CPU_COPY_V6 if MMU
356 select CPU_TLB_V6 if MMU 357 select CPU_TLB_V6 if MMU
357 358
@@ -359,7 +360,7 @@ config CPU_V6
359config CPU_32v6K 360config CPU_32v6K
360 bool "Support ARM V6K processor extensions" if !SMP 361 bool "Support ARM V6K processor extensions" if !SMP
361 depends on CPU_V6 362 depends on CPU_V6
362 default y if SMP 363 default y if SMP && !ARCH_MX3
363 help 364 help
364 Say Y here if your ARMv6 processor supports the 'K' extension. 365 Say Y here if your ARMv6 processor supports the 'K' extension.
365 This enables the kernel to use some instructions not present 366 This enables the kernel to use some instructions not present
@@ -377,7 +378,7 @@ config CPU_V7
377 select CPU_CACHE_V7 378 select CPU_CACHE_V7
378 select CPU_CACHE_VIPT 379 select CPU_CACHE_VIPT
379 select CPU_CP15_MMU 380 select CPU_CP15_MMU
380 select CPU_HAS_ASID 381 select CPU_HAS_ASID if MMU
381 select CPU_COPY_V6 if MMU 382 select CPU_COPY_V6 if MMU
382 select CPU_TLB_V7 if MMU 383 select CPU_TLB_V7 if MMU
383 384
@@ -405,6 +406,7 @@ config CPU_32v5
405 406
406config CPU_32v6 407config CPU_32v6
407 bool 408 bool
409 select TLS_REG_EMUL if !CPU_32v6K && !MMU
408 410
409config CPU_32v7 411config CPU_32v7
410 bool 412 bool
@@ -598,7 +600,7 @@ config CPU_DCACHE_SIZE
598 600
599config CPU_DCACHE_WRITETHROUGH 601config CPU_DCACHE_WRITETHROUGH
600 bool "Force write through D-cache" 602 bool "Force write through D-cache"
601 depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE 603 depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020) && !CPU_DCACHE_DISABLE
602 default y if CPU_ARM925T 604 default y if CPU_ARM925T
603 help 605 help
604 Say Y here to use the data cache in writethrough mode. Unless you 606 Say Y here to use the data cache in writethrough mode. Unless you
@@ -611,12 +613,6 @@ config CPU_CACHE_ROUND_ROBIN
611 Say Y here to use the predictable round-robin cache replacement 613 Say Y here to use the predictable round-robin cache replacement
612 policy. Unless you specifically require this or are unsure, say N. 614 policy. Unless you specifically require this or are unsure, say N.
613 615
614config CPU_L2CACHE_DISABLE
615 bool "Disable level 2 cache"
616 depends on CPU_V7
617 help
618 Say Y here to disable the level 2 cache. If unsure, say N.
619
620config CPU_BPREDICT_DISABLE 616config CPU_BPREDICT_DISABLE
621 bool "Disable branch prediction" 617 bool "Disable branch prediction"
622 depends on CPU_ARM1020 || CPU_V6 || CPU_XSC3 || CPU_V7 618 depends on CPU_ARM1020 || CPU_V6 || CPU_XSC3 || CPU_V7
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 08a36f1b35d2..b4e9b734e0bd 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -17,6 +17,7 @@
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/spinlock.h>
20 21
21#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
22#include <asm/io.h> 23#include <asm/io.h>
@@ -25,14 +26,19 @@
25#define CACHE_LINE_SIZE 32 26#define CACHE_LINE_SIZE 32
26 27
27static void __iomem *l2x0_base; 28static void __iomem *l2x0_base;
29static DEFINE_SPINLOCK(l2x0_lock);
28 30
29static inline void sync_writel(unsigned long val, unsigned long reg, 31static inline void sync_writel(unsigned long val, unsigned long reg,
30 unsigned long complete_mask) 32 unsigned long complete_mask)
31{ 33{
34 unsigned long flags;
35
36 spin_lock_irqsave(&l2x0_lock, flags);
32 writel(val, l2x0_base + reg); 37 writel(val, l2x0_base + reg);
33 /* wait for the operation to complete */ 38 /* wait for the operation to complete */
34 while (readl(l2x0_base + reg) & complete_mask) 39 while (readl(l2x0_base + reg) & complete_mask)
35 ; 40 ;
41 spin_unlock_irqrestore(&l2x0_lock, flags);
36} 42}
37 43
38static inline void cache_sync(void) 44static inline void cache_sync(void)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 3b5e47dc0c97..e5d61ee3d4a1 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -114,6 +114,10 @@ static void __init early_cachepolicy(char **p)
114 } 114 }
115 if (i == ARRAY_SIZE(cache_policies)) 115 if (i == ARRAY_SIZE(cache_policies))
116 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); 116 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n");
117 if (cpu_architecture() >= CPU_ARCH_ARMv6) {
118 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n");
119 cachepolicy = CPOLICY_WRITEBACK;
120 }
117 flush_cache_all(); 121 flush_cache_all();
118 set_cr(cr_alignment); 122 set_cr(cr_alignment);
119} 123}
@@ -252,13 +256,15 @@ static void __init build_mem_type_table(void)
252 int cpu_arch = cpu_architecture(); 256 int cpu_arch = cpu_architecture();
253 int i; 257 int i;
254 258
259 if (cpu_arch < CPU_ARCH_ARMv6) {
255#if defined(CONFIG_CPU_DCACHE_DISABLE) 260#if defined(CONFIG_CPU_DCACHE_DISABLE)
256 if (cachepolicy > CPOLICY_BUFFERED) 261 if (cachepolicy > CPOLICY_BUFFERED)
257 cachepolicy = CPOLICY_BUFFERED; 262 cachepolicy = CPOLICY_BUFFERED;
258#elif defined(CONFIG_CPU_DCACHE_WRITETHROUGH) 263#elif defined(CONFIG_CPU_DCACHE_WRITETHROUGH)
259 if (cachepolicy > CPOLICY_WRITETHROUGH) 264 if (cachepolicy > CPOLICY_WRITETHROUGH)
260 cachepolicy = CPOLICY_WRITETHROUGH; 265 cachepolicy = CPOLICY_WRITETHROUGH;
261#endif 266#endif
267 }
262 if (cpu_arch < CPU_ARCH_ARMv5) { 268 if (cpu_arch < CPU_ARCH_ARMv5) {
263 if (cachepolicy >= CPOLICY_WRITEALLOC) 269 if (cachepolicy >= CPOLICY_WRITEALLOC)
264 cachepolicy = CPOLICY_WRITEBACK; 270 cachepolicy = CPOLICY_WRITEBACK;
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 9f396b4fa0b7..2b5ba396e3a6 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -31,12 +31,14 @@ EXPORT_SYMBOL(__cpuc_coherent_kern_range);
31EXPORT_SYMBOL(cpu_cache); 31EXPORT_SYMBOL(cpu_cache);
32#endif 32#endif
33 33
34#ifdef CONFIG_MMU
34#ifndef MULTI_USER 35#ifndef MULTI_USER
35EXPORT_SYMBOL(__cpu_clear_user_page); 36EXPORT_SYMBOL(__cpu_clear_user_page);
36EXPORT_SYMBOL(__cpu_copy_user_page); 37EXPORT_SYMBOL(__cpu_copy_user_page);
37#else 38#else
38EXPORT_SYMBOL(cpu_user); 39EXPORT_SYMBOL(cpu_user);
39#endif 40#endif
41#endif
40 42
41/* 43/*
42 * No module should need to touch the TLB (and currently 44 * No module should need to touch the TLB (and currently
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 718f4782ee8b..e0acc5ae6f6f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -77,6 +77,7 @@ ENTRY(cpu_v7_dcache_clean_area)
77 * - we are not using split page tables 77 * - we are not using split page tables
78 */ 78 */
79ENTRY(cpu_v7_switch_mm) 79ENTRY(cpu_v7_switch_mm)
80#ifdef CONFIG_MMU
80 mov r2, #0 81 mov r2, #0
81 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id 82 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
82 orr r0, r0, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB 83 orr r0, r0, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB
@@ -86,6 +87,7 @@ ENTRY(cpu_v7_switch_mm)
86 isb 87 isb
87 mcr p15, 0, r1, c13, c0, 1 @ set context ID 88 mcr p15, 0, r1, c13, c0, 1 @ set context ID
88 isb 89 isb
90#endif
89 mov pc, lr 91 mov pc, lr
90 92
91/* 93/*
@@ -109,6 +111,7 @@ ENTRY(cpu_v7_switch_mm)
109 * 1111 0 1 1 r/w r/w 111 * 1111 0 1 1 r/w r/w
110 */ 112 */
111ENTRY(cpu_v7_set_pte_ext) 113ENTRY(cpu_v7_set_pte_ext)
114#ifdef CONFIG_MMU
112 str r1, [r0], #-2048 @ linux version 115 str r1, [r0], #-2048 @ linux version
113 116
114 bic r3, r1, #0x000003f0 117 bic r3, r1, #0x000003f0
@@ -136,6 +139,7 @@ ENTRY(cpu_v7_set_pte_ext)
136 139
137 str r3, [r0] 140 str r3, [r0]
138 mcr p15, 0, r0, c7, c10, 1 @ flush_pte 141 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
142#endif
139 mov pc, lr 143 mov pc, lr
140 144
141cpu_v7_name: 145cpu_v7_name:
@@ -169,6 +173,7 @@ __v7_setup:
169 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate 173 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
170#endif 174#endif
171 dsb 175 dsb
176#ifdef CONFIG_MMU
172 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs 177 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
173 mcr p15, 0, r10, c2, c0, 2 @ TTB control register 178 mcr p15, 0, r10, c2, c0, 2 @ TTB control register
174 orr r4, r4, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB 179 orr r4, r4, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB
@@ -176,21 +181,12 @@ __v7_setup:
176 mcr p15, 0, r4, c2, c0, 1 @ load TTB1 181 mcr p15, 0, r4, c2, c0, 1 @ load TTB1
177 mov r10, #0x1f @ domains 0, 1 = manager 182 mov r10, #0x1f @ domains 0, 1 = manager
178 mcr p15, 0, r10, c3, c0, 0 @ load domain access register 183 mcr p15, 0, r10, c3, c0, 0 @ load domain access register
179#ifndef CONFIG_CPU_L2CACHE_DISABLE
180 @ L2 cache configuration in the L2 aux control register
181 mrc p15, 1, r10, c9, c0, 2
182 bic r10, r10, #(1 << 16) @ L2 outer cache
183 mcr p15, 1, r10, c9, c0, 2
184 @ L2 cache is enabled in the aux control register
185 mrc p15, 0, r10, c1, c0, 1
186 orr r10, r10, #2
187 mcr p15, 0, r10, c1, c0, 1
188#endif 184#endif
189 mrc p15, 0, r0, c1, c0, 0 @ read control register 185 adr r5, v7_crval
190 ldr r10, cr1_clear @ get mask for bits to clear 186 ldmia r5, {r5, r6}
191 bic r0, r0, r10 @ clear bits them 187 mrc p15, 0, r0, c1, c0, 0 @ read control register
192 ldr r10, cr1_set @ get mask for bits to set 188 bic r0, r0, r5 @ clear bits them
193 orr r0, r0, r10 @ set them 189 orr r0, r0, r6 @ set them
194 mov pc, lr @ return to head.S:__ret 190 mov pc, lr @ return to head.S:__ret
195 191
196 /* 192 /*
@@ -199,12 +195,9 @@ __v7_setup:
199 * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced 195 * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced
200 * 0 110 0011 1.00 .111 1101 < we want 196 * 0 110 0011 1.00 .111 1101 < we want
201 */ 197 */
202 .type cr1_clear, #object 198 .type v7_crval, #object
203 .type cr1_set, #object 199v7_crval:
204cr1_clear: 200 crval clear=0x0120c302, mmuset=0x00c0387d, ucset=0x00c0187c
205 .word 0x0120c302
206cr1_set:
207 .word 0x00c0387d
208 201
209__v7_setup_stack: 202__v7_setup_stack:
210 .space 4 * 11 @ 11 registers 203 .space 4 * 11 @ 11 registers
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 100d57ad98ed..ba3d21d8fba3 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -78,6 +78,13 @@ static struct irqaction iop_timer_irq = {
78 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 78 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
79}; 79};
80 80
81static unsigned long iop_tick_rate;
82unsigned long get_iop_tick_rate(void)
83{
84 return iop_tick_rate;
85}
86EXPORT_SYMBOL(get_iop_tick_rate);
87
81void __init iop_init_time(unsigned long tick_rate) 88void __init iop_init_time(unsigned long tick_rate)
82{ 89{
83 u32 timer_ctl; 90 u32 timer_ctl;
@@ -85,6 +92,7 @@ void __init iop_init_time(unsigned long tick_rate)
85 ticks_per_jiffy = (tick_rate + HZ/2) / HZ; 92 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
86 ticks_per_usec = tick_rate / 1000000; 93 ticks_per_usec = tick_rate / 1000000;
87 next_jiffy_time = 0xffffffff; 94 next_jiffy_time = 0xffffffff;
95 iop_tick_rate = tick_rate;
88 96
89 timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | 97 timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
90 IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; 98 IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
new file mode 100644
index 000000000000..03a65c0dfb60
--- /dev/null
+++ b/arch/arm/plat-mxc/Kconfig
@@ -0,0 +1,20 @@
1if ARCH_MXC
2
3menu "Freescale MXC Implementations"
4
5choice
6 prompt "MXC/iMX System Type"
7 default 0
8
9config ARCH_MX3
10 bool "MX3-based"
11 help
12 This enables support for systems based on the Freescale i.MX3 family
13
14endchoice
15
16source "arch/arm/mach-mx3/Kconfig"
17
18endmenu
19
20endif
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
new file mode 100644
index 000000000000..66ad9c2b6d64
--- /dev/null
+++ b/arch/arm/plat-mxc/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Common support
6obj-y := irq.o
7
8obj-m :=
9obj-n :=
10obj- :=
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
new file mode 100644
index 000000000000..87d253bc3d3c
--- /dev/null
+++ b/arch/arm/plat-mxc/irq.c
@@ -0,0 +1,83 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/errno.h>
16#include <asm/hardware.h>
17#include <asm/io.h>
18#include <asm/irq.h>
19#include <asm/mach/irq.h>
20#include <asm/arch/common.h>
21
22/*!
23 * Disable interrupt number "irq" in the AVIC
24 *
25 * @param irq interrupt source number
26 */
27static void mxc_mask_irq(unsigned int irq)
28{
29 __raw_writel(irq, AVIC_INTDISNUM);
30}
31
32/*!
33 * Enable interrupt number "irq" in the AVIC
34 *
35 * @param irq interrupt source number
36 */
37static void mxc_unmask_irq(unsigned int irq)
38{
39 __raw_writel(irq, AVIC_INTENNUM);
40}
41
42static struct irq_chip mxc_avic_chip = {
43 .mask_ack = mxc_mask_irq,
44 .mask = mxc_mask_irq,
45 .unmask = mxc_unmask_irq,
46};
47
48/*!
49 * This function initializes the AVIC hardware and disables all the
50 * interrupts. It registers the interrupt enable and disable functions
51 * to the kernel for each interrupt source.
52 */
53void __init mxc_init_irq(void)
54{
55 int i;
56 u32 reg;
57
58 /* put the AVIC into the reset value with
59 * all interrupts disabled
60 */
61 __raw_writel(0, AVIC_INTCNTL);
62 __raw_writel(0x1f, AVIC_NIMASK);
63
64 /* disable all interrupts */
65 __raw_writel(0, AVIC_INTENABLEH);
66 __raw_writel(0, AVIC_INTENABLEL);
67
68 /* all IRQ no FIQ */
69 __raw_writel(0, AVIC_INTTYPEH);
70 __raw_writel(0, AVIC_INTTYPEL);
71 for (i = 0; i < MXC_MAX_INT_LINES; i++) {
72 set_irq_chip(i, &mxc_avic_chip);
73 set_irq_handler(i, handle_level_irq);
74 set_irq_flags(i, IRQF_VALID);
75 }
76
77 /* Set WDOG2's interrupt the highest priority level (bit 28-31) */
78 reg = __raw_readl(AVIC_NIPRIORITY6);
79 reg |= (0xF << 28);
80 __raw_writel(reg, AVIC_NIPRIORITY6);
81
82 printk(KERN_INFO "MXC IRQ initialized\n");
83}
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
new file mode 100644
index 000000000000..31656c33e05e
--- /dev/null
+++ b/arch/arm/plat-s3c/Kconfig
@@ -0,0 +1,104 @@
1# arch/arm/plat-s3c/Kconfig
2#
3# Copyright 2007 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_S3C
8 bool
9 depends on ARCH_S3C2410
10 default y if ARCH_S3C2410
11 select NO_IOPORT
12 help
13 Base platform code for any Samsung S3C device
14
15# low-level serial option nodes
16
17config CPU_LLSERIAL_S3C2410_ONLY
18 bool
19 depends on ARCH_S3C2410
20 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
21
22config CPU_LLSERIAL_S3C2440_ONLY
23 bool
24 depends on ARCH_S3C2410
25 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
26
27config CPU_LLSERIAL_S3C2410
28 bool
29 depends on ARCH_S3C2410
30 help
31 Selected if there is an S3C2410 (or register compatible) serial
32 low-level implementation needed
33
34config CPU_LLSERIAL_S3C2440
35 bool
36 depends on ARCH_S3C2410
37 help
38 Selected if there is an S3C2440 (or register compatible) serial
39 low-level implementation needed
40
41# boot configurations
42
43comment "Boot options"
44
45config S3C_BOOT_WATCHDOG
46 bool "S3C Initialisation watchdog"
47 depends on PLAT_S3C && S3C2410_WATCHDOG
48 help
49 Say y to enable the watchdog during the kernel decompression
50 stage. If the kernel fails to uncompress, then the watchdog
51 will trigger a reset and the system should restart.
52
53config S3C_BOOT_ERROR_RESET
54 bool "S3C Reboot on decompression error"
55 depends on PLAT_S3C
56 help
57 Say y here to use the watchdog to reset the system if the
58 kernel decompressor detects an error during decompression.
59
60comment "Power management"
61
62config S3C2410_PM_DEBUG
63 bool "S3C2410 PM Suspend debug"
64 depends on PLAT_S3C && PM
65 help
66 Say Y here if you want verbose debugging from the PM Suspend and
67 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
68 for more information.
69
70config S3C2410_PM_CHECK
71 bool "S3C2410 PM Suspend Memory CRC"
72 depends on PLAT_S3C && PM && CRC32
73 help
74 Enable the PM code's memory area checksum over sleep. This option
75 will generate CRCs of all blocks of memory, and store them before
76 going to sleep. The blocks are then checked on resume for any
77 errors.
78
79 Note, this can take several seconds depending on memory size
80 and CPU speed.
81
82 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
83
84config S3C2410_PM_CHECK_CHUNKSIZE
85 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
86 depends on PLAT_S3C && PM && S3C2410_PM_CHECK
87 default 64
88 help
89 Set the chunksize in Kilobytes of the CRC for checking memory
90 corruption over suspend and resume. A smaller value will mean that
91 the CRC data block will take more memory, but wil identify any
92 faults with better precision.
93
94 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
95
96config S3C_LOWLEVEL_UART_PORT
97 int "S3C UART to use for low-level messages"
98 depends on PLAT_S3C
99 default 0
100 help
101 Choice of which UART port to use for the low-level messages,
102 such as the `Uncompressing...` at start time. The value of
103 this configuration should be between zero and two. The port
104 must have been initialised by the boot-loader before use.
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index b972f36d547c..b66fb3c4e228 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -10,7 +10,7 @@ config PLAT_S3C24XX
10 default y if ARCH_S3C2410 10 default y if ARCH_S3C2410
11 select NO_IOPORT 11 select NO_IOPORT
12 help 12 help
13 Base platform code for any Samsung S3C device 13 Base platform code for any Samsung S3C24XX device
14 14
15if PLAT_S3C24XX 15if PLAT_S3C24XX
16 16
@@ -26,64 +26,6 @@ config PM_SIMTEC
26 Common power management code for systems that are 26 Common power management code for systems that are
27 compatible with the Simtec style of power management 27 compatible with the Simtec style of power management
28 28
29config S3C2410_BOOT_WATCHDOG
30 bool "S3C2410 Initialisation watchdog"
31 depends on ARCH_S3C2410 && S3C2410_WATCHDOG
32 help
33 Say y to enable the watchdog during the kernel decompression
34 stage. If the kernel fails to uncompress, then the watchdog
35 will trigger a reset and the system should restart.
36
37config S3C2410_BOOT_ERROR_RESET
38 bool "S3C2410 Reboot on decompression error"
39 depends on ARCH_S3C2410
40 help
41 Say y here to use the watchdog to reset the system if the
42 kernel decompressor detects an error during decompression.
43
44config S3C2410_PM_DEBUG
45 bool "S3C2410 PM Suspend debug"
46 depends on ARCH_S3C2410 && PM
47 help
48 Say Y here if you want verbose debugging from the PM Suspend and
49 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
50 for more information.
51
52config S3C2410_PM_CHECK
53 bool "S3C2410 PM Suspend Memory CRC"
54 depends on ARCH_S3C2410 && PM && CRC32
55 help
56 Enable the PM code's memory area checksum over sleep. This option
57 will generate CRCs of all blocks of memory, and store them before
58 going to sleep. The blocks are then checked on resume for any
59 errors.
60
61 Note, this can take several seconds depending on memory size
62 and CPU speed.
63
64 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
65
66config S3C2410_PM_CHECK_CHUNKSIZE
67 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
68 depends on ARCH_S3C2410 && PM && S3C2410_PM_CHECK
69 default 64
70 help
71 Set the chunksize in Kilobytes of the CRC for checking memory
72 corruption over suspend and resume. A smaller value will mean that
73 the CRC data block will take more memory, but wil identify any
74 faults with better precision.
75
76 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
77
78config S3C2410_LOWLEVEL_UART_PORT
79 int "S3C2410 UART to use for low-level messages"
80 default 0
81 help
82 Choice of which UART port to use for the low-level messages,
83 such as the `Uncompressing...` at start time. The value of
84 this configuration should be between zero and two. The port
85 must have been initialised by the boot-loader before use.
86
87config S3C2410_DMA 29config S3C2410_DMA
88 bool "S3C2410 DMA support" 30 bool "S3C2410 DMA support"
89 depends on ARCH_S3C2410 31 depends on ARCH_S3C2410
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index 7ed19b23ce56..398c7ac25296 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -38,7 +38,7 @@
38#include <asm/arch/regs-gpio.h> 38#include <asm/arch/regs-gpio.h>
39#include <asm/arch/leds-gpio.h> 39#include <asm/arch/leds-gpio.h>
40 40
41#include <asm/arch/nand.h> 41#include <asm/plat-s3c/nand.h>
42 42
43#include <asm/plat-s3c24xx/common-smdk.h> 43#include <asm/plat-s3c24xx/common-smdk.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <asm/plat-s3c24xx/devs.h>
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 8ce4904d3131..f513ab083b8f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -38,7 +38,7 @@
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
39 39
40#include <asm/arch/regs-gpio.h> 40#include <asm/arch/regs-gpio.h>
41#include <asm/arch/regs-serial.h> 41#include <asm/plat-s3c/regs-serial.h>
42 42
43#include <asm/plat-s3c24xx/cpu.h> 43#include <asm/plat-s3c24xx/cpu.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <asm/plat-s3c24xx/devs.h>
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 5875da0ae0eb..e546e933b3f7 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -28,12 +28,12 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <asm/arch/regs-serial.h> 31#include <asm/plat-s3c/regs-serial.h>
32#include <asm/arch/udc.h> 32#include <asm/plat-s3c24xx/udc.h>
33 33
34#include <asm/plat-s3c24xx/devs.h> 34#include <asm/plat-s3c24xx/devs.h>
35#include <asm/plat-s3c24xx/cpu.h> 35#include <asm/plat-s3c24xx/cpu.h>
36#include <asm/arch/regs-spi.h> 36#include <asm/plat-s3c24xx/regs-spi.h>
37 37
38/* Serial port registrations */ 38/* Serial port registrations */
39 39
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index 5692eccdf4d1..eab1850616d8 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -40,7 +40,7 @@
40#include <asm/hardware.h> 40#include <asm/hardware.h>
41#include <asm/io.h> 41#include <asm/io.h>
42 42
43#include <asm/arch/regs-serial.h> 43#include <asm/plat-s3c/regs-serial.h>
44#include <asm/arch/regs-clock.h> 44#include <asm/arch/regs-clock.h>
45#include <asm/arch/regs-gpio.h> 45#include <asm/arch/regs-gpio.h>
46#include <asm/arch/regs-mem.h> 46#include <asm/arch/regs-mem.h>
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c
index 767f2e9a3a55..3444b13afac5 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/plat-s3c24xx/s3c244x.c
@@ -30,7 +30,7 @@
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <asm/arch/regs-clock.h> 32#include <asm/arch/regs-clock.h>
33#include <asm/arch/regs-serial.h> 33#include <asm/plat-s3c/regs-serial.h>
34#include <asm/arch/regs-gpio.h> 34#include <asm/arch/regs-gpio.h>
35#include <asm/arch/regs-gpioj.h> 35#include <asm/arch/regs-gpioj.h>
36#include <asm/arch/regs-dsc.h> 36#include <asm/arch/regs-dsc.h>
@@ -47,7 +47,6 @@ static struct map_desc s3c244x_iodesc[] __initdata = {
47 IODESC_ENT(CLKPWR), 47 IODESC_ENT(CLKPWR),
48 IODESC_ENT(TIMER), 48 IODESC_ENT(TIMER),
49 IODESC_ENT(WATCHDOG), 49 IODESC_ENT(WATCHDOG),
50 IODESC_ENT(LCD),
51}; 50};
52 51
53/* uart initialisation */ 52/* uart initialisation */
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S
index 7b7ae790b00d..d47113bbc34c 100644
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/plat-s3c24xx/sleep.S
@@ -32,7 +32,7 @@
32#include <asm/arch/regs-gpio.h> 32#include <asm/arch/regs-gpio.h>
33#include <asm/arch/regs-clock.h> 33#include <asm/arch/regs-clock.h>
34#include <asm/arch/regs-mem.h> 34#include <asm/arch/regs-mem.h>
35#include <asm/arch/regs-serial.h> 35#include <asm/plat-s3c/regs-serial.h>
36 36
37/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not 37/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
38 * reset the UART configuration, only enable if you really need this! 38 * reset the UART configuration, only enable if you really need this!
diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c
index b7667375bcec..2ec1daaa0e53 100644
--- a/arch/arm/plat-s3c24xx/time.c
+++ b/arch/arm/plat-s3c24xx/time.c
@@ -33,7 +33,7 @@
33#include <asm/io.h> 33#include <asm/io.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/arch/map.h> 35#include <asm/arch/map.h>
36#include <asm/arch/regs-timer.h> 36#include <asm/plat-s3c/regs-timer.h>
37#include <asm/arch/regs-irq.h> 37#include <asm/arch/regs-irq.h>
38#include <asm/mach/time.h> 38#include <asm/mach/time.h>
39 39
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index d4b7b229631d..0ac022f800a1 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -74,14 +74,14 @@ vfp_support_entry:
74 74
75 VFPFMRX r1, FPEXC @ Is the VFP enabled? 75 VFPFMRX r1, FPEXC @ Is the VFP enabled?
76 DBGSTR1 "fpexc %08x", r1 76 DBGSTR1 "fpexc %08x", r1
77 tst r1, #FPEXC_ENABLE 77 tst r1, #FPEXC_EN
78 bne look_for_VFP_exceptions @ VFP is already enabled 78 bne look_for_VFP_exceptions @ VFP is already enabled
79 79
80 DBGSTR1 "enable %x", r10 80 DBGSTR1 "enable %x", r10
81 ldr r3, last_VFP_context_address 81 ldr r3, last_VFP_context_address
82 orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set 82 orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set
83 ldr r4, [r3, r11, lsl #2] @ last_VFP_context pointer 83 ldr r4, [r3, r11, lsl #2] @ last_VFP_context pointer
84 bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled 84 bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled
85 cmp r4, r10 85 cmp r4, r10
86 beq check_for_exception @ we are returning to the same 86 beq check_for_exception @ we are returning to the same
87 @ process, so the registers are 87 @ process, so the registers are
@@ -124,7 +124,7 @@ no_old_VFP_process:
124 VFPFMXR FPSCR, r5 @ restore status 124 VFPFMXR FPSCR, r5 @ restore status
125 125
126check_for_exception: 126check_for_exception:
127 tst r1, #FPEXC_EXCEPTION 127 tst r1, #FPEXC_EX
128 bne process_exception @ might as well handle the pending 128 bne process_exception @ might as well handle the pending
129 @ exception before retrying branch 129 @ exception before retrying branch
130 @ out before setting an FPEXC that 130 @ out before setting an FPEXC that
@@ -136,10 +136,10 @@ check_for_exception:
136 136
137 137
138look_for_VFP_exceptions: 138look_for_VFP_exceptions:
139 tst r1, #FPEXC_EXCEPTION 139 tst r1, #FPEXC_EX
140 bne process_exception 140 bne process_exception
141 VFPFMRX r5, FPSCR 141 VFPFMRX r5, FPSCR
142 tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION ! 142 tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EX !
143 bne process_exception 143 bne process_exception
144 144
145 @ Fall into hand on to next handler - appropriate coproc instr 145 @ Fall into hand on to next handler - appropriate coproc instr
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 1106b5f9cf19..04ddab2bd876 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -53,7 +53,7 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
53 * case the thread migrates to a different CPU. The 53 * case the thread migrates to a different CPU. The
54 * restoring is done lazily. 54 * restoring is done lazily.
55 */ 55 */
56 if ((fpexc & FPEXC_ENABLE) && last_VFP_context[cpu]) { 56 if ((fpexc & FPEXC_EN) && last_VFP_context[cpu]) {
57 vfp_save_state(last_VFP_context[cpu], fpexc); 57 vfp_save_state(last_VFP_context[cpu], fpexc);
58 last_VFP_context[cpu]->hard.cpu = cpu; 58 last_VFP_context[cpu]->hard.cpu = cpu;
59 } 59 }
@@ -70,7 +70,7 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
70 * Always disable VFP so we can lazily save/restore the 70 * Always disable VFP so we can lazily save/restore the
71 * old state. 71 * old state.
72 */ 72 */
73 fmxr(FPEXC, fpexc & ~FPEXC_ENABLE); 73 fmxr(FPEXC, fpexc & ~FPEXC_EN);
74 return NOTIFY_DONE; 74 return NOTIFY_DONE;
75 } 75 }
76 76
@@ -81,13 +81,13 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
81 */ 81 */
82 memset(vfp, 0, sizeof(union vfp_state)); 82 memset(vfp, 0, sizeof(union vfp_state));
83 83
84 vfp->hard.fpexc = FPEXC_ENABLE; 84 vfp->hard.fpexc = FPEXC_EN;
85 vfp->hard.fpscr = FPSCR_ROUND_NEAREST; 85 vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
86 86
87 /* 87 /*
88 * Disable VFP to ensure we initialise it first. 88 * Disable VFP to ensure we initialise it first.
89 */ 89 */
90 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); 90 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
91 } 91 }
92 92
93 /* flush and release case: Per-thread VFP cleanup. */ 93 /* flush and release case: Per-thread VFP cleanup. */
@@ -229,7 +229,7 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
229 /* 229 /*
230 * Enable access to the VFP so we can handle the bounce. 230 * Enable access to the VFP so we can handle the bounce.
231 */ 231 */
232 fmxr(FPEXC, fpexc & ~(FPEXC_EXCEPTION|FPEXC_INV|FPEXC_UFC|FPEXC_IOC)); 232 fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_INV|FPEXC_UFC|FPEXC_IOC));
233 233
234 orig_fpscr = fpscr = fmrx(FPSCR); 234 orig_fpscr = fpscr = fmrx(FPSCR);
235 235
@@ -248,7 +248,7 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
248 /* 248 /*
249 * Modify fpscr to indicate the number of iterations remaining 249 * Modify fpscr to indicate the number of iterations remaining
250 */ 250 */
251 if (fpexc & FPEXC_EXCEPTION) { 251 if (fpexc & FPEXC_EX) {
252 u32 len; 252 u32 len;
253 253
254 len = fpexc + (1 << FPEXC_LENGTH_BIT); 254 len = fpexc + (1 << FPEXC_LENGTH_BIT);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-29 05:40:14 -0500