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authorDaniel Walker <dwalker@codeaurora.org>2010-05-06 17:16:04 -0400
committerDaniel Walker <dwalker@codeaurora.org>2010-05-13 19:08:37 -0400
commit81d658ac64000758c198c6b31fed505ec284e165 (patch)
tree02ce1bef796e47ff284a1c2c124293cc1ccd0f61 /arch/arm
parentcf62ffae2550102557c0848ab63a771e032fcfd3 (diff)
msm: physical offset for QSD8x50
Support different RAM base addresses used by Qualcomm SOCs, with QSD8x50 as the first addtional one. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-msm/include/mach/memory.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
index f4698baec976..cfee996a47d5 100644
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -17,7 +17,13 @@
17#define __ASM_ARCH_MEMORY_H 17#define __ASM_ARCH_MEMORY_H
18 18
19/* physical offset of RAM */ 19/* physical offset of RAM */
20#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
21#define PHYS_OFFSET UL(0x00000000)
22#elif defined(CONFIG_ARCH_QSD8X50)
23#define PHYS_OFFSET UL(0x20000000)
24#else
20#define PHYS_OFFSET UL(0x10000000) 25#define PHYS_OFFSET UL(0x10000000)
26#endif
21 27
22#endif 28#endif
23 29