diff options
author | Paulius Zaleckas <paulius.zaleckas@teltonika.lt> | 2008-11-14 05:01:39 -0500 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2008-12-16 08:58:43 -0500 |
commit | d7927e19167680053f282fb4007e81c244ebf465 (patch) | |
tree | e2a7fd3b826808eebe290f169c0e41ee58cd3c01 /arch/arm | |
parent | bd006a9bfedadf1ed1af0393852d1e0101c39901 (diff) |
patch-mxc-fiq
Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 5 | ||||
-rw-r--r-- | arch/arm/plat-mxc/irq.c | 29 |
2 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index b55bba35e18a..b8ac91608a4f 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h | |||
@@ -14,4 +14,9 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); | 15 | extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); |
16 | 16 | ||
17 | /* all normal IRQs can be FIQs */ | ||
18 | #define FIQ_START 0 | ||
19 | /* switch betwean IRQ and FIQ */ | ||
20 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); | ||
21 | |||
17 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ | 22 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ |
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c index d862c9e5f8db..dd7021b19834 100644 --- a/arch/arm/plat-mxc/irq.c +++ b/arch/arm/plat-mxc/irq.c | |||
@@ -17,9 +17,11 @@ | |||
17 | * MA 02110-1301, USA. | 17 | * MA 02110-1301, USA. |
18 | */ | 18 | */ |
19 | 19 | ||
20 | #include <linux/module.h> | ||
20 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
21 | #include <linux/io.h> | 22 | #include <linux/io.h> |
22 | #include <mach/common.h> | 23 | #include <mach/common.h> |
24 | #include <asm/mach/irq.h> | ||
23 | 25 | ||
24 | #define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR) | 26 | #define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR) |
25 | #define AVIC_INTCNTL (AVIC_BASE + 0x00) /* int control reg */ | 27 | #define AVIC_INTCNTL (AVIC_BASE + 0x00) /* int control reg */ |
@@ -65,6 +67,28 @@ void imx_irq_set_priority(unsigned char irq, unsigned char prio) | |||
65 | EXPORT_SYMBOL(imx_irq_set_priority); | 67 | EXPORT_SYMBOL(imx_irq_set_priority); |
66 | #endif | 68 | #endif |
67 | 69 | ||
70 | #ifdef CONFIG_FIQ | ||
71 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) | ||
72 | { | ||
73 | unsigned int irqt; | ||
74 | |||
75 | if (irq >= MXC_MAX_INT_LINES) | ||
76 | return -EINVAL; | ||
77 | |||
78 | if (irq < MXC_MAX_INT_LINES / 2) { | ||
79 | irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq); | ||
80 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL); | ||
81 | } else { | ||
82 | irq -= MXC_MAX_INT_LINES / 2; | ||
83 | irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq); | ||
84 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH); | ||
85 | } | ||
86 | |||
87 | return 0; | ||
88 | } | ||
89 | EXPORT_SYMBOL(mxc_set_irq_fiq); | ||
90 | #endif /* CONFIG_FIQ */ | ||
91 | |||
68 | /* Disable interrupt number "irq" in the AVIC */ | 92 | /* Disable interrupt number "irq" in the AVIC */ |
69 | static void mxc_mask_irq(unsigned int irq) | 93 | static void mxc_mask_irq(unsigned int irq) |
70 | { | 94 | { |
@@ -119,5 +143,10 @@ void __init mxc_init_irq(void) | |||
119 | /* init architectures chained interrupt handler */ | 143 | /* init architectures chained interrupt handler */ |
120 | mxc_register_gpios(); | 144 | mxc_register_gpios(); |
121 | 145 | ||
146 | #ifdef CONFIG_FIQ | ||
147 | /* Initialize FIQ */ | ||
148 | init_FIQ(); | ||
149 | #endif | ||
150 | |||
122 | printk(KERN_INFO "MXC IRQ initialized\n"); | 151 | printk(KERN_INFO "MXC IRQ initialized\n"); |
123 | } | 152 | } |