diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-12 14:51:39 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-12 14:51:39 -0500 |
commit | d01e4afdbb65e030fd6f1f96c30a558e2eb0f279 (patch) | |
tree | 02ef82b2740cf93a98199eded5ef765fa6e03052 /arch/arm | |
parent | 8287361abca36504da813638310d2547469283eb (diff) | |
parent | 794b175fc0c0c4844dbb7b137a73bbfd01f6c608 (diff) |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups on various subarchitectures from Olof Johansson:
"Cleanup patches for various ARM platforms and some of their associated
drivers. There's also a branch in here that enables Freescale i.MX to
be part of the multiplatform support -- the first "big" SoC that is
moved over (more multiplatform work comes in a separate branch later
during the merge window)."
Conflicts fixed as per Olof, including a silent semantic one in
arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to
omap3xxx_restart(), and a new user of the old name was added).
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits)
ARM: omap: fix typo on timer cleanup
ARM: EXYNOS: Remove unused regs-mem.h file
ARM: EXYNOS: Remove unused non-dt support for dwmci controller
ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
ARM: OMAP3: cm-t3517: use GPTIMER for system clock
ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
ARM: SAMSUNG: use devm_ functions for ADC driver
ARM: EXYNOS: no duplicate mask/unmask in eint0_15
ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
ARM: EXYNOS: Remove i2c0 resource information and setting of device names
ARM: Kirkwood: checkpatch cleanups
ARM: Kirkwood: Fix sparse warnings.
ARM: Kirkwood: Remove unused includes
ARM: kirkwood: cleanup lsxl board includes
ARM: integrator: use BUG_ON where possible
ARM: integrator: push down SC dependencies
ARM: integrator: delete static UART1 mapping
ARM: integrator: delete SC mapping on the CP
ARM: integrator: remove static CP syscon mapping
ARM: integrator: remove static AP syscon mapping
...
Diffstat (limited to 'arch/arm')
458 files changed, 4187 insertions, 4106 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f24e07630778..03e0460d5067 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -438,19 +438,6 @@ config ARCH_FOOTBRIDGE | |||
438 | Support for systems based on the DC21285 companion chip | 438 | Support for systems based on the DC21285 companion chip |
439 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | 439 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. |
440 | 440 | ||
441 | config ARCH_MXC | ||
442 | bool "Freescale MXC/iMX-based" | ||
443 | select ARCH_REQUIRE_GPIOLIB | ||
444 | select CLKDEV_LOOKUP | ||
445 | select CLKSRC_MMIO | ||
446 | select GENERIC_CLOCKEVENTS | ||
447 | select GENERIC_IRQ_CHIP | ||
448 | select MULTI_IRQ_HANDLER | ||
449 | select SPARSE_IRQ | ||
450 | select USE_OF | ||
451 | help | ||
452 | Support for Freescale MXC/iMX-based family of processors | ||
453 | |||
454 | config ARCH_MXS | 441 | config ARCH_MXS |
455 | bool "Freescale MXS-based" | 442 | bool "Freescale MXS-based" |
456 | select ARCH_REQUIRE_GPIOLIB | 443 | select ARCH_REQUIRE_GPIOLIB |
@@ -966,7 +953,6 @@ config ARCH_ZYNQ | |||
966 | bool "Xilinx Zynq ARM Cortex A9 Platform" | 953 | bool "Xilinx Zynq ARM Cortex A9 Platform" |
967 | select ARM_AMBA | 954 | select ARM_AMBA |
968 | select ARM_GIC | 955 | select ARM_GIC |
969 | select CLKDEV_LOOKUP | ||
970 | select CPU_V7 | 956 | select CPU_V7 |
971 | select GENERIC_CLOCKEVENTS | 957 | select GENERIC_CLOCKEVENTS |
972 | select ICST | 958 | select ICST |
@@ -1065,7 +1051,7 @@ source "arch/arm/mach-msm/Kconfig" | |||
1065 | 1051 | ||
1066 | source "arch/arm/mach-mv78xx0/Kconfig" | 1052 | source "arch/arm/mach-mv78xx0/Kconfig" |
1067 | 1053 | ||
1068 | source "arch/arm/plat-mxc/Kconfig" | 1054 | source "arch/arm/mach-imx/Kconfig" |
1069 | 1055 | ||
1070 | source "arch/arm/mach-mxs/Kconfig" | 1056 | source "arch/arm/mach-mxs/Kconfig" |
1071 | 1057 | ||
@@ -1175,7 +1161,7 @@ config ARM_NR_BANKS | |||
1175 | config IWMMXT | 1161 | config IWMMXT |
1176 | bool "Enable iWMMXt support" | 1162 | bool "Enable iWMMXt support" |
1177 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 | 1163 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
1178 | default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP | 1164 | default y if PXA27x || PXA3xx || ARCH_MMP |
1179 | help | 1165 | help |
1180 | Enable support for iWMMXt context switching at run time if | 1166 | Enable support for iWMMXt context switching at run time if |
1181 | running on a CPU that supports it. | 1167 | running on a CPU that supports it. |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index b0f3857b3a4c..5566520686a5 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -412,6 +412,14 @@ endchoice | |||
412 | config DEBUG_LL_INCLUDE | 412 | config DEBUG_LL_INCLUDE |
413 | string | 413 | string |
414 | default "debug/icedcc.S" if DEBUG_ICEDCC | 414 | default "debug/icedcc.S" if DEBUG_ICEDCC |
415 | default "debug/imx.S" if DEBUG_IMX1_UART || \ | ||
416 | DEBUG_IMX25_UART || \ | ||
417 | DEBUG_IMX21_IMX27_UART || \ | ||
418 | DEBUG_IMX31_IMX35_UART || \ | ||
419 | DEBUG_IMX51_UART || \ | ||
420 | DEBUG_IMX50_IMX53_UART ||\ | ||
421 | DEBUG_IMX6Q_UART2 || \ | ||
422 | DEBUG_IMX6Q_UART4 | ||
415 | default "debug/highbank.S" if DEBUG_HIGHBANK_UART | 423 | default "debug/highbank.S" if DEBUG_HIGHBANK_UART |
416 | default "debug/mvebu.S" if DEBUG_MVEBU_UART | 424 | default "debug/mvebu.S" if DEBUG_MVEBU_UART |
417 | default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART | 425 | default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 45096a1ee0a0..20d295aca51f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -197,10 +197,8 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq | |||
197 | 197 | ||
198 | # Platform directory name. This list is sorted alphanumerically | 198 | # Platform directory name. This list is sorted alphanumerically |
199 | # by CONFIG_* macro name. | 199 | # by CONFIG_* macro name. |
200 | plat-$(CONFIG_ARCH_MXC) += mxc | ||
201 | plat-$(CONFIG_ARCH_OMAP) += omap | 200 | plat-$(CONFIG_ARCH_OMAP) += omap |
202 | plat-$(CONFIG_ARCH_S3C64XX) += samsung | 201 | plat-$(CONFIG_ARCH_S3C64XX) += samsung |
203 | plat-$(CONFIG_ARCH_ZYNQ) += versatile | ||
204 | plat-$(CONFIG_PLAT_IOP) += iop | 202 | plat-$(CONFIG_PLAT_IOP) += iop |
205 | plat-$(CONFIG_PLAT_NOMADIK) += nomadik | 203 | plat-$(CONFIG_PLAT_NOMADIK) += nomadik |
206 | plat-$(CONFIG_PLAT_ORION) += orion | 204 | plat-$(CONFIG_PLAT_ORION) += orion |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index a517153a13ea..537208f22e56 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y) | |||
54 | OBJS += head-sa1100.o | 54 | OBJS += head-sa1100.o |
55 | endif | 55 | endif |
56 | 56 | ||
57 | ifeq ($(CONFIG_ARCH_VT8500),y) | ||
58 | OBJS += head-vt8500.o | ||
59 | endif | ||
60 | |||
61 | ifeq ($(CONFIG_CPU_XSCALE),y) | 57 | ifeq ($(CONFIG_CPU_XSCALE),y) |
62 | OBJS += head-xscale.o | 58 | OBJS += head-xscale.o |
63 | endif | 59 | endif |
diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S deleted file mode 100644 index 1dc1e21a3be3..000000000000 --- a/arch/arm/boot/compressed/head-vt8500.S +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/boot/compressed/head-vt8500.S | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * VIA VT8500 specific tweaks. This is merged into head.S by the linker. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/linkage.h> | ||
11 | #include <asm/mach-types.h> | ||
12 | |||
13 | .section ".start", "ax" | ||
14 | |||
15 | __VT8500_start: | ||
16 | @ Compare the SCC ID register against a list of known values | ||
17 | ldr r1, .SCCID | ||
18 | ldr r3, [r1] | ||
19 | |||
20 | @ VT8500 override | ||
21 | ldr r4, .VT8500SCC | ||
22 | cmp r3, r4 | ||
23 | ldreq r7, .ID_BV07 | ||
24 | beq .Lendvt8500 | ||
25 | |||
26 | @ WM8505 override | ||
27 | ldr r4, .WM8505SCC | ||
28 | cmp r3, r4 | ||
29 | ldreq r7, .ID_8505 | ||
30 | beq .Lendvt8500 | ||
31 | |||
32 | @ Otherwise, leave the bootloader's machine id untouched | ||
33 | |||
34 | .SCCID: | ||
35 | .word 0xd8120000 | ||
36 | .VT8500SCC: | ||
37 | .word 0x34000102 | ||
38 | .WM8505SCC: | ||
39 | .word 0x34260103 | ||
40 | |||
41 | .ID_BV07: | ||
42 | .word MACH_TYPE_BV07 | ||
43 | .ID_8505: | ||
44 | .word MACH_TYPE_WM8505_7IN_NETBOOK | ||
45 | |||
46 | .Lendvt8500: | ||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 262493752234..5e98094a3e1b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -79,15 +79,17 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ | |||
79 | imx28-m28evk.dtb \ | 79 | imx28-m28evk.dtb \ |
80 | imx28-tx28.dtb | 80 | imx28-tx28.dtb |
81 | dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ | 81 | dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ |
82 | omap3-beagle.dtb \ | ||
82 | omap3-beagle-xm.dtb \ | 83 | omap3-beagle-xm.dtb \ |
83 | omap3-evm.dtb \ | 84 | omap3-evm.dtb \ |
84 | omap3-tobi.dtb \ | 85 | omap3-tobi.dtb \ |
85 | omap4-panda.dtb \ | 86 | omap4-panda.dtb \ |
86 | omap4-pandaES.dtb \ | 87 | omap4-panda-es.dtb \ |
87 | omap4-var_som.dtb \ | 88 | omap4-var-som.dtb \ |
88 | omap4-sdp.dtb \ | 89 | omap4-sdp.dtb \ |
89 | omap5-evm.dtb \ | 90 | omap5-evm.dtb \ |
90 | am335x-evm.dtb \ | 91 | am335x-evm.dtb \ |
92 | am335x-evmsk.dtb \ | ||
91 | am335x-bone.dtb | 93 | am335x-bone.dtb |
92 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb | 94 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb |
93 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb | 95 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb |
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index c634f87e230e..2c338889df1b 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts | |||
@@ -13,11 +13,31 @@ | |||
13 | model = "TI AM335x BeagleBone"; | 13 | model = "TI AM335x BeagleBone"; |
14 | compatible = "ti,am335x-bone", "ti,am33xx"; | 14 | compatible = "ti,am335x-bone", "ti,am33xx"; |
15 | 15 | ||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | cpu0-supply = <&dcdc2_reg>; | ||
19 | }; | ||
20 | }; | ||
21 | |||
16 | memory { | 22 | memory { |
17 | device_type = "memory"; | 23 | device_type = "memory"; |
18 | reg = <0x80000000 0x10000000>; /* 256 MB */ | 24 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
19 | }; | 25 | }; |
20 | 26 | ||
27 | am33xx_pinmux: pinmux@44e10800 { | ||
28 | pinctrl-names = "default"; | ||
29 | pinctrl-0 = <&user_leds_s0>; | ||
30 | |||
31 | user_leds_s0: user_leds_s0 { | ||
32 | pinctrl-single,pins = < | ||
33 | 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ | ||
34 | 0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */ | ||
35 | 0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */ | ||
36 | 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */ | ||
37 | >; | ||
38 | }; | ||
39 | }; | ||
40 | |||
21 | ocp { | 41 | ocp { |
22 | uart1: serial@44e09000 { | 42 | uart1: serial@44e09000 { |
23 | status = "okay"; | 43 | status = "okay"; |
@@ -33,6 +53,36 @@ | |||
33 | 53 | ||
34 | }; | 54 | }; |
35 | }; | 55 | }; |
56 | |||
57 | leds { | ||
58 | compatible = "gpio-leds"; | ||
59 | |||
60 | led@2 { | ||
61 | label = "beaglebone:green:heartbeat"; | ||
62 | gpios = <&gpio2 21 0>; | ||
63 | linux,default-trigger = "heartbeat"; | ||
64 | default-state = "off"; | ||
65 | }; | ||
66 | |||
67 | led@3 { | ||
68 | label = "beaglebone:green:mmc0"; | ||
69 | gpios = <&gpio2 22 0>; | ||
70 | linux,default-trigger = "mmc0"; | ||
71 | default-state = "off"; | ||
72 | }; | ||
73 | |||
74 | led@4 { | ||
75 | label = "beaglebone:green:usr2"; | ||
76 | gpios = <&gpio2 23 0>; | ||
77 | default-state = "off"; | ||
78 | }; | ||
79 | |||
80 | led@5 { | ||
81 | label = "beaglebone:green:usr3"; | ||
82 | gpios = <&gpio2 24 0>; | ||
83 | default-state = "off"; | ||
84 | }; | ||
85 | }; | ||
36 | }; | 86 | }; |
37 | 87 | ||
38 | /include/ "tps65217.dtsi" | 88 | /include/ "tps65217.dtsi" |
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 185d6325a458..9f65f17ebdf8 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts | |||
@@ -13,11 +13,39 @@ | |||
13 | model = "TI AM335x EVM"; | 13 | model = "TI AM335x EVM"; |
14 | compatible = "ti,am335x-evm", "ti,am33xx"; | 14 | compatible = "ti,am335x-evm", "ti,am33xx"; |
15 | 15 | ||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | cpu0-supply = <&vdd1_reg>; | ||
19 | }; | ||
20 | }; | ||
21 | |||
16 | memory { | 22 | memory { |
17 | device_type = "memory"; | 23 | device_type = "memory"; |
18 | reg = <0x80000000 0x10000000>; /* 256 MB */ | 24 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
19 | }; | 25 | }; |
20 | 26 | ||
27 | am33xx_pinmux: pinmux@44e10800 { | ||
28 | pinctrl-names = "default"; | ||
29 | pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>; | ||
30 | |||
31 | matrix_keypad_s0: matrix_keypad_s0 { | ||
32 | pinctrl-single,pins = < | ||
33 | 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ | ||
34 | 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */ | ||
35 | 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */ | ||
36 | 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */ | ||
37 | 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */ | ||
38 | >; | ||
39 | }; | ||
40 | |||
41 | volume_keys_s0: volume_keys_s0 { | ||
42 | pinctrl-single,pins = < | ||
43 | 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */ | ||
44 | 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ | ||
45 | >; | ||
46 | }; | ||
47 | }; | ||
48 | |||
21 | ocp { | 49 | ocp { |
22 | uart1: serial@44e09000 { | 50 | uart1: serial@44e09000 { |
23 | status = "okay"; | 51 | status = "okay"; |
@@ -31,6 +59,49 @@ | |||
31 | reg = <0x2d>; | 59 | reg = <0x2d>; |
32 | }; | 60 | }; |
33 | }; | 61 | }; |
62 | |||
63 | i2c2: i2c@4802a000 { | ||
64 | status = "okay"; | ||
65 | clock-frequency = <100000>; | ||
66 | |||
67 | lis331dlh: lis331dlh@18 { | ||
68 | compatible = "st,lis331dlh", "st,lis3lv02d"; | ||
69 | reg = <0x18>; | ||
70 | Vdd-supply = <&lis3_reg>; | ||
71 | Vdd_IO-supply = <&lis3_reg>; | ||
72 | |||
73 | st,click-single-x; | ||
74 | st,click-single-y; | ||
75 | st,click-single-z; | ||
76 | st,click-thresh-x = <10>; | ||
77 | st,click-thresh-y = <10>; | ||
78 | st,click-thresh-z = <10>; | ||
79 | st,irq1-click; | ||
80 | st,irq2-click; | ||
81 | st,wakeup-x-lo; | ||
82 | st,wakeup-x-hi; | ||
83 | st,wakeup-y-lo; | ||
84 | st,wakeup-y-hi; | ||
85 | st,wakeup-z-lo; | ||
86 | st,wakeup-z-hi; | ||
87 | st,min-limit-x = <120>; | ||
88 | st,min-limit-y = <120>; | ||
89 | st,min-limit-z = <140>; | ||
90 | st,max-limit-x = <550>; | ||
91 | st,max-limit-y = <550>; | ||
92 | st,max-limit-z = <750>; | ||
93 | }; | ||
94 | |||
95 | tsl2550: tsl2550@39 { | ||
96 | compatible = "taos,tsl2550"; | ||
97 | reg = <0x39>; | ||
98 | }; | ||
99 | |||
100 | tmp275: tmp275@48 { | ||
101 | compatible = "ti,tmp275"; | ||
102 | reg = <0x48>; | ||
103 | }; | ||
104 | }; | ||
34 | }; | 105 | }; |
35 | 106 | ||
36 | vbat: fixedregulator@0 { | 107 | vbat: fixedregulator@0 { |
@@ -40,6 +111,53 @@ | |||
40 | regulator-max-microvolt = <5000000>; | 111 | regulator-max-microvolt = <5000000>; |
41 | regulator-boot-on; | 112 | regulator-boot-on; |
42 | }; | 113 | }; |
114 | |||
115 | lis3_reg: fixedregulator@1 { | ||
116 | compatible = "regulator-fixed"; | ||
117 | regulator-name = "lis3_reg"; | ||
118 | regulator-boot-on; | ||
119 | }; | ||
120 | |||
121 | matrix_keypad: matrix_keypad@0 { | ||
122 | compatible = "gpio-matrix-keypad"; | ||
123 | debounce-delay-ms = <5>; | ||
124 | col-scan-delay-us = <2>; | ||
125 | |||
126 | row-gpios = <&gpio2 25 0 /* Bank1, pin25 */ | ||
127 | &gpio2 26 0 /* Bank1, pin26 */ | ||
128 | &gpio2 27 0>; /* Bank1, pin27 */ | ||
129 | |||
130 | col-gpios = <&gpio2 21 0 /* Bank1, pin21 */ | ||
131 | &gpio2 22 0>; /* Bank1, pin22 */ | ||
132 | |||
133 | linux,keymap = <0x0000008b /* MENU */ | ||
134 | 0x0100009e /* BACK */ | ||
135 | 0x02000069 /* LEFT */ | ||
136 | 0x0001006a /* RIGHT */ | ||
137 | 0x0101001c /* ENTER */ | ||
138 | 0x0201006c>; /* DOWN */ | ||
139 | }; | ||
140 | |||
141 | gpio_keys: volume_keys@0 { | ||
142 | compatible = "gpio-keys"; | ||
143 | #address-cells = <1>; | ||
144 | #size-cells = <0>; | ||
145 | autorepeat; | ||
146 | |||
147 | switch@9 { | ||
148 | label = "volume-up"; | ||
149 | linux,code = <115>; | ||
150 | gpios = <&gpio1 2 1>; | ||
151 | gpio-key,wakeup; | ||
152 | }; | ||
153 | |||
154 | switch@10 { | ||
155 | label = "volume-down"; | ||
156 | linux,code = <114>; | ||
157 | gpios = <&gpio1 3 1>; | ||
158 | gpio-key,wakeup; | ||
159 | }; | ||
160 | }; | ||
43 | }; | 161 | }; |
44 | 162 | ||
45 | /include/ "tps65910.dtsi" | 163 | /include/ "tps65910.dtsi" |
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts new file mode 100644 index 000000000000..f5a6162a4ff2 --- /dev/null +++ b/arch/arm/boot/dts/am335x-evmsk.dts | |||
@@ -0,0 +1,250 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * AM335x Starter Kit | ||
11 | * http://www.ti.com/tool/tmdssk3358 | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | |||
16 | /include/ "am33xx.dtsi" | ||
17 | |||
18 | / { | ||
19 | model = "TI AM335x EVM-SK"; | ||
20 | compatible = "ti,am335x-evmsk", "ti,am33xx"; | ||
21 | |||
22 | cpus { | ||
23 | cpu@0 { | ||
24 | cpu0-supply = <&vdd1_reg>; | ||
25 | }; | ||
26 | }; | ||
27 | |||
28 | memory { | ||
29 | device_type = "memory"; | ||
30 | reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
31 | }; | ||
32 | |||
33 | am33xx_pinmux: pinmux@44e10800 { | ||
34 | pinctrl-names = "default"; | ||
35 | pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>; | ||
36 | |||
37 | user_leds_s0: user_leds_s0 { | ||
38 | pinctrl-single,pins = < | ||
39 | 0x10 0x7 /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */ | ||
40 | 0x14 0x7 /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */ | ||
41 | 0x18 0x7 /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */ | ||
42 | 0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */ | ||
43 | >; | ||
44 | }; | ||
45 | |||
46 | gpio_keys_s0: gpio_keys_s0 { | ||
47 | pinctrl-single,pins = < | ||
48 | 0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */ | ||
49 | 0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */ | ||
50 | 0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */ | ||
51 | 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ | ||
52 | >; | ||
53 | }; | ||
54 | }; | ||
55 | |||
56 | ocp { | ||
57 | uart1: serial@44e09000 { | ||
58 | status = "okay"; | ||
59 | }; | ||
60 | |||
61 | i2c1: i2c@44e0b000 { | ||
62 | status = "okay"; | ||
63 | clock-frequency = <400000>; | ||
64 | |||
65 | tps: tps@2d { | ||
66 | reg = <0x2d>; | ||
67 | }; | ||
68 | |||
69 | lis331dlh: lis331dlh@18 { | ||
70 | compatible = "st,lis331dlh", "st,lis3lv02d"; | ||
71 | reg = <0x18>; | ||
72 | Vdd-supply = <&lis3_reg>; | ||
73 | Vdd_IO-supply = <&lis3_reg>; | ||
74 | |||
75 | st,click-single-x; | ||
76 | st,click-single-y; | ||
77 | st,click-single-z; | ||
78 | st,click-thresh-x = <10>; | ||
79 | st,click-thresh-y = <10>; | ||
80 | st,click-thresh-z = <10>; | ||
81 | st,irq1-click; | ||
82 | st,irq2-click; | ||
83 | st,wakeup-x-lo; | ||
84 | st,wakeup-x-hi; | ||
85 | st,wakeup-y-lo; | ||
86 | st,wakeup-y-hi; | ||
87 | st,wakeup-z-lo; | ||
88 | st,wakeup-z-hi; | ||
89 | st,min-limit-x = <120>; | ||
90 | st,min-limit-y = <120>; | ||
91 | st,min-limit-z = <140>; | ||
92 | st,max-limit-x = <550>; | ||
93 | st,max-limit-y = <550>; | ||
94 | st,max-limit-z = <750>; | ||
95 | }; | ||
96 | }; | ||
97 | }; | ||
98 | |||
99 | vbat: fixedregulator@0 { | ||
100 | compatible = "regulator-fixed"; | ||
101 | regulator-name = "vbat"; | ||
102 | regulator-min-microvolt = <5000000>; | ||
103 | regulator-max-microvolt = <5000000>; | ||
104 | regulator-boot-on; | ||
105 | }; | ||
106 | |||
107 | lis3_reg: fixedregulator@1 { | ||
108 | compatible = "regulator-fixed"; | ||
109 | regulator-name = "lis3_reg"; | ||
110 | regulator-boot-on; | ||
111 | }; | ||
112 | |||
113 | leds { | ||
114 | compatible = "gpio-leds"; | ||
115 | |||
116 | led@1 { | ||
117 | label = "evmsk:green:usr0"; | ||
118 | gpios = <&gpio2 4 0>; | ||
119 | default-state = "off"; | ||
120 | }; | ||
121 | |||
122 | led@2 { | ||
123 | label = "evmsk:green:usr1"; | ||
124 | gpios = <&gpio2 5 0>; | ||
125 | default-state = "off"; | ||
126 | }; | ||
127 | |||
128 | led@3 { | ||
129 | label = "evmsk:green:mmc0"; | ||
130 | gpios = <&gpio2 6 0>; | ||
131 | linux,default-trigger = "mmc0"; | ||
132 | default-state = "off"; | ||
133 | }; | ||
134 | |||
135 | led@4 { | ||
136 | label = "evmsk:green:heartbeat"; | ||
137 | gpios = <&gpio2 7 0>; | ||
138 | linux,default-trigger = "heartbeat"; | ||
139 | default-state = "off"; | ||
140 | }; | ||
141 | }; | ||
142 | |||
143 | gpio_buttons: gpio_buttons@0 { | ||
144 | compatible = "gpio-keys"; | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | |||
148 | switch@1 { | ||
149 | label = "button0"; | ||
150 | linux,code = <0x100>; | ||
151 | gpios = <&gpio3 3 0>; | ||
152 | }; | ||
153 | |||
154 | switch@2 { | ||
155 | label = "button1"; | ||
156 | linux,code = <0x101>; | ||
157 | gpios = <&gpio3 2 0>; | ||
158 | }; | ||
159 | |||
160 | switch@3 { | ||
161 | label = "button2"; | ||
162 | linux,code = <0x102>; | ||
163 | gpios = <&gpio1 30 0>; | ||
164 | gpio-key,wakeup; | ||
165 | }; | ||
166 | |||
167 | switch@4 { | ||
168 | label = "button3"; | ||
169 | linux,code = <0x103>; | ||
170 | gpios = <&gpio3 5 0>; | ||
171 | }; | ||
172 | }; | ||
173 | }; | ||
174 | |||
175 | /include/ "tps65910.dtsi" | ||
176 | |||
177 | &tps { | ||
178 | vcc1-supply = <&vbat>; | ||
179 | vcc2-supply = <&vbat>; | ||
180 | vcc3-supply = <&vbat>; | ||
181 | vcc4-supply = <&vbat>; | ||
182 | vcc5-supply = <&vbat>; | ||
183 | vcc6-supply = <&vbat>; | ||
184 | vcc7-supply = <&vbat>; | ||
185 | vccio-supply = <&vbat>; | ||
186 | |||
187 | regulators { | ||
188 | vrtc_reg: regulator@0 { | ||
189 | regulator-always-on; | ||
190 | }; | ||
191 | |||
192 | vio_reg: regulator@1 { | ||
193 | regulator-always-on; | ||
194 | }; | ||
195 | |||
196 | vdd1_reg: regulator@2 { | ||
197 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | ||
198 | regulator-name = "vdd_mpu"; | ||
199 | regulator-min-microvolt = <912500>; | ||
200 | regulator-max-microvolt = <1312500>; | ||
201 | regulator-boot-on; | ||
202 | regulator-always-on; | ||
203 | }; | ||
204 | |||
205 | vdd2_reg: regulator@3 { | ||
206 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | ||
207 | regulator-name = "vdd_core"; | ||
208 | regulator-min-microvolt = <912500>; | ||
209 | regulator-max-microvolt = <1150000>; | ||
210 | regulator-boot-on; | ||
211 | regulator-always-on; | ||
212 | }; | ||
213 | |||
214 | vdd3_reg: regulator@4 { | ||
215 | regulator-always-on; | ||
216 | }; | ||
217 | |||
218 | vdig1_reg: regulator@5 { | ||
219 | regulator-always-on; | ||
220 | }; | ||
221 | |||
222 | vdig2_reg: regulator@6 { | ||
223 | regulator-always-on; | ||
224 | }; | ||
225 | |||
226 | vpll_reg: regulator@7 { | ||
227 | regulator-always-on; | ||
228 | }; | ||
229 | |||
230 | vdac_reg: regulator@8 { | ||
231 | regulator-always-on; | ||
232 | }; | ||
233 | |||
234 | vaux1_reg: regulator@9 { | ||
235 | regulator-always-on; | ||
236 | }; | ||
237 | |||
238 | vaux2_reg: regulator@10 { | ||
239 | regulator-always-on; | ||
240 | }; | ||
241 | |||
242 | vaux33_reg: regulator@11 { | ||
243 | regulator-always-on; | ||
244 | }; | ||
245 | |||
246 | vmmc_reg: regulator@12 { | ||
247 | regulator-always-on; | ||
248 | }; | ||
249 | }; | ||
250 | }; | ||
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index bb31bff01998..20a3f29a6bfe 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,am33xx"; | 14 | compatible = "ti,am33xx"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -25,6 +26,21 @@ | |||
25 | cpus { | 26 | cpus { |
26 | cpu@0 { | 27 | cpu@0 { |
27 | compatible = "arm,cortex-a8"; | 28 | compatible = "arm,cortex-a8"; |
29 | |||
30 | /* | ||
31 | * To consider voltage drop between PMIC and SoC, | ||
32 | * tolerance value is reduced to 2% from 4% and | ||
33 | * voltage value is increased as a precaution. | ||
34 | */ | ||
35 | operating-points = < | ||
36 | /* kHz uV */ | ||
37 | 720000 1285000 | ||
38 | 600000 1225000 | ||
39 | 500000 1125000 | ||
40 | 275000 1125000 | ||
41 | >; | ||
42 | voltage-tolerance = <2>; /* 2 percentage */ | ||
43 | clock-latency = <300000>; /* From omap-cpufreq driver */ | ||
28 | }; | 44 | }; |
29 | }; | 45 | }; |
30 | 46 | ||
@@ -40,6 +56,15 @@ | |||
40 | }; | 56 | }; |
41 | }; | 57 | }; |
42 | 58 | ||
59 | am33xx_pinmux: pinmux@44e10800 { | ||
60 | compatible = "pinctrl-single"; | ||
61 | reg = <0x44e10800 0x0238>; | ||
62 | #address-cells = <1>; | ||
63 | #size-cells = <0>; | ||
64 | pinctrl-single,register-width = <32>; | ||
65 | pinctrl-single,function-mask = <0x7f>; | ||
66 | }; | ||
67 | |||
43 | /* | 68 | /* |
44 | * XXX: Use a flat representation of the AM33XX interconnect. | 69 | * XXX: Use a flat representation of the AM33XX interconnect. |
45 | * The real AM33XX interconnect network is quite complex.Since | 70 | * The real AM33XX interconnect network is quite complex.Since |
@@ -70,7 +95,6 @@ | |||
70 | interrupt-controller; | 95 | interrupt-controller; |
71 | #interrupt-cells = <1>; | 96 | #interrupt-cells = <1>; |
72 | reg = <0x44e07000 0x1000>; | 97 | reg = <0x44e07000 0x1000>; |
73 | interrupt-parent = <&intc>; | ||
74 | interrupts = <96>; | 98 | interrupts = <96>; |
75 | }; | 99 | }; |
76 | 100 | ||
@@ -82,7 +106,6 @@ | |||
82 | interrupt-controller; | 106 | interrupt-controller; |
83 | #interrupt-cells = <1>; | 107 | #interrupt-cells = <1>; |
84 | reg = <0x4804c000 0x1000>; | 108 | reg = <0x4804c000 0x1000>; |
85 | interrupt-parent = <&intc>; | ||
86 | interrupts = <98>; | 109 | interrupts = <98>; |
87 | }; | 110 | }; |
88 | 111 | ||
@@ -94,7 +117,6 @@ | |||
94 | interrupt-controller; | 117 | interrupt-controller; |
95 | #interrupt-cells = <1>; | 118 | #interrupt-cells = <1>; |
96 | reg = <0x481ac000 0x1000>; | 119 | reg = <0x481ac000 0x1000>; |
97 | interrupt-parent = <&intc>; | ||
98 | interrupts = <32>; | 120 | interrupts = <32>; |
99 | }; | 121 | }; |
100 | 122 | ||
@@ -106,7 +128,6 @@ | |||
106 | interrupt-controller; | 128 | interrupt-controller; |
107 | #interrupt-cells = <1>; | 129 | #interrupt-cells = <1>; |
108 | reg = <0x481ae000 0x1000>; | 130 | reg = <0x481ae000 0x1000>; |
109 | interrupt-parent = <&intc>; | ||
110 | interrupts = <62>; | 131 | interrupts = <62>; |
111 | }; | 132 | }; |
112 | 133 | ||
@@ -115,7 +136,6 @@ | |||
115 | ti,hwmods = "uart1"; | 136 | ti,hwmods = "uart1"; |
116 | clock-frequency = <48000000>; | 137 | clock-frequency = <48000000>; |
117 | reg = <0x44e09000 0x2000>; | 138 | reg = <0x44e09000 0x2000>; |
118 | interrupt-parent = <&intc>; | ||
119 | interrupts = <72>; | 139 | interrupts = <72>; |
120 | status = "disabled"; | 140 | status = "disabled"; |
121 | }; | 141 | }; |
@@ -125,7 +145,6 @@ | |||
125 | ti,hwmods = "uart2"; | 145 | ti,hwmods = "uart2"; |
126 | clock-frequency = <48000000>; | 146 | clock-frequency = <48000000>; |
127 | reg = <0x48022000 0x2000>; | 147 | reg = <0x48022000 0x2000>; |
128 | interrupt-parent = <&intc>; | ||
129 | interrupts = <73>; | 148 | interrupts = <73>; |
130 | status = "disabled"; | 149 | status = "disabled"; |
131 | }; | 150 | }; |
@@ -135,7 +154,6 @@ | |||
135 | ti,hwmods = "uart3"; | 154 | ti,hwmods = "uart3"; |
136 | clock-frequency = <48000000>; | 155 | clock-frequency = <48000000>; |
137 | reg = <0x48024000 0x2000>; | 156 | reg = <0x48024000 0x2000>; |
138 | interrupt-parent = <&intc>; | ||
139 | interrupts = <74>; | 157 | interrupts = <74>; |
140 | status = "disabled"; | 158 | status = "disabled"; |
141 | }; | 159 | }; |
@@ -145,7 +163,6 @@ | |||
145 | ti,hwmods = "uart4"; | 163 | ti,hwmods = "uart4"; |
146 | clock-frequency = <48000000>; | 164 | clock-frequency = <48000000>; |
147 | reg = <0x481a6000 0x2000>; | 165 | reg = <0x481a6000 0x2000>; |
148 | interrupt-parent = <&intc>; | ||
149 | interrupts = <44>; | 166 | interrupts = <44>; |
150 | status = "disabled"; | 167 | status = "disabled"; |
151 | }; | 168 | }; |
@@ -155,7 +172,6 @@ | |||
155 | ti,hwmods = "uart5"; | 172 | ti,hwmods = "uart5"; |
156 | clock-frequency = <48000000>; | 173 | clock-frequency = <48000000>; |
157 | reg = <0x481a8000 0x2000>; | 174 | reg = <0x481a8000 0x2000>; |
158 | interrupt-parent = <&intc>; | ||
159 | interrupts = <45>; | 175 | interrupts = <45>; |
160 | status = "disabled"; | 176 | status = "disabled"; |
161 | }; | 177 | }; |
@@ -165,7 +181,6 @@ | |||
165 | ti,hwmods = "uart6"; | 181 | ti,hwmods = "uart6"; |
166 | clock-frequency = <48000000>; | 182 | clock-frequency = <48000000>; |
167 | reg = <0x481aa000 0x2000>; | 183 | reg = <0x481aa000 0x2000>; |
168 | interrupt-parent = <&intc>; | ||
169 | interrupts = <46>; | 184 | interrupts = <46>; |
170 | status = "disabled"; | 185 | status = "disabled"; |
171 | }; | 186 | }; |
@@ -176,7 +191,6 @@ | |||
176 | #size-cells = <0>; | 191 | #size-cells = <0>; |
177 | ti,hwmods = "i2c1"; | 192 | ti,hwmods = "i2c1"; |
178 | reg = <0x44e0b000 0x1000>; | 193 | reg = <0x44e0b000 0x1000>; |
179 | interrupt-parent = <&intc>; | ||
180 | interrupts = <70>; | 194 | interrupts = <70>; |
181 | status = "disabled"; | 195 | status = "disabled"; |
182 | }; | 196 | }; |
@@ -187,7 +201,6 @@ | |||
187 | #size-cells = <0>; | 201 | #size-cells = <0>; |
188 | ti,hwmods = "i2c2"; | 202 | ti,hwmods = "i2c2"; |
189 | reg = <0x4802a000 0x1000>; | 203 | reg = <0x4802a000 0x1000>; |
190 | interrupt-parent = <&intc>; | ||
191 | interrupts = <71>; | 204 | interrupts = <71>; |
192 | status = "disabled"; | 205 | status = "disabled"; |
193 | }; | 206 | }; |
@@ -198,7 +211,6 @@ | |||
198 | #size-cells = <0>; | 211 | #size-cells = <0>; |
199 | ti,hwmods = "i2c3"; | 212 | ti,hwmods = "i2c3"; |
200 | reg = <0x4819c000 0x1000>; | 213 | reg = <0x4819c000 0x1000>; |
201 | interrupt-parent = <&intc>; | ||
202 | interrupts = <30>; | 214 | interrupts = <30>; |
203 | status = "disabled"; | 215 | status = "disabled"; |
204 | }; | 216 | }; |
@@ -207,8 +219,124 @@ | |||
207 | compatible = "ti,omap3-wdt"; | 219 | compatible = "ti,omap3-wdt"; |
208 | ti,hwmods = "wd_timer2"; | 220 | ti,hwmods = "wd_timer2"; |
209 | reg = <0x44e35000 0x1000>; | 221 | reg = <0x44e35000 0x1000>; |
210 | interrupt-parent = <&intc>; | ||
211 | interrupts = <91>; | 222 | interrupts = <91>; |
212 | }; | 223 | }; |
224 | |||
225 | dcan0: d_can@481cc000 { | ||
226 | compatible = "bosch,d_can"; | ||
227 | ti,hwmods = "d_can0"; | ||
228 | reg = <0x481cc000 0x2000>; | ||
229 | interrupts = <52>; | ||
230 | status = "disabled"; | ||
231 | }; | ||
232 | |||
233 | dcan1: d_can@481d0000 { | ||
234 | compatible = "bosch,d_can"; | ||
235 | ti,hwmods = "d_can1"; | ||
236 | reg = <0x481d0000 0x2000>; | ||
237 | interrupts = <55>; | ||
238 | status = "disabled"; | ||
239 | }; | ||
240 | |||
241 | timer1: timer@44e31000 { | ||
242 | compatible = "ti,omap2-timer"; | ||
243 | reg = <0x44e31000 0x400>; | ||
244 | interrupts = <67>; | ||
245 | ti,hwmods = "timer1"; | ||
246 | ti,timer-alwon; | ||
247 | }; | ||
248 | |||
249 | timer2: timer@48040000 { | ||
250 | compatible = "ti,omap2-timer"; | ||
251 | reg = <0x48040000 0x400>; | ||
252 | interrupts = <68>; | ||
253 | ti,hwmods = "timer2"; | ||
254 | }; | ||
255 | |||
256 | timer3: timer@48042000 { | ||
257 | compatible = "ti,omap2-timer"; | ||
258 | reg = <0x48042000 0x400>; | ||
259 | interrupts = <69>; | ||
260 | ti,hwmods = "timer3"; | ||
261 | }; | ||
262 | |||
263 | timer4: timer@48044000 { | ||
264 | compatible = "ti,omap2-timer"; | ||
265 | reg = <0x48044000 0x400>; | ||
266 | interrupts = <92>; | ||
267 | ti,hwmods = "timer4"; | ||
268 | ti,timer-pwm; | ||
269 | }; | ||
270 | |||
271 | timer5: timer@48046000 { | ||
272 | compatible = "ti,omap2-timer"; | ||
273 | reg = <0x48046000 0x400>; | ||
274 | interrupts = <93>; | ||
275 | ti,hwmods = "timer5"; | ||
276 | ti,timer-pwm; | ||
277 | }; | ||
278 | |||
279 | timer6: timer@48048000 { | ||
280 | compatible = "ti,omap2-timer"; | ||
281 | reg = <0x48048000 0x400>; | ||
282 | interrupts = <94>; | ||
283 | ti,hwmods = "timer6"; | ||
284 | ti,timer-pwm; | ||
285 | }; | ||
286 | |||
287 | timer7: timer@4804a000 { | ||
288 | compatible = "ti,omap2-timer"; | ||
289 | reg = <0x4804a000 0x400>; | ||
290 | interrupts = <95>; | ||
291 | ti,hwmods = "timer7"; | ||
292 | ti,timer-pwm; | ||
293 | }; | ||
294 | |||
295 | rtc@44e3e000 { | ||
296 | compatible = "ti,da830-rtc"; | ||
297 | reg = <0x44e3e000 0x1000>; | ||
298 | interrupts = <75 | ||
299 | 76>; | ||
300 | ti,hwmods = "rtc"; | ||
301 | }; | ||
302 | |||
303 | spi0: spi@48030000 { | ||
304 | compatible = "ti,omap4-mcspi"; | ||
305 | #address-cells = <1>; | ||
306 | #size-cells = <0>; | ||
307 | reg = <0x48030000 0x400>; | ||
308 | interrupt = <65>; | ||
309 | ti,spi-num-cs = <2>; | ||
310 | ti,hwmods = "spi0"; | ||
311 | status = "disabled"; | ||
312 | }; | ||
313 | |||
314 | spi1: spi@481a0000 { | ||
315 | compatible = "ti,omap4-mcspi"; | ||
316 | #address-cells = <1>; | ||
317 | #size-cells = <0>; | ||
318 | reg = <0x481a0000 0x400>; | ||
319 | interrupt = <125>; | ||
320 | ti,spi-num-cs = <2>; | ||
321 | ti,hwmods = "spi1"; | ||
322 | status = "disabled"; | ||
323 | }; | ||
324 | |||
325 | usb@47400000 { | ||
326 | compatible = "ti,musb-am33xx"; | ||
327 | reg = <0x47400000 0x1000 /* usbss */ | ||
328 | 0x47401000 0x800 /* musb instance 0 */ | ||
329 | 0x47401800 0x800>; /* musb instance 1 */ | ||
330 | interrupts = <17 /* usbss */ | ||
331 | 18 /* musb instance 0 */ | ||
332 | 19>; /* musb instance 1 */ | ||
333 | multipoint = <1>; | ||
334 | num-eps = <16>; | ||
335 | ram-bits = <12>; | ||
336 | port0-mode = <3>; | ||
337 | port1-mode = <3>; | ||
338 | power = <250>; | ||
339 | ti,hwmods = "usb_otg_hs"; | ||
340 | }; | ||
213 | }; | 341 | }; |
214 | }; | 342 | }; |
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 3e54f1498841..67d672792b0d 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -113,7 +113,7 @@ | |||
113 | i2c1: i2c@10012000 { | 113 | i2c1: i2c@10012000 { |
114 | #address-cells = <1>; | 114 | #address-cells = <1>; |
115 | #size-cells = <0>; | 115 | #size-cells = <0>; |
116 | compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; | 116 | compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; |
117 | reg = <0x10012000 0x1000>; | 117 | reg = <0x10012000 0x1000>; |
118 | interrupts = <12>; | 118 | interrupts = <12>; |
119 | status = "disabled"; | 119 | status = "disabled"; |
@@ -205,7 +205,7 @@ | |||
205 | i2c2: i2c@1001d000 { | 205 | i2c2: i2c@1001d000 { |
206 | #address-cells = <1>; | 206 | #address-cells = <1>; |
207 | #size-cells = <0>; | 207 | #size-cells = <0>; |
208 | compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; | 208 | compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; |
209 | reg = <0x1001d000 0x1000>; | 209 | reg = <0x1001d000 0x1000>; |
210 | interrupts = <1>; | 210 | interrupts = <1>; |
211 | status = "disabled"; | 211 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 75d069fcf897..54aea74769a1 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -377,7 +377,7 @@ | |||
377 | i2c@83fc4000 { /* I2C2 */ | 377 | i2c@83fc4000 { /* I2C2 */ |
378 | #address-cells = <1>; | 378 | #address-cells = <1>; |
379 | #size-cells = <0>; | 379 | #size-cells = <0>; |
380 | compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | 380 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
381 | reg = <0x83fc4000 0x4000>; | 381 | reg = <0x83fc4000 0x4000>; |
382 | interrupts = <63>; | 382 | interrupts = <63>; |
383 | status = "disabled"; | 383 | status = "disabled"; |
@@ -386,7 +386,7 @@ | |||
386 | i2c@83fc8000 { /* I2C1 */ | 386 | i2c@83fc8000 { /* I2C1 */ |
387 | #address-cells = <1>; | 387 | #address-cells = <1>; |
388 | #size-cells = <0>; | 388 | #size-cells = <0>; |
389 | compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | 389 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
390 | reg = <0x83fc8000 0x4000>; | 390 | reg = <0x83fc8000 0x4000>; |
391 | interrupts = <62>; | 391 | interrupts = <62>; |
392 | status = "disabled"; | 392 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 76ebb1ad2675..caf09ff73f10 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -432,7 +432,7 @@ | |||
432 | i2c@53fec000 { /* I2C3 */ | 432 | i2c@53fec000 { /* I2C3 */ |
433 | #address-cells = <1>; | 433 | #address-cells = <1>; |
434 | #size-cells = <0>; | 434 | #size-cells = <0>; |
435 | compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | 435 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
436 | reg = <0x53fec000 0x4000>; | 436 | reg = <0x53fec000 0x4000>; |
437 | interrupts = <64>; | 437 | interrupts = <64>; |
438 | status = "disabled"; | 438 | status = "disabled"; |
@@ -488,7 +488,7 @@ | |||
488 | i2c@63fc4000 { /* I2C2 */ | 488 | i2c@63fc4000 { /* I2C2 */ |
489 | #address-cells = <1>; | 489 | #address-cells = <1>; |
490 | #size-cells = <0>; | 490 | #size-cells = <0>; |
491 | compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | 491 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
492 | reg = <0x63fc4000 0x4000>; | 492 | reg = <0x63fc4000 0x4000>; |
493 | interrupts = <63>; | 493 | interrupts = <63>; |
494 | status = "disabled"; | 494 | status = "disabled"; |
@@ -497,7 +497,7 @@ | |||
497 | i2c@63fc8000 { /* I2C1 */ | 497 | i2c@63fc8000 { /* I2C1 */ |
498 | #address-cells = <1>; | 498 | #address-cells = <1>; |
499 | #size-cells = <0>; | 499 | #size-cells = <0>; |
500 | compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | 500 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
501 | reg = <0x63fc8000 0x4000>; | 501 | reg = <0x63fc8000 0x4000>; |
502 | interrupts = <62>; | 502 | interrupts = <62>; |
503 | status = "disabled"; | 503 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f3990b04fecf..f604a44a5c66 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -882,7 +882,7 @@ | |||
882 | i2c@021a0000 { /* I2C1 */ | 882 | i2c@021a0000 { /* I2C1 */ |
883 | #address-cells = <1>; | 883 | #address-cells = <1>; |
884 | #size-cells = <0>; | 884 | #size-cells = <0>; |
885 | compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | 885 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
886 | reg = <0x021a0000 0x4000>; | 886 | reg = <0x021a0000 0x4000>; |
887 | interrupts = <0 36 0x04>; | 887 | interrupts = <0 36 0x04>; |
888 | clocks = <&clks 125>; | 888 | clocks = <&clks 125>; |
@@ -892,7 +892,7 @@ | |||
892 | i2c@021a4000 { /* I2C2 */ | 892 | i2c@021a4000 { /* I2C2 */ |
893 | #address-cells = <1>; | 893 | #address-cells = <1>; |
894 | #size-cells = <0>; | 894 | #size-cells = <0>; |
895 | compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | 895 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
896 | reg = <0x021a4000 0x4000>; | 896 | reg = <0x021a4000 0x4000>; |
897 | interrupts = <0 37 0x04>; | 897 | interrupts = <0 37 0x04>; |
898 | clocks = <&clks 126>; | 898 | clocks = <&clks 126>; |
@@ -902,7 +902,7 @@ | |||
902 | i2c@021a8000 { /* I2C3 */ | 902 | i2c@021a8000 { /* I2C3 */ |
903 | #address-cells = <1>; | 903 | #address-cells = <1>; |
904 | #size-cells = <0>; | 904 | #size-cells = <0>; |
905 | compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | 905 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
906 | reg = <0x021a8000 0x4000>; | 906 | reg = <0x021a8000 0x4000>; |
907 | interrupts = <0 38 0x04>; | 907 | interrupts = <0 38 0x04>; |
908 | clocks = <&clks 127>; | 908 | clocks = <&clks 127>; |
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts index 61767757b50a..c9c3fa344647 100644 --- a/arch/arm/boot/dts/integratorap.dts +++ b/arch/arm/boot/dts/integratorap.dts | |||
@@ -18,6 +18,11 @@ | |||
18 | bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; | 18 | bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk"; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | syscon { | ||
22 | /* AP system controller registers */ | ||
23 | reg = <0x11000000 0x100>; | ||
24 | }; | ||
25 | |||
21 | timer0: timer@13000000 { | 26 | timer0: timer@13000000 { |
22 | compatible = "arm,integrator-timer"; | 27 | compatible = "arm,integrator-timer"; |
23 | }; | 28 | }; |
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 2dd5e4e48481..8b119399025a 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts | |||
@@ -18,6 +18,11 @@ | |||
18 | bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; | 18 | bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | cpcon { | ||
22 | /* CP controller registers */ | ||
23 | reg = <0xcb000000 0x100>; | ||
24 | }; | ||
25 | |||
21 | timer0: timer@13000000 { | 26 | timer0: timer@13000000 { |
22 | compatible = "arm,sp804", "arm,primecell"; | 27 | compatible = "arm,sp804", "arm,primecell"; |
23 | }; | 28 | }; |
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 581cb081cb0f..761c4b69b25b 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; | 14 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -65,5 +66,90 @@ | |||
65 | ti,hwmods = "uart3"; | 66 | ti,hwmods = "uart3"; |
66 | clock-frequency = <48000000>; | 67 | clock-frequency = <48000000>; |
67 | }; | 68 | }; |
69 | |||
70 | timer2: timer@4802a000 { | ||
71 | compatible = "ti,omap2-timer"; | ||
72 | reg = <0x4802a000 0x400>; | ||
73 | interrupts = <38>; | ||
74 | ti,hwmods = "timer2"; | ||
75 | }; | ||
76 | |||
77 | timer3: timer@48078000 { | ||
78 | compatible = "ti,omap2-timer"; | ||
79 | reg = <0x48078000 0x400>; | ||
80 | interrupts = <39>; | ||
81 | ti,hwmods = "timer3"; | ||
82 | }; | ||
83 | |||
84 | timer4: timer@4807a000 { | ||
85 | compatible = "ti,omap2-timer"; | ||
86 | reg = <0x4807a000 0x400>; | ||
87 | interrupts = <40>; | ||
88 | ti,hwmods = "timer4"; | ||
89 | }; | ||
90 | |||
91 | timer5: timer@4807c000 { | ||
92 | compatible = "ti,omap2-timer"; | ||
93 | reg = <0x4807c000 0x400>; | ||
94 | interrupts = <41>; | ||
95 | ti,hwmods = "timer5"; | ||
96 | ti,timer-dsp; | ||
97 | }; | ||
98 | |||
99 | timer6: timer@4807e000 { | ||
100 | compatible = "ti,omap2-timer"; | ||
101 | reg = <0x4807e000 0x400>; | ||
102 | interrupts = <42>; | ||
103 | ti,hwmods = "timer6"; | ||
104 | ti,timer-dsp; | ||
105 | }; | ||
106 | |||
107 | timer7: timer@48080000 { | ||
108 | compatible = "ti,omap2-timer"; | ||
109 | reg = <0x48080000 0x400>; | ||
110 | interrupts = <43>; | ||
111 | ti,hwmods = "timer7"; | ||
112 | ti,timer-dsp; | ||
113 | }; | ||
114 | |||
115 | timer8: timer@48082000 { | ||
116 | compatible = "ti,omap2-timer"; | ||
117 | reg = <0x48082000 0x400>; | ||
118 | interrupts = <44>; | ||
119 | ti,hwmods = "timer8"; | ||
120 | ti,timer-dsp; | ||
121 | }; | ||
122 | |||
123 | timer9: timer@48084000 { | ||
124 | compatible = "ti,omap2-timer"; | ||
125 | reg = <0x48084000 0x400>; | ||
126 | interrupts = <45>; | ||
127 | ti,hwmods = "timer9"; | ||
128 | ti,timer-pwm; | ||
129 | }; | ||
130 | |||
131 | timer10: timer@48086000 { | ||
132 | compatible = "ti,omap2-timer"; | ||
133 | reg = <0x48086000 0x400>; | ||
134 | interrupts = <46>; | ||
135 | ti,hwmods = "timer10"; | ||
136 | ti,timer-pwm; | ||
137 | }; | ||
138 | |||
139 | timer11: timer@48088000 { | ||
140 | compatible = "ti,omap2-timer"; | ||
141 | reg = <0x48088000 0x400>; | ||
142 | interrupts = <47>; | ||
143 | ti,hwmods = "timer11"; | ||
144 | ti,timer-pwm; | ||
145 | }; | ||
146 | |||
147 | timer12: timer@4808a000 { | ||
148 | compatible = "ti,omap2-timer"; | ||
149 | reg = <0x4808a000 0x400>; | ||
150 | interrupts = <48>; | ||
151 | ti,hwmods = "timer12"; | ||
152 | ti,timer-pwm; | ||
153 | }; | ||
68 | }; | 154 | }; |
69 | }; | 155 | }; |
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index bfd76b4a0ddc..af6560908905 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi | |||
@@ -14,6 +14,12 @@ | |||
14 | compatible = "ti,omap2420", "ti,omap2"; | 14 | compatible = "ti,omap2420", "ti,omap2"; |
15 | 15 | ||
16 | ocp { | 16 | ocp { |
17 | counter32k: counter@48004000 { | ||
18 | compatible = "ti,omap-counter32k"; | ||
19 | reg = <0x48004000 0x20>; | ||
20 | ti,hwmods = "counter_32k"; | ||
21 | }; | ||
22 | |||
17 | omap2420_pmx: pinmux@48000030 { | 23 | omap2420_pmx: pinmux@48000030 { |
18 | compatible = "ti,omap2420-padconf", "pinctrl-single"; | 24 | compatible = "ti,omap2420-padconf", "pinctrl-single"; |
19 | reg = <0x48000030 0x0113>; | 25 | reg = <0x48000030 0x0113>; |
@@ -30,7 +36,6 @@ | |||
30 | interrupts = <59>, /* TX interrupt */ | 36 | interrupts = <59>, /* TX interrupt */ |
31 | <60>; /* RX interrupt */ | 37 | <60>; /* RX interrupt */ |
32 | interrupt-names = "tx", "rx"; | 38 | interrupt-names = "tx", "rx"; |
33 | interrupt-parent = <&intc>; | ||
34 | ti,hwmods = "mcbsp1"; | 39 | ti,hwmods = "mcbsp1"; |
35 | }; | 40 | }; |
36 | 41 | ||
@@ -41,8 +46,15 @@ | |||
41 | interrupts = <62>, /* TX interrupt */ | 46 | interrupts = <62>, /* TX interrupt */ |
42 | <63>; /* RX interrupt */ | 47 | <63>; /* RX interrupt */ |
43 | interrupt-names = "tx", "rx"; | 48 | interrupt-names = "tx", "rx"; |
44 | interrupt-parent = <&intc>; | ||
45 | ti,hwmods = "mcbsp2"; | 49 | ti,hwmods = "mcbsp2"; |
46 | }; | 50 | }; |
51 | |||
52 | timer1: timer@48028000 { | ||
53 | compatible = "ti,omap2-timer"; | ||
54 | reg = <0x48028000 0x400>; | ||
55 | interrupts = <37>; | ||
56 | ti,hwmods = "timer1"; | ||
57 | ti,timer-alwon; | ||
58 | }; | ||
47 | }; | 59 | }; |
48 | }; | 60 | }; |
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 4565d9750f4d..c3924457c9b6 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi | |||
@@ -14,6 +14,12 @@ | |||
14 | compatible = "ti,omap2430", "ti,omap2"; | 14 | compatible = "ti,omap2430", "ti,omap2"; |
15 | 15 | ||
16 | ocp { | 16 | ocp { |
17 | counter32k: counter@49020000 { | ||
18 | compatible = "ti,omap-counter32k"; | ||
19 | reg = <0x49020000 0x20>; | ||
20 | ti,hwmods = "counter_32k"; | ||
21 | }; | ||
22 | |||
17 | omap2430_pmx: pinmux@49002030 { | 23 | omap2430_pmx: pinmux@49002030 { |
18 | compatible = "ti,omap2430-padconf", "pinctrl-single"; | 24 | compatible = "ti,omap2430-padconf", "pinctrl-single"; |
19 | reg = <0x49002030 0x0154>; | 25 | reg = <0x49002030 0x0154>; |
@@ -32,7 +38,6 @@ | |||
32 | <60>, /* RX interrupt */ | 38 | <60>, /* RX interrupt */ |
33 | <61>; /* RX overflow interrupt */ | 39 | <61>; /* RX overflow interrupt */ |
34 | interrupt-names = "common", "tx", "rx", "rx_overflow"; | 40 | interrupt-names = "common", "tx", "rx", "rx_overflow"; |
35 | interrupt-parent = <&intc>; | ||
36 | ti,buffer-size = <128>; | 41 | ti,buffer-size = <128>; |
37 | ti,hwmods = "mcbsp1"; | 42 | ti,hwmods = "mcbsp1"; |
38 | }; | 43 | }; |
@@ -45,7 +50,6 @@ | |||
45 | <62>, /* TX interrupt */ | 50 | <62>, /* TX interrupt */ |
46 | <63>; /* RX interrupt */ | 51 | <63>; /* RX interrupt */ |
47 | interrupt-names = "common", "tx", "rx"; | 52 | interrupt-names = "common", "tx", "rx"; |
48 | interrupt-parent = <&intc>; | ||
49 | ti,buffer-size = <128>; | 53 | ti,buffer-size = <128>; |
50 | ti,hwmods = "mcbsp2"; | 54 | ti,hwmods = "mcbsp2"; |
51 | }; | 55 | }; |
@@ -58,7 +62,6 @@ | |||
58 | <89>, /* TX interrupt */ | 62 | <89>, /* TX interrupt */ |
59 | <90>; /* RX interrupt */ | 63 | <90>; /* RX interrupt */ |
60 | interrupt-names = "common", "tx", "rx"; | 64 | interrupt-names = "common", "tx", "rx"; |
61 | interrupt-parent = <&intc>; | ||
62 | ti,buffer-size = <128>; | 65 | ti,buffer-size = <128>; |
63 | ti,hwmods = "mcbsp3"; | 66 | ti,hwmods = "mcbsp3"; |
64 | }; | 67 | }; |
@@ -71,7 +74,6 @@ | |||
71 | <54>, /* TX interrupt */ | 74 | <54>, /* TX interrupt */ |
72 | <55>; /* RX interrupt */ | 75 | <55>; /* RX interrupt */ |
73 | interrupt-names = "common", "tx", "rx"; | 76 | interrupt-names = "common", "tx", "rx"; |
74 | interrupt-parent = <&intc>; | ||
75 | ti,buffer-size = <128>; | 77 | ti,buffer-size = <128>; |
76 | ti,hwmods = "mcbsp4"; | 78 | ti,hwmods = "mcbsp4"; |
77 | }; | 79 | }; |
@@ -84,9 +86,16 @@ | |||
84 | <81>, /* TX interrupt */ | 86 | <81>, /* TX interrupt */ |
85 | <82>; /* RX interrupt */ | 87 | <82>; /* RX interrupt */ |
86 | interrupt-names = "common", "tx", "rx"; | 88 | interrupt-names = "common", "tx", "rx"; |
87 | interrupt-parent = <&intc>; | ||
88 | ti,buffer-size = <128>; | 89 | ti,buffer-size = <128>; |
89 | ti,hwmods = "mcbsp5"; | 90 | ti,hwmods = "mcbsp5"; |
90 | }; | 91 | }; |
92 | |||
93 | timer1: timer@49018000 { | ||
94 | compatible = "ti,omap2-timer"; | ||
95 | reg = <0x49018000 0x400>; | ||
96 | interrupts = <37>; | ||
97 | ti,hwmods = "timer1"; | ||
98 | ti,timer-alwon; | ||
99 | }; | ||
91 | }; | 100 | }; |
92 | }; | 101 | }; |
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index c38cf76df81f..3705a81c1fc2 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts | |||
@@ -55,12 +55,6 @@ | |||
55 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | 55 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ |
56 | interrupt-parent = <&intc>; | 56 | interrupt-parent = <&intc>; |
57 | 57 | ||
58 | vsim: regulator-vsim { | ||
59 | compatible = "ti,twl4030-vsim"; | ||
60 | regulator-min-microvolt = <1800000>; | ||
61 | regulator-max-microvolt = <3000000>; | ||
62 | }; | ||
63 | |||
64 | twl_audio: audio { | 58 | twl_audio: audio { |
65 | compatible = "ti,twl4030-audio"; | 59 | compatible = "ti,twl4030-audio"; |
66 | codec { | 60 | codec { |
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts new file mode 100644 index 000000000000..f624dc85d441 --- /dev/null +++ b/arch/arm/boot/dts/omap3-beagle.dts | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | /include/ "omap3.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "TI OMAP3 BeagleBoard"; | ||
14 | compatible = "ti,omap3-beagle", "ti,omap3"; | ||
15 | |||
16 | memory { | ||
17 | device_type = "memory"; | ||
18 | reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
19 | }; | ||
20 | |||
21 | leds { | ||
22 | compatible = "gpio-leds"; | ||
23 | pmu_stat { | ||
24 | label = "beagleboard::pmu_stat"; | ||
25 | gpios = <&twl_gpio 19 0>; /* LEDB */ | ||
26 | }; | ||
27 | |||
28 | heartbeat { | ||
29 | label = "beagleboard::usr0"; | ||
30 | gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ | ||
31 | linux,default-trigger = "heartbeat"; | ||
32 | }; | ||
33 | |||
34 | mmc { | ||
35 | label = "beagleboard::usr1"; | ||
36 | gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ | ||
37 | linux,default-trigger = "mmc0"; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | }; | ||
42 | |||
43 | &i2c1 { | ||
44 | clock-frequency = <2600000>; | ||
45 | |||
46 | twl: twl@48 { | ||
47 | reg = <0x48>; | ||
48 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | ||
49 | interrupt-parent = <&intc>; | ||
50 | }; | ||
51 | }; | ||
52 | |||
53 | /include/ "twl4030.dtsi" | ||
54 | |||
55 | &mmc1 { | ||
56 | vmmc-supply = <&vmmc1>; | ||
57 | vmmc_aux-supply = <&vsim>; | ||
58 | bus-width = <8>; | ||
59 | }; | ||
60 | |||
61 | &mmc2 { | ||
62 | status = "disabled"; | ||
63 | }; | ||
64 | |||
65 | &mmc3 { | ||
66 | status = "disabled"; | ||
67 | }; | ||
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 696e929d0304..1acc26148ffc 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,omap3430", "ti,omap3"; | 14 | compatible = "ti,omap3430", "ti,omap3"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -60,6 +61,12 @@ | |||
60 | ranges; | 61 | ranges; |
61 | ti,hwmods = "l3_main"; | 62 | ti,hwmods = "l3_main"; |
62 | 63 | ||
64 | counter32k: counter@48320000 { | ||
65 | compatible = "ti,omap-counter32k"; | ||
66 | reg = <0x48320000 0x20>; | ||
67 | ti,hwmods = "counter_32k"; | ||
68 | }; | ||
69 | |||
63 | intc: interrupt-controller@48200000 { | 70 | intc: interrupt-controller@48200000 { |
64 | compatible = "ti,omap2-intc"; | 71 | compatible = "ti,omap2-intc"; |
65 | interrupt-controller; | 72 | interrupt-controller; |
@@ -240,7 +247,6 @@ | |||
240 | <59>, /* TX interrupt */ | 247 | <59>, /* TX interrupt */ |
241 | <60>; /* RX interrupt */ | 248 | <60>; /* RX interrupt */ |
242 | interrupt-names = "common", "tx", "rx"; | 249 | interrupt-names = "common", "tx", "rx"; |
243 | interrupt-parent = <&intc>; | ||
244 | ti,buffer-size = <128>; | 250 | ti,buffer-size = <128>; |
245 | ti,hwmods = "mcbsp1"; | 251 | ti,hwmods = "mcbsp1"; |
246 | }; | 252 | }; |
@@ -255,7 +261,6 @@ | |||
255 | <63>, /* RX interrupt */ | 261 | <63>, /* RX interrupt */ |
256 | <4>; /* Sidetone */ | 262 | <4>; /* Sidetone */ |
257 | interrupt-names = "common", "tx", "rx", "sidetone"; | 263 | interrupt-names = "common", "tx", "rx", "sidetone"; |
258 | interrupt-parent = <&intc>; | ||
259 | ti,buffer-size = <1280>; | 264 | ti,buffer-size = <1280>; |
260 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; | 265 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; |
261 | }; | 266 | }; |
@@ -270,7 +275,6 @@ | |||
270 | <90>, /* RX interrupt */ | 275 | <90>, /* RX interrupt */ |
271 | <5>; /* Sidetone */ | 276 | <5>; /* Sidetone */ |
272 | interrupt-names = "common", "tx", "rx", "sidetone"; | 277 | interrupt-names = "common", "tx", "rx", "sidetone"; |
273 | interrupt-parent = <&intc>; | ||
274 | ti,buffer-size = <128>; | 278 | ti,buffer-size = <128>; |
275 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; | 279 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; |
276 | }; | 280 | }; |
@@ -283,7 +287,6 @@ | |||
283 | <54>, /* TX interrupt */ | 287 | <54>, /* TX interrupt */ |
284 | <55>; /* RX interrupt */ | 288 | <55>; /* RX interrupt */ |
285 | interrupt-names = "common", "tx", "rx"; | 289 | interrupt-names = "common", "tx", "rx"; |
286 | interrupt-parent = <&intc>; | ||
287 | ti,buffer-size = <128>; | 290 | ti,buffer-size = <128>; |
288 | ti,hwmods = "mcbsp4"; | 291 | ti,hwmods = "mcbsp4"; |
289 | }; | 292 | }; |
@@ -296,9 +299,103 @@ | |||
296 | <81>, /* TX interrupt */ | 299 | <81>, /* TX interrupt */ |
297 | <82>; /* RX interrupt */ | 300 | <82>; /* RX interrupt */ |
298 | interrupt-names = "common", "tx", "rx"; | 301 | interrupt-names = "common", "tx", "rx"; |
299 | interrupt-parent = <&intc>; | ||
300 | ti,buffer-size = <128>; | 302 | ti,buffer-size = <128>; |
301 | ti,hwmods = "mcbsp5"; | 303 | ti,hwmods = "mcbsp5"; |
302 | }; | 304 | }; |
305 | |||
306 | timer1: timer@48318000 { | ||
307 | compatible = "ti,omap2-timer"; | ||
308 | reg = <0x48318000 0x400>; | ||
309 | interrupts = <37>; | ||
310 | ti,hwmods = "timer1"; | ||
311 | ti,timer-alwon; | ||
312 | }; | ||
313 | |||
314 | timer2: timer@49032000 { | ||
315 | compatible = "ti,omap2-timer"; | ||
316 | reg = <0x49032000 0x400>; | ||
317 | interrupts = <38>; | ||
318 | ti,hwmods = "timer2"; | ||
319 | }; | ||
320 | |||
321 | timer3: timer@49034000 { | ||
322 | compatible = "ti,omap2-timer"; | ||
323 | reg = <0x49034000 0x400>; | ||
324 | interrupts = <39>; | ||
325 | ti,hwmods = "timer3"; | ||
326 | }; | ||
327 | |||
328 | timer4: timer@49036000 { | ||
329 | compatible = "ti,omap2-timer"; | ||
330 | reg = <0x49036000 0x400>; | ||
331 | interrupts = <40>; | ||
332 | ti,hwmods = "timer4"; | ||
333 | }; | ||
334 | |||
335 | timer5: timer@49038000 { | ||
336 | compatible = "ti,omap2-timer"; | ||
337 | reg = <0x49038000 0x400>; | ||
338 | interrupts = <41>; | ||
339 | ti,hwmods = "timer5"; | ||
340 | ti,timer-dsp; | ||
341 | }; | ||
342 | |||
343 | timer6: timer@4903a000 { | ||
344 | compatible = "ti,omap2-timer"; | ||
345 | reg = <0x4903a000 0x400>; | ||
346 | interrupts = <42>; | ||
347 | ti,hwmods = "timer6"; | ||
348 | ti,timer-dsp; | ||
349 | }; | ||
350 | |||
351 | timer7: timer@4903c000 { | ||
352 | compatible = "ti,omap2-timer"; | ||
353 | reg = <0x4903c000 0x400>; | ||
354 | interrupts = <43>; | ||
355 | ti,hwmods = "timer7"; | ||
356 | ti,timer-dsp; | ||
357 | }; | ||
358 | |||
359 | timer8: timer@4903e000 { | ||
360 | compatible = "ti,omap2-timer"; | ||
361 | reg = <0x4903e000 0x400>; | ||
362 | interrupts = <44>; | ||
363 | ti,hwmods = "timer8"; | ||
364 | ti,timer-pwm; | ||
365 | ti,timer-dsp; | ||
366 | }; | ||
367 | |||
368 | timer9: timer@49040000 { | ||
369 | compatible = "ti,omap2-timer"; | ||
370 | reg = <0x49040000 0x400>; | ||
371 | interrupts = <45>; | ||
372 | ti,hwmods = "timer9"; | ||
373 | ti,timer-pwm; | ||
374 | }; | ||
375 | |||
376 | timer10: timer@48086000 { | ||
377 | compatible = "ti,omap2-timer"; | ||
378 | reg = <0x48086000 0x400>; | ||
379 | interrupts = <46>; | ||
380 | ti,hwmods = "timer10"; | ||
381 | ti,timer-pwm; | ||
382 | }; | ||
383 | |||
384 | timer11: timer@48088000 { | ||
385 | compatible = "ti,omap2-timer"; | ||
386 | reg = <0x48088000 0x400>; | ||
387 | interrupts = <47>; | ||
388 | ti,hwmods = "timer11"; | ||
389 | ti,timer-pwm; | ||
390 | }; | ||
391 | |||
392 | timer12: timer@48304000 { | ||
393 | compatible = "ti,omap2-timer"; | ||
394 | reg = <0x48304000 0x400>; | ||
395 | interrupts = <95>; | ||
396 | ti,hwmods = "timer12"; | ||
397 | ti,timer-alwon; | ||
398 | ti,timer-secure; | ||
399 | }; | ||
303 | }; | 400 | }; |
304 | }; | 401 | }; |
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts new file mode 100644 index 000000000000..75466d2abfb5 --- /dev/null +++ b/arch/arm/boot/dts/omap4-panda-a4.dts | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /include/ "omap4-panda.dts" | ||
9 | |||
10 | /* Pandaboard Rev A4+ have external pullups on SCL & SDA */ | ||
11 | &dss_hdmi_pins { | ||
12 | pinctrl-single,pins = < | ||
13 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
14 | 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ | ||
15 | 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ | ||
16 | >; | ||
17 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-pandaES.dts b/arch/arm/boot/dts/omap4-panda-es.dts index d4ba43a48d9b..73bc1a67e444 100644 --- a/arch/arm/boot/dts/omap4-pandaES.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts | |||
@@ -22,3 +22,12 @@ | |||
22 | "AFML", "Line In", | 22 | "AFML", "Line In", |
23 | "AFMR", "Line In"; | 23 | "AFMR", "Line In"; |
24 | }; | 24 | }; |
25 | |||
26 | /* PandaboardES has external pullups on SCL & SDA */ | ||
27 | &dss_hdmi_pins { | ||
28 | pinctrl-single,pins = < | ||
29 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
30 | 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ | ||
31 | 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ | ||
32 | >; | ||
33 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index e8f927cbb376..4122efe31cfd 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts | |||
@@ -65,6 +65,8 @@ | |||
65 | &twl6040_pins | 65 | &twl6040_pins |
66 | &mcpdm_pins | 66 | &mcpdm_pins |
67 | &mcbsp1_pins | 67 | &mcbsp1_pins |
68 | &dss_hdmi_pins | ||
69 | &tpd12s015_pins | ||
68 | >; | 70 | >; |
69 | 71 | ||
70 | twl6040_pins: pinmux_twl6040_pins { | 72 | twl6040_pins: pinmux_twl6040_pins { |
@@ -92,6 +94,22 @@ | |||
92 | 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ | 94 | 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ |
93 | >; | 95 | >; |
94 | }; | 96 | }; |
97 | |||
98 | dss_hdmi_pins: pinmux_dss_hdmi_pins { | ||
99 | pinctrl-single,pins = < | ||
100 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
101 | 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ | ||
102 | 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ | ||
103 | >; | ||
104 | }; | ||
105 | |||
106 | tpd12s015_pins: pinmux_tpd12s015_pins { | ||
107 | pinctrl-single,pins = < | ||
108 | 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ | ||
109 | 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ | ||
110 | 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ | ||
111 | >; | ||
112 | }; | ||
95 | }; | 113 | }; |
96 | 114 | ||
97 | &i2c1 { | 115 | &i2c1 { |
@@ -184,3 +202,7 @@ | |||
184 | &dmic { | 202 | &dmic { |
185 | status = "disabled"; | 203 | status = "disabled"; |
186 | }; | 204 | }; |
205 | |||
206 | &twl_usb_comparator { | ||
207 | usb-supply = <&vusb>; | ||
208 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts new file mode 100644 index 000000000000..b4a40ffbce31 --- /dev/null +++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /include/ "omap4-sdp.dts" | ||
9 | |||
10 | /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */ | ||
11 | &dss_hdmi_pins { | ||
12 | pinctrl-single,pins = < | ||
13 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
14 | 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ | ||
15 | 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ | ||
16 | >; | ||
17 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 5b7e04fbff50..43e5258a9372 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts | |||
@@ -124,6 +124,8 @@ | |||
124 | &dmic_pins | 124 | &dmic_pins |
125 | &mcbsp1_pins | 125 | &mcbsp1_pins |
126 | &mcbsp2_pins | 126 | &mcbsp2_pins |
127 | &dss_hdmi_pins | ||
128 | &tpd12s015_pins | ||
127 | >; | 129 | >; |
128 | 130 | ||
129 | uart2_pins: pinmux_uart2_pins { | 131 | uart2_pins: pinmux_uart2_pins { |
@@ -194,6 +196,22 @@ | |||
194 | 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ | 196 | 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ |
195 | >; | 197 | >; |
196 | }; | 198 | }; |
199 | |||
200 | dss_hdmi_pins: pinmux_dss_hdmi_pins { | ||
201 | pinctrl-single,pins = < | ||
202 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | ||
203 | 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ | ||
204 | 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ | ||
205 | >; | ||
206 | }; | ||
207 | |||
208 | tpd12s015_pins: pinmux_tpd12s015_pins { | ||
209 | pinctrl-single,pins = < | ||
210 | 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ | ||
211 | 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ | ||
212 | 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ | ||
213 | >; | ||
214 | }; | ||
197 | }; | 215 | }; |
198 | 216 | ||
199 | &i2c1 { | 217 | &i2c1 { |
@@ -406,3 +424,7 @@ | |||
406 | &mcbsp3 { | 424 | &mcbsp3 { |
407 | status = "disabled"; | 425 | status = "disabled"; |
408 | }; | 426 | }; |
427 | |||
428 | &twl_usb_comparator { | ||
429 | usb-supply = <&vusb>; | ||
430 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-var_som.dts b/arch/arm/boot/dts/omap4-var-som.dts index 6601e6af6092..6601e6af6092 100644 --- a/arch/arm/boot/dts/omap4-var_som.dts +++ b/arch/arm/boot/dts/omap4-var-som.dts | |||
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 3883f94fdbd0..739bb79e410e 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi | |||
@@ -95,6 +95,12 @@ | |||
95 | ranges; | 95 | ranges; |
96 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | 96 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; |
97 | 97 | ||
98 | counter32k: counter@4a304000 { | ||
99 | compatible = "ti,omap-counter32k"; | ||
100 | reg = <0x4a304000 0x20>; | ||
101 | ti,hwmods = "counter_32k"; | ||
102 | }; | ||
103 | |||
98 | omap4_pmx_core: pinmux@4a100040 { | 104 | omap4_pmx_core: pinmux@4a100040 { |
99 | compatible = "ti,omap4-padconf", "pinctrl-single"; | 105 | compatible = "ti,omap4-padconf", "pinctrl-single"; |
100 | reg = <0x4a100040 0x0196>; | 106 | reg = <0x4a100040 0x0196>; |
@@ -340,7 +346,6 @@ | |||
340 | <0x49032000 0x7f>; /* L3 Interconnect */ | 346 | <0x49032000 0x7f>; /* L3 Interconnect */ |
341 | reg-names = "mpu", "dma"; | 347 | reg-names = "mpu", "dma"; |
342 | interrupts = <0 112 0x4>; | 348 | interrupts = <0 112 0x4>; |
343 | interrupt-parent = <&gic>; | ||
344 | ti,hwmods = "mcpdm"; | 349 | ti,hwmods = "mcpdm"; |
345 | }; | 350 | }; |
346 | 351 | ||
@@ -350,7 +355,6 @@ | |||
350 | <0x4902e000 0x7f>; /* L3 Interconnect */ | 355 | <0x4902e000 0x7f>; /* L3 Interconnect */ |
351 | reg-names = "mpu", "dma"; | 356 | reg-names = "mpu", "dma"; |
352 | interrupts = <0 114 0x4>; | 357 | interrupts = <0 114 0x4>; |
353 | interrupt-parent = <&gic>; | ||
354 | ti,hwmods = "dmic"; | 358 | ti,hwmods = "dmic"; |
355 | }; | 359 | }; |
356 | 360 | ||
@@ -361,7 +365,6 @@ | |||
361 | reg-names = "mpu", "dma"; | 365 | reg-names = "mpu", "dma"; |
362 | interrupts = <0 17 0x4>; | 366 | interrupts = <0 17 0x4>; |
363 | interrupt-names = "common"; | 367 | interrupt-names = "common"; |
364 | interrupt-parent = <&gic>; | ||
365 | ti,buffer-size = <128>; | 368 | ti,buffer-size = <128>; |
366 | ti,hwmods = "mcbsp1"; | 369 | ti,hwmods = "mcbsp1"; |
367 | }; | 370 | }; |
@@ -373,7 +376,6 @@ | |||
373 | reg-names = "mpu", "dma"; | 376 | reg-names = "mpu", "dma"; |
374 | interrupts = <0 22 0x4>; | 377 | interrupts = <0 22 0x4>; |
375 | interrupt-names = "common"; | 378 | interrupt-names = "common"; |
376 | interrupt-parent = <&gic>; | ||
377 | ti,buffer-size = <128>; | 379 | ti,buffer-size = <128>; |
378 | ti,hwmods = "mcbsp2"; | 380 | ti,hwmods = "mcbsp2"; |
379 | }; | 381 | }; |
@@ -385,7 +387,6 @@ | |||
385 | reg-names = "mpu", "dma"; | 387 | reg-names = "mpu", "dma"; |
386 | interrupts = <0 23 0x4>; | 388 | interrupts = <0 23 0x4>; |
387 | interrupt-names = "common"; | 389 | interrupt-names = "common"; |
388 | interrupt-parent = <&gic>; | ||
389 | ti,buffer-size = <128>; | 390 | ti,buffer-size = <128>; |
390 | ti,hwmods = "mcbsp3"; | 391 | ti,hwmods = "mcbsp3"; |
391 | }; | 392 | }; |
@@ -396,7 +397,6 @@ | |||
396 | reg-names = "mpu"; | 397 | reg-names = "mpu"; |
397 | interrupts = <0 16 0x4>; | 398 | interrupts = <0 16 0x4>; |
398 | interrupt-names = "common"; | 399 | interrupt-names = "common"; |
399 | interrupt-parent = <&gic>; | ||
400 | ti,buffer-size = <128>; | 400 | ti,buffer-size = <128>; |
401 | ti,hwmods = "mcbsp4"; | 401 | ti,hwmods = "mcbsp4"; |
402 | }; | 402 | }; |
@@ -431,12 +431,103 @@ | |||
431 | hw-caps-temp-alert; | 431 | hw-caps-temp-alert; |
432 | }; | 432 | }; |
433 | 433 | ||
434 | ocp2scp { | 434 | ocp2scp@4a0ad000 { |
435 | compatible = "ti,omap-ocp2scp"; | 435 | compatible = "ti,omap-ocp2scp"; |
436 | reg = <0x4a0ad000 0x1f>; | ||
436 | #address-cells = <1>; | 437 | #address-cells = <1>; |
437 | #size-cells = <1>; | 438 | #size-cells = <1>; |
438 | ranges; | 439 | ranges; |
439 | ti,hwmods = "ocp2scp_usb_phy"; | 440 | ti,hwmods = "ocp2scp_usb_phy"; |
440 | }; | 441 | }; |
442 | |||
443 | timer1: timer@4a318000 { | ||
444 | compatible = "ti,omap2-timer"; | ||
445 | reg = <0x4a318000 0x80>; | ||
446 | interrupts = <0 37 0x4>; | ||
447 | ti,hwmods = "timer1"; | ||
448 | ti,timer-alwon; | ||
449 | }; | ||
450 | |||
451 | timer2: timer@48032000 { | ||
452 | compatible = "ti,omap2-timer"; | ||
453 | reg = <0x48032000 0x80>; | ||
454 | interrupts = <0 38 0x4>; | ||
455 | ti,hwmods = "timer2"; | ||
456 | }; | ||
457 | |||
458 | timer3: timer@48034000 { | ||
459 | compatible = "ti,omap2-timer"; | ||
460 | reg = <0x48034000 0x80>; | ||
461 | interrupts = <0 39 0x4>; | ||
462 | ti,hwmods = "timer3"; | ||
463 | }; | ||
464 | |||
465 | timer4: timer@48036000 { | ||
466 | compatible = "ti,omap2-timer"; | ||
467 | reg = <0x48036000 0x80>; | ||
468 | interrupts = <0 40 0x4>; | ||
469 | ti,hwmods = "timer4"; | ||
470 | }; | ||
471 | |||
472 | timer5: timer@40138000 { | ||
473 | compatible = "ti,omap2-timer"; | ||
474 | reg = <0x40138000 0x80>, | ||
475 | <0x49038000 0x80>; | ||
476 | interrupts = <0 41 0x4>; | ||
477 | ti,hwmods = "timer5"; | ||
478 | ti,timer-dsp; | ||
479 | }; | ||
480 | |||
481 | timer6: timer@4013a000 { | ||
482 | compatible = "ti,omap2-timer"; | ||
483 | reg = <0x4013a000 0x80>, | ||
484 | <0x4903a000 0x80>; | ||
485 | interrupts = <0 42 0x4>; | ||
486 | ti,hwmods = "timer6"; | ||
487 | ti,timer-dsp; | ||
488 | }; | ||
489 | |||
490 | timer7: timer@4013c000 { | ||
491 | compatible = "ti,omap2-timer"; | ||
492 | reg = <0x4013c000 0x80>, | ||
493 | <0x4903c000 0x80>; | ||
494 | interrupts = <0 43 0x4>; | ||
495 | ti,hwmods = "timer7"; | ||
496 | ti,timer-dsp; | ||
497 | }; | ||
498 | |||
499 | timer8: timer@4013e000 { | ||
500 | compatible = "ti,omap2-timer"; | ||
501 | reg = <0x4013e000 0x80>, | ||
502 | <0x4903e000 0x80>; | ||
503 | interrupts = <0 44 0x4>; | ||
504 | ti,hwmods = "timer8"; | ||
505 | ti,timer-pwm; | ||
506 | ti,timer-dsp; | ||
507 | }; | ||
508 | |||
509 | timer9: timer@4803e000 { | ||
510 | compatible = "ti,omap2-timer"; | ||
511 | reg = <0x4803e000 0x80>; | ||
512 | interrupts = <0 45 0x4>; | ||
513 | ti,hwmods = "timer9"; | ||
514 | ti,timer-pwm; | ||
515 | }; | ||
516 | |||
517 | timer10: timer@48086000 { | ||
518 | compatible = "ti,omap2-timer"; | ||
519 | reg = <0x48086000 0x80>; | ||
520 | interrupts = <0 46 0x4>; | ||
521 | ti,hwmods = "timer10"; | ||
522 | ti,timer-pwm; | ||
523 | }; | ||
524 | |||
525 | timer11: timer@48088000 { | ||
526 | compatible = "ti,omap2-timer"; | ||
527 | reg = <0x48088000 0x80>; | ||
528 | interrupts = <0 47 0x4>; | ||
529 | ti,hwmods = "timer11"; | ||
530 | ti,timer-pwm; | ||
531 | }; | ||
441 | }; | 532 | }; |
442 | }; | 533 | }; |
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts index c663eba73168..8722c15bbba2 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-evm.dts | |||
@@ -8,6 +8,7 @@ | |||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | 9 | ||
10 | /include/ "omap5.dtsi" | 10 | /include/ "omap5.dtsi" |
11 | /include/ "samsung_k3pe0e000b.dtsi" | ||
11 | 12 | ||
12 | / { | 13 | / { |
13 | model = "TI OMAP5 EVM board"; | 14 | model = "TI OMAP5 EVM board"; |
@@ -15,7 +16,7 @@ | |||
15 | 16 | ||
16 | memory { | 17 | memory { |
17 | device_type = "memory"; | 18 | device_type = "memory"; |
18 | reg = <0x80000000 0x40000000>; /* 1 GB */ | 19 | reg = <0x80000000 0x80000000>; /* 2 GB */ |
19 | }; | 20 | }; |
20 | 21 | ||
21 | vmmcsd_fixed: fixedregulator-mmcsd { | 22 | vmmcsd_fixed: fixedregulator-mmcsd { |
@@ -140,3 +141,13 @@ | |||
140 | &mcbsp3 { | 141 | &mcbsp3 { |
141 | status = "disabled"; | 142 | status = "disabled"; |
142 | }; | 143 | }; |
144 | |||
145 | &emif1 { | ||
146 | cs1-used; | ||
147 | device-handle = <&samsung_K3PE0E000B>; | ||
148 | }; | ||
149 | |||
150 | &emif2 { | ||
151 | cs1-used; | ||
152 | device-handle = <&samsung_K3PE0E000B>; | ||
153 | }; | ||
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 42c78beb4fdc..790bb2a4b343 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi | |||
@@ -77,6 +77,12 @@ | |||
77 | ranges; | 77 | ranges; |
78 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | 78 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; |
79 | 79 | ||
80 | counter32k: counter@4ae04000 { | ||
81 | compatible = "ti,omap-counter32k"; | ||
82 | reg = <0x4ae04000 0x40>; | ||
83 | ti,hwmods = "counter_32k"; | ||
84 | }; | ||
85 | |||
80 | omap5_pmx_core: pinmux@4a002840 { | 86 | omap5_pmx_core: pinmux@4a002840 { |
81 | compatible = "ti,omap4-padconf", "pinctrl-single"; | 87 | compatible = "ti,omap4-padconf", "pinctrl-single"; |
82 | reg = <0x4a002840 0x01b6>; | 88 | reg = <0x4a002840 0x01b6>; |
@@ -104,6 +110,8 @@ | |||
104 | 110 | ||
105 | gpio1: gpio@4ae10000 { | 111 | gpio1: gpio@4ae10000 { |
106 | compatible = "ti,omap4-gpio"; | 112 | compatible = "ti,omap4-gpio"; |
113 | reg = <0x4ae10000 0x200>; | ||
114 | interrupts = <0 29 0x4>; | ||
107 | ti,hwmods = "gpio1"; | 115 | ti,hwmods = "gpio1"; |
108 | gpio-controller; | 116 | gpio-controller; |
109 | #gpio-cells = <2>; | 117 | #gpio-cells = <2>; |
@@ -113,6 +121,8 @@ | |||
113 | 121 | ||
114 | gpio2: gpio@48055000 { | 122 | gpio2: gpio@48055000 { |
115 | compatible = "ti,omap4-gpio"; | 123 | compatible = "ti,omap4-gpio"; |
124 | reg = <0x48055000 0x200>; | ||
125 | interrupts = <0 30 0x4>; | ||
116 | ti,hwmods = "gpio2"; | 126 | ti,hwmods = "gpio2"; |
117 | gpio-controller; | 127 | gpio-controller; |
118 | #gpio-cells = <2>; | 128 | #gpio-cells = <2>; |
@@ -122,6 +132,8 @@ | |||
122 | 132 | ||
123 | gpio3: gpio@48057000 { | 133 | gpio3: gpio@48057000 { |
124 | compatible = "ti,omap4-gpio"; | 134 | compatible = "ti,omap4-gpio"; |
135 | reg = <0x48057000 0x200>; | ||
136 | interrupts = <0 31 0x4>; | ||
125 | ti,hwmods = "gpio3"; | 137 | ti,hwmods = "gpio3"; |
126 | gpio-controller; | 138 | gpio-controller; |
127 | #gpio-cells = <2>; | 139 | #gpio-cells = <2>; |
@@ -131,6 +143,8 @@ | |||
131 | 143 | ||
132 | gpio4: gpio@48059000 { | 144 | gpio4: gpio@48059000 { |
133 | compatible = "ti,omap4-gpio"; | 145 | compatible = "ti,omap4-gpio"; |
146 | reg = <0x48059000 0x200>; | ||
147 | interrupts = <0 32 0x4>; | ||
134 | ti,hwmods = "gpio4"; | 148 | ti,hwmods = "gpio4"; |
135 | gpio-controller; | 149 | gpio-controller; |
136 | #gpio-cells = <2>; | 150 | #gpio-cells = <2>; |
@@ -140,6 +154,8 @@ | |||
140 | 154 | ||
141 | gpio5: gpio@4805b000 { | 155 | gpio5: gpio@4805b000 { |
142 | compatible = "ti,omap4-gpio"; | 156 | compatible = "ti,omap4-gpio"; |
157 | reg = <0x4805b000 0x200>; | ||
158 | interrupts = <0 33 0x4>; | ||
143 | ti,hwmods = "gpio5"; | 159 | ti,hwmods = "gpio5"; |
144 | gpio-controller; | 160 | gpio-controller; |
145 | #gpio-cells = <2>; | 161 | #gpio-cells = <2>; |
@@ -149,6 +165,8 @@ | |||
149 | 165 | ||
150 | gpio6: gpio@4805d000 { | 166 | gpio6: gpio@4805d000 { |
151 | compatible = "ti,omap4-gpio"; | 167 | compatible = "ti,omap4-gpio"; |
168 | reg = <0x4805d000 0x200>; | ||
169 | interrupts = <0 34 0x4>; | ||
152 | ti,hwmods = "gpio6"; | 170 | ti,hwmods = "gpio6"; |
153 | gpio-controller; | 171 | gpio-controller; |
154 | #gpio-cells = <2>; | 172 | #gpio-cells = <2>; |
@@ -158,6 +176,8 @@ | |||
158 | 176 | ||
159 | gpio7: gpio@48051000 { | 177 | gpio7: gpio@48051000 { |
160 | compatible = "ti,omap4-gpio"; | 178 | compatible = "ti,omap4-gpio"; |
179 | reg = <0x48051000 0x200>; | ||
180 | interrupts = <0 35 0x4>; | ||
161 | ti,hwmods = "gpio7"; | 181 | ti,hwmods = "gpio7"; |
162 | gpio-controller; | 182 | gpio-controller; |
163 | #gpio-cells = <2>; | 183 | #gpio-cells = <2>; |
@@ -167,6 +187,8 @@ | |||
167 | 187 | ||
168 | gpio8: gpio@48053000 { | 188 | gpio8: gpio@48053000 { |
169 | compatible = "ti,omap4-gpio"; | 189 | compatible = "ti,omap4-gpio"; |
190 | reg = <0x48053000 0x200>; | ||
191 | interrupts = <0 121 0x4>; | ||
170 | ti,hwmods = "gpio8"; | 192 | ti,hwmods = "gpio8"; |
171 | gpio-controller; | 193 | gpio-controller; |
172 | #gpio-cells = <2>; | 194 | #gpio-cells = <2>; |
@@ -176,6 +198,8 @@ | |||
176 | 198 | ||
177 | i2c1: i2c@48070000 { | 199 | i2c1: i2c@48070000 { |
178 | compatible = "ti,omap4-i2c"; | 200 | compatible = "ti,omap4-i2c"; |
201 | reg = <0x48070000 0x100>; | ||
202 | interrupts = <0 56 0x4>; | ||
179 | #address-cells = <1>; | 203 | #address-cells = <1>; |
180 | #size-cells = <0>; | 204 | #size-cells = <0>; |
181 | ti,hwmods = "i2c1"; | 205 | ti,hwmods = "i2c1"; |
@@ -183,6 +207,8 @@ | |||
183 | 207 | ||
184 | i2c2: i2c@48072000 { | 208 | i2c2: i2c@48072000 { |
185 | compatible = "ti,omap4-i2c"; | 209 | compatible = "ti,omap4-i2c"; |
210 | reg = <0x48072000 0x100>; | ||
211 | interrupts = <0 57 0x4>; | ||
186 | #address-cells = <1>; | 212 | #address-cells = <1>; |
187 | #size-cells = <0>; | 213 | #size-cells = <0>; |
188 | ti,hwmods = "i2c2"; | 214 | ti,hwmods = "i2c2"; |
@@ -190,20 +216,26 @@ | |||
190 | 216 | ||
191 | i2c3: i2c@48060000 { | 217 | i2c3: i2c@48060000 { |
192 | compatible = "ti,omap4-i2c"; | 218 | compatible = "ti,omap4-i2c"; |
219 | reg = <0x48060000 0x100>; | ||
220 | interrupts = <0 61 0x4>; | ||
193 | #address-cells = <1>; | 221 | #address-cells = <1>; |
194 | #size-cells = <0>; | 222 | #size-cells = <0>; |
195 | ti,hwmods = "i2c3"; | 223 | ti,hwmods = "i2c3"; |
196 | }; | 224 | }; |
197 | 225 | ||
198 | i2c4: i2c@4807A000 { | 226 | i2c4: i2c@4807a000 { |
199 | compatible = "ti,omap4-i2c"; | 227 | compatible = "ti,omap4-i2c"; |
228 | reg = <0x4807a000 0x100>; | ||
229 | interrupts = <0 62 0x4>; | ||
200 | #address-cells = <1>; | 230 | #address-cells = <1>; |
201 | #size-cells = <0>; | 231 | #size-cells = <0>; |
202 | ti,hwmods = "i2c4"; | 232 | ti,hwmods = "i2c4"; |
203 | }; | 233 | }; |
204 | 234 | ||
205 | i2c5: i2c@4807C000 { | 235 | i2c5: i2c@4807c000 { |
206 | compatible = "ti,omap4-i2c"; | 236 | compatible = "ti,omap4-i2c"; |
237 | reg = <0x4807c000 0x100>; | ||
238 | interrupts = <0 60 0x4>; | ||
207 | #address-cells = <1>; | 239 | #address-cells = <1>; |
208 | #size-cells = <0>; | 240 | #size-cells = <0>; |
209 | ti,hwmods = "i2c5"; | 241 | ti,hwmods = "i2c5"; |
@@ -211,42 +243,56 @@ | |||
211 | 243 | ||
212 | uart1: serial@4806a000 { | 244 | uart1: serial@4806a000 { |
213 | compatible = "ti,omap4-uart"; | 245 | compatible = "ti,omap4-uart"; |
246 | reg = <0x4806a000 0x100>; | ||
247 | interrupts = <0 72 0x4>; | ||
214 | ti,hwmods = "uart1"; | 248 | ti,hwmods = "uart1"; |
215 | clock-frequency = <48000000>; | 249 | clock-frequency = <48000000>; |
216 | }; | 250 | }; |
217 | 251 | ||
218 | uart2: serial@4806c000 { | 252 | uart2: serial@4806c000 { |
219 | compatible = "ti,omap4-uart"; | 253 | compatible = "ti,omap4-uart"; |
254 | reg = <0x4806c000 0x100>; | ||
255 | interrupts = <0 73 0x4>; | ||
220 | ti,hwmods = "uart2"; | 256 | ti,hwmods = "uart2"; |
221 | clock-frequency = <48000000>; | 257 | clock-frequency = <48000000>; |
222 | }; | 258 | }; |
223 | 259 | ||
224 | uart3: serial@48020000 { | 260 | uart3: serial@48020000 { |
225 | compatible = "ti,omap4-uart"; | 261 | compatible = "ti,omap4-uart"; |
262 | reg = <0x48020000 0x100>; | ||
263 | interrupts = <0 74 0x4>; | ||
226 | ti,hwmods = "uart3"; | 264 | ti,hwmods = "uart3"; |
227 | clock-frequency = <48000000>; | 265 | clock-frequency = <48000000>; |
228 | }; | 266 | }; |
229 | 267 | ||
230 | uart4: serial@4806e000 { | 268 | uart4: serial@4806e000 { |
231 | compatible = "ti,omap4-uart"; | 269 | compatible = "ti,omap4-uart"; |
270 | reg = <0x4806e000 0x100>; | ||
271 | interrupts = <0 70 0x4>; | ||
232 | ti,hwmods = "uart4"; | 272 | ti,hwmods = "uart4"; |
233 | clock-frequency = <48000000>; | 273 | clock-frequency = <48000000>; |
234 | }; | 274 | }; |
235 | 275 | ||
236 | uart5: serial@48066000 { | 276 | uart5: serial@48066000 { |
237 | compatible = "ti,omap5-uart"; | 277 | compatible = "ti,omap4-uart"; |
278 | reg = <0x48066000 0x100>; | ||
279 | interrupts = <0 105 0x4>; | ||
238 | ti,hwmods = "uart5"; | 280 | ti,hwmods = "uart5"; |
239 | clock-frequency = <48000000>; | 281 | clock-frequency = <48000000>; |
240 | }; | 282 | }; |
241 | 283 | ||
242 | uart6: serial@48068000 { | 284 | uart6: serial@48068000 { |
243 | compatible = "ti,omap6-uart"; | 285 | compatible = "ti,omap4-uart"; |
286 | reg = <0x48068000 0x100>; | ||
287 | interrupts = <0 106 0x4>; | ||
244 | ti,hwmods = "uart6"; | 288 | ti,hwmods = "uart6"; |
245 | clock-frequency = <48000000>; | 289 | clock-frequency = <48000000>; |
246 | }; | 290 | }; |
247 | 291 | ||
248 | mmc1: mmc@4809c000 { | 292 | mmc1: mmc@4809c000 { |
249 | compatible = "ti,omap4-hsmmc"; | 293 | compatible = "ti,omap4-hsmmc"; |
294 | reg = <0x4809c000 0x400>; | ||
295 | interrupts = <0 83 0x4>; | ||
250 | ti,hwmods = "mmc1"; | 296 | ti,hwmods = "mmc1"; |
251 | ti,dual-volt; | 297 | ti,dual-volt; |
252 | ti,needs-special-reset; | 298 | ti,needs-special-reset; |
@@ -254,24 +300,32 @@ | |||
254 | 300 | ||
255 | mmc2: mmc@480b4000 { | 301 | mmc2: mmc@480b4000 { |
256 | compatible = "ti,omap4-hsmmc"; | 302 | compatible = "ti,omap4-hsmmc"; |
303 | reg = <0x480b4000 0x400>; | ||
304 | interrupts = <0 86 0x4>; | ||
257 | ti,hwmods = "mmc2"; | 305 | ti,hwmods = "mmc2"; |
258 | ti,needs-special-reset; | 306 | ti,needs-special-reset; |
259 | }; | 307 | }; |
260 | 308 | ||
261 | mmc3: mmc@480ad000 { | 309 | mmc3: mmc@480ad000 { |
262 | compatible = "ti,omap4-hsmmc"; | 310 | compatible = "ti,omap4-hsmmc"; |
311 | reg = <0x480ad000 0x400>; | ||
312 | interrupts = <0 94 0x4>; | ||
263 | ti,hwmods = "mmc3"; | 313 | ti,hwmods = "mmc3"; |
264 | ti,needs-special-reset; | 314 | ti,needs-special-reset; |
265 | }; | 315 | }; |
266 | 316 | ||
267 | mmc4: mmc@480d1000 { | 317 | mmc4: mmc@480d1000 { |
268 | compatible = "ti,omap4-hsmmc"; | 318 | compatible = "ti,omap4-hsmmc"; |
319 | reg = <0x480d1000 0x400>; | ||
320 | interrupts = <0 96 0x4>; | ||
269 | ti,hwmods = "mmc4"; | 321 | ti,hwmods = "mmc4"; |
270 | ti,needs-special-reset; | 322 | ti,needs-special-reset; |
271 | }; | 323 | }; |
272 | 324 | ||
273 | mmc5: mmc@480d5000 { | 325 | mmc5: mmc@480d5000 { |
274 | compatible = "ti,omap4-hsmmc"; | 326 | compatible = "ti,omap4-hsmmc"; |
327 | reg = <0x480d5000 0x400>; | ||
328 | interrupts = <0 59 0x4>; | ||
275 | ti,hwmods = "mmc5"; | 329 | ti,hwmods = "mmc5"; |
276 | ti,needs-special-reset; | 330 | ti,needs-special-reset; |
277 | }; | 331 | }; |
@@ -287,7 +341,6 @@ | |||
287 | <0x49032000 0x7f>; /* L3 Interconnect */ | 341 | <0x49032000 0x7f>; /* L3 Interconnect */ |
288 | reg-names = "mpu", "dma"; | 342 | reg-names = "mpu", "dma"; |
289 | interrupts = <0 112 0x4>; | 343 | interrupts = <0 112 0x4>; |
290 | interrupt-parent = <&gic>; | ||
291 | ti,hwmods = "mcpdm"; | 344 | ti,hwmods = "mcpdm"; |
292 | }; | 345 | }; |
293 | 346 | ||
@@ -297,7 +350,6 @@ | |||
297 | <0x4902e000 0x7f>; /* L3 Interconnect */ | 350 | <0x4902e000 0x7f>; /* L3 Interconnect */ |
298 | reg-names = "mpu", "dma"; | 351 | reg-names = "mpu", "dma"; |
299 | interrupts = <0 114 0x4>; | 352 | interrupts = <0 114 0x4>; |
300 | interrupt-parent = <&gic>; | ||
301 | ti,hwmods = "dmic"; | 353 | ti,hwmods = "dmic"; |
302 | }; | 354 | }; |
303 | 355 | ||
@@ -308,7 +360,6 @@ | |||
308 | reg-names = "mpu", "dma"; | 360 | reg-names = "mpu", "dma"; |
309 | interrupts = <0 17 0x4>; | 361 | interrupts = <0 17 0x4>; |
310 | interrupt-names = "common"; | 362 | interrupt-names = "common"; |
311 | interrupt-parent = <&gic>; | ||
312 | ti,buffer-size = <128>; | 363 | ti,buffer-size = <128>; |
313 | ti,hwmods = "mcbsp1"; | 364 | ti,hwmods = "mcbsp1"; |
314 | }; | 365 | }; |
@@ -320,7 +371,6 @@ | |||
320 | reg-names = "mpu", "dma"; | 371 | reg-names = "mpu", "dma"; |
321 | interrupts = <0 22 0x4>; | 372 | interrupts = <0 22 0x4>; |
322 | interrupt-names = "common"; | 373 | interrupt-names = "common"; |
323 | interrupt-parent = <&gic>; | ||
324 | ti,buffer-size = <128>; | 374 | ti,buffer-size = <128>; |
325 | ti,hwmods = "mcbsp2"; | 375 | ti,hwmods = "mcbsp2"; |
326 | }; | 376 | }; |
@@ -332,9 +382,119 @@ | |||
332 | reg-names = "mpu", "dma"; | 382 | reg-names = "mpu", "dma"; |
333 | interrupts = <0 23 0x4>; | 383 | interrupts = <0 23 0x4>; |
334 | interrupt-names = "common"; | 384 | interrupt-names = "common"; |
335 | interrupt-parent = <&gic>; | ||
336 | ti,buffer-size = <128>; | 385 | ti,buffer-size = <128>; |
337 | ti,hwmods = "mcbsp3"; | 386 | ti,hwmods = "mcbsp3"; |
338 | }; | 387 | }; |
388 | |||
389 | timer1: timer@4ae18000 { | ||
390 | compatible = "ti,omap2-timer"; | ||
391 | reg = <0x4ae18000 0x80>; | ||
392 | interrupts = <0 37 0x4>; | ||
393 | ti,hwmods = "timer1"; | ||
394 | ti,timer-alwon; | ||
395 | }; | ||
396 | |||
397 | timer2: timer@48032000 { | ||
398 | compatible = "ti,omap2-timer"; | ||
399 | reg = <0x48032000 0x80>; | ||
400 | interrupts = <0 38 0x4>; | ||
401 | ti,hwmods = "timer2"; | ||
402 | }; | ||
403 | |||
404 | timer3: timer@48034000 { | ||
405 | compatible = "ti,omap2-timer"; | ||
406 | reg = <0x48034000 0x80>; | ||
407 | interrupts = <0 39 0x4>; | ||
408 | ti,hwmods = "timer3"; | ||
409 | }; | ||
410 | |||
411 | timer4: timer@48036000 { | ||
412 | compatible = "ti,omap2-timer"; | ||
413 | reg = <0x48036000 0x80>; | ||
414 | interrupts = <0 40 0x4>; | ||
415 | ti,hwmods = "timer4"; | ||
416 | }; | ||
417 | |||
418 | timer5: timer@40138000 { | ||
419 | compatible = "ti,omap2-timer"; | ||
420 | reg = <0x40138000 0x80>, | ||
421 | <0x49038000 0x80>; | ||
422 | interrupts = <0 41 0x4>; | ||
423 | ti,hwmods = "timer5"; | ||
424 | ti,timer-dsp; | ||
425 | }; | ||
426 | |||
427 | timer6: timer@4013a000 { | ||
428 | compatible = "ti,omap2-timer"; | ||
429 | reg = <0x4013a000 0x80>, | ||
430 | <0x4903a000 0x80>; | ||
431 | interrupts = <0 42 0x4>; | ||
432 | ti,hwmods = "timer6"; | ||
433 | ti,timer-dsp; | ||
434 | ti,timer-pwm; | ||
435 | }; | ||
436 | |||
437 | timer7: timer@4013c000 { | ||
438 | compatible = "ti,omap2-timer"; | ||
439 | reg = <0x4013c000 0x80>, | ||
440 | <0x4903c000 0x80>; | ||
441 | interrupts = <0 43 0x4>; | ||
442 | ti,hwmods = "timer7"; | ||
443 | ti,timer-dsp; | ||
444 | }; | ||
445 | |||
446 | timer8: timer@4013e000 { | ||
447 | compatible = "ti,omap2-timer"; | ||
448 | reg = <0x4013e000 0x80>, | ||
449 | <0x4903e000 0x80>; | ||
450 | interrupts = <0 44 0x4>; | ||
451 | ti,hwmods = "timer8"; | ||
452 | ti,timer-dsp; | ||
453 | ti,timer-pwm; | ||
454 | }; | ||
455 | |||
456 | timer9: timer@4803e000 { | ||
457 | compatible = "ti,omap2-timer"; | ||
458 | reg = <0x4803e000 0x80>; | ||
459 | interrupts = <0 45 0x4>; | ||
460 | ti,hwmods = "timer9"; | ||
461 | }; | ||
462 | |||
463 | timer10: timer@48086000 { | ||
464 | compatible = "ti,omap2-timer"; | ||
465 | reg = <0x48086000 0x80>; | ||
466 | interrupts = <0 46 0x4>; | ||
467 | ti,hwmods = "timer10"; | ||
468 | }; | ||
469 | |||
470 | timer11: timer@48088000 { | ||
471 | compatible = "ti,omap2-timer"; | ||
472 | reg = <0x48088000 0x80>; | ||
473 | interrupts = <0 47 0x4>; | ||
474 | ti,hwmods = "timer11"; | ||
475 | ti,timer-pwm; | ||
476 | }; | ||
477 | |||
478 | emif1: emif@0x4c000000 { | ||
479 | compatible = "ti,emif-4d5"; | ||
480 | ti,hwmods = "emif1"; | ||
481 | phy-type = <2>; /* DDR PHY type: Intelli PHY */ | ||
482 | reg = <0x4c000000 0x400>; | ||
483 | interrupts = <0 110 0x4>; | ||
484 | hw-caps-read-idle-ctrl; | ||
485 | hw-caps-ll-interface; | ||
486 | hw-caps-temp-alert; | ||
487 | }; | ||
488 | |||
489 | emif2: emif@0x4d000000 { | ||
490 | compatible = "ti,emif-4d5"; | ||
491 | ti,hwmods = "emif2"; | ||
492 | phy-type = <2>; /* DDR PHY type: Intelli PHY */ | ||
493 | reg = <0x4d000000 0x400>; | ||
494 | interrupts = <0 111 0x4>; | ||
495 | hw-caps-read-idle-ctrl; | ||
496 | hw-caps-ll-interface; | ||
497 | hw-caps-temp-alert; | ||
498 | }; | ||
339 | }; | 499 | }; |
340 | }; | 500 | }; |
diff --git a/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi new file mode 100644 index 000000000000..9657a5cbc3ad --- /dev/null +++ b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Timings and Geometry for Samsung K3PE0E000B memory part | ||
3 | */ | ||
4 | |||
5 | / { | ||
6 | samsung_K3PE0E000B: lpddr2 { | ||
7 | compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4"; | ||
8 | density = <4096>; | ||
9 | io-width = <32>; | ||
10 | |||
11 | tRPab-min-tck = <3>; | ||
12 | tRCD-min-tck = <3>; | ||
13 | tWR-min-tck = <3>; | ||
14 | tRASmin-min-tck = <3>; | ||
15 | tRRD-min-tck = <2>; | ||
16 | tWTR-min-tck = <2>; | ||
17 | tXP-min-tck = <2>; | ||
18 | tRTP-min-tck = <2>; | ||
19 | tCKE-min-tck = <3>; | ||
20 | tCKESR-min-tck = <3>; | ||
21 | tFAW-min-tck = <8>; | ||
22 | |||
23 | timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 { | ||
24 | compatible = "jedec,lpddr2-timings"; | ||
25 | min-freq = <10000000>; | ||
26 | max-freq = <533333333>; | ||
27 | tRPab = <21000>; | ||
28 | tRCD = <18000>; | ||
29 | tWR = <15000>; | ||
30 | tRAS-min = <42000>; | ||
31 | tRRD = <10000>; | ||
32 | tWTR = <7500>; | ||
33 | tXP = <7500>; | ||
34 | tRTP = <7500>; | ||
35 | tCKESR = <15000>; | ||
36 | tDQSCK-max = <5500>; | ||
37 | tFAW = <50000>; | ||
38 | tZQCS = <90000>; | ||
39 | tZQCL = <360000>; | ||
40 | tZQinit = <1000000>; | ||
41 | tRAS-max-ns = <70000>; | ||
42 | tDQSCK-max-derated = <6000>; | ||
43 | }; | ||
44 | |||
45 | timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 { | ||
46 | compatible = "jedec,lpddr2-timings"; | ||
47 | min-freq = <10000000>; | ||
48 | max-freq = <266666666>; | ||
49 | tRPab = <21000>; | ||
50 | tRCD = <18000>; | ||
51 | tWR = <15000>; | ||
52 | tRAS-min = <42000>; | ||
53 | tRRD = <10000>; | ||
54 | tWTR = <7500>; | ||
55 | tXP = <7500>; | ||
56 | tRTP = <7500>; | ||
57 | tCKESR = <15000>; | ||
58 | tDQSCK-max = <5500>; | ||
59 | tFAW = <50000>; | ||
60 | tZQCS = <90000>; | ||
61 | tZQCL = <360000>; | ||
62 | tZQinit = <1000000>; | ||
63 | tRAS-max-ns = <70000>; | ||
64 | tDQSCK-max-derated = <6000>; | ||
65 | }; | ||
66 | }; | ||
67 | }; | ||
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index c3ef1ad26b6a..74b8a47adf91 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts | |||
@@ -297,131 +297,98 @@ | |||
297 | vinldo9-supply = <&sm2_reg>; | 297 | vinldo9-supply = <&sm2_reg>; |
298 | 298 | ||
299 | regulators { | 299 | regulators { |
300 | #address-cells = <1>; | 300 | sys_reg: sys { |
301 | #size-cells = <0>; | ||
302 | |||
303 | sys_reg: regulator@0 { | ||
304 | reg = <0>; | ||
305 | regulator-compatible = "sys"; | ||
306 | regulator-name = "vdd_sys"; | 301 | regulator-name = "vdd_sys"; |
307 | regulator-always-on; | 302 | regulator-always-on; |
308 | }; | 303 | }; |
309 | 304 | ||
310 | regulator@1 { | 305 | sm0 { |
311 | reg = <1>; | ||
312 | regulator-compatible = "sm0"; | ||
313 | regulator-name = "vdd_sm0,vdd_core"; | 306 | regulator-name = "vdd_sm0,vdd_core"; |
314 | regulator-min-microvolt = <1200000>; | 307 | regulator-min-microvolt = <1200000>; |
315 | regulator-max-microvolt = <1200000>; | 308 | regulator-max-microvolt = <1200000>; |
316 | regulator-always-on; | 309 | regulator-always-on; |
317 | }; | 310 | }; |
318 | 311 | ||
319 | regulator@2 { | 312 | sm1 { |
320 | reg = <2>; | ||
321 | regulator-compatible = "sm1"; | ||
322 | regulator-name = "vdd_sm1,vdd_cpu"; | 313 | regulator-name = "vdd_sm1,vdd_cpu"; |
323 | regulator-min-microvolt = <1000000>; | 314 | regulator-min-microvolt = <1000000>; |
324 | regulator-max-microvolt = <1000000>; | 315 | regulator-max-microvolt = <1000000>; |
325 | regulator-always-on; | 316 | regulator-always-on; |
326 | }; | 317 | }; |
327 | 318 | ||
328 | sm2_reg: regulator@3 { | 319 | sm2_reg: sm2 { |
329 | reg = <3>; | ||
330 | regulator-compatible = "sm2"; | ||
331 | regulator-name = "vdd_sm2,vin_ldo*"; | 320 | regulator-name = "vdd_sm2,vin_ldo*"; |
332 | regulator-min-microvolt = <3700000>; | 321 | regulator-min-microvolt = <3700000>; |
333 | regulator-max-microvolt = <3700000>; | 322 | regulator-max-microvolt = <3700000>; |
334 | regulator-always-on; | 323 | regulator-always-on; |
335 | }; | 324 | }; |
336 | 325 | ||
337 | regulator@4 { | 326 | ldo0 { |
338 | reg = <4>; | ||
339 | regulator-compatible = "ldo0"; | ||
340 | regulator-name = "vdd_ldo0,vddio_pex_clk"; | 327 | regulator-name = "vdd_ldo0,vddio_pex_clk"; |
341 | regulator-min-microvolt = <3300000>; | 328 | regulator-min-microvolt = <3300000>; |
342 | regulator-max-microvolt = <3300000>; | 329 | regulator-max-microvolt = <3300000>; |
343 | }; | 330 | }; |
344 | 331 | ||
345 | regulator@5 { | 332 | ldo1 { |
346 | reg = <5>; | ||
347 | regulator-compatible = "ldo1"; | ||
348 | regulator-name = "vdd_ldo1,avdd_pll*"; | 333 | regulator-name = "vdd_ldo1,avdd_pll*"; |
349 | regulator-min-microvolt = <1100000>; | 334 | regulator-min-microvolt = <1100000>; |
350 | regulator-max-microvolt = <1100000>; | 335 | regulator-max-microvolt = <1100000>; |
351 | regulator-always-on; | 336 | regulator-always-on; |
352 | }; | 337 | }; |
353 | 338 | ||
354 | regulator@6 { | 339 | ldo2 { |
355 | reg = <6>; | ||
356 | regulator-compatible = "ldo2"; | ||
357 | regulator-name = "vdd_ldo2,vdd_rtc"; | 340 | regulator-name = "vdd_ldo2,vdd_rtc"; |
358 | regulator-min-microvolt = <1200000>; | 341 | regulator-min-microvolt = <1200000>; |
359 | regulator-max-microvolt = <1200000>; | 342 | regulator-max-microvolt = <1200000>; |
360 | }; | 343 | }; |
361 | 344 | ||
362 | regulator@7 { | 345 | ldo3 { |
363 | reg = <7>; | ||
364 | regulator-compatible = "ldo3"; | ||
365 | regulator-name = "vdd_ldo3,avdd_usb*"; | 346 | regulator-name = "vdd_ldo3,avdd_usb*"; |
366 | regulator-min-microvolt = <3300000>; | 347 | regulator-min-microvolt = <3300000>; |
367 | regulator-max-microvolt = <3300000>; | 348 | regulator-max-microvolt = <3300000>; |
368 | regulator-always-on; | 349 | regulator-always-on; |
369 | }; | 350 | }; |
370 | 351 | ||
371 | regulator@8 { | 352 | ldo4 { |
372 | reg = <8>; | ||
373 | regulator-compatible = "ldo4"; | ||
374 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 353 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
375 | regulator-min-microvolt = <1800000>; | 354 | regulator-min-microvolt = <1800000>; |
376 | regulator-max-microvolt = <1800000>; | 355 | regulator-max-microvolt = <1800000>; |
377 | regulator-always-on; | 356 | regulator-always-on; |
378 | }; | 357 | }; |
379 | 358 | ||
380 | regulator@9 { | 359 | ldo5 { |
381 | reg = <9>; | ||
382 | regulator-compatible = "ldo5"; | ||
383 | regulator-name = "vdd_ldo5,vcore_mmc"; | 360 | regulator-name = "vdd_ldo5,vcore_mmc"; |
384 | regulator-min-microvolt = <2850000>; | 361 | regulator-min-microvolt = <2850000>; |
385 | regulator-max-microvolt = <2850000>; | 362 | regulator-max-microvolt = <2850000>; |
386 | regulator-always-on; | 363 | regulator-always-on; |
387 | }; | 364 | }; |
388 | 365 | ||
389 | regulator@10 { | 366 | ldo6 { |
390 | reg = <10>; | ||
391 | regulator-compatible = "ldo6"; | ||
392 | regulator-name = "vdd_ldo6,avdd_vdac"; | 367 | regulator-name = "vdd_ldo6,avdd_vdac"; |
393 | regulator-min-microvolt = <1800000>; | 368 | regulator-min-microvolt = <1800000>; |
394 | regulator-max-microvolt = <1800000>; | 369 | regulator-max-microvolt = <1800000>; |
395 | }; | 370 | }; |
396 | 371 | ||
397 | regulator@11 { | 372 | ldo7 { |
398 | reg = <11>; | ||
399 | regulator-compatible = "ldo7"; | ||
400 | regulator-name = "vdd_ldo7,avdd_hdmi"; | 373 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
401 | regulator-min-microvolt = <3300000>; | 374 | regulator-min-microvolt = <3300000>; |
402 | regulator-max-microvolt = <3300000>; | 375 | regulator-max-microvolt = <3300000>; |
403 | }; | 376 | }; |
404 | 377 | ||
405 | regulator@12 { | 378 | ldo8 { |
406 | reg = <12>; | ||
407 | regulator-compatible = "ldo8"; | ||
408 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 379 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
409 | regulator-min-microvolt = <1800000>; | 380 | regulator-min-microvolt = <1800000>; |
410 | regulator-max-microvolt = <1800000>; | 381 | regulator-max-microvolt = <1800000>; |
411 | }; | 382 | }; |
412 | 383 | ||
413 | regulator@13 { | 384 | ldo9 { |
414 | reg = <13>; | ||
415 | regulator-compatible = "ldo9"; | ||
416 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | 385 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
417 | regulator-min-microvolt = <2850000>; | 386 | regulator-min-microvolt = <2850000>; |
418 | regulator-max-microvolt = <2850000>; | 387 | regulator-max-microvolt = <2850000>; |
419 | regulator-always-on; | 388 | regulator-always-on; |
420 | }; | 389 | }; |
421 | 390 | ||
422 | regulator@14 { | 391 | ldo_rtc { |
423 | reg = <14>; | ||
424 | regulator-compatible = "ldo_rtc"; | ||
425 | regulator-name = "vdd_rtc_out,vdd_cell"; | 392 | regulator-name = "vdd_rtc_out,vdd_cell"; |
426 | regulator-min-microvolt = <3300000>; | 393 | regulator-min-microvolt = <3300000>; |
427 | regulator-max-microvolt = <3300000>; | 394 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index ddf287f52d49..6a93d1404c76 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts | |||
@@ -291,37 +291,26 @@ | |||
291 | vinldo9-supply = <&sm2_reg>; | 291 | vinldo9-supply = <&sm2_reg>; |
292 | 292 | ||
293 | regulators { | 293 | regulators { |
294 | #address-cells = <1>; | 294 | sys_reg: sys { |
295 | #size-cells = <0>; | ||
296 | |||
297 | sys_reg: regulator@0 { | ||
298 | reg = <0>; | ||
299 | regulator-compatible = "sys"; | ||
300 | regulator-name = "vdd_sys"; | 295 | regulator-name = "vdd_sys"; |
301 | regulator-always-on; | 296 | regulator-always-on; |
302 | }; | 297 | }; |
303 | 298 | ||
304 | regulator@1 { | 299 | sm0 { |
305 | reg = <1>; | ||
306 | regulator-compatible = "sm0"; | ||
307 | regulator-name = "+1.2vs_sm0,vdd_core"; | 300 | regulator-name = "+1.2vs_sm0,vdd_core"; |
308 | regulator-min-microvolt = <1200000>; | 301 | regulator-min-microvolt = <1200000>; |
309 | regulator-max-microvolt = <1200000>; | 302 | regulator-max-microvolt = <1200000>; |
310 | regulator-always-on; | 303 | regulator-always-on; |
311 | }; | 304 | }; |
312 | 305 | ||
313 | regulator@2 { | 306 | sm1 { |
314 | reg = <2>; | ||
315 | regulator-compatible = "sm1"; | ||
316 | regulator-name = "+1.0vs_sm1,vdd_cpu"; | 307 | regulator-name = "+1.0vs_sm1,vdd_cpu"; |
317 | regulator-min-microvolt = <1000000>; | 308 | regulator-min-microvolt = <1000000>; |
318 | regulator-max-microvolt = <1000000>; | 309 | regulator-max-microvolt = <1000000>; |
319 | regulator-always-on; | 310 | regulator-always-on; |
320 | }; | 311 | }; |
321 | 312 | ||
322 | sm2_reg: regulator@3 { | 313 | sm2_reg: sm2 { |
323 | reg = <3>; | ||
324 | regulator-compatible = "sm2"; | ||
325 | regulator-name = "+3.7vs_sm2,vin_ldo*"; | 314 | regulator-name = "+3.7vs_sm2,vin_ldo*"; |
326 | regulator-min-microvolt = <3700000>; | 315 | regulator-min-microvolt = <3700000>; |
327 | regulator-max-microvolt = <3700000>; | 316 | regulator-max-microvolt = <3700000>; |
@@ -330,53 +319,41 @@ | |||
330 | 319 | ||
331 | /* LDO0 is not connected to anything */ | 320 | /* LDO0 is not connected to anything */ |
332 | 321 | ||
333 | regulator@5 { | 322 | ldo1 { |
334 | reg = <5>; | ||
335 | regulator-compatible = "ldo1"; | ||
336 | regulator-name = "+1.1vs_ldo1,avdd_pll*"; | 323 | regulator-name = "+1.1vs_ldo1,avdd_pll*"; |
337 | regulator-min-microvolt = <1100000>; | 324 | regulator-min-microvolt = <1100000>; |
338 | regulator-max-microvolt = <1100000>; | 325 | regulator-max-microvolt = <1100000>; |
339 | regulator-always-on; | 326 | regulator-always-on; |
340 | }; | 327 | }; |
341 | 328 | ||
342 | regulator@6 { | 329 | ldo2 { |
343 | reg = <6>; | ||
344 | regulator-compatible = "ldo2"; | ||
345 | regulator-name = "+1.2vs_ldo2,vdd_rtc"; | 330 | regulator-name = "+1.2vs_ldo2,vdd_rtc"; |
346 | regulator-min-microvolt = <1200000>; | 331 | regulator-min-microvolt = <1200000>; |
347 | regulator-max-microvolt = <1200000>; | 332 | regulator-max-microvolt = <1200000>; |
348 | }; | 333 | }; |
349 | 334 | ||
350 | regulator@7 { | 335 | ldo3 { |
351 | reg = <7>; | ||
352 | regulator-compatible = "ldo3"; | ||
353 | regulator-name = "+3.3vs_ldo3,avdd_usb*"; | 336 | regulator-name = "+3.3vs_ldo3,avdd_usb*"; |
354 | regulator-min-microvolt = <3300000>; | 337 | regulator-min-microvolt = <3300000>; |
355 | regulator-max-microvolt = <3300000>; | 338 | regulator-max-microvolt = <3300000>; |
356 | regulator-always-on; | 339 | regulator-always-on; |
357 | }; | 340 | }; |
358 | 341 | ||
359 | regulator@8 { | 342 | ldo4 { |
360 | reg = <8>; | ||
361 | regulator-compatible = "ldo4"; | ||
362 | regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; | 343 | regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; |
363 | regulator-min-microvolt = <1800000>; | 344 | regulator-min-microvolt = <1800000>; |
364 | regulator-max-microvolt = <1800000>; | 345 | regulator-max-microvolt = <1800000>; |
365 | regulator-always-on; | 346 | regulator-always-on; |
366 | }; | 347 | }; |
367 | 348 | ||
368 | regulator@9 { | 349 | ldo5 { |
369 | reg = <9>; | ||
370 | regulator-compatible = "ldo5"; | ||
371 | regulator-name = "+2.85vs_ldo5,vcore_mmc"; | 350 | regulator-name = "+2.85vs_ldo5,vcore_mmc"; |
372 | regulator-min-microvolt = <2850000>; | 351 | regulator-min-microvolt = <2850000>; |
373 | regulator-max-microvolt = <2850000>; | 352 | regulator-max-microvolt = <2850000>; |
374 | regulator-always-on; | 353 | regulator-always-on; |
375 | }; | 354 | }; |
376 | 355 | ||
377 | regulator@10 { | 356 | ldo6 { |
378 | reg = <10>; | ||
379 | regulator-compatible = "ldo6"; | ||
380 | /* | 357 | /* |
381 | * Research indicates this should be | 358 | * Research indicates this should be |
382 | * 1.8v; other boards that use this | 359 | * 1.8v; other boards that use this |
@@ -390,34 +367,26 @@ | |||
390 | regulator-max-microvolt = <1800000>; | 367 | regulator-max-microvolt = <1800000>; |
391 | }; | 368 | }; |
392 | 369 | ||
393 | regulator@11 { | 370 | ldo7 { |
394 | reg = <11>; | ||
395 | regulator-compatible = "ldo7"; | ||
396 | regulator-name = "+3.3vs_ldo7,avdd_hdmi"; | 371 | regulator-name = "+3.3vs_ldo7,avdd_hdmi"; |
397 | regulator-min-microvolt = <3300000>; | 372 | regulator-min-microvolt = <3300000>; |
398 | regulator-max-microvolt = <3300000>; | 373 | regulator-max-microvolt = <3300000>; |
399 | }; | 374 | }; |
400 | 375 | ||
401 | regulator@12 { | 376 | ldo8 { |
402 | reg = <12>; | ||
403 | regulator-compatible = "ldo8"; | ||
404 | regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; | 377 | regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; |
405 | regulator-min-microvolt = <1800000>; | 378 | regulator-min-microvolt = <1800000>; |
406 | regulator-max-microvolt = <1800000>; | 379 | regulator-max-microvolt = <1800000>; |
407 | }; | 380 | }; |
408 | 381 | ||
409 | regulator@13 { | 382 | ldo9 { |
410 | reg = <13>; | ||
411 | regulator-compatible = "ldo9"; | ||
412 | regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; | 383 | regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; |
413 | regulator-min-microvolt = <2850000>; | 384 | regulator-min-microvolt = <2850000>; |
414 | regulator-max-microvolt = <2850000>; | 385 | regulator-max-microvolt = <2850000>; |
415 | regulator-always-on; | 386 | regulator-always-on; |
416 | }; | 387 | }; |
417 | 388 | ||
418 | regulator@14 { | 389 | ldo_rtc { |
419 | reg = <14>; | ||
420 | regulator-compatible = "ldo_rtc"; | ||
421 | regulator-name = "+3.3vs_rtc"; | 390 | regulator-name = "+3.3vs_rtc"; |
422 | regulator-min-microvolt = <3300000>; | 391 | regulator-min-microvolt = <3300000>; |
423 | regulator-max-microvolt = <3300000>; | 392 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index a20d4ff3fb3c..e58a0e60f711 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts | |||
@@ -395,37 +395,26 @@ | |||
395 | vinldo9-supply = <&sm2_reg>; | 395 | vinldo9-supply = <&sm2_reg>; |
396 | 396 | ||
397 | regulators { | 397 | regulators { |
398 | #address-cells = <1>; | 398 | sys_reg: sys { |
399 | #size-cells = <0>; | ||
400 | |||
401 | sys_reg: regulator@0 { | ||
402 | reg = <0>; | ||
403 | regulator-compatible = "sys"; | ||
404 | regulator-name = "vdd_sys"; | 399 | regulator-name = "vdd_sys"; |
405 | regulator-always-on; | 400 | regulator-always-on; |
406 | }; | 401 | }; |
407 | 402 | ||
408 | regulator@1 { | 403 | sm0 { |
409 | reg = <1>; | ||
410 | regulator-compatible = "sm0"; | ||
411 | regulator-name = "vdd_sm0,vdd_core"; | 404 | regulator-name = "vdd_sm0,vdd_core"; |
412 | regulator-min-microvolt = <1300000>; | 405 | regulator-min-microvolt = <1300000>; |
413 | regulator-max-microvolt = <1300000>; | 406 | regulator-max-microvolt = <1300000>; |
414 | regulator-always-on; | 407 | regulator-always-on; |
415 | }; | 408 | }; |
416 | 409 | ||
417 | regulator@2 { | 410 | sm1 { |
418 | reg = <2>; | ||
419 | regulator-compatible = "sm1"; | ||
420 | regulator-name = "vdd_sm1,vdd_cpu"; | 411 | regulator-name = "vdd_sm1,vdd_cpu"; |
421 | regulator-min-microvolt = <1125000>; | 412 | regulator-min-microvolt = <1125000>; |
422 | regulator-max-microvolt = <1125000>; | 413 | regulator-max-microvolt = <1125000>; |
423 | regulator-always-on; | 414 | regulator-always-on; |
424 | }; | 415 | }; |
425 | 416 | ||
426 | sm2_reg: regulator@3 { | 417 | sm2_reg: sm2 { |
427 | reg = <3>; | ||
428 | regulator-compatible = "sm2"; | ||
429 | regulator-name = "vdd_sm2,vin_ldo*"; | 418 | regulator-name = "vdd_sm2,vin_ldo*"; |
430 | regulator-min-microvolt = <3700000>; | 419 | regulator-min-microvolt = <3700000>; |
431 | regulator-max-microvolt = <3700000>; | 420 | regulator-max-microvolt = <3700000>; |
@@ -434,86 +423,66 @@ | |||
434 | 423 | ||
435 | /* LDO0 is not connected to anything */ | 424 | /* LDO0 is not connected to anything */ |
436 | 425 | ||
437 | regulator@5 { | 426 | ldo1 { |
438 | reg = <5>; | ||
439 | regulator-compatible = "ldo1"; | ||
440 | regulator-name = "vdd_ldo1,avdd_pll*"; | 427 | regulator-name = "vdd_ldo1,avdd_pll*"; |
441 | regulator-min-microvolt = <1100000>; | 428 | regulator-min-microvolt = <1100000>; |
442 | regulator-max-microvolt = <1100000>; | 429 | regulator-max-microvolt = <1100000>; |
443 | regulator-always-on; | 430 | regulator-always-on; |
444 | }; | 431 | }; |
445 | 432 | ||
446 | regulator@6 { | 433 | ldo2 { |
447 | reg = <6>; | ||
448 | regulator-compatible = "ldo2"; | ||
449 | regulator-name = "vdd_ldo2,vdd_rtc"; | 434 | regulator-name = "vdd_ldo2,vdd_rtc"; |
450 | regulator-min-microvolt = <1200000>; | 435 | regulator-min-microvolt = <1200000>; |
451 | regulator-max-microvolt = <1200000>; | 436 | regulator-max-microvolt = <1200000>; |
452 | }; | 437 | }; |
453 | 438 | ||
454 | regulator@7 { | 439 | ldo3 { |
455 | reg = <7>; | ||
456 | regulator-compatible = "ldo3"; | ||
457 | regulator-name = "vdd_ldo3,avdd_usb*"; | 440 | regulator-name = "vdd_ldo3,avdd_usb*"; |
458 | regulator-min-microvolt = <3300000>; | 441 | regulator-min-microvolt = <3300000>; |
459 | regulator-max-microvolt = <3300000>; | 442 | regulator-max-microvolt = <3300000>; |
460 | regulator-always-on; | 443 | regulator-always-on; |
461 | }; | 444 | }; |
462 | 445 | ||
463 | regulator@8 { | 446 | ldo4 { |
464 | reg = <8>; | ||
465 | regulator-compatible = "ldo4"; | ||
466 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 447 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
467 | regulator-min-microvolt = <1800000>; | 448 | regulator-min-microvolt = <1800000>; |
468 | regulator-max-microvolt = <1800000>; | 449 | regulator-max-microvolt = <1800000>; |
469 | regulator-always-on; | 450 | regulator-always-on; |
470 | }; | 451 | }; |
471 | 452 | ||
472 | regulator@9 { | 453 | ldo5 { |
473 | reg = <9>; | ||
474 | regulator-compatible = "ldo5"; | ||
475 | regulator-name = "vdd_ldo5,vcore_mmc"; | 454 | regulator-name = "vdd_ldo5,vcore_mmc"; |
476 | regulator-min-microvolt = <2850000>; | 455 | regulator-min-microvolt = <2850000>; |
477 | regulator-max-microvolt = <2850000>; | 456 | regulator-max-microvolt = <2850000>; |
478 | regulator-always-on; | 457 | regulator-always-on; |
479 | }; | 458 | }; |
480 | 459 | ||
481 | regulator@10 { | 460 | ldo6 { |
482 | reg = <10>; | ||
483 | regulator-compatible = "ldo6"; | ||
484 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; | 461 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; |
485 | regulator-min-microvolt = <1800000>; | 462 | regulator-min-microvolt = <1800000>; |
486 | regulator-max-microvolt = <1800000>; | 463 | regulator-max-microvolt = <1800000>; |
487 | }; | 464 | }; |
488 | 465 | ||
489 | regulator@11 { | 466 | ldo7 { |
490 | reg = <11>; | ||
491 | regulator-compatible = "ldo7"; | ||
492 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; | 467 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
493 | regulator-min-microvolt = <3300000>; | 468 | regulator-min-microvolt = <3300000>; |
494 | regulator-max-microvolt = <3300000>; | 469 | regulator-max-microvolt = <3300000>; |
495 | }; | 470 | }; |
496 | 471 | ||
497 | regulator@12 { | 472 | ldo8 { |
498 | reg = <12>; | ||
499 | regulator-compatible = "ldo8"; | ||
500 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 473 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
501 | regulator-min-microvolt = <1800000>; | 474 | regulator-min-microvolt = <1800000>; |
502 | regulator-max-microvolt = <1800000>; | 475 | regulator-max-microvolt = <1800000>; |
503 | }; | 476 | }; |
504 | 477 | ||
505 | regulator@13 { | 478 | ldo9 { |
506 | reg = <13>; | ||
507 | regulator-compatible = "ldo9"; | ||
508 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | 479 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
509 | regulator-min-microvolt = <2850000>; | 480 | regulator-min-microvolt = <2850000>; |
510 | regulator-max-microvolt = <2850000>; | 481 | regulator-max-microvolt = <2850000>; |
511 | regulator-always-on; | 482 | regulator-always-on; |
512 | }; | 483 | }; |
513 | 484 | ||
514 | regulator@14 { | 485 | ldo_rtc { |
515 | reg = <14>; | ||
516 | regulator-compatible = "ldo_rtc"; | ||
517 | regulator-name = "vdd_rtc_out,vdd_cell"; | 486 | regulator-name = "vdd_rtc_out,vdd_cell"; |
518 | regulator-min-microvolt = <3300000>; | 487 | regulator-min-microvolt = <3300000>; |
519 | regulator-max-microvolt = <3300000>; | 488 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index f18cec9f6a77..5b3d8b157b33 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi | |||
@@ -271,97 +271,72 @@ | |||
271 | vinldo9-supply = <&sm2_reg>; | 271 | vinldo9-supply = <&sm2_reg>; |
272 | 272 | ||
273 | regulators { | 273 | regulators { |
274 | #address-cells = <1>; | 274 | sys_reg: sys { |
275 | #size-cells = <0>; | ||
276 | |||
277 | sys_reg: regulator@0 { | ||
278 | reg = <0>; | ||
279 | regulator-compatible = "sys"; | ||
280 | regulator-name = "vdd_sys"; | 275 | regulator-name = "vdd_sys"; |
281 | regulator-always-on; | 276 | regulator-always-on; |
282 | }; | 277 | }; |
283 | 278 | ||
284 | regulator@1 { | 279 | sm0 { |
285 | reg = <1>; | ||
286 | regulator-compatible = "sm0"; | ||
287 | regulator-name = "vdd_sys_sm0,vdd_core"; | 280 | regulator-name = "vdd_sys_sm0,vdd_core"; |
288 | regulator-min-microvolt = <1200000>; | 281 | regulator-min-microvolt = <1200000>; |
289 | regulator-max-microvolt = <1200000>; | 282 | regulator-max-microvolt = <1200000>; |
290 | regulator-always-on; | 283 | regulator-always-on; |
291 | }; | 284 | }; |
292 | 285 | ||
293 | regulator@2 { | 286 | sm1 { |
294 | reg = <2>; | ||
295 | regulator-compatible = "sm1"; | ||
296 | regulator-name = "vdd_sys_sm1,vdd_cpu"; | 287 | regulator-name = "vdd_sys_sm1,vdd_cpu"; |
297 | regulator-min-microvolt = <1000000>; | 288 | regulator-min-microvolt = <1000000>; |
298 | regulator-max-microvolt = <1000000>; | 289 | regulator-max-microvolt = <1000000>; |
299 | regulator-always-on; | 290 | regulator-always-on; |
300 | }; | 291 | }; |
301 | 292 | ||
302 | sm2_reg: regulator@3 { | 293 | sm2_reg: sm2 { |
303 | reg = <3>; | ||
304 | regulator-compatible = "sm2"; | ||
305 | regulator-name = "vdd_sys_sm2,vin_ldo*"; | 294 | regulator-name = "vdd_sys_sm2,vin_ldo*"; |
306 | regulator-min-microvolt = <3700000>; | 295 | regulator-min-microvolt = <3700000>; |
307 | regulator-max-microvolt = <3700000>; | 296 | regulator-max-microvolt = <3700000>; |
308 | regulator-always-on; | 297 | regulator-always-on; |
309 | }; | 298 | }; |
310 | 299 | ||
311 | regulator@4 { | 300 | ldo0 { |
312 | reg = <4>; | ||
313 | regulator-compatible = "ldo0"; | ||
314 | regulator-name = "vdd_ldo0,vddio_pex_clk"; | 301 | regulator-name = "vdd_ldo0,vddio_pex_clk"; |
315 | regulator-min-microvolt = <3300000>; | 302 | regulator-min-microvolt = <3300000>; |
316 | regulator-max-microvolt = <3300000>; | 303 | regulator-max-microvolt = <3300000>; |
317 | }; | 304 | }; |
318 | 305 | ||
319 | regulator@5 { | 306 | ldo1 { |
320 | reg = <5>; | ||
321 | regulator-compatible = "ldo1"; | ||
322 | regulator-name = "vdd_ldo1,avdd_pll*"; | 307 | regulator-name = "vdd_ldo1,avdd_pll*"; |
323 | regulator-min-microvolt = <1100000>; | 308 | regulator-min-microvolt = <1100000>; |
324 | regulator-max-microvolt = <1100000>; | 309 | regulator-max-microvolt = <1100000>; |
325 | regulator-always-on; | 310 | regulator-always-on; |
326 | }; | 311 | }; |
327 | 312 | ||
328 | regulator@6 { | 313 | ldo2 { |
329 | reg = <6>; | ||
330 | regulator-compatible = "ldo2"; | ||
331 | regulator-name = "vdd_ldo2,vdd_rtc"; | 314 | regulator-name = "vdd_ldo2,vdd_rtc"; |
332 | regulator-min-microvolt = <1200000>; | 315 | regulator-min-microvolt = <1200000>; |
333 | regulator-max-microvolt = <1200000>; | 316 | regulator-max-microvolt = <1200000>; |
334 | }; | 317 | }; |
335 | 318 | ||
336 | regulator@7 { | 319 | ldo3 { |
337 | reg = <7>; | ||
338 | regulator-compatible = "ldo3"; | ||
339 | regulator-name = "vdd_ldo3,avdd_usb*"; | 320 | regulator-name = "vdd_ldo3,avdd_usb*"; |
340 | regulator-min-microvolt = <3300000>; | 321 | regulator-min-microvolt = <3300000>; |
341 | regulator-max-microvolt = <3300000>; | 322 | regulator-max-microvolt = <3300000>; |
342 | regulator-always-on; | 323 | regulator-always-on; |
343 | }; | 324 | }; |
344 | 325 | ||
345 | regulator@8 { | 326 | ldo4 { |
346 | reg = <8>; | ||
347 | regulator-compatible = "ldo4"; | ||
348 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 327 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
349 | regulator-min-microvolt = <1800000>; | 328 | regulator-min-microvolt = <1800000>; |
350 | regulator-max-microvolt = <1800000>; | 329 | regulator-max-microvolt = <1800000>; |
351 | regulator-always-on; | 330 | regulator-always-on; |
352 | }; | 331 | }; |
353 | 332 | ||
354 | regulator@9 { | 333 | ldo5 { |
355 | reg = <9>; | ||
356 | regulator-compatible = "ldo5"; | ||
357 | regulator-name = "vdd_ldo5,vcore_mmc"; | 334 | regulator-name = "vdd_ldo5,vcore_mmc"; |
358 | regulator-min-microvolt = <2850000>; | 335 | regulator-min-microvolt = <2850000>; |
359 | regulator-max-microvolt = <2850000>; | 336 | regulator-max-microvolt = <2850000>; |
360 | }; | 337 | }; |
361 | 338 | ||
362 | regulator@10 { | 339 | ldo6 { |
363 | reg = <10>; | ||
364 | regulator-compatible = "ldo6"; | ||
365 | regulator-name = "vdd_ldo6,avdd_vdac"; | 340 | regulator-name = "vdd_ldo6,avdd_vdac"; |
366 | /* | 341 | /* |
367 | * According to the Tegra 2 Automotive | 342 | * According to the Tegra 2 Automotive |
@@ -373,25 +348,19 @@ | |||
373 | regulator-max-microvolt = <2850000>; | 348 | regulator-max-microvolt = <2850000>; |
374 | }; | 349 | }; |
375 | 350 | ||
376 | regulator@11 { | 351 | ldo7 { |
377 | reg = <11>; | ||
378 | regulator-compatible = "ldo7"; | ||
379 | regulator-name = "vdd_ldo7,avdd_hdmi"; | 352 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
380 | regulator-min-microvolt = <3300000>; | 353 | regulator-min-microvolt = <3300000>; |
381 | regulator-max-microvolt = <3300000>; | 354 | regulator-max-microvolt = <3300000>; |
382 | }; | 355 | }; |
383 | 356 | ||
384 | regulator@12 { | 357 | ldo8 { |
385 | reg = <12>; | ||
386 | regulator-compatible = "ldo8"; | ||
387 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 358 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
388 | regulator-min-microvolt = <1800000>; | 359 | regulator-min-microvolt = <1800000>; |
389 | regulator-max-microvolt = <1800000>; | 360 | regulator-max-microvolt = <1800000>; |
390 | }; | 361 | }; |
391 | 362 | ||
392 | regulator@13 { | 363 | ldo9 { |
393 | reg = <13>; | ||
394 | regulator-compatible = "ldo9"; | ||
395 | regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; | 364 | regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; |
396 | /* | 365 | /* |
397 | * According to the Tegra 2 Automotive | 366 | * According to the Tegra 2 Automotive |
@@ -404,9 +373,7 @@ | |||
404 | regulator-always-on; | 373 | regulator-always-on; |
405 | }; | 374 | }; |
406 | 375 | ||
407 | regulator@14 { | 376 | ldo_rtc { |
408 | reg = <14>; | ||
409 | regulator-compatible = "ldo_rtc"; | ||
410 | regulator-name = "vdd_rtc_out"; | 377 | regulator-name = "vdd_rtc_out"; |
411 | regulator-min-microvolt = <3300000>; | 378 | regulator-min-microvolt = <3300000>; |
412 | regulator-max-microvolt = <3300000>; | 379 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 3e5952fcfbc5..86854f1abd58 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts | |||
@@ -311,37 +311,26 @@ | |||
311 | vinldo9-supply = <&sm2_reg>; | 311 | vinldo9-supply = <&sm2_reg>; |
312 | 312 | ||
313 | regulators { | 313 | regulators { |
314 | #address-cells = <1>; | 314 | sys_reg: sys { |
315 | #size-cells = <0>; | ||
316 | |||
317 | sys_reg: regulator@0 { | ||
318 | reg = <0>; | ||
319 | regulator-compatible = "sys"; | ||
320 | regulator-name = "vdd_sys"; | 315 | regulator-name = "vdd_sys"; |
321 | regulator-always-on; | 316 | regulator-always-on; |
322 | }; | 317 | }; |
323 | 318 | ||
324 | regulator@1 { | 319 | sm0 { |
325 | reg = <1>; | ||
326 | regulator-compatible = "sm0"; | ||
327 | regulator-name = "vdd_sm0,vdd_core"; | 320 | regulator-name = "vdd_sm0,vdd_core"; |
328 | regulator-min-microvolt = <1200000>; | 321 | regulator-min-microvolt = <1200000>; |
329 | regulator-max-microvolt = <1200000>; | 322 | regulator-max-microvolt = <1200000>; |
330 | regulator-always-on; | 323 | regulator-always-on; |
331 | }; | 324 | }; |
332 | 325 | ||
333 | regulator@2 { | 326 | sm1 { |
334 | reg = <2>; | ||
335 | regulator-compatible = "sm1"; | ||
336 | regulator-name = "vdd_sm1,vdd_cpu"; | 327 | regulator-name = "vdd_sm1,vdd_cpu"; |
337 | regulator-min-microvolt = <1000000>; | 328 | regulator-min-microvolt = <1000000>; |
338 | regulator-max-microvolt = <1000000>; | 329 | regulator-max-microvolt = <1000000>; |
339 | regulator-always-on; | 330 | regulator-always-on; |
340 | }; | 331 | }; |
341 | 332 | ||
342 | sm2_reg: regulator@3 { | 333 | sm2_reg: sm2 { |
343 | reg = <3>; | ||
344 | regulator-compatible = "sm2"; | ||
345 | regulator-name = "vdd_sm2,vin_ldo*"; | 334 | regulator-name = "vdd_sm2,vin_ldo*"; |
346 | regulator-min-microvolt = <3700000>; | 335 | regulator-min-microvolt = <3700000>; |
347 | regulator-max-microvolt = <3700000>; | 336 | regulator-max-microvolt = <3700000>; |
@@ -350,86 +339,66 @@ | |||
350 | 339 | ||
351 | /* LDO0 is not connected to anything */ | 340 | /* LDO0 is not connected to anything */ |
352 | 341 | ||
353 | regulator@5 { | 342 | ldo1 { |
354 | reg = <5>; | ||
355 | regulator-compatible = "ldo1"; | ||
356 | regulator-name = "vdd_ldo1,avdd_pll*"; | 343 | regulator-name = "vdd_ldo1,avdd_pll*"; |
357 | regulator-min-microvolt = <1100000>; | 344 | regulator-min-microvolt = <1100000>; |
358 | regulator-max-microvolt = <1100000>; | 345 | regulator-max-microvolt = <1100000>; |
359 | regulator-always-on; | 346 | regulator-always-on; |
360 | }; | 347 | }; |
361 | 348 | ||
362 | regulator@6 { | 349 | ldo2 { |
363 | reg = <6>; | ||
364 | regulator-compatible = "ldo2"; | ||
365 | regulator-name = "vdd_ldo2,vdd_rtc"; | 350 | regulator-name = "vdd_ldo2,vdd_rtc"; |
366 | regulator-min-microvolt = <1200000>; | 351 | regulator-min-microvolt = <1200000>; |
367 | regulator-max-microvolt = <1200000>; | 352 | regulator-max-microvolt = <1200000>; |
368 | }; | 353 | }; |
369 | 354 | ||
370 | regulator@7 { | 355 | ldo3 { |
371 | reg = <7>; | ||
372 | regulator-compatible = "ldo3"; | ||
373 | regulator-name = "vdd_ldo3,avdd_usb*"; | 356 | regulator-name = "vdd_ldo3,avdd_usb*"; |
374 | regulator-min-microvolt = <3300000>; | 357 | regulator-min-microvolt = <3300000>; |
375 | regulator-max-microvolt = <3300000>; | 358 | regulator-max-microvolt = <3300000>; |
376 | regulator-always-on; | 359 | regulator-always-on; |
377 | }; | 360 | }; |
378 | 361 | ||
379 | regulator@8 { | 362 | ldo4 { |
380 | reg = <8>; | ||
381 | regulator-compatible = "ldo4"; | ||
382 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; | 363 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
383 | regulator-min-microvolt = <1800000>; | 364 | regulator-min-microvolt = <1800000>; |
384 | regulator-max-microvolt = <1800000>; | 365 | regulator-max-microvolt = <1800000>; |
385 | regulator-always-on; | 366 | regulator-always-on; |
386 | }; | 367 | }; |
387 | 368 | ||
388 | regulator@9 { | 369 | ldo5 { |
389 | reg = <9>; | ||
390 | regulator-compatible = "ldo5"; | ||
391 | regulator-name = "vdd_ldo5,vcore_mmc"; | 370 | regulator-name = "vdd_ldo5,vcore_mmc"; |
392 | regulator-min-microvolt = <2850000>; | 371 | regulator-min-microvolt = <2850000>; |
393 | regulator-max-microvolt = <2850000>; | 372 | regulator-max-microvolt = <2850000>; |
394 | regulator-always-on; | 373 | regulator-always-on; |
395 | }; | 374 | }; |
396 | 375 | ||
397 | regulator@10 { | 376 | ldo6 { |
398 | reg = <10>; | ||
399 | regulator-compatible = "ldo6"; | ||
400 | regulator-name = "vdd_ldo6,avdd_vdac"; | 377 | regulator-name = "vdd_ldo6,avdd_vdac"; |
401 | regulator-min-microvolt = <1800000>; | 378 | regulator-min-microvolt = <1800000>; |
402 | regulator-max-microvolt = <1800000>; | 379 | regulator-max-microvolt = <1800000>; |
403 | }; | 380 | }; |
404 | 381 | ||
405 | regulator@11 { | 382 | ldo7 { |
406 | reg = <11>; | ||
407 | regulator-compatible = "ldo7"; | ||
408 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; | 383 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
409 | regulator-min-microvolt = <3300000>; | 384 | regulator-min-microvolt = <3300000>; |
410 | regulator-max-microvolt = <3300000>; | 385 | regulator-max-microvolt = <3300000>; |
411 | }; | 386 | }; |
412 | 387 | ||
413 | regulator@12 { | 388 | ldo8 { |
414 | reg = <12>; | ||
415 | regulator-compatible = "ldo8"; | ||
416 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 389 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
417 | regulator-min-microvolt = <1800000>; | 390 | regulator-min-microvolt = <1800000>; |
418 | regulator-max-microvolt = <1800000>; | 391 | regulator-max-microvolt = <1800000>; |
419 | }; | 392 | }; |
420 | 393 | ||
421 | regulator@13 { | 394 | ldo9 { |
422 | reg = <13>; | ||
423 | regulator-compatible = "ldo9"; | ||
424 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; | 395 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
425 | regulator-min-microvolt = <2850000>; | 396 | regulator-min-microvolt = <2850000>; |
426 | regulator-max-microvolt = <2850000>; | 397 | regulator-max-microvolt = <2850000>; |
427 | regulator-always-on; | 398 | regulator-always-on; |
428 | }; | 399 | }; |
429 | 400 | ||
430 | regulator@14 { | 401 | ldo_rtc { |
431 | reg = <14>; | ||
432 | regulator-compatible = "ldo_rtc"; | ||
433 | regulator-name = "vdd_rtc_out,vdd_cell"; | 402 | regulator-name = "vdd_rtc_out,vdd_cell"; |
434 | regulator-min-microvolt = <3300000>; | 403 | regulator-min-microvolt = <3300000>; |
435 | regulator-max-microvolt = <3300000>; | 404 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index c636d002d6d8..94a71c91beb5 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts | |||
@@ -295,243 +295,182 @@ | |||
295 | in20-supply = <&mbatt_reg>; | 295 | in20-supply = <&mbatt_reg>; |
296 | 296 | ||
297 | regulators { | 297 | regulators { |
298 | #address-cells = <1>; | 298 | mbatt_reg: mbatt { |
299 | #size-cells = <0>; | ||
300 | |||
301 | mbatt_reg: regulator@0 { | ||
302 | reg = <0>; | ||
303 | regulator-compatible = "mbatt"; | ||
304 | regulator-name = "vbat_pmu"; | 299 | regulator-name = "vbat_pmu"; |
305 | regulator-always-on; | 300 | regulator-always-on; |
306 | }; | 301 | }; |
307 | 302 | ||
308 | regulator@1 { | 303 | sd1 { |
309 | reg = <1>; | ||
310 | regulator-compatible = "sd1"; | ||
311 | regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; | 304 | regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; |
312 | regulator-min-microvolt = <1000000>; | 305 | regulator-min-microvolt = <1000000>; |
313 | regulator-max-microvolt = <1000000>; | 306 | regulator-max-microvolt = <1000000>; |
314 | regulator-always-on; | 307 | regulator-always-on; |
315 | }; | 308 | }; |
316 | 309 | ||
317 | regulator@2 { | 310 | sd2 { |
318 | reg = <2>; | ||
319 | regulator-compatible = "sd2"; | ||
320 | regulator-name = "nvvdd_sv2,vdd_core"; | 311 | regulator-name = "nvvdd_sv2,vdd_core"; |
321 | regulator-min-microvolt = <1200000>; | 312 | regulator-min-microvolt = <1200000>; |
322 | regulator-max-microvolt = <1200000>; | 313 | regulator-max-microvolt = <1200000>; |
323 | regulator-always-on; | 314 | regulator-always-on; |
324 | }; | 315 | }; |
325 | 316 | ||
326 | nvvdd_sv3_reg: regulator@3 { | 317 | nvvdd_sv3_reg: sd3 { |
327 | reg = <3>; | ||
328 | regulator-compatible = "sd3"; | ||
329 | regulator-name = "nvvdd_sv3"; | 318 | regulator-name = "nvvdd_sv3"; |
330 | regulator-min-microvolt = <1800000>; | 319 | regulator-min-microvolt = <1800000>; |
331 | regulator-max-microvolt = <1800000>; | 320 | regulator-max-microvolt = <1800000>; |
332 | regulator-always-on; | 321 | regulator-always-on; |
333 | }; | 322 | }; |
334 | 323 | ||
335 | regulator@4 { | 324 | ldo1 { |
336 | reg = <4>; | ||
337 | regulator-compatible = "ldo1"; | ||
338 | regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; | 325 | regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; |
339 | regulator-min-microvolt = <3300000>; | 326 | regulator-min-microvolt = <3300000>; |
340 | regulator-max-microvolt = <3300000>; | 327 | regulator-max-microvolt = <3300000>; |
341 | regulator-always-on; | 328 | regulator-always-on; |
342 | }; | 329 | }; |
343 | 330 | ||
344 | regulator@5 { | 331 | ldo2 { |
345 | reg = <5>; | ||
346 | regulator-compatible = "ldo2"; | ||
347 | regulator-name = "nvvdd_ldo2,avdd_pll*"; | 332 | regulator-name = "nvvdd_ldo2,avdd_pll*"; |
348 | regulator-min-microvolt = <1100000>; | 333 | regulator-min-microvolt = <1100000>; |
349 | regulator-max-microvolt = <1100000>; | 334 | regulator-max-microvolt = <1100000>; |
350 | regulator-always-on; | 335 | regulator-always-on; |
351 | }; | 336 | }; |
352 | 337 | ||
353 | regulator@6 { | 338 | ldo3 { |
354 | reg = <6>; | ||
355 | regulator-compatible = "ldo3"; | ||
356 | regulator-name = "nvvdd_ldo3,vcom_1v8b"; | 339 | regulator-name = "nvvdd_ldo3,vcom_1v8b"; |
357 | regulator-min-microvolt = <1800000>; | 340 | regulator-min-microvolt = <1800000>; |
358 | regulator-max-microvolt = <1800000>; | 341 | regulator-max-microvolt = <1800000>; |
359 | regulator-always-on; | 342 | regulator-always-on; |
360 | }; | 343 | }; |
361 | 344 | ||
362 | regulator@7 { | 345 | ldo4 { |
363 | reg = <7>; | ||
364 | regulator-compatible = "ldo4"; | ||
365 | regulator-name = "nvvdd_ldo4,avdd_usb*"; | 346 | regulator-name = "nvvdd_ldo4,avdd_usb*"; |
366 | regulator-min-microvolt = <3300000>; | 347 | regulator-min-microvolt = <3300000>; |
367 | regulator-max-microvolt = <3300000>; | 348 | regulator-max-microvolt = <3300000>; |
368 | regulator-always-on; | 349 | regulator-always-on; |
369 | }; | 350 | }; |
370 | 351 | ||
371 | regulator@8 { | 352 | ldo5 { |
372 | reg = <8>; | ||
373 | regulator-compatible = "ldo5"; | ||
374 | regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; | 353 | regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; |
375 | regulator-min-microvolt = <2800000>; | 354 | regulator-min-microvolt = <2800000>; |
376 | regulator-max-microvolt = <2800000>; | 355 | regulator-max-microvolt = <2800000>; |
377 | regulator-always-on; | 356 | regulator-always-on; |
378 | }; | 357 | }; |
379 | 358 | ||
380 | regulator@9 { | 359 | ldo6 { |
381 | reg = <9>; | ||
382 | regulator-compatible = "ldo6"; | ||
383 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; | 360 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; |
384 | regulator-min-microvolt = <1800000>; | 361 | regulator-min-microvolt = <1800000>; |
385 | regulator-max-microvolt = <1800000>; | 362 | regulator-max-microvolt = <1800000>; |
386 | }; | 363 | }; |
387 | 364 | ||
388 | regulator@10 { | 365 | ldo7 { |
389 | reg = <10>; | ||
390 | regulator-compatible = "ldo7"; | ||
391 | regulator-name = "nvvdd_ldo7,avddio_audio"; | 366 | regulator-name = "nvvdd_ldo7,avddio_audio"; |
392 | regulator-min-microvolt = <2800000>; | 367 | regulator-min-microvolt = <2800000>; |
393 | regulator-max-microvolt = <2800000>; | 368 | regulator-max-microvolt = <2800000>; |
394 | regulator-always-on; | 369 | regulator-always-on; |
395 | }; | 370 | }; |
396 | 371 | ||
397 | regulator@11 { | 372 | ldo8 { |
398 | reg = <11>; | ||
399 | regulator-compatible = "ldo8"; | ||
400 | regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; | 373 | regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; |
401 | regulator-min-microvolt = <3000000>; | 374 | regulator-min-microvolt = <3000000>; |
402 | regulator-max-microvolt = <3000000>; | 375 | regulator-max-microvolt = <3000000>; |
403 | }; | 376 | }; |
404 | 377 | ||
405 | regulator@12 { | 378 | ldo9 { |
406 | reg = <12>; | ||
407 | regulator-compatible = "ldo9"; | ||
408 | regulator-name = "nvvdd_ldo9,avdd_cam*"; | 379 | regulator-name = "nvvdd_ldo9,avdd_cam*"; |
409 | regulator-min-microvolt = <2800000>; | 380 | regulator-min-microvolt = <2800000>; |
410 | regulator-max-microvolt = <2800000>; | 381 | regulator-max-microvolt = <2800000>; |
411 | }; | 382 | }; |
412 | 383 | ||
413 | regulator@13 { | 384 | ldo10 { |
414 | reg = <13>; | ||
415 | regulator-compatible = "ldo10"; | ||
416 | regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; | 385 | regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; |
417 | regulator-min-microvolt = <3000000>; | 386 | regulator-min-microvolt = <3000000>; |
418 | regulator-max-microvolt = <3000000>; | 387 | regulator-max-microvolt = <3000000>; |
419 | regulator-always-on; | 388 | regulator-always-on; |
420 | }; | 389 | }; |
421 | 390 | ||
422 | regulator@14 { | 391 | ldo11 { |
423 | reg = <14>; | ||
424 | regulator-compatible = "ldo11"; | ||
425 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; | 392 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; |
426 | regulator-min-microvolt = <3300000>; | 393 | regulator-min-microvolt = <3300000>; |
427 | regulator-max-microvolt = <3300000>; | 394 | regulator-max-microvolt = <3300000>; |
428 | }; | 395 | }; |
429 | 396 | ||
430 | regulator@15 { | 397 | ldo12 { |
431 | reg = <15>; | ||
432 | regulator-compatible = "ldo12"; | ||
433 | regulator-name = "nvvdd_ldo12,vddio_sdio"; | 398 | regulator-name = "nvvdd_ldo12,vddio_sdio"; |
434 | regulator-min-microvolt = <2800000>; | 399 | regulator-min-microvolt = <2800000>; |
435 | regulator-max-microvolt = <2800000>; | 400 | regulator-max-microvolt = <2800000>; |
436 | regulator-always-on; | 401 | regulator-always-on; |
437 | }; | 402 | }; |
438 | 403 | ||
439 | regulator@16 { | 404 | ldo13 { |
440 | reg = <16>; | ||
441 | regulator-compatible = "ldo13"; | ||
442 | regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; | 405 | regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; |
443 | regulator-min-microvolt = <2800000>; | 406 | regulator-min-microvolt = <2800000>; |
444 | regulator-max-microvolt = <2800000>; | 407 | regulator-max-microvolt = <2800000>; |
445 | }; | 408 | }; |
446 | 409 | ||
447 | regulator@17 { | 410 | ldo14 { |
448 | reg = <17>; | ||
449 | regulator-compatible = "ldo14"; | ||
450 | regulator-name = "nvvdd_ldo14,avdd_vdac"; | 411 | regulator-name = "nvvdd_ldo14,avdd_vdac"; |
451 | regulator-min-microvolt = <2800000>; | 412 | regulator-min-microvolt = <2800000>; |
452 | regulator-max-microvolt = <2800000>; | 413 | regulator-max-microvolt = <2800000>; |
453 | }; | 414 | }; |
454 | 415 | ||
455 | regulator@18 { | 416 | ldo15 { |
456 | reg = <18>; | ||
457 | regulator-compatible = "ldo15"; | ||
458 | regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; | 417 | regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; |
459 | regulator-min-microvolt = <3300000>; | 418 | regulator-min-microvolt = <3300000>; |
460 | regulator-max-microvolt = <3300000>; | 419 | regulator-max-microvolt = <3300000>; |
461 | }; | 420 | }; |
462 | 421 | ||
463 | regulator@19 { | 422 | ldo16 { |
464 | reg = <19>; | ||
465 | regulator-compatible = "ldo16"; | ||
466 | regulator-name = "nvvdd_ldo16,vdd_dbrtr"; | 423 | regulator-name = "nvvdd_ldo16,vdd_dbrtr"; |
467 | regulator-min-microvolt = <1300000>; | 424 | regulator-min-microvolt = <1300000>; |
468 | regulator-max-microvolt = <1300000>; | 425 | regulator-max-microvolt = <1300000>; |
469 | }; | 426 | }; |
470 | 427 | ||
471 | regulator@20 { | 428 | ldo17 { |
472 | reg = <20>; | ||
473 | regulator-compatible = "ldo17"; | ||
474 | regulator-name = "nvvdd_ldo17,vddio_mipi"; | 429 | regulator-name = "nvvdd_ldo17,vddio_mipi"; |
475 | regulator-min-microvolt = <1200000>; | 430 | regulator-min-microvolt = <1200000>; |
476 | regulator-max-microvolt = <1200000>; | 431 | regulator-max-microvolt = <1200000>; |
477 | }; | 432 | }; |
478 | 433 | ||
479 | regulator@21 { | 434 | ldo18 { |
480 | reg = <21>; | ||
481 | regulator-compatible = "ldo18"; | ||
482 | regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; | 435 | regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; |
483 | regulator-min-microvolt = <1800000>; | 436 | regulator-min-microvolt = <1800000>; |
484 | regulator-max-microvolt = <1800000>; | 437 | regulator-max-microvolt = <1800000>; |
485 | }; | 438 | }; |
486 | 439 | ||
487 | regulator@22 { | 440 | ldo19 { |
488 | reg = <22>; | ||
489 | regulator-compatible = "ldo19"; | ||
490 | regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; | 441 | regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; |
491 | regulator-min-microvolt = <2800000>; | 442 | regulator-min-microvolt = <2800000>; |
492 | regulator-max-microvolt = <2800000>; | 443 | regulator-max-microvolt = <2800000>; |
493 | }; | 444 | }; |
494 | 445 | ||
495 | regulator@23 { | 446 | ldo20 { |
496 | reg = <23>; | ||
497 | regulator-compatible = "ldo20"; | ||
498 | regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; | 447 | regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; |
499 | regulator-min-microvolt = <1200000>; | 448 | regulator-min-microvolt = <1200000>; |
500 | regulator-max-microvolt = <1200000>; | 449 | regulator-max-microvolt = <1200000>; |
501 | regulator-always-on; | 450 | regulator-always-on; |
502 | }; | 451 | }; |
503 | 452 | ||
504 | regulator@24 { | 453 | out5v { |
505 | reg = <24>; | ||
506 | regulator-compatible = "out5v"; | ||
507 | regulator-name = "usb0_vbus_reg"; | 454 | regulator-name = "usb0_vbus_reg"; |
508 | }; | 455 | }; |
509 | 456 | ||
510 | regulator@25 { | 457 | out33v { |
511 | reg = <25>; | ||
512 | regulator-compatible = "out33v"; | ||
513 | regulator-name = "pmu_out3v3"; | 458 | regulator-name = "pmu_out3v3"; |
514 | }; | 459 | }; |
515 | 460 | ||
516 | regulator@26 { | 461 | bbat { |
517 | reg = <26>; | ||
518 | regulator-compatible = "bbat"; | ||
519 | regulator-name = "pmu_bbat"; | 462 | regulator-name = "pmu_bbat"; |
520 | regulator-min-microvolt = <2400000>; | 463 | regulator-min-microvolt = <2400000>; |
521 | regulator-max-microvolt = <2400000>; | 464 | regulator-max-microvolt = <2400000>; |
522 | regulator-always-on; | 465 | regulator-always-on; |
523 | }; | 466 | }; |
524 | 467 | ||
525 | regulator@27 { | 468 | sdby { |
526 | reg = <27>; | ||
527 | regulator-compatible = "sdby"; | ||
528 | regulator-name = "vdd_aon"; | 469 | regulator-name = "vdd_aon"; |
529 | regulator-always-on; | 470 | regulator-always-on; |
530 | }; | 471 | }; |
531 | 472 | ||
532 | regulator@28 { | 473 | vrtc { |
533 | reg = <28>; | ||
534 | regulator-compatible = "vrtc"; | ||
535 | regulator-name = "vrtc,pmu_vccadc"; | 474 | regulator-name = "vrtc,pmu_vccadc"; |
536 | regulator-always-on; | 475 | regulator-always-on; |
537 | }; | 476 | }; |
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index d10c9c5a3606..b1271a894327 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi | |||
@@ -171,56 +171,41 @@ | |||
171 | vccio-supply = <&vdd_ac_bat_reg>; | 171 | vccio-supply = <&vdd_ac_bat_reg>; |
172 | 172 | ||
173 | regulators { | 173 | regulators { |
174 | #address-cells = <1>; | 174 | vdd1_reg: vdd1 { |
175 | #size-cells = <0>; | ||
176 | |||
177 | vdd1_reg: regulator@0 { | ||
178 | reg = <0>; | ||
179 | regulator-compatible = "vdd1"; | ||
180 | regulator-name = "vddio_ddr_1v2"; | 175 | regulator-name = "vddio_ddr_1v2"; |
181 | regulator-min-microvolt = <1200000>; | 176 | regulator-min-microvolt = <1200000>; |
182 | regulator-max-microvolt = <1200000>; | 177 | regulator-max-microvolt = <1200000>; |
183 | regulator-always-on; | 178 | regulator-always-on; |
184 | }; | 179 | }; |
185 | 180 | ||
186 | vdd2_reg: regulator@1 { | 181 | vdd2_reg: vdd2 { |
187 | reg = <1>; | ||
188 | regulator-compatible = "vdd2"; | ||
189 | regulator-name = "vdd_1v5_gen"; | 182 | regulator-name = "vdd_1v5_gen"; |
190 | regulator-min-microvolt = <1500000>; | 183 | regulator-min-microvolt = <1500000>; |
191 | regulator-max-microvolt = <1500000>; | 184 | regulator-max-microvolt = <1500000>; |
192 | regulator-always-on; | 185 | regulator-always-on; |
193 | }; | 186 | }; |
194 | 187 | ||
195 | vddctrl_reg: regulator@2 { | 188 | vddctrl_reg: vddctrl { |
196 | reg = <2>; | ||
197 | regulator-compatible = "vddctrl"; | ||
198 | regulator-name = "vdd_cpu,vdd_sys"; | 189 | regulator-name = "vdd_cpu,vdd_sys"; |
199 | regulator-min-microvolt = <1000000>; | 190 | regulator-min-microvolt = <1000000>; |
200 | regulator-max-microvolt = <1000000>; | 191 | regulator-max-microvolt = <1000000>; |
201 | regulator-always-on; | 192 | regulator-always-on; |
202 | }; | 193 | }; |
203 | 194 | ||
204 | vio_reg: regulator@3 { | 195 | vio_reg: vio { |
205 | reg = <3>; | ||
206 | regulator-compatible = "vio"; | ||
207 | regulator-name = "vdd_1v8_gen"; | 196 | regulator-name = "vdd_1v8_gen"; |
208 | regulator-min-microvolt = <1800000>; | 197 | regulator-min-microvolt = <1800000>; |
209 | regulator-max-microvolt = <1800000>; | 198 | regulator-max-microvolt = <1800000>; |
210 | regulator-always-on; | 199 | regulator-always-on; |
211 | }; | 200 | }; |
212 | 201 | ||
213 | ldo1_reg: regulator@4 { | 202 | ldo1_reg: ldo1 { |
214 | reg = <4>; | ||
215 | regulator-compatible = "ldo1"; | ||
216 | regulator-name = "vdd_pexa,vdd_pexb"; | 203 | regulator-name = "vdd_pexa,vdd_pexb"; |
217 | regulator-min-microvolt = <1050000>; | 204 | regulator-min-microvolt = <1050000>; |
218 | regulator-max-microvolt = <1050000>; | 205 | regulator-max-microvolt = <1050000>; |
219 | }; | 206 | }; |
220 | 207 | ||
221 | ldo2_reg: regulator@5 { | 208 | ldo2_reg: ldo2 { |
222 | reg = <5>; | ||
223 | regulator-compatible = "ldo2"; | ||
224 | regulator-name = "vdd_sata,avdd_plle"; | 209 | regulator-name = "vdd_sata,avdd_plle"; |
225 | regulator-min-microvolt = <1050000>; | 210 | regulator-min-microvolt = <1050000>; |
226 | regulator-max-microvolt = <1050000>; | 211 | regulator-max-microvolt = <1050000>; |
@@ -228,44 +213,34 @@ | |||
228 | 213 | ||
229 | /* LDO3 is not connected to anything */ | 214 | /* LDO3 is not connected to anything */ |
230 | 215 | ||
231 | ldo4_reg: regulator@7 { | 216 | ldo4_reg: ldo4 { |
232 | reg = <7>; | ||
233 | regulator-compatible = "ldo4"; | ||
234 | regulator-name = "vdd_rtc"; | 217 | regulator-name = "vdd_rtc"; |
235 | regulator-min-microvolt = <1200000>; | 218 | regulator-min-microvolt = <1200000>; |
236 | regulator-max-microvolt = <1200000>; | 219 | regulator-max-microvolt = <1200000>; |
237 | regulator-always-on; | 220 | regulator-always-on; |
238 | }; | 221 | }; |
239 | 222 | ||
240 | ldo5_reg: regulator@8 { | 223 | ldo5_reg: ldo5 { |
241 | reg = <8>; | ||
242 | regulator-compatible = "ldo5"; | ||
243 | regulator-name = "vddio_sdmmc,avdd_vdac"; | 224 | regulator-name = "vddio_sdmmc,avdd_vdac"; |
244 | regulator-min-microvolt = <3300000>; | 225 | regulator-min-microvolt = <3300000>; |
245 | regulator-max-microvolt = <3300000>; | 226 | regulator-max-microvolt = <3300000>; |
246 | regulator-always-on; | 227 | regulator-always-on; |
247 | }; | 228 | }; |
248 | 229 | ||
249 | ldo6_reg: regulator@9 { | 230 | ldo6_reg: ldo6 { |
250 | reg = <9>; | ||
251 | regulator-compatible = "ldo6"; | ||
252 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; | 231 | regulator-name = "avdd_dsi_csi,pwrdet_mipi"; |
253 | regulator-min-microvolt = <1200000>; | 232 | regulator-min-microvolt = <1200000>; |
254 | regulator-max-microvolt = <1200000>; | 233 | regulator-max-microvolt = <1200000>; |
255 | }; | 234 | }; |
256 | 235 | ||
257 | ldo7_reg: regulator@10 { | 236 | ldo7_reg: ldo7 { |
258 | reg = <10>; | ||
259 | regulator-compatible = "ldo7"; | ||
260 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; | 237 | regulator-name = "vdd_pllm,x,u,a_p_c_s"; |
261 | regulator-min-microvolt = <1200000>; | 238 | regulator-min-microvolt = <1200000>; |
262 | regulator-max-microvolt = <1200000>; | 239 | regulator-max-microvolt = <1200000>; |
263 | regulator-always-on; | 240 | regulator-always-on; |
264 | }; | 241 | }; |
265 | 242 | ||
266 | ldo8_reg: regulator@11 { | 243 | ldo8_reg: ldo8 { |
267 | reg = <11>; | ||
268 | regulator-compatible = "ldo8"; | ||
269 | regulator-name = "vdd_ddr_hs"; | 244 | regulator-name = "vdd_ddr_hs"; |
270 | regulator-min-microvolt = <1000000>; | 245 | regulator-min-microvolt = <1000000>; |
271 | regulator-max-microvolt = <1000000>; | 246 | regulator-max-microvolt = <1000000>; |
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi index ff000172c93c..63411b036932 100644 --- a/arch/arm/boot/dts/twl4030.dtsi +++ b/arch/arm/boot/dts/twl4030.dtsi | |||
@@ -37,6 +37,24 @@ | |||
37 | regulator-max-microvolt = <3150000>; | 37 | regulator-max-microvolt = <3150000>; |
38 | }; | 38 | }; |
39 | 39 | ||
40 | vusb1v5: regulator-vusb1v5 { | ||
41 | compatible = "ti,twl4030-vusb1v5"; | ||
42 | }; | ||
43 | |||
44 | vusb1v8: regulator-vusb1v8 { | ||
45 | compatible = "ti,twl4030-vusb1v8"; | ||
46 | }; | ||
47 | |||
48 | vusb3v1: regulator-vusb3v1 { | ||
49 | compatible = "ti,twl4030-vusb3v1"; | ||
50 | }; | ||
51 | |||
52 | vsim: regulator-vsim { | ||
53 | compatible = "ti,twl4030-vsim"; | ||
54 | regulator-min-microvolt = <1800000>; | ||
55 | regulator-max-microvolt = <3000000>; | ||
56 | }; | ||
57 | |||
40 | twl_gpio: gpio { | 58 | twl_gpio: gpio { |
41 | compatible = "ti,twl4030-gpio"; | 59 | compatible = "ti,twl4030-gpio"; |
42 | gpio-controller; | 60 | gpio-controller; |
@@ -44,4 +62,13 @@ | |||
44 | interrupt-controller; | 62 | interrupt-controller; |
45 | #interrupt-cells = <1>; | 63 | #interrupt-cells = <1>; |
46 | }; | 64 | }; |
65 | |||
66 | twl4030-usb { | ||
67 | compatible = "ti,twl4030-usb"; | ||
68 | interrupts = <10>, <4>; | ||
69 | usb1v5-supply = <&vusb1v5>; | ||
70 | usb1v8-supply = <&vusb1v8>; | ||
71 | usb3v1-supply = <&vusb3v1>; | ||
72 | usb_mode = <1>; | ||
73 | }; | ||
47 | }; | 74 | }; |
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi index 123e2c40218a..9996cfc5ee80 100644 --- a/arch/arm/boot/dts/twl6030.dtsi +++ b/arch/arm/boot/dts/twl6030.dtsi | |||
@@ -86,4 +86,9 @@ | |||
86 | clk32kg: regulator-clk32kg { | 86 | clk32kg: regulator-clk32kg { |
87 | compatible = "ti,twl6030-clk32kg"; | 87 | compatible = "ti,twl6030-clk32kg"; |
88 | }; | 88 | }; |
89 | |||
90 | twl_usb_comparator: usb-comparator { | ||
91 | compatible = "ti,twl6030-usb"; | ||
92 | interrupts = <4>, <10>; | ||
93 | }; | ||
89 | }; | 94 | }; |
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts index 37ca192fb193..574bc044f572 100644 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ b/arch/arm/boot/dts/zynq-ep107.dts | |||
@@ -36,16 +36,27 @@ | |||
36 | ranges; | 36 | ranges; |
37 | 37 | ||
38 | intc: interrupt-controller@f8f01000 { | 38 | intc: interrupt-controller@f8f01000 { |
39 | compatible = "arm,cortex-a9-gic"; | ||
40 | #interrupt-cells = <3>; | ||
41 | #address-cells = <1>; | ||
39 | interrupt-controller; | 42 | interrupt-controller; |
40 | compatible = "arm,gic"; | 43 | reg = <0xF8F01000 0x1000>, |
41 | reg = <0xF8F01000 0x1000>; | 44 | <0xF8F00100 0x100>; |
42 | #interrupt-cells = <2>; | 45 | }; |
46 | |||
47 | L2: cache-controller { | ||
48 | compatible = "arm,pl310-cache"; | ||
49 | reg = <0xF8F02000 0x1000>; | ||
50 | arm,data-latency = <2 3 2>; | ||
51 | arm,tag-latency = <2 3 2>; | ||
52 | cache-unified; | ||
53 | cache-level = <2>; | ||
43 | }; | 54 | }; |
44 | 55 | ||
45 | uart0: uart@e0000000 { | 56 | uart0: uart@e0000000 { |
46 | compatible = "xlnx,xuartps"; | 57 | compatible = "xlnx,xuartps"; |
47 | reg = <0xE0000000 0x1000>; | 58 | reg = <0xE0000000 0x1000>; |
48 | interrupts = <59 0>; | 59 | interrupts = <0 27 4>; |
49 | clock = <50000000>; | 60 | clock = <50000000>; |
50 | }; | 61 | }; |
51 | }; | 62 | }; |
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index 78ed575feb1a..f71302c3ac33 100644 --- a/arch/arm/configs/imx_v4_v5_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig | |||
@@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y | |||
18 | # CONFIG_IOSCHED_DEADLINE is not set | 18 | # CONFIG_IOSCHED_DEADLINE is not set |
19 | # CONFIG_IOSCHED_CFQ is not set | 19 | # CONFIG_IOSCHED_CFQ is not set |
20 | CONFIG_ARCH_MXC=y | 20 | CONFIG_ARCH_MXC=y |
21 | CONFIG_ARCH_IMX_V4_V5=y | 21 | CONFIG_ARCH_MULTI_V4T=y |
22 | CONFIG_ARCH_MULTI_V5=y | ||
23 | # CONFIG_ARCH_MULTI_V7 is not set | ||
22 | CONFIG_ARCH_MX1ADS=y | 24 | CONFIG_ARCH_MX1ADS=y |
23 | CONFIG_MACH_SCB9328=y | 25 | CONFIG_MACH_SCB9328=y |
24 | CONFIG_MACH_APF9328=y | 26 | CONFIG_MACH_APF9328=y |
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 394ded624e37..44f117aab52c 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig | |||
@@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y | |||
17 | CONFIG_MODULE_SRCVERSION_ALL=y | 17 | CONFIG_MODULE_SRCVERSION_ALL=y |
18 | # CONFIG_BLK_DEV_BSG is not set | 18 | # CONFIG_BLK_DEV_BSG is not set |
19 | CONFIG_ARCH_MXC=y | 19 | CONFIG_ARCH_MXC=y |
20 | CONFIG_ARCH_MULTI_V6=y | ||
21 | CONFIG_ARCH_MULTI_V7=y | ||
20 | CONFIG_MACH_MX31LILLY=y | 22 | CONFIG_MACH_MX31LILLY=y |
21 | CONFIG_MACH_MX31LITE=y | 23 | CONFIG_MACH_MX31LITE=y |
22 | CONFIG_MACH_PCM037=y | 24 | CONFIG_MACH_PCM037=y |
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 23004847bb05..8ea02ac3ec1a 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h | |||
@@ -211,13 +211,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, | |||
211 | extern void __init init_dma_coherent_pool_size(unsigned long size); | 211 | extern void __init init_dma_coherent_pool_size(unsigned long size); |
212 | 212 | ||
213 | /* | 213 | /* |
214 | * This can be called during boot to increase the size of the consistent | ||
215 | * DMA region above it's default value of 2MB. It must be called before the | ||
216 | * memory allocator is initialised, i.e. before any core_initcall. | ||
217 | */ | ||
218 | static inline void init_consistent_dma_size(unsigned long size) { } | ||
219 | |||
220 | /* | ||
221 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" | 214 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" |
222 | * and utilize bounce buffers as needed to work around limited DMA windows. | 215 | * and utilize bounce buffers as needed to work around limited DMA windows. |
223 | * | 216 | * |
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/include/debug/imx.S index 761e45f9456f..0b65d792f664 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/include/debug/imx.S | |||
@@ -10,27 +10,38 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | #include <mach/hardware.h> | ||
14 | |||
15 | #ifdef CONFIG_DEBUG_IMX1_UART | 13 | #ifdef CONFIG_DEBUG_IMX1_UART |
16 | #define UART_PADDR MX1_UART1_BASE_ADDR | 14 | #define UART_PADDR 0x00206000 |
17 | #elif defined (CONFIG_DEBUG_IMX25_UART) | 15 | #elif defined (CONFIG_DEBUG_IMX25_UART) |
18 | #define UART_PADDR MX25_UART1_BASE_ADDR | 16 | #define UART_PADDR 0x43f90000 |
19 | #elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) | 17 | #elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) |
20 | #define UART_PADDR MX2x_UART1_BASE_ADDR | 18 | #define UART_PADDR 0x1000a000 |
21 | #elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) | 19 | #elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) |
22 | #define UART_PADDR MX3x_UART1_BASE_ADDR | 20 | #define UART_PADDR 0x43f90000 |
23 | #elif defined (CONFIG_DEBUG_IMX51_UART) | 21 | #elif defined (CONFIG_DEBUG_IMX51_UART) |
24 | #define UART_PADDR MX51_UART1_BASE_ADDR | 22 | #define UART_PADDR 0x73fbc000 |
25 | #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) | 23 | #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) |
26 | #define UART_PADDR MX53_UART1_BASE_ADDR | 24 | #define UART_PADDR 0x53fbc000 |
27 | #elif defined (CONFIG_DEBUG_IMX6Q_UART2) | 25 | #elif defined (CONFIG_DEBUG_IMX6Q_UART2) |
28 | #define UART_PADDR MX6Q_UART2_BASE_ADDR | 26 | #define UART_PADDR 0x021e8000 |
29 | #elif defined (CONFIG_DEBUG_IMX6Q_UART4) | 27 | #elif defined (CONFIG_DEBUG_IMX6Q_UART4) |
30 | #define UART_PADDR MX6Q_UART4_BASE_ADDR | 28 | #define UART_PADDR 0x021f0000 |
31 | #endif | 29 | #endif |
32 | 30 | ||
33 | #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) | 31 | /* |
32 | * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to | ||
33 | * stay sync with that. It's hard to maintain, and should be fixed | ||
34 | * globally for multi-platform build to use a fixed virtual address | ||
35 | * for low-level debug uart port across platforms. | ||
36 | */ | ||
37 | #define IMX_IO_P2V(x) ( \ | ||
38 | (((x) & 0x80000000) >> 7) | \ | ||
39 | (0xf4000000 + \ | ||
40 | (((x) & 0x50000000) >> 6) + \ | ||
41 | (((x) & 0x0b000000) >> 4) + \ | ||
42 | (((x) & 0x000fffff)))) | ||
43 | |||
44 | #define UART_VADDR IMX_IO_P2V(UART_PADDR) | ||
34 | 45 | ||
35 | .macro addruart, rp, rv, tmp | 46 | .macro addruart, rp, rv, tmp |
36 | ldr \rp, =UART_PADDR @ physical | 47 | ldr \rp, =UART_PADDR @ physical |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index c754b75ffc27..45d753d473f6 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -351,7 +351,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { | |||
351 | static void __init at91sam9g45_map_io(void) | 351 | static void __init at91sam9g45_map_io(void) |
352 | { | 352 | { |
353 | at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE); | 353 | at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE); |
354 | init_consistent_dma_size(SZ_4M); | ||
355 | } | 354 | } |
356 | 355 | ||
357 | static void __init at91sam9g45_ioremap_registers(void) | 356 | static void __init at91sam9g45_ioremap_registers(void) |
diff --git a/arch/arm/mach-at91/include/mach/atmel-mci.h b/arch/arm/mach-at91/include/mach/atmel-mci.h index cd580a12e904..3069e4135573 100644 --- a/arch/arm/mach-at91/include/mach/atmel-mci.h +++ b/arch/arm/mach-at91/include/mach/atmel-mci.h | |||
@@ -14,11 +14,4 @@ struct mci_dma_data { | |||
14 | #define slave_data_ptr(s) (&(s)->sdata) | 14 | #define slave_data_ptr(s) (&(s)->sdata) |
15 | #define find_slave_dev(s) ((s)->sdata.dma_dev) | 15 | #define find_slave_dev(s) ((s)->sdata.dma_dev) |
16 | 16 | ||
17 | #define setup_dma_addr(s, t, r) do { \ | ||
18 | if (s) { \ | ||
19 | (s)->sdata.tx_reg = (t); \ | ||
20 | (s)->sdata.rx_reg = (r); \ | ||
21 | } \ | ||
22 | } while (0) | ||
23 | |||
24 | #endif /* __MACH_ATMEL_MCI_H */ | 17 | #endif /* __MACH_ATMEL_MCI_H */ |
diff --git a/arch/arm/mach-bcm2835/Makefile.boot b/arch/arm/mach-bcm2835/Makefile.boot index 2d30e17f5b69..b3271754e9fd 100644 --- a/arch/arm/mach-bcm2835/Makefile.boot +++ b/arch/arm/mach-bcm2835/Makefile.boot | |||
@@ -1,3 +1 @@ | |||
1 | zreladdr-y := 0x00008000 | zreladdr-y := 0x00008000 | |
2 | params_phys-y := 0x00000100 | ||
3 | initrd_phys-y := 0x00800000 | ||
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c index f6fea4933571..53e3842c9330 100644 --- a/arch/arm/mach-bcm2835/bcm2835.c +++ b/arch/arm/mach-bcm2835/bcm2835.c | |||
@@ -30,12 +30,12 @@ static struct map_desc io_map __initdata = { | |||
30 | .type = MT_DEVICE | 30 | .type = MT_DEVICE |
31 | }; | 31 | }; |
32 | 32 | ||
33 | void __init bcm2835_map_io(void) | 33 | static void __init bcm2835_map_io(void) |
34 | { | 34 | { |
35 | iotable_init(&io_map, 1); | 35 | iotable_init(&io_map, 1); |
36 | } | 36 | } |
37 | 37 | ||
38 | void __init bcm2835_init(void) | 38 | static void __init bcm2835_init(void) |
39 | { | 39 | { |
40 | int ret; | 40 | int ret; |
41 | 41 | ||
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 1dbf85beed1b..9211e8800c79 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -194,7 +194,7 @@ static int evm_led_setup(struct i2c_client *client, int gpio, | |||
194 | while (ngpio--) { | 194 | while (ngpio--) { |
195 | leds->gpio = gpio++; | 195 | leds->gpio = gpio++; |
196 | leds++; | 196 | leds++; |
197 | }; | 197 | } |
198 | 198 | ||
199 | evm_led_dev = platform_device_alloc("leds-gpio", 0); | 199 | evm_led_dev = platform_device_alloc("leds-gpio", 0); |
200 | platform_device_add_data(evm_led_dev, &evm_led_data, | 200 | platform_device_add_data(evm_led_dev, &evm_led_data, |
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index 64b0f65a8639..a794f6d9d444 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c | |||
@@ -87,8 +87,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info) | |||
87 | iotable_init(davinci_soc_info.io_desc, | 87 | iotable_init(davinci_soc_info.io_desc, |
88 | davinci_soc_info.io_desc_num); | 88 | davinci_soc_info.io_desc_num); |
89 | 89 | ||
90 | init_consistent_dma_size(14 << 20); | ||
91 | |||
92 | /* | 90 | /* |
93 | * Normally devicemaps_init() would flush caches and tlb after | 91 | * Normally devicemaps_init() would flush caches and tlb after |
94 | * mdesc->map_io(), but we must also do it here because of the CPU | 92 | * mdesc->map_io(), but we must also do it here because of the CPU |
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index f77b95336e2b..34509ffba221 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c | |||
@@ -42,14 +42,8 @@ static struct musb_hdrc_config musb_config = { | |||
42 | }; | 42 | }; |
43 | 43 | ||
44 | static struct musb_hdrc_platform_data usb_data = { | 44 | static struct musb_hdrc_platform_data usb_data = { |
45 | #if defined(CONFIG_USB_MUSB_OTG) | ||
46 | /* OTG requires a Mini-AB connector */ | 45 | /* OTG requires a Mini-AB connector */ |
47 | .mode = MUSB_OTG, | 46 | .mode = MUSB_OTG, |
48 | #elif defined(CONFIG_USB_MUSB_PERIPHERAL) | ||
49 | .mode = MUSB_PERIPHERAL, | ||
50 | #elif defined(CONFIG_USB_MUSB_HOST) | ||
51 | .mode = MUSB_HOST, | ||
52 | #endif | ||
53 | .clock = "usb", | 47 | .clock = "usb", |
54 | .config = &musb_config, | 48 | .config = &musb_config, |
55 | }; | 49 | }; |
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index da55107033dd..69d10373a410 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -98,11 +98,6 @@ config EXYNOS_DEV_SYSMMU | |||
98 | help | 98 | help |
99 | Common setup code for SYSTEM MMU in EXYNOS platforms | 99 | Common setup code for SYSTEM MMU in EXYNOS platforms |
100 | 100 | ||
101 | config EXYNOS4_DEV_DWMCI | ||
102 | bool | ||
103 | help | ||
104 | Compile in platform device definitions for DWMCI | ||
105 | |||
106 | config EXYNOS4_DEV_USB_OHCI | 101 | config EXYNOS4_DEV_USB_OHCI |
107 | bool | 102 | bool |
108 | help | 103 | help |
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 9b58024f7d43..0c74bdc6b698 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -50,7 +50,6 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o | |||
50 | obj-y += dev-uart.o | 50 | obj-y += dev-uart.o |
51 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o | 51 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o |
52 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o | 52 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o |
53 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | ||
54 | obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o | 53 | obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o |
55 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o | 54 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o |
56 | obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o | 55 | obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o |
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index 6a45c9a9abe9..fa8a13405c94 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c | |||
@@ -613,11 +613,6 @@ static struct clk exynos4_init_clocks_off[] = { | |||
613 | .ctrlbit = (1 << 18), | 613 | .ctrlbit = (1 << 18), |
614 | }, { | 614 | }, { |
615 | .name = "iis", | 615 | .name = "iis", |
616 | .devname = "samsung-i2s.0", | ||
617 | .enable = exynos4_clk_ip_peril_ctrl, | ||
618 | .ctrlbit = (1 << 19), | ||
619 | }, { | ||
620 | .name = "iis", | ||
621 | .devname = "samsung-i2s.1", | 616 | .devname = "samsung-i2s.1", |
622 | .enable = exynos4_clk_ip_peril_ctrl, | 617 | .enable = exynos4_clk_ip_peril_ctrl, |
623 | .ctrlbit = (1 << 20), | 618 | .ctrlbit = (1 << 20), |
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index c44ca1ee1b8d..4478757b9301 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c | |||
@@ -292,7 +292,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = { | |||
292 | .nr_sources = ARRAY_SIZE(exynos5_clk_src_mpll_list), | 292 | .nr_sources = ARRAY_SIZE(exynos5_clk_src_mpll_list), |
293 | }; | 293 | }; |
294 | 294 | ||
295 | struct clksrc_clk exynos5_clk_mout_mpll = { | 295 | static struct clksrc_clk exynos5_clk_mout_mpll = { |
296 | .clk = { | 296 | .clk = { |
297 | .name = "mout_mpll", | 297 | .name = "mout_mpll", |
298 | }, | 298 | }, |
@@ -467,12 +467,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = { | |||
467 | 467 | ||
468 | /* Core list of CMU_TOP side */ | 468 | /* Core list of CMU_TOP side */ |
469 | 469 | ||
470 | struct clk *exynos5_clkset_aclk_top_list[] = { | 470 | static struct clk *exynos5_clkset_aclk_top_list[] = { |
471 | [0] = &exynos5_clk_mout_mpll_user.clk, | 471 | [0] = &exynos5_clk_mout_mpll_user.clk, |
472 | [1] = &exynos5_clk_mout_bpll_user.clk, | 472 | [1] = &exynos5_clk_mout_bpll_user.clk, |
473 | }; | 473 | }; |
474 | 474 | ||
475 | struct clksrc_sources exynos5_clkset_aclk = { | 475 | static struct clksrc_sources exynos5_clkset_aclk = { |
476 | .sources = exynos5_clkset_aclk_top_list, | 476 | .sources = exynos5_clkset_aclk_top_list, |
477 | .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_top_list), | 477 | .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_top_list), |
478 | }; | 478 | }; |
@@ -486,12 +486,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = { | |||
486 | .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 }, | 486 | .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 }, |
487 | }; | 487 | }; |
488 | 488 | ||
489 | struct clk *exynos5_clkset_aclk_333_166_list[] = { | 489 | static struct clk *exynos5_clkset_aclk_333_166_list[] = { |
490 | [0] = &exynos5_clk_mout_cpll.clk, | 490 | [0] = &exynos5_clk_mout_cpll.clk, |
491 | [1] = &exynos5_clk_mout_mpll_user.clk, | 491 | [1] = &exynos5_clk_mout_mpll_user.clk, |
492 | }; | 492 | }; |
493 | 493 | ||
494 | struct clksrc_sources exynos5_clkset_aclk_333_166 = { | 494 | static struct clksrc_sources exynos5_clkset_aclk_333_166 = { |
495 | .sources = exynos5_clkset_aclk_333_166_list, | 495 | .sources = exynos5_clkset_aclk_333_166_list, |
496 | .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list), | 496 | .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list), |
497 | }; | 497 | }; |
@@ -966,7 +966,7 @@ static struct clk exynos5_clk_fimd1 = { | |||
966 | .ctrlbit = (1 << 0), | 966 | .ctrlbit = (1 << 0), |
967 | }; | 967 | }; |
968 | 968 | ||
969 | struct clk *exynos5_clkset_group_list[] = { | 969 | static struct clk *exynos5_clkset_group_list[] = { |
970 | [0] = &clk_ext_xtal_mux, | 970 | [0] = &clk_ext_xtal_mux, |
971 | [1] = NULL, | 971 | [1] = NULL, |
972 | [2] = &exynos5_clk_sclk_hdmi24m, | 972 | [2] = &exynos5_clk_sclk_hdmi24m, |
@@ -979,7 +979,7 @@ struct clk *exynos5_clkset_group_list[] = { | |||
979 | [9] = &exynos5_clk_mout_cpll.clk, | 979 | [9] = &exynos5_clk_mout_cpll.clk, |
980 | }; | 980 | }; |
981 | 981 | ||
982 | struct clksrc_sources exynos5_clkset_group = { | 982 | static struct clksrc_sources exynos5_clkset_group = { |
983 | .sources = exynos5_clkset_group_list, | 983 | .sources = exynos5_clkset_group_list, |
984 | .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list), | 984 | .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list), |
985 | }; | 985 | }; |
@@ -1195,7 +1195,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = { | |||
1195 | .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 }, | 1195 | .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 }, |
1196 | }; | 1196 | }; |
1197 | 1197 | ||
1198 | struct clksrc_clk exynos5_clk_sclk_fimd1 = { | 1198 | static struct clksrc_clk exynos5_clk_sclk_fimd1 = { |
1199 | .clk = { | 1199 | .clk = { |
1200 | .name = "sclk_fimd", | 1200 | .name = "sclk_fimd", |
1201 | .devname = "exynos5-fb.1", | 1201 | .devname = "exynos5-fb.1", |
@@ -1476,7 +1476,7 @@ static void exynos5_clock_resume(void) | |||
1476 | #define exynos5_clock_resume NULL | 1476 | #define exynos5_clock_resume NULL |
1477 | #endif | 1477 | #endif |
1478 | 1478 | ||
1479 | struct syscore_ops exynos5_clock_syscore_ops = { | 1479 | static struct syscore_ops exynos5_clock_syscore_ops = { |
1480 | .suspend = exynos5_clock_suspend, | 1480 | .suspend = exynos5_clock_suspend, |
1481 | .resume = exynos5_clock_resume, | 1481 | .resume = exynos5_clock_resume, |
1482 | }; | 1482 | }; |
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 1947be8e5f5b..0dbee7fef9bd 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -63,7 +63,7 @@ static void exynos4_map_io(void); | |||
63 | static void exynos5_map_io(void); | 63 | static void exynos5_map_io(void); |
64 | static void exynos4_init_clocks(int xtal); | 64 | static void exynos4_init_clocks(int xtal); |
65 | static void exynos5_init_clocks(int xtal); | 65 | static void exynos5_init_clocks(int xtal); |
66 | static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); | 66 | static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
67 | static int exynos_init(void); | 67 | static int exynos_init(void); |
68 | 68 | ||
69 | static struct cpu_table cpu_ids[] __initdata = { | 69 | static struct cpu_table cpu_ids[] __initdata = { |
@@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
72 | .idmask = EXYNOS4_CPU_MASK, | 72 | .idmask = EXYNOS4_CPU_MASK, |
73 | .map_io = exynos4_map_io, | 73 | .map_io = exynos4_map_io, |
74 | .init_clocks = exynos4_init_clocks, | 74 | .init_clocks = exynos4_init_clocks, |
75 | .init_uarts = exynos_init_uarts, | 75 | .init_uarts = exynos4_init_uarts, |
76 | .init = exynos_init, | 76 | .init = exynos_init, |
77 | .name = name_exynos4210, | 77 | .name = name_exynos4210, |
78 | }, { | 78 | }, { |
@@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
80 | .idmask = EXYNOS4_CPU_MASK, | 80 | .idmask = EXYNOS4_CPU_MASK, |
81 | .map_io = exynos4_map_io, | 81 | .map_io = exynos4_map_io, |
82 | .init_clocks = exynos4_init_clocks, | 82 | .init_clocks = exynos4_init_clocks, |
83 | .init_uarts = exynos_init_uarts, | 83 | .init_uarts = exynos4_init_uarts, |
84 | .init = exynos_init, | 84 | .init = exynos_init, |
85 | .name = name_exynos4212, | 85 | .name = name_exynos4212, |
86 | }, { | 86 | }, { |
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
88 | .idmask = EXYNOS4_CPU_MASK, | 88 | .idmask = EXYNOS4_CPU_MASK, |
89 | .map_io = exynos4_map_io, | 89 | .map_io = exynos4_map_io, |
90 | .init_clocks = exynos4_init_clocks, | 90 | .init_clocks = exynos4_init_clocks, |
91 | .init_uarts = exynos_init_uarts, | 91 | .init_uarts = exynos4_init_uarts, |
92 | .init = exynos_init, | 92 | .init = exynos_init, |
93 | .name = name_exynos4412, | 93 | .name = name_exynos4412, |
94 | }, { | 94 | }, { |
@@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
96 | .idmask = EXYNOS5_SOC_MASK, | 96 | .idmask = EXYNOS5_SOC_MASK, |
97 | .map_io = exynos5_map_io, | 97 | .map_io = exynos5_map_io, |
98 | .init_clocks = exynos5_init_clocks, | 98 | .init_clocks = exynos5_init_clocks, |
99 | .init_uarts = exynos_init_uarts, | ||
100 | .init = exynos_init, | 99 | .init = exynos_init, |
101 | .name = name_exynos5250, | 100 | .name = name_exynos5250, |
102 | }, | 101 | }, |
@@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = { | |||
257 | .length = SZ_64K, | 256 | .length = SZ_64K, |
258 | .type = MT_DEVICE, | 257 | .type = MT_DEVICE, |
259 | }, { | 258 | }, { |
260 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | ||
261 | .pfn = __phys_to_pfn(EXYNOS5_PA_COMBINER), | ||
262 | .length = SZ_4K, | ||
263 | .type = MT_DEVICE, | ||
264 | }, { | ||
265 | .virtual = (unsigned long)S3C_VA_UART, | 259 | .virtual = (unsigned long)S3C_VA_UART, |
266 | .pfn = __phys_to_pfn(EXYNOS5_PA_UART), | 260 | .pfn = __phys_to_pfn(EXYNOS5_PA_UART), |
267 | .length = SZ_512K, | 261 | .length = SZ_512K, |
268 | .type = MT_DEVICE, | 262 | .type = MT_DEVICE, |
269 | }, { | ||
270 | .virtual = (unsigned long)S5P_VA_GIC_CPU, | ||
271 | .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_CPU), | ||
272 | .length = SZ_8K, | ||
273 | .type = MT_DEVICE, | ||
274 | }, { | ||
275 | .virtual = (unsigned long)S5P_VA_GIC_DIST, | ||
276 | .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_DIST), | ||
277 | .length = SZ_4K, | ||
278 | .type = MT_DEVICE, | ||
279 | }, | 263 | }, |
280 | }; | 264 | }; |
281 | 265 | ||
@@ -354,23 +338,6 @@ static void __init exynos4_map_io(void) | |||
354 | static void __init exynos5_map_io(void) | 338 | static void __init exynos5_map_io(void) |
355 | { | 339 | { |
356 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); | 340 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); |
357 | |||
358 | s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0); | ||
359 | s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1; | ||
360 | s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; | ||
361 | s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; | ||
362 | |||
363 | s3c_sdhci_setname(0, "exynos4-sdhci"); | ||
364 | s3c_sdhci_setname(1, "exynos4-sdhci"); | ||
365 | s3c_sdhci_setname(2, "exynos4-sdhci"); | ||
366 | s3c_sdhci_setname(3, "exynos4-sdhci"); | ||
367 | |||
368 | /* The I2C bus controllers are directly compatible with s3c2440 */ | ||
369 | s3c_i2c0_setname("s3c2440-i2c"); | ||
370 | s3c_i2c1_setname("s3c2440-i2c"); | ||
371 | s3c_i2c2_setname("s3c2440-i2c"); | ||
372 | |||
373 | s3c64xx_spi_setname("exynos4210-spi"); | ||
374 | } | 341 | } |
375 | 342 | ||
376 | static void __init exynos4_init_clocks(int xtal) | 343 | static void __init exynos4_init_clocks(int xtal) |
@@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base, | |||
589 | } | 556 | } |
590 | 557 | ||
591 | #ifdef CONFIG_OF | 558 | #ifdef CONFIG_OF |
592 | int __init combiner_of_init(struct device_node *np, struct device_node *parent) | 559 | static int __init combiner_of_init(struct device_node *np, |
560 | struct device_node *parent) | ||
593 | { | 561 | { |
594 | void __iomem *combiner_base; | 562 | void __iomem *combiner_base; |
595 | 563 | ||
@@ -727,7 +695,7 @@ static int __init exynos_init(void) | |||
727 | 695 | ||
728 | /* uart registration process */ | 696 | /* uart registration process */ |
729 | 697 | ||
730 | static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) | 698 | static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
731 | { | 699 | { |
732 | struct s3c2410_uartcfg *tcfg = cfg; | 700 | struct s3c2410_uartcfg *tcfg = cfg; |
733 | u32 ucnt; | 701 | u32 ucnt; |
@@ -735,10 +703,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
735 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) | 703 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) |
736 | tcfg->has_fracval = 1; | 704 | tcfg->has_fracval = 1; |
737 | 705 | ||
738 | if (soc_is_exynos5250()) | 706 | s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); |
739 | s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no); | ||
740 | else | ||
741 | s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); | ||
742 | } | 707 | } |
743 | 708 | ||
744 | static void __iomem *exynos_eint_base; | 709 | static void __iomem *exynos_eint_base; |
@@ -970,14 +935,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) | |||
970 | struct irq_chip *chip = irq_get_chip(irq); | 935 | struct irq_chip *chip = irq_get_chip(irq); |
971 | 936 | ||
972 | chained_irq_enter(chip, desc); | 937 | chained_irq_enter(chip, desc); |
973 | chip->irq_mask(&desc->irq_data); | ||
974 | |||
975 | if (chip->irq_ack) | ||
976 | chip->irq_ack(&desc->irq_data); | ||
977 | |||
978 | generic_handle_irq(*irq_data); | 938 | generic_handle_irq(*irq_data); |
979 | |||
980 | chip->irq_unmask(&desc->irq_data); | ||
981 | chained_irq_exit(chip, desc); | 939 | chained_irq_exit(chip, desc); |
982 | } | 940 | } |
983 | 941 | ||
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c index ae321c7cb15f..a1cb42c39590 100644 --- a/arch/arm/mach-exynos/dev-audio.c +++ b/arch/arm/mach-exynos/dev-audio.c | |||
@@ -14,9 +14,9 @@ | |||
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
16 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/platform_data/asoc-s3c.h> | ||
17 | 18 | ||
18 | #include <plat/gpio-cfg.h> | 19 | #include <plat/gpio-cfg.h> |
19 | #include <linux/platform_data/asoc-s3c.h> | ||
20 | 20 | ||
21 | #include <mach/map.h> | 21 | #include <mach/map.h> |
22 | #include <mach/dma.h> | 22 | #include <mach/dma.h> |
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c deleted file mode 100644 index 79035018fb74..000000000000 --- a/arch/arm/mach-exynos/dev-dwmci.c +++ /dev/null | |||
@@ -1,75 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos4/dev-dwmci.c | ||
3 | * | ||
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Platform device for Synopsys DesignWare Mobile Storage IP | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/dma-mapping.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/ioport.h> | ||
20 | #include <linux/mmc/dw_mmc.h> | ||
21 | |||
22 | #include <plat/devs.h> | ||
23 | |||
24 | #include <mach/map.h> | ||
25 | |||
26 | static int exynos4_dwmci_get_bus_wd(u32 slot_id) | ||
27 | { | ||
28 | return 4; | ||
29 | } | ||
30 | |||
31 | static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data) | ||
32 | { | ||
33 | return 0; | ||
34 | } | ||
35 | |||
36 | static struct resource exynos4_dwmci_resource[] = { | ||
37 | [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K), | ||
38 | [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI), | ||
39 | }; | ||
40 | |||
41 | static struct dw_mci_board exynos4_dwci_pdata = { | ||
42 | .num_slots = 1, | ||
43 | .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION, | ||
44 | .bus_hz = 80 * 1000 * 1000, | ||
45 | .detect_delay_ms = 200, | ||
46 | .init = exynos4_dwmci_init, | ||
47 | .get_bus_wd = exynos4_dwmci_get_bus_wd, | ||
48 | }; | ||
49 | |||
50 | static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32); | ||
51 | |||
52 | struct platform_device exynos4_device_dwmci = { | ||
53 | .name = "dw_mmc", | ||
54 | .id = -1, | ||
55 | .num_resources = ARRAY_SIZE(exynos4_dwmci_resource), | ||
56 | .resource = exynos4_dwmci_resource, | ||
57 | .dev = { | ||
58 | .dma_mask = &exynos4_dwmci_dmamask, | ||
59 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
60 | .platform_data = &exynos4_dwci_pdata, | ||
61 | }, | ||
62 | }; | ||
63 | |||
64 | void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd) | ||
65 | { | ||
66 | struct dw_mci_board *npd; | ||
67 | |||
68 | npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board), | ||
69 | &exynos4_device_dwmci); | ||
70 | |||
71 | if (!npd->init) | ||
72 | npd->init = exynos4_dwmci_init; | ||
73 | if (!npd->get_bus_wd) | ||
74 | npd->get_bus_wd = exynos4_dwmci_get_bus_wd; | ||
75 | } | ||
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c index 14ed7951a2c6..4244d02dafbd 100644 --- a/arch/arm/mach-exynos/dev-ohci.c +++ b/arch/arm/mach-exynos/dev-ohci.c | |||
@@ -12,10 +12,10 @@ | |||
12 | 12 | ||
13 | #include <linux/dma-mapping.h> | 13 | #include <linux/dma-mapping.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/platform_data/usb-exynos.h> | ||
15 | 16 | ||
16 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
17 | #include <mach/map.h> | 18 | #include <mach/map.h> |
18 | #include <linux/platform_data/usb-exynos.h> | ||
19 | 19 | ||
20 | #include <plat/devs.h> | 20 | #include <plat/devs.h> |
21 | #include <plat/usb-phy.h> | 21 | #include <plat/usb-phy.h> |
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c index 2e85c022fd16..7c42f4b7c8be 100644 --- a/arch/arm/mach-exynos/dev-uart.c +++ b/arch/arm/mach-exynos/dev-uart.c | |||
@@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = { | |||
52 | .nr_resources = ARRAY_SIZE(exynos4_uart3_resource), | 52 | .nr_resources = ARRAY_SIZE(exynos4_uart3_resource), |
53 | }, | 53 | }, |
54 | }; | 54 | }; |
55 | |||
56 | EXYNOS_UART_RESOURCE(5, 0) | ||
57 | EXYNOS_UART_RESOURCE(5, 1) | ||
58 | EXYNOS_UART_RESOURCE(5, 2) | ||
59 | EXYNOS_UART_RESOURCE(5, 3) | ||
60 | |||
61 | struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = { | ||
62 | [0] = { | ||
63 | .resources = exynos5_uart0_resource, | ||
64 | .nr_resources = ARRAY_SIZE(exynos5_uart0_resource), | ||
65 | }, | ||
66 | [1] = { | ||
67 | .resources = exynos5_uart1_resource, | ||
68 | .nr_resources = ARRAY_SIZE(exynos5_uart0_resource), | ||
69 | }, | ||
70 | [2] = { | ||
71 | .resources = exynos5_uart2_resource, | ||
72 | .nr_resources = ARRAY_SIZE(exynos5_uart2_resource), | ||
73 | }, | ||
74 | [3] = { | ||
75 | .resources = exynos5_uart3_resource, | ||
76 | .nr_resources = ARRAY_SIZE(exynos5_uart3_resource), | ||
77 | }, | ||
78 | }; | ||
diff --git a/arch/arm/mach-exynos/include/mach/dwmci.h b/arch/arm/mach-exynos/include/mach/dwmci.h deleted file mode 100644 index 7ce657459cc0..000000000000 --- a/arch/arm/mach-exynos/include/mach/dwmci.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/dwmci.h | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Synopsys DesignWare Mobile Storage for EXYNOS4210 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARM_ARCH_DWMCI_H | ||
14 | #define __ASM_ARM_ARCH_DWMCI_H __FILE__ | ||
15 | |||
16 | #include <linux/mmc/dw_mmc.h> | ||
17 | |||
18 | extern void exynos4_dwmci_set_platdata(struct dw_mci_board *pd); | ||
19 | |||
20 | #endif /* __ASM_ARM_ARCH_DWMCI_H */ | ||
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 35bced6f9092..6da31152de3a 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -259,11 +259,6 @@ | |||
259 | #define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48) | 259 | #define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48) |
260 | #define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49) | 260 | #define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49) |
261 | #define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50) | 261 | #define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50) |
262 | #define EXYNOS5_IRQ_UART0 IRQ_SPI(51) | ||
263 | #define EXYNOS5_IRQ_UART1 IRQ_SPI(52) | ||
264 | #define EXYNOS5_IRQ_UART2 IRQ_SPI(53) | ||
265 | #define EXYNOS5_IRQ_UART3 IRQ_SPI(54) | ||
266 | #define EXYNOS5_IRQ_UART4 IRQ_SPI(55) | ||
267 | #define EXYNOS5_IRQ_IIC IRQ_SPI(56) | 262 | #define EXYNOS5_IRQ_IIC IRQ_SPI(56) |
268 | #define EXYNOS5_IRQ_IIC1 IRQ_SPI(57) | 263 | #define EXYNOS5_IRQ_IIC1 IRQ_SPI(57) |
269 | #define EXYNOS5_IRQ_IIC2 IRQ_SPI(58) | 264 | #define EXYNOS5_IRQ_IIC2 IRQ_SPI(58) |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index ed4da4544cd2..872840b2ff45 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -280,7 +280,6 @@ | |||
280 | #define EXYNOS5_PA_UART1 0x12C10000 | 280 | #define EXYNOS5_PA_UART1 0x12C10000 |
281 | #define EXYNOS5_PA_UART2 0x12C20000 | 281 | #define EXYNOS5_PA_UART2 0x12C20000 |
282 | #define EXYNOS5_PA_UART3 0x12C30000 | 282 | #define EXYNOS5_PA_UART3 0x12C30000 |
283 | #define EXYNOS5_SZ_UART SZ_256 | ||
284 | 283 | ||
285 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | 284 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) |
286 | 285 | ||
diff --git a/arch/arm/mach-exynos/include/mach/regs-mem.h b/arch/arm/mach-exynos/include/mach/regs-mem.h deleted file mode 100644 index 0368b5a27252..000000000000 --- a/arch/arm/mach-exynos/include/mach/regs-mem.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/regs-mem.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - SROMC and DMC register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_MEM_H | ||
14 | #define __ASM_ARCH_REGS_MEM_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_DMC0_MEMCON_OFFSET 0x04 | ||
19 | |||
20 | #define S5P_DMC0_MEMTYPE_SHIFT 8 | ||
21 | #define S5P_DMC0_MEMTYPE_MASK 0xF | ||
22 | |||
23 | #endif /* __ASM_ARCH_REGS_MEM_H */ | ||
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index d4e392b811a3..70b2795f5283 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h | |||
@@ -230,8 +230,6 @@ | |||
230 | 230 | ||
231 | /* For EXYNOS5 */ | 231 | /* For EXYNOS5 */ |
232 | 232 | ||
233 | #define EXYNOS5_USB_CFG S5P_PMUREG(0x0230) | ||
234 | |||
235 | #define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) | 233 | #define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) |
236 | #define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C) | 234 | #define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C) |
237 | 235 | ||
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index c05d7aa84031..69359a0c8a1c 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -25,7 +25,10 @@ | |||
25 | #include <linux/mmc/host.h> | 25 | #include <linux/mmc/host.h> |
26 | #include <linux/fb.h> | 26 | #include <linux/fb.h> |
27 | #include <linux/pwm_backlight.h> | 27 | #include <linux/pwm_backlight.h> |
28 | #include <linux/platform_data/i2c-s3c2410.h> | ||
29 | #include <linux/platform_data/mipi-csis.h> | ||
28 | #include <linux/platform_data/s3c-hsotg.h> | 30 | #include <linux/platform_data/s3c-hsotg.h> |
31 | #include <linux/platform_data/usb-ehci-s5p.h> | ||
29 | #include <drm/exynos_drm.h> | 32 | #include <drm/exynos_drm.h> |
30 | 33 | ||
31 | #include <video/platform_lcd.h> | 34 | #include <video/platform_lcd.h> |
@@ -45,14 +48,11 @@ | |||
45 | #include <plat/devs.h> | 48 | #include <plat/devs.h> |
46 | #include <plat/fb.h> | 49 | #include <plat/fb.h> |
47 | #include <plat/sdhci.h> | 50 | #include <plat/sdhci.h> |
48 | #include <linux/platform_data/usb-ehci-s5p.h> | ||
49 | #include <plat/clock.h> | 51 | #include <plat/clock.h> |
50 | #include <plat/gpio-cfg.h> | 52 | #include <plat/gpio-cfg.h> |
51 | #include <linux/platform_data/i2c-s3c2410.h> | ||
52 | #include <plat/mfc.h> | 53 | #include <plat/mfc.h> |
53 | #include <plat/fimc-core.h> | 54 | #include <plat/fimc-core.h> |
54 | #include <plat/camport.h> | 55 | #include <plat/camport.h> |
55 | #include <linux/platform_data/mipi-csis.h> | ||
56 | 56 | ||
57 | #include <mach/map.h> | 57 | #include <mach/map.h> |
58 | 58 | ||
@@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = { | |||
113 | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | | 113 | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | |
114 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | 114 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | |
115 | MMC_CAP_ERASE), | 115 | MMC_CAP_ERASE), |
116 | .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE, | ||
117 | .cd_type = S3C_SDHCI_CD_PERMANENT, | 116 | .cd_type = S3C_SDHCI_CD_PERMANENT, |
118 | }; | 117 | }; |
119 | 118 | ||
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 9adf491674ea..485ce6c477f9 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -23,7 +23,10 @@ | |||
23 | #include <linux/mfd/max8997.h> | 23 | #include <linux/mfd/max8997.h> |
24 | #include <linux/lcd.h> | 24 | #include <linux/lcd.h> |
25 | #include <linux/rfkill-gpio.h> | 25 | #include <linux/rfkill-gpio.h> |
26 | #include <linux/platform_data/i2c-s3c2410.h> | ||
26 | #include <linux/platform_data/s3c-hsotg.h> | 27 | #include <linux/platform_data/s3c-hsotg.h> |
28 | #include <linux/platform_data/usb-ehci-s5p.h> | ||
29 | #include <linux/platform_data/usb-exynos.h> | ||
27 | 30 | ||
28 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
29 | #include <asm/hardware/gic.h> | 32 | #include <asm/hardware/gic.h> |
@@ -36,8 +39,6 @@ | |||
36 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
37 | #include <plat/devs.h> | 40 | #include <plat/devs.h> |
38 | #include <plat/sdhci.h> | 41 | #include <plat/sdhci.h> |
39 | #include <linux/platform_data/i2c-s3c2410.h> | ||
40 | #include <linux/platform_data/usb-ehci-s5p.h> | ||
41 | #include <plat/clock.h> | 42 | #include <plat/clock.h> |
42 | #include <plat/gpio-cfg.h> | 43 | #include <plat/gpio-cfg.h> |
43 | #include <plat/backlight.h> | 44 | #include <plat/backlight.h> |
@@ -45,7 +46,6 @@ | |||
45 | #include <plat/mfc.h> | 46 | #include <plat/mfc.h> |
46 | #include <plat/hdmi.h> | 47 | #include <plat/hdmi.h> |
47 | 48 | ||
48 | #include <linux/platform_data/usb-exynos.h> | ||
49 | #include <mach/map.h> | 49 | #include <mach/map.h> |
50 | 50 | ||
51 | #include <drm/exynos_drm.h> | 51 | #include <drm/exynos_drm.h> |
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index 730f1ac65928..ddb92631252d 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/pwm_backlight.h> | 21 | #include <linux/pwm_backlight.h> |
22 | #include <linux/regulator/machine.h> | 22 | #include <linux/regulator/machine.h> |
23 | #include <linux/serial_core.h> | 23 | #include <linux/serial_core.h> |
24 | #include <linux/platform_data/i2c-s3c2410.h> | ||
24 | #include <linux/platform_data/s3c-hsotg.h> | 25 | #include <linux/platform_data/s3c-hsotg.h> |
25 | 26 | ||
26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
@@ -34,7 +35,6 @@ | |||
34 | #include <plat/devs.h> | 35 | #include <plat/devs.h> |
35 | #include <plat/fb.h> | 36 | #include <plat/fb.h> |
36 | #include <plat/gpio-cfg.h> | 37 | #include <plat/gpio-cfg.h> |
37 | #include <linux/platform_data/i2c-s3c2410.h> | ||
38 | #include <plat/keypad.h> | 38 | #include <plat/keypad.h> |
39 | #include <plat/mfc.h> | 39 | #include <plat/mfc.h> |
40 | #include <plat/regs-serial.h> | 40 | #include <plat/regs-serial.h> |
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index ee4fb1a9cb72..8dd6a1e8030d 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -20,7 +20,10 @@ | |||
20 | #include <linux/input.h> | 20 | #include <linux/input.h> |
21 | #include <linux/pwm.h> | 21 | #include <linux/pwm.h> |
22 | #include <linux/pwm_backlight.h> | 22 | #include <linux/pwm_backlight.h> |
23 | #include <linux/platform_data/i2c-s3c2410.h> | ||
23 | #include <linux/platform_data/s3c-hsotg.h> | 24 | #include <linux/platform_data/s3c-hsotg.h> |
25 | #include <linux/platform_data/usb-ehci-s5p.h> | ||
26 | #include <linux/platform_data/usb-exynos.h> | ||
24 | 27 | ||
25 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
26 | #include <asm/hardware/gic.h> | 29 | #include <asm/hardware/gic.h> |
@@ -35,16 +38,13 @@ | |||
35 | #include <plat/fb.h> | 38 | #include <plat/fb.h> |
36 | #include <plat/keypad.h> | 39 | #include <plat/keypad.h> |
37 | #include <plat/sdhci.h> | 40 | #include <plat/sdhci.h> |
38 | #include <linux/platform_data/i2c-s3c2410.h> | ||
39 | #include <plat/gpio-cfg.h> | 41 | #include <plat/gpio-cfg.h> |
40 | #include <plat/backlight.h> | 42 | #include <plat/backlight.h> |
41 | #include <plat/mfc.h> | 43 | #include <plat/mfc.h> |
42 | #include <linux/platform_data/usb-ehci-s5p.h> | ||
43 | #include <plat/clock.h> | 44 | #include <plat/clock.h> |
44 | #include <plat/hdmi.h> | 45 | #include <plat/hdmi.h> |
45 | 46 | ||
46 | #include <mach/map.h> | 47 | #include <mach/map.h> |
47 | #include <linux/platform_data/usb-exynos.h> | ||
48 | 48 | ||
49 | #include <drm/exynos_drm.h> | 49 | #include <drm/exynos_drm.h> |
50 | #include "common.h" | 50 | #include "common.h" |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index ebc9dd339a38..2d6bc83d5c99 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <linux/i2c-gpio.h> | 23 | #include <linux/i2c-gpio.h> |
24 | #include <linux/i2c/mcs.h> | 24 | #include <linux/i2c/mcs.h> |
25 | #include <linux/i2c/atmel_mxt_ts.h> | 25 | #include <linux/i2c/atmel_mxt_ts.h> |
26 | #include <linux/platform_data/i2c-s3c2410.h> | ||
27 | #include <linux/platform_data/mipi-csis.h> | ||
26 | #include <linux/platform_data/s3c-hsotg.h> | 28 | #include <linux/platform_data/s3c-hsotg.h> |
27 | #include <drm/exynos_drm.h> | 29 | #include <drm/exynos_drm.h> |
28 | 30 | ||
@@ -35,7 +37,6 @@ | |||
35 | #include <plat/clock.h> | 37 | #include <plat/clock.h> |
36 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
37 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
38 | #include <linux/platform_data/i2c-s3c2410.h> | ||
39 | #include <plat/gpio-cfg.h> | 40 | #include <plat/gpio-cfg.h> |
40 | #include <plat/fb.h> | 41 | #include <plat/fb.h> |
41 | #include <plat/mfc.h> | 42 | #include <plat/mfc.h> |
@@ -43,7 +44,6 @@ | |||
43 | #include <plat/fimc-core.h> | 44 | #include <plat/fimc-core.h> |
44 | #include <plat/s5p-time.h> | 45 | #include <plat/s5p-time.h> |
45 | #include <plat/camport.h> | 46 | #include <plat/camport.h> |
46 | #include <linux/platform_data/mipi-csis.h> | ||
47 | 47 | ||
48 | #include <mach/map.h> | 48 | #include <mach/map.h> |
49 | 49 | ||
@@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { | |||
754 | .max_width = 8, | 754 | .max_width = 8, |
755 | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | | 755 | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | |
756 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | 756 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), |
757 | .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE, | ||
758 | .cd_type = S3C_SDHCI_CD_PERMANENT, | 757 | .cd_type = S3C_SDHCI_CD_PERMANENT, |
759 | }; | 758 | }; |
760 | 759 | ||
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c index 5c10ad05df74..134377352966 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/mach-imx/3ds_debugboard.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <linux/regulator/machine.h> | 21 | #include <linux/regulator/machine.h> |
22 | #include <linux/regulator/fixed.h> | 22 | #include <linux/regulator/fixed.h> |
23 | 23 | ||
24 | #include <mach/hardware.h> | 24 | #include "hardware.h" |
25 | 25 | ||
26 | /* LAN9217 ethernet base address */ | 26 | /* LAN9217 ethernet base address */ |
27 | #define LAN9217_BASE_ADDR(n) (n + 0x0) | 27 | #define LAN9217_BASE_ADDR(n) (n + 0x0) |
diff --git a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h b/arch/arm/mach-imx/3ds_debugboard.h index 9fd6cb3f8fad..9fd6cb3f8fad 100644 --- a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h +++ b/arch/arm/mach-imx/3ds_debugboard.h | |||
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8d276584650e..f1bf610e2900 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -1,3 +1,70 @@ | |||
1 | config ARCH_MXC | ||
2 | bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 | ||
3 | select ARCH_REQUIRE_GPIOLIB | ||
4 | select ARM_PATCH_PHYS_VIRT | ||
5 | select AUTO_ZRELADDR if !ZBOOT_ROM | ||
6 | select CLKDEV_LOOKUP | ||
7 | select CLKSRC_MMIO | ||
8 | select GENERIC_CLOCKEVENTS | ||
9 | select GENERIC_IRQ_CHIP | ||
10 | select MULTI_IRQ_HANDLER | ||
11 | select SPARSE_IRQ | ||
12 | select USE_OF | ||
13 | help | ||
14 | Support for Freescale MXC/iMX-based family of processors | ||
15 | |||
16 | menu "Freescale i.MX support" | ||
17 | depends on ARCH_MXC | ||
18 | |||
19 | config MXC_IRQ_PRIOR | ||
20 | bool "Use IRQ priority" | ||
21 | help | ||
22 | Select this if you want to use prioritized IRQ handling. | ||
23 | This feature prevents higher priority ISR to be interrupted | ||
24 | by lower priority IRQ even IRQF_DISABLED flag is not set. | ||
25 | This may be useful in embedded applications, where are strong | ||
26 | requirements for timing. | ||
27 | Say N here, unless you have a specialized requirement. | ||
28 | |||
29 | config MXC_TZIC | ||
30 | bool | ||
31 | |||
32 | config MXC_AVIC | ||
33 | bool | ||
34 | |||
35 | config MXC_DEBUG_BOARD | ||
36 | bool "Enable MXC debug board(for 3-stack)" | ||
37 | help | ||
38 | The debug board is an integral part of the MXC 3-stack(PDK) | ||
39 | platforms, it can be attached or removed from the peripheral | ||
40 | board. On debug board, several debug devices(ethernet, UART, | ||
41 | buttons, LEDs and JTAG) are implemented. Between the MCU and | ||
42 | these devices, a CPLD is added as a bridge which performs | ||
43 | data/address de-multiplexing and decode, signal level shift, | ||
44 | interrupt control and various board functions. | ||
45 | |||
46 | config HAVE_EPIT | ||
47 | bool | ||
48 | |||
49 | config MXC_USE_EPIT | ||
50 | bool "Use EPIT instead of GPT" | ||
51 | depends on HAVE_EPIT | ||
52 | help | ||
53 | Use EPIT as the system timer on systems that have it. Normally you | ||
54 | don't have a reason to do so as the EPIT has the same features and | ||
55 | uses the same clocks as the GPT. Anyway, on some systems the GPT | ||
56 | may be in use for other purposes. | ||
57 | |||
58 | config MXC_ULPI | ||
59 | bool | ||
60 | |||
61 | config ARCH_HAS_RNGA | ||
62 | bool | ||
63 | |||
64 | config IRAM_ALLOC | ||
65 | bool | ||
66 | select GENERIC_ALLOCATOR | ||
67 | |||
1 | config HAVE_IMX_GPC | 68 | config HAVE_IMX_GPC |
2 | bool | 69 | bool |
3 | 70 | ||
@@ -5,6 +72,12 @@ config HAVE_IMX_MMDC | |||
5 | bool | 72 | bool |
6 | 73 | ||
7 | config HAVE_IMX_SRC | 74 | config HAVE_IMX_SRC |
75 | def_bool y if SMP | ||
76 | |||
77 | config IMX_HAVE_IOMUX_V1 | ||
78 | bool | ||
79 | |||
80 | config ARCH_MXC_IOMUX_V3 | ||
8 | bool | 81 | bool |
9 | 82 | ||
10 | config ARCH_MX1 | 83 | config ARCH_MX1 |
@@ -104,7 +177,7 @@ config SOC_IMX51 | |||
104 | select PINCTRL_IMX51 | 177 | select PINCTRL_IMX51 |
105 | select SOC_IMX5 | 178 | select SOC_IMX5 |
106 | 179 | ||
107 | if ARCH_IMX_V4_V5 | 180 | if ARCH_MULTI_V4T |
108 | 181 | ||
109 | comment "MX1 platforms:" | 182 | comment "MX1 platforms:" |
110 | config MACH_MXLADS | 183 | config MACH_MXLADS |
@@ -133,6 +206,10 @@ config MACH_APF9328 | |||
133 | help | 206 | help |
134 | Say Yes here if you are using the Armadeus APF9328 development board | 207 | Say Yes here if you are using the Armadeus APF9328 development board |
135 | 208 | ||
209 | endif | ||
210 | |||
211 | if ARCH_MULTI_V5 | ||
212 | |||
136 | comment "MX21 platforms:" | 213 | comment "MX21 platforms:" |
137 | 214 | ||
138 | config MACH_MX21ADS | 215 | config MACH_MX21ADS |
@@ -384,7 +461,7 @@ config MACH_IMX27_DT | |||
384 | 461 | ||
385 | endif | 462 | endif |
386 | 463 | ||
387 | if ARCH_IMX_V6_V7 | 464 | if ARCH_MULTI_V6 |
388 | 465 | ||
389 | comment "MX31 platforms:" | 466 | comment "MX31 platforms:" |
390 | 467 | ||
@@ -649,6 +726,10 @@ config MACH_VPR200 | |||
649 | Include support for VPR200 platform. This includes specific | 726 | Include support for VPR200 platform. This includes specific |
650 | configurations for the board and its peripherals. | 727 | configurations for the board and its peripherals. |
651 | 728 | ||
729 | endif | ||
730 | |||
731 | if ARCH_MULTI_V7 | ||
732 | |||
652 | comment "i.MX5 platforms:" | 733 | comment "i.MX5 platforms:" |
653 | 734 | ||
654 | config MACH_MX50_RDP | 735 | config MACH_MX50_RDP |
@@ -756,7 +837,6 @@ config SOC_IMX6Q | |||
756 | select HAVE_CAN_FLEXCAN if CAN | 837 | select HAVE_CAN_FLEXCAN if CAN |
757 | select HAVE_IMX_GPC | 838 | select HAVE_IMX_GPC |
758 | select HAVE_IMX_MMDC | 839 | select HAVE_IMX_MMDC |
759 | select HAVE_IMX_SRC | ||
760 | select HAVE_SMP | 840 | select HAVE_SMP |
761 | select MFD_SYSCON | 841 | select MFD_SYSCON |
762 | select PINCTRL | 842 | select PINCTRL |
@@ -766,3 +846,7 @@ config SOC_IMX6Q | |||
766 | This enables support for Freescale i.MX6 Quad processor. | 846 | This enables support for Freescale i.MX6 Quad processor. |
767 | 847 | ||
768 | endif | 848 | endif |
849 | |||
850 | source "arch/arm/mach-imx/devices/Kconfig" | ||
851 | |||
852 | endmenu | ||
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 895754aeb4f3..fe47b71469c9 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile | |||
@@ -1,3 +1,5 @@ | |||
1 | obj-y := time.o cpu.o system.o irq-common.o | ||
2 | |||
1 | obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o | 3 | obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o |
2 | obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o | 4 | obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o |
3 | 5 | ||
@@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i | |||
15 | obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ | 17 | obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ |
16 | clk-pfd.o clk-busy.o clk.o | 18 | clk-pfd.o clk-busy.o clk.o |
17 | 19 | ||
20 | obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o | ||
21 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o | ||
22 | |||
23 | obj-$(CONFIG_MXC_TZIC) += tzic.o | ||
24 | obj-$(CONFIG_MXC_AVIC) += avic.o | ||
25 | |||
26 | obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o | ||
27 | obj-$(CONFIG_MXC_ULPI) += ulpi.o | ||
28 | obj-$(CONFIG_MXC_USE_EPIT) += epit.o | ||
29 | obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o | ||
30 | obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o | ||
31 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | ||
32 | |||
33 | ifdef CONFIG_SND_IMX_SOC | ||
34 | obj-y += ssi-fiq.o | ||
35 | obj-y += ssi-fiq-ksym.o | ||
36 | endif | ||
37 | |||
18 | # Support for CMOS sensor interface | 38 | # Support for CMOS sensor interface |
19 | obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o | 39 | obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o |
20 | 40 | ||
@@ -89,3 +109,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o | |||
89 | 109 | ||
90 | obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o | 110 | obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o |
91 | obj-$(CONFIG_SOC_IMX53) += mach-imx53.o | 111 | obj-$(CONFIG_SOC_IMX53) += mach-imx53.o |
112 | |||
113 | obj-y += devices/ | ||
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/mach-imx/avic.c index cbd55c36def3..0eff23ed92b9 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/mach-imx/avic.c | |||
@@ -22,12 +22,11 @@ | |||
22 | #include <linux/irqdomain.h> | 22 | #include <linux/irqdomain.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/of.h> | 24 | #include <linux/of.h> |
25 | #include <mach/common.h> | ||
26 | #include <asm/mach/irq.h> | 25 | #include <asm/mach/irq.h> |
27 | #include <asm/exception.h> | 26 | #include <asm/exception.h> |
28 | #include <mach/hardware.h> | ||
29 | #include <mach/irqs.h> | ||
30 | 27 | ||
28 | #include "common.h" | ||
29 | #include "hardware.h" | ||
31 | #include "irq-common.h" | 30 | #include "irq-common.h" |
32 | 31 | ||
33 | #define AVIC_INTCNTL 0x00 /* int control reg */ | 32 | #define AVIC_INTCNTL 0x00 /* int control reg */ |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/arch/arm/mach-imx/board-mx31lilly.h index 0df71bfefbb1..0df71bfefbb1 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h +++ b/arch/arm/mach-imx/board-mx31lilly.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/mach-imx/board-mx31lite.h index c1ad0ae807cc..c1ad0ae807cc 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h +++ b/arch/arm/mach-imx/board-mx31lite.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/mach-imx/board-mx31moboard.h index de14543891cf..de14543891cf 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h +++ b/arch/arm/mach-imx/board-mx31moboard.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/mach-imx/board-pcm038.h index 6f371e35753d..6f371e35753d 100644 --- a/arch/arm/plat-mxc/include/mach/board-pcm038.h +++ b/arch/arm/mach-imx/board-pcm038.h | |||
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 516ddee1948e..15f9d223cf0b 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c | |||
@@ -22,9 +22,9 @@ | |||
22 | #include <linux/clkdev.h> | 22 | #include <linux/clkdev.h> |
23 | #include <linux/err.h> | 23 | #include <linux/err.h> |
24 | 24 | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/common.h> | ||
27 | #include "clk.h" | 25 | #include "clk.h" |
26 | #include "common.h" | ||
27 | #include "hardware.h" | ||
28 | 28 | ||
29 | /* CCM register addresses */ | 29 | /* CCM register addresses */ |
30 | #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) | 30 | #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) |
@@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref) | |||
82 | pr_err("imx1 clk %d: register failed with %ld\n", | 82 | pr_err("imx1 clk %d: register failed with %ld\n", |
83 | i, PTR_ERR(clk[i])); | 83 | i, PTR_ERR(clk[i])); |
84 | 84 | ||
85 | clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma"); | 85 | clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma"); |
86 | clk_register_clkdev(clk[hclk], "ipg", "imx1-dma"); | ||
86 | clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0"); | 87 | clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0"); |
87 | clk_register_clkdev(clk[mma_gate], "mma", NULL); | 88 | clk_register_clkdev(clk[mma_gate], "mma", NULL); |
88 | clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0"); | 89 | clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0"); |
@@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref) | |||
94 | clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1"); | 95 | clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1"); |
95 | clk_register_clkdev(clk[per1], "per", "imx1-uart.2"); | 96 | clk_register_clkdev(clk[per1], "per", "imx1-uart.2"); |
96 | clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2"); | 97 | clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2"); |
97 | clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0"); | 98 | clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0"); |
98 | clk_register_clkdev(clk[per2], "per", "imx1-cspi.0"); | 99 | clk_register_clkdev(clk[per2], "per", "imx1-cspi.0"); |
99 | clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0"); | 100 | clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0"); |
100 | clk_register_clkdev(clk[per2], "per", "imx1-cspi.1"); | 101 | clk_register_clkdev(clk[per2], "per", "imx1-cspi.1"); |
101 | clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1"); | 102 | clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1"); |
102 | clk_register_clkdev(clk[per2], NULL, "imx-mmc.0"); | 103 | clk_register_clkdev(clk[per2], NULL, "imx-mmc.0"); |
103 | clk_register_clkdev(clk[per2], "per", "imx-fb.0"); | 104 | clk_register_clkdev(clk[per2], "per", "imx1-fb.0"); |
104 | clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0"); | 105 | clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0"); |
105 | clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0"); | 106 | clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0"); |
106 | clk_register_clkdev(clk[hclk], "mshc", NULL); | 107 | clk_register_clkdev(clk[hclk], "mshc", NULL); |
107 | clk_register_clkdev(clk[per3], "ssi", NULL); | 108 | clk_register_clkdev(clk[per3], "ssi", NULL); |
108 | clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0"); | 109 | clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0"); |
109 | clk_register_clkdev(clk[clko], "clko", NULL); | 110 | clk_register_clkdev(clk[clko], "clko", NULL); |
110 | 111 | ||
111 | mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT); | 112 | mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT); |
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index cf65148bc519..d7ed66091a2a 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c | |||
@@ -25,9 +25,9 @@ | |||
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/err.h> | 26 | #include <linux/err.h> |
27 | 27 | ||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/common.h> | ||
30 | #include "clk.h" | 28 | #include "clk.h" |
29 | #include "common.h" | ||
30 | #include "hardware.h" | ||
31 | 31 | ||
32 | #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) | 32 | #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) |
33 | 33 | ||
@@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) | |||
156 | clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1"); | 156 | clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1"); |
157 | clk_register_clkdev(clk[per2], "per", "imx21-cspi.2"); | 157 | clk_register_clkdev(clk[per2], "per", "imx21-cspi.2"); |
158 | clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2"); | 158 | clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2"); |
159 | clk_register_clkdev(clk[per3], "per", "imx-fb.0"); | 159 | clk_register_clkdev(clk[per3], "per", "imx21-fb.0"); |
160 | clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); | 160 | clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); |
161 | clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0"); | 161 | clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0"); |
162 | clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0"); | 162 | clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0"); |
163 | clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0"); | 163 | clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0"); |
164 | clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0"); | 164 | clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0"); |
165 | clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma"); | 165 | clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma"); |
166 | clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma"); | 166 | clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma"); |
167 | clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); | 167 | clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); |
168 | clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0"); | 168 | clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0"); |
169 | clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad"); | 169 | clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad"); |
170 | clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); | 170 | clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); |
171 | clk_register_clkdev(clk[brom_gate], "brom", NULL); | 171 | clk_register_clkdev(clk[brom_gate], "brom", NULL); |
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index 01e2f843bf2e..bc885801cd68 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c | |||
@@ -24,10 +24,10 @@ | |||
24 | #include <linux/clkdev.h> | 24 | #include <linux/clkdev.h> |
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | 26 | ||
27 | #include <mach/hardware.h> | ||
28 | #include <mach/common.h> | ||
29 | #include <mach/mx25.h> | ||
30 | #include "clk.h" | 27 | #include "clk.h" |
28 | #include "common.h" | ||
29 | #include "hardware.h" | ||
30 | #include "mx25.h" | ||
31 | 31 | ||
32 | #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) | 32 | #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) |
33 | 33 | ||
@@ -197,7 +197,7 @@ int __init mx25_clocks_init(void) | |||
197 | clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); | 197 | clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); |
198 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc"); | 198 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc"); |
199 | clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); | 199 | clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); |
200 | clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0"); | 200 | clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0"); |
201 | /* i.mx25 has the i.mx35 type cspi */ | 201 | /* i.mx25 has the i.mx35 type cspi */ |
202 | clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0"); | 202 | clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0"); |
203 | clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); | 203 | clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); |
@@ -212,15 +212,15 @@ int __init mx25_clocks_init(void) | |||
212 | clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); | 212 | clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); |
213 | clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); | 213 | clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); |
214 | clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); | 214 | clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); |
215 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0"); | 215 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0"); |
216 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1"); | 216 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1"); |
217 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2"); | 217 | clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2"); |
218 | clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0"); | 218 | clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0"); |
219 | clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0"); | 219 | clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0"); |
220 | clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0"); | 220 | clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0"); |
221 | clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0"); | 221 | clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0"); |
222 | clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); | 222 | clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0"); |
223 | clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); | 223 | clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0"); |
224 | clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); | 224 | clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); |
225 | clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); | 225 | clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); |
226 | clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); | 226 | clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); |
@@ -230,9 +230,9 @@ int __init mx25_clocks_init(void) | |||
230 | clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1"); | 230 | clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1"); |
231 | clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1"); | 231 | clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1"); |
232 | clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1"); | 232 | clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1"); |
233 | clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0"); | 233 | clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0"); |
234 | clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0"); | 234 | clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0"); |
235 | clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0"); | 235 | clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0"); |
236 | clk_register_clkdev(clk[dummy], "audmux", NULL); | 236 | clk_register_clkdev(clk[dummy], "audmux", NULL); |
237 | clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0"); | 237 | clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0"); |
238 | clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1"); | 238 | clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1"); |
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 366e5d59d886..585ab256c58f 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c | |||
@@ -6,9 +6,9 @@ | |||
6 | #include <linux/clk-provider.h> | 6 | #include <linux/clk-provider.h> |
7 | #include <linux/of.h> | 7 | #include <linux/of.h> |
8 | 8 | ||
9 | #include <mach/common.h> | ||
10 | #include <mach/hardware.h> | ||
11 | #include "clk.h" | 9 | #include "clk.h" |
10 | #include "common.h" | ||
11 | #include "hardware.h" | ||
12 | 12 | ||
13 | #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) | 13 | #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) |
14 | 14 | ||
@@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref) | |||
211 | clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5"); | 211 | clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5"); |
212 | clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5"); | 212 | clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5"); |
213 | clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0"); | 213 | clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0"); |
214 | clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0"); | 214 | clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0"); |
215 | clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0"); | 215 | clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0"); |
216 | clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1"); | 216 | clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1"); |
217 | clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1"); | 217 | clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1"); |
218 | clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2"); | 218 | clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2"); |
219 | clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2"); | 219 | clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2"); |
220 | clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0"); | 220 | clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0"); |
221 | clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1"); | 221 | clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1"); |
222 | clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2"); | 222 | clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2"); |
223 | clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0"); | 223 | clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0"); |
224 | clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); | 224 | clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); |
225 | clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0"); | 225 | clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0"); |
226 | clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0"); | 226 | clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0"); |
227 | clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); | 227 | clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); |
228 | clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc"); | 228 | clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc"); |
229 | clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc"); | 229 | clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc"); |
@@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref) | |||
238 | clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2"); | 238 | clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2"); |
239 | clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); | 239 | clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); |
240 | clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); | 240 | clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); |
241 | clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0"); | 241 | clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0"); |
242 | clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); | 242 | clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); |
243 | clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); | 243 | clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); |
244 | clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma"); | 244 | clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma"); |
245 | clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma"); | 245 | clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma"); |
246 | clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0"); | 246 | clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0"); |
247 | clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0"); | 247 | clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0"); |
248 | clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0"); | 248 | clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0"); |
249 | clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0"); | 249 | clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0"); |
250 | clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1"); | 250 | clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1"); |
251 | clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0"); | 251 | clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0"); |
252 | clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad"); | 252 | clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad"); |
253 | clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0"); | 253 | clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0"); |
254 | clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0"); | 254 | clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0"); |
255 | clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0"); | 255 | clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0"); |
256 | clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0"); | 256 | clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0"); |
257 | clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL); | 257 | clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL); |
258 | clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); | 258 | clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); |
259 | clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); | 259 | clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); |
260 | clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); | 260 | clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); |
261 | clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc"); | 261 | clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc"); |
262 | clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); | 262 | clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); |
263 | clk_register_clkdev(clk[cpu_div], "cpu", NULL); | 263 | clk_register_clkdev(clk[cpu_div], "cpu", NULL); |
264 | clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); | 264 | clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); |
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 1253af2d9971..8be64e0a4ace 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c | |||
@@ -22,12 +22,11 @@ | |||
22 | #include <linux/err.h> | 22 | #include <linux/err.h> |
23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
24 | 24 | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/mx31.h> | ||
27 | #include <mach/common.h> | ||
28 | |||
29 | #include "clk.h" | 25 | #include "clk.h" |
26 | #include "common.h" | ||
30 | #include "crmregs-imx3.h" | 27 | #include "crmregs-imx3.h" |
28 | #include "hardware.h" | ||
29 | #include "mx31.h" | ||
31 | 30 | ||
32 | static const char *mcu_main_sel[] = { "spll", "mpll", }; | 31 | static const char *mcu_main_sel[] = { "spll", "mpll", }; |
33 | static const char *per_sel[] = { "per_div", "ipg", }; | 32 | static const char *per_sel[] = { "per_div", "ipg", }; |
@@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref) | |||
124 | clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); | 123 | clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); |
125 | clk_register_clkdev(clk[pwm_gate], "pwm", NULL); | 124 | clk_register_clkdev(clk[pwm_gate], "pwm", NULL); |
126 | clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); | 125 | clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); |
127 | clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc"); | 126 | clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc"); |
128 | clk_register_clkdev(clk[epit1_gate], "epit", NULL); | 127 | clk_register_clkdev(clk[epit1_gate], "epit", NULL); |
129 | clk_register_clkdev(clk[epit2_gate], "epit", NULL); | 128 | clk_register_clkdev(clk[epit2_gate], "epit", NULL); |
130 | clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0"); | 129 | clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); |
131 | clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); | 130 | clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); |
132 | clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); | 131 | clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); |
133 | clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); | 132 | clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); |
@@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref) | |||
155 | clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); | 154 | clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); |
156 | clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); | 155 | clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); |
157 | clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); | 156 | clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); |
158 | clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); | 157 | clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); |
159 | clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); | 158 | clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); |
160 | clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); | 159 | clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); |
161 | clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); | 160 | clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); |
162 | clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0"); | 161 | clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0"); |
163 | clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1"); | 162 | clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1"); |
164 | clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); | 163 | clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); |
165 | clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); | 164 | clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); |
166 | clk_register_clkdev(clk[firi_gate], "firi", NULL); | 165 | clk_register_clkdev(clk[firi_gate], "firi", NULL); |
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 177259b523cd..66f3d65ea275 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c | |||
@@ -14,11 +14,10 @@ | |||
14 | #include <linux/of.h> | 14 | #include <linux/of.h> |
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | 16 | ||
17 | #include <mach/hardware.h> | ||
18 | #include <mach/common.h> | ||
19 | |||
20 | #include "crmregs-imx3.h" | 17 | #include "crmregs-imx3.h" |
21 | #include "clk.h" | 18 | #include "clk.h" |
19 | #include "common.h" | ||
20 | #include "hardware.h" | ||
22 | 21 | ||
23 | struct arm_ahb_div { | 22 | struct arm_ahb_div { |
24 | unsigned char arm, ahb, sel; | 23 | unsigned char arm, ahb, sel; |
@@ -226,9 +225,9 @@ int __init mx35_clocks_init() | |||
226 | clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); | 225 | clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); |
227 | clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); | 226 | clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); |
228 | clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); | 227 | clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); |
229 | clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); | 228 | clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); |
230 | clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); | 229 | clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); |
231 | clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); | 230 | clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); |
232 | clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); | 231 | clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); |
233 | clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); | 232 | clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); |
234 | clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); | 233 | clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); |
@@ -256,7 +255,7 @@ int __init mx35_clocks_init() | |||
256 | clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); | 255 | clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); |
257 | clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); | 256 | clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); |
258 | clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); | 257 | clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); |
259 | clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); | 258 | clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); |
260 | clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); | 259 | clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); |
261 | 260 | ||
262 | clk_prepare_enable(clk[spba_gate]); | 261 | clk_prepare_enable(clk[spba_gate]); |
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index a0bf84803eac..abb71f6b4d60 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c | |||
@@ -14,11 +14,10 @@ | |||
14 | #include <linux/of.h> | 14 | #include <linux/of.h> |
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | 16 | ||
17 | #include <mach/hardware.h> | ||
18 | #include <mach/common.h> | ||
19 | |||
20 | #include "crm-regs-imx5.h" | 17 | #include "crm-regs-imx5.h" |
21 | #include "clk.h" | 18 | #include "clk.h" |
19 | #include "common.h" | ||
20 | #include "hardware.h" | ||
22 | 21 | ||
23 | /* Low-power Audio Playback Mode clock */ | 22 | /* Low-power Audio Playback Mode clock */ |
24 | static const char *lp_apm_sel[] = { "osc", }; | 23 | static const char *lp_apm_sel[] = { "osc", }; |
@@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, | |||
258 | clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2"); | 257 | clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2"); |
259 | clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0"); | 258 | clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0"); |
260 | clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1"); | 259 | clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1"); |
261 | clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); | 260 | clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); |
262 | clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); | 261 | clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); |
263 | clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0"); | 262 | clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0"); |
264 | clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0"); | 263 | clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0"); |
265 | clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0"); | 264 | clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0"); |
@@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, | |||
272 | clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc"); | 271 | clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc"); |
273 | clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc"); | 272 | clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc"); |
274 | clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc"); | 273 | clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc"); |
275 | clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand"); | 274 | clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand"); |
276 | clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); | 275 | clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); |
277 | clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); | 276 | clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); |
278 | clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); | 277 | clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); |
@@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, | |||
345 | 344 | ||
346 | mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); | 345 | mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); |
347 | 346 | ||
348 | clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2"); | 347 | clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2"); |
349 | clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL); | 348 | clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL); |
350 | clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0"); | 349 | clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0"); |
351 | clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); | 350 | clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); |
@@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, | |||
440 | mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); | 439 | mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); |
441 | 440 | ||
442 | clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); | 441 | clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); |
443 | clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); | 442 | clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); |
444 | clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0"); | 443 | clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0"); |
445 | clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu"); | 444 | clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu"); |
446 | clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu"); | 445 | clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu"); |
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 3ec242f3341e..e5a82bb95b52 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c | |||
@@ -19,8 +19,9 @@ | |||
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/of_address.h> | 20 | #include <linux/of_address.h> |
21 | #include <linux/of_irq.h> | 21 | #include <linux/of_irq.h> |
22 | #include <mach/common.h> | 22 | |
23 | #include "clk.h" | 23 | #include "clk.h" |
24 | #include "common.h" | ||
24 | 25 | ||
25 | #define CCGR0 0x68 | 26 | #define CCGR0 0x68 |
26 | #define CCGR1 0x6c | 27 | #define CCGR1 0x6c |
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 02be73178912..abff350ba24c 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c | |||
@@ -4,10 +4,10 @@ | |||
4 | #include <linux/slab.h> | 4 | #include <linux/slab.h> |
5 | #include <linux/kernel.h> | 5 | #include <linux/kernel.h> |
6 | #include <linux/err.h> | 6 | #include <linux/err.h> |
7 | #include <mach/common.h> | ||
8 | #include <mach/hardware.h> | ||
9 | 7 | ||
10 | #include "clk.h" | 8 | #include "clk.h" |
9 | #include "common.h" | ||
10 | #include "hardware.h" | ||
11 | 11 | ||
12 | /** | 12 | /** |
13 | * pll v1 | 13 | * pll v1 |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/mach-imx/common.h index ead901814c0d..ef8db6b34841 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/mach-imx/common.h | |||
@@ -79,6 +79,7 @@ extern void mxc_arch_reset_init(void __iomem *); | |||
79 | extern int mx53_revision(void); | 79 | extern int mx53_revision(void); |
80 | extern int mx53_display_revision(void); | 80 | extern int mx53_display_revision(void); |
81 | extern void imx_set_aips(void __iomem *); | 81 | extern void imx_set_aips(void __iomem *); |
82 | extern int mxc_device_init(void); | ||
82 | 83 | ||
83 | enum mxc_cpu_pwr_mode { | 84 | enum mxc_cpu_pwr_mode { |
84 | WAIT_CLOCKED, /* wfi only */ | 85 | WAIT_CLOCKED, /* wfi only */ |
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c index 6914bcbf84e4..96ec64b5ff7d 100644 --- a/arch/arm/mach-imx/cpu-imx25.c +++ b/arch/arm/mach-imx/cpu-imx25.c | |||
@@ -11,8 +11,9 @@ | |||
11 | */ | 11 | */ |
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <mach/hardware.h> | 14 | |
15 | #include <mach/iim.h> | 15 | #include "iim.h" |
16 | #include "hardware.h" | ||
16 | 17 | ||
17 | static int mx25_cpu_rev = -1; | 18 | static int mx25_cpu_rev = -1; |
18 | 19 | ||
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c index ff38e1505f67..fe8d36f7e30e 100644 --- a/arch/arm/mach-imx/cpu-imx27.c +++ b/arch/arm/mach-imx/cpu-imx27.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | 26 | ||
27 | #include <mach/hardware.h> | 27 | #include "hardware.h" |
28 | 28 | ||
29 | static int mx27_cpu_rev = -1; | 29 | static int mx27_cpu_rev = -1; |
30 | static int mx27_cpu_partnumber; | 30 | static int mx27_cpu_partnumber; |
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c index 3f2345f0cdaf..fde1860a2521 100644 --- a/arch/arm/mach-imx/cpu-imx31.c +++ b/arch/arm/mach-imx/cpu-imx31.c | |||
@@ -11,9 +11,10 @@ | |||
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <mach/hardware.h> | 14 | |
15 | #include <mach/iim.h> | 15 | #include "common.h" |
16 | #include <mach/common.h> | 16 | #include "hardware.h" |
17 | #include "iim.h" | ||
17 | 18 | ||
18 | static int mx31_cpu_rev = -1; | 19 | static int mx31_cpu_rev = -1; |
19 | 20 | ||
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c index 846e46eb8cbf..ec3aaa098c17 100644 --- a/arch/arm/mach-imx/cpu-imx35.c +++ b/arch/arm/mach-imx/cpu-imx35.c | |||
@@ -10,8 +10,9 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <mach/hardware.h> | 13 | |
14 | #include <mach/iim.h> | 14 | #include "hardware.h" |
15 | #include "iim.h" | ||
15 | 16 | ||
16 | static int mx35_cpu_rev = -1; | 17 | static int mx35_cpu_rev = -1; |
17 | 18 | ||
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index 8eb15a2fcaf9..d88760014ff9 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c | |||
@@ -15,9 +15,10 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
18 | #include <mach/hardware.h> | ||
19 | #include <linux/io.h> | 18 | #include <linux/io.h> |
20 | 19 | ||
20 | #include "hardware.h" | ||
21 | |||
21 | static int mx5_cpu_rev = -1; | 22 | static int mx5_cpu_rev = -1; |
22 | 23 | ||
23 | #define IIM_SREV 0x24 | 24 | #define IIM_SREV 0x24 |
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/mach-imx/cpu.c index 220dd6f93126..03fcbd082593 100644 --- a/arch/arm/plat-mxc/cpu.c +++ b/arch/arm/mach-imx/cpu.c | |||
@@ -1,7 +1,8 @@ | |||
1 | 1 | ||
2 | #include <linux/module.h> | 2 | #include <linux/module.h> |
3 | #include <linux/io.h> | 3 | #include <linux/io.h> |
4 | #include <mach/hardware.h> | 4 | |
5 | #include "hardware.h" | ||
5 | 6 | ||
6 | unsigned int __mxc_cpu_type; | 7 | unsigned int __mxc_cpu_type; |
7 | EXPORT_SYMBOL(__mxc_cpu_type); | 8 | EXPORT_SYMBOL(__mxc_cpu_type); |
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c index 7b92cd6da6d3..b9ef692b61a2 100644 --- a/arch/arm/mach-imx/cpu_op-mx51.c +++ b/arch/arm/mach-imx/cpu_op-mx51.c | |||
@@ -13,9 +13,10 @@ | |||
13 | 13 | ||
14 | #include <linux/bug.h> | 14 | #include <linux/bug.h> |
15 | #include <linux/types.h> | 15 | #include <linux/types.h> |
16 | #include <mach/hardware.h> | ||
17 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
18 | 17 | ||
18 | #include "hardware.h" | ||
19 | |||
19 | static struct cpu_op mx51_cpu_op[] = { | 20 | static struct cpu_op mx51_cpu_op[] = { |
20 | { | 21 | { |
21 | .cpu_rate = 160000000,}, | 22 | .cpu_rate = 160000000,}, |
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/mach-imx/cpufreq.c index b5b6f8083130..36e8b3994470 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/mach-imx/cpufreq.c | |||
@@ -22,7 +22,8 @@ | |||
22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
23 | #include <linux/err.h> | 23 | #include <linux/err.h> |
24 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
25 | #include <mach/hardware.h> | 25 | |
26 | #include "hardware.h" | ||
26 | 27 | ||
27 | #define CLK32_FREQ 32768 | 28 | #define CLK32_FREQ 32768 |
28 | #define NANOSECOND (1000 * 1000 * 1000) | 29 | #define NANOSECOND (1000 * 1000 * 1000) |
diff --git a/arch/arm/plat-mxc/cpuidle.c b/arch/arm/mach-imx/cpuidle.c index d4cb511a44a8..d4cb511a44a8 100644 --- a/arch/arm/plat-mxc/cpuidle.c +++ b/arch/arm/mach-imx/cpuidle.c | |||
diff --git a/arch/arm/plat-mxc/include/mach/cpuidle.h b/arch/arm/mach-imx/cpuidle.h index bc932d1af372..bc932d1af372 100644 --- a/arch/arm/plat-mxc/include/mach/cpuidle.h +++ b/arch/arm/mach-imx/cpuidle.h | |||
diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h index 3aad1e70de96..f9b5afc6bcd1 100644 --- a/arch/arm/mach-imx/devices-imx1.h +++ b/arch/arm/mach-imx/devices-imx1.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx1.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_imx_fb_data imx1_imx_fb_data; | 11 | extern const struct imx_imx_fb_data imx1_imx_fb_data; |
13 | #define imx1_add_imx_fb(pdata) \ | 12 | #define imx1_add_imx_fb(pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 93ece55f75df..bd9393280159 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx21.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; | 11 | extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; |
13 | #define imx21_add_imx21_hcd(pdata) \ | 12 | #define imx21_add_imx21_hcd(pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h index f8e03dd1f116..0d2922bc575c 100644 --- a/arch/arm/mach-imx/devices-imx25.h +++ b/arch/arm/mach-imx/devices-imx25.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx25.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_fec_data imx25_fec_data; | 11 | extern const struct imx_fec_data imx25_fec_data; |
13 | #define imx25_add_fec(pdata) \ | 12 | #define imx25_add_fec(pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 04822932cdd1..8a1ad7972d4c 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx27.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_fec_data imx27_fec_data; | 11 | extern const struct imx_fec_data imx27_fec_data; |
13 | #define imx27_add_fec(pdata) \ | 12 | #define imx27_add_fec(pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h index 8b2ceb45bb83..e8d1611bbc8e 100644 --- a/arch/arm/mach-imx/devices-imx31.h +++ b/arch/arm/mach-imx/devices-imx31.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx31.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; | 11 | extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; |
13 | #define imx31_add_fsl_usb2_udc(pdata) \ | 12 | #define imx31_add_fsl_usb2_udc(pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h index c3e9f206ac2b..e2675f1b141c 100644 --- a/arch/arm/mach-imx/devices-imx35.h +++ b/arch/arm/mach-imx/devices-imx35.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx35.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_fec_data imx35_fec_data; | 11 | extern const struct imx_fec_data imx35_fec_data; |
13 | #define imx35_add_fec(pdata) \ | 12 | #define imx35_add_fec(pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h index 7216667eaafc..2c290391f298 100644 --- a/arch/arm/mach-imx/devices-imx50.h +++ b/arch/arm/mach-imx/devices-imx50.h | |||
@@ -18,8 +18,7 @@ | |||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | 18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <mach/mx50.h> | 21 | #include "devices/devices-common.h" |
22 | #include <mach/devices-common.h> | ||
23 | 22 | ||
24 | extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[]; | 23 | extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[]; |
25 | #define imx50_add_imx_uart(id, pdata) \ | 24 | #define imx50_add_imx_uart(id, pdata) \ |
diff --git a/arch/arm/mach-imx/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h index 9f1718725195..deee5baee88c 100644 --- a/arch/arm/mach-imx/devices-imx51.h +++ b/arch/arm/mach-imx/devices-imx51.h | |||
@@ -6,8 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/mx51.h> | 9 | #include "devices/devices-common.h" |
10 | #include <mach/devices-common.h> | ||
11 | 10 | ||
12 | extern const struct imx_fec_data imx51_fec_data; | 11 | extern const struct imx_fec_data imx51_fec_data; |
13 | #define imx51_add_fec(pdata) \ | 12 | #define imx51_add_fec(pdata) \ |
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig index a35d9841f494..a35d9841f494 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/mach-imx/devices/Kconfig | |||
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/mach-imx/devices/Makefile index 76f3195475d0..2abe2a5144d0 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/mach-imx/devices/Makefile | |||
@@ -1,3 +1,5 @@ | |||
1 | obj-y := devices.o | ||
2 | |||
1 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o | 3 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o |
2 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o | 4 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o |
3 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o | 5 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o |
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h index eaf79d220c9a..e4b790b9e2aa 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/mach-imx/devices/devices-common.h | |||
@@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc( | |||
108 | 108 | ||
109 | #include <linux/platform_data/video-imxfb.h> | 109 | #include <linux/platform_data/video-imxfb.h> |
110 | struct imx_imx_fb_data { | 110 | struct imx_imx_fb_data { |
111 | const char *devid; | ||
111 | resource_size_t iobase; | 112 | resource_size_t iobase; |
112 | resource_size_t iosize; | 113 | resource_size_t iosize; |
113 | resource_size_t irq; | 114 | resource_size_t irq; |
@@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb( | |||
118 | 119 | ||
119 | #include <linux/platform_data/i2c-imx.h> | 120 | #include <linux/platform_data/i2c-imx.h> |
120 | struct imx_imx_i2c_data { | 121 | struct imx_imx_i2c_data { |
122 | const char *devid; | ||
121 | int id; | 123 | int id; |
122 | resource_size_t iobase; | 124 | resource_size_t iobase; |
123 | resource_size_t iosize; | 125 | resource_size_t iosize; |
@@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera( | |||
219 | 221 | ||
220 | #include <linux/platform_data/camera-mx2.h> | 222 | #include <linux/platform_data/camera-mx2.h> |
221 | struct imx_mx2_camera_data { | 223 | struct imx_mx2_camera_data { |
224 | const char *devid; | ||
222 | resource_size_t iobasecsi; | 225 | resource_size_t iobasecsi; |
223 | resource_size_t iosizecsi; | 226 | resource_size_t iosizecsi; |
224 | resource_size_t irqcsi; | 227 | resource_size_t irqcsi; |
@@ -244,6 +247,7 @@ struct platform_device *__init imx_add_mxc_ehci( | |||
244 | 247 | ||
245 | #include <linux/platform_data/mmc-mxcmmc.h> | 248 | #include <linux/platform_data/mmc-mxcmmc.h> |
246 | struct imx_mxc_mmc_data { | 249 | struct imx_mxc_mmc_data { |
250 | const char *devid; | ||
247 | int id; | 251 | int id; |
248 | resource_size_t iobase; | 252 | resource_size_t iobase; |
249 | resource_size_t iosize; | 253 | resource_size_t iosize; |
@@ -256,6 +260,7 @@ struct platform_device *__init imx_add_mxc_mmc( | |||
256 | 260 | ||
257 | #include <linux/platform_data/mtd-mxc_nand.h> | 261 | #include <linux/platform_data/mtd-mxc_nand.h> |
258 | struct imx_mxc_nand_data { | 262 | struct imx_mxc_nand_data { |
263 | const char *devid; | ||
259 | /* | 264 | /* |
260 | * id is traditionally 0, but -1 is more appropriate. We use -1 for new | 265 | * id is traditionally 0, but -1 is more appropriate. We use -1 for new |
261 | * machines but don't change existing devices as the nand device usually | 266 | * machines but don't change existing devices as the nand device usually |
@@ -290,6 +295,7 @@ struct platform_device *__init imx_add_mxc_pwm( | |||
290 | 295 | ||
291 | /* mxc_rtc */ | 296 | /* mxc_rtc */ |
292 | struct imx_mxc_rtc_data { | 297 | struct imx_mxc_rtc_data { |
298 | const char *devid; | ||
293 | resource_size_t iobase; | 299 | resource_size_t iobase; |
294 | resource_size_t irq; | 300 | resource_size_t irq; |
295 | }; | 301 | }; |
@@ -326,7 +332,8 @@ struct platform_device *__init imx_add_spi_imx( | |||
326 | const struct imx_spi_imx_data *data, | 332 | const struct imx_spi_imx_data *data, |
327 | const struct spi_imx_master *pdata); | 333 | const struct spi_imx_master *pdata); |
328 | 334 | ||
329 | struct platform_device *imx_add_imx_dma(void); | 335 | struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase, |
336 | int irq, int irq_err); | ||
330 | struct platform_device *imx_add_imx_sdma(char *name, | 337 | struct platform_device *imx_add_imx_sdma(char *name, |
331 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); | 338 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); |
332 | 339 | ||
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/mach-imx/devices/devices.c index 4d55a7a26e98..1b37482407f9 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/mach-imx/devices/devices.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/err.h> | 22 | #include <linux/err.h> |
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <mach/common.h> | ||
25 | 24 | ||
26 | struct device mxc_aips_bus = { | 25 | struct device mxc_aips_bus = { |
27 | .init_name = "mxc_aips", | 26 | .init_name = "mxc_aips", |
@@ -33,7 +32,7 @@ struct device mxc_ahb_bus = { | |||
33 | .parent = &platform_bus, | 32 | .parent = &platform_bus, |
34 | }; | 33 | }; |
35 | 34 | ||
36 | static int __init mxc_device_init(void) | 35 | int __init mxc_device_init(void) |
37 | { | 36 | { |
38 | int ret; | 37 | int ret; |
39 | 38 | ||
@@ -46,4 +45,3 @@ static int __init mxc_device_init(void) | |||
46 | done: | 45 | done: |
47 | return ret; | 46 | return ret; |
48 | } | 47 | } |
49 | core_initcall(mxc_device_init); | ||
diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/mach-imx/devices/platform-ahci-imx.c index ade4a1c4e2a3..3d87dd9c284a 100644 --- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c +++ b/arch/arm/mach-imx/devices/platform-ahci-imx.c | |||
@@ -24,8 +24,9 @@ | |||
24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
25 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
26 | #include <asm/sizes.h> | 26 | #include <asm/sizes.h> |
27 | #include <mach/hardware.h> | 27 | |
28 | #include <mach/devices-common.h> | 28 | #include "../hardware.h" |
29 | #include "devices-common.h" | ||
29 | 30 | ||
30 | #define imx_ahci_imx_data_entry_single(soc, _devid) \ | 31 | #define imx_ahci_imx_data_entry_single(soc, _devid) \ |
31 | { \ | 32 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/mach-imx/devices/platform-fec.c index 0bae44e890db..2cb188ad9a0a 100644 --- a/arch/arm/plat-mxc/devices/platform-fec.c +++ b/arch/arm/mach-imx/devices/platform-fec.c | |||
@@ -8,8 +8,9 @@ | |||
8 | */ | 8 | */ |
9 | #include <linux/dma-mapping.h> | 9 | #include <linux/dma-mapping.h> |
10 | #include <asm/sizes.h> | 10 | #include <asm/sizes.h> |
11 | #include <mach/hardware.h> | 11 | |
12 | #include <mach/devices-common.h> | 12 | #include "../hardware.h" |
13 | #include "devices-common.h" | ||
13 | 14 | ||
14 | #define imx_fec_data_entry_single(soc, _devid) \ | 15 | #define imx_fec_data_entry_single(soc, _devid) \ |
15 | { \ | 16 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/mach-imx/devices/platform-flexcan.c index 4e8497af2eb1..1078bf0a94ef 100644 --- a/arch/arm/plat-mxc/devices/platform-flexcan.c +++ b/arch/arm/mach-imx/devices/platform-flexcan.c | |||
@@ -5,8 +5,8 @@ | |||
5 | * the terms of the GNU General Public License version 2 as published by the | 5 | * the terms of the GNU General Public License version 2 as published by the |
6 | * Free Software Foundation. | 6 | * Free Software Foundation. |
7 | */ | 7 | */ |
8 | #include <mach/hardware.h> | 8 | #include "../hardware.h" |
9 | #include <mach/devices-common.h> | 9 | #include "devices-common.h" |
10 | 10 | ||
11 | #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ | 11 | #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ |
12 | { \ | 12 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c index 848038f301fd..37e44398197b 100644 --- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c +++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c | |||
@@ -7,8 +7,9 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/dma-mapping.h> | 9 | #include <linux/dma-mapping.h> |
10 | #include <mach/hardware.h> | 10 | |
11 | #include <mach/devices-common.h> | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
12 | 13 | ||
13 | #define imx_fsl_usb2_udc_data_entry_single(soc) \ | 14 | #define imx_fsl_usb2_udc_data_entry_single(soc) \ |
14 | { \ | 15 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/mach-imx/devices/platform-gpio-mxc.c index a7919a241032..26483fa94b75 100644 --- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c +++ b/arch/arm/mach-imx/devices/platform-gpio-mxc.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/devices-common.h> | 9 | #include "devices-common.h" |
10 | 10 | ||
11 | struct platform_device *__init mxc_register_gpio(char *name, int id, | 11 | struct platform_device *__init mxc_register_gpio(char *name, int id, |
12 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) | 12 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) |
diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/mach-imx/devices/platform-gpio_keys.c index 1c53a532ea0e..486282539c76 100644 --- a/arch/arm/plat-mxc/devices/platform-gpio_keys.c +++ b/arch/arm/mach-imx/devices/platform-gpio_keys.c | |||
@@ -16,8 +16,9 @@ | |||
16 | * Boston, MA 02110-1301, USA. | 16 | * Boston, MA 02110-1301, USA. |
17 | */ | 17 | */ |
18 | #include <asm/sizes.h> | 18 | #include <asm/sizes.h> |
19 | #include <mach/hardware.h> | 19 | |
20 | #include <mach/devices-common.h> | 20 | #include "../hardware.h" |
21 | #include "devices-common.h" | ||
21 | 22 | ||
22 | struct platform_device *__init imx_add_gpio_keys( | 23 | struct platform_device *__init imx_add_gpio_keys( |
23 | const struct gpio_keys_platform_data *pdata) | 24 | const struct gpio_keys_platform_data *pdata) |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/mach-imx/devices/platform-imx-dma.c index 7fa7e9c92468..ccdb5dc4ddbd 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/mach-imx/devices/platform-imx-dma.c | |||
@@ -6,12 +6,29 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/devices-common.h> | 9 | #include "devices-common.h" |
10 | 10 | ||
11 | struct platform_device __init __maybe_unused *imx_add_imx_dma(void) | 11 | struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, |
12 | resource_size_t iobase, int irq, int irq_err) | ||
12 | { | 13 | { |
14 | struct resource res[] = { | ||
15 | { | ||
16 | .start = iobase, | ||
17 | .end = iobase + SZ_4K - 1, | ||
18 | .flags = IORESOURCE_MEM, | ||
19 | }, { | ||
20 | .start = irq, | ||
21 | .end = irq, | ||
22 | .flags = IORESOURCE_IRQ, | ||
23 | }, { | ||
24 | .start = irq_err, | ||
25 | .end = irq_err, | ||
26 | .flags = IORESOURCE_IRQ, | ||
27 | }, | ||
28 | }; | ||
29 | |||
13 | return platform_device_register_resndata(&mxc_ahb_bus, | 30 | return platform_device_register_resndata(&mxc_ahb_bus, |
14 | "imx-dma", -1, NULL, 0, NULL, 0); | 31 | name, -1, res, ARRAY_SIZE(res), NULL, 0); |
15 | } | 32 | } |
16 | 33 | ||
17 | struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name, | 34 | struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name, |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/mach-imx/devices/platform-imx-fb.c index 2b0b5e0aa998..10b0ed39f07f 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-fb.c +++ b/arch/arm/mach-imx/devices/platform-imx-fb.c | |||
@@ -7,11 +7,13 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/dma-mapping.h> | 9 | #include <linux/dma-mapping.h> |
10 | #include <mach/hardware.h> | ||
11 | #include <mach/devices-common.h> | ||
12 | 10 | ||
13 | #define imx_imx_fb_data_entry_single(soc, _size) \ | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
13 | |||
14 | #define imx_imx_fb_data_entry_single(soc, _devid, _size) \ | ||
14 | { \ | 15 | { \ |
16 | .devid = _devid, \ | ||
15 | .iobase = soc ## _LCDC_BASE_ADDR, \ | 17 | .iobase = soc ## _LCDC_BASE_ADDR, \ |
16 | .iosize = _size, \ | 18 | .iosize = _size, \ |
17 | .irq = soc ## _INT_LCDC, \ | 19 | .irq = soc ## _INT_LCDC, \ |
@@ -19,22 +21,22 @@ | |||
19 | 21 | ||
20 | #ifdef CONFIG_SOC_IMX1 | 22 | #ifdef CONFIG_SOC_IMX1 |
21 | const struct imx_imx_fb_data imx1_imx_fb_data __initconst = | 23 | const struct imx_imx_fb_data imx1_imx_fb_data __initconst = |
22 | imx_imx_fb_data_entry_single(MX1, SZ_4K); | 24 | imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K); |
23 | #endif /* ifdef CONFIG_SOC_IMX1 */ | 25 | #endif /* ifdef CONFIG_SOC_IMX1 */ |
24 | 26 | ||
25 | #ifdef CONFIG_SOC_IMX21 | 27 | #ifdef CONFIG_SOC_IMX21 |
26 | const struct imx_imx_fb_data imx21_imx_fb_data __initconst = | 28 | const struct imx_imx_fb_data imx21_imx_fb_data __initconst = |
27 | imx_imx_fb_data_entry_single(MX21, SZ_4K); | 29 | imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K); |
28 | #endif /* ifdef CONFIG_SOC_IMX21 */ | 30 | #endif /* ifdef CONFIG_SOC_IMX21 */ |
29 | 31 | ||
30 | #ifdef CONFIG_SOC_IMX25 | 32 | #ifdef CONFIG_SOC_IMX25 |
31 | const struct imx_imx_fb_data imx25_imx_fb_data __initconst = | 33 | const struct imx_imx_fb_data imx25_imx_fb_data __initconst = |
32 | imx_imx_fb_data_entry_single(MX25, SZ_16K); | 34 | imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K); |
33 | #endif /* ifdef CONFIG_SOC_IMX25 */ | 35 | #endif /* ifdef CONFIG_SOC_IMX25 */ |
34 | 36 | ||
35 | #ifdef CONFIG_SOC_IMX27 | 37 | #ifdef CONFIG_SOC_IMX27 |
36 | const struct imx_imx_fb_data imx27_imx_fb_data __initconst = | 38 | const struct imx_imx_fb_data imx27_imx_fb_data __initconst = |
37 | imx_imx_fb_data_entry_single(MX27, SZ_4K); | 39 | imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K); |
38 | #endif /* ifdef CONFIG_SOC_IMX27 */ | 40 | #endif /* ifdef CONFIG_SOC_IMX27 */ |
39 | 41 | ||
40 | struct platform_device *__init imx_add_imx_fb( | 42 | struct platform_device *__init imx_add_imx_fb( |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c index 19ad580c0be3..8e30e5703cd2 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c | |||
@@ -6,34 +6,35 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \ | 12 | #define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ |
13 | { \ | 13 | { \ |
14 | .devid = _devid, \ | ||
14 | .id = _id, \ | 15 | .id = _id, \ |
15 | .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ | 16 | .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ |
16 | .iosize = _size, \ | 17 | .iosize = _size, \ |
17 | .irq = soc ## _INT_I2C ## _hwid, \ | 18 | .irq = soc ## _INT_I2C ## _hwid, \ |
18 | } | 19 | } |
19 | 20 | ||
20 | #define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \ | 21 | #define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ |
21 | [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) | 22 | [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) |
22 | 23 | ||
23 | #ifdef CONFIG_SOC_IMX1 | 24 | #ifdef CONFIG_SOC_IMX1 |
24 | const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = | 25 | const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = |
25 | imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K); | 26 | imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K); |
26 | #endif /* ifdef CONFIG_SOC_IMX1 */ | 27 | #endif /* ifdef CONFIG_SOC_IMX1 */ |
27 | 28 | ||
28 | #ifdef CONFIG_SOC_IMX21 | 29 | #ifdef CONFIG_SOC_IMX21 |
29 | const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = | 30 | const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = |
30 | imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K); | 31 | imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K); |
31 | #endif /* ifdef CONFIG_SOC_IMX21 */ | 32 | #endif /* ifdef CONFIG_SOC_IMX21 */ |
32 | 33 | ||
33 | #ifdef CONFIG_SOC_IMX25 | 34 | #ifdef CONFIG_SOC_IMX25 |
34 | const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { | 35 | const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { |
35 | #define imx25_imx_i2c_data_entry(_id, _hwid) \ | 36 | #define imx25_imx_i2c_data_entry(_id, _hwid) \ |
36 | imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K) | 37 | imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K) |
37 | imx25_imx_i2c_data_entry(0, 1), | 38 | imx25_imx_i2c_data_entry(0, 1), |
38 | imx25_imx_i2c_data_entry(1, 2), | 39 | imx25_imx_i2c_data_entry(1, 2), |
39 | imx25_imx_i2c_data_entry(2, 3), | 40 | imx25_imx_i2c_data_entry(2, 3), |
@@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { | |||
43 | #ifdef CONFIG_SOC_IMX27 | 44 | #ifdef CONFIG_SOC_IMX27 |
44 | const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { | 45 | const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { |
45 | #define imx27_imx_i2c_data_entry(_id, _hwid) \ | 46 | #define imx27_imx_i2c_data_entry(_id, _hwid) \ |
46 | imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K) | 47 | imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K) |
47 | imx27_imx_i2c_data_entry(0, 1), | 48 | imx27_imx_i2c_data_entry(0, 1), |
48 | imx27_imx_i2c_data_entry(1, 2), | 49 | imx27_imx_i2c_data_entry(1, 2), |
49 | }; | 50 | }; |
@@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { | |||
52 | #ifdef CONFIG_SOC_IMX31 | 53 | #ifdef CONFIG_SOC_IMX31 |
53 | const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { | 54 | const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { |
54 | #define imx31_imx_i2c_data_entry(_id, _hwid) \ | 55 | #define imx31_imx_i2c_data_entry(_id, _hwid) \ |
55 | imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K) | 56 | imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K) |
56 | imx31_imx_i2c_data_entry(0, 1), | 57 | imx31_imx_i2c_data_entry(0, 1), |
57 | imx31_imx_i2c_data_entry(1, 2), | 58 | imx31_imx_i2c_data_entry(1, 2), |
58 | imx31_imx_i2c_data_entry(2, 3), | 59 | imx31_imx_i2c_data_entry(2, 3), |
@@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { | |||
62 | #ifdef CONFIG_SOC_IMX35 | 63 | #ifdef CONFIG_SOC_IMX35 |
63 | const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { | 64 | const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { |
64 | #define imx35_imx_i2c_data_entry(_id, _hwid) \ | 65 | #define imx35_imx_i2c_data_entry(_id, _hwid) \ |
65 | imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K) | 66 | imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K) |
66 | imx35_imx_i2c_data_entry(0, 1), | 67 | imx35_imx_i2c_data_entry(0, 1), |
67 | imx35_imx_i2c_data_entry(1, 2), | 68 | imx35_imx_i2c_data_entry(1, 2), |
68 | imx35_imx_i2c_data_entry(2, 3), | 69 | imx35_imx_i2c_data_entry(2, 3), |
@@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { | |||
72 | #ifdef CONFIG_SOC_IMX50 | 73 | #ifdef CONFIG_SOC_IMX50 |
73 | const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { | 74 | const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { |
74 | #define imx50_imx_i2c_data_entry(_id, _hwid) \ | 75 | #define imx50_imx_i2c_data_entry(_id, _hwid) \ |
75 | imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K) | 76 | imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K) |
76 | imx50_imx_i2c_data_entry(0, 1), | 77 | imx50_imx_i2c_data_entry(0, 1), |
77 | imx50_imx_i2c_data_entry(1, 2), | 78 | imx50_imx_i2c_data_entry(1, 2), |
78 | imx50_imx_i2c_data_entry(2, 3), | 79 | imx50_imx_i2c_data_entry(2, 3), |
@@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { | |||
82 | #ifdef CONFIG_SOC_IMX51 | 83 | #ifdef CONFIG_SOC_IMX51 |
83 | const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { | 84 | const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { |
84 | #define imx51_imx_i2c_data_entry(_id, _hwid) \ | 85 | #define imx51_imx_i2c_data_entry(_id, _hwid) \ |
85 | imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K) | 86 | imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K) |
86 | imx51_imx_i2c_data_entry(0, 1), | 87 | imx51_imx_i2c_data_entry(0, 1), |
87 | imx51_imx_i2c_data_entry(1, 2), | 88 | imx51_imx_i2c_data_entry(1, 2), |
88 | { | 89 | { |
90 | .devid = "imx21-i2c", | ||
89 | .id = 2, | 91 | .id = 2, |
90 | .iobase = MX51_HSI2C_DMA_BASE_ADDR, | 92 | .iobase = MX51_HSI2C_DMA_BASE_ADDR, |
91 | .iosize = SZ_16K, | 93 | .iosize = SZ_16K, |
@@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { | |||
97 | #ifdef CONFIG_SOC_IMX53 | 99 | #ifdef CONFIG_SOC_IMX53 |
98 | const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { | 100 | const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { |
99 | #define imx53_imx_i2c_data_entry(_id, _hwid) \ | 101 | #define imx53_imx_i2c_data_entry(_id, _hwid) \ |
100 | imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) | 102 | imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K) |
101 | imx53_imx_i2c_data_entry(0, 1), | 103 | imx53_imx_i2c_data_entry(0, 1), |
102 | imx53_imx_i2c_data_entry(1, 2), | 104 | imx53_imx_i2c_data_entry(1, 2), |
103 | imx53_imx_i2c_data_entry(2, 3), | 105 | imx53_imx_i2c_data_entry(2, 3), |
@@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c( | |||
120 | }, | 122 | }, |
121 | }; | 123 | }; |
122 | 124 | ||
123 | return imx_add_platform_device("imx-i2c", data->id, | 125 | return imx_add_platform_device(data->devid, data->id, |
124 | res, ARRAY_SIZE(res), | 126 | res, ARRAY_SIZE(res), |
125 | pdata, sizeof(*pdata)); | 127 | pdata, sizeof(*pdata)); |
126 | } | 128 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/mach-imx/devices/platform-imx-keypad.c index 479c3e9f771f..8f22a4c98a4c 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/mach-imx/devices/platform-imx-keypad.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_imx_keypad_data_entry_single(soc, _size) \ | 12 | #define imx_imx_keypad_data_entry_single(soc, _size) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/mach-imx/devices/platform-imx-ssi.c index 21c6f30e1017..bfcb8f3dfa8d 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/mach-imx/devices/platform-imx-ssi.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ | 12 | #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ |
13 | [_id] = { \ | 13 | [_id] = { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/mach-imx/devices/platform-imx-uart.c index d390f00bd294..67bf866a2cb6 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/mach-imx/devices/platform-imx-uart.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ | 12 | #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ |
13 | [_id] = { \ | 13 | [_id] = { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/mach-imx/devices/platform-imx2-wdt.c index 5e07ef2bf1c4..ec75d6413686 100644 --- a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c +++ b/arch/arm/mach-imx/devices/platform-imx2-wdt.c | |||
@@ -7,8 +7,9 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <asm/sizes.h> | 9 | #include <asm/sizes.h> |
10 | #include <mach/hardware.h> | 10 | |
11 | #include <mach/devices-common.h> | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
12 | 13 | ||
13 | #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ | 14 | #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ |
14 | { \ | 15 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/mach-imx/devices/platform-imx21-hcd.c index 5770a42f33bf..30c81616a9a1 100644 --- a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c +++ b/arch/arm/mach-imx/devices/platform-imx21-hcd.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_imx21_hcd_data_entry_single(soc) \ | 12 | #define imx_imx21_hcd_data_entry_single(soc) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/arch/arm/mach-imx/devices/platform-imx27-coda.c index 8b12aacdf396..25bebc29e546 100644 --- a/arch/arm/plat-mxc/devices/platform-imx27-coda.c +++ b/arch/arm/mach-imx/devices/platform-imx27-coda.c | |||
@@ -7,8 +7,8 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <mach/hardware.h> | 10 | #include "../hardware.h" |
11 | #include <mach/devices-common.h> | 11 | #include "devices-common.h" |
12 | 12 | ||
13 | #ifdef CONFIG_SOC_IMX27 | 13 | #ifdef CONFIG_SOC_IMX27 |
14 | const struct imx_imx27_coda_data imx27_coda_data __initconst = { | 14 | const struct imx_imx27_coda_data imx27_coda_data __initconst = { |
diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/mach-imx/devices/platform-imx_udc.c index 6fd675dfce14..5ced7e4e2c71 100644 --- a/arch/arm/plat-mxc/devices/platform-imx_udc.c +++ b/arch/arm/mach-imx/devices/platform-imx_udc.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_imx_udc_data_entry_single(soc, _size) \ | 12 | #define imx_imx_udc_data_entry_single(soc, _size) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c index 805336fdc252..5bb490d556ea 100644 --- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c +++ b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c | |||
@@ -7,8 +7,9 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <asm/sizes.h> | 9 | #include <asm/sizes.h> |
10 | #include <mach/hardware.h> | 10 | |
11 | #include <mach/devices-common.h> | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
12 | 13 | ||
13 | #define imx_imxdi_rtc_data_entry_single(soc) \ | 14 | #define imx_imxdi_rtc_data_entry_single(soc) \ |
14 | { \ | 15 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c index d1e33cc6f12e..fc4dd7cedc11 100644 --- a/arch/arm/plat-mxc/devices/platform-ipu-core.c +++ b/arch/arm/mach-imx/devices/platform-ipu-core.c | |||
@@ -7,8 +7,9 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/dma-mapping.h> | 9 | #include <linux/dma-mapping.h> |
10 | #include <mach/hardware.h> | 10 | |
11 | #include <mach/devices-common.h> | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
12 | 13 | ||
13 | #define imx_ipu_core_entry_single(soc) \ | 14 | #define imx_ipu_core_entry_single(soc) \ |
14 | { \ | 15 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/mach-imx/devices/platform-mx1-camera.c index edcc581a30a9..2c6788131080 100644 --- a/arch/arm/plat-mxc/devices/platform-mx1-camera.c +++ b/arch/arm/mach-imx/devices/platform-mx1-camera.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_mx1_camera_data_entry_single(soc, _size) \ | 12 | #define imx_mx1_camera_data_entry_single(soc, _size) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/mach-imx/devices/platform-mx2-camera.c index 11eace953a09..f4910160346b 100644 --- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c +++ b/arch/arm/mach-imx/devices/platform-mx2-camera.c | |||
@@ -6,17 +6,19 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_mx2_camera_data_entry_single(soc) \ | 12 | #define imx_mx2_camera_data_entry_single(soc, _devid) \ |
13 | { \ | 13 | { \ |
14 | .devid = _devid, \ | ||
14 | .iobasecsi = soc ## _CSI_BASE_ADDR, \ | 15 | .iobasecsi = soc ## _CSI_BASE_ADDR, \ |
15 | .iosizecsi = SZ_4K, \ | 16 | .iosizecsi = SZ_4K, \ |
16 | .irqcsi = soc ## _INT_CSI, \ | 17 | .irqcsi = soc ## _INT_CSI, \ |
17 | } | 18 | } |
18 | #define imx_mx2_camera_data_entry_single_emma(soc) \ | 19 | #define imx_mx2_camera_data_entry_single_emma(soc, _devid) \ |
19 | { \ | 20 | { \ |
21 | .devid = _devid, \ | ||
20 | .iobasecsi = soc ## _CSI_BASE_ADDR, \ | 22 | .iobasecsi = soc ## _CSI_BASE_ADDR, \ |
21 | .iosizecsi = SZ_32, \ | 23 | .iosizecsi = SZ_32, \ |
22 | .irqcsi = soc ## _INT_CSI, \ | 24 | .irqcsi = soc ## _INT_CSI, \ |
@@ -27,12 +29,12 @@ | |||
27 | 29 | ||
28 | #ifdef CONFIG_SOC_IMX25 | 30 | #ifdef CONFIG_SOC_IMX25 |
29 | const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst = | 31 | const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst = |
30 | imx_mx2_camera_data_entry_single(MX25); | 32 | imx_mx2_camera_data_entry_single(MX25, "imx25-camera"); |
31 | #endif /* ifdef CONFIG_SOC_IMX25 */ | 33 | #endif /* ifdef CONFIG_SOC_IMX25 */ |
32 | 34 | ||
33 | #ifdef CONFIG_SOC_IMX27 | 35 | #ifdef CONFIG_SOC_IMX27 |
34 | const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = | 36 | const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = |
35 | imx_mx2_camera_data_entry_single_emma(MX27); | 37 | imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera"); |
36 | #endif /* ifdef CONFIG_SOC_IMX27 */ | 38 | #endif /* ifdef CONFIG_SOC_IMX27 */ |
37 | 39 | ||
38 | struct platform_device *__init imx_add_mx2_camera( | 40 | struct platform_device *__init imx_add_mx2_camera( |
@@ -58,7 +60,7 @@ struct platform_device *__init imx_add_mx2_camera( | |||
58 | .flags = IORESOURCE_IRQ, | 60 | .flags = IORESOURCE_IRQ, |
59 | }, | 61 | }, |
60 | }; | 62 | }; |
61 | return imx_add_platform_device_dmamask("mx2-camera", 0, | 63 | return imx_add_platform_device_dmamask(data->devid, 0, |
62 | res, data->iobaseemmaprp ? 4 : 2, | 64 | res, data->iobaseemmaprp ? 4 : 2, |
63 | pdata, sizeof(*pdata), DMA_BIT_MASK(32)); | 65 | pdata, sizeof(*pdata), DMA_BIT_MASK(32)); |
64 | } | 66 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/mach-imx/devices/platform-mxc-ehci.c index 35851d889aca..5d4bbbfde641 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c +++ b/arch/arm/mach-imx/devices/platform-mxc-ehci.c | |||
@@ -7,8 +7,9 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/dma-mapping.h> | 9 | #include <linux/dma-mapping.h> |
10 | #include <mach/hardware.h> | 10 | |
11 | #include <mach/devices-common.h> | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
12 | 13 | ||
13 | #define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ | 14 | #define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ |
14 | { \ | 15 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/mach-imx/devices/platform-mxc-mmc.c index e7b920b58675..b8203c760c8f 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c +++ b/arch/arm/mach-imx/devices/platform-mxc-mmc.c | |||
@@ -7,24 +7,26 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/dma-mapping.h> | 9 | #include <linux/dma-mapping.h> |
10 | #include <mach/hardware.h> | ||
11 | #include <mach/devices-common.h> | ||
12 | 10 | ||
13 | #define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \ | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
13 | |||
14 | #define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ | ||
14 | { \ | 15 | { \ |
16 | .devid = _devid, \ | ||
15 | .id = _id, \ | 17 | .id = _id, \ |
16 | .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ | 18 | .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ |
17 | .iosize = _size, \ | 19 | .iosize = _size, \ |
18 | .irq = soc ## _INT_SDHC ## _hwid, \ | 20 | .irq = soc ## _INT_SDHC ## _hwid, \ |
19 | .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ | 21 | .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ |
20 | } | 22 | } |
21 | #define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \ | 23 | #define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ |
22 | [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) | 24 | [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) |
23 | 25 | ||
24 | #ifdef CONFIG_SOC_IMX21 | 26 | #ifdef CONFIG_SOC_IMX21 |
25 | const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { | 27 | const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { |
26 | #define imx21_mxc_mmc_data_entry(_id, _hwid) \ | 28 | #define imx21_mxc_mmc_data_entry(_id, _hwid) \ |
27 | imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K) | 29 | imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K) |
28 | imx21_mxc_mmc_data_entry(0, 1), | 30 | imx21_mxc_mmc_data_entry(0, 1), |
29 | imx21_mxc_mmc_data_entry(1, 2), | 31 | imx21_mxc_mmc_data_entry(1, 2), |
30 | }; | 32 | }; |
@@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { | |||
33 | #ifdef CONFIG_SOC_IMX27 | 35 | #ifdef CONFIG_SOC_IMX27 |
34 | const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { | 36 | const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { |
35 | #define imx27_mxc_mmc_data_entry(_id, _hwid) \ | 37 | #define imx27_mxc_mmc_data_entry(_id, _hwid) \ |
36 | imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K) | 38 | imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K) |
37 | imx27_mxc_mmc_data_entry(0, 1), | 39 | imx27_mxc_mmc_data_entry(0, 1), |
38 | imx27_mxc_mmc_data_entry(1, 2), | 40 | imx27_mxc_mmc_data_entry(1, 2), |
39 | }; | 41 | }; |
@@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { | |||
42 | #ifdef CONFIG_SOC_IMX31 | 44 | #ifdef CONFIG_SOC_IMX31 |
43 | const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = { | 45 | const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = { |
44 | #define imx31_mxc_mmc_data_entry(_id, _hwid) \ | 46 | #define imx31_mxc_mmc_data_entry(_id, _hwid) \ |
45 | imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K) | 47 | imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K) |
46 | imx31_mxc_mmc_data_entry(0, 1), | 48 | imx31_mxc_mmc_data_entry(0, 1), |
47 | imx31_mxc_mmc_data_entry(1, 2), | 49 | imx31_mxc_mmc_data_entry(1, 2), |
48 | }; | 50 | }; |
@@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc( | |||
67 | .flags = IORESOURCE_DMA, | 69 | .flags = IORESOURCE_DMA, |
68 | }, | 70 | }, |
69 | }; | 71 | }; |
70 | return imx_add_platform_device_dmamask("mxc-mmc", data->id, | 72 | return imx_add_platform_device_dmamask(data->devid, data->id, |
71 | res, ARRAY_SIZE(res), | 73 | res, ARRAY_SIZE(res), |
72 | pdata, sizeof(*pdata), DMA_BIT_MASK(32)); | 74 | pdata, sizeof(*pdata), DMA_BIT_MASK(32)); |
73 | } | 75 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/mach-imx/devices/platform-mxc_nand.c index 95b75cc70515..7af1c53e42b5 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c +++ b/arch/arm/mach-imx/devices/platform-mxc_nand.c | |||
@@ -7,18 +7,21 @@ | |||
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <asm/sizes.h> | 9 | #include <asm/sizes.h> |
10 | #include <mach/hardware.h> | ||
11 | #include <mach/devices-common.h> | ||
12 | 10 | ||
13 | #define imx_mxc_nand_data_entry_single(soc, _size) \ | 11 | #include "../hardware.h" |
12 | #include "devices-common.h" | ||
13 | |||
14 | #define imx_mxc_nand_data_entry_single(soc, _devid, _size) \ | ||
14 | { \ | 15 | { \ |
16 | .devid = _devid, \ | ||
15 | .iobase = soc ## _NFC_BASE_ADDR, \ | 17 | .iobase = soc ## _NFC_BASE_ADDR, \ |
16 | .iosize = _size, \ | 18 | .iosize = _size, \ |
17 | .irq = soc ## _INT_NFC \ | 19 | .irq = soc ## _INT_NFC \ |
18 | } | 20 | } |
19 | 21 | ||
20 | #define imx_mxc_nandv3_data_entry_single(soc, _size) \ | 22 | #define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \ |
21 | { \ | 23 | { \ |
24 | .devid = _devid, \ | ||
22 | .id = -1, \ | 25 | .id = -1, \ |
23 | .iobase = soc ## _NFC_BASE_ADDR, \ | 26 | .iobase = soc ## _NFC_BASE_ADDR, \ |
24 | .iosize = _size, \ | 27 | .iosize = _size, \ |
@@ -28,32 +31,32 @@ | |||
28 | 31 | ||
29 | #ifdef CONFIG_SOC_IMX21 | 32 | #ifdef CONFIG_SOC_IMX21 |
30 | const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = | 33 | const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = |
31 | imx_mxc_nand_data_entry_single(MX21, SZ_4K); | 34 | imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K); |
32 | #endif /* ifdef CONFIG_SOC_IMX21 */ | 35 | #endif /* ifdef CONFIG_SOC_IMX21 */ |
33 | 36 | ||
34 | #ifdef CONFIG_SOC_IMX25 | 37 | #ifdef CONFIG_SOC_IMX25 |
35 | const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = | 38 | const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = |
36 | imx_mxc_nand_data_entry_single(MX25, SZ_8K); | 39 | imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K); |
37 | #endif /* ifdef CONFIG_SOC_IMX25 */ | 40 | #endif /* ifdef CONFIG_SOC_IMX25 */ |
38 | 41 | ||
39 | #ifdef CONFIG_SOC_IMX27 | 42 | #ifdef CONFIG_SOC_IMX27 |
40 | const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = | 43 | const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = |
41 | imx_mxc_nand_data_entry_single(MX27, SZ_4K); | 44 | imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K); |
42 | #endif /* ifdef CONFIG_SOC_IMX27 */ | 45 | #endif /* ifdef CONFIG_SOC_IMX27 */ |
43 | 46 | ||
44 | #ifdef CONFIG_SOC_IMX31 | 47 | #ifdef CONFIG_SOC_IMX31 |
45 | const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = | 48 | const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = |
46 | imx_mxc_nand_data_entry_single(MX31, SZ_4K); | 49 | imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K); |
47 | #endif | 50 | #endif |
48 | 51 | ||
49 | #ifdef CONFIG_SOC_IMX35 | 52 | #ifdef CONFIG_SOC_IMX35 |
50 | const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = | 53 | const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = |
51 | imx_mxc_nand_data_entry_single(MX35, SZ_8K); | 54 | imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K); |
52 | #endif | 55 | #endif |
53 | 56 | ||
54 | #ifdef CONFIG_SOC_IMX51 | 57 | #ifdef CONFIG_SOC_IMX51 |
55 | const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst = | 58 | const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst = |
56 | imx_mxc_nandv3_data_entry_single(MX51, SZ_16K); | 59 | imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K); |
57 | #endif | 60 | #endif |
58 | 61 | ||
59 | struct platform_device *__init imx_add_mxc_nand( | 62 | struct platform_device *__init imx_add_mxc_nand( |
@@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand( | |||
76 | .flags = IORESOURCE_MEM, | 79 | .flags = IORESOURCE_MEM, |
77 | }, | 80 | }, |
78 | }; | 81 | }; |
79 | return imx_add_platform_device("mxc_nand", data->id, | 82 | return imx_add_platform_device(data->devid, data->id, |
80 | res, ARRAY_SIZE(res) - !data->axibase, | 83 | res, ARRAY_SIZE(res) - !data->axibase, |
81 | pdata, sizeof(*pdata)); | 84 | pdata, sizeof(*pdata)); |
82 | } | 85 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/mach-imx/devices/platform-mxc_pwm.c index b0c4ae298111..dcd289777687 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c +++ b/arch/arm/mach-imx/devices/platform-mxc_pwm.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \ | 12 | #define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/mach-imx/devices/platform-mxc_rnga.c index b4b7612b6e17..c58404badb59 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c +++ b/arch/arm/mach-imx/devices/platform-mxc_rnga.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | struct imx_mxc_rnga_data { | 12 | struct imx_mxc_rnga_data { |
13 | resource_size_t iobase; | 13 | resource_size_t iobase; |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/arch/arm/mach-imx/devices/platform-mxc_rtc.c index a5c9ad5721c2..c7fffaadf847 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c +++ b/arch/arm/mach-imx/devices/platform-mxc_rtc.c | |||
@@ -6,23 +6,24 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_mxc_rtc_data_entry_single(soc) \ | 12 | #define imx_mxc_rtc_data_entry_single(soc, _devid) \ |
13 | { \ | 13 | { \ |
14 | .devid = _devid, \ | ||
14 | .iobase = soc ## _RTC_BASE_ADDR, \ | 15 | .iobase = soc ## _RTC_BASE_ADDR, \ |
15 | .irq = soc ## _INT_RTC, \ | 16 | .irq = soc ## _INT_RTC, \ |
16 | } | 17 | } |
17 | 18 | ||
18 | #ifdef CONFIG_SOC_IMX31 | 19 | #ifdef CONFIG_SOC_IMX31 |
19 | const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst = | 20 | const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst = |
20 | imx_mxc_rtc_data_entry_single(MX31); | 21 | imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc"); |
21 | #endif /* ifdef CONFIG_SOC_IMX31 */ | 22 | #endif /* ifdef CONFIG_SOC_IMX31 */ |
22 | 23 | ||
23 | #ifdef CONFIG_SOC_IMX35 | 24 | #ifdef CONFIG_SOC_IMX35 |
24 | const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst = | 25 | const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst = |
25 | imx_mxc_rtc_data_entry_single(MX35); | 26 | imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc"); |
26 | #endif /* ifdef CONFIG_SOC_IMX35 */ | 27 | #endif /* ifdef CONFIG_SOC_IMX35 */ |
27 | 28 | ||
28 | struct platform_device *__init imx_add_mxc_rtc( | 29 | struct platform_device *__init imx_add_mxc_rtc( |
@@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc( | |||
40 | }, | 41 | }, |
41 | }; | 42 | }; |
42 | 43 | ||
43 | return imx_add_platform_device("mxc_rtc", -1, | 44 | return imx_add_platform_device(data->devid, -1, |
44 | res, ARRAY_SIZE(res), NULL, 0); | 45 | res, ARRAY_SIZE(res), NULL, 0); |
45 | } | 46 | } |
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/mach-imx/devices/platform-mxc_w1.c index 96fa5ea91fe8..88c18b720d63 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_w1.c +++ b/arch/arm/mach-imx/devices/platform-mxc_w1.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_mxc_w1_data_entry_single(soc) \ | 12 | #define imx_mxc_w1_data_entry_single(soc) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-pata_imx.c b/arch/arm/mach-imx/devices/platform-pata_imx.c index 70e2f2a44714..e4ec11c8ce55 100644 --- a/arch/arm/plat-mxc/devices/platform-pata_imx.c +++ b/arch/arm/mach-imx/devices/platform-pata_imx.c | |||
@@ -3,8 +3,8 @@ | |||
3 | * the terms of the GNU General Public License version 2 as published by the | 3 | * the terms of the GNU General Public License version 2 as published by the |
4 | * Free Software Foundation. | 4 | * Free Software Foundation. |
5 | */ | 5 | */ |
6 | #include <mach/hardware.h> | 6 | #include "../hardware.h" |
7 | #include <mach/devices-common.h> | 7 | #include "devices-common.h" |
8 | 8 | ||
9 | #define imx_pata_imx_data_entry_single(soc, _size) \ | 9 | #define imx_pata_imx_data_entry_single(soc, _size) \ |
10 | { \ | 10 | { \ |
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c index 3793e475cd95..e66a4e316311 100644 --- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c +++ b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c | |||
@@ -6,10 +6,11 @@ | |||
6 | * Free Software Foundation. | 6 | * Free Software Foundation. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <mach/hardware.h> | ||
10 | #include <mach/devices-common.h> | ||
11 | #include <linux/platform_data/mmc-esdhc-imx.h> | 9 | #include <linux/platform_data/mmc-esdhc-imx.h> |
12 | 10 | ||
11 | #include "../hardware.h" | ||
12 | #include "devices-common.h" | ||
13 | |||
13 | #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ | 14 | #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ |
14 | { \ | 15 | { \ |
15 | .devid = _devid, \ | 16 | .devid = _devid, \ |
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/mach-imx/devices/platform-spi_imx.c index 9c50c14c8f92..8880bcb11e05 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/mach-imx/devices/platform-spi_imx.c | |||
@@ -6,8 +6,8 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <mach/hardware.h> | 9 | #include "../hardware.h" |
10 | #include <mach/devices-common.h> | 10 | #include "devices-common.h" |
11 | 11 | ||
12 | #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ | 12 | #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ |
13 | { \ | 13 | { \ |
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c index 576af7446952..134c190e3003 100644 --- a/arch/arm/mach-imx/ehci-imx25.c +++ b/arch/arm/mach-imx/ehci-imx25.c | |||
@@ -15,10 +15,10 @@ | |||
15 | 15 | ||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | |||
19 | #include <mach/hardware.h> | ||
20 | #include <linux/platform_data/usb-ehci-mxc.h> | 18 | #include <linux/platform_data/usb-ehci-mxc.h> |
21 | 19 | ||
20 | #include "hardware.h" | ||
21 | |||
22 | #define USBCTRL_OTGBASE_OFFSET 0x600 | 22 | #define USBCTRL_OTGBASE_OFFSET 0x600 |
23 | 23 | ||
24 | #define MX25_OTG_SIC_SHIFT 29 | 24 | #define MX25_OTG_SIC_SHIFT 29 |
diff --git a/arch/arm/mach-imx/ehci-imx27.c b/arch/arm/mach-imx/ehci-imx27.c index cd6e1f81508d..448d9115539d 100644 --- a/arch/arm/mach-imx/ehci-imx27.c +++ b/arch/arm/mach-imx/ehci-imx27.c | |||
@@ -15,10 +15,10 @@ | |||
15 | 15 | ||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | |||
19 | #include <mach/hardware.h> | ||
20 | #include <linux/platform_data/usb-ehci-mxc.h> | 18 | #include <linux/platform_data/usb-ehci-mxc.h> |
21 | 19 | ||
20 | #include "hardware.h" | ||
21 | |||
22 | #define USBCTRL_OTGBASE_OFFSET 0x600 | 22 | #define USBCTRL_OTGBASE_OFFSET 0x600 |
23 | 23 | ||
24 | #define MX27_OTG_SIC_SHIFT 29 | 24 | #define MX27_OTG_SIC_SHIFT 29 |
diff --git a/arch/arm/mach-imx/ehci-imx31.c b/arch/arm/mach-imx/ehci-imx31.c index 9a880c78af34..05de4e1e39d7 100644 --- a/arch/arm/mach-imx/ehci-imx31.c +++ b/arch/arm/mach-imx/ehci-imx31.c | |||
@@ -15,10 +15,10 @@ | |||
15 | 15 | ||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | |||
19 | #include <mach/hardware.h> | ||
20 | #include <linux/platform_data/usb-ehci-mxc.h> | 18 | #include <linux/platform_data/usb-ehci-mxc.h> |
21 | 19 | ||
20 | #include "hardware.h" | ||
21 | |||
22 | #define USBCTRL_OTGBASE_OFFSET 0x600 | 22 | #define USBCTRL_OTGBASE_OFFSET 0x600 |
23 | 23 | ||
24 | #define MX31_OTG_SIC_SHIFT 29 | 24 | #define MX31_OTG_SIC_SHIFT 29 |
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c index 293397852e4e..554e7cccff53 100644 --- a/arch/arm/mach-imx/ehci-imx35.c +++ b/arch/arm/mach-imx/ehci-imx35.c | |||
@@ -15,10 +15,10 @@ | |||
15 | 15 | ||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | |||
19 | #include <mach/hardware.h> | ||
20 | #include <linux/platform_data/usb-ehci-mxc.h> | 18 | #include <linux/platform_data/usb-ehci-mxc.h> |
21 | 19 | ||
20 | #include "hardware.h" | ||
21 | |||
22 | #define USBCTRL_OTGBASE_OFFSET 0x600 | 22 | #define USBCTRL_OTGBASE_OFFSET 0x600 |
23 | 23 | ||
24 | #define MX35_OTG_SIC_SHIFT 29 | 24 | #define MX35_OTG_SIC_SHIFT 29 |
diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c index cf8d00e5cce1..e49710b10c68 100644 --- a/arch/arm/mach-imx/ehci-imx5.c +++ b/arch/arm/mach-imx/ehci-imx5.c | |||
@@ -15,10 +15,10 @@ | |||
15 | 15 | ||
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | |||
19 | #include <mach/hardware.h> | ||
20 | #include <linux/platform_data/usb-ehci-mxc.h> | 18 | #include <linux/platform_data/usb-ehci-mxc.h> |
21 | 19 | ||
20 | #include "hardware.h" | ||
21 | |||
22 | #define MXC_OTG_OFFSET 0 | 22 | #define MXC_OTG_OFFSET 0 |
23 | #define MXC_H1_OFFSET 0x200 | 23 | #define MXC_H1_OFFSET 0x200 |
24 | #define MXC_H2_OFFSET 0x400 | 24 | #define MXC_H2_OFFSET 0x400 |
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/mach-imx/epit.c index 88726f4dbbfa..04a5961beeac 100644 --- a/arch/arm/plat-mxc/epit.c +++ b/arch/arm/mach-imx/epit.c | |||
@@ -51,10 +51,10 @@ | |||
51 | #include <linux/clockchips.h> | 51 | #include <linux/clockchips.h> |
52 | #include <linux/clk.h> | 52 | #include <linux/clk.h> |
53 | #include <linux/err.h> | 53 | #include <linux/err.h> |
54 | |||
55 | #include <mach/hardware.h> | ||
56 | #include <asm/mach/time.h> | 54 | #include <asm/mach/time.h> |
57 | #include <mach/common.h> | 55 | |
56 | #include "common.h" | ||
57 | #include "hardware.h" | ||
58 | 58 | ||
59 | static struct clock_event_device clockevent_epit; | 59 | static struct clock_event_device clockevent_epit; |
60 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; | 60 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; |
diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h index a21d3313f994..a21d3313f994 100644 --- a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h +++ b/arch/arm/mach-imx/eukrea-baseboards.h | |||
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 98aef571b9f8..b4c70028d359 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | |||
@@ -29,11 +29,10 @@ | |||
29 | 29 | ||
30 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
31 | 31 | ||
32 | #include <mach/common.h> | 32 | #include "common.h" |
33 | #include <mach/iomux-mx27.h> | ||
34 | #include <mach/hardware.h> | ||
35 | |||
36 | #include "devices-imx27.h" | 33 | #include "devices-imx27.h" |
34 | #include "hardware.h" | ||
35 | #include "iomux-mx27.h" | ||
37 | 36 | ||
38 | static const int eukrea_mbimx27_pins[] __initconst = { | 37 | static const int eukrea_mbimx27_pins[] __initconst = { |
39 | /* UART2 */ | 38 | /* UART2 */ |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 0b84666792f0..e2b70f4c1a2c 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | |||
@@ -26,14 +26,14 @@ | |||
26 | #include <linux/spi/spi.h> | 26 | #include <linux/spi/spi.h> |
27 | #include <video/platform_lcd.h> | 27 | #include <video/platform_lcd.h> |
28 | 28 | ||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/iomux-mx25.h> | ||
31 | #include <mach/common.h> | ||
32 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
34 | #include <mach/mx25.h> | ||
35 | 31 | ||
32 | #include "common.h" | ||
36 | #include "devices-imx25.h" | 33 | #include "devices-imx25.h" |
34 | #include "hardware.h" | ||
35 | #include "iomux-mx25.h" | ||
36 | #include "mx25.h" | ||
37 | 37 | ||
38 | static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { | 38 | static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { |
39 | /* LCD */ | 39 | /* LCD */ |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index c6532a007d46..5a2d5ef12dd5 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | |||
@@ -36,11 +36,10 @@ | |||
36 | #include <asm/mach/time.h> | 36 | #include <asm/mach/time.h> |
37 | #include <asm/mach/map.h> | 37 | #include <asm/mach/map.h> |
38 | 38 | ||
39 | #include <mach/hardware.h> | 39 | #include "common.h" |
40 | #include <mach/common.h> | ||
41 | #include <mach/iomux-mx35.h> | ||
42 | |||
43 | #include "devices-imx35.h" | 40 | #include "devices-imx35.h" |
41 | #include "hardware.h" | ||
42 | #include "iomux-mx35.h" | ||
44 | 43 | ||
45 | static const struct fb_videomode fb_modedb[] = { | 44 | static const struct fb_videomode fb_modedb[] = { |
46 | { | 45 | { |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c index 8b0de30d7a3f..9be6c1e69d68 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c | |||
@@ -36,11 +36,10 @@ | |||
36 | #include <asm/mach/time.h> | 36 | #include <asm/mach/time.h> |
37 | #include <asm/mach/map.h> | 37 | #include <asm/mach/map.h> |
38 | 38 | ||
39 | #include <mach/hardware.h> | 39 | #include "common.h" |
40 | #include <mach/common.h> | ||
41 | #include <mach/iomux-mx51.h> | ||
42 | |||
43 | #include "devices-imx51.h" | 40 | #include "devices-imx51.h" |
41 | #include "hardware.h" | ||
42 | #include "iomux-mx51.h" | ||
44 | 43 | ||
45 | static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = { | 44 | static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = { |
46 | /* LED */ | 45 | /* LED */ |
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/mach-imx/hardware.h index ebf10654bb42..3ce7fa3bd43f 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/mach-imx/hardware.h | |||
@@ -105,20 +105,20 @@ | |||
105 | 105 | ||
106 | #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) | 106 | #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) |
107 | 107 | ||
108 | #include <mach/mxc.h> | 108 | #include "mxc.h" |
109 | 109 | ||
110 | #include <mach/mx6q.h> | 110 | #include "mx6q.h" |
111 | #include <mach/mx50.h> | 111 | #include "mx50.h" |
112 | #include <mach/mx51.h> | 112 | #include "mx51.h" |
113 | #include <mach/mx53.h> | 113 | #include "mx53.h" |
114 | #include <mach/mx3x.h> | 114 | #include "mx3x.h" |
115 | #include <mach/mx31.h> | 115 | #include "mx31.h" |
116 | #include <mach/mx35.h> | 116 | #include "mx35.h" |
117 | #include <mach/mx2x.h> | 117 | #include "mx2x.h" |
118 | #include <mach/mx21.h> | 118 | #include "mx21.h" |
119 | #include <mach/mx27.h> | 119 | #include "mx27.h" |
120 | #include <mach/mx1.h> | 120 | #include "mx1.h" |
121 | #include <mach/mx25.h> | 121 | #include "mx25.h" |
122 | 122 | ||
123 | #define imx_map_entry(soc, name, _type) { \ | 123 | #define imx_map_entry(soc, name, _type) { \ |
124 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ | 124 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ |
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index b07b778dc9a8..3dec962b0770 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c | |||
@@ -13,7 +13,8 @@ | |||
13 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
14 | #include <asm/cacheflush.h> | 14 | #include <asm/cacheflush.h> |
15 | #include <asm/cp15.h> | 15 | #include <asm/cp15.h> |
16 | #include <mach/common.h> | 16 | |
17 | #include "common.h" | ||
17 | 18 | ||
18 | static inline void cpu_enter_lowpower(void) | 19 | static inline void cpu_enter_lowpower(void) |
19 | { | 20 | { |
diff --git a/arch/arm/plat-mxc/include/mach/iim.h b/arch/arm/mach-imx/iim.h index 315bffadafda..315bffadafda 100644 --- a/arch/arm/plat-mxc/include/mach/iim.h +++ b/arch/arm/mach-imx/iim.h | |||
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index e80d5235dac0..ebfae96543c4 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c | |||
@@ -14,21 +14,22 @@ | |||
14 | #include <linux/of_platform.h> | 14 | #include <linux/of_platform.h> |
15 | #include <asm/mach/arch.h> | 15 | #include <asm/mach/arch.h> |
16 | #include <asm/mach/time.h> | 16 | #include <asm/mach/time.h> |
17 | #include <mach/common.h> | 17 | |
18 | #include <mach/mx27.h> | 18 | #include "common.h" |
19 | #include "mx27.h" | ||
19 | 20 | ||
20 | static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = { | 21 | static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = { |
21 | OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL), | 22 | OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL), |
22 | OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL), | 23 | OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL), |
23 | OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL), | 24 | OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL), |
24 | OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL), | 25 | OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL), |
25 | OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL), | 26 | OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx21-i2c.0", NULL), |
26 | OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL), | 27 | OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx21-i2c.1", NULL), |
27 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL), | 28 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL), |
28 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL), | 29 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL), |
29 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL), | 30 | OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL), |
30 | OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL), | 31 | OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL), |
31 | OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL), | 32 | OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "imx27-nand.0", NULL), |
32 | { /* sentinel */ } | 33 | { /* sentinel */ } |
33 | }; | 34 | }; |
34 | 35 | ||
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c index a68ba207b2b7..af476de2570e 100644 --- a/arch/arm/mach-imx/imx31-dt.c +++ b/arch/arm/mach-imx/imx31-dt.c | |||
@@ -14,8 +14,9 @@ | |||
14 | #include <linux/of_platform.h> | 14 | #include <linux/of_platform.h> |
15 | #include <asm/mach/arch.h> | 15 | #include <asm/mach/arch.h> |
16 | #include <asm/mach/time.h> | 16 | #include <asm/mach/time.h> |
17 | #include <mach/common.h> | 17 | |
18 | #include <mach/mx31.h> | 18 | #include "common.h" |
19 | #include "mx31.h" | ||
19 | 20 | ||
20 | static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = { | 21 | static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = { |
21 | OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR, | 22 | OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR, |
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index f233b4bb2342..50742990a136 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c | |||
@@ -15,8 +15,9 @@ | |||
15 | #include <linux/of_platform.h> | 15 | #include <linux/of_platform.h> |
16 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/time.h> | 17 | #include <asm/mach/time.h> |
18 | #include <mach/common.h> | 18 | |
19 | #include <mach/mx51.h> | 19 | #include "common.h" |
20 | #include "mx51.h" | ||
20 | 21 | ||
21 | /* | 22 | /* |
22 | * Lookup table for attaching a specific name and platform_data pointer to | 23 | * Lookup table for attaching a specific name and platform_data pointer to |
@@ -36,8 +37,8 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = { | |||
36 | OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), | 37 | OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), |
37 | OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), | 38 | OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), |
38 | OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), | 39 | OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), |
39 | OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL), | 40 | OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL), |
40 | OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL), | 41 | OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL), |
41 | OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL), | 42 | OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL), |
42 | OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), | 43 | OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), |
43 | { /* sentinel */ } | 44 | { /* sentinel */ } |
diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h deleted file mode 100644 index df5f522da6b3..000000000000 --- a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __MACH_DMA_MX1_MX2_H__ | ||
2 | #define __MACH_DMA_MX1_MX2_H__ | ||
3 | /* | ||
4 | * Don't use this header in new code, it will go away when all users are | ||
5 | * converted to mach/dma-v1.h | ||
6 | */ | ||
7 | |||
8 | #include <mach/dma-v1.h> | ||
9 | |||
10 | #endif /* ifndef __MACH_DMA_MX1_MX2_H__ */ | ||
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c index 82bd4403b450..cabefbc5e7c1 100644 --- a/arch/arm/mach-imx/iomux-imx31.c +++ b/arch/arm/mach-imx/iomux-imx31.c | |||
@@ -22,8 +22,9 @@ | |||
22 | #include <linux/spinlock.h> | 22 | #include <linux/spinlock.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
25 | #include <mach/hardware.h> | 25 | |
26 | #include <mach/iomux-mx3.h> | 26 | #include "hardware.h" |
27 | #include "iomux-mx3.h" | ||
27 | 28 | ||
28 | /* | 29 | /* |
29 | * IOMUX register (base) addresses | 30 | * IOMUX register (base) addresses |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/mach-imx/iomux-mx1.h index 6b1507cf378e..95f4681d85d7 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h +++ b/arch/arm/mach-imx/iomux-mx1.h | |||
@@ -18,7 +18,7 @@ | |||
18 | #ifndef __MACH_IOMUX_MX1_H__ | 18 | #ifndef __MACH_IOMUX_MX1_H__ |
19 | #define __MACH_IOMUX_MX1_H__ | 19 | #define __MACH_IOMUX_MX1_H__ |
20 | 20 | ||
21 | #include <mach/iomux-v1.h> | 21 | #include "iomux-v1.h" |
22 | 22 | ||
23 | #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) | 23 | #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) |
24 | #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) | 24 | #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/mach-imx/iomux-mx21.h index 1495dfda7834..a70cffceb085 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h +++ b/arch/arm/mach-imx/iomux-mx21.h | |||
@@ -18,8 +18,8 @@ | |||
18 | #ifndef __MACH_IOMUX_MX21_H__ | 18 | #ifndef __MACH_IOMUX_MX21_H__ |
19 | #define __MACH_IOMUX_MX21_H__ | 19 | #define __MACH_IOMUX_MX21_H__ |
20 | 20 | ||
21 | #include <mach/iomux-mx2x.h> | 21 | #include "iomux-mx2x.h" |
22 | #include <mach/iomux-v1.h> | 22 | #include "iomux-v1.h" |
23 | 23 | ||
24 | /* Primary GPIO pin functions */ | 24 | /* Primary GPIO pin functions */ |
25 | 25 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/mach-imx/iomux-mx25.h index c61ec0fc10d4..be51e838375c 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h +++ b/arch/arm/mach-imx/iomux-mx25.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #ifndef __MACH_IOMUX_MX25_H__ | 19 | #ifndef __MACH_IOMUX_MX25_H__ |
20 | #define __MACH_IOMUX_MX25_H__ | 20 | #define __MACH_IOMUX_MX25_H__ |
21 | 21 | ||
22 | #include <mach/iomux-v3.h> | 22 | #include "iomux-v3.h" |
23 | 23 | ||
24 | /* | 24 | /* |
25 | * IOMUX/PAD Bit field definitions | 25 | * IOMUX/PAD Bit field definitions |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/mach-imx/iomux-mx27.h index d9f9a6e32d80..218e99e89e86 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h +++ b/arch/arm/mach-imx/iomux-mx27.h | |||
@@ -19,8 +19,8 @@ | |||
19 | #ifndef __MACH_IOMUX_MX27_H__ | 19 | #ifndef __MACH_IOMUX_MX27_H__ |
20 | #define __MACH_IOMUX_MX27_H__ | 20 | #define __MACH_IOMUX_MX27_H__ |
21 | 21 | ||
22 | #include <mach/iomux-mx2x.h> | 22 | #include "iomux-mx2x.h" |
23 | #include <mach/iomux-v1.h> | 23 | #include "iomux-v1.h" |
24 | 24 | ||
25 | /* Primary GPIO pin functions */ | 25 | /* Primary GPIO pin functions */ |
26 | 26 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/iomux-mx2x.h index 7a9b20abda09..7a9b20abda09 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h +++ b/arch/arm/mach-imx/iomux-mx2x.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h index f79f78a1c0ed..f79f78a1c0ed 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/mach-imx/iomux-mx3.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/mach-imx/iomux-mx35.h index 3117c18bbbd9..90bfa6b5be6a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h +++ b/arch/arm/mach-imx/iomux-mx35.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #ifndef __MACH_IOMUX_MX35_H__ | 19 | #ifndef __MACH_IOMUX_MX35_H__ |
20 | #define __MACH_IOMUX_MX35_H__ | 20 | #define __MACH_IOMUX_MX35_H__ |
21 | 21 | ||
22 | #include <mach/iomux-v3.h> | 22 | #include "iomux-v3.h" |
23 | 23 | ||
24 | /* | 24 | /* |
25 | * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode> | 25 | * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode> |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/mach-imx/iomux-mx50.h index 98e7fd0b9083..00f56e0e8009 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h +++ b/arch/arm/mach-imx/iomux-mx50.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #ifndef __MACH_IOMUX_MX50_H__ | 19 | #ifndef __MACH_IOMUX_MX50_H__ |
20 | #define __MACH_IOMUX_MX50_H__ | 20 | #define __MACH_IOMUX_MX50_H__ |
21 | 21 | ||
22 | #include <mach/iomux-v3.h> | 22 | #include "iomux-v3.h" |
23 | 23 | ||
24 | #define MX50_ELCDIF_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH) | 24 | #define MX50_ELCDIF_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH) |
25 | 25 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/mach-imx/iomux-mx51.h index 2623e7a2e190..75bbcc4aa2d2 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/mach-imx/iomux-mx51.h | |||
@@ -13,7 +13,7 @@ | |||
13 | #ifndef __MACH_IOMUX_MX51_H__ | 13 | #ifndef __MACH_IOMUX_MX51_H__ |
14 | #define __MACH_IOMUX_MX51_H__ | 14 | #define __MACH_IOMUX_MX51_H__ |
15 | 15 | ||
16 | #include <mach/iomux-v3.h> | 16 | #include "iomux-v3.h" |
17 | #define __NA_ 0x000 | 17 | #define __NA_ 0x000 |
18 | 18 | ||
19 | 19 | ||
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c index 1f73963bc13e..2b156d1d9e21 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/mach-imx/iomux-v1.c | |||
@@ -28,9 +28,10 @@ | |||
28 | #include <linux/string.h> | 28 | #include <linux/string.h> |
29 | #include <linux/gpio.h> | 29 | #include <linux/gpio.h> |
30 | 30 | ||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
33 | #include <mach/iomux-v1.h> | 32 | |
33 | #include "hardware.h" | ||
34 | #include "iomux-v1.h" | ||
34 | 35 | ||
35 | static void __iomem *imx_iomuxv1_baseaddr; | 36 | static void __iomem *imx_iomuxv1_baseaddr; |
36 | static unsigned imx_iomuxv1_numports; | 37 | static unsigned imx_iomuxv1_numports; |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/mach-imx/iomux-v1.h index 02651a40fe23..02651a40fe23 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/mach-imx/iomux-v1.h | |||
diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c index 99a9cdb9d6be..9dae74bf47fc 100644 --- a/arch/arm/plat-mxc/iomux-v3.c +++ b/arch/arm/mach-imx/iomux-v3.c | |||
@@ -25,9 +25,10 @@ | |||
25 | #include <linux/string.h> | 25 | #include <linux/string.h> |
26 | #include <linux/gpio.h> | 26 | #include <linux/gpio.h> |
27 | 27 | ||
28 | #include <mach/hardware.h> | ||
29 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
30 | #include <mach/iomux-v3.h> | 29 | |
30 | #include "hardware.h" | ||
31 | #include "iomux-v3.h" | ||
31 | 32 | ||
32 | static void __iomem *base; | 33 | static void __iomem *base; |
33 | 34 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/mach-imx/iomux-v3.h index 2fa3b5430102..2fa3b5430102 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/iomux-v3.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/iram.h b/arch/arm/mach-imx/iram.h index 022690c33702..022690c33702 100644 --- a/arch/arm/plat-mxc/include/mach/iram.h +++ b/arch/arm/mach-imx/iram.h | |||
diff --git a/arch/arm/plat-mxc/iram_alloc.c b/arch/arm/mach-imx/iram_alloc.c index 074c3869626a..6c80424f678e 100644 --- a/arch/arm/plat-mxc/iram_alloc.c +++ b/arch/arm/mach-imx/iram_alloc.c | |||
@@ -22,7 +22,8 @@ | |||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/spinlock.h> | 23 | #include <linux/spinlock.h> |
24 | #include <linux/genalloc.h> | 24 | #include <linux/genalloc.h> |
25 | #include <mach/iram.h> | 25 | |
26 | #include "iram.h" | ||
26 | 27 | ||
27 | static unsigned long iram_phys_base; | 28 | static unsigned long iram_phys_base; |
28 | static void __iomem *iram_virt_base; | 29 | static void __iomem *iram_virt_base; |
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/mach-imx/irq-common.c index b6e11458e5ae..b6e11458e5ae 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/mach-imx/irq-common.c | |||
diff --git a/arch/arm/plat-mxc/irq-common.h b/arch/arm/mach-imx/irq-common.h index 6ccb3a14c693..5b2dabba330f 100644 --- a/arch/arm/plat-mxc/irq-common.h +++ b/arch/arm/mach-imx/irq-common.h | |||
@@ -19,6 +19,9 @@ | |||
19 | #ifndef __PLAT_MXC_IRQ_COMMON_H__ | 19 | #ifndef __PLAT_MXC_IRQ_COMMON_H__ |
20 | #define __PLAT_MXC_IRQ_COMMON_H__ | 20 | #define __PLAT_MXC_IRQ_COMMON_H__ |
21 | 21 | ||
22 | /* all normal IRQs can be FIQs */ | ||
23 | #define FIQ_START 0 | ||
24 | |||
22 | struct mxc_extra_irq | 25 | struct mxc_extra_irq |
23 | { | 26 | { |
24 | int (*set_priority)(unsigned char irq, unsigned char prio); | 27 | int (*set_priority)(unsigned char irq, unsigned char prio); |
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index c40a34c00489..5f1510363ee7 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c | |||
@@ -14,7 +14,8 @@ | |||
14 | #include <asm/page.h> | 14 | #include <asm/page.h> |
15 | #include <asm/sizes.h> | 15 | #include <asm/sizes.h> |
16 | #include <asm/mach/map.h> | 16 | #include <asm/mach/map.h> |
17 | #include <mach/hardware.h> | 17 | |
18 | #include "hardware.h" | ||
18 | 19 | ||
19 | static struct map_desc imx_lluart_desc = { | 20 | static struct map_desc imx_lluart_desc = { |
20 | #ifdef CONFIG_DEBUG_IMX6Q_UART2 | 21 | #ifdef CONFIG_DEBUG_IMX6Q_UART2 |
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 7b99a79722b6..5c9bd2c66e6d 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c | |||
@@ -25,11 +25,10 @@ | |||
25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
26 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
27 | 27 | ||
28 | #include <mach/common.h> | 28 | #include "common.h" |
29 | #include <mach/hardware.h> | ||
30 | #include <mach/iomux-mx1.h> | ||
31 | |||
32 | #include "devices-imx1.h" | 29 | #include "devices-imx1.h" |
30 | #include "hardware.h" | ||
31 | #include "iomux-mx1.h" | ||
33 | 32 | ||
34 | static const int apf9328_pins[] __initconst = { | 33 | static const int apf9328_pins[] __initconst = { |
35 | /* UART1 */ | 34 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index 5985ed1b8c98..59bd6b06a6b5 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c | |||
@@ -41,19 +41,18 @@ | |||
41 | #include <linux/regulator/machine.h> | 41 | #include <linux/regulator/machine.h> |
42 | #include <linux/regulator/fixed.h> | 42 | #include <linux/regulator/fixed.h> |
43 | 43 | ||
44 | #include <mach/hardware.h> | ||
45 | #include <asm/mach-types.h> | 44 | #include <asm/mach-types.h> |
46 | #include <asm/mach/arch.h> | 45 | #include <asm/mach/arch.h> |
47 | #include <asm/mach/time.h> | 46 | #include <asm/mach/time.h> |
48 | #include <asm/memory.h> | 47 | #include <asm/memory.h> |
49 | #include <asm/mach/map.h> | 48 | #include <asm/mach/map.h> |
50 | 49 | ||
51 | #include <mach/common.h> | 50 | #include "common.h" |
52 | #include <mach/iomux-mx3.h> | ||
53 | #include <mach/ulpi.h> | ||
54 | |||
55 | #include "devices-imx31.h" | 51 | #include "devices-imx31.h" |
56 | #include "crmregs-imx3.h" | 52 | #include "crmregs-imx3.h" |
53 | #include "hardware.h" | ||
54 | #include "iomux-mx3.h" | ||
55 | #include "ulpi.h" | ||
57 | 56 | ||
58 | static int armadillo5x0_pins[] = { | 57 | static int armadillo5x0_pins[] = { |
59 | /* UART1 */ | 58 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index 9a9897749dd6..3a39d5aec07a 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c | |||
@@ -19,15 +19,14 @@ | |||
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | 21 | ||
22 | #include <mach/iomux-mx3.h> | ||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/common.h> | ||
25 | |||
26 | #include <asm/mach/time.h> | 22 | #include <asm/mach/time.h> |
27 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
28 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
29 | 25 | ||
26 | #include "common.h" | ||
30 | #include "devices-imx31.h" | 27 | #include "devices-imx31.h" |
28 | #include "hardware.h" | ||
29 | #include "iomux-mx3.h" | ||
31 | 30 | ||
32 | static const struct imxuart_platform_data uart_pdata __initconst = { | 31 | static const struct imxuart_platform_data uart_pdata __initconst = { |
33 | .flags = IMXUART_HAVE_RTSCTS, | 32 | .flags = IMXUART_HAVE_RTSCTS, |
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 2bb9e18d9ee1..12a370646b45 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c | |||
@@ -34,13 +34,12 @@ | |||
34 | #include <asm/mach/time.h> | 34 | #include <asm/mach/time.h> |
35 | #include <asm/mach/map.h> | 35 | #include <asm/mach/map.h> |
36 | 36 | ||
37 | #include <mach/eukrea-baseboards.h> | 37 | #include "common.h" |
38 | #include <mach/common.h> | ||
39 | #include <mach/hardware.h> | ||
40 | #include <mach/iomux-mx27.h> | ||
41 | #include <mach/ulpi.h> | ||
42 | |||
43 | #include "devices-imx27.h" | 38 | #include "devices-imx27.h" |
39 | #include "eukrea-baseboards.h" | ||
40 | #include "hardware.h" | ||
41 | #include "iomux-mx27.h" | ||
42 | #include "ulpi.h" | ||
44 | 43 | ||
45 | static const int eukrea_cpuimx27_pins[] __initconst = { | 44 | static const int eukrea_cpuimx27_pins[] __initconst = { |
46 | /* UART1 */ | 45 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index d49b0ec6bdec..5a31bf8c8f4c 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c | |||
@@ -37,12 +37,11 @@ | |||
37 | #include <asm/mach/time.h> | 37 | #include <asm/mach/time.h> |
38 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
39 | 39 | ||
40 | #include <mach/eukrea-baseboards.h> | 40 | #include "common.h" |
41 | #include <mach/hardware.h> | ||
42 | #include <mach/common.h> | ||
43 | #include <mach/iomux-mx35.h> | ||
44 | |||
45 | #include "devices-imx35.h" | 41 | #include "devices-imx35.h" |
42 | #include "eukrea-baseboards.h" | ||
43 | #include "hardware.h" | ||
44 | #include "iomux-mx35.h" | ||
46 | 45 | ||
47 | static const struct imxuart_platform_data uart_pdata __initconst = { | 46 | static const struct imxuart_platform_data uart_pdata __initconst = { |
48 | .flags = IMXUART_HAVE_RTSCTS, | 47 | .flags = IMXUART_HAVE_RTSCTS, |
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c index b87cc49ab1e8..b727de029c8f 100644 --- a/arch/arm/mach-imx/mach-cpuimx51sd.c +++ b/arch/arm/mach-imx/mach-cpuimx51sd.c | |||
@@ -26,18 +26,17 @@ | |||
26 | #include <linux/spi/spi.h> | 26 | #include <linux/spi/spi.h> |
27 | #include <linux/can/platform/mcp251x.h> | 27 | #include <linux/can/platform/mcp251x.h> |
28 | 28 | ||
29 | #include <mach/eukrea-baseboards.h> | ||
30 | #include <mach/common.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/iomux-mx51.h> | ||
33 | |||
34 | #include <asm/setup.h> | 29 | #include <asm/setup.h> |
35 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
36 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
37 | #include <asm/mach/time.h> | 32 | #include <asm/mach/time.h> |
38 | 33 | ||
34 | #include "common.h" | ||
39 | #include "devices-imx51.h" | 35 | #include "devices-imx51.h" |
40 | #include "cpu_op-mx51.h" | 36 | #include "cpu_op-mx51.h" |
37 | #include "eukrea-baseboards.h" | ||
38 | #include "hardware.h" | ||
39 | #include "iomux-mx51.h" | ||
41 | 40 | ||
42 | #define USBH1_RST IMX_GPIO_NR(2, 28) | 41 | #define USBH1_RST IMX_GPIO_NR(2, 28) |
43 | #define ETH_RST IMX_GPIO_NR(2, 31) | 42 | #define ETH_RST IMX_GPIO_NR(2, 31) |
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index 017bbb70ea41..75027a5ad8b7 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c | |||
@@ -27,18 +27,18 @@ | |||
27 | #include <linux/usb/otg.h> | 27 | #include <linux/usb/otg.h> |
28 | #include <linux/usb/ulpi.h> | 28 | #include <linux/usb/ulpi.h> |
29 | 29 | ||
30 | #include <mach/eukrea-baseboards.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/time.h> | 32 | #include <asm/mach/time.h> |
35 | #include <asm/memory.h> | 33 | #include <asm/memory.h> |
36 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
37 | #include <mach/common.h> | ||
38 | #include <mach/mx25.h> | ||
39 | #include <mach/iomux-mx25.h> | ||
40 | 35 | ||
36 | #include "common.h" | ||
41 | #include "devices-imx25.h" | 37 | #include "devices-imx25.h" |
38 | #include "eukrea-baseboards.h" | ||
39 | #include "hardware.h" | ||
40 | #include "iomux-mx25.h" | ||
41 | #include "mx25.h" | ||
42 | 42 | ||
43 | static const struct imxuart_platform_data uart_pdata __initconst = { | 43 | static const struct imxuart_platform_data uart_pdata __initconst = { |
44 | .flags = IMXUART_HAVE_RTSCTS, | 44 | .flags = IMXUART_HAVE_RTSCTS, |
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 141756f00ae5..b74422679126 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c | |||
@@ -40,11 +40,11 @@ | |||
40 | #include <asm/mach/time.h> | 40 | #include <asm/mach/time.h> |
41 | #include <asm/system_info.h> | 41 | #include <asm/system_info.h> |
42 | #include <asm/memblock.h> | 42 | #include <asm/memblock.h> |
43 | #include <mach/common.h> | ||
44 | #include <mach/hardware.h> | ||
45 | #include <mach/iomux-mx27.h> | ||
46 | 43 | ||
44 | #include "common.h" | ||
47 | #include "devices-imx27.h" | 45 | #include "devices-imx27.h" |
46 | #include "hardware.h" | ||
47 | #include "iomux-mx27.h" | ||
48 | 48 | ||
49 | #define TVP5150_RSTN (GPIO_PORTC + 18) | 49 | #define TVP5150_RSTN (GPIO_PORTC + 18) |
50 | #define TVP5150_PWDN (GPIO_PORTC + 19) | 50 | #define TVP5150_PWDN (GPIO_PORTC + 19) |
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 7381387a8905..53a860112938 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c | |||
@@ -17,11 +17,11 @@ | |||
17 | #include <asm/mach-types.h> | 17 | #include <asm/mach-types.h> |
18 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
19 | #include <asm/mach/time.h> | 19 | #include <asm/mach/time.h> |
20 | #include <mach/hardware.h> | ||
21 | #include <mach/common.h> | ||
22 | #include <mach/iomux-mx27.h> | ||
23 | 20 | ||
21 | #include "hardware.h" | ||
22 | #include "common.h" | ||
24 | #include "devices-imx27.h" | 23 | #include "devices-imx27.h" |
24 | #include "iomux-mx27.h" | ||
25 | 25 | ||
26 | static const int mx27ipcam_pins[] __initconst = { | 26 | static const int mx27ipcam_pins[] __initconst = { |
27 | /* UART1 */ | 27 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 1f45b9189229..fc8dce931378 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c | |||
@@ -20,11 +20,11 @@ | |||
20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
21 | #include <asm/mach/time.h> | 21 | #include <asm/mach/time.h> |
22 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
23 | #include <mach/hardware.h> | ||
24 | #include <mach/common.h> | ||
25 | #include <mach/iomux-mx27.h> | ||
26 | 23 | ||
24 | #include "common.h" | ||
27 | #include "devices-imx27.h" | 25 | #include "devices-imx27.h" |
26 | #include "hardware.h" | ||
27 | #include "iomux-mx27.h" | ||
28 | 28 | ||
29 | static const int mx27lite_pins[] __initconst = { | 29 | static const int mx27lite_pins[] __initconst = { |
30 | /* UART1 */ | 30 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 29711e95579f..e71e62610eba 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c | |||
@@ -19,8 +19,9 @@ | |||
19 | #include <linux/of_platform.h> | 19 | #include <linux/of_platform.h> |
20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
21 | #include <asm/mach/time.h> | 21 | #include <asm/mach/time.h> |
22 | #include <mach/common.h> | 22 | |
23 | #include <mach/mx53.h> | 23 | #include "common.h" |
24 | #include "mx53.h" | ||
24 | 25 | ||
25 | /* | 26 | /* |
26 | * Lookup table for attaching a specific name and platform_data pointer to | 27 | * Lookup table for attaching a specific name and platform_data pointer to |
@@ -42,9 +43,9 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { | |||
42 | OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), | 43 | OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), |
43 | OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), | 44 | OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), |
44 | OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), | 45 | OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), |
45 | OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL), | 46 | OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL), |
46 | OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL), | 47 | OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL), |
47 | OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL), | 48 | OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL), |
48 | OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL), | 49 | OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL), |
49 | OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), | 50 | OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), |
50 | { /* sentinel */ } | 51 | { /* sentinel */ } |
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 47c91f7185d2..978b6dd00de4 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -33,10 +33,10 @@ | |||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/time.h> | 34 | #include <asm/mach/time.h> |
35 | #include <asm/system_misc.h> | 35 | #include <asm/system_misc.h> |
36 | #include <mach/common.h> | ||
37 | #include <mach/cpuidle.h> | ||
38 | #include <mach/hardware.h> | ||
39 | 36 | ||
37 | #include "common.h" | ||
38 | #include "cpuidle.h" | ||
39 | #include "hardware.h" | ||
40 | 40 | ||
41 | void imx6q_restart(char mode, const char *cmd) | 41 | void imx6q_restart(char mode, const char *cmd) |
42 | { | 42 | { |
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 0330078ff788..2e536ea53444 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c | |||
@@ -36,11 +36,10 @@ | |||
36 | #include <asm/mach/map.h> | 36 | #include <asm/mach/map.h> |
37 | #include <asm/mach/time.h> | 37 | #include <asm/mach/time.h> |
38 | 38 | ||
39 | #include <mach/common.h> | 39 | #include "common.h" |
40 | #include <mach/hardware.h> | ||
41 | #include <mach/iomux-mx3.h> | ||
42 | |||
43 | #include "devices-imx31.h" | 40 | #include "devices-imx31.h" |
41 | #include "hardware.h" | ||
42 | #include "iomux-mx3.h" | ||
44 | 43 | ||
45 | #define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \ | 44 | #define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \ |
46 | IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \ | 45 | IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \ |
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 667f359a2e8b..06b483783e68 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c | |||
@@ -23,11 +23,10 @@ | |||
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/time.h> | 24 | #include <asm/mach/time.h> |
25 | 25 | ||
26 | #include <mach/common.h> | 26 | #include "common.h" |
27 | #include <mach/hardware.h> | ||
28 | #include <mach/iomux-mx1.h> | ||
29 | |||
30 | #include "devices-imx1.h" | 27 | #include "devices-imx1.h" |
28 | #include "hardware.h" | ||
29 | #include "iomux-mx1.h" | ||
31 | 30 | ||
32 | static const int mx1ads_pins[] __initconst = { | 31 | static const int mx1ads_pins[] __initconst = { |
33 | /* UART1 */ | 32 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index ed22e3fe6ec8..6adb3136bb08 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c | |||
@@ -18,15 +18,15 @@ | |||
18 | #include <linux/mtd/mtd.h> | 18 | #include <linux/mtd/mtd.h> |
19 | #include <linux/mtd/physmap.h> | 19 | #include <linux/mtd/physmap.h> |
20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
21 | #include <mach/common.h> | ||
22 | #include <mach/hardware.h> | ||
23 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
24 | #include <asm/mach/arch.h> | 22 | #include <asm/mach/arch.h> |
25 | #include <asm/mach/time.h> | 23 | #include <asm/mach/time.h> |
26 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
27 | #include <mach/iomux-mx21.h> | ||
28 | 25 | ||
26 | #include "common.h" | ||
29 | #include "devices-imx21.h" | 27 | #include "devices-imx21.h" |
28 | #include "hardware.h" | ||
29 | #include "iomux-mx21.h" | ||
30 | 30 | ||
31 | /* | 31 | /* |
32 | * Memory-mapped I/O on MX21ADS base board | 32 | * Memory-mapped I/O on MX21ADS base board |
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index ce247fd1269a..b1b03aa55bb8 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c | |||
@@ -31,17 +31,17 @@ | |||
31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
32 | #include <linux/usb/otg.h> | 32 | #include <linux/usb/otg.h> |
33 | 33 | ||
34 | #include <mach/hardware.h> | ||
35 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
36 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
37 | #include <asm/mach/time.h> | 36 | #include <asm/mach/time.h> |
38 | #include <asm/memory.h> | 37 | #include <asm/memory.h> |
39 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
40 | #include <mach/common.h> | ||
41 | #include <mach/mx25.h> | ||
42 | #include <mach/iomux-mx25.h> | ||
43 | 39 | ||
40 | #include "common.h" | ||
44 | #include "devices-imx25.h" | 41 | #include "devices-imx25.h" |
42 | #include "hardware.h" | ||
43 | #include "iomux-mx25.h" | ||
44 | #include "mx25.h" | ||
45 | 45 | ||
46 | #define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6) | 46 | #define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6) |
47 | 47 | ||
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 05996f39005c..d0e547fa925f 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -36,13 +36,13 @@ | |||
36 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
38 | #include <asm/mach/time.h> | 38 | #include <asm/mach/time.h> |
39 | #include <mach/hardware.h> | ||
40 | #include <mach/common.h> | ||
41 | #include <mach/iomux-mx27.h> | ||
42 | #include <mach/ulpi.h> | ||
43 | #include <mach/3ds_debugboard.h> | ||
44 | 39 | ||
40 | #include "3ds_debugboard.h" | ||
41 | #include "common.h" | ||
45 | #include "devices-imx27.h" | 42 | #include "devices-imx27.h" |
43 | #include "hardware.h" | ||
44 | #include "iomux-mx27.h" | ||
45 | #include "ulpi.h" | ||
46 | 46 | ||
47 | #define SD1_EN_GPIO IMX_GPIO_NR(2, 25) | 47 | #define SD1_EN_GPIO IMX_GPIO_NR(2, 25) |
48 | #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) | 48 | #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) |
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 7dc59bac0e55..3d036f57f0e6 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c | |||
@@ -21,15 +21,15 @@ | |||
21 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
22 | #include <linux/i2c.h> | 22 | #include <linux/i2c.h> |
23 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
24 | #include <mach/common.h> | ||
25 | #include <mach/hardware.h> | ||
26 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
29 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
30 | #include <mach/iomux-mx27.h> | ||
31 | 28 | ||
29 | #include "common.h" | ||
32 | #include "devices-imx27.h" | 30 | #include "devices-imx27.h" |
31 | #include "hardware.h" | ||
32 | #include "iomux-mx27.h" | ||
33 | 33 | ||
34 | /* | 34 | /* |
35 | * Base address of PBC controller, CS4 | 35 | * Base address of PBC controller, CS4 |
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 8915f937b7d5..bc301befdd06 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
@@ -30,19 +30,19 @@ | |||
30 | 30 | ||
31 | #include <media/soc_camera.h> | 31 | #include <media/soc_camera.h> |
32 | 32 | ||
33 | #include <mach/hardware.h> | ||
34 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
35 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
36 | #include <asm/mach/time.h> | 35 | #include <asm/mach/time.h> |
37 | #include <asm/memory.h> | 36 | #include <asm/memory.h> |
38 | #include <asm/mach/map.h> | 37 | #include <asm/mach/map.h> |
39 | #include <asm/memblock.h> | 38 | #include <asm/memblock.h> |
40 | #include <mach/common.h> | ||
41 | #include <mach/iomux-mx3.h> | ||
42 | #include <mach/3ds_debugboard.h> | ||
43 | #include <mach/ulpi.h> | ||
44 | 39 | ||
40 | #include "3ds_debugboard.h" | ||
41 | #include "common.h" | ||
45 | #include "devices-imx31.h" | 42 | #include "devices-imx31.h" |
43 | #include "hardware.h" | ||
44 | #include "iomux-mx3.h" | ||
45 | #include "ulpi.h" | ||
46 | 46 | ||
47 | static int mx31_3ds_pins[] = { | 47 | static int mx31_3ds_pins[] = { |
48 | /* UART1 */ | 48 | /* UART1 */ |
@@ -393,7 +393,7 @@ static struct regulator_init_data gpo_init = { | |||
393 | }; | 393 | }; |
394 | 394 | ||
395 | static struct regulator_consumer_supply vmmc2_consumers[] = { | 395 | static struct regulator_consumer_supply vmmc2_consumers[] = { |
396 | REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"), | 396 | REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"), |
397 | }; | 397 | }; |
398 | 398 | ||
399 | static struct regulator_init_data vmmc2_init = { | 399 | static struct regulator_init_data vmmc2_init = { |
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index e774b07f48d3..8b56f8883f32 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c | |||
@@ -28,8 +28,6 @@ | |||
28 | #include <asm/mach/time.h> | 28 | #include <asm/mach/time.h> |
29 | #include <asm/memory.h> | 29 | #include <asm/memory.h> |
30 | #include <asm/mach/map.h> | 30 | #include <asm/mach/map.h> |
31 | #include <mach/common.h> | ||
32 | #include <mach/iomux-mx3.h> | ||
33 | 31 | ||
34 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 | 32 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 |
35 | #include <linux/mfd/wm8350/audio.h> | 33 | #include <linux/mfd/wm8350/audio.h> |
@@ -37,7 +35,10 @@ | |||
37 | #include <linux/mfd/wm8350/pmic.h> | 35 | #include <linux/mfd/wm8350/pmic.h> |
38 | #endif | 36 | #endif |
39 | 37 | ||
38 | #include "common.h" | ||
40 | #include "devices-imx31.h" | 39 | #include "devices-imx31.h" |
40 | #include "hardware.h" | ||
41 | #include "iomux-mx3.h" | ||
41 | 42 | ||
42 | /* Base address of PBC controller */ | 43 | /* Base address of PBC controller */ |
43 | #define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT | 44 | #define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT |
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 34b9bf075daf..08b9965c8b36 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c | |||
@@ -42,13 +42,12 @@ | |||
42 | #include <asm/mach/time.h> | 42 | #include <asm/mach/time.h> |
43 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
44 | 44 | ||
45 | #include <mach/hardware.h> | 45 | #include "board-mx31lilly.h" |
46 | #include <mach/common.h> | 46 | #include "common.h" |
47 | #include <mach/iomux-mx3.h> | ||
48 | #include <mach/board-mx31lilly.h> | ||
49 | #include <mach/ulpi.h> | ||
50 | |||
51 | #include "devices-imx31.h" | 47 | #include "devices-imx31.h" |
48 | #include "hardware.h" | ||
49 | #include "iomux-mx3.h" | ||
50 | #include "ulpi.h" | ||
52 | 51 | ||
53 | /* | 52 | /* |
54 | * This file contains module-specific initialization routines for LILLY-1131. | 53 | * This file contains module-specific initialization routines for LILLY-1131. |
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index ef57cff5abfb..bdcd92e59518 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c | |||
@@ -39,13 +39,12 @@ | |||
39 | #include <asm/page.h> | 39 | #include <asm/page.h> |
40 | #include <asm/setup.h> | 40 | #include <asm/setup.h> |
41 | 41 | ||
42 | #include <mach/hardware.h> | 42 | #include "board-mx31lite.h" |
43 | #include <mach/common.h> | 43 | #include "common.h" |
44 | #include <mach/board-mx31lite.h> | ||
45 | #include <mach/iomux-mx3.h> | ||
46 | #include <mach/ulpi.h> | ||
47 | |||
48 | #include "devices-imx31.h" | 44 | #include "devices-imx31.h" |
45 | #include "hardware.h" | ||
46 | #include "iomux-mx3.h" | ||
47 | #include "ulpi.h" | ||
49 | 48 | ||
50 | /* | 49 | /* |
51 | * This file contains the module-specific initialization routines. | 50 | * This file contains the module-specific initialization routines. |
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 459e754ef8c9..2517cfa9f26b 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c | |||
@@ -42,14 +42,14 @@ | |||
42 | #include <asm/mach/time.h> | 42 | #include <asm/mach/time.h> |
43 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
44 | #include <asm/memblock.h> | 44 | #include <asm/memblock.h> |
45 | #include <mach/board-mx31moboard.h> | ||
46 | #include <mach/common.h> | ||
47 | #include <mach/hardware.h> | ||
48 | #include <mach/iomux-mx3.h> | ||
49 | #include <mach/ulpi.h> | ||
50 | #include <linux/platform_data/asoc-imx-ssi.h> | 45 | #include <linux/platform_data/asoc-imx-ssi.h> |
51 | 46 | ||
47 | #include "board-mx31moboard.h" | ||
48 | #include "common.h" | ||
52 | #include "devices-imx31.h" | 49 | #include "devices-imx31.h" |
50 | #include "hardware.h" | ||
51 | #include "iomux-mx3.h" | ||
52 | #include "ulpi.h" | ||
53 | 53 | ||
54 | static unsigned int moboard_pins[] = { | 54 | static unsigned int moboard_pins[] = { |
55 | /* UART0 */ | 55 | /* UART0 */ |
@@ -175,11 +175,11 @@ static const struct spi_imx_master moboard_spi1_pdata __initconst = { | |||
175 | 175 | ||
176 | static struct regulator_consumer_supply sdhc_consumers[] = { | 176 | static struct regulator_consumer_supply sdhc_consumers[] = { |
177 | { | 177 | { |
178 | .dev_name = "mxc-mmc.0", | 178 | .dev_name = "imx31-mmc.0", |
179 | .supply = "sdhc0_vcc", | 179 | .supply = "sdhc0_vcc", |
180 | }, | 180 | }, |
181 | { | 181 | { |
182 | .dev_name = "mxc-mmc.1", | 182 | .dev_name = "imx31-mmc.1", |
183 | .supply = "sdhc1_vcc", | 183 | .supply = "sdhc1_vcc", |
184 | }, | 184 | }, |
185 | }; | 185 | }; |
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 504983c68aa8..5277da45d60c 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c | |||
@@ -43,15 +43,15 @@ | |||
43 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
44 | #include <asm/memblock.h> | 44 | #include <asm/memblock.h> |
45 | 45 | ||
46 | #include <mach/hardware.h> | ||
47 | #include <mach/common.h> | ||
48 | #include <mach/iomux-mx35.h> | ||
49 | #include <mach/3ds_debugboard.h> | ||
50 | #include <video/platform_lcd.h> | 46 | #include <video/platform_lcd.h> |
51 | 47 | ||
52 | #include <media/soc_camera.h> | 48 | #include <media/soc_camera.h> |
53 | 49 | ||
50 | #include "3ds_debugboard.h" | ||
51 | #include "common.h" | ||
54 | #include "devices-imx35.h" | 52 | #include "devices-imx35.h" |
53 | #include "hardware.h" | ||
54 | #include "iomux-mx35.h" | ||
55 | 55 | ||
56 | #define GPIO_MC9S08DZ60_GPS_ENABLE 0 | 56 | #define GPIO_MC9S08DZ60_GPS_ENABLE 0 |
57 | #define GPIO_MC9S08DZ60_HDD_ENABLE 4 | 57 | #define GPIO_MC9S08DZ60_HDD_ENABLE 4 |
diff --git a/arch/arm/mach-imx/mach-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c index 42b66e8d9615..0c1f88a80bdc 100644 --- a/arch/arm/mach-imx/mach-mx50_rdp.c +++ b/arch/arm/mach-imx/mach-mx50_rdp.c | |||
@@ -24,17 +24,16 @@ | |||
24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | 26 | ||
27 | #include <mach/common.h> | ||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/iomux-mx50.h> | ||
30 | |||
31 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
32 | #include <asm/setup.h> | 28 | #include <asm/setup.h> |
33 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
35 | #include <asm/mach/time.h> | 31 | #include <asm/mach/time.h> |
36 | 32 | ||
33 | #include "common.h" | ||
37 | #include "devices-imx50.h" | 34 | #include "devices-imx50.h" |
35 | #include "hardware.h" | ||
36 | #include "iomux-mx50.h" | ||
38 | 37 | ||
39 | #define FEC_EN IMX_GPIO_NR(6, 23) | 38 | #define FEC_EN IMX_GPIO_NR(6, 23) |
40 | #define FEC_RESET_B IMX_GPIO_NR(4, 12) | 39 | #define FEC_RESET_B IMX_GPIO_NR(4, 12) |
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c index 9ee84a4af639..abc25bd1107b 100644 --- a/arch/arm/mach-imx/mach-mx51_3ds.c +++ b/arch/arm/mach-imx/mach-mx51_3ds.c | |||
@@ -19,12 +19,11 @@ | |||
19 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
20 | #include <asm/mach/time.h> | 20 | #include <asm/mach/time.h> |
21 | 21 | ||
22 | #include <mach/hardware.h> | 22 | #include "3ds_debugboard.h" |
23 | #include <mach/common.h> | 23 | #include "common.h" |
24 | #include <mach/iomux-mx51.h> | ||
25 | #include <mach/3ds_debugboard.h> | ||
26 | |||
27 | #include "devices-imx51.h" | 24 | #include "devices-imx51.h" |
25 | #include "hardware.h" | ||
26 | #include "iomux-mx51.h" | ||
28 | 27 | ||
29 | #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) | 28 | #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) |
30 | 29 | ||
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c index 7b31cbde8775..d9a84ca2199a 100644 --- a/arch/arm/mach-imx/mach-mx51_babbage.c +++ b/arch/arm/mach-imx/mach-mx51_babbage.c | |||
@@ -20,17 +20,16 @@ | |||
20 | #include <linux/spi/flash.h> | 20 | #include <linux/spi/flash.h> |
21 | #include <linux/spi/spi.h> | 21 | #include <linux/spi/spi.h> |
22 | 22 | ||
23 | #include <mach/common.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/iomux-mx51.h> | ||
26 | |||
27 | #include <asm/setup.h> | 23 | #include <asm/setup.h> |
28 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
31 | 27 | ||
28 | #include "common.h" | ||
32 | #include "devices-imx51.h" | 29 | #include "devices-imx51.h" |
33 | #include "cpu_op-mx51.h" | 30 | #include "cpu_op-mx51.h" |
31 | #include "hardware.h" | ||
32 | #include "iomux-mx51.h" | ||
34 | 33 | ||
35 | #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) | 34 | #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) |
36 | #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) | 35 | #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) |
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 0bf6d30aa32d..f4a8c7e108e1 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c | |||
@@ -21,17 +21,17 @@ | |||
21 | #include <linux/mtd/physmap.h> | 21 | #include <linux/mtd/physmap.h> |
22 | #include <linux/i2c.h> | 22 | #include <linux/i2c.h> |
23 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
24 | #include <mach/common.h> | ||
25 | #include <mach/hardware.h> | ||
26 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
29 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
30 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
31 | #include <mach/iomux-mx27.h> | ||
32 | #include <linux/i2c/pca953x.h> | 29 | #include <linux/i2c/pca953x.h> |
33 | 30 | ||
31 | #include "common.h" | ||
34 | #include "devices-imx27.h" | 32 | #include "devices-imx27.h" |
33 | #include "hardware.h" | ||
34 | #include "iomux-mx27.h" | ||
35 | 35 | ||
36 | static const int mxt_td60_pins[] __initconst = { | 36 | static const int mxt_td60_pins[] __initconst = { |
37 | /* UART0 */ | 37 | /* UART0 */ |
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index de8516b7d69f..eee369fa94a2 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c | |||
@@ -32,13 +32,13 @@ | |||
32 | 32 | ||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
35 | #include <mach/common.h> | ||
36 | #include <mach/hardware.h> | ||
37 | #include <mach/iomux-mx27.h> | ||
38 | #include <asm/mach/time.h> | 35 | #include <asm/mach/time.h> |
39 | #include <mach/ulpi.h> | ||
40 | 36 | ||
37 | #include "common.h" | ||
41 | #include "devices-imx27.h" | 38 | #include "devices-imx27.h" |
39 | #include "hardware.h" | ||
40 | #include "iomux-mx27.h" | ||
41 | #include "ulpi.h" | ||
42 | 42 | ||
43 | #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23) | 43 | #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23) |
44 | #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24) | 44 | #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24) |
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index e3c45130fb3c..547fef133f65 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c | |||
@@ -42,13 +42,13 @@ | |||
42 | #include <asm/mach/time.h> | 42 | #include <asm/mach/time.h> |
43 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
44 | #include <asm/memblock.h> | 44 | #include <asm/memblock.h> |
45 | #include <mach/common.h> | ||
46 | #include <mach/hardware.h> | ||
47 | #include <mach/iomux-mx3.h> | ||
48 | #include <mach/ulpi.h> | ||
49 | 45 | ||
46 | #include "common.h" | ||
50 | #include "devices-imx31.h" | 47 | #include "devices-imx31.h" |
48 | #include "hardware.h" | ||
49 | #include "iomux-mx3.h" | ||
51 | #include "pcm037.h" | 50 | #include "pcm037.h" |
51 | #include "ulpi.h" | ||
52 | 52 | ||
53 | static enum pcm037_board_variant pcm037_instance = PCM037_PCM970; | 53 | static enum pcm037_board_variant pcm037_instance = PCM037_PCM970; |
54 | 54 | ||
diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c index 11ffa81ad17d..8fd8255068ee 100644 --- a/arch/arm/mach-imx/mach-pcm037_eet.c +++ b/arch/arm/mach-imx/mach-pcm037_eet.c | |||
@@ -11,13 +11,12 @@ | |||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/spi/spi.h> | 12 | #include <linux/spi/spi.h> |
13 | 13 | ||
14 | #include <mach/common.h> | ||
15 | #include <mach/iomux-mx3.h> | ||
16 | |||
17 | #include <asm/mach-types.h> | 14 | #include <asm/mach-types.h> |
18 | 15 | ||
19 | #include "pcm037.h" | 16 | #include "pcm037.h" |
17 | #include "common.h" | ||
20 | #include "devices-imx31.h" | 18 | #include "devices-imx31.h" |
19 | #include "iomux-mx3.h" | ||
21 | 20 | ||
22 | static unsigned int pcm037_eet_pins[] = { | 21 | static unsigned int pcm037_eet_pins[] = { |
23 | /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ | 22 | /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ |
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 95f49d936fd3..4aa0d0798605 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c | |||
@@ -33,13 +33,12 @@ | |||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/time.h> | 34 | #include <asm/mach/time.h> |
35 | 35 | ||
36 | #include <mach/board-pcm038.h> | 36 | #include "board-pcm038.h" |
37 | #include <mach/common.h> | 37 | #include "common.h" |
38 | #include <mach/hardware.h> | ||
39 | #include <mach/iomux-mx27.h> | ||
40 | #include <mach/ulpi.h> | ||
41 | |||
42 | #include "devices-imx27.h" | 38 | #include "devices-imx27.h" |
39 | #include "hardware.h" | ||
40 | #include "iomux-mx27.h" | ||
41 | #include "ulpi.h" | ||
43 | 42 | ||
44 | static const int pcm038_pins[] __initconst = { | 43 | static const int pcm038_pins[] __initconst = { |
45 | /* UART1 */ | 44 | /* UART1 */ |
@@ -212,7 +211,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = { | |||
212 | 211 | ||
213 | static struct regulator_consumer_supply sdhc1_consumers[] = { | 212 | static struct regulator_consumer_supply sdhc1_consumers[] = { |
214 | { | 213 | { |
215 | .dev_name = "mxc-mmc.1", | 214 | .dev_name = "imx21-mmc.1", |
216 | .supply = "sdhc_vcc", | 215 | .supply = "sdhc_vcc", |
217 | }, | 216 | }, |
218 | }; | 217 | }; |
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index e4bd4387e344..92445440221e 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c | |||
@@ -33,12 +33,11 @@ | |||
33 | #include <asm/mach/time.h> | 33 | #include <asm/mach/time.h> |
34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
35 | 35 | ||
36 | #include <mach/hardware.h> | 36 | #include "common.h" |
37 | #include <mach/common.h> | ||
38 | #include <mach/iomux-mx35.h> | ||
39 | #include <mach/ulpi.h> | ||
40 | |||
41 | #include "devices-imx35.h" | 37 | #include "devices-imx35.h" |
38 | #include "hardware.h" | ||
39 | #include "iomux-mx35.h" | ||
40 | #include "ulpi.h" | ||
42 | 41 | ||
43 | static const struct fb_videomode fb_modedb[] = { | 42 | static const struct fb_videomode fb_modedb[] = { |
44 | { | 43 | { |
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index fb25fbd31226..96d9a91f8a3b 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c | |||
@@ -21,17 +21,17 @@ | |||
21 | #include <linux/mtd/nand.h> | 21 | #include <linux/mtd/nand.h> |
22 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
23 | 23 | ||
24 | #include <mach/hardware.h> | ||
25 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
28 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
29 | #include <mach/common.h> | ||
30 | #include <asm/page.h> | 28 | #include <asm/page.h> |
31 | #include <asm/setup.h> | 29 | #include <asm/setup.h> |
32 | #include <mach/iomux-mx3.h> | ||
33 | 30 | ||
31 | #include "common.h" | ||
34 | #include "devices-imx31.h" | 32 | #include "devices-imx31.h" |
33 | #include "hardware.h" | ||
34 | #include "iomux-mx3.h" | ||
35 | 35 | ||
36 | /* FPGA defines */ | 36 | /* FPGA defines */ |
37 | #define QONG_FPGA_VERSION(major, minor, rev) \ | 37 | #define QONG_FPGA_VERSION(major, minor, rev) \ |
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index 67ff38e9a3ca..fc970409dbaf 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c | |||
@@ -20,11 +20,10 @@ | |||
20 | #include <asm/mach/arch.h> | 20 | #include <asm/mach/arch.h> |
21 | #include <asm/mach/time.h> | 21 | #include <asm/mach/time.h> |
22 | 22 | ||
23 | #include <mach/common.h> | 23 | #include "common.h" |
24 | #include <mach/hardware.h> | ||
25 | #include <mach/iomux-mx1.h> | ||
26 | |||
27 | #include "devices-imx1.h" | 24 | #include "devices-imx1.h" |
25 | #include "hardware.h" | ||
26 | #include "iomux-mx1.h" | ||
28 | 27 | ||
29 | /* | 28 | /* |
30 | * This scb9328 has a 32MiB flash | 29 | * This scb9328 has a 32MiB flash |
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index 39eb7960e2a4..3aecf91e4289 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c | |||
@@ -28,15 +28,14 @@ | |||
28 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
29 | #include <asm/mach/time.h> | 29 | #include <asm/mach/time.h> |
30 | 30 | ||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/common.h> | ||
33 | #include <mach/iomux-mx35.h> | ||
34 | |||
35 | #include <linux/i2c.h> | 31 | #include <linux/i2c.h> |
36 | #include <linux/i2c/at24.h> | 32 | #include <linux/i2c/at24.h> |
37 | #include <linux/mfd/mc13xxx.h> | 33 | #include <linux/mfd/mc13xxx.h> |
38 | 34 | ||
35 | #include "common.h" | ||
39 | #include "devices-imx35.h" | 36 | #include "devices-imx35.h" |
37 | #include "hardware.h" | ||
38 | #include "iomux-mx35.h" | ||
40 | 39 | ||
41 | #define GPIO_LCDPWR IMX_GPIO_NR(1, 2) | 40 | #define GPIO_LCDPWR IMX_GPIO_NR(1, 2) |
42 | #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0) | 41 | #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0) |
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 6d60d51868bc..7a146671e65a 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c | |||
@@ -22,9 +22,10 @@ | |||
22 | 22 | ||
23 | #include <asm/mach/map.h> | 23 | #include <asm/mach/map.h> |
24 | 24 | ||
25 | #include <mach/common.h> | 25 | #include "common.h" |
26 | #include <mach/hardware.h> | 26 | #include "devices/devices-common.h" |
27 | #include <mach/iomux-v1.h> | 27 | #include "hardware.h" |
28 | #include "iomux-v1.h" | ||
28 | 29 | ||
29 | static struct map_desc imx_io_desc[] __initdata = { | 30 | static struct map_desc imx_io_desc[] __initdata = { |
30 | imx_map_entry(MX1, IO, MT_DEVICE), | 31 | imx_map_entry(MX1, IO, MT_DEVICE), |
@@ -58,5 +59,7 @@ void __init imx1_soc_init(void) | |||
58 | MX1_GPIO_INT_PORTC, 0); | 59 | MX1_GPIO_INT_PORTC, 0); |
59 | mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, | 60 | mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, |
60 | MX1_GPIO_INT_PORTD, 0); | 61 | MX1_GPIO_INT_PORTD, 0); |
62 | imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR, | ||
63 | MX1_DMA_INT, MX1_DMA_ERR); | ||
61 | pinctrl_provide_dummies(); | 64 | pinctrl_provide_dummies(); |
62 | } | 65 | } |
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index d056dad0940d..d8ccd3a8ec53 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c | |||
@@ -21,12 +21,13 @@ | |||
21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/pinctrl/machine.h> | 23 | #include <linux/pinctrl/machine.h> |
24 | #include <mach/hardware.h> | ||
25 | #include <mach/common.h> | ||
26 | #include <mach/devices-common.h> | ||
27 | #include <asm/pgtable.h> | 24 | #include <asm/pgtable.h> |
28 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
29 | #include <mach/iomux-v1.h> | 26 | |
27 | #include "common.h" | ||
28 | #include "devices/devices-common.h" | ||
29 | #include "hardware.h" | ||
30 | #include "iomux-v1.h" | ||
30 | 31 | ||
31 | /* MX21 memory map definition */ | 32 | /* MX21 memory map definition */ |
32 | static struct map_desc imx21_io_desc[] __initdata = { | 33 | static struct map_desc imx21_io_desc[] __initdata = { |
@@ -81,6 +82,8 @@ static const struct resource imx21_audmux_res[] __initconst = { | |||
81 | 82 | ||
82 | void __init imx21_soc_init(void) | 83 | void __init imx21_soc_init(void) |
83 | { | 84 | { |
85 | mxc_device_init(); | ||
86 | |||
84 | mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 87 | mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
85 | mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 88 | mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
86 | mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 89 | mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
@@ -89,7 +92,8 @@ void __init imx21_soc_init(void) | |||
89 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 92 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
90 | 93 | ||
91 | pinctrl_provide_dummies(); | 94 | pinctrl_provide_dummies(); |
92 | imx_add_imx_dma(); | 95 | imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, |
96 | MX21_INT_DMACH0, 0); /* No ERR irq */ | ||
93 | platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, | 97 | platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, |
94 | ARRAY_SIZE(imx21_audmux_res)); | 98 | ARRAY_SIZE(imx21_audmux_res)); |
95 | } | 99 | } |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index f3f5c6542ab4..9357707bb7af 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -24,11 +24,11 @@ | |||
24 | #include <asm/pgtable.h> | 24 | #include <asm/pgtable.h> |
25 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
26 | 26 | ||
27 | #include <mach/common.h> | 27 | #include "common.h" |
28 | #include <mach/devices-common.h> | 28 | #include "devices/devices-common.h" |
29 | #include <mach/hardware.h> | 29 | #include "hardware.h" |
30 | #include <mach/mx25.h> | 30 | #include "iomux-v3.h" |
31 | #include <mach/iomux-v3.h> | 31 | #include "mx25.h" |
32 | 32 | ||
33 | /* | 33 | /* |
34 | * This table defines static virtual address mappings for I/O regions. | 34 | * This table defines static virtual address mappings for I/O regions. |
@@ -89,6 +89,8 @@ static const struct resource imx25_audmux_res[] __initconst = { | |||
89 | 89 | ||
90 | void __init imx25_soc_init(void) | 90 | void __init imx25_soc_init(void) |
91 | { | 91 | { |
92 | mxc_device_init(); | ||
93 | |||
92 | /* i.mx25 has the i.mx35 type gpio */ | 94 | /* i.mx25 has the i.mx35 type gpio */ |
93 | mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); | 95 | mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); |
94 | mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); | 96 | mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); |
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index e7e24afc45ed..4f1be65a7b5f 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c | |||
@@ -21,12 +21,13 @@ | |||
21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/pinctrl/machine.h> | 23 | #include <linux/pinctrl/machine.h> |
24 | #include <mach/hardware.h> | ||
25 | #include <mach/common.h> | ||
26 | #include <mach/devices-common.h> | ||
27 | #include <asm/pgtable.h> | 24 | #include <asm/pgtable.h> |
28 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
29 | #include <mach/iomux-v1.h> | 26 | |
27 | #include "common.h" | ||
28 | #include "devices/devices-common.h" | ||
29 | #include "hardware.h" | ||
30 | #include "iomux-v1.h" | ||
30 | 31 | ||
31 | /* MX27 memory map definition */ | 32 | /* MX27 memory map definition */ |
32 | static struct map_desc imx27_io_desc[] __initdata = { | 33 | static struct map_desc imx27_io_desc[] __initdata = { |
@@ -81,6 +82,8 @@ static const struct resource imx27_audmux_res[] __initconst = { | |||
81 | 82 | ||
82 | void __init imx27_soc_init(void) | 83 | void __init imx27_soc_init(void) |
83 | { | 84 | { |
85 | mxc_device_init(); | ||
86 | |||
84 | /* i.mx27 has the i.mx21 type gpio */ | 87 | /* i.mx27 has the i.mx21 type gpio */ |
85 | mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 88 | mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
86 | mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 89 | mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
@@ -90,7 +93,8 @@ void __init imx27_soc_init(void) | |||
90 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 93 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
91 | 94 | ||
92 | pinctrl_provide_dummies(); | 95 | pinctrl_provide_dummies(); |
93 | imx_add_imx_dma(); | 96 | imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, |
97 | MX27_INT_DMACH0, 0); /* No ERR irq */ | ||
94 | /* imx27 has the imx21 type audmux */ | 98 | /* imx27 has the imx21 type audmux */ |
95 | platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, | 99 | platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, |
96 | ARRAY_SIZE(imx27_audmux_res)); | 100 | ARRAY_SIZE(imx27_audmux_res)); |
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index b5deb0554552..cefa047c4053 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -26,12 +26,11 @@ | |||
26 | #include <asm/hardware/cache-l2x0.h> | 26 | #include <asm/hardware/cache-l2x0.h> |
27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
28 | 28 | ||
29 | #include <mach/common.h> | 29 | #include "common.h" |
30 | #include <mach/devices-common.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/iomux-v3.h> | ||
33 | |||
34 | #include "crmregs-imx3.h" | 30 | #include "crmregs-imx3.h" |
31 | #include "devices/devices-common.h" | ||
32 | #include "hardware.h" | ||
33 | #include "iomux-v3.h" | ||
35 | 34 | ||
36 | void __iomem *mx3_ccm_base; | 35 | void __iomem *mx3_ccm_base; |
37 | 36 | ||
@@ -175,6 +174,8 @@ void __init imx31_soc_init(void) | |||
175 | 174 | ||
176 | imx3_init_l2x0(); | 175 | imx3_init_l2x0(); |
177 | 176 | ||
177 | mxc_device_init(); | ||
178 | |||
178 | mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); | 179 | mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); |
179 | mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); | 180 | mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); |
180 | mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); | 181 | mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); |
@@ -271,6 +272,8 @@ void __init imx35_soc_init(void) | |||
271 | 272 | ||
272 | imx3_init_l2x0(); | 273 | imx3_init_l2x0(); |
273 | 274 | ||
275 | mxc_device_init(); | ||
276 | |||
274 | mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); | 277 | mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); |
275 | mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); | 278 | mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); |
276 | mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); | 279 | mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); |
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index acb0aadb4255..f92caf1b30ba 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c | |||
@@ -18,10 +18,10 @@ | |||
18 | 18 | ||
19 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
20 | 20 | ||
21 | #include <mach/hardware.h> | 21 | #include "common.h" |
22 | #include <mach/common.h> | 22 | #include "devices/devices-common.h" |
23 | #include <mach/devices-common.h> | 23 | #include "hardware.h" |
24 | #include <mach/iomux-v3.h> | 24 | #include "iomux-v3.h" |
25 | 25 | ||
26 | /* | 26 | /* |
27 | * Define the MX50 memory map. | 27 | * Define the MX50 memory map. |
@@ -138,6 +138,8 @@ static const struct resource imx51_audmux_res[] __initconst = { | |||
138 | 138 | ||
139 | void __init imx50_soc_init(void) | 139 | void __init imx50_soc_init(void) |
140 | { | 140 | { |
141 | mxc_device_init(); | ||
142 | |||
141 | /* i.mx50 has the i.mx35 type gpio */ | 143 | /* i.mx50 has the i.mx35 type gpio */ |
142 | mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); | 144 | mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); |
143 | mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); | 145 | mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); |
@@ -153,6 +155,8 @@ void __init imx50_soc_init(void) | |||
153 | 155 | ||
154 | void __init imx51_soc_init(void) | 156 | void __init imx51_soc_init(void) |
155 | { | 157 | { |
158 | mxc_device_init(); | ||
159 | |||
156 | /* i.mx51 has the i.mx35 type gpio */ | 160 | /* i.mx51 has the i.mx35 type gpio */ |
157 | mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); | 161 | mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); |
158 | mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); | 162 | mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); |
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/mach-imx/mx1.h index 45bd31cc34d6..45bd31cc34d6 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/mach-imx/mx1.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/mach-imx/mx21.h index 468738aa997f..468738aa997f 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/mach-imx/mx21.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/mach-imx/mx25.h index ec466400a200..ec466400a200 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/mach-imx/mx25.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/mach-imx/mx27.h index e074616d54ca..e074616d54ca 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/mach-imx/mx27.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/mach-imx/mx2x.h index 11642f5b224c..11642f5b224c 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/mach-imx/mx2x.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/mach-imx/mx31.h index ee9b1f9215df..ee9b1f9215df 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/mach-imx/mx31.h | |||
diff --git a/arch/arm/mach-imx/mx31lilly-db.c b/arch/arm/mach-imx/mx31lilly-db.c index 29e890f92055..d4361b80c5fb 100644 --- a/arch/arm/mach-imx/mx31lilly-db.c +++ b/arch/arm/mach-imx/mx31lilly-db.c | |||
@@ -30,12 +30,11 @@ | |||
30 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
31 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
32 | 32 | ||
33 | #include <mach/hardware.h> | 33 | #include "board-mx31lilly.h" |
34 | #include <mach/common.h> | 34 | #include "common.h" |
35 | #include <mach/iomux-mx3.h> | ||
36 | #include <mach/board-mx31lilly.h> | ||
37 | |||
38 | #include "devices-imx31.h" | 35 | #include "devices-imx31.h" |
36 | #include "hardware.h" | ||
37 | #include "iomux-mx3.h" | ||
39 | 38 | ||
40 | /* | 39 | /* |
41 | * This file contains board-specific initialization routines for the | 40 | * This file contains board-specific initialization routines for the |
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index 83d17d9e0bc8..5a160b7e4fce 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c | |||
@@ -31,12 +31,11 @@ | |||
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
33 | 33 | ||
34 | #include <mach/hardware.h> | 34 | #include "board-mx31lite.h" |
35 | #include <mach/common.h> | 35 | #include "common.h" |
36 | #include <mach/iomux-mx3.h> | ||
37 | #include <mach/board-mx31lite.h> | ||
38 | |||
39 | #include "devices-imx31.h" | 36 | #include "devices-imx31.h" |
37 | #include "hardware.h" | ||
38 | #include "iomux-mx3.h" | ||
40 | 39 | ||
41 | /* | 40 | /* |
42 | * This file contains board-specific initialization routines for the | 41 | * This file contains board-specific initialization routines for the |
diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c index cc285e507286..52d5b1574721 100644 --- a/arch/arm/mach-imx/mx31moboard-devboard.c +++ b/arch/arm/mach-imx/mx31moboard-devboard.c | |||
@@ -22,12 +22,11 @@ | |||
22 | 22 | ||
23 | #include <linux/usb/otg.h> | 23 | #include <linux/usb/otg.h> |
24 | 24 | ||
25 | #include <mach/common.h> | 25 | #include "common.h" |
26 | #include <mach/iomux-mx3.h> | ||
27 | #include <mach/hardware.h> | ||
28 | #include <mach/ulpi.h> | ||
29 | |||
30 | #include "devices-imx31.h" | 26 | #include "devices-imx31.h" |
27 | #include "hardware.h" | ||
28 | #include "iomux-mx3.h" | ||
29 | #include "ulpi.h" | ||
31 | 30 | ||
32 | static unsigned int devboard_pins[] = { | 31 | static unsigned int devboard_pins[] = { |
33 | /* UART1 */ | 32 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c index 135c90e3a45f..a4f43e90f3c1 100644 --- a/arch/arm/mach-imx/mx31moboard-marxbot.c +++ b/arch/arm/mach-imx/mx31moboard-marxbot.c | |||
@@ -24,14 +24,13 @@ | |||
24 | 24 | ||
25 | #include <linux/usb/otg.h> | 25 | #include <linux/usb/otg.h> |
26 | 26 | ||
27 | #include <mach/common.h> | ||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/iomux-mx3.h> | ||
30 | #include <mach/ulpi.h> | ||
31 | |||
32 | #include <media/soc_camera.h> | 27 | #include <media/soc_camera.h> |
33 | 28 | ||
29 | #include "common.h" | ||
34 | #include "devices-imx31.h" | 30 | #include "devices-imx31.h" |
31 | #include "hardware.h" | ||
32 | #include "iomux-mx3.h" | ||
33 | #include "ulpi.h" | ||
35 | 34 | ||
36 | static unsigned int marxbot_pins[] = { | 35 | static unsigned int marxbot_pins[] = { |
37 | /* SDHC2 */ | 36 | /* SDHC2 */ |
diff --git a/arch/arm/mach-imx/mx31moboard-smartbot.c b/arch/arm/mach-imx/mx31moboard-smartbot.c index fabb801e7994..04ae45dbfaa7 100644 --- a/arch/arm/mach-imx/mx31moboard-smartbot.c +++ b/arch/arm/mach-imx/mx31moboard-smartbot.c | |||
@@ -23,15 +23,14 @@ | |||
23 | #include <linux/usb/otg.h> | 23 | #include <linux/usb/otg.h> |
24 | #include <linux/usb/ulpi.h> | 24 | #include <linux/usb/ulpi.h> |
25 | 25 | ||
26 | #include <mach/common.h> | ||
27 | #include <mach/hardware.h> | ||
28 | #include <mach/iomux-mx3.h> | ||
29 | #include <mach/board-mx31moboard.h> | ||
30 | #include <mach/ulpi.h> | ||
31 | |||
32 | #include <media/soc_camera.h> | 26 | #include <media/soc_camera.h> |
33 | 27 | ||
28 | #include "board-mx31moboard.h" | ||
29 | #include "common.h" | ||
34 | #include "devices-imx31.h" | 30 | #include "devices-imx31.h" |
31 | #include "hardware.h" | ||
32 | #include "iomux-mx3.h" | ||
33 | #include "ulpi.h" | ||
35 | 34 | ||
36 | static unsigned int smartbot_pins[] = { | 35 | static unsigned int smartbot_pins[] = { |
37 | /* UART1 */ | 36 | /* UART1 */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/mach-imx/mx35.h index 2af5d3a699c7..2af5d3a699c7 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/mach-imx/mx35.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/mach-imx/mx3x.h index 96fb4fbc8ad7..96fb4fbc8ad7 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/mach-imx/mx3x.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/mach-imx/mx50.h index 09ac19c1570c..09ac19c1570c 100644 --- a/arch/arm/plat-mxc/include/mach/mx50.h +++ b/arch/arm/mach-imx/mx50.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/mach-imx/mx51.h index af844f76261a..af844f76261a 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/mach-imx/mx51.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/mach-imx/mx53.h index f829d1c22501..f829d1c22501 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/mach-imx/mx53.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/mach-imx/mx6q.h index f7e7dbac8f4b..f7e7dbac8f4b 100644 --- a/arch/arm/plat-mxc/include/mach/mx6q.h +++ b/arch/arm/mach-imx/mx6q.h | |||
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/mach-imx/mxc.h index d78298366a91..d78298366a91 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/mach-imx/mxc.h | |||
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c index 9917e2ff51da..51c608234089 100644 --- a/arch/arm/mach-imx/pcm970-baseboard.c +++ b/arch/arm/mach-imx/pcm970-baseboard.c | |||
@@ -23,11 +23,10 @@ | |||
23 | 23 | ||
24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
25 | 25 | ||
26 | #include <mach/common.h> | 26 | #include "common.h" |
27 | #include <mach/iomux-mx27.h> | ||
28 | #include <mach/hardware.h> | ||
29 | |||
30 | #include "devices-imx27.h" | 27 | #include "devices-imx27.h" |
28 | #include "hardware.h" | ||
29 | #include "iomux-mx27.h" | ||
31 | 30 | ||
32 | static const int pcm970_pins[] __initconst = { | 31 | static const int pcm970_pins[] __initconst = { |
33 | /* SDHC */ | 32 | /* SDHC */ |
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 2ac43e1a2dfd..3777b805b76b 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c | |||
@@ -16,8 +16,9 @@ | |||
16 | #include <asm/smp_scu.h> | 16 | #include <asm/smp_scu.h> |
17 | #include <asm/hardware/gic.h> | 17 | #include <asm/hardware/gic.h> |
18 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
19 | #include <mach/common.h> | 19 | |
20 | #include <mach/hardware.h> | 20 | #include "common.h" |
21 | #include "hardware.h" | ||
21 | 22 | ||
22 | static void __iomem *scu_base; | 23 | static void __iomem *scu_base; |
23 | 24 | ||
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index 6fcffa7db978..56d02d064fbf 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c | |||
@@ -10,7 +10,8 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/suspend.h> | 11 | #include <linux/suspend.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <mach/hardware.h> | 13 | |
14 | #include "hardware.h" | ||
14 | 15 | ||
15 | static int mx27_suspend_enter(suspend_state_t state) | 16 | static int mx27_suspend_enter(suspend_state_t state) |
16 | { | 17 | { |
diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c index 822103bdb709..6a07006ff0f4 100644 --- a/arch/arm/mach-imx/pm-imx3.c +++ b/arch/arm/mach-imx/pm-imx3.c | |||
@@ -9,10 +9,11 @@ | |||
9 | * http://www.gnu.org/copyleft/gpl.html | 9 | * http://www.gnu.org/copyleft/gpl.html |
10 | */ | 10 | */ |
11 | #include <linux/io.h> | 11 | #include <linux/io.h> |
12 | #include <mach/common.h> | 12 | |
13 | #include <mach/hardware.h> | 13 | #include "common.h" |
14 | #include <mach/devices-common.h> | ||
15 | #include "crmregs-imx3.h" | 14 | #include "crmregs-imx3.h" |
15 | #include "devices/devices-common.h" | ||
16 | #include "hardware.h" | ||
16 | 17 | ||
17 | /* | 18 | /* |
18 | * Set cpu low power mode before WFI instruction. This function is called | 19 | * Set cpu low power mode before WFI instruction. This function is called |
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c index 19621ed1ffa5..2e063c2deb9e 100644 --- a/arch/arm/mach-imx/pm-imx5.c +++ b/arch/arm/mach-imx/pm-imx5.c | |||
@@ -16,10 +16,11 @@ | |||
16 | #include <asm/cacheflush.h> | 16 | #include <asm/cacheflush.h> |
17 | #include <asm/system_misc.h> | 17 | #include <asm/system_misc.h> |
18 | #include <asm/tlbflush.h> | 18 | #include <asm/tlbflush.h> |
19 | #include <mach/common.h> | 19 | |
20 | #include <mach/cpuidle.h> | 20 | #include "common.h" |
21 | #include <mach/hardware.h> | 21 | #include "cpuidle.h" |
22 | #include "crm-regs-imx5.h" | 22 | #include "crm-regs-imx5.h" |
23 | #include "hardware.h" | ||
23 | 24 | ||
24 | /* | 25 | /* |
25 | * The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit. | 26 | * The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit. |
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index f7b0c2b1b905..a17543da602d 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c | |||
@@ -18,8 +18,9 @@ | |||
18 | #include <asm/proc-fns.h> | 18 | #include <asm/proc-fns.h> |
19 | #include <asm/suspend.h> | 19 | #include <asm/suspend.h> |
20 | #include <asm/hardware/cache-l2x0.h> | 20 | #include <asm/hardware/cache-l2x0.h> |
21 | #include <mach/common.h> | 21 | |
22 | #include <mach/hardware.h> | 22 | #include "common.h" |
23 | #include "hardware.h" | ||
23 | 24 | ||
24 | extern unsigned long phys_l2x0_saved_regs; | 25 | extern unsigned long phys_l2x0_saved_regs; |
25 | 26 | ||
diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/mach-imx/ssi-fiq-ksym.c index 792090f9a032..792090f9a032 100644 --- a/arch/arm/plat-mxc/ssi-fiq-ksym.c +++ b/arch/arm/mach-imx/ssi-fiq-ksym.c | |||
diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/mach-imx/ssi-fiq.S index a8b93c5f29b5..a8b93c5f29b5 100644 --- a/arch/arm/plat-mxc/ssi-fiq.S +++ b/arch/arm/mach-imx/ssi-fiq.S | |||
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/mach-imx/system.c index 3da78cfc5a94..695e0d73bf85 100644 --- a/arch/arm/plat-mxc/system.c +++ b/arch/arm/mach-imx/system.c | |||
@@ -22,12 +22,13 @@ | |||
22 | #include <linux/err.h> | 22 | #include <linux/err.h> |
23 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
24 | 24 | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/common.h> | ||
27 | #include <asm/system_misc.h> | 25 | #include <asm/system_misc.h> |
28 | #include <asm/proc-fns.h> | 26 | #include <asm/proc-fns.h> |
29 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
30 | 28 | ||
29 | #include "common.h" | ||
30 | #include "hardware.h" | ||
31 | |||
31 | static void __iomem *wdog_base; | 32 | static void __iomem *wdog_base; |
32 | 33 | ||
33 | /* | 34 | /* |
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/mach-imx/time.c index a17abcf98325..f017302f6d09 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/mach-imx/time.c | |||
@@ -27,10 +27,11 @@ | |||
27 | #include <linux/clk.h> | 27 | #include <linux/clk.h> |
28 | #include <linux/err.h> | 28 | #include <linux/err.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | ||
31 | #include <asm/sched_clock.h> | 30 | #include <asm/sched_clock.h> |
32 | #include <asm/mach/time.h> | 31 | #include <asm/mach/time.h> |
33 | #include <mach/common.h> | 32 | |
33 | #include "common.h" | ||
34 | #include "hardware.h" | ||
34 | 35 | ||
35 | /* | 36 | /* |
36 | * There are 2 versions of the timer hardware on Freescale MXC hardware. | 37 | * There are 2 versions of the timer hardware on Freescale MXC hardware. |
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/mach-imx/tzic.c index 3ed1adbc09f8..9721161f208f 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/mach-imx/tzic.c | |||
@@ -21,10 +21,8 @@ | |||
21 | #include <asm/mach/irq.h> | 21 | #include <asm/mach/irq.h> |
22 | #include <asm/exception.h> | 22 | #include <asm/exception.h> |
23 | 23 | ||
24 | #include <mach/hardware.h> | 24 | #include "common.h" |
25 | #include <mach/common.h> | 25 | #include "hardware.h" |
26 | #include <mach/irqs.h> | ||
27 | |||
28 | #include "irq-common.h" | 26 | #include "irq-common.h" |
29 | 27 | ||
30 | /* | 28 | /* |
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/mach-imx/ulpi.c index d2963427184f..0f051957d10c 100644 --- a/arch/arm/plat-mxc/ulpi.c +++ b/arch/arm/mach-imx/ulpi.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/usb/otg.h> | 24 | #include <linux/usb/otg.h> |
25 | #include <linux/usb/ulpi.h> | 25 | #include <linux/usb/ulpi.h> |
26 | 26 | ||
27 | #include <mach/ulpi.h> | 27 | #include "ulpi.h" |
28 | 28 | ||
29 | /* ULPIVIEW register bits */ | 29 | /* ULPIVIEW register bits */ |
30 | #define ULPIVW_WU (1 << 31) /* Wakeup */ | 30 | #define ULPIVW_WU (1 << 31) /* Wakeup */ |
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/mach-imx/ulpi.h index 42bdaca6d7d9..42bdaca6d7d9 100644 --- a/arch/arm/plat-mxc/include/mach/ulpi.h +++ b/arch/arm/mach-imx/ulpi.h | |||
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 350e26636a06..abeff25532ab 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig | |||
@@ -8,6 +8,7 @@ config ARCH_INTEGRATOR_AP | |||
8 | select MIGHT_HAVE_PCI | 8 | select MIGHT_HAVE_PCI |
9 | select SERIAL_AMBA_PL010 | 9 | select SERIAL_AMBA_PL010 |
10 | select SERIAL_AMBA_PL010_CONSOLE | 10 | select SERIAL_AMBA_PL010_CONSOLE |
11 | select SOC_BUS | ||
11 | help | 12 | help |
12 | Include support for the ARM(R) Integrator/AP and | 13 | Include support for the ARM(R) Integrator/AP and |
13 | Integrator/PP2 platforms. | 14 | Integrator/PP2 platforms. |
@@ -19,6 +20,7 @@ config ARCH_INTEGRATOR_CP | |||
19 | select PLAT_VERSATILE_CLCD | 20 | select PLAT_VERSATILE_CLCD |
20 | select SERIAL_AMBA_PL011 | 21 | select SERIAL_AMBA_PL011 |
21 | select SERIAL_AMBA_PL011_CONSOLE | 22 | select SERIAL_AMBA_PL011_CONSOLE |
23 | select SOC_BUS | ||
22 | help | 24 | help |
23 | Include support for the ARM(R) Integrator CP platform. | 25 | Include support for the ARM(R) Integrator CP platform. |
24 | 26 | ||
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h index c3ff21b5ea24..79197d8b34aa 100644 --- a/arch/arm/mach-integrator/common.h +++ b/arch/arm/mach-integrator/common.h | |||
@@ -1,6 +1,12 @@ | |||
1 | #include <linux/amba/serial.h> | 1 | #include <linux/amba/serial.h> |
2 | extern struct amba_pl010_data integrator_uart_data; | 2 | #ifdef CONFIG_ARCH_INTEGRATOR_AP |
3 | extern struct amba_pl010_data ap_uart_data; | ||
4 | #else | ||
5 | /* Not used without Integrator/AP support anyway */ | ||
6 | struct amba_pl010_data ap_uart_data {}; | ||
7 | #endif | ||
3 | void integrator_init_early(void); | 8 | void integrator_init_early(void); |
4 | int integrator_init(bool is_cp); | 9 | int integrator_init(bool is_cp); |
5 | void integrator_reserve(void); | 10 | void integrator_reserve(void); |
6 | void integrator_restart(char, const char *); | 11 | void integrator_restart(char, const char *); |
12 | void integrator_init_sysfs(struct device *parent, u32 id); | ||
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index ea22a17246d7..39c060f75e47 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c | |||
@@ -18,10 +18,10 @@ | |||
18 | #include <linux/memblock.h> | 18 | #include <linux/memblock.h> |
19 | #include <linux/sched.h> | 19 | #include <linux/sched.h> |
20 | #include <linux/smp.h> | 20 | #include <linux/smp.h> |
21 | #include <linux/termios.h> | ||
22 | #include <linux/amba/bus.h> | 21 | #include <linux/amba/bus.h> |
23 | #include <linux/amba/serial.h> | 22 | #include <linux/amba/serial.h> |
24 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/stat.h> | ||
25 | 25 | ||
26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
27 | #include <mach/platform.h> | 27 | #include <mach/platform.h> |
@@ -46,10 +46,10 @@ static AMBA_APB_DEVICE(rtc, "rtc", 0, | |||
46 | INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); | 46 | INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); |
47 | 47 | ||
48 | static AMBA_APB_DEVICE(uart0, "uart0", 0, | 48 | static AMBA_APB_DEVICE(uart0, "uart0", 0, |
49 | INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); | 49 | INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, NULL); |
50 | 50 | ||
51 | static AMBA_APB_DEVICE(uart1, "uart1", 0, | 51 | static AMBA_APB_DEVICE(uart1, "uart1", 0, |
52 | INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); | 52 | INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, NULL); |
53 | 53 | ||
54 | static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL); | 54 | static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL); |
55 | static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL); | 55 | static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL); |
@@ -77,6 +77,8 @@ int __init integrator_init(bool is_cp) | |||
77 | uart1_device.periphid = 0x00041010; | 77 | uart1_device.periphid = 0x00041010; |
78 | kmi0_device.periphid = 0x00041050; | 78 | kmi0_device.periphid = 0x00041050; |
79 | kmi1_device.periphid = 0x00041050; | 79 | kmi1_device.periphid = 0x00041050; |
80 | uart0_device.dev.platform_data = &ap_uart_data; | ||
81 | uart1_device.dev.platform_data = &ap_uart_data; | ||
80 | } | 82 | } |
81 | 83 | ||
82 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | 84 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
@@ -89,49 +91,6 @@ int __init integrator_init(bool is_cp) | |||
89 | 91 | ||
90 | #endif | 92 | #endif |
91 | 93 | ||
92 | /* | ||
93 | * On the Integrator platform, the port RTS and DTR are provided by | ||
94 | * bits in the following SC_CTRLS register bits: | ||
95 | * RTS DTR | ||
96 | * UART0 7 6 | ||
97 | * UART1 5 4 | ||
98 | */ | ||
99 | #define SC_CTRLC __io_address(INTEGRATOR_SC_CTRLC) | ||
100 | #define SC_CTRLS __io_address(INTEGRATOR_SC_CTRLS) | ||
101 | |||
102 | static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) | ||
103 | { | ||
104 | unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask; | ||
105 | u32 phybase = dev->res.start; | ||
106 | |||
107 | if (phybase == INTEGRATOR_UART0_BASE) { | ||
108 | /* UART0 */ | ||
109 | rts_mask = 1 << 4; | ||
110 | dtr_mask = 1 << 5; | ||
111 | } else { | ||
112 | /* UART1 */ | ||
113 | rts_mask = 1 << 6; | ||
114 | dtr_mask = 1 << 7; | ||
115 | } | ||
116 | |||
117 | if (mctrl & TIOCM_RTS) | ||
118 | ctrlc |= rts_mask; | ||
119 | else | ||
120 | ctrls |= rts_mask; | ||
121 | |||
122 | if (mctrl & TIOCM_DTR) | ||
123 | ctrlc |= dtr_mask; | ||
124 | else | ||
125 | ctrls |= dtr_mask; | ||
126 | |||
127 | __raw_writel(ctrls, SC_CTRLS); | ||
128 | __raw_writel(ctrlc, SC_CTRLC); | ||
129 | } | ||
130 | |||
131 | struct amba_pl010_data integrator_uart_data = { | ||
132 | .set_mctrl = integrator_uart_set_mctrl, | ||
133 | }; | ||
134 | |||
135 | static DEFINE_RAW_SPINLOCK(cm_lock); | 94 | static DEFINE_RAW_SPINLOCK(cm_lock); |
136 | 95 | ||
137 | /** | 96 | /** |
@@ -169,3 +128,93 @@ void integrator_restart(char mode, const char *cmd) | |||
169 | { | 128 | { |
170 | cm_control(CM_CTRL_RESET, CM_CTRL_RESET); | 129 | cm_control(CM_CTRL_RESET, CM_CTRL_RESET); |
171 | } | 130 | } |
131 | |||
132 | static u32 integrator_id; | ||
133 | |||
134 | static ssize_t intcp_get_manf(struct device *dev, | ||
135 | struct device_attribute *attr, | ||
136 | char *buf) | ||
137 | { | ||
138 | return sprintf(buf, "%02x\n", integrator_id >> 24); | ||
139 | } | ||
140 | |||
141 | static struct device_attribute intcp_manf_attr = | ||
142 | __ATTR(manufacturer, S_IRUGO, intcp_get_manf, NULL); | ||
143 | |||
144 | static ssize_t intcp_get_arch(struct device *dev, | ||
145 | struct device_attribute *attr, | ||
146 | char *buf) | ||
147 | { | ||
148 | const char *arch; | ||
149 | |||
150 | switch ((integrator_id >> 16) & 0xff) { | ||
151 | case 0x00: | ||
152 | arch = "ASB little-endian"; | ||
153 | break; | ||
154 | case 0x01: | ||
155 | arch = "AHB little-endian"; | ||
156 | break; | ||
157 | case 0x03: | ||
158 | arch = "AHB-Lite system bus, bi-endian"; | ||
159 | break; | ||
160 | case 0x04: | ||
161 | arch = "AHB"; | ||
162 | break; | ||
163 | default: | ||
164 | arch = "Unknown"; | ||
165 | break; | ||
166 | } | ||
167 | |||
168 | return sprintf(buf, "%s\n", arch); | ||
169 | } | ||
170 | |||
171 | static struct device_attribute intcp_arch_attr = | ||
172 | __ATTR(architecture, S_IRUGO, intcp_get_arch, NULL); | ||
173 | |||
174 | static ssize_t intcp_get_fpga(struct device *dev, | ||
175 | struct device_attribute *attr, | ||
176 | char *buf) | ||
177 | { | ||
178 | const char *fpga; | ||
179 | |||
180 | switch ((integrator_id >> 12) & 0xf) { | ||
181 | case 0x01: | ||
182 | fpga = "XC4062"; | ||
183 | break; | ||
184 | case 0x02: | ||
185 | fpga = "XC4085"; | ||
186 | break; | ||
187 | case 0x04: | ||
188 | fpga = "EPM7256AE (Altera PLD)"; | ||
189 | break; | ||
190 | default: | ||
191 | fpga = "Unknown"; | ||
192 | break; | ||
193 | } | ||
194 | |||
195 | return sprintf(buf, "%s\n", fpga); | ||
196 | } | ||
197 | |||
198 | static struct device_attribute intcp_fpga_attr = | ||
199 | __ATTR(fpga, S_IRUGO, intcp_get_fpga, NULL); | ||
200 | |||
201 | static ssize_t intcp_get_build(struct device *dev, | ||
202 | struct device_attribute *attr, | ||
203 | char *buf) | ||
204 | { | ||
205 | return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF); | ||
206 | } | ||
207 | |||
208 | static struct device_attribute intcp_build_attr = | ||
209 | __ATTR(build, S_IRUGO, intcp_get_build, NULL); | ||
210 | |||
211 | |||
212 | |||
213 | void integrator_init_sysfs(struct device *parent, u32 id) | ||
214 | { | ||
215 | integrator_id = id; | ||
216 | device_create_file(parent, &intcp_manf_attr); | ||
217 | device_create_file(parent, &intcp_arch_attr); | ||
218 | device_create_file(parent, &intcp_fpga_attr); | ||
219 | device_create_file(parent, &intcp_build_attr); | ||
220 | } | ||
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h index efeac5d0bc9e..be5859efe10e 100644 --- a/arch/arm/mach-integrator/include/mach/platform.h +++ b/arch/arm/mach-integrator/include/mach/platform.h | |||
@@ -190,7 +190,6 @@ | |||
190 | #define INTEGRATOR_SC_CTRLC_OFFSET 0x0C | 190 | #define INTEGRATOR_SC_CTRLC_OFFSET 0x0C |
191 | #define INTEGRATOR_SC_DEC_OFFSET 0x10 | 191 | #define INTEGRATOR_SC_DEC_OFFSET 0x10 |
192 | #define INTEGRATOR_SC_ARB_OFFSET 0x14 | 192 | #define INTEGRATOR_SC_ARB_OFFSET 0x14 |
193 | #define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 | ||
194 | #define INTEGRATOR_SC_LOCK_OFFSET 0x1C | 193 | #define INTEGRATOR_SC_LOCK_OFFSET 0x1C |
195 | 194 | ||
196 | #define INTEGRATOR_SC_BASE 0x11000000 | 195 | #define INTEGRATOR_SC_BASE 0x11000000 |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index e6617c134faf..a0a7cbbb7a70 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -37,6 +37,9 @@ | |||
37 | #include <linux/of_irq.h> | 37 | #include <linux/of_irq.h> |
38 | #include <linux/of_address.h> | 38 | #include <linux/of_address.h> |
39 | #include <linux/of_platform.h> | 39 | #include <linux/of_platform.h> |
40 | #include <linux/stat.h> | ||
41 | #include <linux/sys_soc.h> | ||
42 | #include <linux/termios.h> | ||
40 | #include <video/vga.h> | 43 | #include <video/vga.h> |
41 | 44 | ||
42 | #include <mach/hardware.h> | 45 | #include <mach/hardware.h> |
@@ -60,7 +63,10 @@ | |||
60 | 63 | ||
61 | #include "common.h" | 64 | #include "common.h" |
62 | 65 | ||
63 | /* | 66 | /* Base address to the AP system controller */ |
67 | void __iomem *ap_syscon_base; | ||
68 | |||
69 | /* | ||
64 | * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx | 70 | * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx |
65 | * is the (PA >> 12). | 71 | * is the (PA >> 12). |
66 | * | 72 | * |
@@ -68,7 +74,6 @@ | |||
68 | * just for now). | 74 | * just for now). |
69 | */ | 75 | */ |
70 | #define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE) | 76 | #define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE) |
71 | #define VA_SC_BASE __io_address(INTEGRATOR_SC_BASE) | ||
72 | #define VA_EBI_BASE __io_address(INTEGRATOR_EBI_BASE) | 77 | #define VA_EBI_BASE __io_address(INTEGRATOR_EBI_BASE) |
73 | #define VA_CMIC_BASE __io_address(INTEGRATOR_HDR_IC) | 78 | #define VA_CMIC_BASE __io_address(INTEGRATOR_HDR_IC) |
74 | 79 | ||
@@ -97,11 +102,6 @@ static struct map_desc ap_io_desc[] __initdata = { | |||
97 | .length = SZ_4K, | 102 | .length = SZ_4K, |
98 | .type = MT_DEVICE | 103 | .type = MT_DEVICE |
99 | }, { | 104 | }, { |
100 | .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE), | ||
101 | .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE), | ||
102 | .length = SZ_4K, | ||
103 | .type = MT_DEVICE | ||
104 | }, { | ||
105 | .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), | 105 | .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), |
106 | .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE), | 106 | .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE), |
107 | .length = SZ_4K, | 107 | .length = SZ_4K, |
@@ -122,11 +122,6 @@ static struct map_desc ap_io_desc[] __initdata = { | |||
122 | .length = SZ_4K, | 122 | .length = SZ_4K, |
123 | .type = MT_DEVICE | 123 | .type = MT_DEVICE |
124 | }, { | 124 | }, { |
125 | .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE), | ||
126 | .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE), | ||
127 | .length = SZ_4K, | ||
128 | .type = MT_DEVICE | ||
129 | }, { | ||
130 | .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), | 125 | .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), |
131 | .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), | 126 | .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), |
132 | .length = SZ_4K, | 127 | .length = SZ_4K, |
@@ -201,8 +196,6 @@ device_initcall(irq_syscore_init); | |||
201 | /* | 196 | /* |
202 | * Flash handling. | 197 | * Flash handling. |
203 | */ | 198 | */ |
204 | #define SC_CTRLC (VA_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET) | ||
205 | #define SC_CTRLS (VA_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET) | ||
206 | #define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET) | 199 | #define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET) |
207 | #define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET) | 200 | #define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET) |
208 | 201 | ||
@@ -210,7 +203,8 @@ static int ap_flash_init(struct platform_device *dev) | |||
210 | { | 203 | { |
211 | u32 tmp; | 204 | u32 tmp; |
212 | 205 | ||
213 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC); | 206 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, |
207 | ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); | ||
214 | 208 | ||
215 | tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE; | 209 | tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE; |
216 | writel(tmp, EBI_CSR1); | 210 | writel(tmp, EBI_CSR1); |
@@ -227,7 +221,8 @@ static void ap_flash_exit(struct platform_device *dev) | |||
227 | { | 221 | { |
228 | u32 tmp; | 222 | u32 tmp; |
229 | 223 | ||
230 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC); | 224 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, |
225 | ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); | ||
231 | 226 | ||
232 | tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE; | 227 | tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE; |
233 | writel(tmp, EBI_CSR1); | 228 | writel(tmp, EBI_CSR1); |
@@ -241,9 +236,12 @@ static void ap_flash_exit(struct platform_device *dev) | |||
241 | 236 | ||
242 | static void ap_flash_set_vpp(struct platform_device *pdev, int on) | 237 | static void ap_flash_set_vpp(struct platform_device *pdev, int on) |
243 | { | 238 | { |
244 | void __iomem *reg = on ? SC_CTRLS : SC_CTRLC; | 239 | if (on) |
245 | 240 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN, | |
246 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg); | 241 | ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET); |
242 | else | ||
243 | writel(INTEGRATOR_SC_CTRL_nFLVPPEN, | ||
244 | ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); | ||
247 | } | 245 | } |
248 | 246 | ||
249 | static struct physmap_flash_data ap_flash_data = { | 247 | static struct physmap_flash_data ap_flash_data = { |
@@ -254,6 +252,45 @@ static struct physmap_flash_data ap_flash_data = { | |||
254 | }; | 252 | }; |
255 | 253 | ||
256 | /* | 254 | /* |
255 | * For the PL010 found in the Integrator/AP some of the UART control is | ||
256 | * implemented in the system controller and accessed using a callback | ||
257 | * from the driver. | ||
258 | */ | ||
259 | static void integrator_uart_set_mctrl(struct amba_device *dev, | ||
260 | void __iomem *base, unsigned int mctrl) | ||
261 | { | ||
262 | unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask; | ||
263 | u32 phybase = dev->res.start; | ||
264 | |||
265 | if (phybase == INTEGRATOR_UART0_BASE) { | ||
266 | /* UART0 */ | ||
267 | rts_mask = 1 << 4; | ||
268 | dtr_mask = 1 << 5; | ||
269 | } else { | ||
270 | /* UART1 */ | ||
271 | rts_mask = 1 << 6; | ||
272 | dtr_mask = 1 << 7; | ||
273 | } | ||
274 | |||
275 | if (mctrl & TIOCM_RTS) | ||
276 | ctrlc |= rts_mask; | ||
277 | else | ||
278 | ctrls |= rts_mask; | ||
279 | |||
280 | if (mctrl & TIOCM_DTR) | ||
281 | ctrlc |= dtr_mask; | ||
282 | else | ||
283 | ctrls |= dtr_mask; | ||
284 | |||
285 | __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET); | ||
286 | __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); | ||
287 | } | ||
288 | |||
289 | struct amba_pl010_data ap_uart_data = { | ||
290 | .set_mctrl = integrator_uart_set_mctrl, | ||
291 | }; | ||
292 | |||
293 | /* | ||
257 | * Where is the timer (VA)? | 294 | * Where is the timer (VA)? |
258 | */ | 295 | */ |
259 | #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE) | 296 | #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE) |
@@ -450,9 +487,9 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { | |||
450 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE, | 487 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE, |
451 | "rtc", NULL), | 488 | "rtc", NULL), |
452 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE, | 489 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE, |
453 | "uart0", &integrator_uart_data), | 490 | "uart0", &ap_uart_data), |
454 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE, | 491 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE, |
455 | "uart1", &integrator_uart_data), | 492 | "uart1", &ap_uart_data), |
456 | OF_DEV_AUXDATA("arm,primecell", KMI0_BASE, | 493 | OF_DEV_AUXDATA("arm,primecell", KMI0_BASE, |
457 | "kmi0", NULL), | 494 | "kmi0", NULL), |
458 | OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, | 495 | OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, |
@@ -465,12 +502,60 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { | |||
465 | static void __init ap_init_of(void) | 502 | static void __init ap_init_of(void) |
466 | { | 503 | { |
467 | unsigned long sc_dec; | 504 | unsigned long sc_dec; |
505 | struct device_node *root; | ||
506 | struct device_node *syscon; | ||
507 | struct device *parent; | ||
508 | struct soc_device *soc_dev; | ||
509 | struct soc_device_attribute *soc_dev_attr; | ||
510 | u32 ap_sc_id; | ||
511 | int err; | ||
468 | int i; | 512 | int i; |
469 | 513 | ||
470 | of_platform_populate(NULL, of_default_bus_match_table, | 514 | /* Here we create an SoC device for the root node */ |
471 | ap_auxdata_lookup, NULL); | 515 | root = of_find_node_by_path("/"); |
516 | if (!root) | ||
517 | return; | ||
518 | syscon = of_find_node_by_path("/syscon"); | ||
519 | if (!syscon) | ||
520 | return; | ||
521 | |||
522 | ap_syscon_base = of_iomap(syscon, 0); | ||
523 | if (!ap_syscon_base) | ||
524 | return; | ||
472 | 525 | ||
473 | sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET); | 526 | ap_sc_id = readl(ap_syscon_base); |
527 | |||
528 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); | ||
529 | if (!soc_dev_attr) | ||
530 | return; | ||
531 | |||
532 | err = of_property_read_string(root, "compatible", | ||
533 | &soc_dev_attr->soc_id); | ||
534 | if (err) | ||
535 | return; | ||
536 | err = of_property_read_string(root, "model", &soc_dev_attr->machine); | ||
537 | if (err) | ||
538 | return; | ||
539 | soc_dev_attr->family = "Integrator"; | ||
540 | soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", | ||
541 | 'A' + (ap_sc_id & 0x0f)); | ||
542 | |||
543 | soc_dev = soc_device_register(soc_dev_attr); | ||
544 | if (IS_ERR_OR_NULL(soc_dev)) { | ||
545 | kfree(soc_dev_attr->revision); | ||
546 | kfree(soc_dev_attr); | ||
547 | return; | ||
548 | } | ||
549 | |||
550 | parent = soc_device_to_device(soc_dev); | ||
551 | |||
552 | if (!IS_ERR_OR_NULL(parent)) | ||
553 | integrator_init_sysfs(parent, ap_sc_id); | ||
554 | |||
555 | of_platform_populate(root, of_default_bus_match_table, | ||
556 | ap_auxdata_lookup, parent); | ||
557 | |||
558 | sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); | ||
474 | for (i = 0; i < 4; i++) { | 559 | for (i = 0; i < 4; i++) { |
475 | struct lm_device *lmdev; | 560 | struct lm_device *lmdev; |
476 | 561 | ||
@@ -514,6 +599,27 @@ MACHINE_END | |||
514 | #ifdef CONFIG_ATAGS | 599 | #ifdef CONFIG_ATAGS |
515 | 600 | ||
516 | /* | 601 | /* |
602 | * For the ATAG boot some static mappings are needed. This will | ||
603 | * go away with the ATAG support down the road. | ||
604 | */ | ||
605 | |||
606 | static struct map_desc ap_io_desc_atag[] __initdata = { | ||
607 | { | ||
608 | .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE), | ||
609 | .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE), | ||
610 | .length = SZ_4K, | ||
611 | .type = MT_DEVICE | ||
612 | }, | ||
613 | }; | ||
614 | |||
615 | static void __init ap_map_io_atag(void) | ||
616 | { | ||
617 | iotable_init(ap_io_desc_atag, ARRAY_SIZE(ap_io_desc_atag)); | ||
618 | ap_syscon_base = __io_address(INTEGRATOR_SC_BASE); | ||
619 | ap_map_io(); | ||
620 | } | ||
621 | |||
622 | /* | ||
517 | * This is where non-devicetree initialization code is collected and stashed | 623 | * This is where non-devicetree initialization code is collected and stashed |
518 | * for eventual deletion. | 624 | * for eventual deletion. |
519 | */ | 625 | */ |
@@ -581,7 +687,7 @@ static void __init ap_init(void) | |||
581 | 687 | ||
582 | platform_device_register(&cfi_flash_device); | 688 | platform_device_register(&cfi_flash_device); |
583 | 689 | ||
584 | sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET); | 690 | sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); |
585 | for (i = 0; i < 4; i++) { | 691 | for (i = 0; i < 4; i++) { |
586 | struct lm_device *lmdev; | 692 | struct lm_device *lmdev; |
587 | 693 | ||
@@ -608,7 +714,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator") | |||
608 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | 714 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ |
609 | .atag_offset = 0x100, | 715 | .atag_offset = 0x100, |
610 | .reserve = integrator_reserve, | 716 | .reserve = integrator_reserve, |
611 | .map_io = ap_map_io, | 717 | .map_io = ap_map_io_atag, |
612 | .nr_irqs = NR_IRQS_INTEGRATOR_AP, | 718 | .nr_irqs = NR_IRQS_INTEGRATOR_AP, |
613 | .init_early = ap_init_early, | 719 | .init_early = ap_init_early, |
614 | .init_irq = ap_init_irq, | 720 | .init_irq = ap_init_irq, |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 5b08e8e4cc83..29df06b35d0d 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/of_irq.h> | 26 | #include <linux/of_irq.h> |
27 | #include <linux/of_address.h> | 27 | #include <linux/of_address.h> |
28 | #include <linux/of_platform.h> | 28 | #include <linux/of_platform.h> |
29 | #include <linux/sys_soc.h> | ||
29 | 30 | ||
30 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
31 | #include <mach/platform.h> | 32 | #include <mach/platform.h> |
@@ -51,11 +52,13 @@ | |||
51 | 52 | ||
52 | #include "common.h" | 53 | #include "common.h" |
53 | 54 | ||
55 | /* Base address to the CP controller */ | ||
56 | static void __iomem *intcp_con_base; | ||
57 | |||
54 | #define INTCP_PA_FLASH_BASE 0x24000000 | 58 | #define INTCP_PA_FLASH_BASE 0x24000000 |
55 | 59 | ||
56 | #define INTCP_PA_CLCD_BASE 0xc0000000 | 60 | #define INTCP_PA_CLCD_BASE 0xc0000000 |
57 | 61 | ||
58 | #define INTCP_VA_CTRL_BASE __io_address(INTEGRATOR_CP_CTL_BASE) | ||
59 | #define INTCP_FLASHPROG 0x04 | 62 | #define INTCP_FLASHPROG 0x04 |
60 | #define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) | 63 | #define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) |
61 | #define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) | 64 | #define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) |
@@ -82,11 +85,6 @@ static struct map_desc intcp_io_desc[] __initdata = { | |||
82 | .length = SZ_4K, | 85 | .length = SZ_4K, |
83 | .type = MT_DEVICE | 86 | .type = MT_DEVICE |
84 | }, { | 87 | }, { |
85 | .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE), | ||
86 | .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE), | ||
87 | .length = SZ_4K, | ||
88 | .type = MT_DEVICE | ||
89 | }, { | ||
90 | .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), | 88 | .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), |
91 | .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE), | 89 | .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE), |
92 | .length = SZ_4K, | 90 | .length = SZ_4K, |
@@ -107,11 +105,6 @@ static struct map_desc intcp_io_desc[] __initdata = { | |||
107 | .length = SZ_4K, | 105 | .length = SZ_4K, |
108 | .type = MT_DEVICE | 106 | .type = MT_DEVICE |
109 | }, { | 107 | }, { |
110 | .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE), | ||
111 | .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE), | ||
112 | .length = SZ_4K, | ||
113 | .type = MT_DEVICE | ||
114 | }, { | ||
115 | .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), | 108 | .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), |
116 | .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), | 109 | .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), |
117 | .length = SZ_4K, | 110 | .length = SZ_4K, |
@@ -126,11 +119,6 @@ static struct map_desc intcp_io_desc[] __initdata = { | |||
126 | .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE), | 119 | .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE), |
127 | .length = SZ_4K, | 120 | .length = SZ_4K, |
128 | .type = MT_DEVICE | 121 | .type = MT_DEVICE |
129 | }, { | ||
130 | .virtual = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE), | ||
131 | .pfn = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE), | ||
132 | .length = SZ_4K, | ||
133 | .type = MT_DEVICE | ||
134 | } | 122 | } |
135 | }; | 123 | }; |
136 | 124 | ||
@@ -146,9 +134,9 @@ static int intcp_flash_init(struct platform_device *dev) | |||
146 | { | 134 | { |
147 | u32 val; | 135 | u32 val; |
148 | 136 | ||
149 | val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); | 137 | val = readl(intcp_con_base + INTCP_FLASHPROG); |
150 | val |= CINTEGRATOR_FLASHPROG_FLWREN; | 138 | val |= CINTEGRATOR_FLASHPROG_FLWREN; |
151 | writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); | 139 | writel(val, intcp_con_base + INTCP_FLASHPROG); |
152 | 140 | ||
153 | return 0; | 141 | return 0; |
154 | } | 142 | } |
@@ -157,21 +145,21 @@ static void intcp_flash_exit(struct platform_device *dev) | |||
157 | { | 145 | { |
158 | u32 val; | 146 | u32 val; |
159 | 147 | ||
160 | val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); | 148 | val = readl(intcp_con_base + INTCP_FLASHPROG); |
161 | val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN); | 149 | val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN); |
162 | writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); | 150 | writel(val, intcp_con_base + INTCP_FLASHPROG); |
163 | } | 151 | } |
164 | 152 | ||
165 | static void intcp_flash_set_vpp(struct platform_device *pdev, int on) | 153 | static void intcp_flash_set_vpp(struct platform_device *pdev, int on) |
166 | { | 154 | { |
167 | u32 val; | 155 | u32 val; |
168 | 156 | ||
169 | val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); | 157 | val = readl(intcp_con_base + INTCP_FLASHPROG); |
170 | if (on) | 158 | if (on) |
171 | val |= CINTEGRATOR_FLASHPROG_FLVPPEN; | 159 | val |= CINTEGRATOR_FLASHPROG_FLVPPEN; |
172 | else | 160 | else |
173 | val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN; | 161 | val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN; |
174 | writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG); | 162 | writel(val, intcp_con_base + INTCP_FLASHPROG); |
175 | } | 163 | } |
176 | 164 | ||
177 | static struct physmap_flash_data intcp_flash_data = { | 165 | static struct physmap_flash_data intcp_flash_data = { |
@@ -190,7 +178,7 @@ static struct physmap_flash_data intcp_flash_data = { | |||
190 | static unsigned int mmc_status(struct device *dev) | 178 | static unsigned int mmc_status(struct device *dev) |
191 | { | 179 | { |
192 | unsigned int status = readl(__io_address(0xca000000 + 4)); | 180 | unsigned int status = readl(__io_address(0xca000000 + 4)); |
193 | writel(8, __io_address(INTEGRATOR_CP_CTL_BASE + 8)); | 181 | writel(8, intcp_con_base + 8); |
194 | 182 | ||
195 | return status & 8; | 183 | return status & 8; |
196 | } | 184 | } |
@@ -318,9 +306,9 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { | |||
318 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE, | 306 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE, |
319 | "rtc", NULL), | 307 | "rtc", NULL), |
320 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE, | 308 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE, |
321 | "uart0", &integrator_uart_data), | 309 | "uart0", NULL), |
322 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE, | 310 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE, |
323 | "uart1", &integrator_uart_data), | 311 | "uart1", NULL), |
324 | OF_DEV_AUXDATA("arm,primecell", KMI0_BASE, | 312 | OF_DEV_AUXDATA("arm,primecell", KMI0_BASE, |
325 | "kmi0", NULL), | 313 | "kmi0", NULL), |
326 | OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, | 314 | OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, |
@@ -338,8 +326,57 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { | |||
338 | 326 | ||
339 | static void __init intcp_init_of(void) | 327 | static void __init intcp_init_of(void) |
340 | { | 328 | { |
341 | of_platform_populate(NULL, of_default_bus_match_table, | 329 | struct device_node *root; |
342 | intcp_auxdata_lookup, NULL); | 330 | struct device_node *cpcon; |
331 | struct device *parent; | ||
332 | struct soc_device *soc_dev; | ||
333 | struct soc_device_attribute *soc_dev_attr; | ||
334 | u32 intcp_sc_id; | ||
335 | int err; | ||
336 | |||
337 | /* Here we create an SoC device for the root node */ | ||
338 | root = of_find_node_by_path("/"); | ||
339 | if (!root) | ||
340 | return; | ||
341 | cpcon = of_find_node_by_path("/cpcon"); | ||
342 | if (!cpcon) | ||
343 | return; | ||
344 | |||
345 | intcp_con_base = of_iomap(cpcon, 0); | ||
346 | if (!intcp_con_base) | ||
347 | return; | ||
348 | |||
349 | intcp_sc_id = readl(intcp_con_base); | ||
350 | |||
351 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); | ||
352 | if (!soc_dev_attr) | ||
353 | return; | ||
354 | |||
355 | err = of_property_read_string(root, "compatible", | ||
356 | &soc_dev_attr->soc_id); | ||
357 | if (err) | ||
358 | return; | ||
359 | err = of_property_read_string(root, "model", &soc_dev_attr->machine); | ||
360 | if (err) | ||
361 | return; | ||
362 | soc_dev_attr->family = "Integrator"; | ||
363 | soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", | ||
364 | 'A' + (intcp_sc_id & 0x0f)); | ||
365 | |||
366 | soc_dev = soc_device_register(soc_dev_attr); | ||
367 | if (IS_ERR_OR_NULL(soc_dev)) { | ||
368 | kfree(soc_dev_attr->revision); | ||
369 | kfree(soc_dev_attr); | ||
370 | return; | ||
371 | } | ||
372 | |||
373 | parent = soc_device_to_device(soc_dev); | ||
374 | |||
375 | if (!IS_ERR_OR_NULL(parent)) | ||
376 | integrator_init_sysfs(parent, intcp_sc_id); | ||
377 | |||
378 | of_platform_populate(root, of_default_bus_match_table, | ||
379 | intcp_auxdata_lookup, parent); | ||
343 | } | 380 | } |
344 | 381 | ||
345 | static const char * intcp_dt_board_compat[] = { | 382 | static const char * intcp_dt_board_compat[] = { |
@@ -365,6 +402,28 @@ MACHINE_END | |||
365 | #ifdef CONFIG_ATAGS | 402 | #ifdef CONFIG_ATAGS |
366 | 403 | ||
367 | /* | 404 | /* |
405 | * For the ATAG boot some static mappings are needed. This will | ||
406 | * go away with the ATAG support down the road. | ||
407 | */ | ||
408 | |||
409 | static struct map_desc intcp_io_desc_atag[] __initdata = { | ||
410 | { | ||
411 | .virtual = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE), | ||
412 | .pfn = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE), | ||
413 | .length = SZ_4K, | ||
414 | .type = MT_DEVICE | ||
415 | }, | ||
416 | }; | ||
417 | |||
418 | static void __init intcp_map_io_atag(void) | ||
419 | { | ||
420 | iotable_init(intcp_io_desc_atag, ARRAY_SIZE(intcp_io_desc_atag)); | ||
421 | intcp_con_base = __io_address(INTEGRATOR_CP_CTL_BASE); | ||
422 | intcp_map_io(); | ||
423 | } | ||
424 | |||
425 | |||
426 | /* | ||
368 | * This is where non-devicetree initialization code is collected and stashed | 427 | * This is where non-devicetree initialization code is collected and stashed |
369 | * for eventual deletion. | 428 | * for eventual deletion. |
370 | */ | 429 | */ |
@@ -503,7 +562,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") | |||
503 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | 562 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ |
504 | .atag_offset = 0x100, | 563 | .atag_offset = 0x100, |
505 | .reserve = integrator_reserve, | 564 | .reserve = integrator_reserve, |
506 | .map_io = intcp_map_io, | 565 | .map_io = intcp_map_io_atag, |
507 | .nr_irqs = NR_IRQS_INTEGRATOR_CP, | 566 | .nr_irqs = NR_IRQS_INTEGRATOR_CP, |
508 | .init_early = intcp_init_early, | 567 | .init_early = intcp_init_early, |
509 | .init_irq = intcp_init_irq, | 568 | .init_irq = intcp_init_irq, |
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index bbeca59df66b..be50e795536d 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -191,12 +191,9 @@ static void __iomem *v3_open_config_window(struct pci_bus *bus, | |||
191 | /* | 191 | /* |
192 | * Trap out illegal values | 192 | * Trap out illegal values |
193 | */ | 193 | */ |
194 | if (offset > 255) | 194 | BUG_ON(offset > 255); |
195 | BUG(); | 195 | BUG_ON(busnr > 255); |
196 | if (busnr > 255) | 196 | BUG_ON(devfn > 255); |
197 | BUG(); | ||
198 | if (devfn > 255) | ||
199 | BUG(); | ||
200 | 197 | ||
201 | if (busnr == 0) { | 198 | if (busnr == 0) { |
202 | int slot = PCI_SLOT(devfn); | 199 | int slot = PCI_SLOT(devfn); |
@@ -388,9 +385,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys) | |||
388 | * means I can't get additional information on the reason for the pm2fb | 385 | * means I can't get additional information on the reason for the pm2fb |
389 | * problems. I suppose I'll just have to mind-meld with the machine. ;) | 386 | * problems. I suppose I'll just have to mind-meld with the machine. ;) |
390 | */ | 387 | */ |
391 | #define SC_PCI __io_address(INTEGRATOR_SC_PCIENABLE) | 388 | static void __iomem *ap_syscon_base; |
392 | #define SC_LBFADDR __io_address(INTEGRATOR_SC_BASE + 0x20) | 389 | #define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 |
393 | #define SC_LBFCODE __io_address(INTEGRATOR_SC_BASE + 0x24) | 390 | #define INTEGRATOR_SC_LBFADDR_OFFSET 0x20 |
391 | #define INTEGRATOR_SC_LBFCODE_OFFSET 0x24 | ||
394 | 392 | ||
395 | static int | 393 | static int |
396 | v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | 394 | v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
@@ -401,13 +399,13 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
401 | char buf[128]; | 399 | char buf[128]; |
402 | 400 | ||
403 | sprintf(buf, "V3 fault: addr 0x%08lx, FSR 0x%03x, PC 0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", | 401 | sprintf(buf, "V3 fault: addr 0x%08lx, FSR 0x%03x, PC 0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", |
404 | addr, fsr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, | 402 | addr, fsr, pc, instr, __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET), __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255, |
405 | v3_readb(V3_LB_ISTAT)); | 403 | v3_readb(V3_LB_ISTAT)); |
406 | printk(KERN_DEBUG "%s", buf); | 404 | printk(KERN_DEBUG "%s", buf); |
407 | #endif | 405 | #endif |
408 | 406 | ||
409 | v3_writeb(V3_LB_ISTAT, 0); | 407 | v3_writeb(V3_LB_ISTAT, 0); |
410 | __raw_writel(3, SC_PCI); | 408 | __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET); |
411 | 409 | ||
412 | /* | 410 | /* |
413 | * If the instruction being executed was a read, | 411 | * If the instruction being executed was a read, |
@@ -449,15 +447,15 @@ static irqreturn_t v3_irq(int dummy, void *devid) | |||
449 | 447 | ||
450 | sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x " | 448 | sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x " |
451 | "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr, | 449 | "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr, |
452 | __raw_readl(SC_LBFADDR), | 450 | __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET), |
453 | __raw_readl(SC_LBFCODE) & 255, | 451 | __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255, |
454 | v3_readb(V3_LB_ISTAT)); | 452 | v3_readb(V3_LB_ISTAT)); |
455 | printascii(buf); | 453 | printascii(buf); |
456 | #endif | 454 | #endif |
457 | 455 | ||
458 | v3_writew(V3_PCI_STAT, 0xf000); | 456 | v3_writew(V3_PCI_STAT, 0xf000); |
459 | v3_writeb(V3_LB_ISTAT, 0); | 457 | v3_writeb(V3_LB_ISTAT, 0); |
460 | __raw_writel(3, SC_PCI); | 458 | __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET); |
461 | 459 | ||
462 | #ifdef CONFIG_DEBUG_LL | 460 | #ifdef CONFIG_DEBUG_LL |
463 | /* | 461 | /* |
@@ -480,6 +478,10 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys) | |||
480 | if (nr == 0) { | 478 | if (nr == 0) { |
481 | sys->mem_offset = PHYS_PCI_MEM_BASE; | 479 | sys->mem_offset = PHYS_PCI_MEM_BASE; |
482 | ret = pci_v3_setup_resources(sys); | 480 | ret = pci_v3_setup_resources(sys); |
481 | /* Remap the Integrator system controller */ | ||
482 | ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100); | ||
483 | if (!ap_syscon_base) | ||
484 | return -EINVAL; | ||
483 | } | 485 | } |
484 | 486 | ||
485 | return ret; | 487 | return ret; |
@@ -568,7 +570,7 @@ void __init pci_v3_preinit(void) | |||
568 | v3_writeb(V3_LB_ISTAT, 0); | 570 | v3_writeb(V3_LB_ISTAT, 0); |
569 | v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10)); | 571 | v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10)); |
570 | v3_writeb(V3_LB_IMASK, 0x28); | 572 | v3_writeb(V3_LB_IMASK, 0x28); |
571 | __raw_writel(3, SC_PCI); | 573 | __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET); |
572 | 574 | ||
573 | /* | 575 | /* |
574 | * Grab the PCI error interrupt. | 576 | * Grab the PCI error interrupt. |
diff --git a/arch/arm/mach-kirkwood/board-dockstar.c b/arch/arm/mach-kirkwood/board-dockstar.c index f2fbb023e679..6912882b0aa9 100644 --- a/arch/arm/mach-kirkwood/board-dockstar.c +++ b/arch/arm/mach-kirkwood/board-dockstar.c | |||
@@ -16,21 +16,8 @@ | |||
16 | 16 | ||
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/ata_platform.h> | ||
21 | #include <linux/mv643xx_eth.h> | 19 | #include <linux/mv643xx_eth.h> |
22 | #include <linux/of.h> | ||
23 | #include <linux/of_address.h> | ||
24 | #include <linux/of_fdt.h> | ||
25 | #include <linux/of_irq.h> | ||
26 | #include <linux/of_platform.h> | ||
27 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
28 | #include <asm/mach-types.h> | ||
29 | #include <asm/mach/arch.h> | ||
30 | #include <asm/mach/map.h> | ||
31 | #include <mach/kirkwood.h> | ||
32 | #include <mach/bridge-regs.h> | ||
33 | #include <linux/platform_data/mmc-mvsdio.h> | ||
34 | #include "common.h" | 21 | #include "common.h" |
35 | #include "mpp.h" | 22 | #include "mpp.h" |
36 | 23 | ||
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c index 20af53a56c0e..8a8ebe09e512 100644 --- a/arch/arm/mach-kirkwood/board-dreamplug.c +++ b/arch/arm/mach-kirkwood/board-dreamplug.c | |||
@@ -13,23 +13,8 @@ | |||
13 | 13 | ||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/ata_platform.h> | ||
18 | #include <linux/mv643xx_eth.h> | 16 | #include <linux/mv643xx_eth.h> |
19 | #include <linux/of.h> | ||
20 | #include <linux/of_address.h> | ||
21 | #include <linux/of_fdt.h> | ||
22 | #include <linux/of_irq.h> | ||
23 | #include <linux/of_platform.h> | ||
24 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
25 | #include <linux/mtd/physmap.h> | ||
26 | #include <linux/spi/flash.h> | ||
27 | #include <linux/spi/spi.h> | ||
28 | #include <asm/mach-types.h> | ||
29 | #include <asm/mach/arch.h> | ||
30 | #include <asm/mach/map.h> | ||
31 | #include <mach/kirkwood.h> | ||
32 | #include <mach/bridge-regs.h> | ||
33 | #include <linux/platform_data/mmc-mvsdio.h> | 18 | #include <linux/platform_data/mmc-mvsdio.h> |
34 | #include "common.h" | 19 | #include "common.h" |
35 | #include "mpp.h" | 20 | #include "mpp.h" |
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index d94872fed8c0..e75fbdb533de 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c | |||
@@ -26,7 +26,7 @@ static struct of_device_id kirkwood_dt_match_table[] __initdata = { | |||
26 | { } | 26 | { } |
27 | }; | 27 | }; |
28 | 28 | ||
29 | struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = { | 29 | static struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = { |
30 | OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), | 30 | OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), |
31 | OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", | 31 | OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", |
32 | NULL), | 32 | NULL), |
@@ -98,7 +98,7 @@ static void __init kirkwood_dt_init(void) | |||
98 | kirkwood_auxdata_lookup, NULL); | 98 | kirkwood_auxdata_lookup, NULL); |
99 | } | 99 | } |
100 | 100 | ||
101 | static const char *kirkwood_dt_board_compat[] = { | 101 | static const char * const kirkwood_dt_board_compat[] = { |
102 | "globalscale,dreamplug", | 102 | "globalscale,dreamplug", |
103 | "dlink,dns-320", | 103 | "dlink,dns-320", |
104 | "dlink,dns-325", | 104 | "dlink,dns-325", |
diff --git a/arch/arm/mach-kirkwood/board-goflexnet.c b/arch/arm/mach-kirkwood/board-goflexnet.c index 001ca8c96980..5dcd0d62aa42 100644 --- a/arch/arm/mach-kirkwood/board-goflexnet.c +++ b/arch/arm/mach-kirkwood/board-goflexnet.c | |||
@@ -18,21 +18,8 @@ | |||
18 | 18 | ||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/ata_platform.h> | ||
23 | #include <linux/mv643xx_eth.h> | 21 | #include <linux/mv643xx_eth.h> |
24 | #include <linux/of.h> | ||
25 | #include <linux/of_address.h> | ||
26 | #include <linux/of_fdt.h> | ||
27 | #include <linux/of_irq.h> | ||
28 | #include <linux/of_platform.h> | ||
29 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
30 | #include <asm/mach-types.h> | ||
31 | #include <asm/mach/arch.h> | ||
32 | #include <asm/mach/map.h> | ||
33 | #include <mach/kirkwood.h> | ||
34 | #include <mach/bridge-regs.h> | ||
35 | #include <linux/platform_data/mmc-mvsdio.h> | ||
36 | #include "common.h" | 23 | #include "common.h" |
37 | #include "mpp.h" | 24 | #include "mpp.h" |
38 | 25 | ||
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c index cfc47f80e734..6d3a56421142 100644 --- a/arch/arm/mach-kirkwood/board-ib62x0.c +++ b/arch/arm/mach-kirkwood/board-ib62x0.c | |||
@@ -13,15 +13,9 @@ | |||
13 | 13 | ||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/mtd/partitions.h> | ||
18 | #include <linux/ata_platform.h> | ||
19 | #include <linux/mv643xx_eth.h> | 16 | #include <linux/mv643xx_eth.h> |
20 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
21 | #include <linux/input.h> | 18 | #include <linux/input.h> |
22 | #include <asm/mach-types.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | #include <mach/kirkwood.h> | ||
25 | #include "common.h" | 19 | #include "common.h" |
26 | #include "mpp.h" | 20 | #include "mpp.h" |
27 | 21 | ||
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c index d084b1e2943a..24f5aa7f698b 100644 --- a/arch/arm/mach-kirkwood/board-iconnect.c +++ b/arch/arm/mach-kirkwood/board-iconnect.c | |||
@@ -10,16 +10,8 @@ | |||
10 | 10 | ||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/of.h> | 13 | #include <linux/of.h> |
15 | #include <linux/of_address.h> | ||
16 | #include <linux/of_fdt.h> | ||
17 | #include <linux/of_irq.h> | ||
18 | #include <linux/of_platform.h> | ||
19 | #include <linux/mv643xx_eth.h> | 14 | #include <linux/mv643xx_eth.h> |
20 | #include <linux/gpio.h> | ||
21 | #include <asm/mach/arch.h> | ||
22 | #include <mach/kirkwood.h> | ||
23 | #include "common.h" | 15 | #include "common.h" |
24 | #include "mpp.h" | 16 | #include "mpp.h" |
25 | 17 | ||
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c index 158fb97d0397..e4ed62c28f54 100644 --- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c +++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c | |||
@@ -10,10 +10,8 @@ | |||
10 | 10 | ||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/mv643xx_eth.h> | 13 | #include <linux/mv643xx_eth.h> |
15 | #include <linux/ethtool.h> | 14 | #include <linux/ethtool.h> |
16 | #include <mach/kirkwood.h> | ||
17 | #include "common.h" | 15 | #include "common.h" |
18 | #include "mpp.h" | 16 | #include "mpp.h" |
19 | 17 | ||
diff --git a/arch/arm/mach-kirkwood/board-lsxl.c b/arch/arm/mach-kirkwood/board-lsxl.c index 83d8975592f8..64e5cc6b6d5f 100644 --- a/arch/arm/mach-kirkwood/board-lsxl.c +++ b/arch/arm/mach-kirkwood/board-lsxl.c | |||
@@ -14,17 +14,9 @@ | |||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/mtd/partitions.h> | ||
18 | #include <linux/ata_platform.h> | ||
19 | #include <linux/spi/flash.h> | ||
20 | #include <linux/spi/spi.h> | ||
21 | #include <linux/mv643xx_eth.h> | 17 | #include <linux/mv643xx_eth.h> |
22 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
23 | #include <linux/gpio-fan.h> | 19 | #include <linux/gpio-fan.h> |
24 | #include <linux/input.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | #include <asm/mach/arch.h> | ||
27 | #include <mach/kirkwood.h> | ||
28 | #include "common.h" | 20 | #include "common.h" |
29 | #include "mpp.h" | 21 | #include "mpp.h" |
30 | 22 | ||
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c index 1750e68506c1..f3bfedae3a20 100644 --- a/arch/arm/mach-kirkwood/board-ts219.c +++ b/arch/arm/mach-kirkwood/board-ts219.c | |||
@@ -19,9 +19,6 @@ | |||
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/mv643xx_eth.h> | 21 | #include <linux/mv643xx_eth.h> |
22 | #include <linux/ata_platform.h> | ||
23 | #include <linux/gpio_keys.h> | ||
24 | #include <linux/input.h> | ||
25 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
27 | #include <mach/kirkwood.h> | 24 | #include <mach/kirkwood.h> |
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 2c6c218fb79e..f0fc25bd3ffe 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c | |||
@@ -18,10 +18,10 @@ | |||
18 | #include <linux/clk-provider.h> | 18 | #include <linux/clk-provider.h> |
19 | #include <linux/spinlock.h> | 19 | #include <linux/spinlock.h> |
20 | #include <linux/mv643xx_i2c.h> | 20 | #include <linux/mv643xx_i2c.h> |
21 | #include <linux/timex.h> | ||
22 | #include <linux/kexec.h> | ||
21 | #include <net/dsa.h> | 23 | #include <net/dsa.h> |
22 | #include <asm/page.h> | 24 | #include <asm/page.h> |
23 | #include <asm/timex.h> | ||
24 | #include <asm/kexec.h> | ||
25 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
26 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
27 | #include <mach/kirkwood.h> | 27 | #include <mach/kirkwood.h> |
@@ -425,7 +425,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) | |||
425 | /***************************************************************************** | 425 | /***************************************************************************** |
426 | * SPI | 426 | * SPI |
427 | ****************************************************************************/ | 427 | ****************************************************************************/ |
428 | void __init kirkwood_spi_init() | 428 | void __init kirkwood_spi_init(void) |
429 | { | 429 | { |
430 | orion_spi_init(SPI_PHYS_BASE); | 430 | orion_spi_init(SPI_PHYS_BASE); |
431 | } | 431 | } |
@@ -646,8 +646,7 @@ void __init kirkwood_l2_init(void) | |||
646 | 646 | ||
647 | void __init kirkwood_init(void) | 647 | void __init kirkwood_init(void) |
648 | { | 648 | { |
649 | printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", | 649 | pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk); |
650 | kirkwood_id(), kirkwood_tclk); | ||
651 | 650 | ||
652 | /* | 651 | /* |
653 | * Disable propagation of mbus errors to the CPU local bus, | 652 | * Disable propagation of mbus errors to the CPU local bus, |
@@ -671,7 +670,7 @@ void __init kirkwood_init(void) | |||
671 | kirkwood_xor1_init(); | 670 | kirkwood_xor1_init(); |
672 | kirkwood_crypto_init(); | 671 | kirkwood_crypto_init(); |
673 | 672 | ||
674 | #ifdef CONFIG_KEXEC | 673 | #ifdef CONFIG_KEXEC |
675 | kexec_reinit = kirkwood_enable_pcie; | 674 | kexec_reinit = kirkwood_enable_pcie; |
676 | #endif | 675 | #endif |
677 | } | 676 | } |
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index bcffd7ca1ca2..6088e9227889 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h | |||
@@ -47,7 +47,8 @@ void kirkwood_i2c_init(void); | |||
47 | void kirkwood_uart0_init(void); | 47 | void kirkwood_uart0_init(void); |
48 | void kirkwood_uart1_init(void); | 48 | void kirkwood_uart1_init(void); |
49 | void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); | 49 | void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); |
50 | void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); | 50 | void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, |
51 | int (*dev_ready)(struct mtd_info *)); | ||
51 | void kirkwood_audio_init(void); | 52 | void kirkwood_audio_init(void); |
52 | void kirkwood_restart(char, const char *); | 53 | void kirkwood_restart(char, const char *); |
53 | void kirkwood_clk_init(void); | 54 | void kirkwood_clk_init(void); |
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c index 0f1710941878..f7304670f2f8 100644 --- a/arch/arm/mach-kirkwood/cpuidle.c +++ b/arch/arm/mach-kirkwood/cpuidle.c | |||
@@ -64,7 +64,7 @@ static int kirkwood_init_cpuidle(void) | |||
64 | 64 | ||
65 | cpuidle_register_driver(&kirkwood_idle_driver); | 65 | cpuidle_register_driver(&kirkwood_idle_driver); |
66 | if (cpuidle_register_device(device)) { | 66 | if (cpuidle_register_device(device)) { |
67 | printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n"); | 67 | pr_err("kirkwood_init_cpuidle: Failed registering\n"); |
68 | return -EIO; | 68 | return -EIO; |
69 | } | 69 | } |
70 | return 0; | 70 | return 0; |
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c index 23dcb19cc2a7..791a98fafa29 100644 --- a/arch/arm/mach-kirkwood/dockstar-setup.c +++ b/arch/arm/mach-kirkwood/dockstar-setup.c | |||
@@ -93,7 +93,7 @@ static void __init dockstar_init(void) | |||
93 | 93 | ||
94 | if (gpio_request(29, "USB Power Enable") != 0 || | 94 | if (gpio_request(29, "USB Power Enable") != 0 || |
95 | gpio_direction_output(29, 1) != 0) | 95 | gpio_direction_output(29, 1) != 0) |
96 | printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n"); | 96 | pr_err("can't set up GPIO 29 (USB Power Enable)\n"); |
97 | kirkwood_ehci_init(); | 97 | kirkwood_ehci_init(); |
98 | 98 | ||
99 | kirkwood_ge00_init(&dockstar_ge00_data); | 99 | kirkwood_ge00_init(&dockstar_ge00_data); |
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index 884703535a0a..2a97a2e4163c 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <mach/bridge-regs.h> | 14 | #include <mach/bridge-regs.h> |
15 | #include <plat/orion-gpio.h> | 15 | #include <plat/orion-gpio.h> |
16 | #include <plat/irq.h> | 16 | #include <plat/irq.h> |
17 | #include "common.h" | ||
17 | 18 | ||
18 | static int __initdata gpio0_irqs[4] = { | 19 | static int __initdata gpio0_irqs[4] = { |
19 | IRQ_KIRKWOOD_GPIO_LOW_0_7, | 20 | IRQ_KIRKWOOD_GPIO_LOW_0_7, |
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c index 285edab776e9..489495976fcd 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ b/arch/arm/mach-kirkwood/lacie_v2-common.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <mach/irqs.h> | 19 | #include <mach/irqs.h> |
20 | #include <plat/time.h> | 20 | #include <plat/time.h> |
21 | #include "common.h" | 21 | #include "common.h" |
22 | #include "lacie_v2-common.h" | ||
22 | 23 | ||
23 | /***************************************************************************** | 24 | /***************************************************************************** |
24 | * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005) | 25 | * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005) |
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 0c6ad63f10c7..827cde42414f 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c | |||
@@ -30,8 +30,8 @@ static unsigned int __init kirkwood_variant(void) | |||
30 | if (dev == MV88F6180_DEV_ID) | 30 | if (dev == MV88F6180_DEV_ID) |
31 | return MPP_F6180_MASK; | 31 | return MPP_F6180_MASK; |
32 | 32 | ||
33 | printk(KERN_ERR "MPP setup: unknown kirkwood variant " | 33 | pr_err("MPP setup: unknown kirkwood variant (dev %#x rev %#x)\n", |
34 | "(dev %#x rev %#x)\n", dev, rev); | 34 | dev, rev); |
35 | return 0; | 35 | return 0; |
36 | } | 36 | } |
37 | 37 | ||
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index 88b0788bacae..728e86d33f0c 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c | |||
@@ -79,7 +79,7 @@ static struct platform_device netspace_v2_gpio_buttons = { | |||
79 | .name = "gpio-keys", | 79 | .name = "gpio-keys", |
80 | .id = -1, | 80 | .id = -1, |
81 | .dev = { | 81 | .dev = { |
82 | .platform_data = &netspace_v2_button_data, | 82 | .platform_data = &netspace_v2_button_data, |
83 | }, | 83 | }, |
84 | }; | 84 | }; |
85 | 85 | ||
@@ -211,7 +211,7 @@ static unsigned int netspace_v2_mpp_config[] __initdata = { | |||
211 | MPP29_GPIO, /* Blue led (slow register) */ | 211 | MPP29_GPIO, /* Blue led (slow register) */ |
212 | MPP30_GPIO, /* Blue led (command register) */ | 212 | MPP30_GPIO, /* Blue led (command register) */ |
213 | MPP31_GPIO, /* Board power off */ | 213 | MPP31_GPIO, /* Board power off */ |
214 | MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */ | 214 | MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */ |
215 | MPP33_GPO, /* Fan speed (bit 2) */ | 215 | MPP33_GPO, /* Fan speed (bit 2) */ |
216 | 0 | 216 | 0 |
217 | }; | 217 | }; |
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 134ef50d58fc..7e81e9b586bf 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c | |||
@@ -121,14 +121,12 @@ static int __init uart1_mpp_config(void) | |||
121 | kirkwood_mpp_conf(openrd_uart1_mpp_config); | 121 | kirkwood_mpp_conf(openrd_uart1_mpp_config); |
122 | 122 | ||
123 | if (gpio_request(34, "SD_UART1_SEL")) { | 123 | if (gpio_request(34, "SD_UART1_SEL")) { |
124 | printk(KERN_ERR "GPIO request failed for SD/UART1 selection" | 124 | pr_err("GPIO request 34 failed for SD/UART1 selection\n"); |
125 | ", gpio: 34\n"); | ||
126 | return -EIO; | 125 | return -EIO; |
127 | } | 126 | } |
128 | 127 | ||
129 | if (gpio_request(28, "RS232_RS485_SEL")) { | 128 | if (gpio_request(28, "RS232_RS485_SEL")) { |
130 | printk(KERN_ERR "GPIO request failed for RS232/RS485 selection" | 129 | pr_err("GPIO request 28 failed for RS232/RS485 selection\n"); |
131 | ", gpio# 28\n"); | ||
132 | gpio_free(34); | 130 | gpio_free(34); |
133 | return -EIO; | 131 | return -EIO; |
134 | } | 132 | } |
@@ -185,15 +183,13 @@ static void __init openrd_init(void) | |||
185 | 183 | ||
186 | if (uart1 <= 0) { | 184 | if (uart1 <= 0) { |
187 | if (uart1 < 0) | 185 | if (uart1 < 0) |
188 | printk(KERN_ERR "Invalid kernel parameter to select " | 186 | pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n", |
189 | "UART1. Defaulting to SD. ERROR CODE: %d\n", | 187 | uart1); |
190 | uart1); | ||
191 | 188 | ||
192 | /* Select SD | 189 | /* Select SD |
193 | * Pin # 34: 0 => UART1, 1 => SD */ | 190 | * Pin # 34: 0 => UART1, 1 => SD */ |
194 | if (gpio_request(34, "SD_UART1_SEL")) { | 191 | if (gpio_request(34, "SD_UART1_SEL")) { |
195 | printk(KERN_ERR "GPIO request failed for SD/UART1 " | 192 | pr_err("GPIO request 34 failed for SD/UART1 selection\n"); |
196 | "selection, gpio: 34\n"); | ||
197 | } else { | 193 | } else { |
198 | 194 | ||
199 | gpio_direction_output(34, 1); | 195 | gpio_direction_output(34, 1); |
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 74fc5a074fc4..ef102646ba9a 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c | |||
@@ -26,7 +26,7 @@ static void kirkwood_enable_pcie_clk(const char *port) | |||
26 | 26 | ||
27 | clk = clk_get_sys("pcie", port); | 27 | clk = clk_get_sys("pcie", port); |
28 | if (IS_ERR(clk)) { | 28 | if (IS_ERR(clk)) { |
29 | printk(KERN_ERR "PCIE clock %s missing\n", port); | 29 | pr_err("PCIE clock %s missing\n", port); |
30 | return; | 30 | return; |
31 | } | 31 | } |
32 | clk_prepare_enable(clk); | 32 | clk_prepare_enable(clk); |
@@ -168,7 +168,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | |||
168 | return 0; | 168 | return 0; |
169 | 169 | ||
170 | index = pcie_port_map[nr]; | 170 | index = pcie_port_map[nr]; |
171 | printk(KERN_INFO "PCI: bus%d uses PCIe port %d\n", sys->busnr, index); | 171 | pr_info("PCI: bus%d uses PCIe port %d\n", sys->busnr, index); |
172 | 172 | ||
173 | pp = kzalloc(sizeof(*pp), GFP_KERNEL); | 173 | pp = kzalloc(sizeof(*pp), GFP_KERNEL); |
174 | if (!pp) | 174 | if (!pp) |
@@ -186,7 +186,8 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | |||
186 | case 1: | 186 | case 1: |
187 | kirkwood_enable_pcie_clk("1"); | 187 | kirkwood_enable_pcie_clk("1"); |
188 | pcie1_ioresources_init(pp); | 188 | pcie1_ioresources_init(pp); |
189 | pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE1_IO_PHYS_BASE); | 189 | pci_ioremap_io(SZ_64K * sys->busnr, |
190 | KIRKWOOD_PCIE1_IO_PHYS_BASE); | ||
190 | break; | 191 | break; |
191 | default: | 192 | default: |
192 | panic("PCIe setup: invalid controller %d", index); | 193 | panic("PCIe setup: invalid controller %d", index); |
@@ -229,22 +230,6 @@ static void __devinit rc_pci_fixup(struct pci_dev *dev) | |||
229 | } | 230 | } |
230 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup); | 231 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup); |
231 | 232 | ||
232 | static struct pci_bus __init * | ||
233 | kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys) | ||
234 | { | ||
235 | struct pci_bus *bus; | ||
236 | |||
237 | if (nr < num_pcie_ports) { | ||
238 | bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys, | ||
239 | &sys->resources); | ||
240 | } else { | ||
241 | bus = NULL; | ||
242 | BUG(); | ||
243 | } | ||
244 | |||
245 | return bus; | ||
246 | } | ||
247 | |||
248 | static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, | 233 | static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, |
249 | u8 pin) | 234 | u8 pin) |
250 | { | 235 | { |
@@ -256,19 +241,19 @@ static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, | |||
256 | 241 | ||
257 | static struct hw_pci kirkwood_pci __initdata = { | 242 | static struct hw_pci kirkwood_pci __initdata = { |
258 | .setup = kirkwood_pcie_setup, | 243 | .setup = kirkwood_pcie_setup, |
259 | .scan = kirkwood_pcie_scan_bus, | ||
260 | .map_irq = kirkwood_pcie_map_irq, | 244 | .map_irq = kirkwood_pcie_map_irq, |
245 | .ops = &pcie_ops, | ||
261 | }; | 246 | }; |
262 | 247 | ||
263 | static void __init add_pcie_port(int index, void __iomem *base) | 248 | static void __init add_pcie_port(int index, void __iomem *base) |
264 | { | 249 | { |
265 | printk(KERN_INFO "Kirkwood PCIe port %d: ", index); | 250 | pr_info("Kirkwood PCIe port %d: ", index); |
266 | 251 | ||
267 | if (orion_pcie_link_up(base)) { | 252 | if (orion_pcie_link_up(base)) { |
268 | printk(KERN_INFO "link up\n"); | 253 | pr_info("link up\n"); |
269 | pcie_port_map[num_pcie_ports++] = index; | 254 | pcie_port_map[num_pcie_ports++] = index; |
270 | } else | 255 | } else |
271 | printk(KERN_INFO "link down, ignoring\n"); | 256 | pr_info("link down, ignoring\n"); |
272 | } | 257 | } |
273 | 258 | ||
274 | void __init kirkwood_pcie_init(unsigned int portmask) | 259 | void __init kirkwood_pcie_init(unsigned int portmask) |
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c index 28d0abaf4bd9..8a175948b28d 100644 --- a/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c | |||
@@ -117,7 +117,7 @@ static void __init sheevaplug_init(void) | |||
117 | 117 | ||
118 | if (gpio_request(29, "USB Power Enable") != 0 || | 118 | if (gpio_request(29, "USB Power Enable") != 0 || |
119 | gpio_direction_output(29, 1) != 0) | 119 | gpio_direction_output(29, 1) != 0) |
120 | printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n"); | 120 | pr_err("can't set up GPIO 29 (USB Power Enable)\n"); |
121 | kirkwood_ehci_init(); | 121 | kirkwood_ehci_init(); |
122 | 122 | ||
123 | kirkwood_ge00_init(&sheevaplug_ge00_data); | 123 | kirkwood_ge00_init(&sheevaplug_ge00_data); |
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c index bad738e44044..f2daf711e72e 100644 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ b/arch/arm/mach-kirkwood/t5325-setup.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include "common.h" | 29 | #include "common.h" |
30 | #include "mpp.h" | 30 | #include "mpp.h" |
31 | 31 | ||
32 | struct mtd_partition hp_t5325_partitions[] = { | 32 | static struct mtd_partition hp_t5325_partitions[] = { |
33 | { | 33 | { |
34 | .name = "u-boot env", | 34 | .name = "u-boot env", |
35 | .size = SZ_64K, | 35 | .size = SZ_64K, |
@@ -59,14 +59,14 @@ struct mtd_partition hp_t5325_partitions[] = { | |||
59 | }, | 59 | }, |
60 | }; | 60 | }; |
61 | 61 | ||
62 | const struct flash_platform_data hp_t5325_flash = { | 62 | static const struct flash_platform_data hp_t5325_flash = { |
63 | .type = "mx25l8005", | 63 | .type = "mx25l8005", |
64 | .name = "spi_flash", | 64 | .name = "spi_flash", |
65 | .parts = hp_t5325_partitions, | 65 | .parts = hp_t5325_partitions, |
66 | .nr_parts = ARRAY_SIZE(hp_t5325_partitions), | 66 | .nr_parts = ARRAY_SIZE(hp_t5325_partitions), |
67 | }; | 67 | }; |
68 | 68 | ||
69 | struct spi_board_info __initdata hp_t5325_spi_slave_info[] = { | 69 | static struct spi_board_info __initdata hp_t5325_spi_slave_info[] = { |
70 | { | 70 | { |
71 | .modalias = "m25p80", | 71 | .modalias = "m25p80", |
72 | .platform_data = &hp_t5325_flash, | 72 | .platform_data = &hp_t5325_flash, |
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 367a9400f532..e4c61279ea86 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c | |||
@@ -170,8 +170,7 @@ static int __init ts41x_pci_init(void) | |||
170 | else | 170 | else |
171 | kirkwood_pcie_init(KW_PCIE0); | 171 | kirkwood_pcie_init(KW_PCIE0); |
172 | } | 172 | } |
173 | 173 | return 0; | |
174 | return 0; | ||
175 | } | 174 | } |
176 | subsys_initcall(ts41x_pci_init); | 175 | subsys_initcall(ts41x_pci_init); |
177 | 176 | ||
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c index 8943ede29b44..cec87cef76ca 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.c +++ b/arch/arm/mach-kirkwood/tsx1x-common.c | |||
@@ -7,6 +7,7 @@ | |||
7 | #include <linux/serial_reg.h> | 7 | #include <linux/serial_reg.h> |
8 | #include <mach/kirkwood.h> | 8 | #include <mach/kirkwood.h> |
9 | #include "common.h" | 9 | #include "common.h" |
10 | #include "tsx1x-common.h" | ||
10 | 11 | ||
11 | /* | 12 | /* |
12 | * QNAP TS-x1x Boards flash | 13 | * QNAP TS-x1x Boards flash |
@@ -29,7 +30,7 @@ | |||
29 | * | 30 | * |
30 | ***************************************************************************/ | 31 | ***************************************************************************/ |
31 | 32 | ||
32 | struct mtd_partition qnap_tsx1x_partitions[] = { | 33 | static struct mtd_partition qnap_tsx1x_partitions[] = { |
33 | { | 34 | { |
34 | .name = "U-Boot", | 35 | .name = "U-Boot", |
35 | .size = 0x00080000, | 36 | .size = 0x00080000, |
@@ -58,14 +59,14 @@ struct mtd_partition qnap_tsx1x_partitions[] = { | |||
58 | }, | 59 | }, |
59 | }; | 60 | }; |
60 | 61 | ||
61 | const struct flash_platform_data qnap_tsx1x_flash = { | 62 | static const struct flash_platform_data qnap_tsx1x_flash = { |
62 | .type = "m25p128", | 63 | .type = "m25p128", |
63 | .name = "spi_flash", | 64 | .name = "spi_flash", |
64 | .parts = qnap_tsx1x_partitions, | 65 | .parts = qnap_tsx1x_partitions, |
65 | .nr_parts = ARRAY_SIZE(qnap_tsx1x_partitions), | 66 | .nr_parts = ARRAY_SIZE(qnap_tsx1x_partitions), |
66 | }; | 67 | }; |
67 | 68 | ||
68 | struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { | 69 | static struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { |
69 | { | 70 | { |
70 | .modalias = "m25p80", | 71 | .modalias = "m25p80", |
71 | .platform_data = &qnap_tsx1x_flash, | 72 | .platform_data = &qnap_tsx1x_flash, |
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index dab2e102b9d7..b53e0854422f 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h | |||
@@ -93,6 +93,6 @@ extern int ocpi_enable(void); | |||
93 | static inline int ocpi_enable(void) { return 0; } | 93 | static inline int ocpi_enable(void) { return 0; } |
94 | #endif | 94 | #endif |
95 | 95 | ||
96 | extern int omap1_get_reset_sources(void); | 96 | extern u32 omap1_get_reset_sources(void); |
97 | 97 | ||
98 | #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ | 98 | #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 7155ed8b97f8..0af635205e8a 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -17,6 +17,8 @@ | |||
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/spi/spi.h> | 18 | #include <linux/spi/spi.h> |
19 | 19 | ||
20 | #include <linux/platform_data/omap-wd-timer.h> | ||
21 | |||
20 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
21 | 23 | ||
22 | #include <mach/tc.h> | 24 | #include <mach/tc.h> |
@@ -447,18 +449,31 @@ static struct resource wdt_resources[] = { | |||
447 | }; | 449 | }; |
448 | 450 | ||
449 | static struct platform_device omap_wdt_device = { | 451 | static struct platform_device omap_wdt_device = { |
450 | .name = "omap_wdt", | 452 | .name = "omap_wdt", |
451 | .id = -1, | 453 | .id = -1, |
452 | .num_resources = ARRAY_SIZE(wdt_resources), | 454 | .num_resources = ARRAY_SIZE(wdt_resources), |
453 | .resource = wdt_resources, | 455 | .resource = wdt_resources, |
454 | }; | 456 | }; |
455 | 457 | ||
456 | static int __init omap_init_wdt(void) | 458 | static int __init omap_init_wdt(void) |
457 | { | 459 | { |
460 | struct omap_wd_timer_platform_data pdata; | ||
461 | int ret; | ||
462 | |||
458 | if (!cpu_is_omap16xx()) | 463 | if (!cpu_is_omap16xx()) |
459 | return -ENODEV; | 464 | return -ENODEV; |
460 | 465 | ||
461 | return platform_device_register(&omap_wdt_device); | 466 | pdata.read_reset_sources = omap1_get_reset_sources; |
467 | |||
468 | ret = platform_device_register(&omap_wdt_device); | ||
469 | if (!ret) { | ||
470 | ret = platform_device_add_data(&omap_wdt_device, &pdata, | ||
471 | sizeof(pdata)); | ||
472 | if (ret) | ||
473 | platform_device_del(&omap_wdt_device); | ||
474 | } | ||
475 | |||
476 | return ret; | ||
462 | } | 477 | } |
463 | subsys_initcall(omap_init_wdt); | 478 | subsys_initcall(omap_init_wdt); |
464 | #endif | 479 | #endif |
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index a0a9f97772ea..5eebd7e889d0 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c | |||
@@ -4,10 +4,9 @@ | |||
4 | #include <linux/kernel.h> | 4 | #include <linux/kernel.h> |
5 | #include <linux/io.h> | 5 | #include <linux/io.h> |
6 | 6 | ||
7 | #include <plat/prcm.h> | ||
8 | |||
9 | #include <mach/hardware.h> | 7 | #include <mach/hardware.h> |
10 | 8 | ||
9 | #include "iomap.h" | ||
11 | #include "common.h" | 10 | #include "common.h" |
12 | 11 | ||
13 | /* ARM_SYSST bit shifts related to SoC reset sources */ | 12 | /* ARM_SYSST bit shifts related to SoC reset sources */ |
@@ -43,12 +42,12 @@ void omap1_restart(char mode, const char *cmd) | |||
43 | * Returns bits that represent the last reset source for the SoC. The | 42 | * Returns bits that represent the last reset source for the SoC. The |
44 | * format is standardized across OMAPs for use by the OMAP watchdog. | 43 | * format is standardized across OMAPs for use by the OMAP watchdog. |
45 | */ | 44 | */ |
46 | int omap1_get_reset_sources(void) | 45 | u32 omap1_get_reset_sources(void) |
47 | { | 46 | { |
48 | int ret = 0; | 47 | u32 ret = 0; |
49 | u16 rs; | 48 | u16 rs; |
50 | 49 | ||
51 | rs = __raw_readw(ARM_SYSST); | 50 | rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); |
52 | 51 | ||
53 | if (rs & (1 << ARM_SYSST_POR_SHIFT)) | 52 | if (rs & (1 << ARM_SYSST_POR_SHIFT)) |
54 | ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT; | 53 | ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT; |
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c index cdeb9d3ef640..bde7a35e5000 100644 --- a/arch/arm/mach-omap1/timer.c +++ b/arch/arm/mach-omap1/timer.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/slab.h> | 26 | #include <linux/slab.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/platform_data/dmtimer-omap.h> | ||
28 | 29 | ||
29 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
30 | 31 | ||
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 89368195bf08..41152fadd4c0 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c | |||
@@ -51,7 +51,6 @@ | |||
51 | #include <asm/mach/time.h> | 51 | #include <asm/mach/time.h> |
52 | 52 | ||
53 | #include <plat/counter-32k.h> | 53 | #include <plat/counter-32k.h> |
54 | #include <plat/dmtimer.h> | ||
55 | 54 | ||
56 | #include <mach/hardware.h> | 55 | #include <mach/hardware.h> |
57 | 56 | ||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index d5e834a9075d..11c57af01a88 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -50,6 +50,11 @@ AFLAGS_sram242x.o :=-Wa,-march=armv6 | |||
50 | AFLAGS_sram243x.o :=-Wa,-march=armv6 | 50 | AFLAGS_sram243x.o :=-Wa,-march=armv6 |
51 | AFLAGS_sram34xx.o :=-Wa,-march=armv7-a | 51 | AFLAGS_sram34xx.o :=-Wa,-march=armv7-a |
52 | 52 | ||
53 | # Restart code (OMAP4/5 currently in omap4-common.c) | ||
54 | obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o | ||
55 | obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o | ||
56 | obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o | ||
57 | |||
53 | # Pin multiplexing | 58 | # Pin multiplexing |
54 | obj-$(CONFIG_SOC_OMAP2420) += mux2420.o | 59 | obj-$(CONFIG_SOC_OMAP2420) += mux2420.o |
55 | obj-$(CONFIG_SOC_OMAP2430) += mux2430.o | 60 | obj-$(CONFIG_SOC_OMAP2430) += mux2430.o |
@@ -68,6 +73,8 @@ obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o | |||
68 | endif | 73 | endif |
69 | 74 | ||
70 | # Power Management | 75 | # Power Management |
76 | obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o | ||
77 | |||
71 | ifeq ($(CONFIG_PM),y) | 78 | ifeq ($(CONFIG_PM),y) |
72 | obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o | 79 | obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o |
73 | obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o | 80 | obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o |
@@ -75,7 +82,6 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o | |||
75 | obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o | 82 | obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o |
76 | obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o | 83 | obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o |
77 | obj-$(CONFIG_PM_DEBUG) += pm-debug.o | 84 | obj-$(CONFIG_PM_DEBUG) += pm-debug.o |
78 | obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o | ||
79 | 85 | ||
80 | obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o | 86 | obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o |
81 | obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o | 87 | obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o |
@@ -95,7 +101,7 @@ obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o | |||
95 | endif | 101 | endif |
96 | 102 | ||
97 | # PRCM | 103 | # PRCM |
98 | obj-y += prcm.o prm_common.o cm_common.o | 104 | obj-y += prm_common.o cm_common.o |
99 | obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o | 105 | obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o |
100 | obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o | 106 | obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o |
101 | obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o | 107 | obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o |
diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h index 06c19bb7bca6..43296c1af9ee 100644 --- a/arch/arm/mach-omap2/am33xx.h +++ b/arch/arm/mach-omap2/am33xx.h | |||
@@ -21,5 +21,6 @@ | |||
21 | #define AM33XX_SCM_BASE 0x44E10000 | 21 | #define AM33XX_SCM_BASE 0x44E10000 |
22 | #define AM33XX_CTRL_BASE AM33XX_SCM_BASE | 22 | #define AM33XX_CTRL_BASE AM33XX_SCM_BASE |
23 | #define AM33XX_PRCM_BASE 0x44E00000 | 23 | #define AM33XX_PRCM_BASE 0x44E00000 |
24 | #define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + 0x3FC) | ||
24 | 25 | ||
25 | #endif /* __ASM_ARCH_AM33XX_H */ | 26 | #endif /* __ASM_ARCH_AM33XX_H */ |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index d1c01625fe5a..4815ea6f8f5d 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -285,5 +285,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | |||
285 | .init_machine = omap_2430sdp_init, | 285 | .init_machine = omap_2430sdp_init, |
286 | .init_late = omap2430_init_late, | 286 | .init_late = omap2430_init_late, |
287 | .timer = &omap2_timer, | 287 | .timer = &omap2_timer, |
288 | .restart = omap_prcm_restart, | 288 | .restart = omap2xxx_restart, |
289 | MACHINE_END | 289 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 79fd9048fd79..6601754f9512 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
@@ -597,5 +597,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") | |||
597 | .init_machine = omap_3430sdp_init, | 597 | .init_machine = omap_3430sdp_init, |
598 | .init_late = omap3430_init_late, | 598 | .init_late = omap3430_init_late, |
599 | .timer = &omap3_timer, | 599 | .timer = &omap3_timer, |
600 | .restart = omap_prcm_restart, | 600 | .restart = omap3xxx_restart, |
601 | MACHINE_END | 601 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 81871b1c735c..050aaa771254 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c | |||
@@ -212,5 +212,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") | |||
212 | .init_machine = omap_sdp_init, | 212 | .init_machine = omap_sdp_init, |
213 | .init_late = omap3630_init_late, | 213 | .init_late = omap3630_init_late, |
214 | .timer = &omap3_timer, | 214 | .timer = &omap3_timer, |
215 | .restart = omap_prcm_restart, | 215 | .restart = omap3xxx_restart, |
216 | MACHINE_END | 216 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index fd80d976872d..85dfa71e0dc6 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -881,5 +881,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") | |||
881 | .init_machine = omap_4430sdp_init, | 881 | .init_machine = omap_4430sdp_init, |
882 | .init_late = omap4430_init_late, | 882 | .init_late = omap4430_init_late, |
883 | .timer = &omap4_timer, | 883 | .timer = &omap4_timer, |
884 | .restart = omap_prcm_restart, | 884 | .restart = omap44xx_restart, |
885 | MACHINE_END | 885 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 603503c587b7..51b96a1206d1 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c | |||
@@ -93,5 +93,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") | |||
93 | .init_machine = am3517_crane_init, | 93 | .init_machine = am3517_crane_init, |
94 | .init_late = am35xx_init_late, | 94 | .init_late = am35xx_init_late, |
95 | .timer = &omap3_timer, | 95 | .timer = &omap3_timer, |
96 | .restart = omap_prcm_restart, | 96 | .restart = omap3xxx_restart, |
97 | MACHINE_END | 97 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 96d6c5ab5d4c..4be58fd071f6 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
@@ -393,5 +393,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | |||
393 | .init_machine = am3517_evm_init, | 393 | .init_machine = am3517_evm_init, |
394 | .init_late = am35xx_init_late, | 394 | .init_late = am35xx_init_late, |
395 | .timer = &omap3_timer, | 395 | .timer = &omap3_timer, |
396 | .restart = omap_prcm_restart, | 396 | .restart = omap3xxx_restart, |
397 | MACHINE_END | 397 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 64cf1bde0f3b..5d0a61f54165 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -338,5 +338,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") | |||
338 | .init_machine = omap_apollon_init, | 338 | .init_machine = omap_apollon_init, |
339 | .init_late = omap2420_init_late, | 339 | .init_late = omap2420_init_late, |
340 | .timer = &omap2_timer, | 340 | .timer = &omap2_timer, |
341 | .restart = omap_prcm_restart, | 341 | .restart = omap2xxx_restart, |
342 | MACHINE_END | 342 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index a8cad2237a2a..c8e37dc00892 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -751,18 +751,18 @@ MACHINE_START(CM_T35, "Compulab CM-T35") | |||
751 | .init_machine = cm_t35_init, | 751 | .init_machine = cm_t35_init, |
752 | .init_late = omap35xx_init_late, | 752 | .init_late = omap35xx_init_late, |
753 | .timer = &omap3_timer, | 753 | .timer = &omap3_timer, |
754 | .restart = omap_prcm_restart, | 754 | .restart = omap3xxx_restart, |
755 | MACHINE_END | 755 | MACHINE_END |
756 | 756 | ||
757 | MACHINE_START(CM_T3730, "Compulab CM-T3730") | 757 | MACHINE_START(CM_T3730, "Compulab CM-T3730") |
758 | .atag_offset = 0x100, | 758 | .atag_offset = 0x100, |
759 | .reserve = omap_reserve, | 759 | .reserve = omap_reserve, |
760 | .map_io = omap3_map_io, | 760 | .map_io = omap3_map_io, |
761 | .init_early = omap3630_init_early, | 761 | .init_early = omap3630_init_early, |
762 | .init_irq = omap3_init_irq, | 762 | .init_irq = omap3_init_irq, |
763 | .handle_irq = omap3_intc_handle_irq, | 763 | .handle_irq = omap3_intc_handle_irq, |
764 | .init_machine = cm_t3730_init, | 764 | .init_machine = cm_t3730_init, |
765 | .init_late = omap3630_init_late, | 765 | .init_late = omap3630_init_late, |
766 | .timer = &omap3_timer, | 766 | .timer = &omap3_timer, |
767 | .restart = omap_prcm_restart, | 767 | .restart = omap3xxx_restart, |
768 | MACHINE_END | 768 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 278664731d2c..ebbc2adb499e 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c | |||
@@ -297,6 +297,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") | |||
297 | .handle_irq = omap3_intc_handle_irq, | 297 | .handle_irq = omap3_intc_handle_irq, |
298 | .init_machine = cm_t3517_init, | 298 | .init_machine = cm_t3517_init, |
299 | .init_late = am35xx_init_late, | 299 | .init_late = am35xx_init_late, |
300 | .timer = &omap3_timer, | 300 | .timer = &omap3_gp_timer, |
301 | .restart = omap_prcm_restart, | 301 | .restart = omap3xxx_restart, |
302 | MACHINE_END | 302 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 933479e36737..7667eb749522 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c | |||
@@ -643,5 +643,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") | |||
643 | .init_machine = devkit8000_init, | 643 | .init_machine = devkit8000_init, |
644 | .init_late = omap35xx_init_late, | 644 | .init_late = omap35xx_init_late, |
645 | .timer = &omap3_secure_timer, | 645 | .timer = &omap3_secure_timer, |
646 | .restart = omap_prcm_restart, | 646 | .restart = omap3xxx_restart, |
647 | MACHINE_END | 647 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 601ecdfb1cf9..f0715a369c44 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -57,7 +57,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |||
57 | .init_machine = omap_generic_init, | 57 | .init_machine = omap_generic_init, |
58 | .timer = &omap2_timer, | 58 | .timer = &omap2_timer, |
59 | .dt_compat = omap242x_boards_compat, | 59 | .dt_compat = omap242x_boards_compat, |
60 | .restart = omap_prcm_restart, | 60 | .restart = omap2xxx_restart, |
61 | MACHINE_END | 61 | MACHINE_END |
62 | #endif | 62 | #endif |
63 | 63 | ||
@@ -76,7 +76,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |||
76 | .init_machine = omap_generic_init, | 76 | .init_machine = omap_generic_init, |
77 | .timer = &omap2_timer, | 77 | .timer = &omap2_timer, |
78 | .dt_compat = omap243x_boards_compat, | 78 | .dt_compat = omap243x_boards_compat, |
79 | .restart = omap_prcm_restart, | 79 | .restart = omap2xxx_restart, |
80 | MACHINE_END | 80 | MACHINE_END |
81 | #endif | 81 | #endif |
82 | 82 | ||
@@ -95,7 +95,24 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |||
95 | .init_machine = omap_generic_init, | 95 | .init_machine = omap_generic_init, |
96 | .timer = &omap3_timer, | 96 | .timer = &omap3_timer, |
97 | .dt_compat = omap3_boards_compat, | 97 | .dt_compat = omap3_boards_compat, |
98 | .restart = omap_prcm_restart, | 98 | .restart = omap3xxx_restart, |
99 | MACHINE_END | ||
100 | |||
101 | static const char *omap3_gp_boards_compat[] __initdata = { | ||
102 | "ti,omap3-beagle", | ||
103 | NULL, | ||
104 | }; | ||
105 | |||
106 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | ||
107 | .reserve = omap_reserve, | ||
108 | .map_io = omap3_map_io, | ||
109 | .init_early = omap3430_init_early, | ||
110 | .init_irq = omap_intc_of_init, | ||
111 | .handle_irq = omap3_intc_handle_irq, | ||
112 | .init_machine = omap_generic_init, | ||
113 | .timer = &omap3_secure_timer, | ||
114 | .dt_compat = omap3_gp_boards_compat, | ||
115 | .restart = omap3xxx_restart, | ||
99 | MACHINE_END | 116 | MACHINE_END |
100 | #endif | 117 | #endif |
101 | 118 | ||
@@ -134,7 +151,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |||
134 | .init_late = omap4430_init_late, | 151 | .init_late = omap4430_init_late, |
135 | .timer = &omap4_timer, | 152 | .timer = &omap4_timer, |
136 | .dt_compat = omap4_boards_compat, | 153 | .dt_compat = omap4_boards_compat, |
137 | .restart = omap_prcm_restart, | 154 | .restart = omap44xx_restart, |
138 | MACHINE_END | 155 | MACHINE_END |
139 | #endif | 156 | #endif |
140 | 157 | ||
@@ -154,6 +171,6 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |||
154 | .init_machine = omap_generic_init, | 171 | .init_machine = omap_generic_init, |
155 | .timer = &omap5_timer, | 172 | .timer = &omap5_timer, |
156 | .dt_compat = omap5_boards_compat, | 173 | .dt_compat = omap5_boards_compat, |
157 | .restart = omap_prcm_restart, | 174 | .restart = omap44xx_restart, |
158 | MACHINE_END | 175 | MACHINE_END |
159 | #endif | 176 | #endif |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 8668c72ee810..b626dbe6f7bc 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -386,5 +386,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") | |||
386 | .init_machine = omap_h4_init, | 386 | .init_machine = omap_h4_init, |
387 | .init_late = omap2420_init_late, | 387 | .init_late = omap2420_init_late, |
388 | .timer = &omap2_timer, | 388 | .timer = &omap2_timer, |
389 | .restart = omap_prcm_restart, | 389 | .restart = omap2xxx_restart, |
390 | MACHINE_END | 390 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 549080c8446b..0f24cb84ba5a 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -656,7 +656,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") | |||
656 | .init_machine = igep_init, | 656 | .init_machine = igep_init, |
657 | .init_late = omap35xx_init_late, | 657 | .init_late = omap35xx_init_late, |
658 | .timer = &omap3_timer, | 658 | .timer = &omap3_timer, |
659 | .restart = omap_prcm_restart, | 659 | .restart = omap3xxx_restart, |
660 | MACHINE_END | 660 | MACHINE_END |
661 | 661 | ||
662 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | 662 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") |
@@ -669,5 +669,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") | |||
669 | .init_machine = igep_init, | 669 | .init_machine = igep_init, |
670 | .init_late = omap35xx_init_late, | 670 | .init_late = omap35xx_init_late, |
671 | .timer = &omap3_timer, | 671 | .timer = &omap3_timer, |
672 | .restart = omap_prcm_restart, | 672 | .restart = omap3xxx_restart, |
673 | MACHINE_END | 673 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 1164b1061038..0869f4f3d3e1 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -436,5 +436,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") | |||
436 | .init_machine = omap_ldp_init, | 436 | .init_machine = omap_ldp_init, |
437 | .init_late = omap3430_init_late, | 437 | .init_late = omap3430_init_late, |
438 | .timer = &omap3_timer, | 438 | .timer = &omap3_timer, |
439 | .restart = omap_prcm_restart, | 439 | .restart = omap3xxx_restart, |
440 | MACHINE_END | 440 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index e3efcb88cb3b..a4e167c55c1d 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -690,7 +690,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") | |||
690 | .init_machine = n8x0_init_machine, | 690 | .init_machine = n8x0_init_machine, |
691 | .init_late = omap2420_init_late, | 691 | .init_late = omap2420_init_late, |
692 | .timer = &omap2_timer, | 692 | .timer = &omap2_timer, |
693 | .restart = omap_prcm_restart, | 693 | .restart = omap2xxx_restart, |
694 | MACHINE_END | 694 | MACHINE_END |
695 | 695 | ||
696 | MACHINE_START(NOKIA_N810, "Nokia N810") | 696 | MACHINE_START(NOKIA_N810, "Nokia N810") |
@@ -703,7 +703,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") | |||
703 | .init_machine = n8x0_init_machine, | 703 | .init_machine = n8x0_init_machine, |
704 | .init_late = omap2420_init_late, | 704 | .init_late = omap2420_init_late, |
705 | .timer = &omap2_timer, | 705 | .timer = &omap2_timer, |
706 | .restart = omap_prcm_restart, | 706 | .restart = omap2xxx_restart, |
707 | MACHINE_END | 707 | MACHINE_END |
708 | 708 | ||
709 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | 709 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") |
@@ -716,5 +716,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | |||
716 | .init_machine = n8x0_init_machine, | 716 | .init_machine = n8x0_init_machine, |
717 | .init_late = omap2420_init_late, | 717 | .init_late = omap2420_init_late, |
718 | .timer = &omap2_timer, | 718 | .timer = &omap2_timer, |
719 | .restart = omap_prcm_restart, | 719 | .restart = omap2xxx_restart, |
720 | MACHINE_END | 720 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 5a3800da903f..22c483d5dfa8 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -545,5 +545,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | |||
545 | .init_machine = omap3_beagle_init, | 545 | .init_machine = omap3_beagle_init, |
546 | .init_late = omap3_init_late, | 546 | .init_late = omap3_init_late, |
547 | .timer = &omap3_secure_timer, | 547 | .timer = &omap3_secure_timer, |
548 | .restart = omap_prcm_restart, | 548 | .restart = omap3xxx_restart, |
549 | MACHINE_END | 549 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 3c0b9a90f3b3..54647d6286b4 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -757,5 +757,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") | |||
757 | .init_machine = omap3_evm_init, | 757 | .init_machine = omap3_evm_init, |
758 | .init_late = omap35xx_init_late, | 758 | .init_late = omap35xx_init_late, |
759 | .timer = &omap3_timer, | 759 | .timer = &omap3_timer, |
760 | .restart = omap_prcm_restart, | 760 | .restart = omap3xxx_restart, |
761 | MACHINE_END | 761 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index e84e2a875378..2a065ba6eb58 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c | |||
@@ -232,7 +232,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") | |||
232 | .init_machine = omap3logic_init, | 232 | .init_machine = omap3logic_init, |
233 | .init_late = omap35xx_init_late, | 233 | .init_late = omap35xx_init_late, |
234 | .timer = &omap3_timer, | 234 | .timer = &omap3_timer, |
235 | .restart = omap_prcm_restart, | 235 | .restart = omap3xxx_restart, |
236 | MACHINE_END | 236 | MACHINE_END |
237 | 237 | ||
238 | MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | 238 | MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") |
@@ -245,5 +245,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | |||
245 | .init_machine = omap3logic_init, | 245 | .init_machine = omap3logic_init, |
246 | .init_late = omap35xx_init_late, | 246 | .init_late = omap35xx_init_late, |
247 | .timer = &omap3_timer, | 247 | .timer = &omap3_timer, |
248 | .restart = omap_prcm_restart, | 248 | .restart = omap3xxx_restart, |
249 | MACHINE_END | 249 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index ce31bd329f38..a53a6683c1b8 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -619,5 +619,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") | |||
619 | .init_machine = omap3pandora_init, | 619 | .init_machine = omap3pandora_init, |
620 | .init_late = omap35xx_init_late, | 620 | .init_late = omap35xx_init_late, |
621 | .timer = &omap3_timer, | 621 | .timer = &omap3_timer, |
622 | .restart = omap_prcm_restart, | 622 | .restart = omap3xxx_restart, |
623 | MACHINE_END | 623 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index ba1124538b9c..d8638b3b4f94 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c | |||
@@ -427,5 +427,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") | |||
427 | .init_machine = omap3_stalker_init, | 427 | .init_machine = omap3_stalker_init, |
428 | .init_late = omap35xx_init_late, | 428 | .init_late = omap35xx_init_late, |
429 | .timer = &omap3_secure_timer, | 429 | .timer = &omap3_secure_timer, |
430 | .restart = omap_prcm_restart, | 430 | .restart = omap3xxx_restart, |
431 | MACHINE_END | 431 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index a225d819633f..263cb9cfbf37 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
@@ -387,5 +387,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") | |||
387 | .init_machine = omap3_touchbook_init, | 387 | .init_machine = omap3_touchbook_init, |
388 | .init_late = omap3430_init_late, | 388 | .init_late = omap3430_init_late, |
389 | .timer = &omap3_secure_timer, | 389 | .timer = &omap3_secure_timer, |
390 | .restart = omap_prcm_restart, | 390 | .restart = omap3xxx_restart, |
391 | MACHINE_END | 391 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 8c00b99cd2a3..12a3a24d5bb5 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -524,5 +524,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") | |||
524 | .init_machine = omap4_panda_init, | 524 | .init_machine = omap4_panda_init, |
525 | .init_late = omap4430_init_late, | 525 | .init_late = omap4430_init_late, |
526 | .timer = &omap4_timer, | 526 | .timer = &omap4_timer, |
527 | .restart = omap_prcm_restart, | 527 | .restart = omap44xx_restart, |
528 | MACHINE_END | 528 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index f5ba43fa0400..c8fde3e56441 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -552,5 +552,5 @@ MACHINE_START(OVERO, "Gumstix Overo") | |||
552 | .init_machine = overo_init, | 552 | .init_machine = overo_init, |
553 | .init_late = omap35xx_init_late, | 553 | .init_late = omap35xx_init_late, |
554 | .timer = &omap3_timer, | 554 | .timer = &omap3_timer, |
555 | .restart = omap_prcm_restart, | 555 | .restart = omap3xxx_restart, |
556 | MACHINE_END | 556 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 1997e0e722a1..cbcb1b2dc31f 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c | |||
@@ -148,7 +148,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") | |||
148 | .init_machine = rm680_init, | 148 | .init_machine = rm680_init, |
149 | .init_late = omap3630_init_late, | 149 | .init_late = omap3630_init_late, |
150 | .timer = &omap3_timer, | 150 | .timer = &omap3_timer, |
151 | .restart = omap_prcm_restart, | 151 | .restart = omap3xxx_restart, |
152 | MACHINE_END | 152 | MACHINE_END |
153 | 153 | ||
154 | MACHINE_START(NOKIA_RM696, "Nokia RM-696 board") | 154 | MACHINE_START(NOKIA_RM696, "Nokia RM-696 board") |
@@ -161,5 +161,5 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board") | |||
161 | .init_machine = rm680_init, | 161 | .init_machine = rm680_init, |
162 | .init_late = omap3630_init_late, | 162 | .init_late = omap3630_init_late, |
163 | .timer = &omap3_timer, | 163 | .timer = &omap3_timer, |
164 | .restart = omap_prcm_restart, | 164 | .restart = omap3xxx_restart, |
165 | MACHINE_END | 165 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index c388aec14799..bf8f74b0ce3e 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -127,5 +127,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | |||
127 | .init_machine = rx51_init, | 127 | .init_machine = rx51_init, |
128 | .init_late = omap3430_init_late, | 128 | .init_late = omap3430_init_late, |
129 | .timer = &omap3_timer, | 129 | .timer = &omap3_timer, |
130 | .restart = omap_prcm_restart, | 130 | .restart = omap3xxx_restart, |
131 | MACHINE_END | 131 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 5e672c2b6a43..1a3e056d63a7 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c | |||
@@ -46,7 +46,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") | |||
46 | .timer = &omap3_timer, | 46 | .timer = &omap3_timer, |
47 | .init_machine = ti81xx_evm_init, | 47 | .init_machine = ti81xx_evm_init, |
48 | .init_late = ti81xx_init_late, | 48 | .init_late = ti81xx_init_late, |
49 | .restart = omap_prcm_restart, | 49 | .restart = omap44xx_restart, |
50 | MACHINE_END | 50 | MACHINE_END |
51 | 51 | ||
52 | MACHINE_START(TI8148EVM, "ti8148evm") | 52 | MACHINE_START(TI8148EVM, "ti8148evm") |
@@ -58,5 +58,5 @@ MACHINE_START(TI8148EVM, "ti8148evm") | |||
58 | .timer = &omap3_timer, | 58 | .timer = &omap3_timer, |
59 | .init_machine = ti81xx_evm_init, | 59 | .init_machine = ti81xx_evm_init, |
60 | .init_late = ti81xx_init_late, | 60 | .init_late = ti81xx_init_late, |
61 | .restart = omap_prcm_restart, | 61 | .restart = omap44xx_restart, |
62 | MACHINE_END | 62 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 8feb4d99b96d..d7fa31e67238 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c | |||
@@ -138,7 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") | |||
138 | .init_machine = omap_zoom_init, | 138 | .init_machine = omap_zoom_init, |
139 | .init_late = omap3430_init_late, | 139 | .init_late = omap3430_init_late, |
140 | .timer = &omap3_timer, | 140 | .timer = &omap3_timer, |
141 | .restart = omap_prcm_restart, | 141 | .restart = omap3xxx_restart, |
142 | MACHINE_END | 142 | MACHINE_END |
143 | 143 | ||
144 | MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | 144 | MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") |
@@ -151,5 +151,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | |||
151 | .init_machine = omap_zoom_init, | 151 | .init_machine = omap_zoom_init, |
152 | .init_late = omap3630_init_late, | 152 | .init_late = omap3630_init_late, |
153 | .timer = &omap3_timer, | 153 | .timer = &omap3_timer, |
154 | .restart = omap_prcm_restart, | 154 | .restart = omap3xxx_restart, |
155 | MACHINE_END | 155 | MACHINE_END |
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index e3f0c1e262a7..8c5b13e7ee61 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | 23 | ||
24 | #include <plat/prcm.h> | ||
25 | 24 | ||
26 | #include "clock.h" | 25 | #include "clock.h" |
27 | #include "clock2xxx.h" | 26 | #include "clock2xxx.h" |
@@ -37,44 +36,16 @@ | |||
37 | #define APLLS_CLKIN_13MHZ 2 | 36 | #define APLLS_CLKIN_13MHZ 2 |
38 | #define APLLS_CLKIN_12MHZ 3 | 37 | #define APLLS_CLKIN_12MHZ 3 |
39 | 38 | ||
40 | void __iomem *cm_idlest_pll; | ||
41 | |||
42 | /* Private functions */ | 39 | /* Private functions */ |
43 | 40 | ||
44 | /* Enable an APLL if off */ | 41 | static int _apll96_enable(struct clk *clk) |
45 | static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask) | ||
46 | { | ||
47 | u32 cval, apll_mask; | ||
48 | |||
49 | apll_mask = EN_APLL_LOCKED << clk->enable_bit; | ||
50 | |||
51 | cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
52 | |||
53 | if ((cval & apll_mask) == apll_mask) | ||
54 | return 0; /* apll already enabled */ | ||
55 | |||
56 | cval &= ~apll_mask; | ||
57 | cval |= apll_mask; | ||
58 | omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); | ||
59 | |||
60 | omap2_cm_wait_idlest(cm_idlest_pll, status_mask, | ||
61 | OMAP24XX_CM_IDLEST_VAL, __clk_get_name(clk)); | ||
62 | |||
63 | /* | ||
64 | * REVISIT: Should we return an error code if omap2_wait_clock_ready() | ||
65 | * fails? | ||
66 | */ | ||
67 | return 0; | ||
68 | } | ||
69 | |||
70 | static int omap2_clk_apll96_enable(struct clk *clk) | ||
71 | { | 42 | { |
72 | return omap2_clk_apll_enable(clk, OMAP24XX_ST_96M_APLL_MASK); | 43 | return omap2xxx_cm_apll96_enable(); |
73 | } | 44 | } |
74 | 45 | ||
75 | static int omap2_clk_apll54_enable(struct clk *clk) | 46 | static int _apll54_enable(struct clk *clk) |
76 | { | 47 | { |
77 | return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL_MASK); | 48 | return omap2xxx_cm_apll54_enable(); |
78 | } | 49 | } |
79 | 50 | ||
80 | static void _apll96_allow_idle(struct clk *clk) | 51 | static void _apll96_allow_idle(struct clk *clk) |
@@ -97,28 +68,28 @@ static void _apll54_deny_idle(struct clk *clk) | |||
97 | omap2xxx_cm_set_apll54_disable_autoidle(); | 68 | omap2xxx_cm_set_apll54_disable_autoidle(); |
98 | } | 69 | } |
99 | 70 | ||
100 | /* Stop APLL */ | 71 | static void _apll96_disable(struct clk *clk) |
101 | static void omap2_clk_apll_disable(struct clk *clk) | ||
102 | { | 72 | { |
103 | u32 cval; | 73 | omap2xxx_cm_apll96_disable(); |
74 | } | ||
104 | 75 | ||
105 | cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); | 76 | static void _apll54_disable(struct clk *clk) |
106 | cval &= ~(EN_APLL_LOCKED << clk->enable_bit); | 77 | { |
107 | omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); | 78 | omap2xxx_cm_apll54_disable(); |
108 | } | 79 | } |
109 | 80 | ||
110 | /* Public data */ | 81 | /* Public data */ |
111 | 82 | ||
112 | const struct clkops clkops_apll96 = { | 83 | const struct clkops clkops_apll96 = { |
113 | .enable = omap2_clk_apll96_enable, | 84 | .enable = _apll96_enable, |
114 | .disable = omap2_clk_apll_disable, | 85 | .disable = _apll96_disable, |
115 | .allow_idle = _apll96_allow_idle, | 86 | .allow_idle = _apll96_allow_idle, |
116 | .deny_idle = _apll96_deny_idle, | 87 | .deny_idle = _apll96_deny_idle, |
117 | }; | 88 | }; |
118 | 89 | ||
119 | const struct clkops clkops_apll54 = { | 90 | const struct clkops clkops_apll54 = { |
120 | .enable = omap2_clk_apll54_enable, | 91 | .enable = _apll54_enable, |
121 | .disable = omap2_clk_apll_disable, | 92 | .disable = _apll54_disable, |
122 | .allow_idle = _apll54_allow_idle, | 93 | .allow_idle = _apll54_allow_idle, |
123 | .deny_idle = _apll54_deny_idle, | 94 | .deny_idle = _apll54_deny_idle, |
124 | }; | 95 | }; |
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 0d2f14c2dcce..825e44cdf1cf 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c | |||
@@ -28,16 +28,22 @@ | |||
28 | #include "clock.h" | 28 | #include "clock.h" |
29 | #include "clock2xxx.h" | 29 | #include "clock2xxx.h" |
30 | #include "opp2xxx.h" | 30 | #include "opp2xxx.h" |
31 | #include "cm2xxx_3xxx.h" | 31 | #include "cm2xxx.h" |
32 | #include "cm-regbits-24xx.h" | 32 | #include "cm-regbits-24xx.h" |
33 | #include "sdrc.h" | 33 | #include "sdrc.h" |
34 | #include "sram.h" | 34 | #include "sram.h" |
35 | 35 | ||
36 | /* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */ | 36 | /* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */ |
37 | 37 | ||
38 | /* | ||
39 | * dpll_core_ck: pointer to the combined dpll_ck + core_ck on OMAP2xxx | ||
40 | * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set | ||
41 | * during dpll_ck init and used later by omap2xxx_clk_get_core_rate(). | ||
42 | */ | ||
43 | static struct clk *dpll_core_ck; | ||
44 | |||
38 | /** | 45 | /** |
39 | * omap2xxx_clk_get_core_rate - return the CORE_CLK rate | 46 | * omap2xxx_clk_get_core_rate - return the CORE_CLK rate |
40 | * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck") | ||
41 | * | 47 | * |
42 | * Returns the CORE_CLK rate. CORE_CLK can have one of three rate | 48 | * Returns the CORE_CLK rate. CORE_CLK can have one of three rate |
43 | * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz | 49 | * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz |
@@ -45,12 +51,14 @@ | |||
45 | * struct clk *dpll_ck, which is a composite clock of dpll_ck and | 51 | * struct clk *dpll_ck, which is a composite clock of dpll_ck and |
46 | * core_ck. | 52 | * core_ck. |
47 | */ | 53 | */ |
48 | unsigned long omap2xxx_clk_get_core_rate(struct clk *clk) | 54 | unsigned long omap2xxx_clk_get_core_rate(void) |
49 | { | 55 | { |
50 | long long core_clk; | 56 | long long core_clk; |
51 | u32 v; | 57 | u32 v; |
52 | 58 | ||
53 | core_clk = omap2_get_dpll_rate(clk); | 59 | WARN_ON(!dpll_core_ck); |
60 | |||
61 | core_clk = omap2_get_dpll_rate(dpll_core_ck); | ||
54 | 62 | ||
55 | v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); | 63 | v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); |
56 | v &= OMAP24XX_CORE_CLK_SRC_MASK; | 64 | v &= OMAP24XX_CORE_CLK_SRC_MASK; |
@@ -98,7 +106,7 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate) | |||
98 | 106 | ||
99 | unsigned long omap2_dpllcore_recalc(struct clk *clk) | 107 | unsigned long omap2_dpllcore_recalc(struct clk *clk) |
100 | { | 108 | { |
101 | return omap2xxx_clk_get_core_rate(clk); | 109 | return omap2xxx_clk_get_core_rate(); |
102 | } | 110 | } |
103 | 111 | ||
104 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) | 112 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) |
@@ -108,7 +116,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) | |||
108 | struct prcm_config tmpset; | 116 | struct prcm_config tmpset; |
109 | const struct dpll_data *dd; | 117 | const struct dpll_data *dd; |
110 | 118 | ||
111 | cur_rate = omap2xxx_clk_get_core_rate(dclk); | 119 | cur_rate = omap2xxx_clk_get_core_rate(); |
112 | mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); | 120 | mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); |
113 | mult &= OMAP24XX_CORE_CLK_SRC_MASK; | 121 | mult &= OMAP24XX_CORE_CLK_SRC_MASK; |
114 | 122 | ||
@@ -169,3 +177,19 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) | |||
169 | return 0; | 177 | return 0; |
170 | } | 178 | } |
171 | 179 | ||
180 | /** | ||
181 | * omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck | ||
182 | * @clk: struct clk *dpll_ck | ||
183 | * | ||
184 | * Store a local copy of @clk in dpll_core_ck so other code can query | ||
185 | * the core rate without having to clk_get(), which can sleep. Must | ||
186 | * only be called once. No return value. XXX If the clock | ||
187 | * registration process is ever changed such that dpll_ck is no longer | ||
188 | * statically defined, this code may need to change to increment some | ||
189 | * kind of use count on dpll_ck. | ||
190 | */ | ||
191 | void omap2xxx_clkt_dpllcore_init(struct clk *clk) | ||
192 | { | ||
193 | WARN(dpll_core_ck, "dpll_core_ck already set - should never happen"); | ||
194 | dpll_core_ck = clk; | ||
195 | } | ||
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index a38ebb209721..1c2041fbd718 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2xxx DVFS virtual clock functions | 2 | * OMAP2xxx DVFS virtual clock functions |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2008 Texas Instruments, Inc. | 4 | * Copyright (C) 2005-2008, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2004-2010 Nokia Corporation | 5 | * Copyright (C) 2004-2010 Nokia Corporation |
6 | * | 6 | * |
7 | * Contacts: | 7 | * Contacts: |
@@ -37,7 +37,7 @@ | |||
37 | #include "clock.h" | 37 | #include "clock.h" |
38 | #include "clock2xxx.h" | 38 | #include "clock2xxx.h" |
39 | #include "opp2xxx.h" | 39 | #include "opp2xxx.h" |
40 | #include "cm2xxx_3xxx.h" | 40 | #include "cm2xxx.h" |
41 | #include "cm-regbits-24xx.h" | 41 | #include "cm-regbits-24xx.h" |
42 | #include "sdrc.h" | 42 | #include "sdrc.h" |
43 | #include "sram.h" | 43 | #include "sram.h" |
@@ -45,6 +45,13 @@ | |||
45 | const struct prcm_config *curr_prcm_set; | 45 | const struct prcm_config *curr_prcm_set; |
46 | const struct prcm_config *rate_table; | 46 | const struct prcm_config *rate_table; |
47 | 47 | ||
48 | /* | ||
49 | * sys_ck_rate: the rate of the external high-frequency clock | ||
50 | * oscillator on the board. Set by the SoC-specific clock init code. | ||
51 | * Once set during a boot, will not change. | ||
52 | */ | ||
53 | static unsigned long sys_ck_rate; | ||
54 | |||
48 | /** | 55 | /** |
49 | * omap2_table_mpu_recalc - just return the MPU speed | 56 | * omap2_table_mpu_recalc - just return the MPU speed |
50 | * @clk: virt_prcm_set struct clk | 57 | * @clk: virt_prcm_set struct clk |
@@ -66,15 +73,14 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk) | |||
66 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) | 73 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) |
67 | { | 74 | { |
68 | const struct prcm_config *ptr; | 75 | const struct prcm_config *ptr; |
69 | long highest_rate, sys_clk_rate; | 76 | long highest_rate; |
70 | 77 | ||
71 | highest_rate = -EINVAL; | 78 | highest_rate = -EINVAL; |
72 | sys_clk_rate = __clk_get_rate(sclk); | ||
73 | 79 | ||
74 | for (ptr = rate_table; ptr->mpu_speed; ptr++) { | 80 | for (ptr = rate_table; ptr->mpu_speed; ptr++) { |
75 | if (!(ptr->flags & cpu_mask)) | 81 | if (!(ptr->flags & cpu_mask)) |
76 | continue; | 82 | continue; |
77 | if (ptr->xtal_speed != sys_clk_rate) | 83 | if (ptr->xtal_speed != sys_ck_rate) |
78 | continue; | 84 | continue; |
79 | 85 | ||
80 | highest_rate = ptr->mpu_speed; | 86 | highest_rate = ptr->mpu_speed; |
@@ -93,15 +99,12 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |||
93 | const struct prcm_config *prcm; | 99 | const struct prcm_config *prcm; |
94 | unsigned long found_speed = 0; | 100 | unsigned long found_speed = 0; |
95 | unsigned long flags; | 101 | unsigned long flags; |
96 | long sys_clk_rate; | ||
97 | |||
98 | sys_clk_rate = __clk_get_rate(sclk); | ||
99 | 102 | ||
100 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | 103 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { |
101 | if (!(prcm->flags & cpu_mask)) | 104 | if (!(prcm->flags & cpu_mask)) |
102 | continue; | 105 | continue; |
103 | 106 | ||
104 | if (prcm->xtal_speed != sys_clk_rate) | 107 | if (prcm->xtal_speed != sys_ck_rate) |
105 | continue; | 108 | continue; |
106 | 109 | ||
107 | if (prcm->mpu_speed <= rate) { | 110 | if (prcm->mpu_speed <= rate) { |
@@ -117,7 +120,7 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |||
117 | } | 120 | } |
118 | 121 | ||
119 | curr_prcm_set = prcm; | 122 | curr_prcm_set = prcm; |
120 | cur_rate = omap2xxx_clk_get_core_rate(dclk); | 123 | cur_rate = omap2xxx_clk_get_core_rate(); |
121 | 124 | ||
122 | if (prcm->dpll_speed == cur_rate / 2) { | 125 | if (prcm->dpll_speed == cur_rate / 2) { |
123 | omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); | 126 | omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); |
@@ -167,3 +170,50 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |||
167 | 170 | ||
168 | return 0; | 171 | return 0; |
169 | } | 172 | } |
173 | |||
174 | /** | ||
175 | * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate | ||
176 | * table sets matches the current CORE DPLL hardware rate | ||
177 | * | ||
178 | * Check the MPU rate set by bootloader. Sets the 'curr_prcm_set' | ||
179 | * global to point to the active rate set when found; otherwise, sets | ||
180 | * it to NULL. No return value; | ||
181 | */ | ||
182 | void omap2xxx_clkt_vps_check_bootloader_rates(void) | ||
183 | { | ||
184 | const struct prcm_config *prcm = NULL; | ||
185 | unsigned long rate; | ||
186 | |||
187 | rate = omap2xxx_clk_get_core_rate(); | ||
188 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
189 | if (!(prcm->flags & cpu_mask)) | ||
190 | continue; | ||
191 | if (prcm->xtal_speed != sys_ck_rate) | ||
192 | continue; | ||
193 | if (prcm->dpll_speed <= rate) | ||
194 | break; | ||
195 | } | ||
196 | curr_prcm_set = prcm; | ||
197 | } | ||
198 | |||
199 | /** | ||
200 | * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate | ||
201 | * | ||
202 | * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS | ||
203 | * code. (The sys_ck rate does not -- or rather, must not -- change | ||
204 | * during kernel runtime.) Must be called after we have a valid | ||
205 | * sys_ck rate, but before the virt_prcm_set clock rate is | ||
206 | * recalculated. No return value. | ||
207 | */ | ||
208 | void omap2xxx_clkt_vps_late_init(void) | ||
209 | { | ||
210 | struct clk *c; | ||
211 | |||
212 | c = clk_get(NULL, "sys_ck"); | ||
213 | if (IS_ERR(c)) { | ||
214 | WARN(1, "could not locate sys_ck\n"); | ||
215 | } else { | ||
216 | sys_ck_rate = clk_get_rate(c); | ||
217 | clk_put(c); | ||
218 | } | ||
219 | } | ||
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c index 7c8d41e49834..fe774a09dd0c 100644 --- a/arch/arm/mach-omap2/clkt_iclk.c +++ b/arch/arm/mach-omap2/clkt_iclk.c | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/clk.h> | 14 | #include <linux/clk.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | 16 | ||
17 | #include <plat/prcm.h> | ||
18 | 17 | ||
19 | #include "clock.h" | 18 | #include "clock.h" |
20 | #include "clock2xxx.h" | 19 | #include "clock2xxx.h" |
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 9205ea7d8dde..e381d991092c 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -26,17 +26,24 @@ | |||
26 | 26 | ||
27 | #include <asm/cpu.h> | 27 | #include <asm/cpu.h> |
28 | 28 | ||
29 | #include <plat/prcm.h> | ||
30 | 29 | ||
31 | #include <trace/events/power.h> | 30 | #include <trace/events/power.h> |
32 | 31 | ||
33 | #include "soc.h" | 32 | #include "soc.h" |
34 | #include "clockdomain.h" | 33 | #include "clockdomain.h" |
35 | #include "clock.h" | 34 | #include "clock.h" |
35 | #include "cm.h" | ||
36 | #include "cm2xxx.h" | 36 | #include "cm2xxx.h" |
37 | #include "cm3xxx.h" | 37 | #include "cm3xxx.h" |
38 | #include "cm-regbits-24xx.h" | 38 | #include "cm-regbits-24xx.h" |
39 | #include "cm-regbits-34xx.h" | 39 | #include "cm-regbits-34xx.h" |
40 | #include "common.h" | ||
41 | |||
42 | /* | ||
43 | * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait | ||
44 | * for a module to indicate that it is no longer in idle | ||
45 | */ | ||
46 | #define MAX_MODULE_ENABLE_WAIT 100000 | ||
40 | 47 | ||
41 | u16 cpu_mask; | 48 | u16 cpu_mask; |
42 | 49 | ||
@@ -58,6 +65,40 @@ static DEFINE_SPINLOCK(clockfw_lock); | |||
58 | 65 | ||
59 | /* Private functions */ | 66 | /* Private functions */ |
60 | 67 | ||
68 | |||
69 | /** | ||
70 | * _wait_idlest_generic - wait for a module to leave the idle state | ||
71 | * @reg: virtual address of module IDLEST register | ||
72 | * @mask: value to mask against to determine if the module is active | ||
73 | * @idlest: idle state indicator (0 or 1) for the clock | ||
74 | * @name: name of the clock (for printk) | ||
75 | * | ||
76 | * Wait for a module to leave idle, where its idle-status register is | ||
77 | * not inside the CM module. Returns 1 if the module left idle | ||
78 | * promptly, or 0 if the module did not leave idle before the timeout | ||
79 | * elapsed. XXX Deprecated - should be moved into drivers for the | ||
80 | * individual IP block that the IDLEST register exists in. | ||
81 | */ | ||
82 | static int _wait_idlest_generic(void __iomem *reg, u32 mask, u8 idlest, | ||
83 | const char *name) | ||
84 | { | ||
85 | int i = 0, ena = 0; | ||
86 | |||
87 | ena = (idlest) ? 0 : mask; | ||
88 | |||
89 | omap_test_timeout(((__raw_readl(reg) & mask) == ena), | ||
90 | MAX_MODULE_ENABLE_WAIT, i); | ||
91 | |||
92 | if (i < MAX_MODULE_ENABLE_WAIT) | ||
93 | pr_debug("omap clock: module associated with clock %s ready after %d loops\n", | ||
94 | name, i); | ||
95 | else | ||
96 | pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n", | ||
97 | name, MAX_MODULE_ENABLE_WAIT); | ||
98 | |||
99 | return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; | ||
100 | }; | ||
101 | |||
61 | /** | 102 | /** |
62 | * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE | 103 | * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE |
63 | * @clk: struct clk * belonging to the module | 104 | * @clk: struct clk * belonging to the module |
@@ -71,7 +112,9 @@ static DEFINE_SPINLOCK(clockfw_lock); | |||
71 | static void _omap2_module_wait_ready(struct clk *clk) | 112 | static void _omap2_module_wait_ready(struct clk *clk) |
72 | { | 113 | { |
73 | void __iomem *companion_reg, *idlest_reg; | 114 | void __iomem *companion_reg, *idlest_reg; |
74 | u8 other_bit, idlest_bit, idlest_val; | 115 | u8 other_bit, idlest_bit, idlest_val, idlest_reg_id; |
116 | s16 prcm_mod; | ||
117 | int r; | ||
75 | 118 | ||
76 | /* Not all modules have multiple clocks that their IDLEST depends on */ | 119 | /* Not all modules have multiple clocks that their IDLEST depends on */ |
77 | if (clk->ops->find_companion) { | 120 | if (clk->ops->find_companion) { |
@@ -82,8 +125,14 @@ static void _omap2_module_wait_ready(struct clk *clk) | |||
82 | 125 | ||
83 | clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); | 126 | clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); |
84 | 127 | ||
85 | omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val, | 128 | r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id); |
86 | __clk_get_name(clk)); | 129 | if (r) { |
130 | /* IDLEST register not in the CM module */ | ||
131 | _wait_idlest_generic(idlest_reg, (1 << idlest_bit), idlest_val, | ||
132 | clk->name); | ||
133 | } else { | ||
134 | cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit); | ||
135 | }; | ||
87 | } | 136 | } |
88 | 137 | ||
89 | /* Public functions */ | 138 | /* Public functions */ |
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index cfba1ffe5cc2..ff9789bc0fd1 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -409,33 +409,6 @@ extern void omap2_clkt_iclk_deny_idle(struct clk *clk); | |||
409 | u32 omap2_get_dpll_rate(struct clk *clk); | 409 | u32 omap2_get_dpll_rate(struct clk *clk); |
410 | void omap2_init_dpll_parent(struct clk *clk); | 410 | void omap2_init_dpll_parent(struct clk *clk); |
411 | 411 | ||
412 | int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); | ||
413 | |||
414 | |||
415 | #ifdef CONFIG_ARCH_OMAP2 | ||
416 | void omap2xxx_clk_prepare_for_reboot(void); | ||
417 | #else | ||
418 | static inline void omap2xxx_clk_prepare_for_reboot(void) | ||
419 | { | ||
420 | } | ||
421 | #endif | ||
422 | |||
423 | #ifdef CONFIG_ARCH_OMAP3 | ||
424 | void omap3_clk_prepare_for_reboot(void); | ||
425 | #else | ||
426 | static inline void omap3_clk_prepare_for_reboot(void) | ||
427 | { | ||
428 | } | ||
429 | #endif | ||
430 | |||
431 | #ifdef CONFIG_ARCH_OMAP4 | ||
432 | void omap4_clk_prepare_for_reboot(void); | ||
433 | #else | ||
434 | static inline void omap4_clk_prepare_for_reboot(void) | ||
435 | { | ||
436 | } | ||
437 | #endif | ||
438 | |||
439 | int omap2_dflt_clk_enable(struct clk *clk); | 412 | int omap2_dflt_clk_enable(struct clk *clk); |
440 | void omap2_dflt_clk_disable(struct clk *clk); | 413 | void omap2_dflt_clk_disable(struct clk *clk); |
441 | void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, | 414 | void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, |
@@ -454,7 +427,6 @@ extern const struct clkops clkops_dummy; | |||
454 | extern const struct clkops clkops_omap2_dflt; | 427 | extern const struct clkops clkops_omap2_dflt; |
455 | 428 | ||
456 | extern struct clk_functions omap2_clk_functions; | 429 | extern struct clk_functions omap2_clk_functions; |
457 | extern struct clk *vclk, *sclk; | ||
458 | 430 | ||
459 | extern const struct clksel_rate gpt_32k_rates[]; | 431 | extern const struct clksel_rate gpt_32k_rates[]; |
460 | extern const struct clksel_rate gpt_sys_rates[]; | 432 | extern const struct clksel_rate gpt_sys_rates[]; |
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index da1e388f22f7..608874b651e8 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2420 clock data | 2 | * OMAP2420 clock data |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. | 4 | * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2004-2011 Nokia Corporation | 5 | * Copyright (C) 2004-2011 Nokia Corporation |
6 | * | 6 | * |
7 | * Contacts: | 7 | * Contacts: |
@@ -124,6 +124,7 @@ static struct clk dpll_ck = { | |||
124 | .name = "dpll_ck", | 124 | .name = "dpll_ck", |
125 | .ops = &clkops_omap2xxx_dpll_ops, | 125 | .ops = &clkops_omap2xxx_dpll_ops, |
126 | .parent = &sys_ck, /* Can be func_32k also */ | 126 | .parent = &sys_ck, /* Can be func_32k also */ |
127 | .init = &omap2xxx_clkt_dpllcore_init, | ||
127 | .dpll_data = &dpll_dd, | 128 | .dpll_data = &dpll_dd, |
128 | .clkdm_name = "wkup_clkdm", | 129 | .clkdm_name = "wkup_clkdm", |
129 | .recalc = &omap2_dpllcore_recalc, | 130 | .recalc = &omap2_dpllcore_recalc, |
@@ -1924,12 +1925,9 @@ static struct omap_clk omap2420_clks[] = { | |||
1924 | 1925 | ||
1925 | int __init omap2420_clk_init(void) | 1926 | int __init omap2420_clk_init(void) |
1926 | { | 1927 | { |
1927 | const struct prcm_config *prcm; | ||
1928 | struct omap_clk *c; | 1928 | struct omap_clk *c; |
1929 | u32 clkrate; | ||
1930 | 1929 | ||
1931 | prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL; | 1930 | prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL; |
1932 | cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST); | ||
1933 | cpu_mask = RATE_IN_242X; | 1931 | cpu_mask = RATE_IN_242X; |
1934 | rate_table = omap2420_rate_table; | 1932 | rate_table = omap2420_rate_table; |
1935 | 1933 | ||
@@ -1949,20 +1947,13 @@ int __init omap2420_clk_init(void) | |||
1949 | omap2_init_clk_clkdm(c->lk.clk); | 1947 | omap2_init_clk_clkdm(c->lk.clk); |
1950 | } | 1948 | } |
1951 | 1949 | ||
1950 | omap2xxx_clkt_vps_late_init(); | ||
1951 | |||
1952 | /* Disable autoidle on all clocks; let the PM code enable it later */ | 1952 | /* Disable autoidle on all clocks; let the PM code enable it later */ |
1953 | omap_clk_disable_autoidle_all(); | 1953 | omap_clk_disable_autoidle_all(); |
1954 | 1954 | ||
1955 | /* Check the MPU rate set by bootloader */ | 1955 | /* XXX Can this be done from the virt_prcm_set clk init function? */ |
1956 | clkrate = omap2xxx_clk_get_core_rate(&dpll_ck); | 1956 | omap2xxx_clkt_vps_check_bootloader_rates(); |
1957 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
1958 | if (!(prcm->flags & cpu_mask)) | ||
1959 | continue; | ||
1960 | if (prcm->xtal_speed != sys_ck.rate) | ||
1961 | continue; | ||
1962 | if (prcm->dpll_speed <= clkrate) | ||
1963 | break; | ||
1964 | } | ||
1965 | curr_prcm_set = prcm; | ||
1966 | 1957 | ||
1967 | recalculate_root_clocks(); | 1958 | recalculate_root_clocks(); |
1968 | 1959 | ||
@@ -1976,11 +1967,6 @@ int __init omap2420_clk_init(void) | |||
1976 | */ | 1967 | */ |
1977 | clk_enable_init_clocks(); | 1968 | clk_enable_init_clocks(); |
1978 | 1969 | ||
1979 | /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */ | ||
1980 | vclk = clk_get(NULL, "virt_prcm_set"); | ||
1981 | sclk = clk_get(NULL, "sys_ck"); | ||
1982 | dclk = clk_get(NULL, "dpll_ck"); | ||
1983 | |||
1984 | return 0; | 1970 | return 0; |
1985 | } | 1971 | } |
1986 | 1972 | ||
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index c97dafef894d..b179b6ef4329 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2430 clock data | 2 | * OMAP2430 clock data |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. | 4 | * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2004-2011 Nokia Corporation | 5 | * Copyright (C) 2004-2011 Nokia Corporation |
6 | * | 6 | * |
7 | * Contacts: | 7 | * Contacts: |
@@ -123,6 +123,7 @@ static struct clk dpll_ck = { | |||
123 | .name = "dpll_ck", | 123 | .name = "dpll_ck", |
124 | .ops = &clkops_omap2xxx_dpll_ops, | 124 | .ops = &clkops_omap2xxx_dpll_ops, |
125 | .parent = &sys_ck, /* Can be func_32k also */ | 125 | .parent = &sys_ck, /* Can be func_32k also */ |
126 | .init = &omap2xxx_clkt_dpllcore_init, | ||
126 | .dpll_data = &dpll_dd, | 127 | .dpll_data = &dpll_dd, |
127 | .clkdm_name = "wkup_clkdm", | 128 | .clkdm_name = "wkup_clkdm", |
128 | .recalc = &omap2_dpllcore_recalc, | 129 | .recalc = &omap2_dpllcore_recalc, |
@@ -2023,12 +2024,9 @@ static struct omap_clk omap2430_clks[] = { | |||
2023 | 2024 | ||
2024 | int __init omap2430_clk_init(void) | 2025 | int __init omap2430_clk_init(void) |
2025 | { | 2026 | { |
2026 | const struct prcm_config *prcm; | ||
2027 | struct omap_clk *c; | 2027 | struct omap_clk *c; |
2028 | u32 clkrate; | ||
2029 | 2028 | ||
2030 | prcm_clksrc_ctrl = OMAP2430_PRCM_CLKSRC_CTRL; | 2029 | prcm_clksrc_ctrl = OMAP2430_PRCM_CLKSRC_CTRL; |
2031 | cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST); | ||
2032 | cpu_mask = RATE_IN_243X; | 2030 | cpu_mask = RATE_IN_243X; |
2033 | rate_table = omap2430_rate_table; | 2031 | rate_table = omap2430_rate_table; |
2034 | 2032 | ||
@@ -2048,20 +2046,13 @@ int __init omap2430_clk_init(void) | |||
2048 | omap2_init_clk_clkdm(c->lk.clk); | 2046 | omap2_init_clk_clkdm(c->lk.clk); |
2049 | } | 2047 | } |
2050 | 2048 | ||
2049 | omap2xxx_clkt_vps_late_init(); | ||
2050 | |||
2051 | /* Disable autoidle on all clocks; let the PM code enable it later */ | 2051 | /* Disable autoidle on all clocks; let the PM code enable it later */ |
2052 | omap_clk_disable_autoidle_all(); | 2052 | omap_clk_disable_autoidle_all(); |
2053 | 2053 | ||
2054 | /* Check the MPU rate set by bootloader */ | 2054 | /* XXX Can this be done from the virt_prcm_set clk init function? */ |
2055 | clkrate = omap2xxx_clk_get_core_rate(&dpll_ck); | 2055 | omap2xxx_clkt_vps_check_bootloader_rates(); |
2056 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
2057 | if (!(prcm->flags & cpu_mask)) | ||
2058 | continue; | ||
2059 | if (prcm->xtal_speed != sys_ck.rate) | ||
2060 | continue; | ||
2061 | if (prcm->dpll_speed <= clkrate) | ||
2062 | break; | ||
2063 | } | ||
2064 | curr_prcm_set = prcm; | ||
2065 | 2056 | ||
2066 | recalculate_root_clocks(); | 2057 | recalculate_root_clocks(); |
2067 | 2058 | ||
@@ -2075,11 +2066,6 @@ int __init omap2430_clk_init(void) | |||
2075 | */ | 2066 | */ |
2076 | clk_enable_init_clocks(); | 2067 | clk_enable_init_clocks(); |
2077 | 2068 | ||
2078 | /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */ | ||
2079 | vclk = clk_get(NULL, "virt_prcm_set"); | ||
2080 | sclk = clk_get(NULL, "sys_ck"); | ||
2081 | dclk = clk_get(NULL, "dpll_ck"); | ||
2082 | |||
2083 | return 0; | 2069 | return 0; |
2084 | } | 2070 | } |
2085 | 2071 | ||
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index 5feee16fee0e..5f7faeb4c19b 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c | |||
@@ -28,27 +28,11 @@ | |||
28 | #include "cm.h" | 28 | #include "cm.h" |
29 | #include "cm-regbits-24xx.h" | 29 | #include "cm-regbits-24xx.h" |
30 | 30 | ||
31 | struct clk *vclk, *sclk, *dclk; | ||
32 | |||
33 | /* | 31 | /* |
34 | * Omap24xx specific clock functions | 32 | * Omap24xx specific clock functions |
35 | */ | 33 | */ |
36 | 34 | ||
37 | /* | 35 | /* |
38 | * Set clocks for bypass mode for reboot to work. | ||
39 | */ | ||
40 | void omap2xxx_clk_prepare_for_reboot(void) | ||
41 | { | ||
42 | u32 rate; | ||
43 | |||
44 | if (vclk == NULL || sclk == NULL) | ||
45 | return; | ||
46 | |||
47 | rate = clk_get_rate(sclk); | ||
48 | clk_set_rate(vclk, rate); | ||
49 | } | ||
50 | |||
51 | /* | ||
52 | * Switch the MPU rate if specified on cmdline. We cannot do this | 36 | * Switch the MPU rate if specified on cmdline. We cannot do this |
53 | * early until cmdline is parsed. XXX This should be removed from the | 37 | * early until cmdline is parsed. XXX This should be removed from the |
54 | * clock code and handled by the OPP layer code in the near future. | 38 | * clock code and handled by the OPP layer code in the near future. |
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h index cb6df8ca9e4a..ce809c913b6f 100644 --- a/arch/arm/mach-omap2/clock2xxx.h +++ b/arch/arm/mach-omap2/clock2xxx.h | |||
@@ -15,10 +15,13 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk *clk); | |||
15 | unsigned long omap2_osc_clk_recalc(struct clk *clk); | 15 | unsigned long omap2_osc_clk_recalc(struct clk *clk); |
16 | unsigned long omap2_dpllcore_recalc(struct clk *clk); | 16 | unsigned long omap2_dpllcore_recalc(struct clk *clk); |
17 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); | 17 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); |
18 | unsigned long omap2xxx_clk_get_core_rate(struct clk *clk); | 18 | unsigned long omap2xxx_clk_get_core_rate(void); |
19 | u32 omap2xxx_get_apll_clkin(void); | 19 | u32 omap2xxx_get_apll_clkin(void); |
20 | u32 omap2xxx_get_sysclkdiv(void); | 20 | u32 omap2xxx_get_sysclkdiv(void); |
21 | void omap2xxx_clk_prepare_for_reboot(void); | 21 | void omap2xxx_clk_prepare_for_reboot(void); |
22 | void omap2xxx_clkt_dpllcore_init(struct clk *clk); | ||
23 | void omap2xxx_clkt_vps_check_bootloader_rates(void); | ||
24 | void omap2xxx_clkt_vps_late_init(void); | ||
22 | 25 | ||
23 | #ifdef CONFIG_SOC_OMAP2420 | 26 | #ifdef CONFIG_SOC_OMAP2420 |
24 | int omap2420_clk_init(void); | 27 | int omap2420_clk_init(void); |
@@ -32,9 +35,7 @@ int omap2430_clk_init(void); | |||
32 | #define omap2430_clk_init() do { } while(0) | 35 | #define omap2430_clk_init() do { } while(0) |
33 | #endif | 36 | #endif |
34 | 37 | ||
35 | extern void __iomem *prcm_clksrc_ctrl, *cm_idlest_pll; | 38 | extern void __iomem *prcm_clksrc_ctrl; |
36 | |||
37 | extern struct clk *dclk; | ||
38 | 39 | ||
39 | extern const struct clkops clkops_omap2430_i2chs_wait; | 40 | extern const struct clkops clkops_omap2430_i2chs_wait; |
40 | extern const struct clkops clkops_oscck; | 41 | extern const struct clkops clkops_oscck; |
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h index 686290437568..11eaf16880c4 100644 --- a/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/arch/arm/mach-omap2/cm-regbits-24xx.h | |||
@@ -333,7 +333,9 @@ | |||
333 | #define OMAP24XX_EN_DPLL_MASK (0x3 << 0) | 333 | #define OMAP24XX_EN_DPLL_MASK (0x3 << 0) |
334 | 334 | ||
335 | /* CM_IDLEST_CKGEN */ | 335 | /* CM_IDLEST_CKGEN */ |
336 | #define OMAP24XX_ST_54M_APLL_SHIFT 9 | ||
336 | #define OMAP24XX_ST_54M_APLL_MASK (1 << 9) | 337 | #define OMAP24XX_ST_54M_APLL_MASK (1 << 9) |
338 | #define OMAP24XX_ST_96M_APLL_SHIFT 8 | ||
337 | #define OMAP24XX_ST_96M_APLL_MASK (1 << 8) | 339 | #define OMAP24XX_ST_96M_APLL_MASK (1 << 8) |
338 | #define OMAP24XX_ST_54M_CLK_MASK (1 << 6) | 340 | #define OMAP24XX_ST_54M_CLK_MASK (1 << 6) |
339 | #define OMAP24XX_ST_12M_CLK_MASK (1 << 5) | 341 | #define OMAP24XX_ST_12M_CLK_MASK (1 << 5) |
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index b3cee913dd67..93473f9a551c 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2+ Clock Management prototypes | 2 | * OMAP2+ Clock Management prototypes |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2009 Texas Instruments, Inc. | 4 | * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2007-2009 Nokia Corporation | 5 | * Copyright (C) 2007-2009 Nokia Corporation |
6 | * | 6 | * |
7 | * Written by Paul Walmsley | 7 | * Written by Paul Walmsley |
@@ -22,6 +22,12 @@ | |||
22 | */ | 22 | */ |
23 | #define MAX_MODULE_READY_TIME 2000 | 23 | #define MAX_MODULE_READY_TIME 2000 |
24 | 24 | ||
25 | # ifndef __ASSEMBLER__ | ||
26 | extern void __iomem *cm_base; | ||
27 | extern void __iomem *cm2_base; | ||
28 | extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2); | ||
29 | # endif | ||
30 | |||
25 | /* | 31 | /* |
26 | * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for | 32 | * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for |
27 | * the PRCM to request that a module enter the inactive state in the | 33 | * the PRCM to request that a module enter the inactive state in the |
@@ -37,8 +43,18 @@ | |||
37 | 43 | ||
38 | /** | 44 | /** |
39 | * struct cm_ll_data - fn ptrs to per-SoC CM function implementations | 45 | * struct cm_ll_data - fn ptrs to per-SoC CM function implementations |
46 | * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl | ||
47 | * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl | ||
40 | */ | 48 | */ |
41 | struct cm_ll_data {}; | 49 | struct cm_ll_data { |
50 | int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst, | ||
51 | u8 *idlest_reg_id); | ||
52 | int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift); | ||
53 | }; | ||
54 | |||
55 | extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, | ||
56 | u8 *idlest_reg_id); | ||
57 | extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift); | ||
42 | 58 | ||
43 | extern int cm_register(struct cm_ll_data *cld); | 59 | extern int cm_register(struct cm_ll_data *cld); |
44 | extern int cm_unregister(struct cm_ll_data *cld); | 60 | extern int cm_unregister(struct cm_ll_data *cld); |
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index 64165013daf9..db650690e9d0 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c | |||
@@ -35,6 +35,9 @@ | |||
35 | #define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 | 35 | #define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 |
36 | #define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 | 36 | #define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 |
37 | 37 | ||
38 | /* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */ | ||
39 | #define EN_APLL_LOCKED 3 | ||
40 | |||
38 | static const u8 omap2xxx_cm_idlest_offs[] = { | 41 | static const u8 omap2xxx_cm_idlest_offs[] = { |
39 | CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 | 42 | CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 |
40 | }; | 43 | }; |
@@ -99,7 +102,7 @@ void omap2xxx_cm_set_dpll_auto_low_power_stop(void) | |||
99 | } | 102 | } |
100 | 103 | ||
101 | /* | 104 | /* |
102 | * APLL autoidle control | 105 | * APLL control |
103 | */ | 106 | */ |
104 | 107 | ||
105 | static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) | 108 | static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) |
@@ -136,6 +139,102 @@ void omap2xxx_cm_set_apll96_auto_low_power_stop(void) | |||
136 | OMAP24XX_AUTO_96M_MASK); | 139 | OMAP24XX_AUTO_96M_MASK); |
137 | } | 140 | } |
138 | 141 | ||
142 | /* Enable an APLL if off */ | ||
143 | static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit) | ||
144 | { | ||
145 | u32 v, m; | ||
146 | |||
147 | m = EN_APLL_LOCKED << enable_bit; | ||
148 | |||
149 | v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
150 | if (v & m) | ||
151 | return 0; /* apll already enabled */ | ||
152 | |||
153 | v |= m; | ||
154 | omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); | ||
155 | |||
156 | omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit); | ||
157 | |||
158 | /* | ||
159 | * REVISIT: Should we return an error code if | ||
160 | * omap2xxx_cm_wait_module_ready() fails? | ||
161 | */ | ||
162 | return 0; | ||
163 | } | ||
164 | |||
165 | /* Stop APLL */ | ||
166 | static void _omap2xxx_apll_disable(u8 enable_bit) | ||
167 | { | ||
168 | u32 v; | ||
169 | |||
170 | v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
171 | v &= ~(EN_APLL_LOCKED << enable_bit); | ||
172 | omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); | ||
173 | } | ||
174 | |||
175 | /* Enable an APLL if off */ | ||
176 | int omap2xxx_cm_apll54_enable(void) | ||
177 | { | ||
178 | return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT, | ||
179 | OMAP24XX_ST_54M_APLL_SHIFT); | ||
180 | } | ||
181 | |||
182 | /* Enable an APLL if off */ | ||
183 | int omap2xxx_cm_apll96_enable(void) | ||
184 | { | ||
185 | return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT, | ||
186 | OMAP24XX_ST_96M_APLL_SHIFT); | ||
187 | } | ||
188 | |||
189 | /* Stop APLL */ | ||
190 | void omap2xxx_cm_apll54_disable(void) | ||
191 | { | ||
192 | _omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT); | ||
193 | } | ||
194 | |||
195 | /* Stop APLL */ | ||
196 | void omap2xxx_cm_apll96_disable(void) | ||
197 | { | ||
198 | _omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT); | ||
199 | } | ||
200 | |||
201 | /** | ||
202 | * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components | ||
203 | * @idlest_reg: CM_IDLEST* virtual address | ||
204 | * @prcm_inst: pointer to an s16 to return the PRCM instance offset | ||
205 | * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID | ||
206 | * | ||
207 | * XXX This function is only needed until absolute register addresses are | ||
208 | * removed from the OMAP struct clk records. | ||
209 | */ | ||
210 | int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, | ||
211 | u8 *idlest_reg_id) | ||
212 | { | ||
213 | unsigned long offs; | ||
214 | u8 idlest_offs; | ||
215 | int i; | ||
216 | |||
217 | if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff)) | ||
218 | return -EINVAL; | ||
219 | |||
220 | idlest_offs = (unsigned long)idlest_reg & 0xff; | ||
221 | for (i = 0; i < ARRAY_SIZE(omap2xxx_cm_idlest_offs); i++) { | ||
222 | if (idlest_offs == omap2xxx_cm_idlest_offs[i]) { | ||
223 | *idlest_reg_id = i + 1; | ||
224 | break; | ||
225 | } | ||
226 | } | ||
227 | |||
228 | if (i == ARRAY_SIZE(omap2xxx_cm_idlest_offs)) | ||
229 | return -EINVAL; | ||
230 | |||
231 | offs = idlest_reg - cm_base; | ||
232 | offs &= 0xff00; | ||
233 | *prcm_inst = offs; | ||
234 | |||
235 | return 0; | ||
236 | } | ||
237 | |||
139 | /* | 238 | /* |
140 | * | 239 | * |
141 | */ | 240 | */ |
@@ -253,3 +352,30 @@ struct clkdm_ops omap2_clkdm_operations = { | |||
253 | .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, | 352 | .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, |
254 | }; | 353 | }; |
255 | 354 | ||
355 | /* | ||
356 | * | ||
357 | */ | ||
358 | |||
359 | static struct cm_ll_data omap2xxx_cm_ll_data = { | ||
360 | .split_idlest_reg = &omap2xxx_cm_split_idlest_reg, | ||
361 | .wait_module_ready = &omap2xxx_cm_wait_module_ready, | ||
362 | }; | ||
363 | |||
364 | int __init omap2xxx_cm_init(void) | ||
365 | { | ||
366 | if (!cpu_is_omap24xx()) | ||
367 | return 0; | ||
368 | |||
369 | return cm_register(&omap2xxx_cm_ll_data); | ||
370 | } | ||
371 | |||
372 | static void __exit omap2xxx_cm_exit(void) | ||
373 | { | ||
374 | if (!cpu_is_omap24xx()) | ||
375 | return; | ||
376 | |||
377 | /* Should never happen */ | ||
378 | WARN(cm_unregister(&omap2xxx_cm_ll_data), | ||
379 | "%s: cm_ll_data function pointer mismatch\n", __func__); | ||
380 | } | ||
381 | __exitcall(omap2xxx_cm_exit); | ||
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h index bce3c4be6d1f..4cbb39b051d2 100644 --- a/arch/arm/mach-omap2/cm2xxx.h +++ b/arch/arm/mach-omap2/cm2xxx.h | |||
@@ -60,6 +60,10 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); | |||
60 | extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); | 60 | extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); |
61 | extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, | 61 | extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, |
62 | u8 idlest_shift); | 62 | u8 idlest_shift); |
63 | extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, | ||
64 | s16 *prcm_inst, u8 *idlest_reg_id); | ||
65 | |||
66 | extern int __init omap2xxx_cm_init(void); | ||
63 | 67 | ||
64 | #endif | 68 | #endif |
65 | 69 | ||
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index 0e26bb1bf7e2..98e6b3c9cd9b 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H | 16 | #ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H |
17 | #define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H | 17 | #define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H |
18 | 18 | ||
19 | #include "prcm-common.h" | 19 | #include "cm.h" |
20 | 20 | ||
21 | /* | 21 | /* |
22 | * Module specific CM register offsets from CM_BASE + domain offset | 22 | * Module specific CM register offsets from CM_BASE + domain offset |
@@ -96,6 +96,11 @@ static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) | |||
96 | return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); | 96 | return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); |
97 | } | 97 | } |
98 | 98 | ||
99 | extern int omap2xxx_cm_apll54_enable(void); | ||
100 | extern void omap2xxx_cm_apll54_disable(void); | ||
101 | extern int omap2xxx_cm_apll96_enable(void); | ||
102 | extern void omap2xxx_cm_apll96_disable(void); | ||
103 | |||
99 | #endif | 104 | #endif |
100 | 105 | ||
101 | /* CM register bits shared between 24XX and 3430 */ | 106 | /* CM register bits shared between 24XX and 3430 */ |
@@ -111,5 +116,4 @@ static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) | |||
111 | /* CM_IDLEST_GFX */ | 116 | /* CM_IDLEST_GFX */ |
112 | #define OMAP_ST_GFX_MASK (1 << 0) | 117 | #define OMAP_ST_GFX_MASK (1 << 0) |
113 | 118 | ||
114 | |||
115 | #endif | 119 | #endif |
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 8b03ec2f4394..c2086f2e86b6 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c | |||
@@ -110,6 +110,44 @@ int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) | |||
110 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | 110 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; |
111 | } | 111 | } |
112 | 112 | ||
113 | /** | ||
114 | * omap3xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components | ||
115 | * @idlest_reg: CM_IDLEST* virtual address | ||
116 | * @prcm_inst: pointer to an s16 to return the PRCM instance offset | ||
117 | * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID | ||
118 | * | ||
119 | * XXX This function is only needed until absolute register addresses are | ||
120 | * removed from the OMAP struct clk records. | ||
121 | */ | ||
122 | int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, | ||
123 | u8 *idlest_reg_id) | ||
124 | { | ||
125 | unsigned long offs; | ||
126 | u8 idlest_offs; | ||
127 | int i; | ||
128 | |||
129 | if (idlest_reg < (cm_base + OMAP3430_IVA2_MOD) || | ||
130 | idlest_reg > (cm_base + 0x1ffff)) | ||
131 | return -EINVAL; | ||
132 | |||
133 | idlest_offs = (unsigned long)idlest_reg & 0xff; | ||
134 | for (i = 0; i < ARRAY_SIZE(omap3xxx_cm_idlest_offs); i++) { | ||
135 | if (idlest_offs == omap3xxx_cm_idlest_offs[i]) { | ||
136 | *idlest_reg_id = i + 1; | ||
137 | break; | ||
138 | } | ||
139 | } | ||
140 | |||
141 | if (i == ARRAY_SIZE(omap3xxx_cm_idlest_offs)) | ||
142 | return -EINVAL; | ||
143 | |||
144 | offs = idlest_reg - cm_base; | ||
145 | offs &= 0xff00; | ||
146 | *prcm_inst = offs; | ||
147 | |||
148 | return 0; | ||
149 | } | ||
150 | |||
113 | /* Clockdomain low-level operations */ | 151 | /* Clockdomain low-level operations */ |
114 | 152 | ||
115 | static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1, | 153 | static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1, |
@@ -597,3 +635,31 @@ void omap3_cm_restore_context(void) | |||
597 | omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, | 635 | omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, |
598 | OMAP3_CM_CLKOUT_CTRL_OFFSET); | 636 | OMAP3_CM_CLKOUT_CTRL_OFFSET); |
599 | } | 637 | } |
638 | |||
639 | /* | ||
640 | * | ||
641 | */ | ||
642 | |||
643 | static struct cm_ll_data omap3xxx_cm_ll_data = { | ||
644 | .split_idlest_reg = &omap3xxx_cm_split_idlest_reg, | ||
645 | .wait_module_ready = &omap3xxx_cm_wait_module_ready, | ||
646 | }; | ||
647 | |||
648 | int __init omap3xxx_cm_init(void) | ||
649 | { | ||
650 | if (!cpu_is_omap34xx()) | ||
651 | return 0; | ||
652 | |||
653 | return cm_register(&omap3xxx_cm_ll_data); | ||
654 | } | ||
655 | |||
656 | static void __exit omap3xxx_cm_exit(void) | ||
657 | { | ||
658 | if (!cpu_is_omap34xx()) | ||
659 | return; | ||
660 | |||
661 | /* Should never happen */ | ||
662 | WARN(cm_unregister(&omap3xxx_cm_ll_data), | ||
663 | "%s: cm_ll_data function pointer mismatch\n", __func__); | ||
664 | } | ||
665 | __exitcall(omap3xxx_cm_exit); | ||
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h index 4a6ac812edf4..e8e146f4a43f 100644 --- a/arch/arm/mach-omap2/cm3xxx.h +++ b/arch/arm/mach-omap2/cm3xxx.h | |||
@@ -78,9 +78,14 @@ extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); | |||
78 | extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, | 78 | extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, |
79 | u8 idlest_shift); | 79 | u8 idlest_shift); |
80 | 80 | ||
81 | extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, | ||
82 | s16 *prcm_inst, u8 *idlest_reg_id); | ||
83 | |||
81 | extern void omap3_cm_save_context(void); | 84 | extern void omap3_cm_save_context(void); |
82 | extern void omap3_cm_restore_context(void); | 85 | extern void omap3_cm_restore_context(void); |
83 | 86 | ||
87 | extern int __init omap3xxx_cm_init(void); | ||
88 | |||
84 | #endif | 89 | #endif |
85 | 90 | ||
86 | #endif | 91 | #endif |
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index 3246cef151dc..40b3b5a84458 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * OMAP2+ common Clock Management (CM) IP block functions | 2 | * OMAP2+ common Clock Management (CM) IP block functions |
3 | * | 3 | * |
4 | * Copyright (C) 2012 Texas Instruments, Inc. | 4 | * Copyright (C) 2012 Texas Instruments, Inc. |
5 | * Paul Walmsley <paul@pwsan.com> | 5 | * Paul Walmsley |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -13,10 +13,12 @@ | |||
13 | 13 | ||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/errno.h> | ||
16 | 17 | ||
17 | #include "cm2xxx.h" | 18 | #include "cm2xxx.h" |
18 | #include "cm3xxx.h" | 19 | #include "cm3xxx.h" |
19 | #include "cm44xx.h" | 20 | #include "cm44xx.h" |
21 | #include "common.h" | ||
20 | 22 | ||
21 | /* | 23 | /* |
22 | * cm_ll_data: function pointers to SoC-specific implementations of | 24 | * cm_ll_data: function pointers to SoC-specific implementations of |
@@ -25,6 +27,73 @@ | |||
25 | static struct cm_ll_data null_cm_ll_data; | 27 | static struct cm_ll_data null_cm_ll_data; |
26 | static struct cm_ll_data *cm_ll_data = &null_cm_ll_data; | 28 | static struct cm_ll_data *cm_ll_data = &null_cm_ll_data; |
27 | 29 | ||
30 | /* cm_base: base virtual address of the CM IP block */ | ||
31 | void __iomem *cm_base; | ||
32 | |||
33 | /* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */ | ||
34 | void __iomem *cm2_base; | ||
35 | |||
36 | /** | ||
37 | * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use) | ||
38 | * @cm: CM base virtual address | ||
39 | * @cm2: CM2 base virtual address (if present on the booted SoC) | ||
40 | * | ||
41 | * XXX Will be replaced when the PRM/CM drivers are completed. | ||
42 | */ | ||
43 | void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2) | ||
44 | { | ||
45 | cm_base = cm; | ||
46 | cm2_base = cm2; | ||
47 | } | ||
48 | |||
49 | /** | ||
50 | * cm_split_idlest_reg - split CM_IDLEST reg addr into its components | ||
51 | * @idlest_reg: CM_IDLEST* virtual address | ||
52 | * @prcm_inst: pointer to an s16 to return the PRCM instance offset | ||
53 | * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID | ||
54 | * | ||
55 | * Given an absolute CM_IDLEST register address @idlest_reg, passes | ||
56 | * the PRCM instance offset and IDLEST register ID back to the caller | ||
57 | * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error, | ||
58 | * or 0 upon success. XXX This function is only needed until absolute | ||
59 | * register addresses are removed from the OMAP struct clk records. | ||
60 | */ | ||
61 | int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, | ||
62 | u8 *idlest_reg_id) | ||
63 | { | ||
64 | if (!cm_ll_data->split_idlest_reg) { | ||
65 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", | ||
66 | __func__); | ||
67 | return -EINVAL; | ||
68 | } | ||
69 | |||
70 | return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst, | ||
71 | idlest_reg_id); | ||
72 | } | ||
73 | |||
74 | /** | ||
75 | * cm_wait_module_ready - wait for a module to leave idle or standby | ||
76 | * @prcm_mod: PRCM module offset | ||
77 | * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) | ||
78 | * @idlest_shift: shift of the bit in the CM_IDLEST* register to check | ||
79 | * | ||
80 | * Wait for the PRCM to indicate that the module identified by | ||
81 | * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon | ||
82 | * success, -EBUSY if the module doesn't enable in time, or -EINVAL if | ||
83 | * no per-SoC wait_module_ready() function pointer has been registered | ||
84 | * or if the idlest register is unknown on the SoC. | ||
85 | */ | ||
86 | int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) | ||
87 | { | ||
88 | if (!cm_ll_data->wait_module_ready) { | ||
89 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", | ||
90 | __func__); | ||
91 | return -EINVAL; | ||
92 | } | ||
93 | |||
94 | return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift); | ||
95 | } | ||
96 | |||
28 | /** | 97 | /** |
29 | * cm_register - register per-SoC low-level data with the CM | 98 | * cm_register - register per-SoC low-level data with the CM |
30 | * @cld: low-level per-SoC OMAP CM data & function pointers to register | 99 | * @cld: low-level per-SoC OMAP CM data & function pointers to register |
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index d69fdefef985..bd7bab889745 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h | |||
@@ -38,4 +38,6 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, | |||
38 | extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, | 38 | extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, |
39 | u32 mask); | 39 | u32 mask); |
40 | 40 | ||
41 | extern void omap_cm_base_init(void); | ||
42 | |||
41 | #endif | 43 | #endif |
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 34fb5b95859b..5c2fd4863b2b 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c | |||
@@ -14,196 +14,13 @@ | |||
14 | */ | 14 | */ |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/platform_data/dsp-omap.h> | 17 | #include <linux/platform_data/dsp-omap.h> |
20 | 18 | ||
21 | #include <plat/vram.h> | 19 | #include <plat/vram.h> |
22 | 20 | ||
23 | #include "soc.h" | ||
24 | #include "iomap.h" | ||
25 | #include "common.h" | 21 | #include "common.h" |
26 | #include "clock.h" | ||
27 | #include "sdrc.h" | ||
28 | #include "control.h" | ||
29 | #include "omap-secure.h" | 22 | #include "omap-secure.h" |
30 | 23 | ||
31 | /* Global address base setup code */ | ||
32 | |||
33 | static void __init __omap2_set_globals(struct omap_globals *omap2_globals) | ||
34 | { | ||
35 | omap2_set_globals_tap(omap2_globals); | ||
36 | omap2_set_globals_sdrc(omap2_globals); | ||
37 | omap2_set_globals_control(omap2_globals); | ||
38 | omap2_set_globals_prcm(omap2_globals); | ||
39 | } | ||
40 | |||
41 | #if defined(CONFIG_SOC_OMAP2420) | ||
42 | |||
43 | static struct omap_globals omap242x_globals = { | ||
44 | .class = OMAP242X_CLASS, | ||
45 | .tap = OMAP2_L4_IO_ADDRESS(0x48014000), | ||
46 | .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), | ||
47 | .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), | ||
48 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), | ||
49 | .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), | ||
50 | .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), | ||
51 | }; | ||
52 | |||
53 | void __init omap2_set_globals_242x(void) | ||
54 | { | ||
55 | __omap2_set_globals(&omap242x_globals); | ||
56 | } | ||
57 | |||
58 | void __init omap242x_map_io(void) | ||
59 | { | ||
60 | omap242x_map_common_io(); | ||
61 | } | ||
62 | #endif | ||
63 | |||
64 | #if defined(CONFIG_SOC_OMAP2430) | ||
65 | |||
66 | static struct omap_globals omap243x_globals = { | ||
67 | .class = OMAP243X_CLASS, | ||
68 | .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), | ||
69 | .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), | ||
70 | .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), | ||
71 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), | ||
72 | .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), | ||
73 | .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), | ||
74 | }; | ||
75 | |||
76 | void __init omap2_set_globals_243x(void) | ||
77 | { | ||
78 | __omap2_set_globals(&omap243x_globals); | ||
79 | } | ||
80 | |||
81 | void __init omap243x_map_io(void) | ||
82 | { | ||
83 | omap243x_map_common_io(); | ||
84 | } | ||
85 | #endif | ||
86 | |||
87 | #if defined(CONFIG_ARCH_OMAP3) | ||
88 | |||
89 | static struct omap_globals omap3_globals = { | ||
90 | .class = OMAP343X_CLASS, | ||
91 | .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), | ||
92 | .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), | ||
93 | .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), | ||
94 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), | ||
95 | .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), | ||
96 | .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), | ||
97 | }; | ||
98 | |||
99 | void __init omap2_set_globals_3xxx(void) | ||
100 | { | ||
101 | __omap2_set_globals(&omap3_globals); | ||
102 | } | ||
103 | |||
104 | void __init omap3_map_io(void) | ||
105 | { | ||
106 | omap34xx_map_common_io(); | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * Adjust TAP register base such that omap3_check_revision accesses the correct | ||
111 | * TI81XX register for checking device ID (it adds 0x204 to tap base while | ||
112 | * TI81XX DEVICE ID register is at offset 0x600 from control base). | ||
113 | */ | ||
114 | #define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ | ||
115 | TI81XX_CONTROL_DEVICE_ID - 0x204) | ||
116 | |||
117 | static struct omap_globals ti81xx_globals = { | ||
118 | .class = OMAP343X_CLASS, | ||
119 | .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE), | ||
120 | .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), | ||
121 | .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), | ||
122 | .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), | ||
123 | }; | ||
124 | |||
125 | void __init omap2_set_globals_ti81xx(void) | ||
126 | { | ||
127 | __omap2_set_globals(&ti81xx_globals); | ||
128 | } | ||
129 | |||
130 | void __init ti81xx_map_io(void) | ||
131 | { | ||
132 | omapti81xx_map_common_io(); | ||
133 | } | ||
134 | #endif | ||
135 | |||
136 | #if defined(CONFIG_SOC_AM33XX) | ||
137 | #define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \ | ||
138 | TI81XX_CONTROL_DEVICE_ID - 0x204) | ||
139 | |||
140 | static struct omap_globals am33xx_globals = { | ||
141 | .class = AM335X_CLASS, | ||
142 | .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE), | ||
143 | .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), | ||
144 | .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), | ||
145 | .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), | ||
146 | }; | ||
147 | |||
148 | void __init omap2_set_globals_am33xx(void) | ||
149 | { | ||
150 | __omap2_set_globals(&am33xx_globals); | ||
151 | } | ||
152 | |||
153 | void __init am33xx_map_io(void) | ||
154 | { | ||
155 | omapam33xx_map_common_io(); | ||
156 | } | ||
157 | #endif | ||
158 | |||
159 | #if defined(CONFIG_ARCH_OMAP4) | ||
160 | static struct omap_globals omap4_globals = { | ||
161 | .class = OMAP443X_CLASS, | ||
162 | .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), | ||
163 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), | ||
164 | .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), | ||
165 | .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), | ||
166 | .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), | ||
167 | .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), | ||
168 | .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE), | ||
169 | }; | ||
170 | |||
171 | void __init omap2_set_globals_443x(void) | ||
172 | { | ||
173 | __omap2_set_globals(&omap4_globals); | ||
174 | } | ||
175 | |||
176 | void __init omap4_map_io(void) | ||
177 | { | ||
178 | omap44xx_map_common_io(); | ||
179 | } | ||
180 | #endif | ||
181 | |||
182 | #if defined(CONFIG_SOC_OMAP5) | ||
183 | static struct omap_globals omap5_globals = { | ||
184 | .class = OMAP54XX_CLASS, | ||
185 | .tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), | ||
186 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), | ||
187 | .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE), | ||
188 | .prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE), | ||
189 | .cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), | ||
190 | .cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE), | ||
191 | .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE), | ||
192 | }; | ||
193 | |||
194 | void __init omap2_set_globals_5xxx(void) | ||
195 | { | ||
196 | omap2_set_globals_tap(&omap5_globals); | ||
197 | omap2_set_globals_control(&omap5_globals); | ||
198 | omap2_set_globals_prcm(&omap5_globals); | ||
199 | } | ||
200 | |||
201 | void __init omap5_map_io(void) | ||
202 | { | ||
203 | omap5_map_common_io(); | ||
204 | } | ||
205 | #endif | ||
206 | |||
207 | /* | 24 | /* |
208 | * Stub function for OMAP2 so that common files | 25 | * Stub function for OMAP2 so that common files |
209 | * continue to build when custom builds are used | 26 | * continue to build when custom builds are used |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index fd97f317de2e..948bcaa82eb6 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -41,54 +41,6 @@ | |||
41 | 41 | ||
42 | #define OMAP_INTC_START NR_IRQS | 42 | #define OMAP_INTC_START NR_IRQS |
43 | 43 | ||
44 | #ifdef CONFIG_SOC_OMAP2420 | ||
45 | extern void omap242x_map_common_io(void); | ||
46 | #else | ||
47 | static inline void omap242x_map_common_io(void) | ||
48 | { | ||
49 | } | ||
50 | #endif | ||
51 | |||
52 | #ifdef CONFIG_SOC_OMAP2430 | ||
53 | extern void omap243x_map_common_io(void); | ||
54 | #else | ||
55 | static inline void omap243x_map_common_io(void) | ||
56 | { | ||
57 | } | ||
58 | #endif | ||
59 | |||
60 | #ifdef CONFIG_ARCH_OMAP3 | ||
61 | extern void omap34xx_map_common_io(void); | ||
62 | #else | ||
63 | static inline void omap34xx_map_common_io(void) | ||
64 | { | ||
65 | } | ||
66 | #endif | ||
67 | |||
68 | #ifdef CONFIG_SOC_TI81XX | ||
69 | extern void omapti81xx_map_common_io(void); | ||
70 | #else | ||
71 | static inline void omapti81xx_map_common_io(void) | ||
72 | { | ||
73 | } | ||
74 | #endif | ||
75 | |||
76 | #ifdef CONFIG_SOC_AM33XX | ||
77 | extern void omapam33xx_map_common_io(void); | ||
78 | #else | ||
79 | static inline void omapam33xx_map_common_io(void) | ||
80 | { | ||
81 | } | ||
82 | #endif | ||
83 | |||
84 | #ifdef CONFIG_ARCH_OMAP4 | ||
85 | extern void omap44xx_map_common_io(void); | ||
86 | #else | ||
87 | static inline void omap44xx_map_common_io(void) | ||
88 | { | ||
89 | } | ||
90 | #endif | ||
91 | |||
92 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) | 44 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) |
93 | int omap2_pm_init(void); | 45 | int omap2_pm_init(void); |
94 | #else | 46 | #else |
@@ -125,19 +77,12 @@ static inline int omap_mux_late_init(void) | |||
125 | } | 77 | } |
126 | #endif | 78 | #endif |
127 | 79 | ||
128 | #ifdef CONFIG_SOC_OMAP5 | ||
129 | extern void omap5_map_common_io(void); | ||
130 | #else | ||
131 | static inline void omap5_map_common_io(void) | ||
132 | { | ||
133 | } | ||
134 | #endif | ||
135 | |||
136 | extern void omap2_init_common_infrastructure(void); | 80 | extern void omap2_init_common_infrastructure(void); |
137 | 81 | ||
138 | extern struct sys_timer omap2_timer; | 82 | extern struct sys_timer omap2_timer; |
139 | extern struct sys_timer omap3_timer; | 83 | extern struct sys_timer omap3_timer; |
140 | extern struct sys_timer omap3_secure_timer; | 84 | extern struct sys_timer omap3_secure_timer; |
85 | extern struct sys_timer omap3_gp_timer; | ||
141 | extern struct sys_timer omap3_am33xx_timer; | 86 | extern struct sys_timer omap3_am33xx_timer; |
142 | extern struct sys_timer omap4_timer; | 87 | extern struct sys_timer omap4_timer; |
143 | extern struct sys_timer omap5_timer; | 88 | extern struct sys_timer omap5_timer; |
@@ -165,52 +110,43 @@ void am35xx_init_late(void); | |||
165 | void ti81xx_init_late(void); | 110 | void ti81xx_init_late(void); |
166 | void omap4430_init_late(void); | 111 | void omap4430_init_late(void); |
167 | int omap2_common_pm_late_init(void); | 112 | int omap2_common_pm_late_init(void); |
168 | void omap_prcm_restart(char, const char *); | ||
169 | 113 | ||
170 | /* | 114 | #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) |
171 | * IO bases for various OMAP processors | 115 | void omap2xxx_restart(char mode, const char *cmd); |
172 | * Except the tap base, rest all the io bases | ||
173 | * listed are physical addresses. | ||
174 | */ | ||
175 | struct omap_globals { | ||
176 | u32 class; /* OMAP class to detect */ | ||
177 | void __iomem *tap; /* Control module ID code */ | ||
178 | void __iomem *sdrc; /* SDRAM Controller */ | ||
179 | void __iomem *sms; /* SDRAM Memory Scheduler */ | ||
180 | void __iomem *ctrl; /* System Control Module */ | ||
181 | void __iomem *ctrl_pad; /* PAD Control Module */ | ||
182 | void __iomem *prm; /* Power and Reset Management */ | ||
183 | void __iomem *cm; /* Clock Management */ | ||
184 | void __iomem *cm2; | ||
185 | void __iomem *prcm_mpu; | ||
186 | }; | ||
187 | |||
188 | void omap2_set_globals_242x(void); | ||
189 | void omap2_set_globals_243x(void); | ||
190 | void omap2_set_globals_3xxx(void); | ||
191 | void omap2_set_globals_443x(void); | ||
192 | void omap2_set_globals_5xxx(void); | ||
193 | void omap2_set_globals_ti81xx(void); | ||
194 | void omap2_set_globals_am33xx(void); | ||
195 | |||
196 | /* These get called from omap2_set_globals_xxxx(), do not call these */ | ||
197 | void omap2_set_globals_tap(struct omap_globals *); | ||
198 | #if defined(CONFIG_SOC_HAS_OMAP2_SDRC) | ||
199 | void omap2_set_globals_sdrc(struct omap_globals *); | ||
200 | #else | 116 | #else |
201 | static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals) | 117 | static inline void omap2xxx_restart(char mode, const char *cmd) |
202 | { } | 118 | { |
119 | } | ||
203 | #endif | 120 | #endif |
204 | void omap2_set_globals_control(struct omap_globals *); | 121 | |
205 | void omap2_set_globals_prcm(struct omap_globals *); | 122 | #ifdef CONFIG_ARCH_OMAP3 |
206 | 123 | void omap3xxx_restart(char mode, const char *cmd); | |
207 | void omap242x_map_io(void); | 124 | #else |
208 | void omap243x_map_io(void); | 125 | static inline void omap3xxx_restart(char mode, const char *cmd) |
209 | void omap3_map_io(void); | 126 | { |
210 | void am33xx_map_io(void); | 127 | } |
211 | void omap4_map_io(void); | 128 | #endif |
212 | void omap5_map_io(void); | 129 | |
213 | void ti81xx_map_io(void); | 130 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) |
131 | void omap44xx_restart(char mode, const char *cmd); | ||
132 | #else | ||
133 | static inline void omap44xx_restart(char mode, const char *cmd) | ||
134 | { | ||
135 | } | ||
136 | #endif | ||
137 | |||
138 | /* This gets called from mach-omap2/io.c, do not call this */ | ||
139 | void __init omap2_set_globals_tap(u32 class, void __iomem *tap); | ||
140 | |||
141 | void __init omap242x_map_io(void); | ||
142 | void __init omap243x_map_io(void); | ||
143 | void __init omap3_map_io(void); | ||
144 | void __init am33xx_map_io(void); | ||
145 | void __init omap4_map_io(void); | ||
146 | void __init omap5_map_io(void); | ||
147 | void __init ti81xx_map_io(void); | ||
148 | |||
149 | /* omap_barriers_init() is OMAP4 only */ | ||
214 | void omap_barriers_init(void); | 150 | void omap_barriers_init(void); |
215 | 151 | ||
216 | /** | 152 | /** |
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 06375ad20917..2adb2683f074 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -147,13 +147,11 @@ static struct omap3_control_regs control_context; | |||
147 | #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) | 147 | #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) |
148 | #define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg)) | 148 | #define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg)) |
149 | 149 | ||
150 | void __init omap2_set_globals_control(struct omap_globals *omap2_globals) | 150 | void __init omap2_set_globals_control(void __iomem *ctrl, |
151 | void __iomem *ctrl_pad) | ||
151 | { | 152 | { |
152 | if (omap2_globals->ctrl) | 153 | omap2_ctrl_base = ctrl; |
153 | omap2_ctrl_base = omap2_globals->ctrl; | 154 | omap4_ctrl_pad_base = ctrl_pad; |
154 | |||
155 | if (omap2_globals->ctrl_pad) | ||
156 | omap4_ctrl_pad_base = omap2_globals->ctrl_pad; | ||
157 | } | 155 | } |
158 | 156 | ||
159 | void __iomem *omap_ctrl_base_get(void) | 157 | void __iomem *omap_ctrl_base_get(void) |
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index a89e8256fd0e..4ca8747b3cc9 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h | |||
@@ -414,6 +414,8 @@ extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr); | |||
414 | extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); | 414 | extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); |
415 | extern void omap3630_ctrl_disable_rta(void); | 415 | extern void omap3630_ctrl_disable_rta(void); |
416 | extern int omap3_ctrl_save_padconf(void); | 416 | extern int omap3_ctrl_save_padconf(void); |
417 | extern void omap2_set_globals_control(void __iomem *ctrl, | ||
418 | void __iomem *ctrl_pad); | ||
417 | #else | 419 | #else |
418 | #define omap_ctrl_base_get() 0 | 420 | #define omap_ctrl_base_get() 0 |
419 | #define omap_ctrl_readb(x) 0 | 421 | #define omap_ctrl_readb(x) 0 |
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index bc2756959be5..bca7a8885703 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <linux/export.h> | 27 | #include <linux/export.h> |
28 | #include <linux/cpu_pm.h> | 28 | #include <linux/cpu_pm.h> |
29 | 29 | ||
30 | #include <plat/prcm.h> | ||
31 | #include "powerdomain.h" | 30 | #include "powerdomain.h" |
32 | #include "clockdomain.h" | 31 | #include "clockdomain.h" |
33 | 32 | ||
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 738ae0d7b5b5..3cff7dc514df 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -725,29 +725,3 @@ static int __init omap2_init_devices(void) | |||
725 | return 0; | 725 | return 0; |
726 | } | 726 | } |
727 | arch_initcall(omap2_init_devices); | 727 | arch_initcall(omap2_init_devices); |
728 | |||
729 | #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) | ||
730 | static int __init omap_init_wdt(void) | ||
731 | { | ||
732 | int id = -1; | ||
733 | struct platform_device *pdev; | ||
734 | struct omap_hwmod *oh; | ||
735 | char *oh_name = "wd_timer2"; | ||
736 | char *dev_name = "omap_wdt"; | ||
737 | |||
738 | if (!cpu_class_is_omap2() || of_have_populated_dt()) | ||
739 | return 0; | ||
740 | |||
741 | oh = omap_hwmod_lookup(oh_name); | ||
742 | if (!oh) { | ||
743 | pr_err("Could not look up wd_timer%d hwmod\n", id); | ||
744 | return -EINVAL; | ||
745 | } | ||
746 | |||
747 | pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0); | ||
748 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", | ||
749 | dev_name, oh->name); | ||
750 | return 0; | ||
751 | } | ||
752 | subsys_initcall(omap_init_wdt); | ||
753 | #endif | ||
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 89c57129357a..38ba58c97628 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include "mux.h" | 35 | #include "mux.h" |
36 | #include "control.h" | 36 | #include "control.h" |
37 | #include "display.h" | 37 | #include "display.h" |
38 | #include "prm.h" | ||
38 | 39 | ||
39 | #define DISPC_CONTROL 0x0040 | 40 | #define DISPC_CONTROL 0x0040 |
40 | #define DISPC_CONTROL2 0x0238 | 41 | #define DISPC_CONTROL2 0x0238 |
@@ -512,7 +513,6 @@ static void dispc_disable_outputs(void) | |||
512 | } | 513 | } |
513 | } | 514 | } |
514 | 515 | ||
515 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
516 | int omap_dss_reset(struct omap_hwmod *oh) | 516 | int omap_dss_reset(struct omap_hwmod *oh) |
517 | { | 517 | { |
518 | struct omap_hwmod_opt_clk *oc; | 518 | struct omap_hwmod_opt_clk *oc; |
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c index 3da8900598c8..ab7bf181a105 100644 --- a/arch/arm/mach-omap2/hdq1w.c +++ b/arch/arm/mach-omap2/hdq1w.c | |||
@@ -31,11 +31,9 @@ | |||
31 | #include "omap_device.h" | 31 | #include "omap_device.h" |
32 | #include "hdq1w.h" | 32 | #include "hdq1w.h" |
33 | 33 | ||
34 | #include "prm.h" | ||
34 | #include "common.h" | 35 | #include "common.h" |
35 | 36 | ||
36 | /* Maximum microseconds to wait for OMAP module to softreset */ | ||
37 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
38 | |||
39 | /** | 37 | /** |
40 | * omap_hdq1w_reset - reset the OMAP HDQ1W module | 38 | * omap_hdq1w_reset - reset the OMAP HDQ1W module |
41 | * @oh: struct omap_hwmod * | 39 | * @oh: struct omap_hwmod * |
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 4e63097e3cd8..fbb9b152cd5e 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c | |||
@@ -20,10 +20,11 @@ | |||
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include "soc.h" | 22 | #include "soc.h" |
23 | #include "common.h" | ||
24 | #include "omap_hwmod.h" | 23 | #include "omap_hwmod.h" |
25 | #include "omap_device.h" | 24 | #include "omap_device.h" |
26 | 25 | ||
26 | #include "prm.h" | ||
27 | #include "common.h" | ||
27 | #include "mux.h" | 28 | #include "mux.h" |
28 | #include "i2c.h" | 29 | #include "i2c.h" |
29 | 30 | ||
@@ -32,9 +33,6 @@ | |||
32 | #define OMAP2_I2C_CON_OFFSET 0x24 | 33 | #define OMAP2_I2C_CON_OFFSET 0x24 |
33 | #define OMAP4_I2C_CON_OFFSET 0xA4 | 34 | #define OMAP4_I2C_CON_OFFSET 0xA4 |
34 | 35 | ||
35 | /* Maximum microseconds to wait for OMAP module to softreset */ | ||
36 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
37 | |||
38 | #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 | 36 | #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 |
39 | 37 | ||
40 | static void __init omap2_i2c_mux_pins(int bus_id) | 38 | static void __init omap2_i2c_mux_pins(int bus_id) |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index cf2362ccb234..45cc7ed4dd58 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -28,6 +28,9 @@ | |||
28 | #include "soc.h" | 28 | #include "soc.h" |
29 | #include "control.h" | 29 | #include "control.h" |
30 | 30 | ||
31 | #define OMAP4_SILICON_TYPE_STANDARD 0x01 | ||
32 | #define OMAP4_SILICON_TYPE_PERFORMANCE 0x02 | ||
33 | |||
31 | static unsigned int omap_revision; | 34 | static unsigned int omap_revision; |
32 | static const char *cpu_rev; | 35 | static const char *cpu_rev; |
33 | u32 omap_features; | 36 | u32 omap_features; |
@@ -273,25 +276,11 @@ void __init omap4xxx_check_features(void) | |||
273 | { | 276 | { |
274 | u32 si_type; | 277 | u32 si_type; |
275 | 278 | ||
276 | if (cpu_is_omap443x()) | 279 | si_type = |
277 | omap_features |= OMAP4_HAS_MPU_1GHZ; | 280 | (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1) >> 16) & 0x03; |
278 | |||
279 | 281 | ||
280 | if (cpu_is_omap446x()) { | 282 | if (si_type == OMAP4_SILICON_TYPE_PERFORMANCE) |
281 | si_type = | 283 | omap_features = OMAP4_HAS_PERF_SILICON; |
282 | read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1); | ||
283 | switch ((si_type & (3 << 16)) >> 16) { | ||
284 | case 2: | ||
285 | /* High performance device */ | ||
286 | omap_features |= OMAP4_HAS_MPU_1_5GHZ; | ||
287 | break; | ||
288 | case 1: | ||
289 | default: | ||
290 | /* Standard device */ | ||
291 | omap_features |= OMAP4_HAS_MPU_1_2GHZ; | ||
292 | break; | ||
293 | } | ||
294 | } | ||
295 | } | 284 | } |
296 | 285 | ||
297 | void __init ti81xx_check_features(void) | 286 | void __init ti81xx_check_features(void) |
@@ -559,11 +548,12 @@ void __init omap5xxx_check_revision(void) | |||
559 | * detect the exact revision later on in omap2_detect_revision() once map_io | 548 | * detect the exact revision later on in omap2_detect_revision() once map_io |
560 | * is done. | 549 | * is done. |
561 | */ | 550 | */ |
562 | void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) | 551 | void __init omap2_set_globals_tap(u32 class, void __iomem *tap) |
563 | { | 552 | { |
564 | omap_revision = omap2_globals->class; | 553 | omap_revision = class; |
565 | tap_base = omap2_globals->tap; | 554 | tap_base = tap; |
566 | 555 | ||
556 | /* XXX What is this intended to do? */ | ||
567 | if (cpu_is_omap34xx()) | 557 | if (cpu_is_omap34xx()) |
568 | tap_prod_id = 0x0210; | 558 | tap_prod_id = 0x0210; |
569 | else | 559 | else |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 807b8d919f81..9df757644cce 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -40,8 +40,16 @@ | |||
40 | #include "clock44xx.h" | 40 | #include "clock44xx.h" |
41 | #include "omap-pm.h" | 41 | #include "omap-pm.h" |
42 | #include "sdrc.h" | 42 | #include "sdrc.h" |
43 | #include "control.h" | ||
43 | #include "serial.h" | 44 | #include "serial.h" |
44 | #include "sram.h" | 45 | #include "sram.h" |
46 | #include "cm2xxx.h" | ||
47 | #include "cm3xxx.h" | ||
48 | #include "prm.h" | ||
49 | #include "cm.h" | ||
50 | #include "prcm_mpu44xx.h" | ||
51 | #include "prminst44xx.h" | ||
52 | #include "cminst44xx.h" | ||
45 | 53 | ||
46 | /* | 54 | /* |
47 | * The machine specific code may provide the extra mapping besides the | 55 | * The machine specific code may provide the extra mapping besides the |
@@ -264,7 +272,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = { | |||
264 | #endif | 272 | #endif |
265 | 273 | ||
266 | #ifdef CONFIG_SOC_OMAP2420 | 274 | #ifdef CONFIG_SOC_OMAP2420 |
267 | void __init omap242x_map_common_io(void) | 275 | void __init omap242x_map_io(void) |
268 | { | 276 | { |
269 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); | 277 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); |
270 | iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); | 278 | iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); |
@@ -272,7 +280,7 @@ void __init omap242x_map_common_io(void) | |||
272 | #endif | 280 | #endif |
273 | 281 | ||
274 | #ifdef CONFIG_SOC_OMAP2430 | 282 | #ifdef CONFIG_SOC_OMAP2430 |
275 | void __init omap243x_map_common_io(void) | 283 | void __init omap243x_map_io(void) |
276 | { | 284 | { |
277 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); | 285 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); |
278 | iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); | 286 | iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); |
@@ -280,28 +288,28 @@ void __init omap243x_map_common_io(void) | |||
280 | #endif | 288 | #endif |
281 | 289 | ||
282 | #ifdef CONFIG_ARCH_OMAP3 | 290 | #ifdef CONFIG_ARCH_OMAP3 |
283 | void __init omap34xx_map_common_io(void) | 291 | void __init omap3_map_io(void) |
284 | { | 292 | { |
285 | iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); | 293 | iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); |
286 | } | 294 | } |
287 | #endif | 295 | #endif |
288 | 296 | ||
289 | #ifdef CONFIG_SOC_TI81XX | 297 | #ifdef CONFIG_SOC_TI81XX |
290 | void __init omapti81xx_map_common_io(void) | 298 | void __init ti81xx_map_io(void) |
291 | { | 299 | { |
292 | iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); | 300 | iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); |
293 | } | 301 | } |
294 | #endif | 302 | #endif |
295 | 303 | ||
296 | #ifdef CONFIG_SOC_AM33XX | 304 | #ifdef CONFIG_SOC_AM33XX |
297 | void __init omapam33xx_map_common_io(void) | 305 | void __init am33xx_map_io(void) |
298 | { | 306 | { |
299 | iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); | 307 | iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); |
300 | } | 308 | } |
301 | #endif | 309 | #endif |
302 | 310 | ||
303 | #ifdef CONFIG_ARCH_OMAP4 | 311 | #ifdef CONFIG_ARCH_OMAP4 |
304 | void __init omap44xx_map_common_io(void) | 312 | void __init omap4_map_io(void) |
305 | { | 313 | { |
306 | iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); | 314 | iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); |
307 | omap_barriers_init(); | 315 | omap_barriers_init(); |
@@ -309,7 +317,7 @@ void __init omap44xx_map_common_io(void) | |||
309 | #endif | 317 | #endif |
310 | 318 | ||
311 | #ifdef CONFIG_SOC_OMAP5 | 319 | #ifdef CONFIG_SOC_OMAP5 |
312 | void __init omap5_map_common_io(void) | 320 | void __init omap5_map_io(void) |
313 | { | 321 | { |
314 | iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); | 322 | iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); |
315 | } | 323 | } |
@@ -371,8 +379,15 @@ static void __init omap_hwmod_init_postsetup(void) | |||
371 | #ifdef CONFIG_SOC_OMAP2420 | 379 | #ifdef CONFIG_SOC_OMAP2420 |
372 | void __init omap2420_init_early(void) | 380 | void __init omap2420_init_early(void) |
373 | { | 381 | { |
374 | omap2_set_globals_242x(); | 382 | omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); |
383 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), | ||
384 | OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); | ||
385 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), | ||
386 | NULL); | ||
387 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); | ||
388 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL); | ||
375 | omap2xxx_check_revision(); | 389 | omap2xxx_check_revision(); |
390 | omap2xxx_cm_init(); | ||
376 | omap2xxx_voltagedomains_init(); | 391 | omap2xxx_voltagedomains_init(); |
377 | omap242x_powerdomains_init(); | 392 | omap242x_powerdomains_init(); |
378 | omap242x_clockdomains_init(); | 393 | omap242x_clockdomains_init(); |
@@ -392,8 +407,15 @@ void __init omap2420_init_late(void) | |||
392 | #ifdef CONFIG_SOC_OMAP2430 | 407 | #ifdef CONFIG_SOC_OMAP2430 |
393 | void __init omap2430_init_early(void) | 408 | void __init omap2430_init_early(void) |
394 | { | 409 | { |
395 | omap2_set_globals_243x(); | 410 | omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); |
411 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), | ||
412 | OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); | ||
413 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), | ||
414 | NULL); | ||
415 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); | ||
416 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL); | ||
396 | omap2xxx_check_revision(); | 417 | omap2xxx_check_revision(); |
418 | omap2xxx_cm_init(); | ||
397 | omap2xxx_voltagedomains_init(); | 419 | omap2xxx_voltagedomains_init(); |
398 | omap243x_powerdomains_init(); | 420 | omap243x_powerdomains_init(); |
399 | omap243x_clockdomains_init(); | 421 | omap243x_clockdomains_init(); |
@@ -417,9 +439,16 @@ void __init omap2430_init_late(void) | |||
417 | #ifdef CONFIG_ARCH_OMAP3 | 439 | #ifdef CONFIG_ARCH_OMAP3 |
418 | void __init omap3_init_early(void) | 440 | void __init omap3_init_early(void) |
419 | { | 441 | { |
420 | omap2_set_globals_3xxx(); | 442 | omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); |
443 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), | ||
444 | OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); | ||
445 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), | ||
446 | NULL); | ||
447 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); | ||
448 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); | ||
421 | omap3xxx_check_revision(); | 449 | omap3xxx_check_revision(); |
422 | omap3xxx_check_features(); | 450 | omap3xxx_check_features(); |
451 | omap3xxx_cm_init(); | ||
423 | omap3xxx_voltagedomains_init(); | 452 | omap3xxx_voltagedomains_init(); |
424 | omap3xxx_powerdomains_init(); | 453 | omap3xxx_powerdomains_init(); |
425 | omap3xxx_clockdomains_init(); | 454 | omap3xxx_clockdomains_init(); |
@@ -450,7 +479,12 @@ void __init am35xx_init_early(void) | |||
450 | 479 | ||
451 | void __init ti81xx_init_early(void) | 480 | void __init ti81xx_init_early(void) |
452 | { | 481 | { |
453 | omap2_set_globals_ti81xx(); | 482 | omap2_set_globals_tap(OMAP343X_CLASS, |
483 | OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); | ||
484 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), | ||
485 | NULL); | ||
486 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); | ||
487 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); | ||
454 | omap3xxx_check_revision(); | 488 | omap3xxx_check_revision(); |
455 | ti81xx_check_features(); | 489 | ti81xx_check_features(); |
456 | omap3xxx_voltagedomains_init(); | 490 | omap3xxx_voltagedomains_init(); |
@@ -507,7 +541,12 @@ void __init ti81xx_init_late(void) | |||
507 | #ifdef CONFIG_SOC_AM33XX | 541 | #ifdef CONFIG_SOC_AM33XX |
508 | void __init am33xx_init_early(void) | 542 | void __init am33xx_init_early(void) |
509 | { | 543 | { |
510 | omap2_set_globals_am33xx(); | 544 | omap2_set_globals_tap(AM335X_CLASS, |
545 | AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); | ||
546 | omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), | ||
547 | NULL); | ||
548 | omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); | ||
549 | omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); | ||
511 | omap3xxx_check_revision(); | 550 | omap3xxx_check_revision(); |
512 | ti81xx_check_features(); | 551 | ti81xx_check_features(); |
513 | am33xx_voltagedomains_init(); | 552 | am33xx_voltagedomains_init(); |
@@ -522,7 +561,16 @@ void __init am33xx_init_early(void) | |||
522 | #ifdef CONFIG_ARCH_OMAP4 | 561 | #ifdef CONFIG_ARCH_OMAP4 |
523 | void __init omap4430_init_early(void) | 562 | void __init omap4430_init_early(void) |
524 | { | 563 | { |
525 | omap2_set_globals_443x(); | 564 | omap2_set_globals_tap(OMAP443X_CLASS, |
565 | OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); | ||
566 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), | ||
567 | OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); | ||
568 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); | ||
569 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), | ||
570 | OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); | ||
571 | omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); | ||
572 | omap_prm_base_init(); | ||
573 | omap_cm_base_init(); | ||
526 | omap4xxx_check_revision(); | 574 | omap4xxx_check_revision(); |
527 | omap4xxx_check_features(); | 575 | omap4xxx_check_features(); |
528 | omap44xx_voltagedomains_init(); | 576 | omap44xx_voltagedomains_init(); |
@@ -544,7 +592,16 @@ void __init omap4430_init_late(void) | |||
544 | #ifdef CONFIG_SOC_OMAP5 | 592 | #ifdef CONFIG_SOC_OMAP5 |
545 | void __init omap5_init_early(void) | 593 | void __init omap5_init_early(void) |
546 | { | 594 | { |
547 | omap2_set_globals_5xxx(); | 595 | omap2_set_globals_tap(OMAP54XX_CLASS, |
596 | OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); | ||
597 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), | ||
598 | OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); | ||
599 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); | ||
600 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), | ||
601 | OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); | ||
602 | omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); | ||
603 | omap_prm_base_init(); | ||
604 | omap_cm_base_init(); | ||
548 | omap5xxx_check_revision(); | 605 | omap5xxx_check_revision(); |
549 | } | 606 | } |
550 | #endif | 607 | #endif |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a106c75c5338..bf496510eb5e 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -29,7 +29,7 @@ | |||
29 | * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. | 29 | * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. |
30 | * Sidetone needs non-gated ICLK and sidetone autoidle is broken. | 30 | * Sidetone needs non-gated ICLK and sidetone autoidle is broken. |
31 | */ | 31 | */ |
32 | #include "cm2xxx_3xxx.h" | 32 | #include "cm3xxx.h" |
33 | #include "cm-regbits-34xx.h" | 33 | #include "cm-regbits-34xx.h" |
34 | 34 | ||
35 | static int omap3_enable_st_clock(unsigned int id, bool enable) | 35 | static int omap3_enable_st_clock(unsigned int id, bool enable) |
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c index 627e97e30743..aafdd4ca9f4f 100644 --- a/arch/arm/mach-omap2/msdi.c +++ b/arch/arm/mach-omap2/msdi.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/platform_data/gpio-omap.h> | 26 | #include <linux/platform_data/gpio-omap.h> |
27 | 27 | ||
28 | #include "prm.h" | ||
28 | #include "common.h" | 29 | #include "common.h" |
29 | #include "control.h" | 30 | #include "control.h" |
30 | #include "omap_hwmod.h" | 31 | #include "omap_hwmod.h" |
@@ -43,9 +44,6 @@ | |||
43 | #define MSDI_CON_CLKD_MASK (0x3f << 0) | 44 | #define MSDI_CON_CLKD_MASK (0x3f << 0) |
44 | #define MSDI_CON_CLKD_SHIFT 0 | 45 | #define MSDI_CON_CLKD_SHIFT 0 |
45 | 46 | ||
46 | /* Maximum microseconds to wait for OMAP module to softreset */ | ||
47 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
48 | |||
49 | /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */ | 47 | /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */ |
50 | #define MSDI_TARGET_RESET_CLKD 0x3ff | 48 | #define MSDI_TARGET_RESET_CLKD 0x3ff |
51 | 49 | ||
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c new file mode 100644 index 000000000000..be6bc89ab1e8 --- /dev/null +++ b/arch/arm/mach-omap2/omap2-restart.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * omap2-restart.c - code common to all OMAP2xxx machines. | ||
3 | * | ||
4 | * Copyright (C) 2012 Texas Instruments | ||
5 | * Paul Walmsley | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/clk.h> | ||
14 | #include <linux/io.h> | ||
15 | |||
16 | #include "common.h" | ||
17 | #include "prm2xxx.h" | ||
18 | |||
19 | /* | ||
20 | * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set | ||
21 | * clock and the sys_ck. Used during the reset process | ||
22 | */ | ||
23 | static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck; | ||
24 | |||
25 | /* Reboot handling */ | ||
26 | |||
27 | /** | ||
28 | * omap2xxx_restart - Set DPLL to bypass mode for reboot to work | ||
29 | * | ||
30 | * Set the DPLL to bypass so that reboot completes successfully. No | ||
31 | * return value. | ||
32 | */ | ||
33 | void omap2xxx_restart(char mode, const char *cmd) | ||
34 | { | ||
35 | u32 rate; | ||
36 | |||
37 | rate = clk_get_rate(reset_sys_ck); | ||
38 | clk_set_rate(reset_virt_prcm_set_ck, rate); | ||
39 | |||
40 | /* XXX Should save the cmd argument for use after the reboot */ | ||
41 | |||
42 | omap2xxx_prm_dpll_reset(); /* never returns */ | ||
43 | while (1); | ||
44 | } | ||
45 | |||
46 | /** | ||
47 | * omap2xxx_common_look_up_clks_for_reset - look up clocks needed for restart | ||
48 | * | ||
49 | * Some clocks need to be looked up in advance for the SoC restart | ||
50 | * operation to work - see omap2xxx_restart(). Returns -EINVAL upon | ||
51 | * error or 0 upon success. | ||
52 | */ | ||
53 | static int __init omap2xxx_common_look_up_clks_for_reset(void) | ||
54 | { | ||
55 | reset_virt_prcm_set_ck = clk_get(NULL, "virt_prcm_set"); | ||
56 | if (IS_ERR(reset_virt_prcm_set_ck)) | ||
57 | return -EINVAL; | ||
58 | |||
59 | reset_sys_ck = clk_get(NULL, "sys_ck"); | ||
60 | if (IS_ERR(reset_sys_ck)) | ||
61 | return -EINVAL; | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | core_initcall(omap2xxx_common_look_up_clks_for_reset); | ||
diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c new file mode 100644 index 000000000000..923c582189e5 --- /dev/null +++ b/arch/arm/mach-omap2/omap3-restart.c | |||
@@ -0,0 +1,36 @@ | |||
1 | /* | ||
2 | * omap3-restart.c - Code common to all OMAP3xxx machines. | ||
3 | * | ||
4 | * Copyright (C) 2009, 2012 Texas Instruments | ||
5 | * Copyright (C) 2010 Nokia Corporation | ||
6 | * Tony Lindgren <tony@atomide.com> | ||
7 | * Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | #include "iomap.h" | ||
17 | #include "common.h" | ||
18 | #include "control.h" | ||
19 | #include "prm3xxx.h" | ||
20 | |||
21 | /* Global address base setup code */ | ||
22 | |||
23 | /** | ||
24 | * omap3xxx_restart - trigger a software restart of the SoC | ||
25 | * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c | ||
26 | * @cmd: passed from the userspace program rebooting the system (if provided) | ||
27 | * | ||
28 | * Resets the SoC. For @cmd, see the 'reboot' syscall in | ||
29 | * kernel/sys.c. No return value. | ||
30 | */ | ||
31 | void omap3xxx_restart(char mode, const char *cmd) | ||
32 | { | ||
33 | omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); | ||
34 | omap3xxx_prm_dpll3_reset(); /* never returns */ | ||
35 | while (1); | ||
36 | } | ||
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index eda316abbff5..6897ae21bb82 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -29,9 +29,12 @@ | |||
29 | 29 | ||
30 | #include "omap-wakeupgen.h" | 30 | #include "omap-wakeupgen.h" |
31 | #include "soc.h" | 31 | #include "soc.h" |
32 | #include "iomap.h" | ||
32 | #include "common.h" | 33 | #include "common.h" |
33 | #include "mmc.h" | 34 | #include "mmc.h" |
34 | #include "hsmmc.h" | 35 | #include "hsmmc.h" |
36 | #include "prminst44xx.h" | ||
37 | #include "prcm_mpu44xx.h" | ||
35 | #include "omap4-sar-layout.h" | 38 | #include "omap4-sar-layout.h" |
36 | #include "omap-secure.h" | 39 | #include "omap-secure.h" |
37 | #include "sram.h" | 40 | #include "sram.h" |
@@ -319,3 +322,19 @@ int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | |||
319 | return 0; | 322 | return 0; |
320 | } | 323 | } |
321 | #endif | 324 | #endif |
325 | |||
326 | /** | ||
327 | * omap44xx_restart - trigger a software restart of the SoC | ||
328 | * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c | ||
329 | * @cmd: passed from the userspace program rebooting the system (if provided) | ||
330 | * | ||
331 | * Resets the SoC. For @cmd, see the 'reboot' syscall in | ||
332 | * kernel/sys.c. No return value. | ||
333 | */ | ||
334 | void omap44xx_restart(char mode, const char *cmd) | ||
335 | { | ||
336 | /* XXX Should save 'cmd' into scratchpad for use after reboot */ | ||
337 | omap4_prminst_global_warm_sw_reset(); /* never returns */ | ||
338 | while (1); | ||
339 | } | ||
340 | |||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 437fbc59eb0c..b3b00f43dd7c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -141,7 +141,6 @@ | |||
141 | 141 | ||
142 | #include "clock.h" | 142 | #include "clock.h" |
143 | #include "omap_hwmod.h" | 143 | #include "omap_hwmod.h" |
144 | #include <plat/prcm.h> | ||
145 | 144 | ||
146 | #include "soc.h" | 145 | #include "soc.h" |
147 | #include "common.h" | 146 | #include "common.h" |
@@ -151,6 +150,7 @@ | |||
151 | #include "cm3xxx.h" | 150 | #include "cm3xxx.h" |
152 | #include "cminst44xx.h" | 151 | #include "cminst44xx.h" |
153 | #include "cm33xx.h" | 152 | #include "cm33xx.h" |
153 | #include "prm.h" | ||
154 | #include "prm3xxx.h" | 154 | #include "prm3xxx.h" |
155 | #include "prm44xx.h" | 155 | #include "prm44xx.h" |
156 | #include "prm33xx.h" | 156 | #include "prm33xx.h" |
@@ -158,9 +158,6 @@ | |||
158 | #include "mux.h" | 158 | #include "mux.h" |
159 | #include "pm.h" | 159 | #include "pm.h" |
160 | 160 | ||
161 | /* Maximum microseconds to wait for OMAP module to softreset */ | ||
162 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
163 | |||
164 | /* Name of the OMAP hwmod for the MPU */ | 161 | /* Name of the OMAP hwmod for the MPU */ |
165 | #define MPU_INITIATOR_NAME "mpu" | 162 | #define MPU_INITIATOR_NAME "mpu" |
166 | 163 | ||
@@ -2096,7 +2093,8 @@ static int _enable(struct omap_hwmod *oh) | |||
2096 | _enable_sysc(oh); | 2093 | _enable_sysc(oh); |
2097 | } | 2094 | } |
2098 | } else { | 2095 | } else { |
2099 | _omap4_disable_module(oh); | 2096 | if (soc_ops.disable_module) |
2097 | soc_ops.disable_module(oh); | ||
2100 | _disable_clocks(oh); | 2098 | _disable_clocks(oh); |
2101 | pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", | 2099 | pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", |
2102 | oh->name, r); | 2100 | oh->name, r); |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index a8b3368dca3d..e8efe3d1da6c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/platform_data/spi-omap2-mcspi.h> | 17 | #include <linux/platform_data/spi-omap2-mcspi.h> |
18 | 18 | ||
19 | #include <plat-omap/dma-omap.h> | 19 | #include <plat-omap/dma-omap.h> |
20 | #include <plat/dmtimer.h> | ||
21 | 20 | ||
22 | #include "omap_hwmod.h" | 21 | #include "omap_hwmod.h" |
23 | #include "l3_2xxx.h" | 22 | #include "l3_2xxx.h" |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index dc768c50e523..32d17e3fd727 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <linux/platform_data/spi-omap2-mcspi.h> | 18 | #include <linux/platform_data/spi-omap2-mcspi.h> |
19 | 19 | ||
20 | #include <plat-omap/dma-omap.h> | 20 | #include <plat-omap/dma-omap.h> |
21 | #include <plat/dmtimer.h> | ||
22 | 21 | ||
23 | #include "omap_hwmod.h" | 22 | #include "omap_hwmod.h" |
24 | #include "mmc.h" | 23 | #include "mmc.h" |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index a0116d08cf45..0db8f450bad9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | |||
@@ -58,8 +58,9 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { | |||
58 | .syss_offs = 0x0014, | 58 | .syss_offs = 0x0014, |
59 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | 59 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | |
60 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 60 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
61 | SYSC_HAS_AUTOIDLE), | 61 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
62 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 62 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
63 | .clockact = CLOCKACT_TEST_ICLK, | ||
63 | .sysc_fields = &omap_hwmod_sysc_type1, | 64 | .sysc_fields = &omap_hwmod_sysc_type1, |
64 | }; | 65 | }; |
65 | 66 | ||
@@ -268,6 +269,7 @@ struct omap_hwmod omap2xxx_timer1_hwmod = { | |||
268 | }, | 269 | }, |
269 | .dev_attr = &capability_alwon_dev_attr, | 270 | .dev_attr = &capability_alwon_dev_attr, |
270 | .class = &omap2xxx_timer_hwmod_class, | 271 | .class = &omap2xxx_timer_hwmod_class, |
272 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
271 | }; | 273 | }; |
272 | 274 | ||
273 | /* timer2 */ | 275 | /* timer2 */ |
@@ -286,6 +288,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = { | |||
286 | }, | 288 | }, |
287 | }, | 289 | }, |
288 | .class = &omap2xxx_timer_hwmod_class, | 290 | .class = &omap2xxx_timer_hwmod_class, |
291 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
289 | }; | 292 | }; |
290 | 293 | ||
291 | /* timer3 */ | 294 | /* timer3 */ |
@@ -304,6 +307,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = { | |||
304 | }, | 307 | }, |
305 | }, | 308 | }, |
306 | .class = &omap2xxx_timer_hwmod_class, | 309 | .class = &omap2xxx_timer_hwmod_class, |
310 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
307 | }; | 311 | }; |
308 | 312 | ||
309 | /* timer4 */ | 313 | /* timer4 */ |
@@ -322,6 +326,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = { | |||
322 | }, | 326 | }, |
323 | }, | 327 | }, |
324 | .class = &omap2xxx_timer_hwmod_class, | 328 | .class = &omap2xxx_timer_hwmod_class, |
329 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
325 | }; | 330 | }; |
326 | 331 | ||
327 | /* timer5 */ | 332 | /* timer5 */ |
@@ -341,6 +346,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = { | |||
341 | }, | 346 | }, |
342 | .dev_attr = &capability_dsp_dev_attr, | 347 | .dev_attr = &capability_dsp_dev_attr, |
343 | .class = &omap2xxx_timer_hwmod_class, | 348 | .class = &omap2xxx_timer_hwmod_class, |
349 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
344 | }; | 350 | }; |
345 | 351 | ||
346 | /* timer6 */ | 352 | /* timer6 */ |
@@ -360,6 +366,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = { | |||
360 | }, | 366 | }, |
361 | .dev_attr = &capability_dsp_dev_attr, | 367 | .dev_attr = &capability_dsp_dev_attr, |
362 | .class = &omap2xxx_timer_hwmod_class, | 368 | .class = &omap2xxx_timer_hwmod_class, |
369 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
363 | }; | 370 | }; |
364 | 371 | ||
365 | /* timer7 */ | 372 | /* timer7 */ |
@@ -379,6 +386,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = { | |||
379 | }, | 386 | }, |
380 | .dev_attr = &capability_dsp_dev_attr, | 387 | .dev_attr = &capability_dsp_dev_attr, |
381 | .class = &omap2xxx_timer_hwmod_class, | 388 | .class = &omap2xxx_timer_hwmod_class, |
389 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
382 | }; | 390 | }; |
383 | 391 | ||
384 | /* timer8 */ | 392 | /* timer8 */ |
@@ -398,6 +406,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = { | |||
398 | }, | 406 | }, |
399 | .dev_attr = &capability_dsp_dev_attr, | 407 | .dev_attr = &capability_dsp_dev_attr, |
400 | .class = &omap2xxx_timer_hwmod_class, | 408 | .class = &omap2xxx_timer_hwmod_class, |
409 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
401 | }; | 410 | }; |
402 | 411 | ||
403 | /* timer9 */ | 412 | /* timer9 */ |
@@ -417,6 +426,7 @@ struct omap_hwmod omap2xxx_timer9_hwmod = { | |||
417 | }, | 426 | }, |
418 | .dev_attr = &capability_pwm_dev_attr, | 427 | .dev_attr = &capability_pwm_dev_attr, |
419 | .class = &omap2xxx_timer_hwmod_class, | 428 | .class = &omap2xxx_timer_hwmod_class, |
429 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
420 | }; | 430 | }; |
421 | 431 | ||
422 | /* timer10 */ | 432 | /* timer10 */ |
@@ -436,6 +446,7 @@ struct omap_hwmod omap2xxx_timer10_hwmod = { | |||
436 | }, | 446 | }, |
437 | .dev_attr = &capability_pwm_dev_attr, | 447 | .dev_attr = &capability_pwm_dev_attr, |
438 | .class = &omap2xxx_timer_hwmod_class, | 448 | .class = &omap2xxx_timer_hwmod_class, |
449 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
439 | }; | 450 | }; |
440 | 451 | ||
441 | /* timer11 */ | 452 | /* timer11 */ |
@@ -455,6 +466,7 @@ struct omap_hwmod omap2xxx_timer11_hwmod = { | |||
455 | }, | 466 | }, |
456 | .dev_attr = &capability_pwm_dev_attr, | 467 | .dev_attr = &capability_pwm_dev_attr, |
457 | .class = &omap2xxx_timer_hwmod_class, | 468 | .class = &omap2xxx_timer_hwmod_class, |
469 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
458 | }; | 470 | }; |
459 | 471 | ||
460 | /* timer12 */ | 472 | /* timer12 */ |
@@ -474,6 +486,7 @@ struct omap_hwmod omap2xxx_timer12_hwmod = { | |||
474 | }, | 486 | }, |
475 | .dev_attr = &capability_pwm_dev_attr, | 487 | .dev_attr = &capability_pwm_dev_attr, |
476 | .class = &omap2xxx_timer_hwmod_class, | 488 | .class = &omap2xxx_timer_hwmod_class, |
489 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
477 | }; | 490 | }; |
478 | 491 | ||
479 | /* wd_timer2 */ | 492 | /* wd_timer2 */ |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 1150f823f24e..7f73f2132acc 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -153,29 +153,16 @@ static struct omap_hwmod omap3xxx_debugss_hwmod = { | |||
153 | }; | 153 | }; |
154 | 154 | ||
155 | /* timer class */ | 155 | /* timer class */ |
156 | static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = { | ||
157 | .rev_offs = 0x0000, | ||
158 | .sysc_offs = 0x0010, | ||
159 | .syss_offs = 0x0014, | ||
160 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | ||
161 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
162 | SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE), | ||
163 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
164 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
165 | }; | ||
166 | |||
167 | static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = { | ||
168 | .name = "timer", | ||
169 | .sysc = &omap3xxx_timer_1ms_sysc, | ||
170 | }; | ||
171 | |||
172 | static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = { | 156 | static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = { |
173 | .rev_offs = 0x0000, | 157 | .rev_offs = 0x0000, |
174 | .sysc_offs = 0x0010, | 158 | .sysc_offs = 0x0010, |
175 | .syss_offs = 0x0014, | 159 | .syss_offs = 0x0014, |
176 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | | 160 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | |
177 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | 161 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
162 | SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE | | ||
163 | SYSS_HAS_RESET_STATUS), | ||
178 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 164 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
165 | .clockact = CLOCKACT_TEST_ICLK, | ||
179 | .sysc_fields = &omap_hwmod_sysc_type1, | 166 | .sysc_fields = &omap_hwmod_sysc_type1, |
180 | }; | 167 | }; |
181 | 168 | ||
@@ -224,7 +211,8 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { | |||
224 | }, | 211 | }, |
225 | }, | 212 | }, |
226 | .dev_attr = &capability_alwon_dev_attr, | 213 | .dev_attr = &capability_alwon_dev_attr, |
227 | .class = &omap3xxx_timer_1ms_hwmod_class, | 214 | .class = &omap3xxx_timer_hwmod_class, |
215 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
228 | }; | 216 | }; |
229 | 217 | ||
230 | /* timer2 */ | 218 | /* timer2 */ |
@@ -241,7 +229,8 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { | |||
241 | .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, | 229 | .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, |
242 | }, | 230 | }, |
243 | }, | 231 | }, |
244 | .class = &omap3xxx_timer_1ms_hwmod_class, | 232 | .class = &omap3xxx_timer_hwmod_class, |
233 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
245 | }; | 234 | }; |
246 | 235 | ||
247 | /* timer3 */ | 236 | /* timer3 */ |
@@ -259,6 +248,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { | |||
259 | }, | 248 | }, |
260 | }, | 249 | }, |
261 | .class = &omap3xxx_timer_hwmod_class, | 250 | .class = &omap3xxx_timer_hwmod_class, |
251 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
262 | }; | 252 | }; |
263 | 253 | ||
264 | /* timer4 */ | 254 | /* timer4 */ |
@@ -276,6 +266,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { | |||
276 | }, | 266 | }, |
277 | }, | 267 | }, |
278 | .class = &omap3xxx_timer_hwmod_class, | 268 | .class = &omap3xxx_timer_hwmod_class, |
269 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
279 | }; | 270 | }; |
280 | 271 | ||
281 | /* timer5 */ | 272 | /* timer5 */ |
@@ -294,6 +285,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { | |||
294 | }, | 285 | }, |
295 | .dev_attr = &capability_dsp_dev_attr, | 286 | .dev_attr = &capability_dsp_dev_attr, |
296 | .class = &omap3xxx_timer_hwmod_class, | 287 | .class = &omap3xxx_timer_hwmod_class, |
288 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
297 | }; | 289 | }; |
298 | 290 | ||
299 | /* timer6 */ | 291 | /* timer6 */ |
@@ -312,6 +304,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { | |||
312 | }, | 304 | }, |
313 | .dev_attr = &capability_dsp_dev_attr, | 305 | .dev_attr = &capability_dsp_dev_attr, |
314 | .class = &omap3xxx_timer_hwmod_class, | 306 | .class = &omap3xxx_timer_hwmod_class, |
307 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
315 | }; | 308 | }; |
316 | 309 | ||
317 | /* timer7 */ | 310 | /* timer7 */ |
@@ -330,6 +323,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { | |||
330 | }, | 323 | }, |
331 | .dev_attr = &capability_dsp_dev_attr, | 324 | .dev_attr = &capability_dsp_dev_attr, |
332 | .class = &omap3xxx_timer_hwmod_class, | 325 | .class = &omap3xxx_timer_hwmod_class, |
326 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
333 | }; | 327 | }; |
334 | 328 | ||
335 | /* timer8 */ | 329 | /* timer8 */ |
@@ -348,6 +342,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { | |||
348 | }, | 342 | }, |
349 | .dev_attr = &capability_dsp_pwm_dev_attr, | 343 | .dev_attr = &capability_dsp_pwm_dev_attr, |
350 | .class = &omap3xxx_timer_hwmod_class, | 344 | .class = &omap3xxx_timer_hwmod_class, |
345 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
351 | }; | 346 | }; |
352 | 347 | ||
353 | /* timer9 */ | 348 | /* timer9 */ |
@@ -366,6 +361,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { | |||
366 | }, | 361 | }, |
367 | .dev_attr = &capability_pwm_dev_attr, | 362 | .dev_attr = &capability_pwm_dev_attr, |
368 | .class = &omap3xxx_timer_hwmod_class, | 363 | .class = &omap3xxx_timer_hwmod_class, |
364 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
369 | }; | 365 | }; |
370 | 366 | ||
371 | /* timer10 */ | 367 | /* timer10 */ |
@@ -383,7 +379,8 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { | |||
383 | }, | 379 | }, |
384 | }, | 380 | }, |
385 | .dev_attr = &capability_pwm_dev_attr, | 381 | .dev_attr = &capability_pwm_dev_attr, |
386 | .class = &omap3xxx_timer_1ms_hwmod_class, | 382 | .class = &omap3xxx_timer_hwmod_class, |
383 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
387 | }; | 384 | }; |
388 | 385 | ||
389 | /* timer11 */ | 386 | /* timer11 */ |
@@ -402,6 +399,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { | |||
402 | }, | 399 | }, |
403 | .dev_attr = &capability_pwm_dev_attr, | 400 | .dev_attr = &capability_pwm_dev_attr, |
404 | .class = &omap3xxx_timer_hwmod_class, | 401 | .class = &omap3xxx_timer_hwmod_class, |
402 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
405 | }; | 403 | }; |
406 | 404 | ||
407 | /* timer12 */ | 405 | /* timer12 */ |
@@ -425,6 +423,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = { | |||
425 | }, | 423 | }, |
426 | .dev_attr = &capability_secure_dev_attr, | 424 | .dev_attr = &capability_secure_dev_attr, |
427 | .class = &omap3xxx_timer_hwmod_class, | 425 | .class = &omap3xxx_timer_hwmod_class, |
426 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
428 | }; | 427 | }; |
429 | 428 | ||
430 | /* | 429 | /* |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index caf946dfd4a4..26f8e9f18190 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -21,11 +21,11 @@ | |||
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/platform_data/gpio-omap.h> | 22 | #include <linux/platform_data/gpio-omap.h> |
23 | #include <linux/power/smartreflex.h> | 23 | #include <linux/power/smartreflex.h> |
24 | #include <linux/platform_data/omap_ocp2scp.h> | ||
25 | #include <linux/i2c-omap.h> | 24 | #include <linux/i2c-omap.h> |
26 | 25 | ||
27 | #include <plat-omap/dma-omap.h> | 26 | #include <plat-omap/dma-omap.h> |
28 | 27 | ||
28 | #include <linux/platform_data/omap_ocp2scp.h> | ||
29 | #include <linux/platform_data/spi-omap2-mcspi.h> | 29 | #include <linux/platform_data/spi-omap2-mcspi.h> |
30 | #include <linux/platform_data/asoc-ti-mcbsp.h> | 30 | #include <linux/platform_data/asoc-ti-mcbsp.h> |
31 | #include <linux/platform_data/iommu-omap.h> | 31 | #include <linux/platform_data/iommu-omap.h> |
@@ -3103,6 +3103,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = { | |||
3103 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | 3103 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | |
3104 | SYSS_HAS_RESET_STATUS), | 3104 | SYSS_HAS_RESET_STATUS), |
3105 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 3105 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
3106 | .clockact = CLOCKACT_TEST_ICLK, | ||
3106 | .sysc_fields = &omap_hwmod_sysc_type1, | 3107 | .sysc_fields = &omap_hwmod_sysc_type1, |
3107 | }; | 3108 | }; |
3108 | 3109 | ||
@@ -3156,6 +3157,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | |||
3156 | .name = "timer1", | 3157 | .name = "timer1", |
3157 | .class = &omap44xx_timer_1ms_hwmod_class, | 3158 | .class = &omap44xx_timer_1ms_hwmod_class, |
3158 | .clkdm_name = "l4_wkup_clkdm", | 3159 | .clkdm_name = "l4_wkup_clkdm", |
3160 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
3159 | .mpu_irqs = omap44xx_timer1_irqs, | 3161 | .mpu_irqs = omap44xx_timer1_irqs, |
3160 | .main_clk = "timer1_fck", | 3162 | .main_clk = "timer1_fck", |
3161 | .prcm = { | 3163 | .prcm = { |
@@ -3178,6 +3180,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | |||
3178 | .name = "timer2", | 3180 | .name = "timer2", |
3179 | .class = &omap44xx_timer_1ms_hwmod_class, | 3181 | .class = &omap44xx_timer_1ms_hwmod_class, |
3180 | .clkdm_name = "l4_per_clkdm", | 3182 | .clkdm_name = "l4_per_clkdm", |
3183 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
3181 | .mpu_irqs = omap44xx_timer2_irqs, | 3184 | .mpu_irqs = omap44xx_timer2_irqs, |
3182 | .main_clk = "timer2_fck", | 3185 | .main_clk = "timer2_fck", |
3183 | .prcm = { | 3186 | .prcm = { |
@@ -3352,6 +3355,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | |||
3352 | .name = "timer10", | 3355 | .name = "timer10", |
3353 | .class = &omap44xx_timer_1ms_hwmod_class, | 3356 | .class = &omap44xx_timer_1ms_hwmod_class, |
3354 | .clkdm_name = "l4_per_clkdm", | 3357 | .clkdm_name = "l4_per_clkdm", |
3358 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
3355 | .mpu_irqs = omap44xx_timer10_irqs, | 3359 | .mpu_irqs = omap44xx_timer10_irqs, |
3356 | .main_clk = "timer10_fck", | 3360 | .main_clk = "timer10_fck", |
3357 | .prcm = { | 3361 | .prcm = { |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 3cf4fdfd7ab0..e2c291f52f92 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include "clock.h" | 30 | #include "clock.h" |
31 | #include "powerdomain.h" | 31 | #include "powerdomain.h" |
32 | #include "clockdomain.h" | 32 | #include "clockdomain.h" |
33 | #include <plat/dmtimer.h> | ||
34 | #include "omap-pm.h" | 33 | #include "omap-pm.h" |
35 | 34 | ||
36 | #include "soc.h" | 35 | #include "soc.h" |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index a8b43da0b6f4..770320061422 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -38,7 +38,6 @@ | |||
38 | 38 | ||
39 | #include "clockdomain.h" | 39 | #include "clockdomain.h" |
40 | #include "powerdomain.h" | 40 | #include "powerdomain.h" |
41 | #include <plat/prcm.h> | ||
42 | #include <plat-omap/dma-omap.h> | 41 | #include <plat-omap/dma-omap.h> |
43 | 42 | ||
44 | #include "soc.h" | 43 | #include "soc.h" |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 1678a3284233..dea62a9aad07 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -29,8 +29,6 @@ | |||
29 | 29 | ||
30 | #include <asm/cpu.h> | 30 | #include <asm/cpu.h> |
31 | 31 | ||
32 | #include <plat/prcm.h> | ||
33 | |||
34 | #include "powerdomain.h" | 32 | #include "powerdomain.h" |
35 | #include "clockdomain.h" | 33 | #include "clockdomain.h" |
36 | 34 | ||
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 72df97482cc0..c7d355fafd24 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -406,11 +406,6 @@ | |||
406 | #define OMAP3430_EN_CORE_MASK (1 << 0) | 406 | #define OMAP3430_EN_CORE_MASK (1 << 0) |
407 | 407 | ||
408 | 408 | ||
409 | /* | ||
410 | * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP | ||
411 | * submodule to exit hardreset | ||
412 | */ | ||
413 | #define MAX_MODULE_HARDRESET_WAIT 10000 | ||
414 | 409 | ||
415 | /* | 410 | /* |
416 | * Maximum time(us) it takes to output the signal WUCLKOUT of the last | 411 | * Maximum time(us) it takes to output the signal WUCLKOUT of the last |
@@ -419,24 +414,7 @@ | |||
419 | * microseconds on OMAP4, so this timeout may be too high. | 414 | * microseconds on OMAP4, so this timeout may be too high. |
420 | */ | 415 | */ |
421 | #define MAX_IOPAD_LATCH_TIME 100 | 416 | #define MAX_IOPAD_LATCH_TIME 100 |
422 | |||
423 | # ifndef __ASSEMBLER__ | 417 | # ifndef __ASSEMBLER__ |
424 | extern void __iomem *prm_base; | ||
425 | extern void __iomem *cm_base; | ||
426 | extern void __iomem *cm2_base; | ||
427 | extern void __iomem *prcm_mpu_base; | ||
428 | |||
429 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) | ||
430 | extern void omap_prm_base_init(void); | ||
431 | extern void omap_cm_base_init(void); | ||
432 | #else | ||
433 | static inline void omap_prm_base_init(void) | ||
434 | { | ||
435 | } | ||
436 | static inline void omap_cm_base_init(void) | ||
437 | { | ||
438 | } | ||
439 | #endif | ||
440 | 418 | ||
441 | /** | 419 | /** |
442 | * struct omap_prcm_irq - describes a PRCM interrupt bit | 420 | * struct omap_prcm_irq - describes a PRCM interrupt bit |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c deleted file mode 100644 index cff270a178c5..000000000000 --- a/arch/arm/mach-omap2/prcm.c +++ /dev/null | |||
@@ -1,189 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-omap2/prcm.c | ||
3 | * | ||
4 | * OMAP 24xx Power Reset and Clock Management (PRCM) functions | ||
5 | * | ||
6 | * Copyright (C) 2005 Nokia Corporation | ||
7 | * | ||
8 | * Written by Tony Lindgren <tony.lindgren@nokia.com> | ||
9 | * | ||
10 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
11 | * Rajendra Nayak <rnayak@ti.com> | ||
12 | * | ||
13 | * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc. | ||
14 | * Upgraded with OMAP4 support by Abhijit Pagare <abhijitpagare@ti.com> | ||
15 | * | ||
16 | * This program is free software; you can redistribute it and/or modify | ||
17 | * it under the terms of the GNU General Public License version 2 as | ||
18 | * published by the Free Software Foundation. | ||
19 | */ | ||
20 | |||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/clk.h> | ||
24 | #include <linux/io.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/export.h> | ||
27 | |||
28 | #include "common.h" | ||
29 | #include <plat/prcm.h> | ||
30 | |||
31 | #include "soc.h" | ||
32 | #include "clock.h" | ||
33 | #include "clock2xxx.h" | ||
34 | #include "cm2xxx_3xxx.h" | ||
35 | #include "prm2xxx_3xxx.h" | ||
36 | #include "prm44xx.h" | ||
37 | #include "prminst44xx.h" | ||
38 | #include "cminst44xx.h" | ||
39 | #include "prm-regbits-24xx.h" | ||
40 | #include "prm-regbits-44xx.h" | ||
41 | #include "control.h" | ||
42 | |||
43 | void __iomem *prm_base; | ||
44 | void __iomem *cm_base; | ||
45 | void __iomem *cm2_base; | ||
46 | void __iomem *prcm_mpu_base; | ||
47 | |||
48 | #define MAX_MODULE_ENABLE_WAIT 100000 | ||
49 | |||
50 | u32 omap_prcm_get_reset_sources(void) | ||
51 | { | ||
52 | /* XXX This presumably needs modification for 34XX */ | ||
53 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
54 | return omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f; | ||
55 | if (cpu_is_omap44xx()) | ||
56 | return omap2_prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f; | ||
57 | |||
58 | return 0; | ||
59 | } | ||
60 | EXPORT_SYMBOL(omap_prcm_get_reset_sources); | ||
61 | |||
62 | /* Resets clock rates and reboots the system. Only called from system.h */ | ||
63 | void omap_prcm_restart(char mode, const char *cmd) | ||
64 | { | ||
65 | s16 prcm_offs = 0; | ||
66 | |||
67 | if (cpu_is_omap24xx()) { | ||
68 | omap2xxx_clk_prepare_for_reboot(); | ||
69 | |||
70 | prcm_offs = WKUP_MOD; | ||
71 | } else if (cpu_is_omap34xx()) { | ||
72 | prcm_offs = OMAP3430_GR_MOD; | ||
73 | omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); | ||
74 | } else if (cpu_is_omap44xx()) { | ||
75 | omap4_prminst_global_warm_sw_reset(); /* never returns */ | ||
76 | } else { | ||
77 | WARN_ON(1); | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * As per Errata i520, in some cases, user will not be able to | ||
82 | * access DDR memory after warm-reset. | ||
83 | * This situation occurs while the warm-reset happens during a read | ||
84 | * access to DDR memory. In that particular condition, DDR memory | ||
85 | * does not respond to a corrupted read command due to the warm | ||
86 | * reset occurrence but SDRC is waiting for read completion. | ||
87 | * SDRC is not sensitive to the warm reset, but the interconnect is | ||
88 | * reset on the fly, thus causing a misalignment between SDRC logic, | ||
89 | * interconnect logic and DDR memory state. | ||
90 | * WORKAROUND: | ||
91 | * Steps to perform before a Warm reset is trigged: | ||
92 | * 1. enable self-refresh on idle request | ||
93 | * 2. put SDRC in idle | ||
94 | * 3. wait until SDRC goes to idle | ||
95 | * 4. generate SW reset (Global SW reset) | ||
96 | * | ||
97 | * Steps to be performed after warm reset occurs (in bootloader): | ||
98 | * if HW warm reset is the source, apply below steps before any | ||
99 | * accesses to SDRAM: | ||
100 | * 1. Reset SMS and SDRC and wait till reset is complete | ||
101 | * 2. Re-initialize SMS, SDRC and memory | ||
102 | * | ||
103 | * NOTE: Above work around is required only if arch reset is implemented | ||
104 | * using Global SW reset(GLOBAL_SW_RST). DPLL3 reset does not need | ||
105 | * the WA since it resets SDRC as well as part of cold reset. | ||
106 | */ | ||
107 | |||
108 | /* XXX should be moved to some OMAP2/3 specific code */ | ||
109 | omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, | ||
110 | OMAP2_RM_RSTCTRL); | ||
111 | omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ | ||
112 | } | ||
113 | |||
114 | /** | ||
115 | * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness | ||
116 | * @reg: physical address of module IDLEST register | ||
117 | * @mask: value to mask against to determine if the module is active | ||
118 | * @idlest: idle state indicator (0 or 1) for the clock | ||
119 | * @name: name of the clock (for printk) | ||
120 | * | ||
121 | * Returns 1 if the module indicated readiness in time, or 0 if it | ||
122 | * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds. | ||
123 | * | ||
124 | * XXX This function is deprecated. It should be removed once the | ||
125 | * hwmod conversion is complete. | ||
126 | */ | ||
127 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, | ||
128 | const char *name) | ||
129 | { | ||
130 | int i = 0; | ||
131 | int ena = 0; | ||
132 | |||
133 | if (idlest) | ||
134 | ena = 0; | ||
135 | else | ||
136 | ena = mask; | ||
137 | |||
138 | /* Wait for lock */ | ||
139 | omap_test_timeout(((__raw_readl(reg) & mask) == ena), | ||
140 | MAX_MODULE_ENABLE_WAIT, i); | ||
141 | |||
142 | if (i < MAX_MODULE_ENABLE_WAIT) | ||
143 | pr_debug("cm: Module associated with clock %s ready after %d loops\n", | ||
144 | name, i); | ||
145 | else | ||
146 | pr_err("cm: Module associated with clock %s didn't enable in %d tries\n", | ||
147 | name, MAX_MODULE_ENABLE_WAIT); | ||
148 | |||
149 | return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; | ||
150 | }; | ||
151 | |||
152 | void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) | ||
153 | { | ||
154 | if (omap2_globals->prm) | ||
155 | prm_base = omap2_globals->prm; | ||
156 | if (omap2_globals->cm) | ||
157 | cm_base = omap2_globals->cm; | ||
158 | if (omap2_globals->cm2) | ||
159 | cm2_base = omap2_globals->cm2; | ||
160 | if (omap2_globals->prcm_mpu) | ||
161 | prcm_mpu_base = omap2_globals->prcm_mpu; | ||
162 | |||
163 | if (cpu_is_omap44xx() || soc_is_omap54xx()) { | ||
164 | omap_prm_base_init(); | ||
165 | omap_cm_base_init(); | ||
166 | } | ||
167 | } | ||
168 | |||
169 | /* | ||
170 | * Stubbed functions so that common files continue to build when | ||
171 | * custom builds are used | ||
172 | * XXX These are temporary and should be removed at the earliest possible | ||
173 | * opportunity | ||
174 | */ | ||
175 | int __weak omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, | ||
176 | u16 clkctrl_offs) | ||
177 | { | ||
178 | return 0; | ||
179 | } | ||
180 | |||
181 | void __weak omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, | ||
182 | s16 cdoffs, u16 clkctrl_offs) | ||
183 | { | ||
184 | } | ||
185 | |||
186 | void __weak omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, | ||
187 | u16 clkctrl_offs) | ||
188 | { | ||
189 | } | ||
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c index 928dbd4f20ed..c30e44a7fab0 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.c +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c | |||
@@ -20,6 +20,12 @@ | |||
20 | #include "prcm_mpu44xx.h" | 20 | #include "prcm_mpu44xx.h" |
21 | #include "cm-regbits-44xx.h" | 21 | #include "cm-regbits-44xx.h" |
22 | 22 | ||
23 | /* | ||
24 | * prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP | ||
25 | * block registers | ||
26 | */ | ||
27 | void __iomem *prcm_mpu_base; | ||
28 | |||
23 | /* PRCM_MPU low-level functions */ | 29 | /* PRCM_MPU low-level functions */ |
24 | 30 | ||
25 | u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg) | 31 | u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg) |
@@ -43,3 +49,14 @@ u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) | |||
43 | 49 | ||
44 | return v; | 50 | return v; |
45 | } | 51 | } |
52 | |||
53 | /** | ||
54 | * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use) | ||
55 | * @prcm_mpu: PRCM_MPU base virtual address | ||
56 | * | ||
57 | * XXX Will be replaced when the PRM/CM drivers are completed. | ||
58 | */ | ||
59 | void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu) | ||
60 | { | ||
61 | prcm_mpu_base = prcm_mpu; | ||
62 | } | ||
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index 8a6e250f04b5..884af7bb4afd 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP44xx PRCM MPU instance offset macros | 2 | * OMAP44xx PRCM MPU instance offset macros |
3 | * | 3 | * |
4 | * Copyright (C) 2010 Texas Instruments, Inc. | 4 | * Copyright (C) 2010, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2010 Nokia Corporation | 5 | * Copyright (C) 2010 Nokia Corporation |
6 | * | 6 | * |
7 | * Paul Walmsley (paul@pwsan.com) | 7 | * Paul Walmsley (paul@pwsan.com) |
@@ -25,6 +25,12 @@ | |||
25 | #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H | 25 | #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H |
26 | #define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H | 26 | #define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H |
27 | 27 | ||
28 | #include "common.h" | ||
29 | |||
30 | # ifndef __ASSEMBLER__ | ||
31 | extern void __iomem *prcm_mpu_base; | ||
32 | # endif | ||
33 | |||
28 | #define OMAP4430_PRCM_MPU_BASE 0x48243000 | 34 | #define OMAP4430_PRCM_MPU_BASE 0x48243000 |
29 | 35 | ||
30 | #define OMAP44XX_PRCM_MPU_REGADDR(inst, reg) \ | 36 | #define OMAP44XX_PRCM_MPU_REGADDR(inst, reg) \ |
@@ -98,6 +104,7 @@ extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx); | |||
98 | extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx); | 104 | extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx); |
99 | extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, | 105 | extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, |
100 | s16 idx); | 106 | s16 idx); |
107 | extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu); | ||
101 | # endif | 108 | # endif |
102 | 109 | ||
103 | #endif | 110 | #endif |
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index c30ab5de8d1d..a1a266ce90da 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions | 2 | * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2009 Texas Instruments, Inc. | 4 | * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2010 Nokia Corporation | 5 | * Copyright (C) 2010 Nokia Corporation |
6 | * | 6 | * |
7 | * Paul Walmsley | 7 | * Paul Walmsley |
@@ -15,6 +15,28 @@ | |||
15 | 15 | ||
16 | #include "prcm-common.h" | 16 | #include "prcm-common.h" |
17 | 17 | ||
18 | # ifndef __ASSEMBLER__ | ||
19 | extern void __iomem *prm_base; | ||
20 | extern void omap2_set_globals_prm(void __iomem *prm); | ||
21 | # endif | ||
22 | |||
23 | |||
24 | /* | ||
25 | * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP | ||
26 | * module to softreset | ||
27 | */ | ||
28 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
29 | |||
30 | /* | ||
31 | * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP | ||
32 | * submodule to exit hardreset | ||
33 | */ | ||
34 | #define MAX_MODULE_HARDRESET_WAIT 10000 | ||
35 | |||
36 | /* | ||
37 | * Register bitfields | ||
38 | */ | ||
39 | |||
18 | /* | 40 | /* |
19 | * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP | 41 | * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP |
20 | * | 42 | * |
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index e2860f9c111d..bf24fc47603b 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c | |||
@@ -20,7 +20,6 @@ | |||
20 | 20 | ||
21 | #include "common.h" | 21 | #include "common.h" |
22 | #include <plat/cpu.h> | 22 | #include <plat/cpu.h> |
23 | #include <plat/prcm.h> | ||
24 | 23 | ||
25 | #include "vp.h" | 24 | #include "vp.h" |
26 | #include "powerdomain.h" | 25 | #include "powerdomain.h" |
@@ -69,6 +68,20 @@ static u32 omap2xxx_prm_read_reset_sources(void) | |||
69 | return r; | 68 | return r; |
70 | } | 69 | } |
71 | 70 | ||
71 | /** | ||
72 | * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC | ||
73 | * | ||
74 | * Set the DPLL reset bit, which should reboot the SoC. This is the | ||
75 | * recommended way to restart the SoC. No return value. | ||
76 | */ | ||
77 | void omap2xxx_prm_dpll_reset(void) | ||
78 | { | ||
79 | omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD, | ||
80 | OMAP2_RM_RSTCTRL); | ||
81 | /* OCP barrier */ | ||
82 | omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL); | ||
83 | } | ||
84 | |||
72 | int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) | 85 | int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) |
73 | { | 86 | { |
74 | omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, | 87 | omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, |
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 1d97112524f1..fe8a14f190ab 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h | |||
@@ -124,6 +124,8 @@ | |||
124 | extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); | 124 | extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); |
125 | extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); | 125 | extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); |
126 | 126 | ||
127 | extern void omap2xxx_prm_dpll_reset(void); | ||
128 | |||
127 | extern int __init prm2xxx_init(void); | 129 | extern int __init prm2xxx_init(void); |
128 | extern int __exit prm2xxx_exit(void); | 130 | extern int __exit prm2xxx_exit(void); |
129 | 131 | ||
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 3330b1bf789d..78532d6fecd7 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | |||
@@ -241,11 +241,4 @@ extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); | |||
241 | #define OMAP_LOGICRETSTATE_MASK (1 << 2) | 241 | #define OMAP_LOGICRETSTATE_MASK (1 << 2) |
242 | 242 | ||
243 | 243 | ||
244 | /* | ||
245 | * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP | ||
246 | * submodule to exit hardreset | ||
247 | */ | ||
248 | #define MAX_MODULE_HARDRESET_WAIT 10000 | ||
249 | |||
250 | |||
251 | #endif | 244 | #endif |
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 1fea656b2ca8..b86116cf0db9 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c | |||
@@ -20,7 +20,6 @@ | |||
20 | 20 | ||
21 | #include "common.h" | 21 | #include "common.h" |
22 | #include <plat/cpu.h> | 22 | #include <plat/cpu.h> |
23 | #include <plat/prcm.h> | ||
24 | 23 | ||
25 | #include "vp.h" | 24 | #include "vp.h" |
26 | #include "powerdomain.h" | 25 | #include "powerdomain.h" |
@@ -123,6 +122,21 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) | |||
123 | } | 122 | } |
124 | 123 | ||
125 | /** | 124 | /** |
125 | * omap3xxx_prm_dpll3_reset - use DPLL3 reset to reboot the OMAP SoC | ||
126 | * | ||
127 | * Set the DPLL3 reset bit, which should reboot the SoC. This is the | ||
128 | * recommended way to restart the SoC, considering Errata i520. No | ||
129 | * return value. | ||
130 | */ | ||
131 | void omap3xxx_prm_dpll3_reset(void) | ||
132 | { | ||
133 | omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD, | ||
134 | OMAP2_RM_RSTCTRL); | ||
135 | /* OCP barrier */ | ||
136 | omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL); | ||
137 | } | ||
138 | |||
139 | /** | ||
126 | * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events | 140 | * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events |
127 | * @events: ptr to a u32, preallocated by caller | 141 | * @events: ptr to a u32, preallocated by caller |
128 | * | 142 | * |
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index a3c28a875410..10cd41a8129e 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h | |||
@@ -152,6 +152,8 @@ extern void omap3xxx_prm_ocp_barrier(void); | |||
152 | extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); | 152 | extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); |
153 | extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); | 153 | extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); |
154 | 154 | ||
155 | extern void omap3xxx_prm_dpll3_reset(void); | ||
156 | |||
155 | extern u32 omap3xxx_prm_get_reset_sources(void); | 157 | extern u32 omap3xxx_prm_get_reset_sources(void); |
156 | 158 | ||
157 | #endif /* __ASSEMBLER */ | 159 | #endif /* __ASSEMBLER */ |
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a799e9552fbf..6d3467af205d 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | 20 | ||
21 | #include <plat/prcm.h> | ||
22 | 21 | ||
23 | #include "soc.h" | 22 | #include "soc.h" |
24 | #include "iomap.h" | 23 | #include "iomap.h" |
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 945b4ad6ab84..f596e1e91ffd 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
@@ -24,12 +24,11 @@ | |||
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | 26 | ||
27 | #include <plat/prcm.h> | ||
28 | |||
29 | #include "prm2xxx_3xxx.h" | 27 | #include "prm2xxx_3xxx.h" |
30 | #include "prm2xxx.h" | 28 | #include "prm2xxx.h" |
31 | #include "prm3xxx.h" | 29 | #include "prm3xxx.h" |
32 | #include "prm44xx.h" | 30 | #include "prm44xx.h" |
31 | #include "common.h" | ||
33 | 32 | ||
34 | /* | 33 | /* |
35 | * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs | 34 | * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs |
@@ -54,6 +53,9 @@ static struct irq_chip_generic **prcm_irq_chips; | |||
54 | */ | 53 | */ |
55 | static struct omap_prcm_irq_setup *prcm_irq_setup; | 54 | static struct omap_prcm_irq_setup *prcm_irq_setup; |
56 | 55 | ||
56 | /* prm_base: base virtual address of the PRM IP block */ | ||
57 | void __iomem *prm_base; | ||
58 | |||
57 | /* | 59 | /* |
58 | * prm_ll_data: function pointers to SoC-specific implementations of | 60 | * prm_ll_data: function pointers to SoC-specific implementations of |
59 | * common PRM functions | 61 | * common PRM functions |
@@ -328,6 +330,17 @@ err: | |||
328 | } | 330 | } |
329 | 331 | ||
330 | /** | 332 | /** |
333 | * omap2_set_globals_prm - set the PRM base address (for early use) | ||
334 | * @prm: PRM base virtual address | ||
335 | * | ||
336 | * XXX Will be replaced when the PRM/CM drivers are completed. | ||
337 | */ | ||
338 | void __init omap2_set_globals_prm(void __iomem *prm) | ||
339 | { | ||
340 | prm_base = prm; | ||
341 | } | ||
342 | |||
343 | /** | ||
331 | * prm_read_reset_sources - return the sources of the SoC's last reset | 344 | * prm_read_reset_sources - return the sources of the SoC's last reset |
332 | * | 345 | * |
333 | * Return a u32 bitmask representing the reset sources that caused the | 346 | * Return a u32 bitmask representing the reset sources that caused the |
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index 46f2efb36596..a2ede2d65481 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h | |||
@@ -30,4 +30,6 @@ extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, | |||
30 | extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, | 30 | extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, |
31 | u16 rstctrl_offs); | 31 | u16 rstctrl_offs); |
32 | 32 | ||
33 | extern void omap_prm_base_init(void); | ||
34 | |||
33 | #endif | 35 | #endif |
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index c64ee1904be8..dae7e4804a48 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c | |||
@@ -112,12 +112,10 @@ int omap2_sdrc_get_params(unsigned long r, | |||
112 | } | 112 | } |
113 | 113 | ||
114 | 114 | ||
115 | void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) | 115 | void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms) |
116 | { | 116 | { |
117 | if (omap2_globals->sdrc) | 117 | omap2_sdrc_base = sdrc; |
118 | omap2_sdrc_base = omap2_globals->sdrc; | 118 | omap2_sms_base = sms; |
119 | if (omap2_globals->sms) | ||
120 | omap2_sms_base = omap2_globals->sms; | ||
121 | } | 119 | } |
122 | 120 | ||
123 | /** | 121 | /** |
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 69c4b329452e..446aa13511fd 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h | |||
@@ -51,6 +51,8 @@ static inline u32 sms_read_reg(u16 reg) | |||
51 | return __raw_readl(OMAP_SMS_REGADDR(reg)); | 51 | return __raw_readl(OMAP_SMS_REGADDR(reg)); |
52 | } | 52 | } |
53 | 53 | ||
54 | extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms); | ||
55 | |||
54 | 56 | ||
55 | /** | 57 | /** |
56 | * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate | 58 | * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate |
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 070096496e20..f31d90774de0 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h | |||
@@ -435,9 +435,7 @@ extern u32 omap_features; | |||
435 | #define OMAP3_HAS_IO_WAKEUP BIT(6) | 435 | #define OMAP3_HAS_IO_WAKEUP BIT(6) |
436 | #define OMAP3_HAS_SDRC BIT(7) | 436 | #define OMAP3_HAS_SDRC BIT(7) |
437 | #define OMAP3_HAS_IO_CHAIN_CTRL BIT(8) | 437 | #define OMAP3_HAS_IO_CHAIN_CTRL BIT(8) |
438 | #define OMAP4_HAS_MPU_1GHZ BIT(9) | 438 | #define OMAP4_HAS_PERF_SILICON BIT(9) |
439 | #define OMAP4_HAS_MPU_1_2GHZ BIT(10) | ||
440 | #define OMAP4_HAS_MPU_1_5GHZ BIT(11) | ||
441 | 439 | ||
442 | 440 | ||
443 | #define OMAP3_HAS_FEATURE(feat,flag) \ | 441 | #define OMAP3_HAS_FEATURE(feat,flag) \ |
@@ -465,9 +463,7 @@ static inline unsigned int omap4_has_ ##feat(void) \ | |||
465 | return omap_features & OMAP4_HAS_ ##flag; \ | 463 | return omap_features & OMAP4_HAS_ ##flag; \ |
466 | } \ | 464 | } \ |
467 | 465 | ||
468 | OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ) | 466 | OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON) |
469 | OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ) | ||
470 | OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ) | ||
471 | 467 | ||
472 | #endif /* __ASSEMBLY__ */ | 468 | #endif /* __ASSEMBLY__ */ |
473 | 469 | ||
diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h index 8f9843f78422..a1e6caf0dba6 100644 --- a/arch/arm/mach-omap2/ti81xx.h +++ b/arch/arm/mach-omap2/ti81xx.h | |||
@@ -22,6 +22,15 @@ | |||
22 | #define TI81XX_CTRL_BASE TI81XX_SCM_BASE | 22 | #define TI81XX_CTRL_BASE TI81XX_SCM_BASE |
23 | #define TI81XX_PRCM_BASE 0x48180000 | 23 | #define TI81XX_PRCM_BASE 0x48180000 |
24 | 24 | ||
25 | /* | ||
26 | * Adjust TAP register base such that omap3_check_revision accesses the correct | ||
27 | * TI81XX register for checking device ID (it adds 0x204 to tap base while | ||
28 | * TI81XX DEVICE ID register is at offset 0x600 from control base). | ||
29 | */ | ||
30 | #define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ | ||
31 | TI81XX_CONTROL_DEVICE_ID - 0x204) | ||
32 | |||
33 | |||
25 | #define TI81XX_ARM_INTC_BASE 0x48200000 | 34 | #define TI81XX_ARM_INTC_BASE 0x48200000 |
26 | 35 | ||
27 | #endif /* __ASM_ARCH_TI81XX_H */ | 36 | #endif /* __ASM_ARCH_TI81XX_H */ |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index c5bc2cb4d8d3..7016637b531c 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -37,6 +37,10 @@ | |||
37 | #include <linux/clockchips.h> | 37 | #include <linux/clockchips.h> |
38 | #include <linux/slab.h> | 38 | #include <linux/slab.h> |
39 | #include <linux/of.h> | 39 | #include <linux/of.h> |
40 | #include <linux/of_address.h> | ||
41 | #include <linux/of_irq.h> | ||
42 | #include <linux/platform_device.h> | ||
43 | #include <linux/platform_data/dmtimer-omap.h> | ||
40 | 44 | ||
41 | #include <asm/mach/time.h> | 45 | #include <asm/mach/time.h> |
42 | #include <asm/smp_twd.h> | 46 | #include <asm/smp_twd.h> |
@@ -62,18 +66,6 @@ | |||
62 | #define OMAP3_32K_SOURCE "omap_32k_fck" | 66 | #define OMAP3_32K_SOURCE "omap_32k_fck" |
63 | #define OMAP4_32K_SOURCE "sys_32k_ck" | 67 | #define OMAP4_32K_SOURCE "sys_32k_ck" |
64 | 68 | ||
65 | #ifdef CONFIG_OMAP_32K_TIMER | ||
66 | #define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE | ||
67 | #define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE | ||
68 | #define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE | ||
69 | #define OMAP3_SECURE_TIMER 12 | ||
70 | #else | ||
71 | #define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE | ||
72 | #define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE | ||
73 | #define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE | ||
74 | #define OMAP3_SECURE_TIMER 1 | ||
75 | #endif | ||
76 | |||
77 | #define REALTIME_COUNTER_BASE 0x48243200 | 69 | #define REALTIME_COUNTER_BASE 0x48243200 |
78 | #define INCREMENTER_NUMERATOR_OFFSET 0x10 | 70 | #define INCREMENTER_NUMERATOR_OFFSET 0x10 |
79 | #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 | 71 | #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 |
@@ -104,7 +96,7 @@ static int omap2_gp_timer_set_next_event(unsigned long cycles, | |||
104 | struct clock_event_device *evt) | 96 | struct clock_event_device *evt) |
105 | { | 97 | { |
106 | __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, | 98 | __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, |
107 | 0xffffffff - cycles, 1); | 99 | 0xffffffff - cycles, OMAP_TIMER_POSTED); |
108 | 100 | ||
109 | return 0; | 101 | return 0; |
110 | } | 102 | } |
@@ -114,7 +106,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | |||
114 | { | 106 | { |
115 | u32 period; | 107 | u32 period; |
116 | 108 | ||
117 | __omap_dm_timer_stop(&clkev, 1, clkev.rate); | 109 | __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate); |
118 | 110 | ||
119 | switch (mode) { | 111 | switch (mode) { |
120 | case CLOCK_EVT_MODE_PERIODIC: | 112 | case CLOCK_EVT_MODE_PERIODIC: |
@@ -122,10 +114,10 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | |||
122 | period -= 1; | 114 | period -= 1; |
123 | /* Looks like we need to first set the load value separately */ | 115 | /* Looks like we need to first set the load value separately */ |
124 | __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, | 116 | __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, |
125 | 0xffffffff - period, 1); | 117 | 0xffffffff - period, OMAP_TIMER_POSTED); |
126 | __omap_dm_timer_load_start(&clkev, | 118 | __omap_dm_timer_load_start(&clkev, |
127 | OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, | 119 | OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, |
128 | 0xffffffff - period, 1); | 120 | 0xffffffff - period, OMAP_TIMER_POSTED); |
129 | break; | 121 | break; |
130 | case CLOCK_EVT_MODE_ONESHOT: | 122 | case CLOCK_EVT_MODE_ONESHOT: |
131 | break; | 123 | break; |
@@ -145,36 +137,144 @@ static struct clock_event_device clockevent_gpt = { | |||
145 | .set_mode = omap2_gp_timer_set_mode, | 137 | .set_mode = omap2_gp_timer_set_mode, |
146 | }; | 138 | }; |
147 | 139 | ||
140 | static struct property device_disabled = { | ||
141 | .name = "status", | ||
142 | .length = sizeof("disabled"), | ||
143 | .value = "disabled", | ||
144 | }; | ||
145 | |||
146 | static struct of_device_id omap_timer_match[] __initdata = { | ||
147 | { .compatible = "ti,omap2-timer", }, | ||
148 | { } | ||
149 | }; | ||
150 | |||
151 | /** | ||
152 | * omap_get_timer_dt - get a timer using device-tree | ||
153 | * @match - device-tree match structure for matching a device type | ||
154 | * @property - optional timer property to match | ||
155 | * | ||
156 | * Helper function to get a timer during early boot using device-tree for use | ||
157 | * as kernel system timer. Optionally, the property argument can be used to | ||
158 | * select a timer with a specific property. Once a timer is found then mark | ||
159 | * the timer node in device-tree as disabled, to prevent the kernel from | ||
160 | * registering this timer as a platform device and so no one else can use it. | ||
161 | */ | ||
162 | static struct device_node * __init omap_get_timer_dt(struct of_device_id *match, | ||
163 | const char *property) | ||
164 | { | ||
165 | struct device_node *np; | ||
166 | |||
167 | for_each_matching_node(np, match) { | ||
168 | if (!of_device_is_available(np)) { | ||
169 | of_node_put(np); | ||
170 | continue; | ||
171 | } | ||
172 | |||
173 | if (property && !of_get_property(np, property, NULL)) { | ||
174 | of_node_put(np); | ||
175 | continue; | ||
176 | } | ||
177 | |||
178 | prom_add_property(np, &device_disabled); | ||
179 | return np; | ||
180 | } | ||
181 | |||
182 | return NULL; | ||
183 | } | ||
184 | |||
185 | /** | ||
186 | * omap_dmtimer_init - initialisation function when device tree is used | ||
187 | * | ||
188 | * For secure OMAP3 devices, timers with device type "timer-secure" cannot | ||
189 | * be used by the kernel as they are reserved. Therefore, to prevent the | ||
190 | * kernel registering these devices remove them dynamically from the device | ||
191 | * tree on boot. | ||
192 | */ | ||
193 | void __init omap_dmtimer_init(void) | ||
194 | { | ||
195 | struct device_node *np; | ||
196 | |||
197 | if (!cpu_is_omap34xx()) | ||
198 | return; | ||
199 | |||
200 | /* If we are a secure device, remove any secure timer nodes */ | ||
201 | if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { | ||
202 | np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure"); | ||
203 | if (np) | ||
204 | of_node_put(np); | ||
205 | } | ||
206 | } | ||
207 | |||
208 | /** | ||
209 | * omap_dm_timer_get_errata - get errata flags for a timer | ||
210 | * | ||
211 | * Get the timer errata flags that are specific to the OMAP device being used. | ||
212 | */ | ||
213 | u32 __init omap_dm_timer_get_errata(void) | ||
214 | { | ||
215 | if (cpu_is_omap24xx()) | ||
216 | return 0; | ||
217 | |||
218 | return OMAP_TIMER_ERRATA_I103_I767; | ||
219 | } | ||
220 | |||
148 | static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | 221 | static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, |
149 | int gptimer_id, | 222 | int gptimer_id, |
150 | const char *fck_source) | 223 | const char *fck_source, |
224 | const char *property, | ||
225 | int posted) | ||
151 | { | 226 | { |
152 | char name[10]; /* 10 = sizeof("gptXX_Xck0") */ | 227 | char name[10]; /* 10 = sizeof("gptXX_Xck0") */ |
228 | const char *oh_name; | ||
229 | struct device_node *np; | ||
153 | struct omap_hwmod *oh; | 230 | struct omap_hwmod *oh; |
154 | struct resource irq_rsrc, mem_rsrc; | 231 | struct resource irq, mem; |
155 | size_t size; | 232 | int r = 0; |
156 | int res = 0; | 233 | |
157 | int r; | 234 | if (of_have_populated_dt()) { |
158 | 235 | np = omap_get_timer_dt(omap_timer_match, NULL); | |
159 | sprintf(name, "timer%d", gptimer_id); | 236 | if (!np) |
160 | omap_hwmod_setup_one(name); | 237 | return -ENODEV; |
161 | oh = omap_hwmod_lookup(name); | 238 | |
239 | of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); | ||
240 | if (!oh_name) | ||
241 | return -ENODEV; | ||
242 | |||
243 | timer->irq = irq_of_parse_and_map(np, 0); | ||
244 | if (!timer->irq) | ||
245 | return -ENXIO; | ||
246 | |||
247 | timer->io_base = of_iomap(np, 0); | ||
248 | |||
249 | of_node_put(np); | ||
250 | } else { | ||
251 | if (omap_dm_timer_reserve_systimer(gptimer_id)) | ||
252 | return -ENODEV; | ||
253 | |||
254 | sprintf(name, "timer%d", gptimer_id); | ||
255 | oh_name = name; | ||
256 | } | ||
257 | |||
258 | oh = omap_hwmod_lookup(oh_name); | ||
162 | if (!oh) | 259 | if (!oh) |
163 | return -ENODEV; | 260 | return -ENODEV; |
164 | 261 | ||
165 | r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc); | 262 | if (!of_have_populated_dt()) { |
166 | if (r) | 263 | r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, |
167 | return -ENXIO; | 264 | &irq); |
168 | timer->irq = irq_rsrc.start; | 265 | if (r) |
266 | return -ENXIO; | ||
267 | timer->irq = irq.start; | ||
169 | 268 | ||
170 | r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc); | 269 | r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, |
171 | if (r) | 270 | &mem); |
172 | return -ENXIO; | 271 | if (r) |
173 | timer->phys_base = mem_rsrc.start; | 272 | return -ENXIO; |
174 | size = mem_rsrc.end - mem_rsrc.start; | 273 | |
274 | /* Static mapping, never released */ | ||
275 | timer->io_base = ioremap(mem.start, mem.end - mem.start); | ||
276 | } | ||
175 | 277 | ||
176 | /* Static mapping, never released */ | ||
177 | timer->io_base = ioremap(timer->phys_base, size); | ||
178 | if (!timer->io_base) | 278 | if (!timer->io_base) |
179 | return -ENXIO; | 279 | return -ENXIO; |
180 | 280 | ||
@@ -183,42 +283,56 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | |||
183 | if (IS_ERR(timer->fclk)) | 283 | if (IS_ERR(timer->fclk)) |
184 | return -ENODEV; | 284 | return -ENODEV; |
185 | 285 | ||
186 | omap_hwmod_enable(oh); | 286 | /* FIXME: Need to remove hard-coded test on timer ID */ |
187 | |||
188 | if (omap_dm_timer_reserve_systimer(gptimer_id)) | ||
189 | return -ENODEV; | ||
190 | |||
191 | if (gptimer_id != 12) { | 287 | if (gptimer_id != 12) { |
192 | struct clk *src; | 288 | struct clk *src; |
193 | 289 | ||
194 | src = clk_get(NULL, fck_source); | 290 | src = clk_get(NULL, fck_source); |
195 | if (IS_ERR(src)) { | 291 | if (IS_ERR(src)) { |
196 | res = -EINVAL; | 292 | r = -EINVAL; |
197 | } else { | 293 | } else { |
198 | res = __omap_dm_timer_set_source(timer->fclk, src); | 294 | r = clk_set_parent(timer->fclk, src); |
199 | if (IS_ERR_VALUE(res)) | 295 | if (IS_ERR_VALUE(r)) |
200 | pr_warning("%s: timer%i cannot set source\n", | 296 | pr_warn("%s: %s cannot set source\n", |
201 | __func__, gptimer_id); | 297 | __func__, oh->name); |
202 | clk_put(src); | 298 | clk_put(src); |
203 | } | 299 | } |
204 | } | 300 | } |
301 | |||
302 | omap_hwmod_setup_one(oh_name); | ||
303 | omap_hwmod_enable(oh); | ||
205 | __omap_dm_timer_init_regs(timer); | 304 | __omap_dm_timer_init_regs(timer); |
206 | __omap_dm_timer_reset(timer, 1, 1); | ||
207 | timer->posted = 1; | ||
208 | 305 | ||
209 | timer->rate = clk_get_rate(timer->fclk); | 306 | if (posted) |
307 | __omap_dm_timer_enable_posted(timer); | ||
308 | |||
309 | /* Check that the intended posted configuration matches the actual */ | ||
310 | if (posted != timer->posted) | ||
311 | return -EINVAL; | ||
210 | 312 | ||
313 | timer->rate = clk_get_rate(timer->fclk); | ||
211 | timer->reserved = 1; | 314 | timer->reserved = 1; |
212 | 315 | ||
213 | return res; | 316 | return r; |
214 | } | 317 | } |
215 | 318 | ||
216 | static void __init omap2_gp_clockevent_init(int gptimer_id, | 319 | static void __init omap2_gp_clockevent_init(int gptimer_id, |
217 | const char *fck_source) | 320 | const char *fck_source, |
321 | const char *property) | ||
218 | { | 322 | { |
219 | int res; | 323 | int res; |
220 | 324 | ||
221 | res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | 325 | clkev.errata = omap_dm_timer_get_errata(); |
326 | |||
327 | /* | ||
328 | * For clock-event timers we never read the timer counter and | ||
329 | * so we are not impacted by errata i103 and i767. Therefore, | ||
330 | * we can safely ignore this errata for clock-event timers. | ||
331 | */ | ||
332 | __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767); | ||
333 | |||
334 | res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property, | ||
335 | OMAP_TIMER_POSTED); | ||
222 | BUG_ON(res); | 336 | BUG_ON(res); |
223 | 337 | ||
224 | omap2_gp_timer_irq.dev_id = &clkev; | 338 | omap2_gp_timer_irq.dev_id = &clkev; |
@@ -251,7 +365,8 @@ static bool use_gptimer_clksrc; | |||
251 | */ | 365 | */ |
252 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 366 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
253 | { | 367 | { |
254 | return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); | 368 | return (cycle_t)__omap_dm_timer_read_counter(&clksrc, |
369 | OMAP_TIMER_NONPOSTED); | ||
255 | } | 370 | } |
256 | 371 | ||
257 | static struct clocksource clocksource_gpt = { | 372 | static struct clocksource clocksource_gpt = { |
@@ -265,21 +380,41 @@ static struct clocksource clocksource_gpt = { | |||
265 | static u32 notrace dmtimer_read_sched_clock(void) | 380 | static u32 notrace dmtimer_read_sched_clock(void) |
266 | { | 381 | { |
267 | if (clksrc.reserved) | 382 | if (clksrc.reserved) |
268 | return __omap_dm_timer_read_counter(&clksrc, 1); | 383 | return __omap_dm_timer_read_counter(&clksrc, |
384 | OMAP_TIMER_NONPOSTED); | ||
269 | 385 | ||
270 | return 0; | 386 | return 0; |
271 | } | 387 | } |
272 | 388 | ||
273 | #ifdef CONFIG_OMAP_32K_TIMER | 389 | static struct of_device_id omap_counter_match[] __initdata = { |
390 | { .compatible = "ti,omap-counter32k", }, | ||
391 | { } | ||
392 | }; | ||
393 | |||
274 | /* Setup free-running counter for clocksource */ | 394 | /* Setup free-running counter for clocksource */ |
275 | static int __init omap2_sync32k_clocksource_init(void) | 395 | static int __init omap2_sync32k_clocksource_init(void) |
276 | { | 396 | { |
277 | int ret; | 397 | int ret; |
398 | struct device_node *np = NULL; | ||
278 | struct omap_hwmod *oh; | 399 | struct omap_hwmod *oh; |
279 | void __iomem *vbase; | 400 | void __iomem *vbase; |
280 | const char *oh_name = "counter_32k"; | 401 | const char *oh_name = "counter_32k"; |
281 | 402 | ||
282 | /* | 403 | /* |
404 | * If device-tree is present, then search the DT blob | ||
405 | * to see if the 32kHz counter is supported. | ||
406 | */ | ||
407 | if (of_have_populated_dt()) { | ||
408 | np = omap_get_timer_dt(omap_counter_match, NULL); | ||
409 | if (!np) | ||
410 | return -ENODEV; | ||
411 | |||
412 | of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); | ||
413 | if (!oh_name) | ||
414 | return -ENODEV; | ||
415 | } | ||
416 | |||
417 | /* | ||
283 | * First check hwmod data is available for sync32k counter | 418 | * First check hwmod data is available for sync32k counter |
284 | */ | 419 | */ |
285 | oh = omap_hwmod_lookup(oh_name); | 420 | oh = omap_hwmod_lookup(oh_name); |
@@ -288,7 +423,13 @@ static int __init omap2_sync32k_clocksource_init(void) | |||
288 | 423 | ||
289 | omap_hwmod_setup_one(oh_name); | 424 | omap_hwmod_setup_one(oh_name); |
290 | 425 | ||
291 | vbase = omap_hwmod_get_mpu_rt_va(oh); | 426 | if (np) { |
427 | vbase = of_iomap(np, 0); | ||
428 | of_node_put(np); | ||
429 | } else { | ||
430 | vbase = omap_hwmod_get_mpu_rt_va(oh); | ||
431 | } | ||
432 | |||
292 | if (!vbase) { | 433 | if (!vbase) { |
293 | pr_warn("%s: failed to get counter_32k resource\n", __func__); | 434 | pr_warn("%s: failed to get counter_32k resource\n", __func__); |
294 | return -ENXIO; | 435 | return -ENXIO; |
@@ -310,23 +451,21 @@ static int __init omap2_sync32k_clocksource_init(void) | |||
310 | 451 | ||
311 | return ret; | 452 | return ret; |
312 | } | 453 | } |
313 | #else | ||
314 | static inline int omap2_sync32k_clocksource_init(void) | ||
315 | { | ||
316 | return -ENODEV; | ||
317 | } | ||
318 | #endif | ||
319 | 454 | ||
320 | static void __init omap2_gptimer_clocksource_init(int gptimer_id, | 455 | static void __init omap2_gptimer_clocksource_init(int gptimer_id, |
321 | const char *fck_source) | 456 | const char *fck_source) |
322 | { | 457 | { |
323 | int res; | 458 | int res; |
324 | 459 | ||
325 | res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); | 460 | clksrc.errata = omap_dm_timer_get_errata(); |
461 | |||
462 | res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL, | ||
463 | OMAP_TIMER_NONPOSTED); | ||
326 | BUG_ON(res); | 464 | BUG_ON(res); |
327 | 465 | ||
328 | __omap_dm_timer_load_start(&clksrc, | 466 | __omap_dm_timer_load_start(&clksrc, |
329 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); | 467 | OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, |
468 | OMAP_TIMER_NONPOSTED); | ||
330 | setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate); | 469 | setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate); |
331 | 470 | ||
332 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | 471 | if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) |
@@ -337,25 +476,6 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id, | |||
337 | gptimer_id, clksrc.rate); | 476 | gptimer_id, clksrc.rate); |
338 | } | 477 | } |
339 | 478 | ||
340 | static void __init omap2_clocksource_init(int gptimer_id, | ||
341 | const char *fck_source) | ||
342 | { | ||
343 | /* | ||
344 | * First give preference to kernel parameter configuration | ||
345 | * by user (clocksource="gp_timer"). | ||
346 | * | ||
347 | * In case of missing kernel parameter for clocksource, | ||
348 | * first check for availability for 32k-sync timer, in case | ||
349 | * of failure in finding 32k_counter module or registering | ||
350 | * it as clocksource, execution will fallback to gp-timer. | ||
351 | */ | ||
352 | if (use_gptimer_clksrc == true) | ||
353 | omap2_gptimer_clocksource_init(gptimer_id, fck_source); | ||
354 | else if (omap2_sync32k_clocksource_init()) | ||
355 | /* Fall back to gp-timer code */ | ||
356 | omap2_gptimer_clocksource_init(gptimer_id, fck_source); | ||
357 | } | ||
358 | |||
359 | #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER | 479 | #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER |
360 | /* | 480 | /* |
361 | * The realtime counter also called master counter, is a free-running | 481 | * The realtime counter also called master counter, is a free-running |
@@ -434,48 +554,65 @@ static inline void __init realtime_counter_init(void) | |||
434 | {} | 554 | {} |
435 | #endif | 555 | #endif |
436 | 556 | ||
437 | #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ | 557 | #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ |
558 | clksrc_nr, clksrc_src) \ | ||
559 | static void __init omap##name##_gptimer_timer_init(void) \ | ||
560 | { \ | ||
561 | omap_dmtimer_init(); \ | ||
562 | omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ | ||
563 | omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \ | ||
564 | } | ||
565 | |||
566 | #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ | ||
438 | clksrc_nr, clksrc_src) \ | 567 | clksrc_nr, clksrc_src) \ |
439 | static void __init omap##name##_timer_init(void) \ | 568 | static void __init omap##name##_sync32k_timer_init(void) \ |
440 | { \ | 569 | { \ |
441 | omap2_gp_clockevent_init((clkev_nr), clkev_src); \ | 570 | omap_dmtimer_init(); \ |
442 | omap2_clocksource_init((clksrc_nr), clksrc_src); \ | 571 | omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ |
572 | /* Enable the use of clocksource="gp_timer" kernel parameter */ \ | ||
573 | if (use_gptimer_clksrc) \ | ||
574 | omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);\ | ||
575 | else \ | ||
576 | omap2_sync32k_clocksource_init(); \ | ||
443 | } | 577 | } |
444 | 578 | ||
445 | #define OMAP_SYS_TIMER(name) \ | 579 | #define OMAP_SYS_TIMER(name, clksrc) \ |
446 | struct sys_timer omap##name##_timer = { \ | 580 | struct sys_timer omap##name##_timer = { \ |
447 | .init = omap##name##_timer_init, \ | 581 | .init = omap##name##_##clksrc##_timer_init, \ |
448 | }; | 582 | }; |
449 | 583 | ||
450 | #ifdef CONFIG_ARCH_OMAP2 | 584 | #ifdef CONFIG_ARCH_OMAP2 |
451 | OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) | 585 | OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon", |
452 | OMAP_SYS_TIMER(2) | 586 | 2, OMAP2_MPU_SOURCE); |
453 | #endif | 587 | OMAP_SYS_TIMER(2, sync32k); |
588 | #endif /* CONFIG_ARCH_OMAP2 */ | ||
454 | 589 | ||
455 | #ifdef CONFIG_ARCH_OMAP3 | 590 | #ifdef CONFIG_ARCH_OMAP3 |
456 | OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) | 591 | OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon", |
457 | OMAP_SYS_TIMER(3) | 592 | 2, OMAP3_MPU_SOURCE); |
458 | OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, | 593 | OMAP_SYS_TIMER(3, sync32k); |
459 | 2, OMAP3_MPU_SOURCE) | 594 | OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure", |
460 | OMAP_SYS_TIMER(3_secure) | 595 | 2, OMAP3_MPU_SOURCE); |
461 | #endif | 596 | OMAP_SYS_TIMER(3_secure, sync32k); |
597 | OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon", | ||
598 | 2, OMAP3_MPU_SOURCE); | ||
599 | OMAP_SYS_TIMER(3_gp, gptimer); | ||
600 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
462 | 601 | ||
463 | #ifdef CONFIG_SOC_AM33XX | 602 | #ifdef CONFIG_SOC_AM33XX |
464 | OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE) | 603 | OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon", |
465 | OMAP_SYS_TIMER(3_am33xx) | 604 | 2, OMAP4_MPU_SOURCE); |
466 | #endif | 605 | OMAP_SYS_TIMER(3_am33xx, gptimer); |
606 | #endif /* CONFIG_SOC_AM33XX */ | ||
467 | 607 | ||
468 | #ifdef CONFIG_ARCH_OMAP4 | 608 | #ifdef CONFIG_ARCH_OMAP4 |
609 | OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon", | ||
610 | 2, OMAP4_MPU_SOURCE); | ||
469 | #ifdef CONFIG_LOCAL_TIMERS | 611 | #ifdef CONFIG_LOCAL_TIMERS |
470 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, | 612 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29); |
471 | OMAP44XX_LOCAL_TWD_BASE, 29); | 613 | static void __init omap4_local_timer_init(void) |
472 | #endif | ||
473 | |||
474 | static void __init omap4_timer_init(void) | ||
475 | { | 614 | { |
476 | omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | 615 | omap4_sync32k_timer_init(); |
477 | omap2_clocksource_init(2, OMAP4_MPU_SOURCE); | ||
478 | #ifdef CONFIG_LOCAL_TIMERS | ||
479 | /* Local timers are not supprted on OMAP4430 ES1.0 */ | 616 | /* Local timers are not supprted on OMAP4430 ES1.0 */ |
480 | if (omap_rev() != OMAP4430_REV_ES1_0) { | 617 | if (omap_rev() != OMAP4430_REV_ES1_0) { |
481 | int err; | 618 | int err; |
@@ -489,26 +626,32 @@ static void __init omap4_timer_init(void) | |||
489 | if (err) | 626 | if (err) |
490 | pr_err("twd_local_timer_register failed %d\n", err); | 627 | pr_err("twd_local_timer_register failed %d\n", err); |
491 | } | 628 | } |
492 | #endif | ||
493 | } | 629 | } |
494 | OMAP_SYS_TIMER(4) | 630 | #else /* CONFIG_LOCAL_TIMERS */ |
495 | #endif | 631 | static void __init omap4_local_timer_init(void) |
632 | { | ||
633 | omap4_sync32k_timer_init(); | ||
634 | } | ||
635 | #endif /* CONFIG_LOCAL_TIMERS */ | ||
636 | OMAP_SYS_TIMER(4, local); | ||
637 | #endif /* CONFIG_ARCH_OMAP4 */ | ||
496 | 638 | ||
497 | #ifdef CONFIG_SOC_OMAP5 | 639 | #ifdef CONFIG_SOC_OMAP5 |
498 | static void __init omap5_timer_init(void) | 640 | OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon", |
641 | 2, OMAP4_MPU_SOURCE); | ||
642 | static void __init omap5_realtime_timer_init(void) | ||
499 | { | 643 | { |
500 | int err; | 644 | int err; |
501 | 645 | ||
502 | omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | 646 | omap5_sync32k_timer_init(); |
503 | omap2_clocksource_init(2, OMAP4_MPU_SOURCE); | ||
504 | realtime_counter_init(); | 647 | realtime_counter_init(); |
505 | 648 | ||
506 | err = arch_timer_of_register(); | 649 | err = arch_timer_of_register(); |
507 | if (err) | 650 | if (err) |
508 | pr_err("%s: arch_timer_register failed %d\n", __func__, err); | 651 | pr_err("%s: arch_timer_register failed %d\n", __func__, err); |
509 | } | 652 | } |
510 | OMAP_SYS_TIMER(5) | 653 | OMAP_SYS_TIMER(5, realtime); |
511 | #endif | 654 | #endif /* CONFIG_SOC_OMAP5 */ |
512 | 655 | ||
513 | /** | 656 | /** |
514 | * omap_timer_init - build and register timer device with an | 657 | * omap_timer_init - build and register timer device with an |
@@ -560,6 +703,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) | |||
560 | if (timer_dev_attr) | 703 | if (timer_dev_attr) |
561 | pdata->timer_capability = timer_dev_attr->timer_capability; | 704 | pdata->timer_capability = timer_dev_attr->timer_capability; |
562 | 705 | ||
706 | pdata->timer_errata = omap_dm_timer_get_errata(); | ||
563 | pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; | 707 | pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; |
564 | 708 | ||
565 | pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), | 709 | pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), |
@@ -586,6 +730,10 @@ static int __init omap2_dm_timer_init(void) | |||
586 | { | 730 | { |
587 | int ret; | 731 | int ret; |
588 | 732 | ||
733 | /* If dtb is there, the devices will be created dynamically */ | ||
734 | if (of_have_populated_dt()) | ||
735 | return -ENODEV; | ||
736 | |||
589 | ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); | 737 | ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); |
590 | if (unlikely(ret)) { | 738 | if (unlikely(ret)) { |
591 | pr_err("%s: device registration failed.\n", __func__); | 739 | pr_err("%s: device registration failed.\n", __func__); |
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index f6b6c37ac3f4..7c2b4ed38f02 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c | |||
@@ -1,6 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP2+ MPU WD_TIMER-specific code | 2 | * OMAP2+ MPU WD_TIMER-specific code |
3 | * | 3 | * |
4 | * Copyright (C) 2012 Texas Instruments, Inc. | ||
5 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
6 | * the Free Software Foundation; either version 2 of the License, or | 8 | * the Free Software Foundation; either version 2 of the License, or |
@@ -11,10 +13,14 @@ | |||
11 | #include <linux/io.h> | 13 | #include <linux/io.h> |
12 | #include <linux/err.h> | 14 | #include <linux/err.h> |
13 | 15 | ||
14 | #include "omap_hwmod.h" | 16 | #include <linux/platform_data/omap-wd-timer.h> |
15 | 17 | ||
18 | #include "omap_hwmod.h" | ||
19 | #include "omap_device.h" | ||
16 | #include "wd_timer.h" | 20 | #include "wd_timer.h" |
17 | #include "common.h" | 21 | #include "common.h" |
22 | #include "prm.h" | ||
23 | #include "soc.h" | ||
18 | 24 | ||
19 | /* | 25 | /* |
20 | * In order to avoid any assumptions from bootloader regarding WDT | 26 | * In order to avoid any assumptions from bootloader regarding WDT |
@@ -26,9 +32,6 @@ | |||
26 | #define OMAP_WDT_WPS 0x34 | 32 | #define OMAP_WDT_WPS 0x34 |
27 | #define OMAP_WDT_SPR 0x48 | 33 | #define OMAP_WDT_SPR 0x48 |
28 | 34 | ||
29 | /* Maximum microseconds to wait for OMAP module to softreset */ | ||
30 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
31 | |||
32 | int omap2_wd_timer_disable(struct omap_hwmod *oh) | 35 | int omap2_wd_timer_disable(struct omap_hwmod *oh) |
33 | { | 36 | { |
34 | void __iomem *base; | 37 | void __iomem *base; |
@@ -99,3 +102,32 @@ int omap2_wd_timer_reset(struct omap_hwmod *oh) | |||
99 | return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : | 102 | return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : |
100 | omap2_wd_timer_disable(oh); | 103 | omap2_wd_timer_disable(oh); |
101 | } | 104 | } |
105 | |||
106 | static int __init omap_init_wdt(void) | ||
107 | { | ||
108 | int id = -1; | ||
109 | struct platform_device *pdev; | ||
110 | struct omap_hwmod *oh; | ||
111 | char *oh_name = "wd_timer2"; | ||
112 | char *dev_name = "omap_wdt"; | ||
113 | struct omap_wd_timer_platform_data pdata; | ||
114 | |||
115 | if (!cpu_class_is_omap2() || of_have_populated_dt()) | ||
116 | return 0; | ||
117 | |||
118 | oh = omap_hwmod_lookup(oh_name); | ||
119 | if (!oh) { | ||
120 | pr_err("Could not look up wd_timer%d hwmod\n", id); | ||
121 | return -EINVAL; | ||
122 | } | ||
123 | |||
124 | pdata.read_reset_sources = prm_read_reset_sources; | ||
125 | |||
126 | pdev = omap_device_build(dev_name, id, oh, &pdata, | ||
127 | sizeof(struct omap_wd_timer_platform_data), | ||
128 | NULL, 0, 0); | ||
129 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", | ||
130 | dev_name, oh->name); | ||
131 | return 0; | ||
132 | } | ||
133 | subsys_initcall(omap_init_wdt); | ||
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 11aa7399dc09..86eec4159cbc 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -2,27 +2,6 @@ if ARCH_PXA | |||
2 | 2 | ||
3 | menu "Intel PXA2xx/PXA3xx Implementations" | 3 | menu "Intel PXA2xx/PXA3xx Implementations" |
4 | 4 | ||
5 | config ARCH_PXA_V7 | ||
6 | bool "ARMv7 (PXA95x) based systems" | ||
7 | |||
8 | if ARCH_PXA_V7 | ||
9 | comment "Marvell Dev Platforms (sorted by hardware release time)" | ||
10 | config MACH_TAVOREVB3 | ||
11 | bool "PXA95x Development Platform (aka TavorEVB III)" | ||
12 | select CPU_PXA955 | ||
13 | |||
14 | config MACH_SAARB | ||
15 | bool "PXA955 Handheld Platform (aka SAARB)" | ||
16 | select CPU_PXA955 | ||
17 | endif | ||
18 | |||
19 | config PXA_V7_MACH_AUTO | ||
20 | def_bool y | ||
21 | depends on ARCH_PXA_V7 | ||
22 | depends on !MACH_SAARB | ||
23 | select MACH_TAVOREVB3 | ||
24 | |||
25 | if !ARCH_PXA_V7 | ||
26 | comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" | 5 | comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" |
27 | 6 | ||
28 | config MACH_PXA3XX_DT | 7 | config MACH_PXA3XX_DT |
@@ -630,7 +609,6 @@ config MACH_ZIPIT2 | |||
630 | bool "Zipit Z2 Handheld" | 609 | bool "Zipit Z2 Handheld" |
631 | select HAVE_PWM | 610 | select HAVE_PWM |
632 | select PXA27x | 611 | select PXA27x |
633 | endif | ||
634 | endmenu | 612 | endmenu |
635 | 613 | ||
636 | config PXA25x | 614 | config PXA25x |
@@ -688,18 +666,6 @@ config CPU_PXA935 | |||
688 | help | 666 | help |
689 | PXA935 (codename Tavor-P65) | 667 | PXA935 (codename Tavor-P65) |
690 | 668 | ||
691 | config PXA95x | ||
692 | bool | ||
693 | select CPU_PJ4 | ||
694 | help | ||
695 | Select code specific to PXA95x variants | ||
696 | |||
697 | config CPU_PXA955 | ||
698 | bool | ||
699 | select PXA95x | ||
700 | help | ||
701 | PXA950 (codename MG1) | ||
702 | |||
703 | config PXA_SHARP_C7xx | 669 | config PXA_SHARP_C7xx |
704 | bool | 670 | bool |
705 | select SHARPSL_PM | 671 | select SHARPSL_PM |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index ee88d6eae648..12c500558387 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
@@ -19,7 +19,6 @@ endif | |||
19 | obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o | 19 | obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o |
20 | obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o | 20 | obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o |
21 | obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o | 21 | obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o |
22 | obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o | ||
23 | obj-$(CONFIG_CPU_PXA300) += pxa300.o | 22 | obj-$(CONFIG_CPU_PXA300) += pxa300.o |
24 | obj-$(CONFIG_CPU_PXA320) += pxa320.o | 23 | obj-$(CONFIG_CPU_PXA320) += pxa320.o |
25 | obj-$(CONFIG_CPU_PXA930) += pxa930.o | 24 | obj-$(CONFIG_CPU_PXA930) += pxa930.o |
@@ -36,9 +35,7 @@ obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o | |||
36 | obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o | 35 | obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o |
37 | obj-$(CONFIG_MACH_LITTLETON) += littleton.o | 36 | obj-$(CONFIG_MACH_LITTLETON) += littleton.o |
38 | obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o | 37 | obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o |
39 | obj-$(CONFIG_MACH_TAVOREVB3) += tavorevb3.o | ||
40 | obj-$(CONFIG_MACH_SAAR) += saar.o | 38 | obj-$(CONFIG_MACH_SAAR) += saar.o |
41 | obj-$(CONFIG_MACH_SAARB) += saarb.o | ||
42 | 39 | ||
43 | # 3rd Party Dev Platforms | 40 | # 3rd Party Dev Platforms |
44 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o | 41 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o |
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 3a258b1bf1aa..1f65d32c8d5e 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h | |||
@@ -57,7 +57,7 @@ void clk_pxa2xx_cken_disable(struct clk *clk); | |||
57 | 57 | ||
58 | extern struct syscore_ops pxa2xx_clock_syscore_ops; | 58 | extern struct syscore_ops pxa2xx_clock_syscore_ops; |
59 | 59 | ||
60 | #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) | 60 | #if defined(CONFIG_PXA3xx) |
61 | #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \ | 61 | #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \ |
62 | struct clk clk_##_name = { \ | 62 | struct clk clk_##_name = { \ |
63 | .ops = &clk_pxa3xx_cken_ops, \ | 63 | .ops = &clk_pxa3xx_cken_ops, \ |
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index ddaa04de8e22..daa86d39ed9e 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
@@ -703,7 +703,7 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) | |||
703 | } | 703 | } |
704 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ | 704 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ |
705 | 705 | ||
706 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) | 706 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
707 | static struct resource pxa27x_resource_keypad[] = { | 707 | static struct resource pxa27x_resource_keypad[] = { |
708 | [0] = { | 708 | [0] = { |
709 | .start = 0x41500000, | 709 | .start = 0x41500000, |
@@ -872,7 +872,7 @@ struct platform_device pxa27x_device_pwm1 = { | |||
872 | .resource = pxa27x_resource_pwm1, | 872 | .resource = pxa27x_resource_pwm1, |
873 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), | 873 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), |
874 | }; | 874 | }; |
875 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/ | 875 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ |
876 | 876 | ||
877 | #ifdef CONFIG_PXA3xx | 877 | #ifdef CONFIG_PXA3xx |
878 | static struct resource pxa3xx_resources_mci2[] = { | 878 | static struct resource pxa3xx_resources_mci2[] = { |
@@ -981,7 +981,7 @@ struct platform_device pxa3xx_device_gcu = { | |||
981 | 981 | ||
982 | #endif /* CONFIG_PXA3xx */ | 982 | #endif /* CONFIG_PXA3xx */ |
983 | 983 | ||
984 | #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) | 984 | #if defined(CONFIG_PXA3xx) |
985 | static struct resource pxa3xx_resources_i2c_power[] = { | 985 | static struct resource pxa3xx_resources_i2c_power[] = { |
986 | { | 986 | { |
987 | .start = 0x40f500c0, | 987 | .start = 0x40f500c0, |
@@ -1082,7 +1082,7 @@ struct platform_device pxa3xx_device_ssp4 = { | |||
1082 | .resource = pxa3xx_resource_ssp4, | 1082 | .resource = pxa3xx_resource_ssp4, |
1083 | .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), | 1083 | .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), |
1084 | }; | 1084 | }; |
1085 | #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ | 1085 | #endif /* CONFIG_PXA3xx */ |
1086 | 1086 | ||
1087 | struct resource pxa_resource_gpio[] = { | 1087 | struct resource pxa_resource_gpio[] = { |
1088 | { | 1088 | { |
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 56d92e5cad85..ccb06e485520 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
@@ -194,17 +194,6 @@ | |||
194 | #define __cpu_is_pxa935(id) (0) | 194 | #define __cpu_is_pxa935(id) (0) |
195 | #endif | 195 | #endif |
196 | 196 | ||
197 | #ifdef CONFIG_CPU_PXA955 | ||
198 | #define __cpu_is_pxa955(id) \ | ||
199 | ({ \ | ||
200 | unsigned int _id = (id) >> 4 & 0xfff; \ | ||
201 | _id == 0x581 || _id == 0xc08 \ | ||
202 | || _id == 0xb76; \ | ||
203 | }) | ||
204 | #else | ||
205 | #define __cpu_is_pxa955(id) (0) | ||
206 | #endif | ||
207 | |||
208 | #define cpu_is_pxa210() \ | 197 | #define cpu_is_pxa210() \ |
209 | ({ \ | 198 | ({ \ |
210 | __cpu_is_pxa210(read_cpuid_id()); \ | 199 | __cpu_is_pxa210(read_cpuid_id()); \ |
@@ -255,10 +244,6 @@ | |||
255 | __cpu_is_pxa935(read_cpuid_id()); \ | 244 | __cpu_is_pxa935(read_cpuid_id()); \ |
256 | }) | 245 | }) |
257 | 246 | ||
258 | #define cpu_is_pxa955() \ | ||
259 | ({ \ | ||
260 | __cpu_is_pxa955(read_cpuid_id()); \ | ||
261 | }) | ||
262 | 247 | ||
263 | 248 | ||
264 | /* | 249 | /* |
@@ -297,15 +282,6 @@ | |||
297 | #define __cpu_is_pxa93x(id) (0) | 282 | #define __cpu_is_pxa93x(id) (0) |
298 | #endif | 283 | #endif |
299 | 284 | ||
300 | #ifdef CONFIG_PXA95x | ||
301 | #define __cpu_is_pxa95x(id) \ | ||
302 | ({ \ | ||
303 | __cpu_is_pxa955(id); \ | ||
304 | }) | ||
305 | #else | ||
306 | #define __cpu_is_pxa95x(id) (0) | ||
307 | #endif | ||
308 | |||
309 | #define cpu_is_pxa2xx() \ | 285 | #define cpu_is_pxa2xx() \ |
310 | ({ \ | 286 | ({ \ |
311 | __cpu_is_pxa2xx(read_cpuid_id()); \ | 287 | __cpu_is_pxa2xx(read_cpuid_id()); \ |
@@ -321,10 +297,6 @@ | |||
321 | __cpu_is_pxa93x(read_cpuid_id()); \ | 297 | __cpu_is_pxa93x(read_cpuid_id()); \ |
322 | }) | 298 | }) |
323 | 299 | ||
324 | #define cpu_is_pxa95x() \ | ||
325 | ({ \ | ||
326 | __cpu_is_pxa95x(read_cpuid_id()); \ | ||
327 | }) | ||
328 | 300 | ||
329 | /* | 301 | /* |
330 | * return current memory and LCD clock frequency in units of 10kHz | 302 | * return current memory and LCD clock frequency in units of 10kHz |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 8765782dd955..48c2fd851686 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -84,7 +84,6 @@ | |||
84 | #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ | 84 | #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ |
85 | #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ | 85 | #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ |
86 | #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ | 86 | #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ |
87 | #define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */ | ||
88 | #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ | 87 | #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ |
89 | 88 | ||
90 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) | 89 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) |
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h index cd3e57f42688..6dd7fa163e29 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h | |||
@@ -7,7 +7,6 @@ | |||
7 | 7 | ||
8 | extern void __init pxa3xx_map_io(void); | 8 | extern void __init pxa3xx_map_io(void); |
9 | extern void __init pxa3xx_init_irq(void); | 9 | extern void __init pxa3xx_init_irq(void); |
10 | extern void __init pxa95x_init_irq(void); | ||
11 | 10 | ||
12 | #define pxa3xx_handle_irq ichp_handle_irq | 11 | #define pxa3xx_handle_irq ichp_handle_irq |
13 | 12 | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h deleted file mode 100644 index cbb097c4cb1f..000000000000 --- a/arch/arm/mach-pxa/include/mach/pxa95x.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MACH_PXA95X_H | ||
2 | #define __MACH_PXA95X_H | ||
3 | |||
4 | #include <mach/pxa3xx.h> | ||
5 | #include <mach/mfp-pxa930.h> | ||
6 | |||
7 | #endif /* __MACH_PXA95X_H */ | ||
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c index 7dbe3ccf1993..e329ccefd364 100644 --- a/arch/arm/mach-pxa/pxa3xx-ulpi.c +++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c | |||
@@ -384,18 +384,7 @@ static struct platform_driver pxa3xx_u2d_ulpi_driver = { | |||
384 | .probe = pxa3xx_u2d_probe, | 384 | .probe = pxa3xx_u2d_probe, |
385 | .remove = pxa3xx_u2d_remove, | 385 | .remove = pxa3xx_u2d_remove, |
386 | }; | 386 | }; |
387 | 387 | module_platform_driver(pxa3xx_u2d_ulpi_driver); | |
388 | static int pxa3xx_u2d_ulpi_init(void) | ||
389 | { | ||
390 | return platform_driver_register(&pxa3xx_u2d_ulpi_driver); | ||
391 | } | ||
392 | module_init(pxa3xx_u2d_ulpi_init); | ||
393 | |||
394 | static void __exit pxa3xx_u2d_ulpi_exit(void) | ||
395 | { | ||
396 | platform_driver_unregister(&pxa3xx_u2d_ulpi_driver); | ||
397 | } | ||
398 | module_exit(pxa3xx_u2d_ulpi_exit); | ||
399 | 388 | ||
400 | MODULE_DESCRIPTION("PXA3xx U2D ULPI driver"); | 389 | MODULE_DESCRIPTION("PXA3xx U2D ULPI driver"); |
401 | MODULE_AUTHOR("Igor Grinberg"); | 390 | MODULE_AUTHOR("Igor Grinberg"); |
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c deleted file mode 100644 index 47601f80e6e7..000000000000 --- a/arch/arm/mach-pxa/pxa95x.c +++ /dev/null | |||
@@ -1,295 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/pxa95x.c | ||
3 | * | ||
4 | * code specific to PXA95x aka MGx | ||
5 | * | ||
6 | * Copyright (C) 2009-2010 Marvell International Ltd. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/pm.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/i2c/pxa-i2c.h> | ||
18 | #include <linux/irq.h> | ||
19 | #include <linux/io.h> | ||
20 | #include <linux/syscore_ops.h> | ||
21 | |||
22 | #include <mach/hardware.h> | ||
23 | #include <mach/pxa3xx-regs.h> | ||
24 | #include <mach/pxa930.h> | ||
25 | #include <mach/reset.h> | ||
26 | #include <mach/pm.h> | ||
27 | #include <mach/dma.h> | ||
28 | |||
29 | #include "generic.h" | ||
30 | #include "devices.h" | ||
31 | #include "clock.h" | ||
32 | |||
33 | static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = { | ||
34 | |||
35 | MFP_ADDR(GPIO0, 0x02e0), | ||
36 | MFP_ADDR(GPIO1, 0x02dc), | ||
37 | MFP_ADDR(GPIO2, 0x02e8), | ||
38 | MFP_ADDR(GPIO3, 0x02d8), | ||
39 | MFP_ADDR(GPIO4, 0x02e4), | ||
40 | MFP_ADDR(GPIO5, 0x02ec), | ||
41 | MFP_ADDR(GPIO6, 0x02f8), | ||
42 | MFP_ADDR(GPIO7, 0x02fc), | ||
43 | MFP_ADDR(GPIO8, 0x0300), | ||
44 | MFP_ADDR(GPIO9, 0x02d4), | ||
45 | MFP_ADDR(GPIO10, 0x02f4), | ||
46 | MFP_ADDR(GPIO11, 0x02f0), | ||
47 | MFP_ADDR(GPIO12, 0x0304), | ||
48 | MFP_ADDR(GPIO13, 0x0310), | ||
49 | MFP_ADDR(GPIO14, 0x0308), | ||
50 | MFP_ADDR(GPIO15, 0x030c), | ||
51 | MFP_ADDR(GPIO16, 0x04e8), | ||
52 | MFP_ADDR(GPIO17, 0x04f4), | ||
53 | MFP_ADDR(GPIO18, 0x04f8), | ||
54 | MFP_ADDR(GPIO19, 0x04fc), | ||
55 | MFP_ADDR(GPIO20, 0x0518), | ||
56 | MFP_ADDR(GPIO21, 0x051c), | ||
57 | MFP_ADDR(GPIO22, 0x04ec), | ||
58 | MFP_ADDR(GPIO23, 0x0500), | ||
59 | MFP_ADDR(GPIO24, 0x04f0), | ||
60 | MFP_ADDR(GPIO25, 0x0504), | ||
61 | MFP_ADDR(GPIO26, 0x0510), | ||
62 | MFP_ADDR(GPIO27, 0x0514), | ||
63 | MFP_ADDR(GPIO28, 0x0520), | ||
64 | MFP_ADDR(GPIO29, 0x0600), | ||
65 | MFP_ADDR(GPIO30, 0x0618), | ||
66 | MFP_ADDR(GPIO31, 0x0610), | ||
67 | MFP_ADDR(GPIO32, 0x060c), | ||
68 | MFP_ADDR(GPIO33, 0x061c), | ||
69 | MFP_ADDR(GPIO34, 0x0620), | ||
70 | MFP_ADDR(GPIO35, 0x0628), | ||
71 | MFP_ADDR(GPIO36, 0x062c), | ||
72 | MFP_ADDR(GPIO37, 0x0630), | ||
73 | MFP_ADDR(GPIO38, 0x0634), | ||
74 | MFP_ADDR(GPIO39, 0x0638), | ||
75 | MFP_ADDR(GPIO40, 0x063c), | ||
76 | MFP_ADDR(GPIO41, 0x0614), | ||
77 | MFP_ADDR(GPIO42, 0x0624), | ||
78 | MFP_ADDR(GPIO43, 0x0608), | ||
79 | MFP_ADDR(GPIO44, 0x0604), | ||
80 | MFP_ADDR(GPIO45, 0x050c), | ||
81 | MFP_ADDR(GPIO46, 0x0508), | ||
82 | MFP_ADDR(GPIO47, 0x02bc), | ||
83 | MFP_ADDR(GPIO48, 0x02b4), | ||
84 | MFP_ADDR(GPIO49, 0x02b8), | ||
85 | MFP_ADDR(GPIO50, 0x02c8), | ||
86 | MFP_ADDR(GPIO51, 0x02c0), | ||
87 | MFP_ADDR(GPIO52, 0x02c4), | ||
88 | MFP_ADDR(GPIO53, 0x02d0), | ||
89 | MFP_ADDR(GPIO54, 0x02cc), | ||
90 | MFP_ADDR(GPIO55, 0x029c), | ||
91 | MFP_ADDR(GPIO56, 0x02a0), | ||
92 | MFP_ADDR(GPIO57, 0x0294), | ||
93 | MFP_ADDR(GPIO58, 0x0298), | ||
94 | MFP_ADDR(GPIO59, 0x02a4), | ||
95 | MFP_ADDR(GPIO60, 0x02a8), | ||
96 | MFP_ADDR(GPIO61, 0x02b0), | ||
97 | MFP_ADDR(GPIO62, 0x02ac), | ||
98 | MFP_ADDR(GPIO63, 0x0640), | ||
99 | MFP_ADDR(GPIO64, 0x065c), | ||
100 | MFP_ADDR(GPIO65, 0x0648), | ||
101 | MFP_ADDR(GPIO66, 0x0644), | ||
102 | MFP_ADDR(GPIO67, 0x0674), | ||
103 | MFP_ADDR(GPIO68, 0x0658), | ||
104 | MFP_ADDR(GPIO69, 0x0654), | ||
105 | MFP_ADDR(GPIO70, 0x0660), | ||
106 | MFP_ADDR(GPIO71, 0x0668), | ||
107 | MFP_ADDR(GPIO72, 0x0664), | ||
108 | MFP_ADDR(GPIO73, 0x0650), | ||
109 | MFP_ADDR(GPIO74, 0x066c), | ||
110 | MFP_ADDR(GPIO75, 0x064c), | ||
111 | MFP_ADDR(GPIO76, 0x0670), | ||
112 | MFP_ADDR(GPIO77, 0x0678), | ||
113 | MFP_ADDR(GPIO78, 0x067c), | ||
114 | MFP_ADDR(GPIO79, 0x0694), | ||
115 | MFP_ADDR(GPIO80, 0x069c), | ||
116 | MFP_ADDR(GPIO81, 0x06a0), | ||
117 | MFP_ADDR(GPIO82, 0x06a4), | ||
118 | MFP_ADDR(GPIO83, 0x0698), | ||
119 | MFP_ADDR(GPIO84, 0x06bc), | ||
120 | MFP_ADDR(GPIO85, 0x06b4), | ||
121 | MFP_ADDR(GPIO86, 0x06b0), | ||
122 | MFP_ADDR(GPIO87, 0x06c0), | ||
123 | MFP_ADDR(GPIO88, 0x06c4), | ||
124 | MFP_ADDR(GPIO89, 0x06ac), | ||
125 | MFP_ADDR(GPIO90, 0x0680), | ||
126 | MFP_ADDR(GPIO91, 0x0684), | ||
127 | MFP_ADDR(GPIO92, 0x0688), | ||
128 | MFP_ADDR(GPIO93, 0x0690), | ||
129 | MFP_ADDR(GPIO94, 0x068c), | ||
130 | MFP_ADDR(GPIO95, 0x06a8), | ||
131 | MFP_ADDR(GPIO96, 0x06b8), | ||
132 | MFP_ADDR(GPIO97, 0x0410), | ||
133 | MFP_ADDR(GPIO98, 0x0418), | ||
134 | MFP_ADDR(GPIO99, 0x041c), | ||
135 | MFP_ADDR(GPIO100, 0x0414), | ||
136 | MFP_ADDR(GPIO101, 0x0408), | ||
137 | MFP_ADDR(GPIO102, 0x0324), | ||
138 | MFP_ADDR(GPIO103, 0x040c), | ||
139 | MFP_ADDR(GPIO104, 0x0400), | ||
140 | MFP_ADDR(GPIO105, 0x0328), | ||
141 | MFP_ADDR(GPIO106, 0x0404), | ||
142 | |||
143 | MFP_ADDR(GPIO159, 0x0524), | ||
144 | MFP_ADDR(GPIO163, 0x0534), | ||
145 | MFP_ADDR(GPIO167, 0x0544), | ||
146 | MFP_ADDR(GPIO168, 0x0548), | ||
147 | MFP_ADDR(GPIO169, 0x054c), | ||
148 | MFP_ADDR(GPIO170, 0x0550), | ||
149 | MFP_ADDR(GPIO171, 0x0554), | ||
150 | MFP_ADDR(GPIO172, 0x0558), | ||
151 | MFP_ADDR(GPIO173, 0x055c), | ||
152 | |||
153 | MFP_ADDR(nXCVREN, 0x0204), | ||
154 | MFP_ADDR(DF_CLE_nOE, 0x020c), | ||
155 | MFP_ADDR(DF_nADV1_ALE, 0x0218), | ||
156 | MFP_ADDR(DF_SCLK_E, 0x0214), | ||
157 | MFP_ADDR(DF_SCLK_S, 0x0210), | ||
158 | MFP_ADDR(nBE0, 0x021c), | ||
159 | MFP_ADDR(nBE1, 0x0220), | ||
160 | MFP_ADDR(DF_nADV2_ALE, 0x0224), | ||
161 | MFP_ADDR(DF_INT_RnB, 0x0228), | ||
162 | MFP_ADDR(DF_nCS0, 0x022c), | ||
163 | MFP_ADDR(DF_nCS1, 0x0230), | ||
164 | MFP_ADDR(nLUA, 0x0254), | ||
165 | MFP_ADDR(nLLA, 0x0258), | ||
166 | MFP_ADDR(DF_nWE, 0x0234), | ||
167 | MFP_ADDR(DF_nRE_nOE, 0x0238), | ||
168 | MFP_ADDR(DF_ADDR0, 0x024c), | ||
169 | MFP_ADDR(DF_ADDR1, 0x0250), | ||
170 | MFP_ADDR(DF_ADDR2, 0x025c), | ||
171 | MFP_ADDR(DF_ADDR3, 0x0260), | ||
172 | MFP_ADDR(DF_IO0, 0x023c), | ||
173 | MFP_ADDR(DF_IO1, 0x0240), | ||
174 | MFP_ADDR(DF_IO2, 0x0244), | ||
175 | MFP_ADDR(DF_IO3, 0x0248), | ||
176 | MFP_ADDR(DF_IO4, 0x0264), | ||
177 | MFP_ADDR(DF_IO5, 0x0268), | ||
178 | MFP_ADDR(DF_IO6, 0x026c), | ||
179 | MFP_ADDR(DF_IO7, 0x0270), | ||
180 | MFP_ADDR(DF_IO8, 0x0274), | ||
181 | MFP_ADDR(DF_IO9, 0x0278), | ||
182 | MFP_ADDR(DF_IO10, 0x027c), | ||
183 | MFP_ADDR(DF_IO11, 0x0280), | ||
184 | MFP_ADDR(DF_IO12, 0x0284), | ||
185 | MFP_ADDR(DF_IO13, 0x0288), | ||
186 | MFP_ADDR(DF_IO14, 0x028c), | ||
187 | MFP_ADDR(DF_IO15, 0x0290), | ||
188 | |||
189 | MFP_ADDR(GSIM_UIO, 0x0314), | ||
190 | MFP_ADDR(GSIM_UCLK, 0x0318), | ||
191 | MFP_ADDR(GSIM_UDET, 0x031c), | ||
192 | MFP_ADDR(GSIM_nURST, 0x0320), | ||
193 | |||
194 | MFP_ADDR(PMIC_INT, 0x06c8), | ||
195 | |||
196 | MFP_ADDR(RDY, 0x0200), | ||
197 | |||
198 | MFP_ADDR_END, | ||
199 | }; | ||
200 | |||
201 | static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops); | ||
202 | static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70); | ||
203 | static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1); | ||
204 | static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1); | ||
205 | static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1); | ||
206 | static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0); | ||
207 | static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0); | ||
208 | static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0); | ||
209 | static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0); | ||
210 | static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0); | ||
211 | static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); | ||
212 | static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); | ||
213 | static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); | ||
214 | static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0); | ||
215 | |||
216 | static struct clk_lookup pxa95x_clkregs[] = { | ||
217 | INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), | ||
218 | /* Power I2C clock is always on */ | ||
219 | INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), | ||
220 | INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), | ||
221 | INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), | ||
222 | INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), | ||
223 | INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL), | ||
224 | INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"), | ||
225 | INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL), | ||
226 | INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL), | ||
227 | INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL), | ||
228 | INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL), | ||
229 | INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL), | ||
230 | INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), | ||
231 | INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), | ||
232 | INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), | ||
233 | INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL), | ||
234 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
235 | }; | ||
236 | |||
237 | void __init pxa95x_init_irq(void) | ||
238 | { | ||
239 | pxa_init_irq(96, NULL); | ||
240 | } | ||
241 | |||
242 | /* | ||
243 | * device registration specific to PXA93x. | ||
244 | */ | ||
245 | |||
246 | void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info) | ||
247 | { | ||
248 | pxa_register_device(&pxa3xx_device_i2c_power, info); | ||
249 | } | ||
250 | |||
251 | static struct platform_device *devices[] __initdata = { | ||
252 | &pxa_device_gpio, | ||
253 | &sa1100_device_rtc, | ||
254 | &pxa_device_rtc, | ||
255 | &pxa27x_device_ssp1, | ||
256 | &pxa27x_device_ssp2, | ||
257 | &pxa27x_device_ssp3, | ||
258 | &pxa3xx_device_ssp4, | ||
259 | &pxa27x_device_pwm0, | ||
260 | &pxa27x_device_pwm1, | ||
261 | }; | ||
262 | |||
263 | static int __init pxa95x_init(void) | ||
264 | { | ||
265 | int ret = 0, i; | ||
266 | |||
267 | if (cpu_is_pxa95x()) { | ||
268 | mfp_init_base(io_p2v(MFPR_BASE)); | ||
269 | mfp_init_addr(pxa95x_mfp_addr_map); | ||
270 | |||
271 | reset_status = ARSR; | ||
272 | |||
273 | /* | ||
274 | * clear RDH bit every time after reset | ||
275 | * | ||
276 | * Note: the last 3 bits DxS are write-1-to-clear so carefully | ||
277 | * preserve them here in case they will be referenced later | ||
278 | */ | ||
279 | ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); | ||
280 | |||
281 | clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs)); | ||
282 | |||
283 | if ((ret = pxa_init_dma(IRQ_DMA, 32))) | ||
284 | return ret; | ||
285 | |||
286 | register_syscore_ops(&pxa_irq_syscore_ops); | ||
287 | register_syscore_ops(&pxa3xx_clock_syscore_ops); | ||
288 | |||
289 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
290 | } | ||
291 | |||
292 | return ret; | ||
293 | } | ||
294 | |||
295 | postcore_initcall(pxa95x_init); | ||
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c deleted file mode 100644 index 5aded5e6148f..000000000000 --- a/arch/arm/mach-pxa/saarb.c +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/saarb.c | ||
3 | * | ||
4 | * Support for the Marvell Handheld Platform (aka SAARB) | ||
5 | * | ||
6 | * Copyright (C) 2007-2010 Marvell International Ltd. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * publishhed by the Free Software Foundation. | ||
11 | */ | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/i2c.h> | ||
16 | #include <linux/i2c/pxa-i2c.h> | ||
17 | #include <linux/mfd/88pm860x.h> | ||
18 | |||
19 | #include <asm/mach-types.h> | ||
20 | #include <asm/mach/arch.h> | ||
21 | |||
22 | #include <mach/irqs.h> | ||
23 | #include <mach/hardware.h> | ||
24 | #include <mach/mfp.h> | ||
25 | #include <mach/mfp-pxa930.h> | ||
26 | #include <mach/pxa95x.h> | ||
27 | |||
28 | #include "generic.h" | ||
29 | |||
30 | #define SAARB_NR_IRQS (IRQ_BOARD_START + 40) | ||
31 | |||
32 | static struct pm860x_touch_pdata saarb_touch = { | ||
33 | .gpadc_prebias = 1, | ||
34 | .slot_cycle = 1, | ||
35 | .tsi_prebias = 6, | ||
36 | .pen_prebias = 16, | ||
37 | .pen_prechg = 2, | ||
38 | .res_x = 300, | ||
39 | }; | ||
40 | |||
41 | static struct pm860x_backlight_pdata saarb_backlight[] = { | ||
42 | { | ||
43 | .id = PM8606_ID_BACKLIGHT, | ||
44 | .iset = PM8606_WLED_CURRENT(24), | ||
45 | .flags = PM8606_BACKLIGHT1, | ||
46 | }, | ||
47 | {}, | ||
48 | }; | ||
49 | |||
50 | static struct pm860x_led_pdata saarb_led[] = { | ||
51 | { | ||
52 | .id = PM8606_ID_LED, | ||
53 | .iset = PM8606_LED_CURRENT(12), | ||
54 | .flags = PM8606_LED1_RED, | ||
55 | }, { | ||
56 | .id = PM8606_ID_LED, | ||
57 | .iset = PM8606_LED_CURRENT(12), | ||
58 | .flags = PM8606_LED1_GREEN, | ||
59 | }, { | ||
60 | .id = PM8606_ID_LED, | ||
61 | .iset = PM8606_LED_CURRENT(12), | ||
62 | .flags = PM8606_LED1_BLUE, | ||
63 | }, { | ||
64 | .id = PM8606_ID_LED, | ||
65 | .iset = PM8606_LED_CURRENT(12), | ||
66 | .flags = PM8606_LED2_RED, | ||
67 | }, { | ||
68 | .id = PM8606_ID_LED, | ||
69 | .iset = PM8606_LED_CURRENT(12), | ||
70 | .flags = PM8606_LED2_GREEN, | ||
71 | }, { | ||
72 | .id = PM8606_ID_LED, | ||
73 | .iset = PM8606_LED_CURRENT(12), | ||
74 | .flags = PM8606_LED2_BLUE, | ||
75 | }, | ||
76 | }; | ||
77 | |||
78 | static struct pm860x_platform_data saarb_pm8607_info = { | ||
79 | .touch = &saarb_touch, | ||
80 | .backlight = &saarb_backlight[0], | ||
81 | .led = &saarb_led[0], | ||
82 | .companion_addr = 0x10, | ||
83 | .irq_mode = 0, | ||
84 | .irq_base = IRQ_BOARD_START, | ||
85 | |||
86 | .i2c_port = GI2C_PORT, | ||
87 | }; | ||
88 | |||
89 | static struct i2c_board_info saarb_i2c_info[] = { | ||
90 | { | ||
91 | .type = "88PM860x", | ||
92 | .addr = 0x34, | ||
93 | .platform_data = &saarb_pm8607_info, | ||
94 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), | ||
95 | }, | ||
96 | }; | ||
97 | |||
98 | static void __init saarb_init(void) | ||
99 | { | ||
100 | pxa_set_ffuart_info(NULL); | ||
101 | pxa_set_i2c_info(NULL); | ||
102 | i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info)); | ||
103 | } | ||
104 | |||
105 | MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") | ||
106 | .atag_offset = 0x100, | ||
107 | .map_io = pxa3xx_map_io, | ||
108 | .nr_irqs = SAARB_NR_IRQS, | ||
109 | .init_irq = pxa95x_init_irq, | ||
110 | .handle_irq = pxa3xx_handle_irq, | ||
111 | .timer = &pxa_timer, | ||
112 | .init_machine = saarb_init, | ||
113 | .restart = pxa_restart, | ||
114 | MACHINE_END | ||
115 | |||
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c deleted file mode 100644 index f7d9305cfd77..000000000000 --- a/arch/arm/mach-pxa/tavorevb3.c +++ /dev/null | |||
@@ -1,136 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/tavorevb3.c | ||
3 | * | ||
4 | * Support for the Marvell EVB3 Development Platform. | ||
5 | * | ||
6 | * Copyright: (C) Copyright 2008-2010 Marvell International Ltd. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * publishhed by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/i2c.h> | ||
18 | #include <linux/i2c/pxa-i2c.h> | ||
19 | #include <linux/gpio.h> | ||
20 | #include <linux/mfd/88pm860x.h> | ||
21 | |||
22 | #include <asm/mach-types.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | |||
25 | #include <mach/pxa930.h> | ||
26 | |||
27 | #include "devices.h" | ||
28 | #include "generic.h" | ||
29 | |||
30 | #define TAVOREVB3_NR_IRQS (IRQ_BOARD_START + 24) | ||
31 | |||
32 | static mfp_cfg_t evb3_mfp_cfg[] __initdata = { | ||
33 | /* UART */ | ||
34 | GPIO53_UART1_TXD, | ||
35 | GPIO54_UART1_RXD, | ||
36 | |||
37 | /* PMIC */ | ||
38 | PMIC_INT_GPIO83, | ||
39 | }; | ||
40 | |||
41 | #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) | ||
42 | static struct pm860x_touch_pdata evb3_touch = { | ||
43 | .gpadc_prebias = 1, | ||
44 | .slot_cycle = 1, | ||
45 | .tsi_prebias = 6, | ||
46 | .pen_prebias = 16, | ||
47 | .pen_prechg = 2, | ||
48 | .res_x = 300, | ||
49 | }; | ||
50 | |||
51 | static struct pm860x_backlight_pdata evb3_backlight[] = { | ||
52 | { | ||
53 | .id = PM8606_ID_BACKLIGHT, | ||
54 | .iset = PM8606_WLED_CURRENT(24), | ||
55 | .flags = PM8606_BACKLIGHT1, | ||
56 | }, | ||
57 | {}, | ||
58 | }; | ||
59 | |||
60 | static struct pm860x_led_pdata evb3_led[] = { | ||
61 | { | ||
62 | .id = PM8606_ID_LED, | ||
63 | .iset = PM8606_LED_CURRENT(12), | ||
64 | .flags = PM8606_LED1_RED, | ||
65 | }, { | ||
66 | .id = PM8606_ID_LED, | ||
67 | .iset = PM8606_LED_CURRENT(12), | ||
68 | .flags = PM8606_LED1_GREEN, | ||
69 | }, { | ||
70 | .id = PM8606_ID_LED, | ||
71 | .iset = PM8606_LED_CURRENT(12), | ||
72 | .flags = PM8606_LED1_BLUE, | ||
73 | }, { | ||
74 | .id = PM8606_ID_LED, | ||
75 | .iset = PM8606_LED_CURRENT(12), | ||
76 | .flags = PM8606_LED2_RED, | ||
77 | }, { | ||
78 | .id = PM8606_ID_LED, | ||
79 | .iset = PM8606_LED_CURRENT(12), | ||
80 | .flags = PM8606_LED2_GREEN, | ||
81 | }, { | ||
82 | .id = PM8606_ID_LED, | ||
83 | .iset = PM8606_LED_CURRENT(12), | ||
84 | .flags = PM8606_LED2_BLUE, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct pm860x_platform_data evb3_pm8607_info = { | ||
89 | .touch = &evb3_touch, | ||
90 | .backlight = &evb3_backlight[0], | ||
91 | .led = &evb3_led[0], | ||
92 | .companion_addr = 0x10, | ||
93 | .irq_mode = 0, | ||
94 | .irq_base = IRQ_BOARD_START, | ||
95 | |||
96 | .i2c_port = GI2C_PORT, | ||
97 | }; | ||
98 | |||
99 | static struct i2c_board_info evb3_i2c_info[] = { | ||
100 | { | ||
101 | .type = "88PM860x", | ||
102 | .addr = 0x34, | ||
103 | .platform_data = &evb3_pm8607_info, | ||
104 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), | ||
105 | }, | ||
106 | }; | ||
107 | |||
108 | static void __init evb3_init_i2c(void) | ||
109 | { | ||
110 | pxa_set_i2c_info(NULL); | ||
111 | i2c_register_board_info(0, ARRAY_AND_SIZE(evb3_i2c_info)); | ||
112 | } | ||
113 | #else | ||
114 | static inline void evb3_init_i2c(void) {} | ||
115 | #endif | ||
116 | |||
117 | static void __init evb3_init(void) | ||
118 | { | ||
119 | /* initialize MFP configurations */ | ||
120 | pxa3xx_mfp_config(ARRAY_AND_SIZE(evb3_mfp_cfg)); | ||
121 | |||
122 | pxa_set_ffuart_info(NULL); | ||
123 | |||
124 | evb3_init_i2c(); | ||
125 | } | ||
126 | |||
127 | MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") | ||
128 | .atag_offset = 0x100, | ||
129 | .map_io = pxa3xx_map_io, | ||
130 | .nr_irqs = TAVOREVB3_NR_IRQS, | ||
131 | .init_irq = pxa3xx_init_irq, | ||
132 | .handle_irq = pxa3xx_handle_irq, | ||
133 | .timer = &pxa_timer, | ||
134 | .init_machine = evb3_init, | ||
135 | .restart = pxa_restart, | ||
136 | MACHINE_END | ||
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c index 7f689ce1be61..bdaba59b42dc 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2443.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c | |||
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = { | |||
158 | .devname = "s3c2410-spi.0", | 158 | .devname = "s3c2410-spi.0", |
159 | .parent = &clk_p, | 159 | .parent = &clk_p, |
160 | .enable = s3c2443_clkcon_enable_p, | 160 | .enable = s3c2443_clkcon_enable_p, |
161 | .ctrlbit = S3C2443_PCLKCON_SPI0, | ||
162 | }, { | ||
163 | .name = "spi", | ||
164 | .devname = "s3c2410-spi.1", | ||
165 | .parent = &clk_p, | ||
166 | .enable = s3c2443_clkcon_enable_p, | ||
167 | .ctrlbit = S3C2443_PCLKCON_SPI1, | 161 | .ctrlbit = S3C2443_PCLKCON_SPI1, |
168 | } | 162 | } |
169 | }; | 163 | }; |
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 28041e83dc82..1a6f85777449 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -138,11 +138,7 @@ static struct clk init_clocks_off[] = { | |||
138 | .ctrlbit = S3C_CLKCON_PCLK_TSADC, | 138 | .ctrlbit = S3C_CLKCON_PCLK_TSADC, |
139 | }, { | 139 | }, { |
140 | .name = "i2c", | 140 | .name = "i2c", |
141 | #ifdef CONFIG_S3C_DEV_I2C1 | ||
142 | .devname = "s3c2440-i2c.0", | 141 | .devname = "s3c2440-i2c.0", |
143 | #else | ||
144 | .devname = "s3c2440-i2c", | ||
145 | #endif | ||
146 | .parent = &clk_p, | 142 | .parent = &clk_p, |
147 | .enable = s3c64xx_pclk_ctrl, | 143 | .enable = s3c64xx_pclk_ctrl, |
148 | .ctrlbit = S3C_CLKCON_PCLK_IIC, | 144 | .ctrlbit = S3C_CLKCON_PCLK_IIC, |
@@ -319,10 +315,6 @@ static struct clk init_clocks_off[] = { | |||
319 | .enable = s3c64xx_sclk_ctrl, | 315 | .enable = s3c64xx_sclk_ctrl, |
320 | .ctrlbit = S3C_CLKCON_SCLK_MFC, | 316 | .ctrlbit = S3C_CLKCON_SCLK_MFC, |
321 | }, { | 317 | }, { |
322 | .name = "cam", | ||
323 | .enable = s3c64xx_sclk_ctrl, | ||
324 | .ctrlbit = S3C_CLKCON_SCLK_CAM, | ||
325 | }, { | ||
326 | .name = "sclk_jpeg", | 318 | .name = "sclk_jpeg", |
327 | .enable = s3c64xx_sclk_ctrl, | 319 | .enable = s3c64xx_sclk_ctrl, |
328 | .ctrlbit = S3C_CLKCON_SCLK_JPEG, | 320 | .ctrlbit = S3C_CLKCON_SCLK_JPEG, |
@@ -681,15 +673,6 @@ static struct clksrc_sources clkset_audio2 = { | |||
681 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), | 673 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), |
682 | }; | 674 | }; |
683 | 675 | ||
684 | static struct clk *clkset_camif_list[] = { | ||
685 | &clk_h2, | ||
686 | }; | ||
687 | |||
688 | static struct clksrc_sources clkset_camif = { | ||
689 | .sources = clkset_camif_list, | ||
690 | .nr_sources = ARRAY_SIZE(clkset_camif_list), | ||
691 | }; | ||
692 | |||
693 | static struct clksrc_clk clksrcs[] = { | 676 | static struct clksrc_clk clksrcs[] = { |
694 | { | 677 | { |
695 | .clk = { | 678 | .clk = { |
@@ -744,10 +727,9 @@ static struct clksrc_clk clksrcs[] = { | |||
744 | .name = "camera", | 727 | .name = "camera", |
745 | .ctrlbit = S3C_CLKCON_SCLK_CAM, | 728 | .ctrlbit = S3C_CLKCON_SCLK_CAM, |
746 | .enable = s3c64xx_sclk_ctrl, | 729 | .enable = s3c64xx_sclk_ctrl, |
730 | .parent = &clk_h2, | ||
747 | }, | 731 | }, |
748 | .reg_div = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4 }, | 732 | .reg_div = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4 }, |
749 | .reg_src = { .reg = NULL, .shift = 0, .size = 0 }, | ||
750 | .sources = &clkset_camif, | ||
751 | }, | 733 | }, |
752 | }; | 734 | }; |
753 | 735 | ||
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index be746e33e86c..aef303b8997e 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c | |||
@@ -155,7 +155,6 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) | |||
155 | /* initialise the io descriptors we need for initialisation */ | 155 | /* initialise the io descriptors we need for initialisation */ |
156 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 156 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
157 | iotable_init(mach_desc, size); | 157 | iotable_init(mach_desc, size); |
158 | init_consistent_dma_size(SZ_8M); | ||
159 | 158 | ||
160 | /* detect cpu id */ | 159 | /* detect cpu id */ |
161 | s3c64xx_init_cpu(); | 160 | s3c64xx_init_cpu(); |
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 111e404a81fd..8ae5800e807f 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c | |||
@@ -187,7 +187,6 @@ void __init s5p6440_map_io(void) | |||
187 | s5p6440_default_sdhci2(); | 187 | s5p6440_default_sdhci2(); |
188 | 188 | ||
189 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | 189 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); |
190 | init_consistent_dma_size(SZ_8M); | ||
191 | } | 190 | } |
192 | 191 | ||
193 | void __init s5p6450_map_io(void) | 192 | void __init s5p6450_map_io(void) |
@@ -202,7 +201,6 @@ void __init s5p6450_map_io(void) | |||
202 | s5p6450_default_sdhci2(); | 201 | s5p6450_default_sdhci2(); |
203 | 202 | ||
204 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); | 203 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); |
205 | init_consistent_dma_size(SZ_8M); | ||
206 | } | 204 | } |
207 | 205 | ||
208 | /* | 206 | /* |
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index a0c50efe8145..9dfe93e2624d 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c | |||
@@ -169,8 +169,6 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size) | |||
169 | 169 | ||
170 | void __init s5pv210_map_io(void) | 170 | void __init s5pv210_map_io(void) |
171 | { | 171 | { |
172 | init_consistent_dma_size(14 << 20); | ||
173 | |||
174 | /* initialise device information early */ | 172 | /* initialise device information early */ |
175 | s5pv210_default_sdhci0(); | 173 | s5pv210_default_sdhci0(); |
176 | s5pv210_default_sdhci1(); | 174 | s5pv210_default_sdhci1(); |
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 55e1dba4ffde..c72b31078c99 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -774,7 +774,6 @@ static void __init goni_pmic_init(void) | |||
774 | /* MoviNAND */ | 774 | /* MoviNAND */ |
775 | static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { | 775 | static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { |
776 | .max_width = 4, | 776 | .max_width = 4, |
777 | .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE, | ||
778 | .cd_type = S3C_SDHCI_CD_PERMANENT, | 777 | .cd_type = S3C_SDHCI_CD_PERMANENT, |
779 | }; | 778 | }; |
780 | 779 | ||
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 11bb1d984197..96f11394c7c0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c | |||
@@ -66,12 +66,6 @@ static struct map_desc r8a7740_io_desc[] __initdata = { | |||
66 | void __init r8a7740_map_io(void) | 66 | void __init r8a7740_map_io(void) |
67 | { | 67 | { |
68 | iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc)); | 68 | iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc)); |
69 | |||
70 | /* | ||
71 | * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't | ||
72 | * enough to allocate the frame buffer memory. | ||
73 | */ | ||
74 | init_consistent_dma_size(12 << 20); | ||
75 | } | 69 | } |
76 | 70 | ||
77 | /* SCIFA0 */ | 71 | /* SCIFA0 */ |
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index a07954fbcd22..be6f746c97fa 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -58,12 +58,6 @@ static struct map_desc sh7372_io_desc[] __initdata = { | |||
58 | void __init sh7372_map_io(void) | 58 | void __init sh7372_map_io(void) |
59 | { | 59 | { |
60 | iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc)); | 60 | iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc)); |
61 | |||
62 | /* | ||
63 | * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't | ||
64 | * enough to allocate the frame buffer memory. | ||
65 | */ | ||
66 | init_consistent_dma_size(12 << 20); | ||
67 | } | 61 | } |
68 | 62 | ||
69 | /* SCIFA0 */ | 63 | /* SCIFA0 */ |
diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c index b5015d0f1912..d091675ba376 100644 --- a/arch/arm/mach-tegra/apbio.c +++ b/arch/arm/mach-tegra/apbio.c | |||
@@ -15,7 +15,6 @@ | |||
15 | 15 | ||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <mach/iomap.h> | ||
19 | #include <linux/of.h> | 18 | #include <linux/of.h> |
20 | #include <linux/dmaengine.h> | 19 | #include <linux/dmaengine.h> |
21 | #include <linux/dma-mapping.h> | 20 | #include <linux/dma-mapping.h> |
@@ -24,9 +23,8 @@ | |||
24 | #include <linux/sched.h> | 23 | #include <linux/sched.h> |
25 | #include <linux/mutex.h> | 24 | #include <linux/mutex.h> |
26 | 25 | ||
27 | #include <mach/dma.h> | ||
28 | |||
29 | #include "apbio.h" | 26 | #include "apbio.h" |
27 | #include "iomap.h" | ||
30 | 28 | ||
31 | #if defined(CONFIG_TEGRA20_APB_DMA) | 29 | #if defined(CONFIG_TEGRA20_APB_DMA) |
32 | static DEFINE_MUTEX(tegra_apb_dma_lock); | 30 | static DEFINE_MUTEX(tegra_apb_dma_lock); |
@@ -71,7 +69,6 @@ bool tegra_apb_dma_init(void) | |||
71 | 69 | ||
72 | dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | 70 | dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
73 | dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | 71 | dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
74 | dma_sconfig.slave_id = TEGRA_DMA_REQ_SEL_CNTR; | ||
75 | dma_sconfig.src_maxburst = 1; | 72 | dma_sconfig.src_maxburst = 1; |
76 | dma_sconfig.dst_maxburst = 1; | 73 | dma_sconfig.dst_maxburst = 1; |
77 | 74 | ||
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index aa5325cd1c42..71569c01afd2 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c | |||
@@ -40,12 +40,10 @@ | |||
40 | #include <asm/mach/time.h> | 40 | #include <asm/mach/time.h> |
41 | #include <asm/setup.h> | 41 | #include <asm/setup.h> |
42 | 42 | ||
43 | #include <mach/iomap.h> | ||
44 | #include <mach/irqs.h> | ||
45 | |||
46 | #include "board.h" | 43 | #include "board.h" |
47 | #include "clock.h" | 44 | #include "clock.h" |
48 | #include "common.h" | 45 | #include "common.h" |
46 | #include "iomap.h" | ||
49 | 47 | ||
50 | struct tegra_ehci_platform_data tegra_ehci1_pdata = { | 48 | struct tegra_ehci_platform_data tegra_ehci1_pdata = { |
51 | .operating_mode = TEGRA_USB_OTG, | 49 | .operating_mode = TEGRA_USB_OTG, |
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 5e92a81f9a2e..e56170393a5b 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c | |||
@@ -33,11 +33,10 @@ | |||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/hardware/gic.h> | 34 | #include <asm/hardware/gic.h> |
35 | 35 | ||
36 | #include <mach/iomap.h> | ||
37 | |||
38 | #include "board.h" | 36 | #include "board.h" |
39 | #include "clock.h" | 37 | #include "clock.h" |
40 | #include "common.h" | 38 | #include "common.h" |
39 | #include "iomap.h" | ||
41 | 40 | ||
42 | struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { | 41 | struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { |
43 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), | 42 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), |
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index fd82085eca5d..867bf8bf5561 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c | |||
@@ -27,8 +27,6 @@ | |||
27 | #include <linux/seq_file.h> | 27 | #include <linux/seq_file.h> |
28 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
29 | 29 | ||
30 | #include <mach/clk.h> | ||
31 | |||
32 | #include "board.h" | 30 | #include "board.h" |
33 | #include "clock.h" | 31 | #include "clock.h" |
34 | #include "tegra_cpu_car.h" | 32 | #include "tegra_cpu_car.h" |
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 0b0a5f556d34..f688daa74978 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -26,13 +26,13 @@ | |||
26 | #include <asm/hardware/cache-l2x0.h> | 26 | #include <asm/hardware/cache-l2x0.h> |
27 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
28 | 28 | ||
29 | #include <mach/iomap.h> | ||
30 | #include <mach/powergate.h> | 29 | #include <mach/powergate.h> |
31 | 30 | ||
32 | #include "board.h" | 31 | #include "board.h" |
33 | #include "clock.h" | 32 | #include "clock.h" |
34 | #include "common.h" | 33 | #include "common.h" |
35 | #include "fuse.h" | 34 | #include "fuse.h" |
35 | #include "iomap.h" | ||
36 | #include "pmc.h" | 36 | #include "pmc.h" |
37 | #include "apbio.h" | 37 | #include "apbio.h" |
38 | #include "sleep.h" | 38 | #include "sleep.h" |
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c index 627bf0f4262e..a74d3c7d2e26 100644 --- a/arch/arm/mach-tegra/cpu-tegra.c +++ b/arch/arm/mach-tegra/cpu-tegra.c | |||
@@ -30,9 +30,6 @@ | |||
30 | #include <linux/io.h> | 30 | #include <linux/io.h> |
31 | #include <linux/suspend.h> | 31 | #include <linux/suspend.h> |
32 | 32 | ||
33 | |||
34 | #include <mach/clk.h> | ||
35 | |||
36 | /* Frequency table index must be sequential starting at 0 */ | 33 | /* Frequency table index must be sequential starting at 0 */ |
37 | static struct cpufreq_frequency_table freq_table[] = { | 34 | static struct cpufreq_frequency_table freq_table[] = { |
38 | { 0, 216000 }, | 35 | { 0, 216000 }, |
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index 566e2f88899b..9a6f051b382e 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c | |||
@@ -29,8 +29,6 @@ | |||
29 | 29 | ||
30 | #include <asm/proc-fns.h> | 30 | #include <asm/proc-fns.h> |
31 | 31 | ||
32 | #include <mach/iomap.h> | ||
33 | |||
34 | static int tegra_idle_enter_lp3(struct cpuidle_device *dev, | 32 | static int tegra_idle_enter_lp3(struct cpuidle_device *dev, |
35 | struct cpuidle_driver *drv, int index); | 33 | struct cpuidle_driver *drv, int index); |
36 | 34 | ||
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c index f07488e0bd32..ffaa286a71e1 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/arch/arm/mach-tegra/flowctrl.c | |||
@@ -22,9 +22,8 @@ | |||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | 24 | ||
25 | #include <mach/iomap.h> | ||
26 | |||
27 | #include "flowctrl.h" | 25 | #include "flowctrl.h" |
26 | #include "iomap.h" | ||
28 | 27 | ||
29 | u8 flowctrl_offset_halt_cpu[] = { | 28 | u8 flowctrl_offset_halt_cpu[] = { |
30 | FLOW_CTRL_HALT_CPU0_EVENTS, | 29 | FLOW_CTRL_HALT_CPU0_EVENTS, |
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 0b7db174a5de..6c752e8f1f06 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c | |||
@@ -21,9 +21,8 @@ | |||
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/export.h> | 22 | #include <linux/export.h> |
23 | 23 | ||
24 | #include <mach/iomap.h> | ||
25 | |||
26 | #include "fuse.h" | 24 | #include "fuse.h" |
25 | #include "iomap.h" | ||
27 | #include "apbio.h" | 26 | #include "apbio.h" |
28 | 27 | ||
29 | #define FUSE_UID_LOW 0x108 | 28 | #define FUSE_UID_LOW 0x108 |
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S index 6addc78cb6b2..93f0370cc95b 100644 --- a/arch/arm/mach-tegra/headsmp.S +++ b/arch/arm/mach-tegra/headsmp.S | |||
@@ -3,9 +3,8 @@ | |||
3 | 3 | ||
4 | #include <asm/cache.h> | 4 | #include <asm/cache.h> |
5 | 5 | ||
6 | #include <mach/iomap.h> | ||
7 | |||
8 | #include "flowctrl.h" | 6 | #include "flowctrl.h" |
7 | #include "iomap.h" | ||
9 | #include "reset.h" | 8 | #include "reset.h" |
10 | #include "sleep.h" | 9 | #include "sleep.h" |
11 | 10 | ||
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index 8ce0661b8a3d..44ca7b1d8b8a 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S | |||
@@ -26,8 +26,8 @@ | |||
26 | 26 | ||
27 | #include <linux/serial_reg.h> | 27 | #include <linux/serial_reg.h> |
28 | 28 | ||
29 | #include <mach/iomap.h> | 29 | #include "../../iomap.h" |
30 | #include <mach/irammap.h> | 30 | #include "../../irammap.h" |
31 | 31 | ||
32 | .macro addruart, rp, rv, tmp | 32 | .macro addruart, rp, rv, tmp |
33 | adr \rp, 99f @ actual addr of 99f | 33 | adr \rp, 99f @ actual addr of 99f |
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h deleted file mode 100644 index 3081cc6dda3b..000000000000 --- a/arch/arm/mach-tegra/include/mach/dma.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-tegra/include/mach/dma.h | ||
3 | * | ||
4 | * Copyright (c) 2008-2009, NVIDIA Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_TEGRA_DMA_H | ||
22 | #define __MACH_TEGRA_DMA_H | ||
23 | |||
24 | #include <linux/list.h> | ||
25 | |||
26 | #define TEGRA_DMA_REQ_SEL_CNTR 0 | ||
27 | #define TEGRA_DMA_REQ_SEL_I2S_2 1 | ||
28 | #define TEGRA_DMA_REQ_SEL_I2S_1 2 | ||
29 | #define TEGRA_DMA_REQ_SEL_SPD_I 3 | ||
30 | #define TEGRA_DMA_REQ_SEL_UI_I 4 | ||
31 | #define TEGRA_DMA_REQ_SEL_MIPI 5 | ||
32 | #define TEGRA_DMA_REQ_SEL_I2S2_2 6 | ||
33 | #define TEGRA_DMA_REQ_SEL_I2S2_1 7 | ||
34 | #define TEGRA_DMA_REQ_SEL_UARTA 8 | ||
35 | #define TEGRA_DMA_REQ_SEL_UARTB 9 | ||
36 | #define TEGRA_DMA_REQ_SEL_UARTC 10 | ||
37 | #define TEGRA_DMA_REQ_SEL_SPI 11 | ||
38 | #define TEGRA_DMA_REQ_SEL_AC97 12 | ||
39 | #define TEGRA_DMA_REQ_SEL_ACMODEM 13 | ||
40 | #define TEGRA_DMA_REQ_SEL_SL4B 14 | ||
41 | #define TEGRA_DMA_REQ_SEL_SL2B1 15 | ||
42 | #define TEGRA_DMA_REQ_SEL_SL2B2 16 | ||
43 | #define TEGRA_DMA_REQ_SEL_SL2B3 17 | ||
44 | #define TEGRA_DMA_REQ_SEL_SL2B4 18 | ||
45 | #define TEGRA_DMA_REQ_SEL_UARTD 19 | ||
46 | #define TEGRA_DMA_REQ_SEL_UARTE 20 | ||
47 | #define TEGRA_DMA_REQ_SEL_I2C 21 | ||
48 | #define TEGRA_DMA_REQ_SEL_I2C2 22 | ||
49 | #define TEGRA_DMA_REQ_SEL_I2C3 23 | ||
50 | #define TEGRA_DMA_REQ_SEL_DVC_I2C 24 | ||
51 | #define TEGRA_DMA_REQ_SEL_OWR 25 | ||
52 | #define TEGRA_DMA_REQ_SEL_INVALID 31 | ||
53 | |||
54 | #endif | ||
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h index 4752b1a68f35..06763fe7529d 100644 --- a/arch/arm/mach-tegra/include/mach/powergate.h +++ b/arch/arm/mach-tegra/include/mach/powergate.h | |||
@@ -20,6 +20,8 @@ | |||
20 | #ifndef _MACH_TEGRA_POWERGATE_H_ | 20 | #ifndef _MACH_TEGRA_POWERGATE_H_ |
21 | #define _MACH_TEGRA_POWERGATE_H_ | 21 | #define _MACH_TEGRA_POWERGATE_H_ |
22 | 22 | ||
23 | struct clk; | ||
24 | |||
23 | #define TEGRA_POWERGATE_CPU 0 | 25 | #define TEGRA_POWERGATE_CPU 0 |
24 | #define TEGRA_POWERGATE_3D 1 | 26 | #define TEGRA_POWERGATE_3D 1 |
25 | #define TEGRA_POWERGATE_VENC 2 | 27 | #define TEGRA_POWERGATE_VENC 2 |
diff --git a/arch/arm/mach-tegra/include/mach/tegra-ahb.h b/arch/arm/mach-tegra/include/mach/tegra-ahb.h deleted file mode 100644 index e0f8c84b1d8c..000000000000 --- a/arch/arm/mach-tegra/include/mach/tegra-ahb.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_TEGRA_AHB_H__ | ||
15 | #define __MACH_TEGRA_AHB_H__ | ||
16 | |||
17 | extern int tegra_ahb_enable_smmu(struct device_node *ahb); | ||
18 | |||
19 | #endif /* __MACH_TEGRA_AHB_H__ */ | ||
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h index 937c4c50219e..27725750ca3e 100644 --- a/arch/arm/mach-tegra/include/mach/uncompress.h +++ b/arch/arm/mach-tegra/include/mach/uncompress.h | |||
@@ -28,8 +28,8 @@ | |||
28 | #include <linux/types.h> | 28 | #include <linux/types.h> |
29 | #include <linux/serial_reg.h> | 29 | #include <linux/serial_reg.h> |
30 | 30 | ||
31 | #include <mach/iomap.h> | 31 | #include "../../iomap.h" |
32 | #include <mach/irammap.h> | 32 | #include "../../irammap.h" |
33 | 33 | ||
34 | #define BIT(x) (1 << (x)) | 34 | #define BIT(x) (1 << (x)) |
35 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) | 35 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) |
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c index 58b4baf9c483..7d09f301b3a1 100644 --- a/arch/arm/mach-tegra/io.c +++ b/arch/arm/mach-tegra/io.c | |||
@@ -26,9 +26,9 @@ | |||
26 | 26 | ||
27 | #include <asm/page.h> | 27 | #include <asm/page.h> |
28 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
29 | #include <mach/iomap.h> | ||
30 | 29 | ||
31 | #include "board.h" | 30 | #include "board.h" |
31 | #include "iomap.h" | ||
32 | 32 | ||
33 | static struct map_desc tegra_io_desc[] __initdata = { | 33 | static struct map_desc tegra_io_desc[] __initdata = { |
34 | { | 34 | { |
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/iomap.h index fee3a94c4549..53151030a07d 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/iomap.h | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-tegra/include/mach/iomap.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Google, Inc. | 2 | * Copyright (C) 2010 Google, Inc. |
5 | * | 3 | * |
6 | * Author: | 4 | * Author: |
diff --git a/arch/arm/mach-tegra/include/mach/irammap.h b/arch/arm/mach-tegra/irammap.h index 0cbe63261854..0cbe63261854 100644 --- a/arch/arm/mach-tegra/include/mach/irammap.h +++ b/arch/arm/mach-tegra/irammap.h | |||
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 2f5bd2db8e1f..b7886f183511 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -25,9 +25,8 @@ | |||
25 | 25 | ||
26 | #include <asm/hardware/gic.h> | 26 | #include <asm/hardware/gic.h> |
27 | 27 | ||
28 | #include <mach/iomap.h> | ||
29 | |||
30 | #include "board.h" | 28 | #include "board.h" |
29 | #include "iomap.h" | ||
31 | 30 | ||
32 | #define ICTLR_CPU_IEP_VFIQ 0x08 | 31 | #define ICTLR_CPU_IEP_VFIQ 0x08 |
33 | #define ICTLR_CPU_IEP_FIR 0x14 | 32 | #define ICTLR_CPU_IEP_FIR 0x14 |
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index a8dba6489c9b..f18fc3ab4e58 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c | |||
@@ -37,11 +37,11 @@ | |||
37 | #include <asm/sizes.h> | 37 | #include <asm/sizes.h> |
38 | #include <asm/mach/pci.h> | 38 | #include <asm/mach/pci.h> |
39 | 39 | ||
40 | #include <mach/iomap.h> | ||
41 | #include <mach/clk.h> | 40 | #include <mach/clk.h> |
42 | #include <mach/powergate.h> | 41 | #include <mach/powergate.h> |
43 | 42 | ||
44 | #include "board.h" | 43 | #include "board.h" |
44 | #include "iomap.h" | ||
45 | 45 | ||
46 | /* register definitions */ | 46 | /* register definitions */ |
47 | #define AFI_OFFSET 0x3800 | 47 | #define AFI_OFFSET 0x3800 |
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 81cb26591acf..1b926df99c4b 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c | |||
@@ -24,8 +24,6 @@ | |||
24 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
25 | #include <asm/smp_scu.h> | 25 | #include <asm/smp_scu.h> |
26 | 26 | ||
27 | #include <mach/clk.h> | ||
28 | #include <mach/iomap.h> | ||
29 | #include <mach/powergate.h> | 27 | #include <mach/powergate.h> |
30 | 28 | ||
31 | #include "fuse.h" | 29 | #include "fuse.h" |
@@ -34,6 +32,7 @@ | |||
34 | #include "tegra_cpu_car.h" | 32 | #include "tegra_cpu_car.h" |
35 | 33 | ||
36 | #include "common.h" | 34 | #include "common.h" |
35 | #include "iomap.h" | ||
37 | 36 | ||
38 | extern void tegra_secondary_startup(void); | 37 | extern void tegra_secondary_startup(void); |
39 | 38 | ||
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index 7af6a54404be..d4fdb5fcec20 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/of.h> | 20 | #include <linux/of.h> |
21 | 21 | ||
22 | #include <mach/iomap.h> | 22 | #include "iomap.h" |
23 | 23 | ||
24 | #define PMC_CTRL 0x0 | 24 | #define PMC_CTRL 0x0 |
25 | #define PMC_CTRL_INTR_LOW (1 << 17) | 25 | #define PMC_CTRL_INTR_LOW (1 << 17) |
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index de0662de28a0..2cc1185d902e 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c | |||
@@ -28,10 +28,10 @@ | |||
28 | #include <linux/spinlock.h> | 28 | #include <linux/spinlock.h> |
29 | 29 | ||
30 | #include <mach/clk.h> | 30 | #include <mach/clk.h> |
31 | #include <mach/iomap.h> | ||
32 | #include <mach/powergate.h> | 31 | #include <mach/powergate.h> |
33 | 32 | ||
34 | #include "fuse.h" | 33 | #include "fuse.h" |
34 | #include "iomap.h" | ||
35 | 35 | ||
36 | #define PWRGATE_TOGGLE 0x30 | 36 | #define PWRGATE_TOGGLE 0x30 |
37 | #define PWRGATE_TOGGLE_START (1 << 8) | 37 | #define PWRGATE_TOGGLE_START (1 << 8) |
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index 5beb7ebe2948..e05da7d10c3b 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c | |||
@@ -22,9 +22,8 @@ | |||
22 | #include <asm/cacheflush.h> | 22 | #include <asm/cacheflush.h> |
23 | #include <asm/hardware/cache-l2x0.h> | 23 | #include <asm/hardware/cache-l2x0.h> |
24 | 24 | ||
25 | #include <mach/iomap.h> | 25 | #include "iomap.h" |
26 | #include <mach/irammap.h> | 26 | #include "irammap.h" |
27 | |||
28 | #include "reset.h" | 27 | #include "reset.h" |
29 | #include "fuse.h" | 28 | #include "fuse.h" |
30 | 29 | ||
diff --git a/arch/arm/mach-tegra/sleep-t20.S b/arch/arm/mach-tegra/sleep-t20.S index a36ae413e2b8..72ce709799da 100644 --- a/arch/arm/mach-tegra/sleep-t20.S +++ b/arch/arm/mach-tegra/sleep-t20.S | |||
@@ -22,8 +22,6 @@ | |||
22 | 22 | ||
23 | #include <asm/assembler.h> | 23 | #include <asm/assembler.h> |
24 | 24 | ||
25 | #include <mach/iomap.h> | ||
26 | |||
27 | #include "sleep.h" | 25 | #include "sleep.h" |
28 | #include "flowctrl.h" | 26 | #include "flowctrl.h" |
29 | 27 | ||
diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S index 777d9cee8b90..be7614b7c5cb 100644 --- a/arch/arm/mach-tegra/sleep-t30.S +++ b/arch/arm/mach-tegra/sleep-t30.S | |||
@@ -18,8 +18,6 @@ | |||
18 | 18 | ||
19 | #include <asm/assembler.h> | 19 | #include <asm/assembler.h> |
20 | 20 | ||
21 | #include <mach/iomap.h> | ||
22 | |||
23 | #include "sleep.h" | 21 | #include "sleep.h" |
24 | #include "flowctrl.h" | 22 | #include "flowctrl.h" |
25 | 23 | ||
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index ea81554c4833..08e9481c049e 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S | |||
@@ -26,7 +26,7 @@ | |||
26 | 26 | ||
27 | #include <asm/assembler.h> | 27 | #include <asm/assembler.h> |
28 | 28 | ||
29 | #include <mach/iomap.h> | 29 | #include "iomap.h" |
30 | 30 | ||
31 | #include "flowctrl.h" | 31 | #include "flowctrl.h" |
32 | #include "sleep.h" | 32 | #include "sleep.h" |
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index e25a7cd703d9..4889b281c5f9 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h | |||
@@ -17,7 +17,7 @@ | |||
17 | #ifndef __MACH_TEGRA_SLEEP_H | 17 | #ifndef __MACH_TEGRA_SLEEP_H |
18 | #define __MACH_TEGRA_SLEEP_H | 18 | #define __MACH_TEGRA_SLEEP_H |
19 | 19 | ||
20 | #include <mach/iomap.h> | 20 | #include "iomap.h" |
21 | 21 | ||
22 | #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS \ | 22 | #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS \ |
23 | + IO_CPU_VIRT) | 23 | + IO_CPU_VIRT) |
diff --git a/arch/arm/mach-tegra/tegra20_clocks.c b/arch/arm/mach-tegra/tegra20_clocks.c index deb873fb12b6..4eb6bc81a87b 100644 --- a/arch/arm/mach-tegra/tegra20_clocks.c +++ b/arch/arm/mach-tegra/tegra20_clocks.c | |||
@@ -27,10 +27,9 @@ | |||
27 | #include <linux/clkdev.h> | 27 | #include <linux/clkdev.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | 29 | ||
30 | #include <mach/iomap.h> | ||
31 | |||
32 | #include "clock.h" | 30 | #include "clock.h" |
33 | #include "fuse.h" | 31 | #include "fuse.h" |
32 | #include "iomap.h" | ||
34 | #include "tegra2_emc.h" | 33 | #include "tegra2_emc.h" |
35 | #include "tegra_cpu_car.h" | 34 | #include "tegra_cpu_car.h" |
36 | 35 | ||
diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c index 8d398a33adf7..9615ee39c353 100644 --- a/arch/arm/mach-tegra/tegra20_clocks_data.c +++ b/arch/arm/mach-tegra/tegra20_clocks_data.c | |||
@@ -27,8 +27,6 @@ | |||
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | 29 | ||
30 | #include <mach/iomap.h> | ||
31 | |||
32 | #include "clock.h" | 30 | #include "clock.h" |
33 | #include "fuse.h" | 31 | #include "fuse.h" |
34 | #include "tegra2_emc.h" | 32 | #include "tegra2_emc.h" |
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c index 5070d833bdd1..837c7b9ea63b 100644 --- a/arch/arm/mach-tegra/tegra2_emc.c +++ b/arch/arm/mach-tegra/tegra2_emc.c | |||
@@ -25,8 +25,6 @@ | |||
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/platform_data/tegra_emc.h> | 26 | #include <linux/platform_data/tegra_emc.h> |
27 | 27 | ||
28 | #include <mach/iomap.h> | ||
29 | |||
30 | #include "tegra2_emc.h" | 28 | #include "tegra2_emc.h" |
31 | #include "fuse.h" | 29 | #include "fuse.h" |
32 | 30 | ||
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index e9de5dfd94ec..000239d68393 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c | |||
@@ -31,10 +31,9 @@ | |||
31 | 31 | ||
32 | #include <asm/clkdev.h> | 32 | #include <asm/clkdev.h> |
33 | 33 | ||
34 | #include <mach/iomap.h> | ||
35 | |||
36 | #include "clock.h" | 34 | #include "clock.h" |
37 | #include "fuse.h" | 35 | #include "fuse.h" |
36 | #include "iomap.h" | ||
38 | #include "tegra_cpu_car.h" | 37 | #include "tegra_cpu_car.h" |
39 | 38 | ||
40 | #define USE_PLL_LOCK_BITS 0 | 39 | #define USE_PLL_LOCK_BITS 0 |
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index d3b8c8e7368f..6ff503536512 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c | |||
@@ -31,11 +31,11 @@ | |||
31 | #include <asm/smp_twd.h> | 31 | #include <asm/smp_twd.h> |
32 | #include <asm/sched_clock.h> | 32 | #include <asm/sched_clock.h> |
33 | 33 | ||
34 | #include <mach/iomap.h> | ||
35 | #include <mach/irqs.h> | 34 | #include <mach/irqs.h> |
36 | 35 | ||
37 | #include "board.h" | 36 | #include "board.h" |
38 | #include "clock.h" | 37 | #include "clock.h" |
38 | #include "iomap.h" | ||
39 | 39 | ||
40 | #define RTC_SECONDS 0x08 | 40 | #define RTC_SECONDS 0x08 |
41 | #define RTC_SHADOW_SECONDS 0x0c | 41 | #define RTC_SHADOW_SECONDS 0x0c |
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index ece8a2dfb814..12f3994c43db 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -82,8 +82,6 @@ static struct map_desc u300_io_desc[] __initdata = { | |||
82 | static void __init u300_map_io(void) | 82 | static void __init u300_map_io(void) |
83 | { | 83 | { |
84 | iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc)); | 84 | iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc)); |
85 | /* We enable a real big DMA buffer if need be. */ | ||
86 | init_consistent_dma_size(SZ_4M); | ||
87 | } | 85 | } |
88 | 86 | ||
89 | /* | 87 | /* |
diff --git a/arch/arm/mach-vt8500/include/mach/hardware.h b/arch/arm/mach-vt8500/include/mach/hardware.h deleted file mode 100644 index db4163f72c39..000000000000 --- a/arch/arm/mach-vt8500/include/mach/hardware.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* arch/arm/mach-vt8500/include/mach/hardware.h | ||
2 | * | ||
3 | * This software is licensed under the terms of the GNU General Public | ||
4 | * License version 2, as published by the Free Software Foundation, and | ||
5 | * may be copied, distributed, and modified under those terms. | ||
6 | * | ||
7 | * This program is distributed in the hope that it will be useful, | ||
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
10 | * GNU General Public License for more details. | ||
11 | * | ||
12 | */ | ||
diff --git a/arch/arm/mach-vt8500/include/mach/i8042.h b/arch/arm/mach-vt8500/include/mach/i8042.h deleted file mode 100644 index cd7143cad6f3..000000000000 --- a/arch/arm/mach-vt8500/include/mach/i8042.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* arch/arm/mach-vt8500/include/mach/i8042.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | extern unsigned long wmt_i8042_base __initdata; | ||
17 | extern int wmt_i8042_kbd_irq; | ||
18 | extern int wmt_i8042_aux_irq; | ||
diff --git a/arch/arm/mach-vt8500/include/mach/restart.h b/arch/arm/mach-vt8500/include/mach/restart.h deleted file mode 100644 index 738979518acb..000000000000 --- a/arch/arm/mach-vt8500/include/mach/restart.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-vt8500/restart.h | ||
2 | * | ||
3 | * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | void vt8500_setup_restart(void); | ||
17 | void vt8500_restart(char mode, const char *cmd); | ||
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c index 050e1833f2d0..3dd21a47881f 100644 --- a/arch/arm/mach-vt8500/timer.c +++ b/arch/arm/mach-vt8500/timer.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-vt8500/timer_dt.c | 2 | * arch/arm/mach-vt8500/timer.c |
3 | * | 3 | * |
4 | * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> | 4 | * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> |
5 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | 5 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> |
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c index 8d3871f110a5..a5bd28692b06 100644 --- a/arch/arm/mach-vt8500/vt8500.c +++ b/arch/arm/mach-vt8500/vt8500.c | |||
@@ -31,8 +31,6 @@ | |||
31 | #include <linux/of_irq.h> | 31 | #include <linux/of_irq.h> |
32 | #include <linux/of_platform.h> | 32 | #include <linux/of_platform.h> |
33 | 33 | ||
34 | #include <mach/restart.h> | ||
35 | |||
36 | #include "common.h" | 34 | #include "common.h" |
37 | 35 | ||
38 | #define LEGACY_GPIO_BASE 0xD8110000 | 36 | #define LEGACY_GPIO_BASE 0xD8110000 |
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ab5cfddc0d7b..ba8d14f78d4d 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <asm/hardware/cache-l2x0.h> | 31 | #include <asm/hardware/cache-l2x0.h> |
32 | 32 | ||
33 | #include <mach/zynq_soc.h> | 33 | #include <mach/zynq_soc.h> |
34 | #include <mach/clkdev.h> | ||
35 | #include "common.h" | 34 | #include "common.h" |
36 | 35 | ||
37 | static struct of_device_id zynq_of_bus_ids[] __initdata = { | 36 | static struct of_device_id zynq_of_bus_ids[] __initdata = { |
@@ -45,22 +44,25 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = { | |||
45 | */ | 44 | */ |
46 | static void __init xilinx_init_machine(void) | 45 | static void __init xilinx_init_machine(void) |
47 | { | 46 | { |
48 | #ifdef CONFIG_CACHE_L2X0 | ||
49 | /* | 47 | /* |
50 | * 64KB way size, 8-way associativity, parity disabled | 48 | * 64KB way size, 8-way associativity, parity disabled |
51 | */ | 49 | */ |
52 | l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF); | 50 | l2x0_of_init(0x02060000, 0xF0F0FFFF); |
53 | #endif | ||
54 | 51 | ||
55 | of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); | 52 | of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); |
56 | } | 53 | } |
57 | 54 | ||
55 | static struct of_device_id irq_match[] __initdata = { | ||
56 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, | ||
57 | { } | ||
58 | }; | ||
59 | |||
58 | /** | 60 | /** |
59 | * xilinx_irq_init() - Interrupt controller initialization for the GIC. | 61 | * xilinx_irq_init() - Interrupt controller initialization for the GIC. |
60 | */ | 62 | */ |
61 | static void __init xilinx_irq_init(void) | 63 | static void __init xilinx_irq_init(void) |
62 | { | 64 | { |
63 | gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE); | 65 | of_irq_init(irq_match); |
64 | } | 66 | } |
65 | 67 | ||
66 | /* The minimum devices needed to be mapped before the VM system is up and | 68 | /* The minimum devices needed to be mapped before the VM system is up and |
@@ -71,17 +73,12 @@ static struct map_desc io_desc[] __initdata = { | |||
71 | { | 73 | { |
72 | .virtual = TTC0_VIRT, | 74 | .virtual = TTC0_VIRT, |
73 | .pfn = __phys_to_pfn(TTC0_PHYS), | 75 | .pfn = __phys_to_pfn(TTC0_PHYS), |
74 | .length = SZ_4K, | 76 | .length = TTC0_SIZE, |
75 | .type = MT_DEVICE, | 77 | .type = MT_DEVICE, |
76 | }, { | 78 | }, { |
77 | .virtual = SCU_PERIPH_VIRT, | 79 | .virtual = SCU_PERIPH_VIRT, |
78 | .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), | 80 | .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), |
79 | .length = SZ_8K, | 81 | .length = SCU_PERIPH_SIZE, |
80 | .type = MT_DEVICE, | ||
81 | }, { | ||
82 | .virtual = PL310_L2CC_VIRT, | ||
83 | .pfn = __phys_to_pfn(PL310_L2CC_PHYS), | ||
84 | .length = SZ_4K, | ||
85 | .type = MT_DEVICE, | 82 | .type = MT_DEVICE, |
86 | }, | 83 | }, |
87 | 84 | ||
@@ -89,7 +86,7 @@ static struct map_desc io_desc[] __initdata = { | |||
89 | { | 86 | { |
90 | .virtual = UART0_VIRT, | 87 | .virtual = UART0_VIRT, |
91 | .pfn = __phys_to_pfn(UART0_PHYS), | 88 | .pfn = __phys_to_pfn(UART0_PHYS), |
92 | .length = SZ_4K, | 89 | .length = UART0_SIZE, |
93 | .type = MT_DEVICE, | 90 | .type = MT_DEVICE, |
94 | }, | 91 | }, |
95 | #endif | 92 | #endif |
diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h deleted file mode 100644 index c6e73d81a459..000000000000 --- a/arch/arm/mach-zynq/include/mach/clkdev.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-zynq/include/mach/clkdev.h | ||
3 | * | ||
4 | * Copyright (C) 2011 Xilinx, Inc. | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #ifndef __MACH_CLKDEV_H__ | ||
18 | #define __MACH_CLKDEV_H__ | ||
19 | |||
20 | #include <plat/clock.h> | ||
21 | |||
22 | struct clk { | ||
23 | unsigned long rate; | ||
24 | const struct clk_ops *ops; | ||
25 | const struct icst_params *params; | ||
26 | void __iomem *vcoreg; | ||
27 | }; | ||
28 | |||
29 | #define __clk_get(clk) ({ 1; }) | ||
30 | #define __clk_put(clk) do { } while (0) | ||
31 | |||
32 | #endif | ||
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index d0d3f8fb06dd..1b8bf0ecbcb0 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h | |||
@@ -15,33 +15,32 @@ | |||
15 | #ifndef __MACH_XILINX_SOC_H__ | 15 | #ifndef __MACH_XILINX_SOC_H__ |
16 | #define __MACH_XILINX_SOC_H__ | 16 | #define __MACH_XILINX_SOC_H__ |
17 | 17 | ||
18 | #include <asm/pgtable.h> | ||
19 | |||
18 | #define PERIPHERAL_CLOCK_RATE 2500000 | 20 | #define PERIPHERAL_CLOCK_RATE 2500000 |
19 | 21 | ||
20 | /* For now, all mappings are flat (physical = virtual) | 22 | /* Static peripheral mappings are mapped at the top of the vmalloc region. The |
23 | * early uart mapping causes intermediate problems/failure at certain | ||
24 | * addresses, including the very top of the vmalloc region. Map it at an | ||
25 | * address that is known to work. | ||
21 | */ | 26 | */ |
22 | #define UART0_PHYS 0xE0000000 | 27 | #define UART0_PHYS 0xE0000000 |
23 | #define UART0_VIRT UART0_PHYS | 28 | #define UART0_SIZE SZ_4K |
24 | 29 | #define UART0_VIRT 0xF0001000 | |
25 | #define TTC0_PHYS 0xF8001000 | ||
26 | #define TTC0_VIRT TTC0_PHYS | ||
27 | 30 | ||
28 | #define PL310_L2CC_PHYS 0xF8F02000 | 31 | #define TTC0_PHYS 0xF8001000 |
29 | #define PL310_L2CC_VIRT PL310_L2CC_PHYS | 32 | #define TTC0_SIZE SZ_4K |
33 | #define TTC0_VIRT (VMALLOC_END - TTC0_SIZE) | ||
30 | 34 | ||
31 | #define SCU_PERIPH_PHYS 0xF8F00000 | 35 | #define SCU_PERIPH_PHYS 0xF8F00000 |
32 | #define SCU_PERIPH_VIRT SCU_PERIPH_PHYS | 36 | #define SCU_PERIPH_SIZE SZ_8K |
37 | #define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) | ||
33 | 38 | ||
34 | /* The following are intended for the devices that are mapped early */ | 39 | /* The following are intended for the devices that are mapped early */ |
35 | 40 | ||
36 | #define TTC0_BASE IOMEM(TTC0_VIRT) | 41 | #define TTC0_BASE IOMEM(TTC0_VIRT) |
37 | #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) | 42 | #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) |
38 | #define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100) | ||
39 | #define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000) | ||
40 | #define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT) | ||
41 | 43 | ||
42 | /* | ||
43 | * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical | ||
44 | */ | ||
45 | #define LL_UART_PADDR UART0_PHYS | 44 | #define LL_UART_PADDR UART0_PHYS |
46 | #define LL_UART_VADDR UART0_VIRT | 45 | #define LL_UART_VADDR UART0_VIRT |
47 | 46 | ||
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig deleted file mode 100644 index 88e1e2e7a20d..000000000000 --- a/arch/arm/plat-mxc/Kconfig +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | if ARCH_MXC | ||
2 | |||
3 | source "arch/arm/plat-mxc/devices/Kconfig" | ||
4 | |||
5 | menu "Freescale MXC Implementations" | ||
6 | |||
7 | choice | ||
8 | prompt "Freescale CPU family:" | ||
9 | default ARCH_IMX_V6_V7 | ||
10 | |||
11 | config ARCH_IMX_V4_V5 | ||
12 | bool "i.MX1, i.MX21, i.MX25, i.MX27" | ||
13 | select ARM_PATCH_PHYS_VIRT | ||
14 | select AUTO_ZRELADDR if !ZBOOT_ROM | ||
15 | help | ||
16 | This enables support for systems based on the Freescale i.MX ARMv4 | ||
17 | and ARMv5 SoCs | ||
18 | |||
19 | config ARCH_IMX_V6_V7 | ||
20 | bool "i.MX3, i.MX5, i.MX6" | ||
21 | select ARM_PATCH_PHYS_VIRT | ||
22 | select AUTO_ZRELADDR if !ZBOOT_ROM | ||
23 | select MIGHT_HAVE_CACHE_L2X0 | ||
24 | help | ||
25 | This enables support for systems based on the Freescale i.MX3, i.MX5 | ||
26 | and i.MX6 family. | ||
27 | |||
28 | endchoice | ||
29 | |||
30 | source "arch/arm/mach-imx/Kconfig" | ||
31 | |||
32 | endmenu | ||
33 | |||
34 | config MXC_IRQ_PRIOR | ||
35 | bool "Use IRQ priority" | ||
36 | help | ||
37 | Select this if you want to use prioritized IRQ handling. | ||
38 | This feature prevents higher priority ISR to be interrupted | ||
39 | by lower priority IRQ even IRQF_DISABLED flag is not set. | ||
40 | This may be useful in embedded applications, where are strong | ||
41 | requirements for timing. | ||
42 | Say N here, unless you have a specialized requirement. | ||
43 | |||
44 | config MXC_TZIC | ||
45 | bool | ||
46 | |||
47 | config MXC_AVIC | ||
48 | bool | ||
49 | |||
50 | config MXC_DEBUG_BOARD | ||
51 | bool "Enable MXC debug board(for 3-stack)" | ||
52 | help | ||
53 | The debug board is an integral part of the MXC 3-stack(PDK) | ||
54 | platforms, it can be attached or removed from the peripheral | ||
55 | board. On debug board, several debug devices(ethernet, UART, | ||
56 | buttons, LEDs and JTAG) are implemented. Between the MCU and | ||
57 | these devices, a CPLD is added as a bridge which performs | ||
58 | data/address de-multiplexing and decode, signal level shift, | ||
59 | interrupt control and various board functions. | ||
60 | |||
61 | config HAVE_EPIT | ||
62 | bool | ||
63 | |||
64 | config MXC_USE_EPIT | ||
65 | bool "Use EPIT instead of GPT" | ||
66 | depends on HAVE_EPIT | ||
67 | help | ||
68 | Use EPIT as the system timer on systems that have it. Normally you | ||
69 | don't have a reason to do so as the EPIT has the same features and | ||
70 | uses the same clocks as the GPT. Anyway, on some systems the GPT | ||
71 | may be in use for other purposes. | ||
72 | |||
73 | config MXC_ULPI | ||
74 | bool | ||
75 | |||
76 | config ARCH_HAS_RNGA | ||
77 | bool | ||
78 | |||
79 | config IMX_HAVE_IOMUX_V1 | ||
80 | bool | ||
81 | |||
82 | config ARCH_MXC_IOMUX_V3 | ||
83 | bool | ||
84 | |||
85 | config IRAM_ALLOC | ||
86 | bool | ||
87 | select GENERIC_ALLOCATOR | ||
88 | |||
89 | endif | ||
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile deleted file mode 100644 index 149237e24850..000000000000 --- a/arch/arm/plat-mxc/Makefile +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | # Common support | ||
6 | obj-y := time.o devices.o cpu.o system.o irq-common.o | ||
7 | |||
8 | obj-$(CONFIG_MXC_TZIC) += tzic.o | ||
9 | obj-$(CONFIG_MXC_AVIC) += avic.o | ||
10 | |||
11 | obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o | ||
12 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o | ||
13 | obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o | ||
14 | obj-$(CONFIG_MXC_ULPI) += ulpi.o | ||
15 | obj-$(CONFIG_MXC_USE_EPIT) += epit.o | ||
16 | obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o | ||
17 | obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o | ||
18 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | ||
19 | ifdef CONFIG_SND_IMX_SOC | ||
20 | obj-y += ssi-fiq.o | ||
21 | obj-y += ssi-fiq-ksym.o | ||
22 | endif | ||
23 | |||
24 | obj-y += devices/ | ||
diff --git a/arch/arm/plat-mxc/include/mach/ipu.h b/arch/arm/plat-mxc/include/mach/ipu.h deleted file mode 100644 index 539e559d18b2..000000000000 --- a/arch/arm/plat-mxc/include/mach/ipu.h +++ /dev/null | |||
@@ -1,177 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 | ||
3 | * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> | ||
4 | * | ||
5 | * Copyright (C) 2005-2007 Freescale Semiconductor, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef _IPU_H_ | ||
13 | #define _IPU_H_ | ||
14 | |||
15 | #include <linux/types.h> | ||
16 | #include <linux/dmaengine.h> | ||
17 | |||
18 | /* IPU DMA Controller channel definitions. */ | ||
19 | enum ipu_channel { | ||
20 | IDMAC_IC_0 = 0, /* IC (encoding task) to memory */ | ||
21 | IDMAC_IC_1 = 1, /* IC (viewfinder task) to memory */ | ||
22 | IDMAC_ADC_0 = 1, | ||
23 | IDMAC_IC_2 = 2, | ||
24 | IDMAC_ADC_1 = 2, | ||
25 | IDMAC_IC_3 = 3, | ||
26 | IDMAC_IC_4 = 4, | ||
27 | IDMAC_IC_5 = 5, | ||
28 | IDMAC_IC_6 = 6, | ||
29 | IDMAC_IC_7 = 7, /* IC (sensor data) to memory */ | ||
30 | IDMAC_IC_8 = 8, | ||
31 | IDMAC_IC_9 = 9, | ||
32 | IDMAC_IC_10 = 10, | ||
33 | IDMAC_IC_11 = 11, | ||
34 | IDMAC_IC_12 = 12, | ||
35 | IDMAC_IC_13 = 13, | ||
36 | IDMAC_SDC_0 = 14, /* Background synchronous display data */ | ||
37 | IDMAC_SDC_1 = 15, /* Foreground data (overlay) */ | ||
38 | IDMAC_SDC_2 = 16, | ||
39 | IDMAC_SDC_3 = 17, | ||
40 | IDMAC_ADC_2 = 18, | ||
41 | IDMAC_ADC_3 = 19, | ||
42 | IDMAC_ADC_4 = 20, | ||
43 | IDMAC_ADC_5 = 21, | ||
44 | IDMAC_ADC_6 = 22, | ||
45 | IDMAC_ADC_7 = 23, | ||
46 | IDMAC_PF_0 = 24, | ||
47 | IDMAC_PF_1 = 25, | ||
48 | IDMAC_PF_2 = 26, | ||
49 | IDMAC_PF_3 = 27, | ||
50 | IDMAC_PF_4 = 28, | ||
51 | IDMAC_PF_5 = 29, | ||
52 | IDMAC_PF_6 = 30, | ||
53 | IDMAC_PF_7 = 31, | ||
54 | }; | ||
55 | |||
56 | /* Order significant! */ | ||
57 | enum ipu_channel_status { | ||
58 | IPU_CHANNEL_FREE, | ||
59 | IPU_CHANNEL_INITIALIZED, | ||
60 | IPU_CHANNEL_READY, | ||
61 | IPU_CHANNEL_ENABLED, | ||
62 | }; | ||
63 | |||
64 | #define IPU_CHANNELS_NUM 32 | ||
65 | |||
66 | enum pixel_fmt { | ||
67 | /* 1 byte */ | ||
68 | IPU_PIX_FMT_GENERIC, | ||
69 | IPU_PIX_FMT_RGB332, | ||
70 | IPU_PIX_FMT_YUV420P, | ||
71 | IPU_PIX_FMT_YUV422P, | ||
72 | IPU_PIX_FMT_YUV420P2, | ||
73 | IPU_PIX_FMT_YVU422P, | ||
74 | /* 2 bytes */ | ||
75 | IPU_PIX_FMT_RGB565, | ||
76 | IPU_PIX_FMT_RGB666, | ||
77 | IPU_PIX_FMT_BGR666, | ||
78 | IPU_PIX_FMT_YUYV, | ||
79 | IPU_PIX_FMT_UYVY, | ||
80 | /* 3 bytes */ | ||
81 | IPU_PIX_FMT_RGB24, | ||
82 | IPU_PIX_FMT_BGR24, | ||
83 | /* 4 bytes */ | ||
84 | IPU_PIX_FMT_GENERIC_32, | ||
85 | IPU_PIX_FMT_RGB32, | ||
86 | IPU_PIX_FMT_BGR32, | ||
87 | IPU_PIX_FMT_ABGR32, | ||
88 | IPU_PIX_FMT_BGRA32, | ||
89 | IPU_PIX_FMT_RGBA32, | ||
90 | }; | ||
91 | |||
92 | enum ipu_color_space { | ||
93 | IPU_COLORSPACE_RGB, | ||
94 | IPU_COLORSPACE_YCBCR, | ||
95 | IPU_COLORSPACE_YUV | ||
96 | }; | ||
97 | |||
98 | /* | ||
99 | * Enumeration of IPU rotation modes | ||
100 | */ | ||
101 | enum ipu_rotate_mode { | ||
102 | /* Note the enum values correspond to BAM value */ | ||
103 | IPU_ROTATE_NONE = 0, | ||
104 | IPU_ROTATE_VERT_FLIP = 1, | ||
105 | IPU_ROTATE_HORIZ_FLIP = 2, | ||
106 | IPU_ROTATE_180 = 3, | ||
107 | IPU_ROTATE_90_RIGHT = 4, | ||
108 | IPU_ROTATE_90_RIGHT_VFLIP = 5, | ||
109 | IPU_ROTATE_90_RIGHT_HFLIP = 6, | ||
110 | IPU_ROTATE_90_LEFT = 7, | ||
111 | }; | ||
112 | |||
113 | /* | ||
114 | * Enumeration of DI ports for ADC. | ||
115 | */ | ||
116 | enum display_port { | ||
117 | DISP0, | ||
118 | DISP1, | ||
119 | DISP2, | ||
120 | DISP3 | ||
121 | }; | ||
122 | |||
123 | struct idmac_video_param { | ||
124 | unsigned short in_width; | ||
125 | unsigned short in_height; | ||
126 | uint32_t in_pixel_fmt; | ||
127 | unsigned short out_width; | ||
128 | unsigned short out_height; | ||
129 | uint32_t out_pixel_fmt; | ||
130 | unsigned short out_stride; | ||
131 | bool graphics_combine_en; | ||
132 | bool global_alpha_en; | ||
133 | bool key_color_en; | ||
134 | enum display_port disp; | ||
135 | unsigned short out_left; | ||
136 | unsigned short out_top; | ||
137 | }; | ||
138 | |||
139 | /* | ||
140 | * Union of initialization parameters for a logical channel. So far only video | ||
141 | * parameters are used. | ||
142 | */ | ||
143 | union ipu_channel_param { | ||
144 | struct idmac_video_param video; | ||
145 | }; | ||
146 | |||
147 | struct idmac_tx_desc { | ||
148 | struct dma_async_tx_descriptor txd; | ||
149 | struct scatterlist *sg; /* scatterlist for this */ | ||
150 | unsigned int sg_len; /* tx-descriptor. */ | ||
151 | struct list_head list; | ||
152 | }; | ||
153 | |||
154 | struct idmac_channel { | ||
155 | struct dma_chan dma_chan; | ||
156 | dma_cookie_t completed; /* last completed cookie */ | ||
157 | union ipu_channel_param params; | ||
158 | enum ipu_channel link; /* input channel, linked to the output */ | ||
159 | enum ipu_channel_status status; | ||
160 | void *client; /* Only one client per channel */ | ||
161 | unsigned int n_tx_desc; | ||
162 | struct idmac_tx_desc *desc; /* allocated tx-descriptors */ | ||
163 | struct scatterlist *sg[2]; /* scatterlist elements in buffer-0 and -1 */ | ||
164 | struct list_head free_list; /* free tx-descriptors */ | ||
165 | struct list_head queue; /* queued tx-descriptors */ | ||
166 | spinlock_t lock; /* protects sg[0,1], queue */ | ||
167 | struct mutex chan_mutex; /* protects status, cookie, free_list */ | ||
168 | bool sec_chan_en; | ||
169 | int active_buffer; | ||
170 | unsigned int eof_irq; | ||
171 | char eof_name[16]; /* EOF IRQ name for request_irq() */ | ||
172 | }; | ||
173 | |||
174 | #define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd) | ||
175 | #define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan) | ||
176 | |||
177 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h deleted file mode 100644 index d73f5e8ea9cb..000000000000 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_MXC_IRQS_H__ | ||
12 | #define __ASM_ARCH_MXC_IRQS_H__ | ||
13 | |||
14 | extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); | ||
15 | |||
16 | /* all normal IRQs can be FIQs */ | ||
17 | #define FIQ_START 0 | ||
18 | /* switch between IRQ and FIQ */ | ||
19 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); | ||
20 | |||
21 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h deleted file mode 100644 index 10343d1f87e1..000000000000 --- a/arch/arm/plat-mxc/include/mach/timex.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_MXC_TIMEX_H__ | ||
17 | #define __ASM_ARCH_MXC_TIMEX_H__ | ||
18 | |||
19 | /* Bogus value */ | ||
20 | #define CLOCK_TICK_RATE 12345678 | ||
21 | |||
22 | #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h deleted file mode 100644 index 477971b00930..000000000000 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,132 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-mxc/include/mach/uncompress.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) Shane Nay (shane@minirl.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | */ | ||
17 | #ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__ | ||
18 | #define __ASM_ARCH_MXC_UNCOMPRESS_H__ | ||
19 | |||
20 | #define __MXC_BOOT_UNCOMPRESS | ||
21 | |||
22 | #include <asm/mach-types.h> | ||
23 | |||
24 | unsigned long uart_base; | ||
25 | |||
26 | #define UART(x) (*(volatile unsigned long *)(uart_base + (x))) | ||
27 | |||
28 | #define USR2 0x98 | ||
29 | #define USR2_TXFE (1<<14) | ||
30 | #define TXR 0x40 | ||
31 | #define UCR1 0x80 | ||
32 | #define UCR1_UARTEN 1 | ||
33 | |||
34 | /* | ||
35 | * The following code assumes the serial port has already been | ||
36 | * initialized by the bootloader. We search for the first enabled | ||
37 | * port in the most probable order. If you didn't setup a port in | ||
38 | * your bootloader then nothing will appear (which might be desired). | ||
39 | * | ||
40 | * This does not append a newline | ||
41 | */ | ||
42 | |||
43 | static void putc(int ch) | ||
44 | { | ||
45 | if (!uart_base) | ||
46 | return; | ||
47 | if (!(UART(UCR1) & UCR1_UARTEN)) | ||
48 | return; | ||
49 | |||
50 | while (!(UART(USR2) & USR2_TXFE)) | ||
51 | barrier(); | ||
52 | |||
53 | UART(TXR) = ch; | ||
54 | } | ||
55 | |||
56 | static inline void flush(void) | ||
57 | { | ||
58 | } | ||
59 | |||
60 | #define MX1_UART1_BASE_ADDR 0x00206000 | ||
61 | #define MX25_UART1_BASE_ADDR 0x43f90000 | ||
62 | #define MX2X_UART1_BASE_ADDR 0x1000a000 | ||
63 | #define MX3X_UART1_BASE_ADDR 0x43F90000 | ||
64 | #define MX3X_UART2_BASE_ADDR 0x43F94000 | ||
65 | #define MX3X_UART5_BASE_ADDR 0x43FB4000 | ||
66 | #define MX51_UART1_BASE_ADDR 0x73fbc000 | ||
67 | #define MX50_UART1_BASE_ADDR 0x53fbc000 | ||
68 | #define MX53_UART1_BASE_ADDR 0x53fbc000 | ||
69 | |||
70 | static __inline__ void __arch_decomp_setup(unsigned long arch_id) | ||
71 | { | ||
72 | switch (arch_id) { | ||
73 | case MACH_TYPE_MX1ADS: | ||
74 | case MACH_TYPE_SCB9328: | ||
75 | uart_base = MX1_UART1_BASE_ADDR; | ||
76 | break; | ||
77 | case MACH_TYPE_MX25_3DS: | ||
78 | uart_base = MX25_UART1_BASE_ADDR; | ||
79 | break; | ||
80 | case MACH_TYPE_IMX27LITE: | ||
81 | case MACH_TYPE_MX27_3DS: | ||
82 | case MACH_TYPE_MX27ADS: | ||
83 | case MACH_TYPE_PCM038: | ||
84 | case MACH_TYPE_MX21ADS: | ||
85 | case MACH_TYPE_PCA100: | ||
86 | case MACH_TYPE_MXT_TD60: | ||
87 | case MACH_TYPE_IMX27IPCAM: | ||
88 | uart_base = MX2X_UART1_BASE_ADDR; | ||
89 | break; | ||
90 | case MACH_TYPE_MX31LITE: | ||
91 | case MACH_TYPE_ARMADILLO5X0: | ||
92 | case MACH_TYPE_MX31MOBOARD: | ||
93 | case MACH_TYPE_QONG: | ||
94 | case MACH_TYPE_MX31_3DS: | ||
95 | case MACH_TYPE_PCM037: | ||
96 | case MACH_TYPE_MX31ADS: | ||
97 | case MACH_TYPE_MX35_3DS: | ||
98 | case MACH_TYPE_PCM043: | ||
99 | case MACH_TYPE_LILLY1131: | ||
100 | case MACH_TYPE_VPR200: | ||
101 | case MACH_TYPE_EUKREA_CPUIMX35SD: | ||
102 | uart_base = MX3X_UART1_BASE_ADDR; | ||
103 | break; | ||
104 | case MACH_TYPE_MAGX_ZN5: | ||
105 | uart_base = MX3X_UART2_BASE_ADDR; | ||
106 | break; | ||
107 | case MACH_TYPE_BUG: | ||
108 | uart_base = MX3X_UART5_BASE_ADDR; | ||
109 | break; | ||
110 | case MACH_TYPE_MX51_BABBAGE: | ||
111 | case MACH_TYPE_EUKREA_CPUIMX51SD: | ||
112 | case MACH_TYPE_MX51_3DS: | ||
113 | uart_base = MX51_UART1_BASE_ADDR; | ||
114 | break; | ||
115 | case MACH_TYPE_MX50_RDP: | ||
116 | uart_base = MX50_UART1_BASE_ADDR; | ||
117 | break; | ||
118 | case MACH_TYPE_MX53_EVK: | ||
119 | case MACH_TYPE_MX53_LOCO: | ||
120 | case MACH_TYPE_MX53_SMD: | ||
121 | case MACH_TYPE_MX53_ARD: | ||
122 | uart_base = MX53_UART1_BASE_ADDR; | ||
123 | break; | ||
124 | default: | ||
125 | break; | ||
126 | } | ||
127 | } | ||
128 | |||
129 | #define arch_decomp_setup() __arch_decomp_setup(arch_id) | ||
130 | #define arch_decomp_wdog() | ||
131 | |||
132 | #endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */ | ||
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 82fcb206b5b2..665870dce3c8 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -154,6 +154,12 @@ config OMAP_32K_TIMER | |||
154 | intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is | 154 | intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is |
155 | currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5. | 155 | currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5. |
156 | 156 | ||
157 | On OMAP2PLUS this value is only used for CONFIG_HZ and | ||
158 | CLOCK_TICK_RATE compile time calculation. | ||
159 | The actual timer selection is done in the board file | ||
160 | through the (DT_)MACHINE_START structure. | ||
161 | |||
162 | |||
157 | config OMAP3_L2_AUX_SECURE_SAVE_RESTORE | 163 | config OMAP3_L2_AUX_SECURE_SAVE_RESTORE |
158 | bool "OMAP3 HS/EMU save and restore for L2 AUX control register" | 164 | bool "OMAP3 HS/EMU save and restore for L2 AUX control register" |
159 | depends on ARCH_OMAP3 && PM | 165 | depends on ARCH_OMAP3 && PM |
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c index c43ea21f33b4..aa7ebc6bcd65 100644 --- a/arch/arm/plat-omap/debug-leds.c +++ b/arch/arm/plat-omap/debug-leds.c | |||
@@ -111,7 +111,7 @@ static int fpga_probe(struct platform_device *pdev) | |||
111 | if (!iomem) | 111 | if (!iomem) |
112 | return -ENODEV; | 112 | return -ENODEV; |
113 | 113 | ||
114 | fpga = ioremap(iomem->start, H2P2_DBG_FPGA_SIZE); | 114 | fpga = ioremap(iomem->start, resource_size(iomem)); |
115 | __raw_writew(0xff, &fpga->leds); | 115 | __raw_writew(0xff, &fpga->leds); |
116 | 116 | ||
117 | for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) { | 117 | for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) { |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 82231a75abd6..89585c293554 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -35,11 +35,16 @@ | |||
35 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 35 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
36 | */ | 36 | */ |
37 | 37 | ||
38 | #include <linux/clk.h> | ||
38 | #include <linux/module.h> | 39 | #include <linux/module.h> |
39 | #include <linux/io.h> | 40 | #include <linux/io.h> |
40 | #include <linux/device.h> | 41 | #include <linux/device.h> |
41 | #include <linux/err.h> | 42 | #include <linux/err.h> |
42 | #include <linux/pm_runtime.h> | 43 | #include <linux/pm_runtime.h> |
44 | #include <linux/of.h> | ||
45 | #include <linux/of_device.h> | ||
46 | #include <linux/platform_device.h> | ||
47 | #include <linux/platform_data/dmtimer-omap.h> | ||
43 | 48 | ||
44 | #include <plat/dmtimer.h> | 49 | #include <plat/dmtimer.h> |
45 | 50 | ||
@@ -81,10 +86,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, | |||
81 | 86 | ||
82 | static void omap_timer_restore_context(struct omap_dm_timer *timer) | 87 | static void omap_timer_restore_context(struct omap_dm_timer *timer) |
83 | { | 88 | { |
84 | if (timer->revision == 1) | ||
85 | __raw_writel(timer->context.tistat, timer->sys_stat); | ||
86 | |||
87 | __raw_writel(timer->context.tisr, timer->irq_stat); | ||
88 | omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, | 89 | omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, |
89 | timer->context.twer); | 90 | timer->context.twer); |
90 | omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, | 91 | omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, |
@@ -100,39 +101,38 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer) | |||
100 | timer->context.tclr); | 101 | timer->context.tclr); |
101 | } | 102 | } |
102 | 103 | ||
103 | static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) | 104 | static int omap_dm_timer_reset(struct omap_dm_timer *timer) |
104 | { | 105 | { |
105 | int c; | 106 | u32 l, timeout = 100000; |
106 | 107 | ||
107 | if (!timer->sys_stat) | 108 | if (timer->revision != 1) |
108 | return; | 109 | return -EINVAL; |
109 | 110 | ||
110 | c = 0; | 111 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); |
111 | while (!(__raw_readl(timer->sys_stat) & 1)) { | ||
112 | c++; | ||
113 | if (c > 100000) { | ||
114 | printk(KERN_ERR "Timer failed to reset\n"); | ||
115 | return; | ||
116 | } | ||
117 | } | ||
118 | } | ||
119 | 112 | ||
120 | static void omap_dm_timer_reset(struct omap_dm_timer *timer) | 113 | do { |
121 | { | 114 | l = __omap_dm_timer_read(timer, |
122 | omap_dm_timer_enable(timer); | 115 | OMAP_TIMER_V1_SYS_STAT_OFFSET, 0); |
123 | if (timer->pdev->id != 1) { | 116 | } while (!l && timeout--); |
124 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); | 117 | |
125 | omap_dm_timer_wait_for_reset(timer); | 118 | if (!timeout) { |
119 | dev_err(&timer->pdev->dev, "Timer failed to reset\n"); | ||
120 | return -ETIMEDOUT; | ||
126 | } | 121 | } |
127 | 122 | ||
128 | __omap_dm_timer_reset(timer, 0, 0); | 123 | /* Configure timer for smart-idle mode */ |
129 | omap_dm_timer_disable(timer); | 124 | l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0); |
130 | timer->posted = 1; | 125 | l |= 0x2 << 0x3; |
126 | __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0); | ||
127 | |||
128 | timer->posted = 0; | ||
129 | |||
130 | return 0; | ||
131 | } | 131 | } |
132 | 132 | ||
133 | int omap_dm_timer_prepare(struct omap_dm_timer *timer) | 133 | static int omap_dm_timer_prepare(struct omap_dm_timer *timer) |
134 | { | 134 | { |
135 | int ret; | 135 | int rc; |
136 | 136 | ||
137 | /* | 137 | /* |
138 | * FIXME: OMAP1 devices do not use the clock framework for dmtimers so | 138 | * FIXME: OMAP1 devices do not use the clock framework for dmtimers so |
@@ -147,13 +147,20 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer) | |||
147 | } | 147 | } |
148 | } | 148 | } |
149 | 149 | ||
150 | if (timer->capability & OMAP_TIMER_NEEDS_RESET) | 150 | omap_dm_timer_enable(timer); |
151 | omap_dm_timer_reset(timer); | 151 | |
152 | if (timer->capability & OMAP_TIMER_NEEDS_RESET) { | ||
153 | rc = omap_dm_timer_reset(timer); | ||
154 | if (rc) { | ||
155 | omap_dm_timer_disable(timer); | ||
156 | return rc; | ||
157 | } | ||
158 | } | ||
152 | 159 | ||
153 | ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); | 160 | __omap_dm_timer_enable_posted(timer); |
161 | omap_dm_timer_disable(timer); | ||
154 | 162 | ||
155 | timer->posted = 1; | 163 | return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); |
156 | return ret; | ||
157 | } | 164 | } |
158 | 165 | ||
159 | static inline u32 omap_dm_timer_reserved_systimer(int id) | 166 | static inline u32 omap_dm_timer_reserved_systimer(int id) |
@@ -209,6 +216,13 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) | |||
209 | unsigned long flags; | 216 | unsigned long flags; |
210 | int ret = 0; | 217 | int ret = 0; |
211 | 218 | ||
219 | /* Requesting timer by ID is not supported when device tree is used */ | ||
220 | if (of_have_populated_dt()) { | ||
221 | pr_warn("%s: Please use omap_dm_timer_request_by_cap()\n", | ||
222 | __func__); | ||
223 | return NULL; | ||
224 | } | ||
225 | |||
212 | spin_lock_irqsave(&dm_timer_lock, flags); | 226 | spin_lock_irqsave(&dm_timer_lock, flags); |
213 | list_for_each_entry(t, &omap_timer_list, node) { | 227 | list_for_each_entry(t, &omap_timer_list, node) { |
214 | if (t->pdev->id == id && !t->reserved) { | 228 | if (t->pdev->id == id && !t->reserved) { |
@@ -234,6 +248,58 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) | |||
234 | } | 248 | } |
235 | EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); | 249 | EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); |
236 | 250 | ||
251 | /** | ||
252 | * omap_dm_timer_request_by_cap - Request a timer by capability | ||
253 | * @cap: Bit mask of capabilities to match | ||
254 | * | ||
255 | * Find a timer based upon capabilities bit mask. Callers of this function | ||
256 | * should use the definitions found in the plat/dmtimer.h file under the | ||
257 | * comment "timer capabilities used in hwmod database". Returns pointer to | ||
258 | * timer handle on success and a NULL pointer on failure. | ||
259 | */ | ||
260 | struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap) | ||
261 | { | ||
262 | struct omap_dm_timer *timer = NULL, *t; | ||
263 | unsigned long flags; | ||
264 | |||
265 | if (!cap) | ||
266 | return NULL; | ||
267 | |||
268 | spin_lock_irqsave(&dm_timer_lock, flags); | ||
269 | list_for_each_entry(t, &omap_timer_list, node) { | ||
270 | if ((!t->reserved) && ((t->capability & cap) == cap)) { | ||
271 | /* | ||
272 | * If timer is not NULL, we have already found one timer | ||
273 | * but it was not an exact match because it had more | ||
274 | * capabilites that what was required. Therefore, | ||
275 | * unreserve the last timer found and see if this one | ||
276 | * is a better match. | ||
277 | */ | ||
278 | if (timer) | ||
279 | timer->reserved = 0; | ||
280 | |||
281 | timer = t; | ||
282 | timer->reserved = 1; | ||
283 | |||
284 | /* Exit loop early if we find an exact match */ | ||
285 | if (t->capability == cap) | ||
286 | break; | ||
287 | } | ||
288 | } | ||
289 | spin_unlock_irqrestore(&dm_timer_lock, flags); | ||
290 | |||
291 | if (timer && omap_dm_timer_prepare(timer)) { | ||
292 | timer->reserved = 0; | ||
293 | timer = NULL; | ||
294 | } | ||
295 | |||
296 | if (!timer) | ||
297 | pr_debug("%s: timer request failed!\n", __func__); | ||
298 | |||
299 | return timer; | ||
300 | } | ||
301 | EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap); | ||
302 | |||
237 | int omap_dm_timer_free(struct omap_dm_timer *timer) | 303 | int omap_dm_timer_free(struct omap_dm_timer *timer) |
238 | { | 304 | { |
239 | if (unlikely(!timer)) | 305 | if (unlikely(!timer)) |
@@ -388,7 +454,6 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer) | |||
388 | */ | 454 | */ |
389 | timer->context.tclr = | 455 | timer->context.tclr = |
390 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); | 456 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); |
391 | timer->context.tisr = __raw_readl(timer->irq_stat); | ||
392 | omap_dm_timer_disable(timer); | 457 | omap_dm_timer_disable(timer); |
393 | return 0; | 458 | return 0; |
394 | } | 459 | } |
@@ -398,7 +463,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | |||
398 | { | 463 | { |
399 | int ret; | 464 | int ret; |
400 | char *parent_name = NULL; | 465 | char *parent_name = NULL; |
401 | struct clk *fclk, *parent; | 466 | struct clk *parent; |
402 | struct dmtimer_platform_data *pdata; | 467 | struct dmtimer_platform_data *pdata; |
403 | 468 | ||
404 | if (unlikely(!timer)) | 469 | if (unlikely(!timer)) |
@@ -414,14 +479,11 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | |||
414 | * use the clock framework to set the parent clock. To be removed | 479 | * use the clock framework to set the parent clock. To be removed |
415 | * once OMAP1 migrated to using clock framework for dmtimers | 480 | * once OMAP1 migrated to using clock framework for dmtimers |
416 | */ | 481 | */ |
417 | if (pdata->set_timer_src) | 482 | if (pdata && pdata->set_timer_src) |
418 | return pdata->set_timer_src(timer->pdev, source); | 483 | return pdata->set_timer_src(timer->pdev, source); |
419 | 484 | ||
420 | fclk = clk_get(&timer->pdev->dev, "fck"); | 485 | if (!timer->fclk) |
421 | if (IS_ERR_OR_NULL(fclk)) { | ||
422 | pr_err("%s: fck not found\n", __func__); | ||
423 | return -EINVAL; | 486 | return -EINVAL; |
424 | } | ||
425 | 487 | ||
426 | switch (source) { | 488 | switch (source) { |
427 | case OMAP_TIMER_SRC_SYS_CLK: | 489 | case OMAP_TIMER_SRC_SYS_CLK: |
@@ -440,18 +502,15 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | |||
440 | parent = clk_get(&timer->pdev->dev, parent_name); | 502 | parent = clk_get(&timer->pdev->dev, parent_name); |
441 | if (IS_ERR_OR_NULL(parent)) { | 503 | if (IS_ERR_OR_NULL(parent)) { |
442 | pr_err("%s: %s not found\n", __func__, parent_name); | 504 | pr_err("%s: %s not found\n", __func__, parent_name); |
443 | ret = -EINVAL; | 505 | return -EINVAL; |
444 | goto out; | ||
445 | } | 506 | } |
446 | 507 | ||
447 | ret = clk_set_parent(fclk, parent); | 508 | ret = clk_set_parent(timer->fclk, parent); |
448 | if (IS_ERR_VALUE(ret)) | 509 | if (IS_ERR_VALUE(ret)) |
449 | pr_err("%s: failed to set %s as parent\n", __func__, | 510 | pr_err("%s: failed to set %s as parent\n", __func__, |
450 | parent_name); | 511 | parent_name); |
451 | 512 | ||
452 | clk_put(parent); | 513 | clk_put(parent); |
453 | out: | ||
454 | clk_put(fclk); | ||
455 | 514 | ||
456 | return ret; | 515 | return ret; |
457 | } | 516 | } |
@@ -534,8 +593,8 @@ int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, | |||
534 | l |= OMAP_TIMER_CTRL_CE; | 593 | l |= OMAP_TIMER_CTRL_CE; |
535 | else | 594 | else |
536 | l &= ~OMAP_TIMER_CTRL_CE; | 595 | l &= ~OMAP_TIMER_CTRL_CE; |
537 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); | ||
538 | omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); | 596 | omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); |
597 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); | ||
539 | 598 | ||
540 | /* Save the context */ | 599 | /* Save the context */ |
541 | timer->context.tclr = l; | 600 | timer->context.tclr = l; |
@@ -611,6 +670,37 @@ int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, | |||
611 | } | 670 | } |
612 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); | 671 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); |
613 | 672 | ||
673 | /** | ||
674 | * omap_dm_timer_set_int_disable - disable timer interrupts | ||
675 | * @timer: pointer to timer handle | ||
676 | * @mask: bit mask of interrupts to be disabled | ||
677 | * | ||
678 | * Disables the specified timer interrupts for a timer. | ||
679 | */ | ||
680 | int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask) | ||
681 | { | ||
682 | u32 l = mask; | ||
683 | |||
684 | if (unlikely(!timer)) | ||
685 | return -EINVAL; | ||
686 | |||
687 | omap_dm_timer_enable(timer); | ||
688 | |||
689 | if (timer->revision == 1) | ||
690 | l = __raw_readl(timer->irq_ena) & ~mask; | ||
691 | |||
692 | __raw_writel(l, timer->irq_dis); | ||
693 | l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask; | ||
694 | omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l); | ||
695 | |||
696 | /* Save the context */ | ||
697 | timer->context.tier &= ~mask; | ||
698 | timer->context.twer &= ~mask; | ||
699 | omap_dm_timer_disable(timer); | ||
700 | return 0; | ||
701 | } | ||
702 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable); | ||
703 | |||
614 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) | 704 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) |
615 | { | 705 | { |
616 | unsigned int l; | 706 | unsigned int l; |
@@ -632,8 +722,7 @@ int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) | |||
632 | return -EINVAL; | 722 | return -EINVAL; |
633 | 723 | ||
634 | __omap_dm_timer_write_status(timer, value); | 724 | __omap_dm_timer_write_status(timer, value); |
635 | /* Save the context */ | 725 | |
636 | timer->context.tisr = value; | ||
637 | return 0; | 726 | return 0; |
638 | } | 727 | } |
639 | EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); | 728 | EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); |
@@ -696,7 +785,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) | |||
696 | struct device *dev = &pdev->dev; | 785 | struct device *dev = &pdev->dev; |
697 | struct dmtimer_platform_data *pdata = pdev->dev.platform_data; | 786 | struct dmtimer_platform_data *pdata = pdev->dev.platform_data; |
698 | 787 | ||
699 | if (!pdata) { | 788 | if (!pdata && !dev->of_node) { |
700 | dev_err(dev, "%s: no platform data.\n", __func__); | 789 | dev_err(dev, "%s: no platform data.\n", __func__); |
701 | return -ENODEV; | 790 | return -ENODEV; |
702 | } | 791 | } |
@@ -725,12 +814,25 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) | |||
725 | return -ENOMEM; | 814 | return -ENOMEM; |
726 | } | 815 | } |
727 | 816 | ||
728 | timer->id = pdev->id; | 817 | if (dev->of_node) { |
818 | if (of_find_property(dev->of_node, "ti,timer-alwon", NULL)) | ||
819 | timer->capability |= OMAP_TIMER_ALWON; | ||
820 | if (of_find_property(dev->of_node, "ti,timer-dsp", NULL)) | ||
821 | timer->capability |= OMAP_TIMER_HAS_DSP_IRQ; | ||
822 | if (of_find_property(dev->of_node, "ti,timer-pwm", NULL)) | ||
823 | timer->capability |= OMAP_TIMER_HAS_PWM; | ||
824 | if (of_find_property(dev->of_node, "ti,timer-secure", NULL)) | ||
825 | timer->capability |= OMAP_TIMER_SECURE; | ||
826 | } else { | ||
827 | timer->id = pdev->id; | ||
828 | timer->errata = pdata->timer_errata; | ||
829 | timer->capability = pdata->timer_capability; | ||
830 | timer->reserved = omap_dm_timer_reserved_systimer(timer->id); | ||
831 | timer->get_context_loss_count = pdata->get_context_loss_count; | ||
832 | } | ||
833 | |||
729 | timer->irq = irq->start; | 834 | timer->irq = irq->start; |
730 | timer->reserved = omap_dm_timer_reserved_systimer(timer->id); | ||
731 | timer->pdev = pdev; | 835 | timer->pdev = pdev; |
732 | timer->capability = pdata->timer_capability; | ||
733 | timer->get_context_loss_count = pdata->get_context_loss_count; | ||
734 | 836 | ||
735 | /* Skip pm_runtime_enable for OMAP1 */ | 837 | /* Skip pm_runtime_enable for OMAP1 */ |
736 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { | 838 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { |
@@ -770,7 +872,8 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev) | |||
770 | 872 | ||
771 | spin_lock_irqsave(&dm_timer_lock, flags); | 873 | spin_lock_irqsave(&dm_timer_lock, flags); |
772 | list_for_each_entry(timer, &omap_timer_list, node) | 874 | list_for_each_entry(timer, &omap_timer_list, node) |
773 | if (timer->pdev->id == pdev->id) { | 875 | if (!strcmp(dev_name(&timer->pdev->dev), |
876 | dev_name(&pdev->dev))) { | ||
774 | list_del(&timer->node); | 877 | list_del(&timer->node); |
775 | ret = 0; | 878 | ret = 0; |
776 | break; | 879 | break; |
@@ -780,11 +883,18 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev) | |||
780 | return ret; | 883 | return ret; |
781 | } | 884 | } |
782 | 885 | ||
886 | static const struct of_device_id omap_timer_match[] = { | ||
887 | { .compatible = "ti,omap2-timer", }, | ||
888 | {}, | ||
889 | }; | ||
890 | MODULE_DEVICE_TABLE(of, omap_timer_match); | ||
891 | |||
783 | static struct platform_driver omap_dm_timer_driver = { | 892 | static struct platform_driver omap_dm_timer_driver = { |
784 | .probe = omap_dm_timer_probe, | 893 | .probe = omap_dm_timer_probe, |
785 | .remove = __devexit_p(omap_dm_timer_remove), | 894 | .remove = __devexit_p(omap_dm_timer_remove), |
786 | .driver = { | 895 | .driver = { |
787 | .name = "omap_timer", | 896 | .name = "omap_timer", |
897 | .of_match_table = of_match_ptr(omap_timer_match), | ||
788 | }, | 898 | }, |
789 | }; | 899 | }; |
790 | 900 | ||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 3f5b9cfd9c0b..a3fbc48c332e 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | |||
@@ -32,7 +32,6 @@ | |||
32 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 32 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
33 | */ | 33 | */ |
34 | 34 | ||
35 | #include <linux/clk.h> | ||
36 | #include <linux/delay.h> | 35 | #include <linux/delay.h> |
37 | #include <linux/io.h> | 36 | #include <linux/io.h> |
38 | #include <linux/platform_device.h> | 37 | #include <linux/platform_device.h> |
@@ -55,6 +54,10 @@ | |||
55 | #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 | 54 | #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 |
56 | #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 | 55 | #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 |
57 | 56 | ||
57 | /* posted mode types */ | ||
58 | #define OMAP_TIMER_NONPOSTED 0x00 | ||
59 | #define OMAP_TIMER_POSTED 0x01 | ||
60 | |||
58 | /* timer capabilities used in hwmod database */ | 61 | /* timer capabilities used in hwmod database */ |
59 | #define OMAP_TIMER_SECURE 0x80000000 | 62 | #define OMAP_TIMER_SECURE 0x80000000 |
60 | #define OMAP_TIMER_ALWON 0x40000000 | 63 | #define OMAP_TIMER_ALWON 0x40000000 |
@@ -62,16 +65,22 @@ | |||
62 | #define OMAP_TIMER_NEEDS_RESET 0x10000000 | 65 | #define OMAP_TIMER_NEEDS_RESET 0x10000000 |
63 | #define OMAP_TIMER_HAS_DSP_IRQ 0x08000000 | 66 | #define OMAP_TIMER_HAS_DSP_IRQ 0x08000000 |
64 | 67 | ||
68 | /* | ||
69 | * timer errata flags | ||
70 | * | ||
71 | * Errata i103/i767 impacts all OMAP3/4/5 devices including AM33xx. This | ||
72 | * errata prevents us from using posted mode on these devices, unless the | ||
73 | * timer counter register is never read. For more details please refer to | ||
74 | * the OMAP3/4/5 errata documents. | ||
75 | */ | ||
76 | #define OMAP_TIMER_ERRATA_I103_I767 0x80000000 | ||
77 | |||
65 | struct omap_timer_capability_dev_attr { | 78 | struct omap_timer_capability_dev_attr { |
66 | u32 timer_capability; | 79 | u32 timer_capability; |
67 | }; | 80 | }; |
68 | 81 | ||
69 | struct omap_dm_timer; | ||
70 | |||
71 | struct timer_regs { | 82 | struct timer_regs { |
72 | u32 tidr; | 83 | u32 tidr; |
73 | u32 tistat; | ||
74 | u32 tisr; | ||
75 | u32 tier; | 84 | u32 tier; |
76 | u32 twer; | 85 | u32 twer; |
77 | u32 tclr; | 86 | u32 tclr; |
@@ -90,16 +99,35 @@ struct timer_regs { | |||
90 | u32 towr; | 99 | u32 towr; |
91 | }; | 100 | }; |
92 | 101 | ||
93 | struct dmtimer_platform_data { | 102 | struct omap_dm_timer { |
94 | /* set_timer_src - Only used for OMAP1 devices */ | 103 | int id; |
95 | int (*set_timer_src)(struct platform_device *pdev, int source); | 104 | int irq; |
96 | u32 timer_capability; | 105 | struct clk *fclk; |
106 | |||
107 | void __iomem *io_base; | ||
108 | void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */ | ||
109 | void __iomem *irq_ena; /* irq enable */ | ||
110 | void __iomem *irq_dis; /* irq disable, only on v2 ip */ | ||
111 | void __iomem *pend; /* write pending */ | ||
112 | void __iomem *func_base; /* function register base */ | ||
113 | |||
114 | unsigned long rate; | ||
115 | unsigned reserved:1; | ||
116 | unsigned posted:1; | ||
117 | struct timer_regs context; | ||
97 | int (*get_context_loss_count)(struct device *); | 118 | int (*get_context_loss_count)(struct device *); |
119 | int ctx_loss_count; | ||
120 | int revision; | ||
121 | u32 capability; | ||
122 | u32 errata; | ||
123 | struct platform_device *pdev; | ||
124 | struct list_head node; | ||
98 | }; | 125 | }; |
99 | 126 | ||
100 | int omap_dm_timer_reserve_systimer(int id); | 127 | int omap_dm_timer_reserve_systimer(int id); |
101 | struct omap_dm_timer *omap_dm_timer_request(void); | 128 | struct omap_dm_timer *omap_dm_timer_request(void); |
102 | struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); | 129 | struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); |
130 | struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap); | ||
103 | int omap_dm_timer_free(struct omap_dm_timer *timer); | 131 | int omap_dm_timer_free(struct omap_dm_timer *timer); |
104 | void omap_dm_timer_enable(struct omap_dm_timer *timer); | 132 | void omap_dm_timer_enable(struct omap_dm_timer *timer); |
105 | void omap_dm_timer_disable(struct omap_dm_timer *timer); | 133 | void omap_dm_timer_disable(struct omap_dm_timer *timer); |
@@ -121,6 +149,7 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, i | |||
121 | int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); | 149 | int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); |
122 | 150 | ||
123 | int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); | 151 | int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); |
152 | int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask); | ||
124 | 153 | ||
125 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); | 154 | unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); |
126 | int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); | 155 | int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); |
@@ -246,34 +275,6 @@ int omap_dm_timers_active(void); | |||
246 | #define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ | 275 | #define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ |
247 | (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) | 276 | (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) |
248 | 277 | ||
249 | struct omap_dm_timer { | ||
250 | unsigned long phys_base; | ||
251 | int id; | ||
252 | int irq; | ||
253 | struct clk *fclk; | ||
254 | |||
255 | void __iomem *io_base; | ||
256 | void __iomem *sys_stat; /* TISTAT timer status */ | ||
257 | void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */ | ||
258 | void __iomem *irq_ena; /* irq enable */ | ||
259 | void __iomem *irq_dis; /* irq disable, only on v2 ip */ | ||
260 | void __iomem *pend; /* write pending */ | ||
261 | void __iomem *func_base; /* function register base */ | ||
262 | |||
263 | unsigned long rate; | ||
264 | unsigned reserved:1; | ||
265 | unsigned posted:1; | ||
266 | struct timer_regs context; | ||
267 | int (*get_context_loss_count)(struct device *); | ||
268 | int ctx_loss_count; | ||
269 | int revision; | ||
270 | u32 capability; | ||
271 | struct platform_device *pdev; | ||
272 | struct list_head node; | ||
273 | }; | ||
274 | |||
275 | int omap_dm_timer_prepare(struct omap_dm_timer *timer); | ||
276 | |||
277 | static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, | 278 | static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, |
278 | int posted) | 279 | int posted) |
279 | { | 280 | { |
@@ -302,16 +303,13 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) | |||
302 | tidr = __raw_readl(timer->io_base); | 303 | tidr = __raw_readl(timer->io_base); |
303 | if (!(tidr >> 16)) { | 304 | if (!(tidr >> 16)) { |
304 | timer->revision = 1; | 305 | timer->revision = 1; |
305 | timer->sys_stat = timer->io_base + | ||
306 | OMAP_TIMER_V1_SYS_STAT_OFFSET; | ||
307 | timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; | 306 | timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; |
308 | timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; | 307 | timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; |
309 | timer->irq_dis = NULL; | 308 | timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; |
310 | timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; | 309 | timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; |
311 | timer->func_base = timer->io_base; | 310 | timer->func_base = timer->io_base; |
312 | } else { | 311 | } else { |
313 | timer->revision = 2; | 312 | timer->revision = 2; |
314 | timer->sys_stat = NULL; | ||
315 | timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; | 313 | timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; |
316 | timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; | 314 | timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; |
317 | timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; | 315 | timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; |
@@ -322,45 +320,44 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) | |||
322 | } | 320 | } |
323 | } | 321 | } |
324 | 322 | ||
325 | /* Assumes the source clock has been set by caller */ | 323 | /* |
326 | static inline void __omap_dm_timer_reset(struct omap_dm_timer *timer, | 324 | * __omap_dm_timer_enable_posted - enables write posted mode |
327 | int autoidle, int wakeup) | 325 | * @timer: pointer to timer instance handle |
326 | * | ||
327 | * Enables the write posted mode for the timer. When posted mode is enabled | ||
328 | * writes to certain timer registers are immediately acknowledged by the | ||
329 | * internal bus and hence prevents stalling the CPU waiting for the write to | ||
330 | * complete. Enabling this feature can improve performance for writing to the | ||
331 | * timer registers. | ||
332 | */ | ||
333 | static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer) | ||
328 | { | 334 | { |
329 | u32 l; | 335 | if (timer->posted) |
336 | return; | ||
330 | 337 | ||
331 | l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET); | 338 | if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) |
332 | l |= 0x02 << 3; /* Set to smart-idle mode */ | 339 | return; |
333 | l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ | ||
334 | 340 | ||
335 | if (autoidle) | ||
336 | l |= 0x1 << 0; | ||
337 | |||
338 | if (wakeup) | ||
339 | l |= 1 << 2; | ||
340 | |||
341 | __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET); | ||
342 | |||
343 | /* Match hardware reset default of posted mode */ | ||
344 | __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, | 341 | __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, |
345 | OMAP_TIMER_CTRL_POSTED, 0); | 342 | OMAP_TIMER_CTRL_POSTED, 0); |
343 | timer->context.tsicr = OMAP_TIMER_CTRL_POSTED; | ||
344 | timer->posted = OMAP_TIMER_POSTED; | ||
346 | } | 345 | } |
347 | 346 | ||
348 | static inline int __omap_dm_timer_set_source(struct clk *timer_fck, | 347 | /** |
349 | struct clk *parent) | 348 | * __omap_dm_timer_override_errata - override errata flags for a timer |
349 | * @timer: pointer to timer handle | ||
350 | * @errata: errata flags to be ignored | ||
351 | * | ||
352 | * For a given timer, override a timer errata by clearing the flags | ||
353 | * specified by the errata argument. A specific erratum should only be | ||
354 | * overridden for a timer if the timer is used in such a way the erratum | ||
355 | * has no impact. | ||
356 | */ | ||
357 | static inline void __omap_dm_timer_override_errata(struct omap_dm_timer *timer, | ||
358 | u32 errata) | ||
350 | { | 359 | { |
351 | int ret; | 360 | timer->errata &= ~errata; |
352 | |||
353 | clk_disable(timer_fck); | ||
354 | ret = clk_set_parent(timer_fck, parent); | ||
355 | clk_enable(timer_fck); | ||
356 | |||
357 | /* | ||
358 | * When the functional clock disappears, too quick writes seem | ||
359 | * to cause an abort. XXX Is this still necessary? | ||
360 | */ | ||
361 | __delay(300000); | ||
362 | |||
363 | return ret; | ||
364 | } | 361 | } |
365 | 362 | ||
366 | static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer, | 363 | static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer, |
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h deleted file mode 100644 index 267f43bb2a4e..000000000000 --- a/arch/arm/plat-omap/include/plat/prcm.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/prcm.h | ||
3 | * | ||
4 | * Access definations for use in OMAP24XX clock and power management | ||
5 | * | ||
6 | * Copyright (C) 2005 Texas Instruments, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | * | ||
22 | * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem, | ||
23 | * so this file doesn't belong in plat-omap/include/plat. Please | ||
24 | * do not add anything new to this file. | ||
25 | */ | ||
26 | |||
27 | #ifndef __ASM_ARM_ARCH_OMAP_PRCM_H | ||
28 | #define __ASM_ARM_ARCH_OMAP_PRCM_H | ||
29 | |||
30 | u32 omap_prcm_get_reset_sources(void); | ||
31 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, | ||
32 | const char *name); | ||
33 | |||
34 | #endif | ||
35 | |||
36 | |||
37 | |||
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile index af8e484001e5..1fc941944912 100644 --- a/arch/arm/plat-pxa/Makefile +++ b/arch/arm/plat-pxa/Makefile | |||
@@ -5,7 +5,6 @@ | |||
5 | obj-y := dma.o | 5 | obj-y := dma.o |
6 | 6 | ||
7 | obj-$(CONFIG_PXA3xx) += mfp.o | 7 | obj-$(CONFIG_PXA3xx) += mfp.o |
8 | obj-$(CONFIG_PXA95x) += mfp.o | ||
9 | obj-$(CONFIG_ARCH_MMP) += mfp.o | 8 | obj-$(CONFIG_ARCH_MMP) += mfp.o |
10 | 9 | ||
11 | obj-$(CONFIG_PXA_SSP) += ssp.o | 10 | obj-$(CONFIG_PXA_SSP) += ssp.o |
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h index 5c79c29f2833..10bc4f3757d1 100644 --- a/arch/arm/plat-pxa/include/plat/mfp.h +++ b/arch/arm/plat-pxa/include/plat/mfp.h | |||
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t; | |||
423 | ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\ | 423 | ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\ |
424 | (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm)) | 424 | (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm)) |
425 | 425 | ||
426 | #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP) | 426 | #if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP) |
427 | /* | 427 | /* |
428 | * each MFP pin will have a MFPR register, since the offset of the | 428 | * each MFP pin will have a MFPR register, since the offset of the |
429 | * register varies between processors, the processor specific code | 429 | * register varies between processors, the processor specific code |
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val); | |||
470 | void mfp_config(unsigned long *mfp_cfgs, int num); | 470 | void mfp_config(unsigned long *mfp_cfgs, int num); |
471 | void mfp_config_run(void); | 471 | void mfp_config_run(void); |
472 | void mfp_config_lpm(void); | 472 | void mfp_config_lpm(void); |
473 | #endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */ | 473 | #endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */ |
474 | 474 | ||
475 | #endif /* __ASM_PLAT_MFP_H */ | 475 | #endif /* __ASM_PLAT_MFP_H */ |
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index b1e05ccff3ac..37542c2689a2 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c | |||
@@ -344,7 +344,7 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
344 | int ret; | 344 | int ret; |
345 | unsigned tmp; | 345 | unsigned tmp; |
346 | 346 | ||
347 | adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL); | 347 | adc = devm_kzalloc(dev, sizeof(struct adc_device), GFP_KERNEL); |
348 | if (adc == NULL) { | 348 | if (adc == NULL) { |
349 | dev_err(dev, "failed to allocate adc_device\n"); | 349 | dev_err(dev, "failed to allocate adc_device\n"); |
350 | return -ENOMEM; | 350 | return -ENOMEM; |
@@ -355,50 +355,46 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
355 | adc->pdev = pdev; | 355 | adc->pdev = pdev; |
356 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); | 356 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); |
357 | 357 | ||
358 | adc->vdd = regulator_get(dev, "vdd"); | 358 | adc->vdd = devm_regulator_get(dev, "vdd"); |
359 | if (IS_ERR(adc->vdd)) { | 359 | if (IS_ERR(adc->vdd)) { |
360 | dev_err(dev, "operating without regulator \"vdd\" .\n"); | 360 | dev_err(dev, "operating without regulator \"vdd\" .\n"); |
361 | ret = PTR_ERR(adc->vdd); | 361 | return PTR_ERR(adc->vdd); |
362 | goto err_alloc; | ||
363 | } | 362 | } |
364 | 363 | ||
365 | adc->irq = platform_get_irq(pdev, 1); | 364 | adc->irq = platform_get_irq(pdev, 1); |
366 | if (adc->irq <= 0) { | 365 | if (adc->irq <= 0) { |
367 | dev_err(dev, "failed to get adc irq\n"); | 366 | dev_err(dev, "failed to get adc irq\n"); |
368 | ret = -ENOENT; | 367 | return -ENOENT; |
369 | goto err_reg; | ||
370 | } | 368 | } |
371 | 369 | ||
372 | ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc); | 370 | ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev), |
371 | adc); | ||
373 | if (ret < 0) { | 372 | if (ret < 0) { |
374 | dev_err(dev, "failed to attach adc irq\n"); | 373 | dev_err(dev, "failed to attach adc irq\n"); |
375 | goto err_reg; | 374 | return ret; |
376 | } | 375 | } |
377 | 376 | ||
378 | adc->clk = clk_get(dev, "adc"); | 377 | adc->clk = devm_clk_get(dev, "adc"); |
379 | if (IS_ERR(adc->clk)) { | 378 | if (IS_ERR(adc->clk)) { |
380 | dev_err(dev, "failed to get adc clock\n"); | 379 | dev_err(dev, "failed to get adc clock\n"); |
381 | ret = PTR_ERR(adc->clk); | 380 | return PTR_ERR(adc->clk); |
382 | goto err_irq; | ||
383 | } | 381 | } |
384 | 382 | ||
385 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 383 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
386 | if (!regs) { | 384 | if (!regs) { |
387 | dev_err(dev, "failed to find registers\n"); | 385 | dev_err(dev, "failed to find registers\n"); |
388 | ret = -ENXIO; | 386 | return -ENXIO; |
389 | goto err_clk; | ||
390 | } | 387 | } |
391 | 388 | ||
392 | adc->regs = ioremap(regs->start, resource_size(regs)); | 389 | adc->regs = devm_request_and_ioremap(dev, regs); |
393 | if (!adc->regs) { | 390 | if (!adc->regs) { |
394 | dev_err(dev, "failed to map registers\n"); | 391 | dev_err(dev, "failed to map registers\n"); |
395 | ret = -ENXIO; | 392 | return -ENXIO; |
396 | goto err_clk; | ||
397 | } | 393 | } |
398 | 394 | ||
399 | ret = regulator_enable(adc->vdd); | 395 | ret = regulator_enable(adc->vdd); |
400 | if (ret) | 396 | if (ret) |
401 | goto err_ioremap; | 397 | return ret; |
402 | 398 | ||
403 | clk_enable(adc->clk); | 399 | clk_enable(adc->clk); |
404 | 400 | ||
@@ -418,32 +414,14 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
418 | adc_dev = adc; | 414 | adc_dev = adc; |
419 | 415 | ||
420 | return 0; | 416 | return 0; |
421 | |||
422 | err_ioremap: | ||
423 | iounmap(adc->regs); | ||
424 | err_clk: | ||
425 | clk_put(adc->clk); | ||
426 | |||
427 | err_irq: | ||
428 | free_irq(adc->irq, adc); | ||
429 | err_reg: | ||
430 | regulator_put(adc->vdd); | ||
431 | err_alloc: | ||
432 | kfree(adc); | ||
433 | return ret; | ||
434 | } | 417 | } |
435 | 418 | ||
436 | static int __devexit s3c_adc_remove(struct platform_device *pdev) | 419 | static int __devexit s3c_adc_remove(struct platform_device *pdev) |
437 | { | 420 | { |
438 | struct adc_device *adc = platform_get_drvdata(pdev); | 421 | struct adc_device *adc = platform_get_drvdata(pdev); |
439 | 422 | ||
440 | iounmap(adc->regs); | ||
441 | free_irq(adc->irq, adc); | ||
442 | clk_disable(adc->clk); | 423 | clk_disable(adc->clk); |
443 | regulator_disable(adc->vdd); | 424 | regulator_disable(adc->vdd); |
444 | regulator_put(adc->vdd); | ||
445 | clk_put(adc->clk); | ||
446 | kfree(adc); | ||
447 | 425 | ||
448 | return 0; | 426 | return 0; |
449 | } | 427 | } |
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 03f654d55eff..a17d7b3e3725 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -486,11 +486,7 @@ static struct resource s3c_i2c0_resource[] = { | |||
486 | 486 | ||
487 | struct platform_device s3c_device_i2c0 = { | 487 | struct platform_device s3c_device_i2c0 = { |
488 | .name = "s3c2410-i2c", | 488 | .name = "s3c2410-i2c", |
489 | #ifdef CONFIG_S3C_DEV_I2C1 | ||
490 | .id = 0, | 489 | .id = 0, |
491 | #else | ||
492 | .id = -1, | ||
493 | #endif | ||
494 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), | 490 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), |
495 | .resource = s3c_i2c0_resource, | 491 | .resource = s3c_i2c0_resource, |
496 | }; | 492 | }; |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 5da4b4f38f40..a9b8096b8252 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -123,7 +123,6 @@ extern struct platform_device s5pv210_device_spdif; | |||
123 | 123 | ||
124 | extern struct platform_device exynos4_device_ac97; | 124 | extern struct platform_device exynos4_device_ac97; |
125 | extern struct platform_device exynos4_device_ahci; | 125 | extern struct platform_device exynos4_device_ahci; |
126 | extern struct platform_device exynos4_device_dwmci; | ||
127 | extern struct platform_device exynos4_device_i2s0; | 126 | extern struct platform_device exynos4_device_i2s0; |
128 | extern struct platform_device exynos4_device_i2s1; | 127 | extern struct platform_device exynos4_device_i2s1; |
129 | extern struct platform_device exynos4_device_i2s2; | 128 | extern struct platform_device exynos4_device_i2s2; |