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authorOlof Johansson <olof@lixom.net>2012-02-07 18:04:15 -0500
committerOlof Johansson <olof@lixom.net>2012-02-07 18:05:20 -0500
commita5f17d1f4c2831b9b9bf8b1a537cdbac995d6e13 (patch)
treecce7eab28de00a88d75b8eda704f5838e10947b1 /arch/arm
parentdcf81c1af839b77b44404453ecae6e5ac5a75f05 (diff)
parent62aa2b537c6f5957afd98e29f96897419ed5ebab (diff)
Merge tag 'v3.3-rc2' into depends/rmk/for-armsoc
There were conflicts between fixes going in after 3.3-rc1 and Russell's stable arm-soc base branch. Resolving it in the dependency branch so that each topic branch shares the same resolution. Conflicts: arch/arm/mach-at91/at91cap9.c arch/arm/mach-at91/at91sam9g45.c
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/common/gic.c7
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig (renamed from arch/arm/configs/mx5_defconfig)61
-rw-r--r--arch/arm/configs/mx3_defconfig144
-rw-r--r--arch/arm/include/asm/assembler.h4
-rw-r--r--arch/arm/include/asm/domain.h8
-rw-r--r--arch/arm/include/asm/futex.h8
-rw-r--r--arch/arm/include/asm/smp.h6
-rw-r--r--arch/arm/include/asm/smp_plat.h6
-rw-r--r--arch/arm/include/asm/uaccess.h16
-rw-r--r--arch/arm/kernel/entry-common.S15
-rw-r--r--arch/arm/kernel/setup.c17
-rw-r--r--arch/arm/kernel/smp.c24
-rw-r--r--arch/arm/kernel/smp_twd.c2
-rw-r--r--arch/arm/kernel/vmlinux.lds.S9
-rw-r--r--arch/arm/lib/getuser.S12
-rw-r--r--arch/arm/lib/putuser.S28
-rw-r--r--arch/arm/lib/uaccess.S82
-rw-r--r--arch/arm/mach-at91/Kconfig14
-rw-r--r--arch/arm/mach-at91/Makefile14
-rw-r--r--arch/arm/mach-at91/at91cap9.c9
-rw-r--r--arch/arm/mach-at91/at91sam9260.c1
-rw-r--r--arch/arm/mach-at91/at91sam9261.c1
-rw-r--r--arch/arm/mach-at91/at91sam9263.c1
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S7
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c7
-rw-r--r--arch/arm/mach-at91/at91sam9g45_reset.S40
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c1
-rw-r--r--arch/arm/mach-at91/generic.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rstc.h18
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h108
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h30
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h2
-rw-r--r--arch/arm/mach-at91/include/mach/board.h2
-rw-r--r--arch/arm/mach-at91/pm.c9
-rw-r--r--arch/arm/mach-at91/pm.h8
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S5
-rw-r--r--arch/arm/mach-at91/setup.c16
-rw-r--r--arch/arm/mach-exynos/hotplug.c1
-rw-r--r--arch/arm/mach-exynos/platsmp.c1
-rw-r--r--arch/arm/mach-highbank/highbank.c3
-rw-r--r--arch/arm/mach-imx/Kconfig238
-rw-r--r--arch/arm/mach-imx/Makefile21
-rw-r--r--arch/arm/mach-imx/Makefile.boot12
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c11
-rw-r--r--arch/arm/mach-imx/clock-mx51-mx53.c (renamed from arch/arm/mach-mx5/clock-mx51-mx53.c)2
-rw-r--r--arch/arm/mach-imx/cpu-imx5.c (renamed from arch/arm/mach-mx5/cpu.c)0
-rw-r--r--arch/arm/mach-imx/cpu_op-mx51.c (renamed from arch/arm/mach-mx5/cpu_op-mx51.c)0
-rw-r--r--arch/arm/mach-imx/cpu_op-mx51.h (renamed from arch/arm/mach-mx5/cpu_op-mx51.h)0
-rw-r--r--arch/arm/mach-imx/crm-regs-imx5.h (renamed from arch/arm/mach-mx5/crm_regs.h)0
-rw-r--r--arch/arm/mach-imx/devices-imx50.h (renamed from arch/arm/mach-mx5/devices-imx50.h)0
-rw-r--r--arch/arm/mach-imx/devices-imx51.h (renamed from arch/arm/mach-mx5/devices-imx51.h)0
-rw-r--r--arch/arm/mach-imx/devices-imx53.h (renamed from arch/arm/mach-mx5/devices-imx53.h)0
-rw-r--r--arch/arm/mach-imx/efika.h (renamed from arch/arm/mach-mx5/efika.h)0
-rw-r--r--arch/arm/mach-imx/ehci-imx5.c (renamed from arch/arm/mach-mx5/ehci.c)0
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx51-baseboard.c (renamed from arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c)0
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c (renamed from arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c)0
-rw-r--r--arch/arm/mach-imx/imx51-dt.c (renamed from arch/arm/mach-mx5/imx51-dt.c)0
-rw-r--r--arch/arm/mach-imx/imx53-dt.c (renamed from arch/arm/mach-mx5/imx53-dt.c)0
-rw-r--r--arch/arm/mach-imx/mach-cpuimx51.c (renamed from arch/arm/mach-mx5/board-cpuimx51.c)0
-rw-r--r--arch/arm/mach-imx/mach-cpuimx51sd.c (renamed from arch/arm/mach-mx5/board-cpuimx51sd.c)0
-rw-r--r--arch/arm/mach-imx/mach-mx50_rdp.c (renamed from arch/arm/mach-mx5/board-mx50_rdp.c)0
-rw-r--r--arch/arm/mach-imx/mach-mx51_3ds.c (renamed from arch/arm/mach-mx5/board-mx51_3ds.c)0
-rw-r--r--arch/arm/mach-imx/mach-mx51_babbage.c (renamed from arch/arm/mach-mx5/board-mx51_babbage.c)0
-rw-r--r--arch/arm/mach-imx/mach-mx51_efikamx.c (renamed from arch/arm/mach-mx5/board-mx51_efikamx.c)0
-rw-r--r--arch/arm/mach-imx/mach-mx51_efikasb.c (renamed from arch/arm/mach-mx5/board-mx51_efikasb.c)0
-rw-r--r--arch/arm/mach-imx/mach-mx53_ard.c (renamed from arch/arm/mach-mx5/board-mx53_ard.c)5
-rw-r--r--arch/arm/mach-imx/mach-mx53_evk.c (renamed from arch/arm/mach-mx5/board-mx53_evk.c)1
-rw-r--r--arch/arm/mach-imx/mach-mx53_loco.c (renamed from arch/arm/mach-mx5/board-mx53_loco.c)1
-rw-r--r--arch/arm/mach-imx/mach-mx53_smd.c (renamed from arch/arm/mach-mx5/board-mx53_smd.c)1
-rw-r--r--arch/arm/mach-imx/mm-imx5.c (renamed from arch/arm/mach-mx5/mm.c)0
-rw-r--r--arch/arm/mach-imx/mx51_efika.c (renamed from arch/arm/mach-mx5/mx51_efika.c)0
-rw-r--r--arch/arm/mach-imx/pm-imx5.c (renamed from arch/arm/mach-mx5/system.c)89
-rw-r--r--arch/arm/mach-imx/src.c5
-rw-r--r--arch/arm/mach-msm/hotplug.c1
-rw-r--r--arch/arm/mach-msm/platsmp.c1
-rw-r--r--arch/arm/mach-mx5/Kconfig244
-rw-r--r--arch/arm/mach-mx5/Makefile26
-rw-r--r--arch/arm/mach-mx5/Makefile.boot9
-rw-r--r--arch/arm/mach-mx5/pm-imx5.c83
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-pxa/devices.c20
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c2
-rw-r--r--arch/arm/mach-pxa/pxa300.c1
-rw-r--r--arch/arm/mach-pxa/pxa320.c1
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa95x.c1
-rw-r--r--arch/arm/mach-realview/hotplug.c1
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h18
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h2
-rw-r--r--arch/arm/mach-realview/realview_eb.c11
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c13
-rw-r--r--arch/arm/mach-sa1100/assabet.c12
-rw-r--r--arch/arm/mach-sa1100/cerf.c11
-rw-r--r--arch/arm/mach-sa1100/clock.c91
-rw-r--r--arch/arm/mach-sa1100/collie.c23
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1100.c2
-rw-r--r--arch/arm/mach-sa1100/generic.c27
-rw-r--r--arch/arm/mach-sa1100/include/mach/mcp.h2
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c2
-rw-r--r--arch/arm/mach-sa1100/lart.c10
-rw-r--r--arch/arm/mach-sa1100/shannon.c11
-rw-r--r--arch/arm/mach-sa1100/simpad.c18
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c1
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c1
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c2
-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c48
-rw-r--r--arch/arm/mach-ux500/hotplug.c1
-rw-r--r--arch/arm/mach-ux500/platsmp.c1
-rw-r--r--arch/arm/mach-ux500/usb.c6
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c4
-rw-r--r--arch/arm/mach-vexpress/hotplug.c1
-rw-r--r--arch/arm/mm/Kconfig1
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/ioremap.c3
-rw-r--r--arch/arm/mm/proc-v7.S26
-rw-r--r--arch/arm/plat-mxc/Kconfig15
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v1.h2
-rw-r--r--arch/arm/plat-versatile/platsmp.c1
127 files changed, 761 insertions, 1152 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 24626b0419ee..a48aecc17eac 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -754,7 +754,7 @@ config ARCH_SA1100
754 select ARCH_HAS_CPUFREQ 754 select ARCH_HAS_CPUFREQ
755 select CPU_FREQ 755 select CPU_FREQ
756 select GENERIC_CLOCKEVENTS 756 select GENERIC_CLOCKEVENTS
757 select CLKDEV_LOOKUP 757 select HAVE_CLK
758 select HAVE_SCHED_CLOCK 758 select HAVE_SCHED_CLOCK
759 select TICK_ONESHOT 759 select TICK_ONESHOT
760 select ARCH_REQUIRE_GPIOLIB 760 select ARCH_REQUIRE_GPIOLIB
@@ -825,7 +825,6 @@ config ARCH_S5PC100
825 select HAVE_CLK 825 select HAVE_CLK
826 select CLKDEV_LOOKUP 826 select CLKDEV_LOOKUP
827 select CPU_V7 827 select CPU_V7
828 select ARM_L1_CACHE_SHIFT_6
829 select ARCH_USES_GETTIMEOFFSET 828 select ARCH_USES_GETTIMEOFFSET
830 select HAVE_S3C2410_I2C if I2C 829 select HAVE_S3C2410_I2C if I2C
831 select HAVE_S3C_RTC if RTC_CLASS 830 select HAVE_S3C_RTC if RTC_CLASS
@@ -842,7 +841,6 @@ config ARCH_S5PV210
842 select HAVE_CLK 841 select HAVE_CLK
843 select CLKDEV_LOOKUP 842 select CLKDEV_LOOKUP
844 select CLKSRC_MMIO 843 select CLKSRC_MMIO
845 select ARM_L1_CACHE_SHIFT_6
846 select ARCH_HAS_CPUFREQ 844 select ARCH_HAS_CPUFREQ
847 select GENERIC_CLOCKEVENTS 845 select GENERIC_CLOCKEVENTS
848 select HAVE_SCHED_CLOCK 846 select HAVE_SCHED_CLOCK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 40319d91bb7f..1683bfb9166f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -160,7 +160,6 @@ machine-$(CONFIG_ARCH_MSM) := msm
160machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 160machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
161machine-$(CONFIG_ARCH_IMX_V4_V5) := imx 161machine-$(CONFIG_ARCH_IMX_V4_V5) := imx
162machine-$(CONFIG_ARCH_IMX_V6_V7) := imx 162machine-$(CONFIG_ARCH_IMX_V6_V7) := imx
163machine-$(CONFIG_ARCH_MX5) := mx5
164machine-$(CONFIG_ARCH_MXS) := mxs 163machine-$(CONFIG_ARCH_MXS) := mxs
165machine-$(CONFIG_ARCH_NETX) := netx 164machine-$(CONFIG_ARCH_NETX) := netx
166machine-$(CONFIG_ARCH_NOMADIK) := nomadik 165machine-$(CONFIG_ARCH_NOMADIK) := nomadik
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index b2dc2dd7f1df..c47d6199b784 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -41,6 +41,7 @@
41 41
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/exception.h> 43#include <asm/exception.h>
44#include <asm/smp_plat.h>
44#include <asm/mach/irq.h> 45#include <asm/mach/irq.h>
45#include <asm/hardware/gic.h> 46#include <asm/hardware/gic.h>
46 47
@@ -352,11 +353,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
352 unsigned int gic_irqs = gic->gic_irqs; 353 unsigned int gic_irqs = gic->gic_irqs;
353 struct irq_domain *domain = &gic->domain; 354 struct irq_domain *domain = &gic->domain;
354 void __iomem *base = gic_data_dist_base(gic); 355 void __iomem *base = gic_data_dist_base(gic);
355 u32 cpu = 0; 356 u32 cpu = cpu_logical_map(smp_processor_id());
356
357#ifdef CONFIG_SMP
358 cpu = cpu_logical_map(smp_processor_id());
359#endif
360 357
361 cpumask = 1 << cpu; 358 cpumask = 1 << cpu;
362 cpumask |= cpumask << 8; 359 cpumask |= cpumask << 8;
diff --git a/arch/arm/configs/mx5_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index d0d8dfece37e..3a4fb2e5fc68 100644
--- a/arch/arm/configs/mx5_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -3,6 +3,7 @@ CONFIG_EXPERIMENTAL=y
3CONFIG_KERNEL_LZO=y 3CONFIG_KERNEL_LZO=y
4CONFIG_SYSVIPC=y 4CONFIG_SYSVIPC=y
5CONFIG_LOG_BUF_SHIFT=18 5CONFIG_LOG_BUF_SHIFT=18
6CONFIG_CGROUPS=y
6CONFIG_RELAY=y 7CONFIG_RELAY=y
7CONFIG_EXPERT=y 8CONFIG_EXPERT=y
8# CONFIG_SLUB_DEBUG is not set 9# CONFIG_SLUB_DEBUG is not set
@@ -14,20 +15,31 @@ CONFIG_MODULE_SRCVERSION_ALL=y
14# CONFIG_LBDAF is not set 15# CONFIG_LBDAF is not set
15# CONFIG_BLK_DEV_BSG is not set 16# CONFIG_BLK_DEV_BSG is not set
16CONFIG_ARCH_MXC=y 17CONFIG_ARCH_MXC=y
17CONFIG_ARCH_MX5=y 18CONFIG_MACH_MX31LILLY=y
18CONFIG_MACH_MX51_BABBAGE=y 19CONFIG_MACH_MX31LITE=y
20CONFIG_MACH_PCM037=y
21CONFIG_MACH_PCM037_EET=y
22CONFIG_MACH_MX31_3DS=y
23CONFIG_MACH_MX31MOBOARD=y
24CONFIG_MACH_QONG=y
25CONFIG_MACH_ARMADILLO5X0=y
26CONFIG_MACH_KZM_ARM11_01=y
27CONFIG_MACH_PCM043=y
28CONFIG_MACH_MX35_3DS=y
29CONFIG_MACH_EUKREA_CPUIMX35=y
30CONFIG_MACH_VPR200=y
31CONFIG_MACH_IMX51_DT=y
19CONFIG_MACH_MX51_3DS=y 32CONFIG_MACH_MX51_3DS=y
20CONFIG_MACH_EUKREA_CPUIMX51=y 33CONFIG_MACH_EUKREA_CPUIMX51=y
21CONFIG_MACH_EUKREA_CPUIMX51SD=y 34CONFIG_MACH_EUKREA_CPUIMX51SD=y
22CONFIG_MACH_MX51_EFIKAMX=y 35CONFIG_MACH_MX51_EFIKAMX=y
23CONFIG_MACH_MX51_EFIKASB=y 36CONFIG_MACH_MX51_EFIKASB=y
24CONFIG_MACH_MX53_EVK=y 37CONFIG_MACH_IMX53_DT=y
25CONFIG_MACH_MX53_SMD=y 38CONFIG_SOC_IMX6Q=y
26CONFIG_MACH_MX53_LOCO=y
27CONFIG_MACH_MX53_ARD=y
28CONFIG_MXC_PWM=y 39CONFIG_MXC_PWM=y
29CONFIG_NO_HZ=y 40CONFIG_NO_HZ=y
30CONFIG_HIGH_RES_TIMERS=y 41CONFIG_HIGH_RES_TIMERS=y
42CONFIG_SMP=y
31CONFIG_VMSPLIT_2G=y 43CONFIG_VMSPLIT_2G=y
32CONFIG_PREEMPT_VOLUNTARY=y 44CONFIG_PREEMPT_VOLUNTARY=y
33CONFIG_AEABI=y 45CONFIG_AEABI=y
@@ -49,7 +61,7 @@ CONFIG_IP_PNP_DHCP=y
49# CONFIG_INET_XFRM_MODE_TUNNEL is not set 61# CONFIG_INET_XFRM_MODE_TUNNEL is not set
50# CONFIG_INET_XFRM_MODE_BEET is not set 62# CONFIG_INET_XFRM_MODE_BEET is not set
51# CONFIG_INET_LRO is not set 63# CONFIG_INET_LRO is not set
52# CONFIG_IPV6 is not set 64CONFIG_IPV6=y
53# CONFIG_WIRELESS is not set 65# CONFIG_WIRELESS is not set
54CONFIG_DEVTMPFS=y 66CONFIG_DEVTMPFS=y
55CONFIG_DEVTMPFS_MOUNT=y 67CONFIG_DEVTMPFS_MOUNT=y
@@ -68,24 +80,20 @@ CONFIG_SCSI_SCAN_ASYNC=y
68CONFIG_ATA=y 80CONFIG_ATA=y
69CONFIG_PATA_IMX=y 81CONFIG_PATA_IMX=y
70CONFIG_NETDEVICES=y 82CONFIG_NETDEVICES=y
71CONFIG_MII=m 83# CONFIG_NET_VENDOR_BROADCOM is not set
72CONFIG_MARVELL_PHY=y 84# CONFIG_NET_VENDOR_CHELSIO is not set
73CONFIG_DAVICOM_PHY=y 85# CONFIG_NET_VENDOR_FARADAY is not set
74CONFIG_QSEMI_PHY=y 86CONFIG_FEC=y
75CONFIG_LXT_PHY=y 87# CONFIG_NET_VENDOR_INTEL is not set
76CONFIG_CICADA_PHY=y 88# CONFIG_NET_VENDOR_MARVELL is not set
77CONFIG_VITESSE_PHY=y 89# CONFIG_NET_VENDOR_MICREL is not set
78CONFIG_SMSC_PHY=y 90# CONFIG_NET_VENDOR_MICROCHIP is not set
79CONFIG_BROADCOM_PHY=y 91# CONFIG_NET_VENDOR_NATSEMI is not set
80CONFIG_ICPLUS_PHY=y 92# CONFIG_NET_VENDOR_SEEQ is not set
81CONFIG_REALTEK_PHY=y 93CONFIG_SMC91X=y
82CONFIG_NATIONAL_PHY=y 94CONFIG_SMC911X=y
83CONFIG_STE10XP=y 95CONFIG_SMSC911X=y
84CONFIG_LSI_ET1011C_PHY=y 96# CONFIG_NET_VENDOR_STMICRO is not set
85CONFIG_MICREL_PHY=y
86CONFIG_NET_ETHERNET=y
87# CONFIG_NETDEV_1000 is not set
88# CONFIG_NETDEV_10000 is not set
89# CONFIG_WLAN is not set 97# CONFIG_WLAN is not set
90# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 98# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
91CONFIG_INPUT_EVDEV=y 99CONFIG_INPUT_EVDEV=y
@@ -124,7 +132,6 @@ CONFIG_USB_EHCI_HCD=y
124CONFIG_USB_EHCI_MXC=y 132CONFIG_USB_EHCI_MXC=y
125CONFIG_USB_STORAGE=y 133CONFIG_USB_STORAGE=y
126CONFIG_MMC=y 134CONFIG_MMC=y
127CONFIG_MMC_BLOCK=m
128CONFIG_MMC_SDHCI=y 135CONFIG_MMC_SDHCI=y
129CONFIG_MMC_SDHCI_PLTFM=y 136CONFIG_MMC_SDHCI_PLTFM=y
130CONFIG_MMC_SDHCI_ESDHC_IMX=y 137CONFIG_MMC_SDHCI_ESDHC_IMX=y
@@ -133,6 +140,8 @@ CONFIG_LEDS_CLASS=y
133CONFIG_RTC_CLASS=y 140CONFIG_RTC_CLASS=y
134CONFIG_RTC_INTF_DEV_UIE_EMUL=y 141CONFIG_RTC_INTF_DEV_UIE_EMUL=y
135CONFIG_RTC_MXC=y 142CONFIG_RTC_MXC=y
143CONFIG_DMADEVICES=y
144CONFIG_IMX_SDMA=y
136CONFIG_EXT2_FS=y 145CONFIG_EXT2_FS=y
137CONFIG_EXT2_FS_XATTR=y 146CONFIG_EXT2_FS_XATTR=y
138CONFIG_EXT2_FS_POSIX_ACL=y 147CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig
deleted file mode 100644
index cb0717fbb03d..000000000000
--- a/arch/arm/configs/mx3_defconfig
+++ /dev/null
@@ -1,144 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_EXPERT=y
7CONFIG_SLAB=y
8CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y
10CONFIG_MODULE_FORCE_UNLOAD=y
11CONFIG_MODVERSIONS=y
12# CONFIG_BLK_DEV_BSG is not set
13CONFIG_ARCH_MXC=y
14CONFIG_MACH_MX31ADS_WM1133_EV1=y
15CONFIG_MACH_MX31LILLY=y
16CONFIG_MACH_MX31LITE=y
17CONFIG_MACH_PCM037=y
18CONFIG_MACH_PCM037_EET=y
19CONFIG_MACH_MX31_3DS=y
20CONFIG_MACH_MX31MOBOARD=y
21CONFIG_MACH_QONG=y
22CONFIG_MACH_ARMADILLO5X0=y
23CONFIG_MACH_KZM_ARM11_01=y
24CONFIG_MACH_PCM043=y
25CONFIG_MACH_MX35_3DS=y
26CONFIG_MACH_EUKREA_CPUIMX35=y
27CONFIG_MXC_IRQ_PRIOR=y
28CONFIG_MXC_PWM=y
29CONFIG_ARM_ERRATA_411920=y
30CONFIG_NO_HZ=y
31CONFIG_HIGH_RES_TIMERS=y
32CONFIG_PREEMPT=y
33CONFIG_AEABI=y
34CONFIG_ZBOOT_ROM_TEXT=0x0
35CONFIG_ZBOOT_ROM_BSS=0x0
36CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
37CONFIG_VFP=y
38CONFIG_PM_DEBUG=y
39CONFIG_NET=y
40CONFIG_PACKET=y
41CONFIG_UNIX=y
42CONFIG_INET=y
43CONFIG_IP_PNP=y
44CONFIG_IP_PNP_DHCP=y
45# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
46# CONFIG_INET_XFRM_MODE_TUNNEL is not set
47# CONFIG_INET_XFRM_MODE_BEET is not set
48# CONFIG_INET_LRO is not set
49# CONFIG_INET_DIAG is not set
50# CONFIG_IPV6 is not set
51CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
52CONFIG_FW_LOADER=m
53CONFIG_MTD=y
54CONFIG_MTD_CMDLINE_PARTS=y
55CONFIG_MTD_CHAR=y
56CONFIG_MTD_BLOCK=y
57CONFIG_MTD_CFI=y
58CONFIG_MTD_PHYSMAP=y
59CONFIG_MTD_NAND=y
60CONFIG_MTD_NAND_MXC=y
61CONFIG_MTD_UBI=y
62# CONFIG_BLK_DEV is not set
63CONFIG_MISC_DEVICES=y
64CONFIG_EEPROM_AT24=y
65CONFIG_NETDEVICES=y
66CONFIG_SMSC_PHY=y
67CONFIG_NET_ETHERNET=y
68CONFIG_SMSC911X=y
69CONFIG_DNET=y
70# CONFIG_NETDEV_1000 is not set
71# CONFIG_NETDEV_10000 is not set
72# CONFIG_INPUT_MOUSEDEV is not set
73# CONFIG_KEYBOARD_ATKBD is not set
74CONFIG_KEYBOARD_IMX=y
75# CONFIG_INPUT_MOUSE is not set
76# CONFIG_SERIO is not set
77# CONFIG_VT is not set
78# CONFIG_LEGACY_PTYS is not set
79CONFIG_SERIAL_8250=m
80CONFIG_SERIAL_8250_EXTENDED=y
81CONFIG_SERIAL_8250_SHARE_IRQ=y
82CONFIG_SERIAL_IMX=y
83CONFIG_SERIAL_IMX_CONSOLE=y
84# CONFIG_HW_RANDOM is not set
85CONFIG_I2C=y
86CONFIG_I2C_CHARDEV=y
87CONFIG_I2C_IMX=y
88CONFIG_SPI=y
89CONFIG_W1=y
90CONFIG_W1_MASTER_MXC=y
91CONFIG_W1_SLAVE_THERM=y
92# CONFIG_HWMON is not set
93CONFIG_WATCHDOG=y
94CONFIG_IMX2_WDT=y
95CONFIG_MFD_WM8350_I2C=y
96CONFIG_REGULATOR=y
97CONFIG_REGULATOR_WM8350=y
98CONFIG_MEDIA_SUPPORT=y
99CONFIG_VIDEO_DEV=y
100# CONFIG_RC_CORE is not set
101# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
102CONFIG_SOC_CAMERA=y
103CONFIG_SOC_CAMERA_MT9M001=y
104CONFIG_SOC_CAMERA_MT9M111=y
105CONFIG_SOC_CAMERA_MT9T031=y
106CONFIG_SOC_CAMERA_MT9V022=y
107CONFIG_SOC_CAMERA_TW9910=y
108CONFIG_SOC_CAMERA_OV772X=y
109CONFIG_VIDEO_MX3=y
110# CONFIG_RADIO_ADAPTERS is not set
111CONFIG_FB=y
112CONFIG_SOUND=y
113CONFIG_SND=y
114# CONFIG_SND_ARM is not set
115# CONFIG_SND_SPI is not set
116CONFIG_SND_SOC=y
117CONFIG_SND_IMX_SOC=y
118CONFIG_SND_MXC_SOC_WM1133_EV1=y
119CONFIG_SND_SOC_PHYCORE_AC97=y
120CONFIG_SND_SOC_EUKREA_TLV320=y
121CONFIG_USB=y
122CONFIG_USB_EHCI_HCD=y
123CONFIG_USB_EHCI_MXC=y
124CONFIG_USB_GADGET=m
125CONFIG_USB_FSL_USB2=m
126CONFIG_USB_G_SERIAL=m
127CONFIG_USB_ULPI=y
128CONFIG_MMC=y
129CONFIG_MMC_MXC=y
130CONFIG_RTC_CLASS=y
131CONFIG_RTC_MXC=y
132CONFIG_DMADEVICES=y
133# CONFIG_DNOTIFY is not set
134CONFIG_TMPFS=y
135CONFIG_JFFS2_FS=y
136CONFIG_UBIFS_FS=y
137CONFIG_NFS_FS=y
138CONFIG_NFS_V3=y
139CONFIG_NFS_V4=y
140CONFIG_ROOT_NFS=y
141# CONFIG_ENABLE_WARN_DEPRECATED is not set
142# CONFIG_ENABLE_MUST_CHECK is not set
143CONFIG_SYSCTL_SYSCALL_CHECK=y
144# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index b6e65dedfd71..62f8095d46de 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -237,7 +237,7 @@
237 */ 237 */
238#ifdef CONFIG_THUMB2_KERNEL 238#ifdef CONFIG_THUMB2_KERNEL
239 239
240 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T() 240 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
2419999: 2419999:
242 .if \inc == 1 242 .if \inc == 1
243 \instr\cond\()b\()\t\().w \reg, [\ptr, #\off] 243 \instr\cond\()b\()\t\().w \reg, [\ptr, #\off]
@@ -277,7 +277,7 @@
277 277
278#else /* !CONFIG_THUMB2_KERNEL */ 278#else /* !CONFIG_THUMB2_KERNEL */
279 279
280 .macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=T() 280 .macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER()
281 .rept \rept 281 .rept \rept
2829999: 2829999:
283 .if \inc == 1 283 .if \inc == 1
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index af18ceaacf5d..b5dc173d336f 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -83,9 +83,9 @@
83 * instructions (inline assembly) 83 * instructions (inline assembly)
84 */ 84 */
85#ifdef CONFIG_CPU_USE_DOMAINS 85#ifdef CONFIG_CPU_USE_DOMAINS
86#define T(instr) #instr "t" 86#define TUSER(instr) #instr "t"
87#else 87#else
88#define T(instr) #instr 88#define TUSER(instr) #instr
89#endif 89#endif
90 90
91#else /* __ASSEMBLY__ */ 91#else /* __ASSEMBLY__ */
@@ -95,9 +95,9 @@
95 * instructions 95 * instructions
96 */ 96 */
97#ifdef CONFIG_CPU_USE_DOMAINS 97#ifdef CONFIG_CPU_USE_DOMAINS
98#define T(instr) instr ## t 98#define TUSER(instr) instr ## t
99#else 99#else
100#define T(instr) instr 100#define TUSER(instr) instr
101#endif 101#endif
102 102
103#endif /* __ASSEMBLY__ */ 103#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 253cc86318bf..7be54690aeec 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -75,9 +75,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
75 75
76#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \ 76#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
77 __asm__ __volatile__( \ 77 __asm__ __volatile__( \
78 "1: " T(ldr) " %1, [%3]\n" \ 78 "1: " TUSER(ldr) " %1, [%3]\n" \
79 " " insn "\n" \ 79 " " insn "\n" \
80 "2: " T(str) " %0, [%3]\n" \ 80 "2: " TUSER(str) " %0, [%3]\n" \
81 " mov %0, #0\n" \ 81 " mov %0, #0\n" \
82 __futex_atomic_ex_table("%5") \ 82 __futex_atomic_ex_table("%5") \
83 : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \ 83 : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
@@ -95,10 +95,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
95 return -EFAULT; 95 return -EFAULT;
96 96
97 __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" 97 __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
98 "1: " T(ldr) " %1, [%4]\n" 98 "1: " TUSER(ldr) " %1, [%4]\n"
99 " teq %1, %2\n" 99 " teq %1, %2\n"
100 " it eq @ explicit IT needed for the 2b label\n" 100 " it eq @ explicit IT needed for the 2b label\n"
101 "2: " T(streq) " %3, [%4]\n" 101 "2: " TUSER(streq) " %3, [%4]\n"
102 __futex_atomic_ex_table("%5") 102 __futex_atomic_ex_table("%5")
103 : "+r" (ret), "=&r" (val) 103 : "+r" (ret), "=&r" (val)
104 : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT) 104 : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 1e5717afc4ac..ae29293270a3 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -71,12 +71,6 @@ extern void platform_secondary_init(unsigned int cpu);
71extern void platform_smp_prepare_cpus(unsigned int); 71extern void platform_smp_prepare_cpus(unsigned int);
72 72
73/* 73/*
74 * Logical CPU mapping.
75 */
76extern int __cpu_logical_map[NR_CPUS];
77#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
78
79/*
80 * Initial data for bringing up a secondary CPU. 74 * Initial data for bringing up a secondary CPU.
81 */ 75 */
82struct secondary_data { 76struct secondary_data {
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index f24c1b9e211d..558d6c80aca9 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -43,4 +43,10 @@ static inline int cache_ops_need_broadcast(void)
43} 43}
44#endif 44#endif
45 45
46/*
47 * Logical CPU mapping.
48 */
49extern int __cpu_logical_map[];
50#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
51
46#endif 52#endif
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index b293616a1a1a..2958976d867b 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -227,7 +227,7 @@ do { \
227 227
228#define __get_user_asm_byte(x,addr,err) \ 228#define __get_user_asm_byte(x,addr,err) \
229 __asm__ __volatile__( \ 229 __asm__ __volatile__( \
230 "1: " T(ldrb) " %1,[%2],#0\n" \ 230 "1: " TUSER(ldrb) " %1,[%2],#0\n" \
231 "2:\n" \ 231 "2:\n" \
232 " .pushsection .fixup,\"ax\"\n" \ 232 " .pushsection .fixup,\"ax\"\n" \
233 " .align 2\n" \ 233 " .align 2\n" \
@@ -263,7 +263,7 @@ do { \
263 263
264#define __get_user_asm_word(x,addr,err) \ 264#define __get_user_asm_word(x,addr,err) \
265 __asm__ __volatile__( \ 265 __asm__ __volatile__( \
266 "1: " T(ldr) " %1,[%2],#0\n" \ 266 "1: " TUSER(ldr) " %1,[%2],#0\n" \
267 "2:\n" \ 267 "2:\n" \
268 " .pushsection .fixup,\"ax\"\n" \ 268 " .pushsection .fixup,\"ax\"\n" \
269 " .align 2\n" \ 269 " .align 2\n" \
@@ -308,7 +308,7 @@ do { \
308 308
309#define __put_user_asm_byte(x,__pu_addr,err) \ 309#define __put_user_asm_byte(x,__pu_addr,err) \
310 __asm__ __volatile__( \ 310 __asm__ __volatile__( \
311 "1: " T(strb) " %1,[%2],#0\n" \ 311 "1: " TUSER(strb) " %1,[%2],#0\n" \
312 "2:\n" \ 312 "2:\n" \
313 " .pushsection .fixup,\"ax\"\n" \ 313 " .pushsection .fixup,\"ax\"\n" \
314 " .align 2\n" \ 314 " .align 2\n" \
@@ -341,7 +341,7 @@ do { \
341 341
342#define __put_user_asm_word(x,__pu_addr,err) \ 342#define __put_user_asm_word(x,__pu_addr,err) \
343 __asm__ __volatile__( \ 343 __asm__ __volatile__( \
344 "1: " T(str) " %1,[%2],#0\n" \ 344 "1: " TUSER(str) " %1,[%2],#0\n" \
345 "2:\n" \ 345 "2:\n" \
346 " .pushsection .fixup,\"ax\"\n" \ 346 " .pushsection .fixup,\"ax\"\n" \
347 " .align 2\n" \ 347 " .align 2\n" \
@@ -366,10 +366,10 @@ do { \
366 366
367#define __put_user_asm_dword(x,__pu_addr,err) \ 367#define __put_user_asm_dword(x,__pu_addr,err) \
368 __asm__ __volatile__( \ 368 __asm__ __volatile__( \
369 ARM( "1: " T(str) " " __reg_oper1 ", [%1], #4\n" ) \ 369 ARM( "1: " TUSER(str) " " __reg_oper1 ", [%1], #4\n" ) \
370 ARM( "2: " T(str) " " __reg_oper0 ", [%1]\n" ) \ 370 ARM( "2: " TUSER(str) " " __reg_oper0 ", [%1]\n" ) \
371 THUMB( "1: " T(str) " " __reg_oper1 ", [%1]\n" ) \ 371 THUMB( "1: " TUSER(str) " " __reg_oper1 ", [%1]\n" ) \
372 THUMB( "2: " T(str) " " __reg_oper0 ", [%1, #4]\n" ) \ 372 THUMB( "2: " TUSER(str) " " __reg_oper0 ", [%1, #4]\n" ) \
373 "3:\n" \ 373 "3:\n" \
374 " .pushsection .fixup,\"ax\"\n" \ 374 " .pushsection .fixup,\"ax\"\n" \
375 " .align 2\n" \ 375 " .align 2\n" \
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 520889cf1b5b..9fd0ba90c1d2 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -149,6 +149,11 @@ ENDPROC(ret_from_fork)
149#endif 149#endif
150#endif 150#endif
151 151
152.macro mcount_adjust_addr rd, rn
153 bic \rd, \rn, #1 @ clear the Thumb bit if present
154 sub \rd, \rd, #MCOUNT_INSN_SIZE
155.endm
156
152.macro __mcount suffix 157.macro __mcount suffix
153 mcount_enter 158 mcount_enter
154 ldr r0, =ftrace_trace_function 159 ldr r0, =ftrace_trace_function
@@ -173,8 +178,7 @@ ENDPROC(ret_from_fork)
173 mcount_exit 178 mcount_exit
174 179
1751: mcount_get_lr r1 @ lr of instrumented func 1801: mcount_get_lr r1 @ lr of instrumented func
176 mov r0, lr @ instrumented function 181 mcount_adjust_addr r0, lr @ instrumented function
177 sub r0, r0, #MCOUNT_INSN_SIZE
178 adr lr, BSYM(2f) 182 adr lr, BSYM(2f)
179 mov pc, r2 183 mov pc, r2
1802: mcount_exit 1842: mcount_exit
@@ -184,8 +188,7 @@ ENDPROC(ret_from_fork)
184 mcount_enter 188 mcount_enter
185 189
186 mcount_get_lr r1 @ lr of instrumented func 190 mcount_get_lr r1 @ lr of instrumented func
187 mov r0, lr @ instrumented function 191 mcount_adjust_addr r0, lr @ instrumented function
188 sub r0, r0, #MCOUNT_INSN_SIZE
189 192
190 .globl ftrace_call\suffix 193 .globl ftrace_call\suffix
191ftrace_call\suffix: 194ftrace_call\suffix:
@@ -205,11 +208,11 @@ ftrace_graph_call\suffix:
205#ifdef CONFIG_DYNAMIC_FTRACE 208#ifdef CONFIG_DYNAMIC_FTRACE
206 @ called from __ftrace_caller, saved in mcount_enter 209 @ called from __ftrace_caller, saved in mcount_enter
207 ldr r1, [sp, #16] @ instrumented routine (func) 210 ldr r1, [sp, #16] @ instrumented routine (func)
211 mcount_adjust_addr r1, r1
208#else 212#else
209 @ called from __mcount, untouched in lr 213 @ called from __mcount, untouched in lr
210 mov r1, lr @ instrumented routine (func) 214 mcount_adjust_addr r1, lr @ instrumented routine (func)
211#endif 215#endif
212 sub r1, r1, #MCOUNT_INSN_SIZE
213 mov r2, fp @ frame pointer 216 mov r2, fp @ frame pointer
214 bl prepare_ftrace_return 217 bl prepare_ftrace_return
215 mcount_exit 218 mcount_exit
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 129fbd55bde8..a255c39612ca 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -21,7 +21,6 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kexec.h> 22#include <linux/kexec.h>
23#include <linux/of_fdt.h> 23#include <linux/of_fdt.h>
24#include <linux/crash_dump.h>
25#include <linux/root_dev.h> 24#include <linux/root_dev.h>
26#include <linux/cpu.h> 25#include <linux/cpu.h>
27#include <linux/interrupt.h> 26#include <linux/interrupt.h>
@@ -160,7 +159,7 @@ static struct resource mem_res[] = {
160 .flags = IORESOURCE_MEM 159 .flags = IORESOURCE_MEM
161 }, 160 },
162 { 161 {
163 .name = "Kernel text", 162 .name = "Kernel code",
164 .start = 0, 163 .start = 0,
165 .end = 0, 164 .end = 0,
166 .flags = IORESOURCE_MEM 165 .flags = IORESOURCE_MEM
@@ -427,6 +426,20 @@ void cpu_init(void)
427 : "r14"); 426 : "r14");
428} 427}
429 428
429int __cpu_logical_map[NR_CPUS];
430
431void __init smp_setup_processor_id(void)
432{
433 int i;
434 u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
435
436 cpu_logical_map(0) = cpu;
437 for (i = 1; i < NR_CPUS; ++i)
438 cpu_logical_map(i) = i == cpu ? 0 : i;
439
440 printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
441}
442
430static void __init setup_processor(void) 443static void __init setup_processor(void)
431{ 444{
432 struct proc_info_list *list; 445 struct proc_info_list *list;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 57db122a4f62..cdeb727527d3 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -233,20 +233,6 @@ void __ref cpu_die(void)
233} 233}
234#endif /* CONFIG_HOTPLUG_CPU */ 234#endif /* CONFIG_HOTPLUG_CPU */
235 235
236int __cpu_logical_map[NR_CPUS];
237
238void __init smp_setup_processor_id(void)
239{
240 int i;
241 u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
242
243 cpu_logical_map(0) = cpu;
244 for (i = 1; i < NR_CPUS; ++i)
245 cpu_logical_map(i) = i == cpu ? 0 : i;
246
247 printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
248}
249
250/* 236/*
251 * Called by both boot and secondaries to move global data into 237 * Called by both boot and secondaries to move global data into
252 * per-processor storage. 238 * per-processor storage.
@@ -443,9 +429,7 @@ static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent);
443static void ipi_timer(void) 429static void ipi_timer(void)
444{ 430{
445 struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); 431 struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent);
446 irq_enter();
447 evt->event_handler(evt); 432 evt->event_handler(evt);
448 irq_exit();
449} 433}
450 434
451#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST 435#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
@@ -548,7 +532,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
548 532
549 switch (ipinr) { 533 switch (ipinr) {
550 case IPI_TIMER: 534 case IPI_TIMER:
535 irq_enter();
551 ipi_timer(); 536 ipi_timer();
537 irq_exit();
552 break; 538 break;
553 539
554 case IPI_RESCHEDULE: 540 case IPI_RESCHEDULE:
@@ -556,15 +542,21 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
556 break; 542 break;
557 543
558 case IPI_CALL_FUNC: 544 case IPI_CALL_FUNC:
545 irq_enter();
559 generic_smp_call_function_interrupt(); 546 generic_smp_call_function_interrupt();
547 irq_exit();
560 break; 548 break;
561 549
562 case IPI_CALL_FUNC_SINGLE: 550 case IPI_CALL_FUNC_SINGLE:
551 irq_enter();
563 generic_smp_call_function_single_interrupt(); 552 generic_smp_call_function_single_interrupt();
553 irq_exit();
564 break; 554 break;
565 555
566 case IPI_CPU_STOP: 556 case IPI_CPU_STOP:
557 irq_enter();
567 ipi_cpu_stop(cpu); 558 ipi_cpu_stop(cpu);
559 irq_exit();
568 break; 560 break;
569 561
570 default: 562 default:
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index c8e938553d47..4285daa077b0 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -252,6 +252,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
252 else 252 else
253 twd_calibrate_rate(); 253 twd_calibrate_rate();
254 254
255 __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
256
255 clk->name = "local_timer"; 257 clk->name = "local_timer";
256 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | 258 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
257 CLOCK_EVT_FEAT_C3STOP; 259 CLOCK_EVT_FEAT_C3STOP;
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index f76e75548670..1e19691e0406 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -4,6 +4,7 @@
4 */ 4 */
5 5
6#include <asm-generic/vmlinux.lds.h> 6#include <asm-generic/vmlinux.lds.h>
7#include <asm/cache.h>
7#include <asm/thread_info.h> 8#include <asm/thread_info.h>
8#include <asm/memory.h> 9#include <asm/memory.h>
9#include <asm/page.h> 10#include <asm/page.h>
@@ -181,7 +182,7 @@ SECTIONS
181 } 182 }
182#endif 183#endif
183 184
184 PERCPU_SECTION(32) 185 PERCPU_SECTION(L1_CACHE_BYTES)
185 186
186#ifdef CONFIG_XIP_KERNEL 187#ifdef CONFIG_XIP_KERNEL
187 __data_loc = ALIGN(4); /* location in binary */ 188 __data_loc = ALIGN(4); /* location in binary */
@@ -212,13 +213,13 @@ SECTIONS
212#endif 213#endif
213 214
214 NOSAVE_DATA 215 NOSAVE_DATA
215 CACHELINE_ALIGNED_DATA(32) 216 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
216 READ_MOSTLY_DATA(32) 217 READ_MOSTLY_DATA(L1_CACHE_BYTES)
217 218
218 /* 219 /*
219 * The exception fixup table (might need resorting at runtime) 220 * The exception fixup table (might need resorting at runtime)
220 */ 221 */
221 . = ALIGN(32); 222 . = ALIGN(4);
222 __start___ex_table = .; 223 __start___ex_table = .;
223#ifdef CONFIG_MMU 224#ifdef CONFIG_MMU
224 *(__ex_table) 225 *(__ex_table)
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 1b049cd7a49a..11093a7c3e32 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -31,18 +31,18 @@
31#include <asm/domain.h> 31#include <asm/domain.h>
32 32
33ENTRY(__get_user_1) 33ENTRY(__get_user_1)
341: T(ldrb) r2, [r0] 341: TUSER(ldrb) r2, [r0]
35 mov r0, #0 35 mov r0, #0
36 mov pc, lr 36 mov pc, lr
37ENDPROC(__get_user_1) 37ENDPROC(__get_user_1)
38 38
39ENTRY(__get_user_2) 39ENTRY(__get_user_2)
40#ifdef CONFIG_THUMB2_KERNEL 40#ifdef CONFIG_THUMB2_KERNEL
412: T(ldrb) r2, [r0] 412: TUSER(ldrb) r2, [r0]
423: T(ldrb) r3, [r0, #1] 423: TUSER(ldrb) r3, [r0, #1]
43#else 43#else
442: T(ldrb) r2, [r0], #1 442: TUSER(ldrb) r2, [r0], #1
453: T(ldrb) r3, [r0] 453: TUSER(ldrb) r3, [r0]
46#endif 46#endif
47#ifndef __ARMEB__ 47#ifndef __ARMEB__
48 orr r2, r2, r3, lsl #8 48 orr r2, r2, r3, lsl #8
@@ -54,7 +54,7 @@ ENTRY(__get_user_2)
54ENDPROC(__get_user_2) 54ENDPROC(__get_user_2)
55 55
56ENTRY(__get_user_4) 56ENTRY(__get_user_4)
574: T(ldr) r2, [r0] 574: TUSER(ldr) r2, [r0]
58 mov r0, #0 58 mov r0, #0
59 mov pc, lr 59 mov pc, lr
60ENDPROC(__get_user_4) 60ENDPROC(__get_user_4)
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index c023fc11e86c..7db25990c589 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -31,7 +31,7 @@
31#include <asm/domain.h> 31#include <asm/domain.h>
32 32
33ENTRY(__put_user_1) 33ENTRY(__put_user_1)
341: T(strb) r2, [r0] 341: TUSER(strb) r2, [r0]
35 mov r0, #0 35 mov r0, #0
36 mov pc, lr 36 mov pc, lr
37ENDPROC(__put_user_1) 37ENDPROC(__put_user_1)
@@ -40,19 +40,19 @@ ENTRY(__put_user_2)
40 mov ip, r2, lsr #8 40 mov ip, r2, lsr #8
41#ifdef CONFIG_THUMB2_KERNEL 41#ifdef CONFIG_THUMB2_KERNEL
42#ifndef __ARMEB__ 42#ifndef __ARMEB__
432: T(strb) r2, [r0] 432: TUSER(strb) r2, [r0]
443: T(strb) ip, [r0, #1] 443: TUSER(strb) ip, [r0, #1]
45#else 45#else
462: T(strb) ip, [r0] 462: TUSER(strb) ip, [r0]
473: T(strb) r2, [r0, #1] 473: TUSER(strb) r2, [r0, #1]
48#endif 48#endif
49#else /* !CONFIG_THUMB2_KERNEL */ 49#else /* !CONFIG_THUMB2_KERNEL */
50#ifndef __ARMEB__ 50#ifndef __ARMEB__
512: T(strb) r2, [r0], #1 512: TUSER(strb) r2, [r0], #1
523: T(strb) ip, [r0] 523: TUSER(strb) ip, [r0]
53#else 53#else
542: T(strb) ip, [r0], #1 542: TUSER(strb) ip, [r0], #1
553: T(strb) r2, [r0] 553: TUSER(strb) r2, [r0]
56#endif 56#endif
57#endif /* CONFIG_THUMB2_KERNEL */ 57#endif /* CONFIG_THUMB2_KERNEL */
58 mov r0, #0 58 mov r0, #0
@@ -60,18 +60,18 @@ ENTRY(__put_user_2)
60ENDPROC(__put_user_2) 60ENDPROC(__put_user_2)
61 61
62ENTRY(__put_user_4) 62ENTRY(__put_user_4)
634: T(str) r2, [r0] 634: TUSER(str) r2, [r0]
64 mov r0, #0 64 mov r0, #0
65 mov pc, lr 65 mov pc, lr
66ENDPROC(__put_user_4) 66ENDPROC(__put_user_4)
67 67
68ENTRY(__put_user_8) 68ENTRY(__put_user_8)
69#ifdef CONFIG_THUMB2_KERNEL 69#ifdef CONFIG_THUMB2_KERNEL
705: T(str) r2, [r0] 705: TUSER(str) r2, [r0]
716: T(str) r3, [r0, #4] 716: TUSER(str) r3, [r0, #4]
72#else 72#else
735: T(str) r2, [r0], #4 735: TUSER(str) r2, [r0], #4
746: T(str) r3, [r0] 746: TUSER(str) r3, [r0]
75#endif 75#endif
76 mov r0, #0 76 mov r0, #0
77 mov pc, lr 77 mov pc, lr
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index d0ece2aeb70d..5c908b1cb8ed 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -32,11 +32,11 @@
32 rsb ip, ip, #4 32 rsb ip, ip, #4
33 cmp ip, #2 33 cmp ip, #2
34 ldrb r3, [r1], #1 34 ldrb r3, [r1], #1
35USER( T(strb) r3, [r0], #1) @ May fault 35USER( TUSER( strb) r3, [r0], #1) @ May fault
36 ldrgeb r3, [r1], #1 36 ldrgeb r3, [r1], #1
37USER( T(strgeb) r3, [r0], #1) @ May fault 37USER( TUSER( strgeb) r3, [r0], #1) @ May fault
38 ldrgtb r3, [r1], #1 38 ldrgtb r3, [r1], #1
39USER( T(strgtb) r3, [r0], #1) @ May fault 39USER( TUSER( strgtb) r3, [r0], #1) @ May fault
40 sub r2, r2, ip 40 sub r2, r2, ip
41 b .Lc2u_dest_aligned 41 b .Lc2u_dest_aligned
42 42
@@ -59,7 +59,7 @@ ENTRY(__copy_to_user)
59 addmi ip, r2, #4 59 addmi ip, r2, #4
60 bmi .Lc2u_0nowords 60 bmi .Lc2u_0nowords
61 ldr r3, [r1], #4 61 ldr r3, [r1], #4
62USER( T(str) r3, [r0], #4) @ May fault 62USER( TUSER( str) r3, [r0], #4) @ May fault
63 mov ip, r0, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction 63 mov ip, r0, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
64 rsb ip, ip, #0 64 rsb ip, ip, #0
65 movs ip, ip, lsr #32 - PAGE_SHIFT 65 movs ip, ip, lsr #32 - PAGE_SHIFT
@@ -88,18 +88,18 @@ USER( T(str) r3, [r0], #4) @ May fault
88 stmneia r0!, {r3 - r4} @ Shouldnt fault 88 stmneia r0!, {r3 - r4} @ Shouldnt fault
89 tst ip, #4 89 tst ip, #4
90 ldrne r3, [r1], #4 90 ldrne r3, [r1], #4
91 T(strne) r3, [r0], #4 @ Shouldnt fault 91 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
92 ands ip, ip, #3 92 ands ip, ip, #3
93 beq .Lc2u_0fupi 93 beq .Lc2u_0fupi
94.Lc2u_0nowords: teq ip, #0 94.Lc2u_0nowords: teq ip, #0
95 beq .Lc2u_finished 95 beq .Lc2u_finished
96.Lc2u_nowords: cmp ip, #2 96.Lc2u_nowords: cmp ip, #2
97 ldrb r3, [r1], #1 97 ldrb r3, [r1], #1
98USER( T(strb) r3, [r0], #1) @ May fault 98USER( TUSER( strb) r3, [r0], #1) @ May fault
99 ldrgeb r3, [r1], #1 99 ldrgeb r3, [r1], #1
100USER( T(strgeb) r3, [r0], #1) @ May fault 100USER( TUSER( strgeb) r3, [r0], #1) @ May fault
101 ldrgtb r3, [r1], #1 101 ldrgtb r3, [r1], #1
102USER( T(strgtb) r3, [r0], #1) @ May fault 102USER( TUSER( strgtb) r3, [r0], #1) @ May fault
103 b .Lc2u_finished 103 b .Lc2u_finished
104 104
105.Lc2u_not_enough: 105.Lc2u_not_enough:
@@ -120,7 +120,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
120 mov r3, r7, pull #8 120 mov r3, r7, pull #8
121 ldr r7, [r1], #4 121 ldr r7, [r1], #4
122 orr r3, r3, r7, push #24 122 orr r3, r3, r7, push #24
123USER( T(str) r3, [r0], #4) @ May fault 123USER( TUSER( str) r3, [r0], #4) @ May fault
124 mov ip, r0, lsl #32 - PAGE_SHIFT 124 mov ip, r0, lsl #32 - PAGE_SHIFT
125 rsb ip, ip, #0 125 rsb ip, ip, #0
126 movs ip, ip, lsr #32 - PAGE_SHIFT 126 movs ip, ip, lsr #32 - PAGE_SHIFT
@@ -155,18 +155,18 @@ USER( T(str) r3, [r0], #4) @ May fault
155 movne r3, r7, pull #8 155 movne r3, r7, pull #8
156 ldrne r7, [r1], #4 156 ldrne r7, [r1], #4
157 orrne r3, r3, r7, push #24 157 orrne r3, r3, r7, push #24
158 T(strne) r3, [r0], #4 @ Shouldnt fault 158 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
159 ands ip, ip, #3 159 ands ip, ip, #3
160 beq .Lc2u_1fupi 160 beq .Lc2u_1fupi
161.Lc2u_1nowords: mov r3, r7, get_byte_1 161.Lc2u_1nowords: mov r3, r7, get_byte_1
162 teq ip, #0 162 teq ip, #0
163 beq .Lc2u_finished 163 beq .Lc2u_finished
164 cmp ip, #2 164 cmp ip, #2
165USER( T(strb) r3, [r0], #1) @ May fault 165USER( TUSER( strb) r3, [r0], #1) @ May fault
166 movge r3, r7, get_byte_2 166 movge r3, r7, get_byte_2
167USER( T(strgeb) r3, [r0], #1) @ May fault 167USER( TUSER( strgeb) r3, [r0], #1) @ May fault
168 movgt r3, r7, get_byte_3 168 movgt r3, r7, get_byte_3
169USER( T(strgtb) r3, [r0], #1) @ May fault 169USER( TUSER( strgtb) r3, [r0], #1) @ May fault
170 b .Lc2u_finished 170 b .Lc2u_finished
171 171
172.Lc2u_2fupi: subs r2, r2, #4 172.Lc2u_2fupi: subs r2, r2, #4
@@ -175,7 +175,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
175 mov r3, r7, pull #16 175 mov r3, r7, pull #16
176 ldr r7, [r1], #4 176 ldr r7, [r1], #4
177 orr r3, r3, r7, push #16 177 orr r3, r3, r7, push #16
178USER( T(str) r3, [r0], #4) @ May fault 178USER( TUSER( str) r3, [r0], #4) @ May fault
179 mov ip, r0, lsl #32 - PAGE_SHIFT 179 mov ip, r0, lsl #32 - PAGE_SHIFT
180 rsb ip, ip, #0 180 rsb ip, ip, #0
181 movs ip, ip, lsr #32 - PAGE_SHIFT 181 movs ip, ip, lsr #32 - PAGE_SHIFT
@@ -210,18 +210,18 @@ USER( T(str) r3, [r0], #4) @ May fault
210 movne r3, r7, pull #16 210 movne r3, r7, pull #16
211 ldrne r7, [r1], #4 211 ldrne r7, [r1], #4
212 orrne r3, r3, r7, push #16 212 orrne r3, r3, r7, push #16
213 T(strne) r3, [r0], #4 @ Shouldnt fault 213 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
214 ands ip, ip, #3 214 ands ip, ip, #3
215 beq .Lc2u_2fupi 215 beq .Lc2u_2fupi
216.Lc2u_2nowords: mov r3, r7, get_byte_2 216.Lc2u_2nowords: mov r3, r7, get_byte_2
217 teq ip, #0 217 teq ip, #0
218 beq .Lc2u_finished 218 beq .Lc2u_finished
219 cmp ip, #2 219 cmp ip, #2
220USER( T(strb) r3, [r0], #1) @ May fault 220USER( TUSER( strb) r3, [r0], #1) @ May fault
221 movge r3, r7, get_byte_3 221 movge r3, r7, get_byte_3
222USER( T(strgeb) r3, [r0], #1) @ May fault 222USER( TUSER( strgeb) r3, [r0], #1) @ May fault
223 ldrgtb r3, [r1], #0 223 ldrgtb r3, [r1], #0
224USER( T(strgtb) r3, [r0], #1) @ May fault 224USER( TUSER( strgtb) r3, [r0], #1) @ May fault
225 b .Lc2u_finished 225 b .Lc2u_finished
226 226
227.Lc2u_3fupi: subs r2, r2, #4 227.Lc2u_3fupi: subs r2, r2, #4
@@ -230,7 +230,7 @@ USER( T(strgtb) r3, [r0], #1) @ May fault
230 mov r3, r7, pull #24 230 mov r3, r7, pull #24
231 ldr r7, [r1], #4 231 ldr r7, [r1], #4
232 orr r3, r3, r7, push #8 232 orr r3, r3, r7, push #8
233USER( T(str) r3, [r0], #4) @ May fault 233USER( TUSER( str) r3, [r0], #4) @ May fault
234 mov ip, r0, lsl #32 - PAGE_SHIFT 234 mov ip, r0, lsl #32 - PAGE_SHIFT
235 rsb ip, ip, #0 235 rsb ip, ip, #0
236 movs ip, ip, lsr #32 - PAGE_SHIFT 236 movs ip, ip, lsr #32 - PAGE_SHIFT
@@ -265,18 +265,18 @@ USER( T(str) r3, [r0], #4) @ May fault
265 movne r3, r7, pull #24 265 movne r3, r7, pull #24
266 ldrne r7, [r1], #4 266 ldrne r7, [r1], #4
267 orrne r3, r3, r7, push #8 267 orrne r3, r3, r7, push #8
268 T(strne) r3, [r0], #4 @ Shouldnt fault 268 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
269 ands ip, ip, #3 269 ands ip, ip, #3
270 beq .Lc2u_3fupi 270 beq .Lc2u_3fupi
271.Lc2u_3nowords: mov r3, r7, get_byte_3 271.Lc2u_3nowords: mov r3, r7, get_byte_3
272 teq ip, #0 272 teq ip, #0
273 beq .Lc2u_finished 273 beq .Lc2u_finished
274 cmp ip, #2 274 cmp ip, #2
275USER( T(strb) r3, [r0], #1) @ May fault 275USER( TUSER( strb) r3, [r0], #1) @ May fault
276 ldrgeb r3, [r1], #1 276 ldrgeb r3, [r1], #1
277USER( T(strgeb) r3, [r0], #1) @ May fault 277USER( TUSER( strgeb) r3, [r0], #1) @ May fault
278 ldrgtb r3, [r1], #0 278 ldrgtb r3, [r1], #0
279USER( T(strgtb) r3, [r0], #1) @ May fault 279USER( TUSER( strgtb) r3, [r0], #1) @ May fault
280 b .Lc2u_finished 280 b .Lc2u_finished
281ENDPROC(__copy_to_user) 281ENDPROC(__copy_to_user)
282 282
@@ -295,11 +295,11 @@ ENDPROC(__copy_to_user)
295.Lcfu_dest_not_aligned: 295.Lcfu_dest_not_aligned:
296 rsb ip, ip, #4 296 rsb ip, ip, #4
297 cmp ip, #2 297 cmp ip, #2
298USER( T(ldrb) r3, [r1], #1) @ May fault 298USER( TUSER( ldrb) r3, [r1], #1) @ May fault
299 strb r3, [r0], #1 299 strb r3, [r0], #1
300USER( T(ldrgeb) r3, [r1], #1) @ May fault 300USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
301 strgeb r3, [r0], #1 301 strgeb r3, [r0], #1
302USER( T(ldrgtb) r3, [r1], #1) @ May fault 302USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
303 strgtb r3, [r0], #1 303 strgtb r3, [r0], #1
304 sub r2, r2, ip 304 sub r2, r2, ip
305 b .Lcfu_dest_aligned 305 b .Lcfu_dest_aligned
@@ -322,7 +322,7 @@ ENTRY(__copy_from_user)
322.Lcfu_0fupi: subs r2, r2, #4 322.Lcfu_0fupi: subs r2, r2, #4
323 addmi ip, r2, #4 323 addmi ip, r2, #4
324 bmi .Lcfu_0nowords 324 bmi .Lcfu_0nowords
325USER( T(ldr) r3, [r1], #4) 325USER( TUSER( ldr) r3, [r1], #4)
326 str r3, [r0], #4 326 str r3, [r0], #4
327 mov ip, r1, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction 327 mov ip, r1, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
328 rsb ip, ip, #0 328 rsb ip, ip, #0
@@ -351,18 +351,18 @@ USER( T(ldr) r3, [r1], #4)
351 ldmneia r1!, {r3 - r4} @ Shouldnt fault 351 ldmneia r1!, {r3 - r4} @ Shouldnt fault
352 stmneia r0!, {r3 - r4} 352 stmneia r0!, {r3 - r4}
353 tst ip, #4 353 tst ip, #4
354 T(ldrne) r3, [r1], #4 @ Shouldnt fault 354 TUSER( ldrne) r3, [r1], #4 @ Shouldnt fault
355 strne r3, [r0], #4 355 strne r3, [r0], #4
356 ands ip, ip, #3 356 ands ip, ip, #3
357 beq .Lcfu_0fupi 357 beq .Lcfu_0fupi
358.Lcfu_0nowords: teq ip, #0 358.Lcfu_0nowords: teq ip, #0
359 beq .Lcfu_finished 359 beq .Lcfu_finished
360.Lcfu_nowords: cmp ip, #2 360.Lcfu_nowords: cmp ip, #2
361USER( T(ldrb) r3, [r1], #1) @ May fault 361USER( TUSER( ldrb) r3, [r1], #1) @ May fault
362 strb r3, [r0], #1 362 strb r3, [r0], #1
363USER( T(ldrgeb) r3, [r1], #1) @ May fault 363USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
364 strgeb r3, [r0], #1 364 strgeb r3, [r0], #1
365USER( T(ldrgtb) r3, [r1], #1) @ May fault 365USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
366 strgtb r3, [r0], #1 366 strgtb r3, [r0], #1
367 b .Lcfu_finished 367 b .Lcfu_finished
368 368
@@ -375,7 +375,7 @@ USER( T(ldrgtb) r3, [r1], #1) @ May fault
375 375
376.Lcfu_src_not_aligned: 376.Lcfu_src_not_aligned:
377 bic r1, r1, #3 377 bic r1, r1, #3
378USER( T(ldr) r7, [r1], #4) @ May fault 378USER( TUSER( ldr) r7, [r1], #4) @ May fault
379 cmp ip, #2 379 cmp ip, #2
380 bgt .Lcfu_3fupi 380 bgt .Lcfu_3fupi
381 beq .Lcfu_2fupi 381 beq .Lcfu_2fupi
@@ -383,7 +383,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
383 addmi ip, r2, #4 383 addmi ip, r2, #4
384 bmi .Lcfu_1nowords 384 bmi .Lcfu_1nowords
385 mov r3, r7, pull #8 385 mov r3, r7, pull #8
386USER( T(ldr) r7, [r1], #4) @ May fault 386USER( TUSER( ldr) r7, [r1], #4) @ May fault
387 orr r3, r3, r7, push #24 387 orr r3, r3, r7, push #24
388 str r3, [r0], #4 388 str r3, [r0], #4
389 mov ip, r1, lsl #32 - PAGE_SHIFT 389 mov ip, r1, lsl #32 - PAGE_SHIFT
@@ -418,7 +418,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
418 stmneia r0!, {r3 - r4} 418 stmneia r0!, {r3 - r4}
419 tst ip, #4 419 tst ip, #4
420 movne r3, r7, pull #8 420 movne r3, r7, pull #8
421USER( T(ldrne) r7, [r1], #4) @ May fault 421USER( TUSER( ldrne) r7, [r1], #4) @ May fault
422 orrne r3, r3, r7, push #24 422 orrne r3, r3, r7, push #24
423 strne r3, [r0], #4 423 strne r3, [r0], #4
424 ands ip, ip, #3 424 ands ip, ip, #3
@@ -438,7 +438,7 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
438 addmi ip, r2, #4 438 addmi ip, r2, #4
439 bmi .Lcfu_2nowords 439 bmi .Lcfu_2nowords
440 mov r3, r7, pull #16 440 mov r3, r7, pull #16
441USER( T(ldr) r7, [r1], #4) @ May fault 441USER( TUSER( ldr) r7, [r1], #4) @ May fault
442 orr r3, r3, r7, push #16 442 orr r3, r3, r7, push #16
443 str r3, [r0], #4 443 str r3, [r0], #4
444 mov ip, r1, lsl #32 - PAGE_SHIFT 444 mov ip, r1, lsl #32 - PAGE_SHIFT
@@ -474,7 +474,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
474 stmneia r0!, {r3 - r4} 474 stmneia r0!, {r3 - r4}
475 tst ip, #4 475 tst ip, #4
476 movne r3, r7, pull #16 476 movne r3, r7, pull #16
477USER( T(ldrne) r7, [r1], #4) @ May fault 477USER( TUSER( ldrne) r7, [r1], #4) @ May fault
478 orrne r3, r3, r7, push #16 478 orrne r3, r3, r7, push #16
479 strne r3, [r0], #4 479 strne r3, [r0], #4
480 ands ip, ip, #3 480 ands ip, ip, #3
@@ -486,7 +486,7 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
486 strb r3, [r0], #1 486 strb r3, [r0], #1
487 movge r3, r7, get_byte_3 487 movge r3, r7, get_byte_3
488 strgeb r3, [r0], #1 488 strgeb r3, [r0], #1
489USER( T(ldrgtb) r3, [r1], #0) @ May fault 489USER( TUSER( ldrgtb) r3, [r1], #0) @ May fault
490 strgtb r3, [r0], #1 490 strgtb r3, [r0], #1
491 b .Lcfu_finished 491 b .Lcfu_finished
492 492
@@ -494,7 +494,7 @@ USER( T(ldrgtb) r3, [r1], #0) @ May fault
494 addmi ip, r2, #4 494 addmi ip, r2, #4
495 bmi .Lcfu_3nowords 495 bmi .Lcfu_3nowords
496 mov r3, r7, pull #24 496 mov r3, r7, pull #24
497USER( T(ldr) r7, [r1], #4) @ May fault 497USER( TUSER( ldr) r7, [r1], #4) @ May fault
498 orr r3, r3, r7, push #8 498 orr r3, r3, r7, push #8
499 str r3, [r0], #4 499 str r3, [r0], #4
500 mov ip, r1, lsl #32 - PAGE_SHIFT 500 mov ip, r1, lsl #32 - PAGE_SHIFT
@@ -529,7 +529,7 @@ USER( T(ldr) r7, [r1], #4) @ May fault
529 stmneia r0!, {r3 - r4} 529 stmneia r0!, {r3 - r4}
530 tst ip, #4 530 tst ip, #4
531 movne r3, r7, pull #24 531 movne r3, r7, pull #24
532USER( T(ldrne) r7, [r1], #4) @ May fault 532USER( TUSER( ldrne) r7, [r1], #4) @ May fault
533 orrne r3, r3, r7, push #8 533 orrne r3, r3, r7, push #8
534 strne r3, [r0], #4 534 strne r3, [r0], #4
535 ands ip, ip, #3 535 ands ip, ip, #3
@@ -539,9 +539,9 @@ USER( T(ldrne) r7, [r1], #4) @ May fault
539 beq .Lcfu_finished 539 beq .Lcfu_finished
540 cmp ip, #2 540 cmp ip, #2
541 strb r3, [r0], #1 541 strb r3, [r0], #1
542USER( T(ldrgeb) r3, [r1], #1) @ May fault 542USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
543 strgeb r3, [r0], #1 543 strgeb r3, [r0], #1
544USER( T(ldrgtb) r3, [r1], #1) @ May fault 544USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
545 strgtb r3, [r0], #1 545 strgtb r3, [r0], #1
546 b .Lcfu_finished 546 b .Lcfu_finished
547ENDPROC(__copy_from_user) 547ENDPROC(__copy_from_user)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4f991f295284..71feb00a1e99 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -18,6 +18,12 @@ config HAVE_AT91_USART4
18config HAVE_AT91_USART5 18config HAVE_AT91_USART5
19 bool 19 bool
20 20
21config AT91_SAM9_ALT_RESET
22 bool
23
24config AT91_SAM9G45_RESET
25 bool
26
21menu "Atmel AT91 System-on-Chip" 27menu "Atmel AT91 System-on-Chip"
22 28
23choice 29choice
@@ -39,6 +45,7 @@ config ARCH_AT91SAM9260
39 select HAVE_AT91_USART4 45 select HAVE_AT91_USART4
40 select HAVE_AT91_USART5 46 select HAVE_AT91_USART5
41 select HAVE_NET_MACB 47 select HAVE_NET_MACB
48 select AT91_SAM9_ALT_RESET
42 49
43config ARCH_AT91SAM9261 50config ARCH_AT91SAM9261
44 bool "AT91SAM9261" 51 bool "AT91SAM9261"
@@ -46,6 +53,7 @@ config ARCH_AT91SAM9261
46 select GENERIC_CLOCKEVENTS 53 select GENERIC_CLOCKEVENTS
47 select HAVE_FB_ATMEL 54 select HAVE_FB_ATMEL
48 select HAVE_AT91_DBGU0 55 select HAVE_AT91_DBGU0
56 select AT91_SAM9_ALT_RESET
49 57
50config ARCH_AT91SAM9G10 58config ARCH_AT91SAM9G10
51 bool "AT91SAM9G10" 59 bool "AT91SAM9G10"
@@ -53,6 +61,7 @@ config ARCH_AT91SAM9G10
53 select GENERIC_CLOCKEVENTS 61 select GENERIC_CLOCKEVENTS
54 select HAVE_AT91_DBGU0 62 select HAVE_AT91_DBGU0
55 select HAVE_FB_ATMEL 63 select HAVE_FB_ATMEL
64 select AT91_SAM9_ALT_RESET
56 65
57config ARCH_AT91SAM9263 66config ARCH_AT91SAM9263
58 bool "AT91SAM9263" 67 bool "AT91SAM9263"
@@ -61,6 +70,7 @@ config ARCH_AT91SAM9263
61 select HAVE_FB_ATMEL 70 select HAVE_FB_ATMEL
62 select HAVE_NET_MACB 71 select HAVE_NET_MACB
63 select HAVE_AT91_DBGU1 72 select HAVE_AT91_DBGU1
73 select AT91_SAM9_ALT_RESET
64 74
65config ARCH_AT91SAM9RL 75config ARCH_AT91SAM9RL
66 bool "AT91SAM9RL" 76 bool "AT91SAM9RL"
@@ -69,6 +79,7 @@ config ARCH_AT91SAM9RL
69 select HAVE_AT91_USART3 79 select HAVE_AT91_USART3
70 select HAVE_FB_ATMEL 80 select HAVE_FB_ATMEL
71 select HAVE_AT91_DBGU0 81 select HAVE_AT91_DBGU0
82 select AT91_SAM9_ALT_RESET
72 83
73config ARCH_AT91SAM9G20 84config ARCH_AT91SAM9G20
74 bool "AT91SAM9G20" 85 bool "AT91SAM9G20"
@@ -79,6 +90,7 @@ config ARCH_AT91SAM9G20
79 select HAVE_AT91_USART4 90 select HAVE_AT91_USART4
80 select HAVE_AT91_USART5 91 select HAVE_AT91_USART5
81 select HAVE_NET_MACB 92 select HAVE_NET_MACB
93 select AT91_SAM9_ALT_RESET
82 94
83config ARCH_AT91SAM9G45 95config ARCH_AT91SAM9G45
84 bool "AT91SAM9G45" 96 bool "AT91SAM9G45"
@@ -88,6 +100,7 @@ config ARCH_AT91SAM9G45
88 select HAVE_FB_ATMEL 100 select HAVE_FB_ATMEL
89 select HAVE_NET_MACB 101 select HAVE_NET_MACB
90 select HAVE_AT91_DBGU1 102 select HAVE_AT91_DBGU1
103 select AT91_SAM9G45_RESET
91 104
92config ARCH_AT91CAP9 105config ARCH_AT91CAP9
93 bool "AT91CAP9" 106 bool "AT91CAP9"
@@ -96,6 +109,7 @@ config ARCH_AT91CAP9
96 select HAVE_FB_ATMEL 109 select HAVE_FB_ATMEL
97 select HAVE_NET_MACB 110 select HAVE_NET_MACB
98 select HAVE_AT91_DBGU1 111 select HAVE_AT91_DBGU1
112 select AT91_SAM9G45_RESET
99 113
100config ARCH_AT91X40 114config ARCH_AT91X40
101 bool "AT91x40" 115 bool "AT91x40"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 242174f9f355..705e1fbded39 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -8,15 +8,17 @@ obj-n :=
8obj- := 8obj- :=
9 9
10obj-$(CONFIG_AT91_PMC_UNIT) += clock.o 10obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
11obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
12obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
11 13
12# CPU-specific support 14# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o 15obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o 16obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o 17obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
16obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o 18obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
17obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o 19obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
18obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o 20obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
19obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o 21obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
20obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o 22obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
21obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o 23obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
22obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o 24obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 1d29a6cbbae2..8967d75c2ea3 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -22,7 +22,6 @@
22#include <mach/cpu.h> 22#include <mach/cpu.h>
23#include <mach/at91cap9.h> 23#include <mach/at91cap9.h>
24#include <mach/at91_pmc.h> 24#include <mach/at91_pmc.h>
25#include <mach/at91_rstc.h>
26 25
27#include "soc.h" 26#include "soc.h"
28#include "generic.h" 27#include "generic.h"
@@ -321,11 +320,6 @@ static void at91cap9_idle(void)
321 cpu_do_idle(); 320 cpu_do_idle();
322} 321}
323 322
324static void at91cap9_restart(char mode, const char *cmd)
325{
326 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
327}
328
329/* -------------------------------------------------------------------- 323/* --------------------------------------------------------------------
330 * AT91CAP9 processor initialization 324 * AT91CAP9 processor initialization
331 * -------------------------------------------------------------------- */ 325 * -------------------------------------------------------------------- */
@@ -338,6 +332,7 @@ static void __init at91cap9_map_io(void)
338static void __init at91cap9_ioremap_registers(void) 332static void __init at91cap9_ioremap_registers(void)
339{ 333{
340 at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); 334 at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
335 at91_ioremap_rstc(AT91CAP9_BASE_RSTC);
341 at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); 336 at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
342 at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); 337 at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
343} 338}
@@ -345,7 +340,7 @@ static void __init at91cap9_ioremap_registers(void)
345static void __init at91cap9_initialize(void) 340static void __init at91cap9_initialize(void)
346{ 341{
347 arm_pm_idle = at91cap9_idle; 342 arm_pm_idle = at91cap9_idle;
348 arm_pm_restart = at91cap9_restart; 343 arm_pm_restart = at91sam9g45_restart;
349 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 344 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
350 345
351 /* Register GPIO subsystem */ 346 /* Register GPIO subsystem */
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index cfe6dd747cc5..9ac8c6fe3363 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -324,6 +324,7 @@ static void __init at91sam9260_map_io(void)
324static void __init at91sam9260_ioremap_registers(void) 324static void __init at91sam9260_ioremap_registers(void)
325{ 325{
326 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); 326 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
327 at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
327 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); 328 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
328 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); 329 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
329} 330}
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 76ffbe67fffa..ab76868f01f5 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -282,6 +282,7 @@ static void __init at91sam9261_map_io(void)
282static void __init at91sam9261_ioremap_registers(void) 282static void __init at91sam9261_ioremap_registers(void)
283{ 283{
284 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); 284 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
285 at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
285 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); 286 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
286 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); 287 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
287} 288}
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index bcce7e2ca2f5..247ab633abcc 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -302,6 +302,7 @@ static void __init at91sam9263_map_io(void)
302static void __init at91sam9263_ioremap_registers(void) 302static void __init at91sam9263_ioremap_registers(void)
303{ 303{
304 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); 304 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
305 at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
305 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); 306 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
306 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); 307 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
307 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); 308 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index d3f931c5942e..518e42377171 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -23,7 +23,8 @@
23 .globl at91sam9_alt_restart 23 .globl at91sam9_alt_restart
24 24
25at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants 25at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
26 ldr r1, .at91_va_base_rstc_cr 26 ldr r1, =at91_rstc_base
27 ldr r1, [r1]
27 28
28 mov r2, #1 29 mov r2, #1
29 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN 30 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
@@ -33,11 +34,9 @@ at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
33 34
34 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access 35 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
35 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM 36 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
36 str r4, [r1] @ reset processor 37 str r4, [r1, #AT91_RSTC_CR] @ reset processor
37 38
38 b . 39 b .
39 40
40.at91_va_base_sdramc: 41.at91_va_base_sdramc:
41 .word AT91_VA_BASE_SYS + AT91_SDRAMC0 42 .word AT91_VA_BASE_SYS + AT91_SDRAMC0
42.at91_va_base_rstc_cr:
43 .word AT91_VA_BASE_SYS + AT91_RSTC_CR
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 0e80b395214d..5b12192e52ec 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -18,7 +18,6 @@
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <mach/at91sam9g45.h> 19#include <mach/at91sam9g45.h>
20#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h>
22#include <mach/cpu.h> 21#include <mach/cpu.h>
23 22
24#include "soc.h" 23#include "soc.h"
@@ -324,11 +323,6 @@ static void at91sam9g45_idle(void)
324 cpu_do_idle(); 323 cpu_do_idle();
325} 324}
326 325
327static void at91sam9g45_restart(char mode, const char *cmd)
328{
329 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
330}
331
332/* -------------------------------------------------------------------- 326/* --------------------------------------------------------------------
333 * AT91SAM9G45 processor initialization 327 * AT91SAM9G45 processor initialization
334 * -------------------------------------------------------------------- */ 328 * -------------------------------------------------------------------- */
@@ -342,6 +336,7 @@ static void __init at91sam9g45_map_io(void)
342static void __init at91sam9g45_ioremap_registers(void) 336static void __init at91sam9g45_ioremap_registers(void)
343{ 337{
344 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); 338 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
339 at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
345 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); 340 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
346 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); 341 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
347} 342}
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
new file mode 100644
index 000000000000..0468be10980b
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9g45_reset.S
@@ -0,0 +1,40 @@
1/*
2 * reset AT91SAM9G45 as per errata
3 *
4 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * GPLv2 Only
11 */
12
13#include <linux/linkage.h>
14#include <mach/hardware.h>
15#include <mach/at91sam9_ddrsdr.h>
16#include <mach/at91_rstc.h>
17
18 .arm
19
20 .globl at91sam9g45_restart
21
22at91sam9g45_restart:
23 ldr r0, .at91_va_base_sdramc0 @ preload constants
24 ldr r1, =at91_rstc_base
25 ldr r1, [r1]
26
27 mov r2, #1
28 mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
29 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
30
31 .balign 32 @ align to cache line
32
33 str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
34 str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
35 str r4, [r1, #AT91_RSTC_CR] @ reset processor
36
37 b .
38
39.at91_va_base_sdramc0:
40 .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index e00939420405..fd60e226a987 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -287,6 +287,7 @@ static void __init at91sam9rl_map_io(void)
287static void __init at91sam9rl_ioremap_registers(void) 287static void __init at91sam9rl_ioremap_registers(void)
288{ 288{
289 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC); 289 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
290 at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
290 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); 291 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
291 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); 292 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
292} 293}
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 4866b8180d66..594133451c0c 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -58,7 +58,9 @@ extern void at91_irq_suspend(void);
58extern void at91_irq_resume(void); 58extern void at91_irq_resume(void);
59 59
60/* reset */ 60/* reset */
61extern void at91_ioremap_rstc(u32 base_addr);
61extern void at91sam9_alt_restart(char, const char *); 62extern void at91sam9_alt_restart(char, const char *);
63extern void at91sam9g45_restart(char, const char *);
62 64
63/* shutdown */ 65/* shutdown */
64extern void at91_ioremap_shdwc(u32 base_addr); 66extern void at91_ioremap_shdwc(u32 base_addr);
diff --git a/arch/arm/mach-at91/include/mach/at91_rstc.h b/arch/arm/mach-at91/include/mach/at91_rstc.h
index cbd2bf052c1f..875fa336800b 100644
--- a/arch/arm/mach-at91/include/mach/at91_rstc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rstc.h
@@ -16,13 +16,25 @@
16#ifndef AT91_RSTC_H 16#ifndef AT91_RSTC_H
17#define AT91_RSTC_H 17#define AT91_RSTC_H
18 18
19#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_rstc_base;
21
22#define at91_rstc_read(field) \
23 __raw_readl(at91_rstc_base + field)
24
25#define at91_rstc_write(field, value) \
26 __raw_writel(value, at91_rstc_base + field);
27#else
28.extern at91_rstc_base
29#endif
30
31#define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
20#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ 32#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
21#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ 33#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
22#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ 34#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
23#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */ 35#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
24 36
25#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ 37#define AT91_RSTC_SR 0x04 /* Reset Controller Status Register */
26#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ 38#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
27#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ 39#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
28#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) 40#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
@@ -33,7 +45,7 @@
33#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ 45#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
34#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ 46#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
35 47
36#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ 48#define AT91_RSTC_MR 0x08 /* Reset Controller Mode Register */
37#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ 49#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
38#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ 50#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
39#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ 51#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4c0e2f6011d7..61d952902f2b 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -83,7 +83,6 @@
83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
87#define AT91_GPBR (cpu_is_at91cap9_revB() ? \ 86#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
88 (0xfffffd50 - AT91_BASE_SYS) : \ 87 (0xfffffd50 - AT91_BASE_SYS) : \
89 (0xfffffd60 - AT91_BASE_SYS)) 88 (0xfffffd60 - AT91_BASE_SYS))
@@ -96,6 +95,7 @@
96#define AT91CAP9_BASE_PIOB 0xfffff400 95#define AT91CAP9_BASE_PIOB 0xfffff400
97#define AT91CAP9_BASE_PIOC 0xfffff600 96#define AT91CAP9_BASE_PIOC 0xfffff600
98#define AT91CAP9_BASE_PIOD 0xfffff800 97#define AT91CAP9_BASE_PIOD 0xfffff800
98#define AT91CAP9_BASE_RSTC 0xfffffd00
99#define AT91CAP9_BASE_SHDWC 0xfffffd10 99#define AT91CAP9_BASE_SHDWC 0xfffffd10
100#define AT91CAP9_BASE_RTT 0xfffffd20 100#define AT91CAP9_BASE_RTT 0xfffffd20
101#define AT91CAP9_BASE_PIT 0xfffffd30 101#define AT91CAP9_BASE_PIT 0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
deleted file mode 100644
index 976f4a6c3353..000000000000
--- a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
3 *
4 * (C) 2008 Andrew Victor
5 *
6 * DDR/SDR Controller (DDRSDRC) - System peripherals registers.
7 * Based on AT91CAP9 datasheet revision B.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef AT91CAP9_DDRSDR_H
16#define AT91CAP9_DDRSDR_H
17
18#define AT91_DDRSDRC_MR 0x00 /* Mode Register */
19#define AT91_DDRSDRC_MODE (0xf << 0) /* Command Mode */
20#define AT91_DDRSDRC_MODE_NORMAL 0
21#define AT91_DDRSDRC_MODE_NOP 1
22#define AT91_DDRSDRC_MODE_PRECHARGE 2
23#define AT91_DDRSDRC_MODE_LMR 3
24#define AT91_DDRSDRC_MODE_REFRESH 4
25#define AT91_DDRSDRC_MODE_EXT_LMR 5
26#define AT91_DDRSDRC_MODE_DEEP 6
27
28#define AT91_DDRSDRC_RTR 0x04 /* Refresh Timer Register */
29#define AT91_DDRSDRC_COUNT (0xfff << 0) /* Refresh Timer Counter */
30
31#define AT91_DDRSDRC_CR 0x08 /* Configuration Register */
32#define AT91_DDRSDRC_NC (3 << 0) /* Number of Column Bits */
33#define AT91_DDRSDRC_NC_SDR8 (0 << 0)
34#define AT91_DDRSDRC_NC_SDR9 (1 << 0)
35#define AT91_DDRSDRC_NC_SDR10 (2 << 0)
36#define AT91_DDRSDRC_NC_SDR11 (3 << 0)
37#define AT91_DDRSDRC_NC_DDR9 (0 << 0)
38#define AT91_DDRSDRC_NC_DDR10 (1 << 0)
39#define AT91_DDRSDRC_NC_DDR11 (2 << 0)
40#define AT91_DDRSDRC_NC_DDR12 (3 << 0)
41#define AT91_DDRSDRC_NR (3 << 2) /* Number of Row Bits */
42#define AT91_DDRSDRC_NR_11 (0 << 2)
43#define AT91_DDRSDRC_NR_12 (1 << 2)
44#define AT91_DDRSDRC_NR_13 (2 << 2)
45#define AT91_DDRSDRC_CAS (7 << 4) /* CAS Latency */
46#define AT91_DDRSDRC_CAS_2 (2 << 4)
47#define AT91_DDRSDRC_CAS_3 (3 << 4)
48#define AT91_DDRSDRC_CAS_25 (6 << 4)
49#define AT91_DDRSDRC_DLL (1 << 7) /* Reset DLL */
50#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */
51
52#define AT91_DDRSDRC_T0PR 0x0C /* Timing 0 Register */
53#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */
54#define AT91_DDRSDRC_TRCD (0xf << 4) /* Row to Column delay */
55#define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */
56#define AT91_DDRSDRC_TRC (0xf << 12) /* Row cycle delay */
57#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */
58#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */
59#define AT91_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */
60#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */
61
62#define AT91_DDRSDRC_T1PR 0x10 /* Timing 1 Register */
63#define AT91_DDRSDRC_TRFC (0x1f << 0) /* Row Cycle Delay */
64#define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */
65#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
66#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
67
68#define AT91_DDRSDRC_LPR 0x18 /* Low Power Register */
69#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
70#define AT91_DDRSDRC_LPCB_DISABLE 0
71#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1
72#define AT91_DDRSDRC_LPCB_POWER_DOWN 2
73#define AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN 3
74#define AT91_DDRSDRC_CLKFR (1 << 2) /* Clock Frozen */
75#define AT91_DDRSDRC_PASR (7 << 4) /* Partial Array Self Refresh */
76#define AT91_DDRSDRC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */
77#define AT91_DDRSDRC_DS (3 << 10) /* Drive Strength */
78#define AT91_DDRSDRC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */
79#define AT91_DDRSDRC_TIMEOUT_0_CLK_CYCLES (0 << 12)
80#define AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES (1 << 12)
81#define AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES (2 << 12)
82
83#define AT91_DDRSDRC_MDR 0x1C /* Memory Device Register */
84#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */
85#define AT91_DDRSDRC_MD_SDR 0
86#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
87#define AT91_DDRSDRC_MD_DDR 2
88#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
89
90#define AT91_DDRSDRC_DLLR 0x20 /* DLL Information Register */
91#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */
92#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */
93#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */
94#define AT91_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */
95#define AT91_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */
96#define AT91_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */
97#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */
98#define AT91_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */
99#define AT91_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */
100
101/* Register access macros */
102#define at91_ramc_read(num, reg) \
103 at91_sys_read(AT91_DDRSDRC##num + reg)
104#define at91_ramc_write(num, reg, value) \
105 at91_sys_write(AT91_DDRSDRC##num + reg, value)
106
107
108#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index f937c476bb67..fa5ca278adeb 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -83,7 +83,6 @@
83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
87#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 86#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
88 87
89#define AT91SAM9260_BASE_ECC 0xffffe800 88#define AT91SAM9260_BASE_ECC 0xffffe800
@@ -92,6 +91,7 @@
92#define AT91SAM9260_BASE_PIOA 0xfffff400 91#define AT91SAM9260_BASE_PIOA 0xfffff400
93#define AT91SAM9260_BASE_PIOB 0xfffff600 92#define AT91SAM9260_BASE_PIOB 0xfffff600
94#define AT91SAM9260_BASE_PIOC 0xfffff800 93#define AT91SAM9260_BASE_PIOC 0xfffff800
94#define AT91SAM9260_BASE_RSTC 0xfffffd00
95#define AT91SAM9260_BASE_SHDWC 0xfffffd10 95#define AT91SAM9260_BASE_SHDWC 0xfffffd10
96#define AT91SAM9260_BASE_RTT 0xfffffd20 96#define AT91SAM9260_BASE_RTT 0xfffffd20
97#define AT91SAM9260_BASE_PIT 0xfffffd30 97#define AT91SAM9260_BASE_PIT 0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 175604e261be..7cde2d36570e 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -68,7 +68,6 @@
68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
70#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 70#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
71#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
72#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 71#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
73 72
74#define AT91SAM9261_BASE_SMC 0xffffec00 73#define AT91SAM9261_BASE_SMC 0xffffec00
@@ -76,6 +75,7 @@
76#define AT91SAM9261_BASE_PIOA 0xfffff400 75#define AT91SAM9261_BASE_PIOA 0xfffff400
77#define AT91SAM9261_BASE_PIOB 0xfffff600 76#define AT91SAM9261_BASE_PIOB 0xfffff600
78#define AT91SAM9261_BASE_PIOC 0xfffff800 77#define AT91SAM9261_BASE_PIOC 0xfffff800
78#define AT91SAM9261_BASE_RSTC 0xfffffd00
79#define AT91SAM9261_BASE_SHDWC 0xfffffd10 79#define AT91SAM9261_BASE_SHDWC 0xfffffd10
80#define AT91SAM9261_BASE_RTT 0xfffffd20 80#define AT91SAM9261_BASE_RTT 0xfffffd20
81#define AT91SAM9261_BASE_PIT 0xfffffd30 81#define AT91SAM9261_BASE_PIT 0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 80c915002d83..5949abda962b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -78,7 +78,6 @@
78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) 78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) 79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
80#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 80#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
81#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
82#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 81#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
83 82
84#define AT91SAM9263_BASE_ECC0 0xffffe000 83#define AT91SAM9263_BASE_ECC0 0xffffe000
@@ -91,6 +90,7 @@
91#define AT91SAM9263_BASE_PIOC 0xfffff600 90#define AT91SAM9263_BASE_PIOC 0xfffff600
92#define AT91SAM9263_BASE_PIOD 0xfffff800 91#define AT91SAM9263_BASE_PIOD 0xfffff800
93#define AT91SAM9263_BASE_PIOE 0xfffffa00 92#define AT91SAM9263_BASE_PIOE 0xfffffa00
93#define AT91SAM9263_BASE_RSTC 0xfffffd00
94#define AT91SAM9263_BASE_SHDWC 0xfffffd10 94#define AT91SAM9263_BASE_SHDWC 0xfffffd10
95#define AT91SAM9263_BASE_RTT0 0xfffffd20 95#define AT91SAM9263_BASE_RTT0 0xfffffd20
96#define AT91SAM9263_BASE_PIT 0xfffffd30 96#define AT91SAM9263_BASE_PIT 0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index d27b15ba8ebf..e2f8da8ce5bc 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -46,10 +46,10 @@
46#define AT91_DDRSDRC_CAS_25 (6 << 4) 46#define AT91_DDRSDRC_CAS_25 (6 << 4)
47#define AT91_DDRSDRC_RST_DLL (1 << 7) /* Reset DLL */ 47#define AT91_DDRSDRC_RST_DLL (1 << 7) /* Reset DLL */
48#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */ 48#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */
49#define AT91_DDRSDRC_DIS_DLL (1 << 9) /* Disable DLL */ 49#define AT91_DDRSDRC_DIS_DLL (1 << 9) /* Disable DLL [SAM9 Only] */
50#define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver */ 50#define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver [SAM9 Only] */
51#define AT91_DDRSDRC_DQMS (1 << 16) /* Mask Data is Shared */ 51#define AT91_DDRSDRC_DQMS (1 << 16) /* Mask Data is Shared [SAM9 Only] */
52#define AT91_DDRSDRC_ACTBST (1 << 18) /* Active Bank X to Burst Stop Read Access Bank Y */ 52#define AT91_DDRSDRC_ACTBST (1 << 18) /* Active Bank X to Burst Stop Read Access Bank Y [SAM9 Only] */
53 53
54#define AT91_DDRSDRC_T0PR 0x0C /* Timing 0 Register */ 54#define AT91_DDRSDRC_T0PR 0x0C /* Timing 0 Register */
55#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */ 55#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */
@@ -59,7 +59,8 @@
59#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */ 59#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */
60#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */ 60#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */
61#define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */ 61#define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */
62#define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay */ 62#define AT91CAP9_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */
63#define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */
63#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */ 64#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */
64 65
65#define AT91_DDRSDRC_T1PR 0x10 /* Timing 1 Register */ 66#define AT91_DDRSDRC_T1PR 0x10 /* Timing 1 Register */
@@ -68,13 +69,14 @@
68#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */ 69#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
69#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */ 70#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
70 71
71#define AT91_DDRSDRC_T2PR 0x14 /* Timing 2 Register */ 72#define AT91_DDRSDRC_T2PR 0x14 /* Timing 2 Register [SAM9 Only] */
72#define AT91_DDRSDRC_TXARD (0xf << 0) /* Exit active power down delay to read command in mode "Fast Exit" */ 73#define AT91_DDRSDRC_TXARD (0xf << 0) /* Exit active power down delay to read command in mode "Fast Exit" */
73#define AT91_DDRSDRC_TXARDS (0xf << 4) /* Exit active power down delay to read command in mode "Slow Exit" */ 74#define AT91_DDRSDRC_TXARDS (0xf << 4) /* Exit active power down delay to read command in mode "Slow Exit" */
74#define AT91_DDRSDRC_TRPA (0xf << 8) /* Row Precharge All delay */ 75#define AT91_DDRSDRC_TRPA (0xf << 8) /* Row Precharge All delay */
75#define AT91_DDRSDRC_TRTP (0x7 << 12) /* Read to Precharge delay */ 76#define AT91_DDRSDRC_TRTP (0x7 << 12) /* Read to Precharge delay */
76 77
77#define AT91_DDRSDRC_LPR 0x1C /* Low Power Register */ 78#define AT91_DDRSDRC_LPR 0x1C /* Low Power Register */
79#define AT91CAP9_DDRSDRC_LPR 0x18 /* Low Power Register */
78#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */ 80#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
79#define AT91_DDRSDRC_LPCB_DISABLE 0 81#define AT91_DDRSDRC_LPCB_DISABLE 0
80#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1 82#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1
@@ -92,32 +94,40 @@
92#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ 94#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */
93 95
94#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ 96#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */
97#define AT91CAP9_DDRSDRC_MDR 0x1C /* Memory Device Register */
95#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ 98#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */
96#define AT91_DDRSDRC_MD_SDR 0 99#define AT91_DDRSDRC_MD_SDR 0
97#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 100#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
101#define AT91CAP9_DDRSDRC_MD_DDR 2
98#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 102#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
99#define AT91_DDRSDRC_MD_DDR2 6 103#define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */
100#define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */ 104#define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */
101#define AT91_DDRSDRC_DBW_32BITS (0 << 4) 105#define AT91_DDRSDRC_DBW_32BITS (0 << 4)
102#define AT91_DDRSDRC_DBW_16BITS (1 << 4) 106#define AT91_DDRSDRC_DBW_16BITS (1 << 4)
103 107
104#define AT91_DDRSDRC_DLL 0x24 /* DLL Information Register */ 108#define AT91_DDRSDRC_DLL 0x24 /* DLL Information Register */
109#define AT91CAP9_DDRSDRC_DLL 0x20 /* DLL Information Register */
105#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */ 110#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */
106#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */ 111#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */
107#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */ 112#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */
113#define AT91CAP9_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */
114#define AT91CAP9_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */
115#define AT91CAP9_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */
108#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */ 116#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */
117#define AT91CAP9_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */
118#define AT91CAP9_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */
109 119
110#define AT91_DDRSDRC_HS 0x2C /* High Speed Register */ 120#define AT91_DDRSDRC_HS 0x2C /* High Speed Register [SAM9 Only] */
111#define AT91_DDRSDRC_DIS_ATCP_RD (1 << 2) /* Anticip read access is disabled */ 121#define AT91_DDRSDRC_DIS_ATCP_RD (1 << 2) /* Anticip read access is disabled */
112 122
113#define AT91_DDRSDRC_DELAY(n) (0x30 + (0x4 * (n))) /* Delay I/O Register n */ 123#define AT91_DDRSDRC_DELAY(n) (0x30 + (0x4 * (n))) /* Delay I/O Register n */
114 124
115#define AT91_DDRSDRC_WPMR 0xE4 /* Write Protect Mode Register */ 125#define AT91_DDRSDRC_WPMR 0xE4 /* Write Protect Mode Register [SAM9 Only] */
116#define AT91_DDRSDRC_WP (1 << 0) /* Write protect enable */ 126#define AT91_DDRSDRC_WP (1 << 0) /* Write protect enable */
117#define AT91_DDRSDRC_WPKEY (0xffffff << 8) /* Write protect key */ 127#define AT91_DDRSDRC_WPKEY (0xffffff << 8) /* Write protect key */
118#define AT91_DDRSDRC_KEY (0x444452 << 8) /* Write protect key = "DDR" */ 128#define AT91_DDRSDRC_KEY (0x444452 << 8) /* Write protect key = "DDR" */
119 129
120#define AT91_DDRSDRC_WPSR 0xE8 /* Write Protect Status Register */ 130#define AT91_DDRSDRC_WPSR 0xE8 /* Write Protect Status Register [SAM9 Only] */
121#define AT91_DDRSDRC_WPVS (1 << 0) /* Write protect violation status */ 131#define AT91_DDRSDRC_WPVS (1 << 0) /* Write protect violation status */
122#define AT91_DDRSDRC_WPVSRC (0xffff << 8) /* Write protect violation source */ 132#define AT91_DDRSDRC_WPVSRC (0xffff << 8) /* Write protect violation source */
123 133
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index f0c23c960dec..dd9c95ea0862 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -90,7 +90,6 @@
90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 93#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
95 94
96#define AT91SAM9G45_BASE_ECC 0xffffe200 95#define AT91SAM9G45_BASE_ECC 0xffffe200
@@ -102,6 +101,7 @@
102#define AT91SAM9G45_BASE_PIOC 0xfffff600 101#define AT91SAM9G45_BASE_PIOC 0xfffff600
103#define AT91SAM9G45_BASE_PIOD 0xfffff800 102#define AT91SAM9G45_BASE_PIOD 0xfffff800
104#define AT91SAM9G45_BASE_PIOE 0xfffffa00 103#define AT91SAM9G45_BASE_PIOE 0xfffffa00
104#define AT91SAM9G45_BASE_RSTC 0xfffffd00
105#define AT91SAM9G45_BASE_SHDWC 0xfffffd10 105#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
106#define AT91SAM9G45_BASE_RTT 0xfffffd20 106#define AT91SAM9G45_BASE_RTT 0xfffffd20
107#define AT91SAM9G45_BASE_PIT 0xfffffd30 107#define AT91SAM9G45_BASE_PIT 0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 2bb359e60b97..d7bead7118da 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -72,7 +72,6 @@
72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
74#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 74#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
75#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
76#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) 75#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
77#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 76#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
78 77
@@ -84,6 +83,7 @@
84#define AT91SAM9RL_BASE_PIOB 0xfffff600 83#define AT91SAM9RL_BASE_PIOB 0xfffff600
85#define AT91SAM9RL_BASE_PIOC 0xfffff800 84#define AT91SAM9RL_BASE_PIOC 0xfffff800
86#define AT91SAM9RL_BASE_PIOD 0xfffffa00 85#define AT91SAM9RL_BASE_PIOD 0xfffffa00
86#define AT91SAM9RL_BASE_RSTC 0xfffffd00
87#define AT91SAM9RL_BASE_SHDWC 0xfffffd10 87#define AT91SAM9RL_BASE_SHDWC 0xfffffd10
88#define AT91SAM9RL_BASE_RTT 0xfffffd20 88#define AT91SAM9RL_BASE_RTT 0xfffffd20
89#define AT91SAM9RL_BASE_PIT 0xfffffd30 89#define AT91SAM9RL_BASE_PIT 0xfffffd30
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index d0b377b21bd7..3b33f07b1e11 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -88,7 +88,7 @@ extern void __init at91_add_device_eth(struct macb_platform_data *data);
88struct at91_usbh_data { 88struct at91_usbh_data {
89 u8 ports; /* number of ports on root hub */ 89 u8 ports; /* number of ports on root hub */
90 int vbus_pin[2]; /* port power-control pin */ 90 int vbus_pin[2]; /* port power-control pin */
91 u8 vbus_pin_inverted; 91 u8 vbus_pin_active_low[2];
92 u8 overcurrent_supported; 92 u8 overcurrent_supported;
93 int overcurrent_pin[2]; 93 int overcurrent_pin[2];
94 u8 overcurrent_status[2]; 94 u8 overcurrent_status[2];
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 62ad95556c36..1606379ac284 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,6 @@
34/* 34/*
35 * Show the reason for the previous system reset. 35 * Show the reason for the previous system reset.
36 */ 36 */
37#if defined(AT91_RSTC)
38 37
39#include <mach/at91_rstc.h> 38#include <mach/at91_rstc.h>
40#include <mach/at91_shdwc.h> 39#include <mach/at91_shdwc.h>
@@ -58,10 +57,10 @@ static void __init show_reset_status(void)
58 char *reason, *r2 = reset; 57 char *reason, *r2 = reset;
59 u32 reset_type, wake_type; 58 u32 reset_type, wake_type;
60 59
61 if (!at91_shdwc_base) 60 if (!at91_shdwc_base || !at91_rstc_base)
62 return; 61 return;
63 62
64 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; 63 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
65 wake_type = at91_shdwc_read(AT91_SHDW_SR); 64 wake_type = at91_shdwc_read(AT91_SHDW_SR);
66 65
67 switch (reset_type) { 66 switch (reset_type) {
@@ -102,10 +101,6 @@ static void __init show_reset_status(void)
102 } 101 }
103 pr_info("AT91: Starting after %s %s\n", reason, r2); 102 pr_info("AT91: Starting after %s %s\n", reason, r2);
104} 103}
105#else
106static void __init show_reset_status(void) {}
107#endif
108
109 104
110static int at91_pm_valid_state(suspend_state_t state) 105static int at91_pm_valid_state(suspend_state_t state)
111{ 106{
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index ce9a20699111..7eb40d24242f 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -25,21 +25,21 @@ static inline u32 sdram_selfrefresh_enable(void)
25 : : "r" (0)) 25 : : "r" (0))
26 26
27#elif defined(CONFIG_ARCH_AT91CAP9) 27#elif defined(CONFIG_ARCH_AT91CAP9)
28#include <mach/at91cap9_ddrsdr.h> 28#include <mach/at91sam9_ddrsdr.h>
29 29
30 30
31static inline u32 sdram_selfrefresh_enable(void) 31static inline u32 sdram_selfrefresh_enable(void)
32{ 32{
33 u32 saved_lpr, lpr; 33 u32 saved_lpr, lpr;
34 34
35 saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR); 35 saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR);
36 36
37 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; 37 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
38 at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); 38 at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
39 return saved_lpr; 39 return saved_lpr;
40} 40}
41 41
42#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr) 42#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr)
43#define wait_for_interrupt_enable() cpu_do_idle() 43#define wait_for_interrupt_enable() cpu_do_idle()
44 44
45#elif defined(CONFIG_ARCH_AT91SAM9G45) 45#elif defined(CONFIG_ARCH_AT91SAM9G45)
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index f7922a436172..92dfb8461392 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -18,9 +18,8 @@
18 18
19#if defined(CONFIG_ARCH_AT91RM9200) 19#if defined(CONFIG_ARCH_AT91RM9200)
20#include <mach/at91rm9200_mc.h> 20#include <mach/at91rm9200_mc.h>
21#elif defined(CONFIG_ARCH_AT91CAP9) 21#elif defined(CONFIG_ARCH_AT91CAP9) \
22#include <mach/at91cap9_ddrsdr.h> 22 || defined(CONFIG_ARCH_AT91SAM9G45)
23#elif defined(CONFIG_ARCH_AT91SAM9G45)
24#include <mach/at91sam9_ddrsdr.h> 23#include <mach/at91sam9_ddrsdr.h>
25#else 24#else
26#include <mach/at91sam9_sdramc.h> 25#include <mach/at91sam9_sdramc.h>
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 8bdcc3cb6012..69d3fc4c46f3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -29,9 +29,12 @@ EXPORT_SYMBOL(at91_soc_initdata);
29void __init at91rm9200_set_type(int type) 29void __init at91rm9200_set_type(int type)
30{ 30{
31 if (type == ARCH_REVISON_9200_PQFP) 31 if (type == ARCH_REVISON_9200_PQFP)
32 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
33 else
34 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP; 32 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
33 else
34 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
35
36 pr_info("AT91: filled in soc subtype: %s\n",
37 at91_get_soc_subtype(&at91_soc_initdata));
35} 38}
36 39
37void __init at91_init_irq_default(void) 40void __init at91_init_irq_default(void)
@@ -281,6 +284,15 @@ void __init at91_ioremap_shdwc(u32 base_addr)
281 pm_power_off = at91sam9_poweroff; 284 pm_power_off = at91sam9_poweroff;
282} 285}
283 286
287void __iomem *at91_rstc_base;
288
289void __init at91_ioremap_rstc(u32 base_addr)
290{
291 at91_rstc_base = ioremap(base_addr, 16);
292 if (!at91_rstc_base)
293 panic("Impossible to ioremap at91_rstc_base\n");
294}
295
284void __init at91_initialize(unsigned long main_clock) 296void __init at91_initialize(unsigned long main_clock)
285{ 297{
286 at91_boot_soc.ioremap_registers(); 298 at91_boot_soc.ioremap_registers();
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index da70e7e39937..dd1ad55524c9 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -16,6 +16,7 @@
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/smp_plat.h>
19 20
20#include <mach/regs-pmu.h> 21#include <mach/regs-pmu.h>
21 22
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 683aec786b78..0f2035a1eb6e 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -23,6 +23,7 @@
23 23
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
25#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
26#include <asm/smp_plat.h>
26#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 7afbe1e55beb..8394d512a402 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -25,6 +25,7 @@
25#include <linux/smp.h> 25#include <linux/smp.h>
26 26
27#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
28#include <asm/smp_plat.h>
28#include <asm/smp_scu.h> 29#include <asm/smp_scu.h>
29#include <asm/hardware/arm_timer.h> 30#include <asm/hardware/arm_timer.h>
30#include <asm/hardware/timer-sp.h> 31#include <asm/hardware/timer-sp.h>
@@ -72,9 +73,7 @@ static void __init highbank_map_io(void)
72 73
73void highbank_set_cpu_jump(int cpu, void *jump_addr) 74void highbank_set_cpu_jump(int cpu, void *jump_addr)
74{ 75{
75#ifdef CONFIG_SMP
76 cpu = cpu_logical_map(cpu); 76 cpu = cpu_logical_map(cpu);
77#endif
78 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); 77 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
79 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 78 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
80 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 79 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0e6de366c648..4defb97bbfc8 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -22,6 +22,18 @@ config ARCH_MX25
22config MACH_MX27 22config MACH_MX27
23 bool 23 bool
24 24
25config ARCH_MX5
26 bool
27
28config ARCH_MX50
29 bool
30
31config ARCH_MX51
32 bool
33
34config ARCH_MX53
35 bool
36
25config SOC_IMX1 37config SOC_IMX1
26 bool 38 bool
27 select ARCH_MX1 39 select ARCH_MX1
@@ -73,6 +85,31 @@ config SOC_IMX35
73 select MXC_AVIC 85 select MXC_AVIC
74 select SMP_ON_UP if SMP 86 select SMP_ON_UP if SMP
75 87
88config SOC_IMX5
89 select CPU_V7
90 select MXC_TZIC
91 select ARCH_MXC_IOMUX_V3
92 select ARCH_MXC_AUDMUX_V2
93 select ARCH_HAS_CPUFREQ
94 select ARCH_MX5
95 bool
96
97config SOC_IMX50
98 bool
99 select SOC_IMX5
100 select ARCH_MX50
101
102config SOC_IMX51
103 bool
104 select SOC_IMX5
105 select ARCH_MX5
106 select ARCH_MX51
107
108config SOC_IMX53
109 bool
110 select SOC_IMX5
111 select ARCH_MX5
112 select ARCH_MX53
76 113
77if ARCH_IMX_V4_V5 114if ARCH_IMX_V4_V5
78 115
@@ -592,6 +629,207 @@ config MACH_VPR200
592 Include support for VPR200 platform. This includes specific 629 Include support for VPR200 platform. This includes specific
593 configurations for the board and its peripherals. 630 configurations for the board and its peripherals.
594 631
632comment "i.MX5 platforms:"
633
634config MACH_MX50_RDP
635 bool "Support MX50 reference design platform"
636 depends on BROKEN
637 select SOC_IMX50
638 select IMX_HAVE_PLATFORM_IMX_I2C
639 select IMX_HAVE_PLATFORM_IMX_UART
640 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
641 select IMX_HAVE_PLATFORM_SPI_IMX
642 help
643 Include support for MX50 reference design platform (RDP) board. This
644 includes specific configurations for the board and its peripherals.
645
646comment "i.MX51 machines:"
647
648config MACH_IMX51_DT
649 bool "Support i.MX51 platforms from device tree"
650 select SOC_IMX51
651 select USE_OF
652 select MACH_MX51_BABBAGE
653 help
654 Include support for Freescale i.MX51 based platforms
655 using the device tree for discovery
656
657config MACH_MX51_BABBAGE
658 bool "Support MX51 BABBAGE platforms"
659 select SOC_IMX51
660 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
661 select IMX_HAVE_PLATFORM_IMX2_WDT
662 select IMX_HAVE_PLATFORM_IMX_I2C
663 select IMX_HAVE_PLATFORM_IMX_UART
664 select IMX_HAVE_PLATFORM_MXC_EHCI
665 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
666 select IMX_HAVE_PLATFORM_SPI_IMX
667 help
668 Include support for MX51 Babbage platform, also known as MX51EVK in
669 u-boot. This includes specific configurations for the board and its
670 peripherals.
671
672config MACH_MX51_3DS
673 bool "Support MX51PDK (3DS)"
674 select SOC_IMX51
675 select IMX_HAVE_PLATFORM_IMX2_WDT
676 select IMX_HAVE_PLATFORM_IMX_KEYPAD
677 select IMX_HAVE_PLATFORM_IMX_UART
678 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
679 select IMX_HAVE_PLATFORM_SPI_IMX
680 select MXC_DEBUG_BOARD
681 help
682 Include support for MX51PDK (3DS) platform. This includes specific
683 configurations for the board and its peripherals.
684
685config MACH_EUKREA_CPUIMX51
686 bool "Support Eukrea CPUIMX51 module"
687 select SOC_IMX51
688 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
689 select IMX_HAVE_PLATFORM_IMX_I2C
690 select IMX_HAVE_PLATFORM_IMX_UART
691 select IMX_HAVE_PLATFORM_MXC_EHCI
692 select IMX_HAVE_PLATFORM_MXC_NAND
693 select IMX_HAVE_PLATFORM_SPI_IMX
694 help
695 Include support for Eukrea CPUIMX51 platform. This includes
696 specific configurations for the module and its peripherals.
697
698choice
699 prompt "Baseboard"
700 depends on MACH_EUKREA_CPUIMX51
701 default MACH_EUKREA_MBIMX51_BASEBOARD
702
703config MACH_EUKREA_MBIMX51_BASEBOARD
704 prompt "Eukrea MBIMX51 development board"
705 bool
706 select IMX_HAVE_PLATFORM_IMX_KEYPAD
707 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
708 select LEDS_GPIO_REGISTER
709 help
710 This adds board specific devices that can be found on Eukrea's
711 MBIMX51 evaluation board.
712
713endchoice
714
715config MACH_EUKREA_CPUIMX51SD
716 bool "Support Eukrea CPUIMX51SD module"
717 select SOC_IMX51
718 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
719 select IMX_HAVE_PLATFORM_IMX_I2C
720 select IMX_HAVE_PLATFORM_IMX_UART
721 select IMX_HAVE_PLATFORM_MXC_EHCI
722 select IMX_HAVE_PLATFORM_MXC_NAND
723 select IMX_HAVE_PLATFORM_SPI_IMX
724 help
725 Include support for Eukrea CPUIMX51SD platform. This includes
726 specific configurations for the module and its peripherals.
727
728choice
729 prompt "Baseboard"
730 depends on MACH_EUKREA_CPUIMX51SD
731 default MACH_EUKREA_MBIMXSD51_BASEBOARD
732
733config MACH_EUKREA_MBIMXSD51_BASEBOARD
734 prompt "Eukrea MBIMXSD development board"
735 bool
736 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
737 select LEDS_GPIO_REGISTER
738 help
739 This adds board specific devices that can be found on Eukrea's
740 MBIMXSD evaluation board.
741
742endchoice
743
744config MX51_EFIKA_COMMON
745 bool
746 select SOC_IMX51
747 select IMX_HAVE_PLATFORM_IMX_UART
748 select IMX_HAVE_PLATFORM_MXC_EHCI
749 select IMX_HAVE_PLATFORM_PATA_IMX
750 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
751 select IMX_HAVE_PLATFORM_SPI_IMX
752 select MXC_ULPI if USB_ULPI
753
754config MACH_MX51_EFIKAMX
755 bool "Support MX51 Genesi Efika MX nettop"
756 select LEDS_GPIO_REGISTER
757 select MX51_EFIKA_COMMON
758 help
759 Include support for Genesi Efika MX nettop. This includes specific
760 configurations for the board and its peripherals.
761
762config MACH_MX51_EFIKASB
763 bool "Support MX51 Genesi Efika Smartbook"
764 select LEDS_GPIO_REGISTER
765 select MX51_EFIKA_COMMON
766 help
767 Include support for Genesi Efika Smartbook. This includes specific
768 configurations for the board and its peripherals.
769
770comment "i.MX53 machines:"
771
772config MACH_IMX53_DT
773 bool "Support i.MX53 platforms from device tree"
774 select SOC_IMX53
775 select USE_OF
776 select MACH_MX53_ARD
777 select MACH_MX53_EVK
778 select MACH_MX53_LOCO
779 select MACH_MX53_SMD
780 help
781 Include support for Freescale i.MX53 based platforms
782 using the device tree for discovery
783
784config MACH_MX53_EVK
785 bool "Support MX53 EVK platforms"
786 select SOC_IMX53
787 select IMX_HAVE_PLATFORM_IMX2_WDT
788 select IMX_HAVE_PLATFORM_IMX_UART
789 select IMX_HAVE_PLATFORM_IMX_I2C
790 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
791 select IMX_HAVE_PLATFORM_SPI_IMX
792 select LEDS_GPIO_REGISTER
793 help
794 Include support for MX53 EVK platform. This includes specific
795 configurations for the board and its peripherals.
796
797config MACH_MX53_SMD
798 bool "Support MX53 SMD platforms"
799 select SOC_IMX53
800 select IMX_HAVE_PLATFORM_IMX2_WDT
801 select IMX_HAVE_PLATFORM_IMX_I2C
802 select IMX_HAVE_PLATFORM_IMX_UART
803 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
804 help
805 Include support for MX53 SMD platform. This includes specific
806 configurations for the board and its peripherals.
807
808config MACH_MX53_LOCO
809 bool "Support MX53 LOCO platforms"
810 select SOC_IMX53
811 select IMX_HAVE_PLATFORM_IMX2_WDT
812 select IMX_HAVE_PLATFORM_IMX_I2C
813 select IMX_HAVE_PLATFORM_IMX_UART
814 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
815 select IMX_HAVE_PLATFORM_GPIO_KEYS
816 select LEDS_GPIO_REGISTER
817 help
818 Include support for MX53 LOCO platform. This includes specific
819 configurations for the board and its peripherals.
820
821config MACH_MX53_ARD
822 bool "Support MX53 ARD platforms"
823 select SOC_IMX53
824 select IMX_HAVE_PLATFORM_IMX2_WDT
825 select IMX_HAVE_PLATFORM_IMX_I2C
826 select IMX_HAVE_PLATFORM_IMX_UART
827 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
828 select IMX_HAVE_PLATFORM_GPIO_KEYS
829 help
830 Include support for MX53 ARD platform. This includes specific
831 configurations for the board and its peripherals.
832
595comment "i.MX6 family:" 833comment "i.MX6 family:"
596 834
597config SOC_IMX6Q 835config SOC_IMX6Q
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index f5920c24f7d7..55db9c488f2b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -11,6 +11,8 @@ obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
11obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o 11obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
12obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o 12obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o
13 13
14obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clock-mx51-mx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
15
14# Support for CMOS sensor interface 16# Support for CMOS sensor interface
15obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o 17obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
16 18
@@ -75,3 +77,22 @@ obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o
75ifeq ($(CONFIG_PM),y) 77ifeq ($(CONFIG_PM),y)
76obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o 78obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
77endif 79endif
80
81# i.MX5 based machines
82obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
83obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o
84obj-$(CONFIG_MACH_MX53_EVK) += mach-mx53_evk.o
85obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o
86obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o
87obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o
88obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += mach-cpuimx51.o
89obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
90obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
91obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
92obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
93obj-$(CONFIG_MACH_MX51_EFIKAMX) += mach-mx51_efikamx.o
94obj-$(CONFIG_MACH_MX51_EFIKASB) += mach-mx51_efikasb.o
95obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
96
97obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
98obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 5f4d06af4912..6dfdbcc83afd 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -22,6 +22,18 @@ zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100 22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000 23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
24 24
25zreladdr-$(CONFIG_SOC_IMX50) += 0x70008000
26params_phys-$(CONFIG_SOC_IMX50) := 0x70000100
27initrd_phys-$(CONFIG_SOC_IMX50) := 0x70800000
28
29zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000
30params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
31initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
32
33zreladdr-$(CONFIG_SOC_IMX53) += 0x70008000
34params_phys-$(CONFIG_SOC_IMX53) := 0x70000100
35initrd_phys-$(CONFIG_SOC_IMX53) := 0x70800000
36
25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 37zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 38params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 39initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 9273c2a24b54..2d88f8b9a454 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -814,6 +814,16 @@ DEF_PFD(pll3_pfd_540m, PFD_480, PFD1, &pll3_usb_otg);
814DEF_PFD(pll3_pfd_508m, PFD_480, PFD2, &pll3_usb_otg); 814DEF_PFD(pll3_pfd_508m, PFD_480, PFD2, &pll3_usb_otg);
815DEF_PFD(pll3_pfd_454m, PFD_480, PFD3, &pll3_usb_otg); 815DEF_PFD(pll3_pfd_454m, PFD_480, PFD3, &pll3_usb_otg);
816 816
817static unsigned long twd_clk_get_rate(struct clk *clk)
818{
819 return clk_get_rate(clk->parent) / 2;
820}
821
822static struct clk twd_clk = {
823 .parent = &arm_clk,
824 .get_rate = twd_clk_get_rate,
825};
826
817static unsigned long pll2_200m_get_rate(struct clk *clk) 827static unsigned long pll2_200m_get_rate(struct clk *clk)
818{ 828{
819 return clk_get_rate(clk->parent) / 2; 829 return clk_get_rate(clk->parent) / 2;
@@ -1894,6 +1904,7 @@ static struct clk_lookup lookups[] = {
1894 _REGISTER_CLOCK("20ec000.sdma", NULL, sdma_clk), 1904 _REGISTER_CLOCK("20ec000.sdma", NULL, sdma_clk),
1895 _REGISTER_CLOCK("20bc000.wdog", NULL, dummy_clk), 1905 _REGISTER_CLOCK("20bc000.wdog", NULL, dummy_clk),
1896 _REGISTER_CLOCK("20c0000.wdog", NULL, dummy_clk), 1906 _REGISTER_CLOCK("20c0000.wdog", NULL, dummy_clk),
1907 _REGISTER_CLOCK("smp_twd", NULL, twd_clk),
1897 _REGISTER_CLOCK(NULL, "ckih", ckih_clk), 1908 _REGISTER_CLOCK(NULL, "ckih", ckih_clk),
1898 _REGISTER_CLOCK(NULL, "ckil_clk", ckil_clk), 1909 _REGISTER_CLOCK(NULL, "ckil_clk", ckil_clk),
1899 _REGISTER_CLOCK(NULL, "aips_tz1_clk", aips_tz1_clk), 1910 _REGISTER_CLOCK(NULL, "aips_tz1_clk", aips_tz1_clk),
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-imx/clock-mx51-mx53.c
index 4cb276977190..08470504a088 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-imx/clock-mx51-mx53.c
@@ -23,7 +23,7 @@
23#include <mach/common.h> 23#include <mach/common.h>
24#include <mach/clock.h> 24#include <mach/clock.h>
25 25
26#include "crm_regs.h" 26#include "crm-regs-imx5.h"
27 27
28/* External clock values passed-in by the board code */ 28/* External clock values passed-in by the board code */
29static unsigned long external_high_reference, external_low_reference; 29static unsigned long external_high_reference, external_low_reference;
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-imx/cpu-imx5.c
index 5e2e7a843860..5e2e7a843860 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
diff --git a/arch/arm/mach-mx5/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 9d34c3d4c024..9d34c3d4c024 100644
--- a/arch/arm/mach-mx5/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
diff --git a/arch/arm/mach-mx5/cpu_op-mx51.h b/arch/arm/mach-imx/cpu_op-mx51.h
index 97477fecb469..97477fecb469 100644
--- a/arch/arm/mach-mx5/cpu_op-mx51.h
+++ b/arch/arm/mach-imx/cpu_op-mx51.h
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-imx/crm-regs-imx5.h
index 5e11ba7daee2..5e11ba7daee2 100644
--- a/arch/arm/mach-mx5/crm_regs.h
+++ b/arch/arm/mach-imx/crm-regs-imx5.h
diff --git a/arch/arm/mach-mx5/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h
index 7216667eaafc..7216667eaafc 100644
--- a/arch/arm/mach-mx5/devices-imx50.h
+++ b/arch/arm/mach-imx/devices-imx50.h
diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h
index af488bc0e225..af488bc0e225 100644
--- a/arch/arm/mach-mx5/devices-imx51.h
+++ b/arch/arm/mach-imx/devices-imx51.h
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-imx/devices-imx53.h
index 6e1e5d1f8c3a..6e1e5d1f8c3a 100644
--- a/arch/arm/mach-mx5/devices-imx53.h
+++ b/arch/arm/mach-imx/devices-imx53.h
diff --git a/arch/arm/mach-mx5/efika.h b/arch/arm/mach-imx/efika.h
index 014aa985faae..014aa985faae 100644
--- a/arch/arm/mach-mx5/efika.h
+++ b/arch/arm/mach-imx/efika.h
diff --git a/arch/arm/mach-mx5/ehci.c b/arch/arm/mach-imx/ehci-imx5.c
index c17fa131728b..c17fa131728b 100644
--- a/arch/arm/mach-mx5/ehci.c
+++ b/arch/arm/mach-imx/ehci-imx5.c
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
index a6a3ab8f1b1c..a6a3ab8f1b1c 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
index d817fc80b986..d817fc80b986 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index e6bad17b908c..e6bad17b908c 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 05ebb3e68679..05ebb3e68679 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-imx/mach-cpuimx51.c
index 944025da8333..944025da8333 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-imx/mach-cpuimx51.c
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index 9fbe923c8b08..9fbe923c8b08 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c
index 42b66e8d9615..42b66e8d9615 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-imx/mach-mx50_rdp.c
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
index 83eab4176ca4..83eab4176ca4 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-imx/mach-mx51_3ds.c
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index e4b822e9f719..e4b822e9f719 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-imx/mach-mx51_efikamx.c
index 3a5ed2dd885a..3a5ed2dd885a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-imx/mach-mx51_efikamx.c
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-imx/mach-mx51_efikasb.c
index ea5f65b0381a..ea5f65b0381a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-imx/mach-mx51_efikasb.c
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c
index 5f224f1c3eb6..753f4fc9ec04 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-imx/mach-mx53_ard.c
@@ -32,7 +32,6 @@
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34 34
35#include "crm_regs.h"
36#include "devices-imx53.h" 35#include "devices-imx53.h"
37 36
38#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) 37#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31)
@@ -189,8 +188,10 @@ static int weim_cs_config(void)
189 return -ENOMEM; 188 return -ENOMEM;
190 189
191 iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K); 190 iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K);
192 if (!iomuxc_base) 191 if (!iomuxc_base) {
192 iounmap(weim_base);
193 return -ENOMEM; 193 return -ENOMEM;
194 }
194 195
195 /* CS1 timings for LAN9220 */ 196 /* CS1 timings for LAN9220 */
196 writel(0x20001, (weim_base + 0x18)); 197 writel(0x20001, (weim_base + 0x18));
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-imx/mach-mx53_evk.c
index d6ce137896d6..5a72188b9cdb 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-imx/mach-mx53_evk.c
@@ -37,7 +37,6 @@
37#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) 37#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
38#define MX53EVK_LED IMX_GPIO_NR(7, 7) 38#define MX53EVK_LED IMX_GPIO_NR(7, 7)
39 39
40#include "crm_regs.h"
41#include "devices-imx53.h" 40#include "devices-imx53.h"
42 41
43static iomux_v3_cfg_t mx53_evk_pads[] = { 42static iomux_v3_cfg_t mx53_evk_pads[] = {
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-imx/mach-mx53_loco.c
index fd8b524e1c58..37f67cac15a4 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-imx/mach-mx53_loco.c
@@ -32,7 +32,6 @@
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34 34
35#include "crm_regs.h"
36#include "devices-imx53.h" 35#include "devices-imx53.h"
37 36
38#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8) 37#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8)
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-imx/mach-mx53_smd.c
index 22c53c9b18aa..8e972c5c3e13 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-imx/mach-mx53_smd.c
@@ -31,7 +31,6 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/time.h> 32#include <asm/mach/time.h>
33 33
34#include "crm_regs.h"
35#include "devices-imx53.h" 34#include "devices-imx53.h"
36 35
37#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) 36#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6)
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-imx/mm-imx5.c
index 49549a72dc7d..49549a72dc7d 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-imx/mm-imx5.c
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-imx/mx51_efika.c
index ec6ca91b299b..ec6ca91b299b 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-imx/mx51_efika.c
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-imx/pm-imx5.c
index 5eebfaad1226..6dc093448057 100644
--- a/arch/arm/mach-mx5/system.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -1,8 +1,6 @@
1/* 1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */ 3 *
4
5/*
6 * The code contained herein is licensed under the GNU General Public 4 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 5 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations: 6 * Version 2 or later at the following locations:
@@ -10,14 +8,22 @@
10 * http://www.opensource.org/licenses/gpl-license.html 8 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html 9 * http://www.gnu.org/copyleft/gpl.html
12 */ 10 */
13#include <linux/platform_device.h> 11#include <linux/suspend.h>
12#include <linux/clk.h>
14#include <linux/io.h> 13#include <linux/io.h>
15#include <mach/hardware.h> 14#include <linux/err.h>
15#include <asm/cacheflush.h>
16#include <asm/tlbflush.h>
16#include <mach/common.h> 17#include <mach/common.h>
17#include "crm_regs.h" 18#include <mach/hardware.h>
19#include "crm-regs-imx5.h"
20
21static struct clk *gpc_dvfs_clk;
18 22
19/* set cpu low power mode before WFI instruction. This function is called 23/*
20 * mx5 because it can be used for mx50, mx51, and mx53.*/ 24 * set cpu low power mode before WFI instruction. This function is called
25 * mx5 because it can be used for mx50, mx51, and mx53.
26 */
21void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode) 27void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
22{ 28{
23 u32 plat_lpc, arm_srpgcr, ccm_clpcr; 29 u32 plat_lpc, arm_srpgcr, ccm_clpcr;
@@ -80,3 +86,68 @@ void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
80 __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR); 86 __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
81 } 87 }
82} 88}
89
90static int mx5_suspend_prepare(void)
91{
92 return clk_enable(gpc_dvfs_clk);
93}
94
95static int mx5_suspend_enter(suspend_state_t state)
96{
97 switch (state) {
98 case PM_SUSPEND_MEM:
99 mx5_cpu_lp_set(STOP_POWER_OFF);
100 break;
101 case PM_SUSPEND_STANDBY:
102 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
103 break;
104 default:
105 return -EINVAL;
106 }
107
108 if (state == PM_SUSPEND_MEM) {
109 local_flush_tlb_all();
110 flush_cache_all();
111
112 /*clear the EMPGC0/1 bits */
113 __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
114 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
115 }
116 cpu_do_idle();
117 return 0;
118}
119
120static void mx5_suspend_finish(void)
121{
122 clk_disable(gpc_dvfs_clk);
123}
124
125static int mx5_pm_valid(suspend_state_t state)
126{
127 return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
128}
129
130static const struct platform_suspend_ops mx5_suspend_ops = {
131 .valid = mx5_pm_valid,
132 .prepare = mx5_suspend_prepare,
133 .enter = mx5_suspend_enter,
134 .finish = mx5_suspend_finish,
135};
136
137static int __init mx5_pm_init(void)
138{
139 if (!cpu_is_mx51() && !cpu_is_mx53())
140 return 0;
141
142 if (gpc_dvfs_clk == NULL)
143 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
144
145 if (!IS_ERR(gpc_dvfs_clk)) {
146 if (cpu_is_mx51())
147 suspend_set_ops(&mx5_suspend_ops);
148 } else
149 return -EPERM;
150
151 return 0;
152}
153device_initcall(mx5_pm_init);
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 29bd1243781e..e15f1555c59b 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -15,6 +15,7 @@
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_address.h> 16#include <linux/of_address.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <asm/smp_plat.h>
18 19
19#define SRC_SCR 0x000 20#define SRC_SCR 0x000
20#define SRC_GPR1 0x020 21#define SRC_GPR1 0x020
@@ -24,10 +25,6 @@
24 25
25static void __iomem *src_base; 26static void __iomem *src_base;
26 27
27#ifndef CONFIG_SMP
28#define cpu_logical_map(cpu) 0
29#endif
30
31void imx_enable_cpu(int cpu, bool enable) 28void imx_enable_cpu(int cpu, bool enable)
32{ 29{
33 u32 mask, val; 30 u32 mask, val;
diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c
index 41c252de0215..a446fc14221f 100644
--- a/arch/arm/mach-msm/hotplug.c
+++ b/arch/arm/mach-msm/hotplug.c
@@ -11,6 +11,7 @@
11#include <linux/smp.h> 11#include <linux/smp.h>
12 12
13#include <asm/cacheflush.h> 13#include <asm/cacheflush.h>
14#include <asm/smp_plat.h>
14 15
15extern volatile int pen_release; 16extern volatile int pen_release;
16 17
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 0b3e357c4c8c..db0117ec55f4 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -20,6 +20,7 @@
20#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
21#include <asm/cputype.h> 21#include <asm/cputype.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/smp_plat.h>
23 24
24#include <mach/msm_iomap.h> 25#include <mach/msm_iomap.h>
25 26
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
deleted file mode 100644
index af0c212e3c7b..000000000000
--- a/arch/arm/mach-mx5/Kconfig
+++ /dev/null
@@ -1,244 +0,0 @@
1if ARCH_MX5
2
3# ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single
4# image. So for most time, SOC_IMX50/51/53 should be used.
5
6config ARCH_MX51
7 bool
8
9config ARCH_MX50
10 bool
11
12config ARCH_MX53
13 bool
14
15config SOC_IMX50
16 bool
17 select CPU_V7
18 select ARM_L1_CACHE_SHIFT_6
19 select MXC_TZIC
20 select ARCH_MXC_IOMUX_V3
21 select ARCH_MXC_AUDMUX_V2
22 select ARCH_HAS_CPUFREQ
23 select ARCH_MX50
24
25config SOC_IMX51
26 bool
27 select CPU_V7
28 select ARM_L1_CACHE_SHIFT_6
29 select MXC_TZIC
30 select ARCH_MXC_IOMUX_V3
31 select ARCH_MXC_AUDMUX_V2
32 select ARCH_HAS_CPUFREQ
33 select ARCH_MX51
34
35config SOC_IMX53
36 bool
37 select CPU_V7
38 select ARM_L1_CACHE_SHIFT_6
39 select MXC_TZIC
40 select ARCH_MXC_IOMUX_V3
41 select ARCH_MX53
42
43#comment "i.MX50 machines:"
44
45config MACH_MX50_RDP
46 bool "Support MX50 reference design platform"
47 depends on BROKEN
48 select SOC_IMX50
49 select IMX_HAVE_PLATFORM_IMX_I2C
50 select IMX_HAVE_PLATFORM_IMX_UART
51 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
52 select IMX_HAVE_PLATFORM_SPI_IMX
53 help
54 Include support for MX50 reference design platform (RDP) board. This
55 includes specific configurations for the board and its peripherals.
56
57comment "i.MX51 machines:"
58
59config MACH_IMX51_DT
60 bool "Support i.MX51 platforms from device tree"
61 select SOC_IMX51
62 select USE_OF
63 select MACH_MX51_BABBAGE
64 help
65 Include support for Freescale i.MX51 based platforms
66 using the device tree for discovery
67
68config MACH_MX51_BABBAGE
69 bool "Support MX51 BABBAGE platforms"
70 select SOC_IMX51
71 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
72 select IMX_HAVE_PLATFORM_IMX2_WDT
73 select IMX_HAVE_PLATFORM_IMX_I2C
74 select IMX_HAVE_PLATFORM_IMX_UART
75 select IMX_HAVE_PLATFORM_MXC_EHCI
76 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
77 select IMX_HAVE_PLATFORM_SPI_IMX
78 help
79 Include support for MX51 Babbage platform, also known as MX51EVK in
80 u-boot. This includes specific configurations for the board and its
81 peripherals.
82
83config MACH_MX51_3DS
84 bool "Support MX51PDK (3DS)"
85 select SOC_IMX51
86 select IMX_HAVE_PLATFORM_IMX2_WDT
87 select IMX_HAVE_PLATFORM_IMX_KEYPAD
88 select IMX_HAVE_PLATFORM_IMX_UART
89 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
90 select IMX_HAVE_PLATFORM_SPI_IMX
91 select MXC_DEBUG_BOARD
92 help
93 Include support for MX51PDK (3DS) platform. This includes specific
94 configurations for the board and its peripherals.
95
96config MACH_EUKREA_CPUIMX51
97 bool "Support Eukrea CPUIMX51 module"
98 select SOC_IMX51
99 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
100 select IMX_HAVE_PLATFORM_IMX_I2C
101 select IMX_HAVE_PLATFORM_IMX_UART
102 select IMX_HAVE_PLATFORM_MXC_EHCI
103 select IMX_HAVE_PLATFORM_MXC_NAND
104 select IMX_HAVE_PLATFORM_SPI_IMX
105 help
106 Include support for Eukrea CPUIMX51 platform. This includes
107 specific configurations for the module and its peripherals.
108
109choice
110 prompt "Baseboard"
111 depends on MACH_EUKREA_CPUIMX51
112 default MACH_EUKREA_MBIMX51_BASEBOARD
113
114config MACH_EUKREA_MBIMX51_BASEBOARD
115 prompt "Eukrea MBIMX51 development board"
116 bool
117 select IMX_HAVE_PLATFORM_IMX_KEYPAD
118 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
119 select LEDS_GPIO_REGISTER
120 help
121 This adds board specific devices that can be found on Eukrea's
122 MBIMX51 evaluation board.
123
124endchoice
125
126config MACH_EUKREA_CPUIMX51SD
127 bool "Support Eukrea CPUIMX51SD module"
128 select SOC_IMX51
129 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
130 select IMX_HAVE_PLATFORM_IMX_I2C
131 select IMX_HAVE_PLATFORM_IMX_UART
132 select IMX_HAVE_PLATFORM_MXC_EHCI
133 select IMX_HAVE_PLATFORM_MXC_NAND
134 select IMX_HAVE_PLATFORM_SPI_IMX
135 help
136 Include support for Eukrea CPUIMX51SD platform. This includes
137 specific configurations for the module and its peripherals.
138
139choice
140 prompt "Baseboard"
141 depends on MACH_EUKREA_CPUIMX51SD
142 default MACH_EUKREA_MBIMXSD51_BASEBOARD
143
144config MACH_EUKREA_MBIMXSD51_BASEBOARD
145 prompt "Eukrea MBIMXSD development board"
146 bool
147 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
148 select LEDS_GPIO_REGISTER
149 help
150 This adds board specific devices that can be found on Eukrea's
151 MBIMXSD evaluation board.
152
153endchoice
154
155config MX51_EFIKA_COMMON
156 bool
157 select SOC_IMX51
158 select IMX_HAVE_PLATFORM_IMX_UART
159 select IMX_HAVE_PLATFORM_MXC_EHCI
160 select IMX_HAVE_PLATFORM_PATA_IMX
161 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
162 select IMX_HAVE_PLATFORM_SPI_IMX
163 select MXC_ULPI if USB_ULPI
164
165config MACH_MX51_EFIKAMX
166 bool "Support MX51 Genesi Efika MX nettop"
167 select LEDS_GPIO_REGISTER
168 select MX51_EFIKA_COMMON
169 help
170 Include support for Genesi Efika MX nettop. This includes specific
171 configurations for the board and its peripherals.
172
173config MACH_MX51_EFIKASB
174 bool "Support MX51 Genesi Efika Smartbook"
175 select LEDS_GPIO_REGISTER
176 select MX51_EFIKA_COMMON
177 help
178 Include support for Genesi Efika Smartbook. This includes specific
179 configurations for the board and its peripherals.
180
181comment "i.MX53 machines:"
182
183config MACH_IMX53_DT
184 bool "Support i.MX53 platforms from device tree"
185 select SOC_IMX53
186 select USE_OF
187 select MACH_MX53_ARD
188 select MACH_MX53_EVK
189 select MACH_MX53_LOCO
190 select MACH_MX53_SMD
191 help
192 Include support for Freescale i.MX53 based platforms
193 using the device tree for discovery
194
195config MACH_MX53_EVK
196 bool "Support MX53 EVK platforms"
197 select SOC_IMX53
198 select IMX_HAVE_PLATFORM_IMX2_WDT
199 select IMX_HAVE_PLATFORM_IMX_UART
200 select IMX_HAVE_PLATFORM_IMX_I2C
201 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
202 select IMX_HAVE_PLATFORM_SPI_IMX
203 select LEDS_GPIO_REGISTER
204 help
205 Include support for MX53 EVK platform. This includes specific
206 configurations for the board and its peripherals.
207
208config MACH_MX53_SMD
209 bool "Support MX53 SMD platforms"
210 select SOC_IMX53
211 select IMX_HAVE_PLATFORM_IMX2_WDT
212 select IMX_HAVE_PLATFORM_IMX_I2C
213 select IMX_HAVE_PLATFORM_IMX_UART
214 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
215 help
216 Include support for MX53 SMD platform. This includes specific
217 configurations for the board and its peripherals.
218
219config MACH_MX53_LOCO
220 bool "Support MX53 LOCO platforms"
221 select SOC_IMX53
222 select IMX_HAVE_PLATFORM_IMX2_WDT
223 select IMX_HAVE_PLATFORM_IMX_I2C
224 select IMX_HAVE_PLATFORM_IMX_UART
225 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
226 select IMX_HAVE_PLATFORM_GPIO_KEYS
227 select LEDS_GPIO_REGISTER
228 help
229 Include support for MX53 LOCO platform. This includes specific
230 configurations for the board and its peripherals.
231
232config MACH_MX53_ARD
233 bool "Support MX53 ARD platforms"
234 select SOC_IMX53
235 select IMX_HAVE_PLATFORM_IMX2_WDT
236 select IMX_HAVE_PLATFORM_IMX_I2C
237 select IMX_HAVE_PLATFORM_IMX_UART
238 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
239 select IMX_HAVE_PLATFORM_GPIO_KEYS
240 help
241 Include support for MX53 ARD platform. This includes specific
242 configurations for the board and its peripherals.
243
244endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
deleted file mode 100644
index 0fc60807fa2b..000000000000
--- a/arch/arm/mach-mx5/Makefile
+++ /dev/null
@@ -1,26 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o
7
8obj-$(CONFIG_PM) += pm-imx5.o
9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
10obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
11obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
12obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o
13obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o
14obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o
15obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o
16obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
17obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
18obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
19obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
20obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
21obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
22obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
23obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
24
25obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
26obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
deleted file mode 100644
index ca207ca305ec..000000000000
--- a/arch/arm/mach-mx5/Makefile.boot
+++ /dev/null
@@ -1,9 +0,0 @@
1 zreladdr-$(CONFIG_ARCH_MX50) += 0x70008000
2params_phys-$(CONFIG_ARCH_MX50) := 0x70000100
3initrd_phys-$(CONFIG_ARCH_MX50) := 0x70800000
4 zreladdr-$(CONFIG_ARCH_MX51) += 0x90008000
5params_phys-$(CONFIG_ARCH_MX51) := 0x90000100
6initrd_phys-$(CONFIG_ARCH_MX51) := 0x90800000
7 zreladdr-$(CONFIG_ARCH_MX53) += 0x70008000
8params_phys-$(CONFIG_ARCH_MX53) := 0x70000100
9initrd_phys-$(CONFIG_ARCH_MX53) := 0x70800000
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c
deleted file mode 100644
index 98052fc852c7..000000000000
--- a/arch/arm/mach-mx5/pm-imx5.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11#include <linux/suspend.h>
12#include <linux/clk.h>
13#include <linux/io.h>
14#include <linux/err.h>
15#include <asm/cacheflush.h>
16#include <asm/tlbflush.h>
17#include <mach/common.h>
18#include <mach/hardware.h>
19#include "crm_regs.h"
20
21static struct clk *gpc_dvfs_clk;
22
23static int mx5_suspend_prepare(void)
24{
25 return clk_enable(gpc_dvfs_clk);
26}
27
28static int mx5_suspend_enter(suspend_state_t state)
29{
30 switch (state) {
31 case PM_SUSPEND_MEM:
32 mx5_cpu_lp_set(STOP_POWER_OFF);
33 break;
34 case PM_SUSPEND_STANDBY:
35 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
36 break;
37 default:
38 return -EINVAL;
39 }
40
41 if (state == PM_SUSPEND_MEM) {
42 local_flush_tlb_all();
43 flush_cache_all();
44
45 /*clear the EMPGC0/1 bits */
46 __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
47 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
48 }
49 cpu_do_idle();
50 return 0;
51}
52
53static void mx5_suspend_finish(void)
54{
55 clk_disable(gpc_dvfs_clk);
56}
57
58static int mx5_pm_valid(suspend_state_t state)
59{
60 return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
61}
62
63static const struct platform_suspend_ops mx5_suspend_ops = {
64 .valid = mx5_pm_valid,
65 .prepare = mx5_suspend_prepare,
66 .enter = mx5_suspend_enter,
67 .finish = mx5_suspend_finish,
68};
69
70static int __init mx5_pm_init(void)
71{
72 if (gpc_dvfs_clk == NULL)
73 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
74
75 if (!IS_ERR(gpc_dvfs_clk)) {
76 if (cpu_is_mx51())
77 suspend_set_ops(&mx5_suspend_ops);
78 } else
79 return -EPERM;
80
81 return 0;
82}
83device_initcall(mx5_pm_init);
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a8ba7b96dcd1..41e6612ecbaf 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -33,7 +33,6 @@ config ARCH_OMAP3
33 default y 33 default y
34 select CPU_V7 34 select CPU_V7
35 select USB_ARCH_HAS_EHCI 35 select USB_ARCH_HAS_EHCI
36 select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
37 select ARCH_HAS_OPP 36 select ARCH_HAS_OPP
38 select PM_OPP if PM 37 select PM_OPP if PM
39 select ARM_CPU_SUSPEND if PM 38 select ARM_CPU_SUSPEND if PM
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 18fd177073f4..5bc13121eac5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -415,29 +415,9 @@ static struct resource pxa_rtc_resources[] = {
415 }, 415 },
416}; 416};
417 417
418static struct resource sa1100_rtc_resources[] = {
419 [0] = {
420 .start = 0x40900000,
421 .end = 0x409000ff,
422 .flags = IORESOURCE_MEM,
423 },
424 [1] = {
425 .start = IRQ_RTC1Hz,
426 .end = IRQ_RTC1Hz,
427 .flags = IORESOURCE_IRQ,
428 },
429 [2] = {
430 .start = IRQ_RTCAlrm,
431 .end = IRQ_RTCAlrm,
432 .flags = IORESOURCE_IRQ,
433 },
434};
435
436struct platform_device sa1100_device_rtc = { 418struct platform_device sa1100_device_rtc = {
437 .name = "sa1100-rtc", 419 .name = "sa1100-rtc",
438 .id = -1, 420 .id = -1,
439 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
440 .resource = sa1100_rtc_resources,
441}; 421};
442 422
443struct platform_device pxa_device_rtc = { 423struct platform_device pxa_device_rtc = {
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index adf058fa97ee..91e4f6c03766 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -209,8 +209,6 @@ static struct clk_lookup pxa25x_clkregs[] = {
209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
212 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
213 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
214}; 212};
215 213
216static struct clk_lookup pxa25x_hwuart_clkreg = 214static struct clk_lookup pxa25x_hwuart_clkreg =
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 180bd8675d4b..aed6cbcf3866 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -230,8 +230,6 @@ static struct clk_lookup pxa27x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
233 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
234 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
235}; 233};
236 234
237#ifdef CONFIG_PM 235#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 0388eda7878a..40bb16501d86 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -89,7 +89,6 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
89static struct clk_lookup common_clkregs[] = { 89static struct clk_lookup common_clkregs[] = {
90 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
91 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), 91 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
92 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
93}; 92};
94 93
95static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); 94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index d487e1ff4c9a..8d614ecd8e99 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,7 +83,6 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
83static struct clk_lookup pxa320_clkregs[] = { 83static struct clk_lookup pxa320_clkregs[] = {
84 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), 84 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
85 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), 85 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
86 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
87}; 86};
88 87
89static int __init pxa320_init(void) 88static int __init pxa320_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f107c71c7589..4f402afa6609 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -67,7 +67,6 @@ static struct clk_lookup pxa3xx_clkregs[] = {
67 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), 67 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
68 /* Power I2C clock is always on */ 68 /* Power I2C clock is always on */
69 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), 69 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
70 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
71 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL), 70 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
72 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"), 71 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
73 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"), 72 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index fccc644702e6..d082a583df78 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -217,7 +217,6 @@ static struct clk_lookup pxa95x_clkregs[] = {
217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), 217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
218 /* Power I2C clock is always on */ 218 /* Power I2C clock is always on */
219 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), 219 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
220 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
221 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), 220 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
222 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), 221 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
223 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), 222 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index ac1aed2a8da4..eb55f05bef3a 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,7 @@
13#include <linux/smp.h> 13#include <linux/smp.h>
14 14
15#include <asm/cacheflush.h> 15#include <asm/cacheflush.h>
16#include <asm/smp_plat.h>
16 17
17extern volatile int pen_release; 18extern volatile int pen_release;
18 19
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 794a8d91a6a6..124bce6b4d7b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -47,21 +47,23 @@
47#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */ 47#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
48 48
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 50#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100600
53#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
54#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ 51#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
55#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ 52#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
56#else 53#else
57#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ 54#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000
58#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
59#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
60#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
61#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ 55#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
63#endif 57#endif
64 58
59#define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K
60#define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x))
61
62#define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */
63#define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */
64#define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600)
65#define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */
66
65/* 67/*
66 * Core tile identification (REALVIEW_SYS_PROCID) 68 * Core tile identification (REALVIEW_SYS_PROCID)
67 */ 69 */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index 7abf918b77e9..aa2d4e02ea2c 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -75,6 +75,8 @@
75/* 75/*
76 * Testchip peripheral and fpga gic regions 76 * Testchip peripheral and fpga gic regions
77 */ 77 */
78#define REALVIEW_TC11MP_PRIV_MEM_BASE 0x1F000000
79#define REALVIEW_TC11MP_PRIV_MEM_SIZE SZ_8K
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ 80#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ 81#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000600 82#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index fbca43cf77ed..157e1bc6e83c 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -91,14 +91,9 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
91 91
92static struct map_desc realview_eb11mp_io_desc[] __initdata = { 92static struct map_desc realview_eb11mp_io_desc[] __initdata = {
93 { 93 {
94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE), 94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE), 95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
96 .length = SZ_4K, 96 .length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
97 .type = MT_DEVICE,
98 }, {
99 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
100 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
101 .length = SZ_4K,
102 .type = MT_DEVICE, 97 .type = MT_DEVICE,
103 }, { 98 }, {
104 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE), 99 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 43b82bc9ca8e..ae7fe54f6eb6 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -64,15 +64,10 @@ static struct map_desc realview_pb11mp_io_desc[] __initdata = {
64 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE), 64 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
65 .length = SZ_4K, 65 .length = SZ_4K,
66 .type = MT_DEVICE, 66 .type = MT_DEVICE,
67 }, { 67 }, { /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */
68 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE), 68 .virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE), 69 .pfn = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE),
70 .length = SZ_4K, 70 .length = REALVIEW_TC11MP_PRIV_MEM_SIZE,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE, 71 .type = MT_DEVICE,
77 }, { 72 }, {
78 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), 73 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index ebafe8aa8956..0c4b76ab4d8e 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -202,7 +202,6 @@ static struct irda_platform_data assabet_irda_data = {
202static struct mcp_plat_data assabet_mcp_data = { 202static struct mcp_plat_data assabet_mcp_data = {
203 .mccr0 = MCCR0_ADM, 203 .mccr0 = MCCR0_ADM,
204 .sclk_rate = 11981000, 204 .sclk_rate = 11981000,
205 .codec = "ucb1x00",
206}; 205};
207 206
208static void __init assabet_init(void) 207static void __init assabet_init(void)
@@ -253,17 +252,6 @@ static void __init assabet_init(void)
253 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, 252 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
254 ARRAY_SIZE(assabet_flash_resources)); 253 ARRAY_SIZE(assabet_flash_resources));
255 sa11x0_register_irda(&assabet_irda_data); 254 sa11x0_register_irda(&assabet_irda_data);
256
257 /*
258 * Setup the PPC unit correctly.
259 */
260 PPDR &= ~PPC_RXD4;
261 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
262 PSDR |= PPC_RXD4;
263 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
264 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
265
266 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
267 sa11x0_register_mcp(&assabet_mcp_data); 255 sa11x0_register_mcp(&assabet_mcp_data);
268} 256}
269 257
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index d12d0f48b1dc..11bb6d0b9be3 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -124,23 +124,12 @@ static void __init cerf_map_io(void)
124static struct mcp_plat_data cerf_mcp_data = { 124static struct mcp_plat_data cerf_mcp_data = {
125 .mccr0 = MCCR0_ADM, 125 .mccr0 = MCCR0_ADM,
126 .sclk_rate = 11981000, 126 .sclk_rate = 11981000,
127 .codec = "ucb1x00",
128}; 127};
129 128
130static void __init cerf_init(void) 129static void __init cerf_init(void)
131{ 130{
132 platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); 131 platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
133 sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1); 132 sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
134
135 /*
136 * Setup the PPC unit correctly.
137 */
138 PPDR &= ~PPC_RXD4;
139 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
140 PSDR |= PPC_RXD4;
141 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
142 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
143
144 sa11x0_register_mcp(&cerf_mcp_data); 133 sa11x0_register_mcp(&cerf_mcp_data);
145} 134}
146 135
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index d6df9f6c9f7e..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,39 +11,17 @@
11#include <linux/clk.h> 11#include <linux/clk.h>
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/mutex.h> 13#include <linux/mutex.h>
14#include <linux/io.h>
15#include <linux/clkdev.h>
16 14
17#include <mach/hardware.h> 15#include <mach/hardware.h>
18 16
19struct clkops { 17/*
20 void (*enable)(struct clk *); 18 * Very simple clock implementation - we only have one clock to deal with.
21 void (*disable)(struct clk *); 19 */
22 unsigned long (*getrate)(struct clk *);
23};
24
25struct clk { 20struct clk {
26 const struct clkops *ops;
27 unsigned long rate;
28 unsigned int enabled; 21 unsigned int enabled;
29}; 22};
30 23
31#define INIT_CLKREG(_clk, _devname, _conname) \ 24static void clk_gpio27_enable(void)
32 { \
33 .clk = _clk, \
34 .dev_id = _devname, \
35 .con_id = _conname, \
36 }
37
38#define DEFINE_CLK(_name, _ops, _rate) \
39struct clk clk_##_name = { \
40 .ops = _ops, \
41 .rate = _rate, \
42 }
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46static void clk_gpio27_enable(struct clk *clk)
47{ 25{
48 /* 26 /*
49 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: 27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -54,22 +32,38 @@ static void clk_gpio27_enable(struct clk *clk)
54 TUCR = TUCR_3_6864MHz; 32 TUCR = TUCR_3_6864MHz;
55} 33}
56 34
57static void clk_gpio27_disable(struct clk *clk) 35static void clk_gpio27_disable(void)
58{ 36{
59 TUCR = 0; 37 TUCR = 0;
60 GPDR &= ~GPIO_32_768kHz; 38 GPDR &= ~GPIO_32_768kHz;
61 GAFR &= ~GPIO_32_768kHz; 39 GAFR &= ~GPIO_32_768kHz;
62} 40}
63 41
42static struct clk clk_gpio27;
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46struct clk *clk_get(struct device *dev, const char *id)
47{
48 const char *devname = dev_name(dev);
49
50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
51}
52EXPORT_SYMBOL(clk_get);
53
54void clk_put(struct clk *clk)
55{
56}
57EXPORT_SYMBOL(clk_put);
58
64int clk_enable(struct clk *clk) 59int clk_enable(struct clk *clk)
65{ 60{
66 unsigned long flags; 61 unsigned long flags;
67 62
68 spin_lock_irqsave(&clocks_lock, flags); 63 spin_lock_irqsave(&clocks_lock, flags);
69 if (clk->enabled++ == 0) 64 if (clk->enabled++ == 0)
70 clk->ops->enable(clk); 65 clk_gpio27_enable();
71 spin_unlock_irqrestore(&clocks_lock, flags); 66 spin_unlock_irqrestore(&clocks_lock, flags);
72
73 return 0; 67 return 0;
74} 68}
75EXPORT_SYMBOL(clk_enable); 69EXPORT_SYMBOL(clk_enable);
@@ -82,48 +76,13 @@ void clk_disable(struct clk *clk)
82 76
83 spin_lock_irqsave(&clocks_lock, flags); 77 spin_lock_irqsave(&clocks_lock, flags);
84 if (--clk->enabled == 0) 78 if (--clk->enabled == 0)
85 clk->ops->disable(clk); 79 clk_gpio27_disable();
86 spin_unlock_irqrestore(&clocks_lock, flags); 80 spin_unlock_irqrestore(&clocks_lock, flags);
87} 81}
88EXPORT_SYMBOL(clk_disable); 82EXPORT_SYMBOL(clk_disable);
89 83
90unsigned long clk_get_rate(struct clk *clk) 84unsigned long clk_get_rate(struct clk *clk)
91{ 85{
92 unsigned long rate; 86 return 3686400;
93
94 rate = clk->rate;
95 if (clk->ops->getrate)
96 rate = clk->ops->getrate(clk);
97
98 return rate;
99} 87}
100EXPORT_SYMBOL(clk_get_rate); 88EXPORT_SYMBOL(clk_get_rate);
101
102const struct clkops clk_gpio27_ops = {
103 .enable = clk_gpio27_enable,
104 .disable = clk_gpio27_disable,
105};
106
107static void clk_dummy_enable(struct clk *clk) { }
108static void clk_dummy_disable(struct clk *clk) { }
109
110const struct clkops clk_dummy_ops = {
111 .enable = clk_dummy_enable,
112 .disable = clk_dummy_disable,
113};
114
115static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
116static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
117
118static struct clk_lookup sa11xx_clkregs[] = {
119 INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
120 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
121};
122
123static int __init sa11xx_clk_init(void)
124{
125 clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
126 return 0;
127}
128
129postcore_initcall(sa11xx_clk_init);
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index c483912d08af..fd5652118ed1 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -27,7 +27,6 @@
27#include <linux/timer.h> 27#include <linux/timer.h>
28#include <linux/gpio.h> 28#include <linux/gpio.h>
29#include <linux/pda_power.h> 29#include <linux/pda_power.h>
30#include <linux/mfd/ucb1x00.h>
31 30
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
@@ -86,15 +85,10 @@ static struct scoop_pcmcia_config collie_pcmcia_config = {
86 .num_devs = 1, 85 .num_devs = 1,
87}; 86};
88 87
89static struct ucb1x00_plat_data collie_ucb1x00_data = {
90 .gpio_base = COLLIE_TC35143_GPIO_BASE,
91};
92
93static struct mcp_plat_data collie_mcp_data = { 88static struct mcp_plat_data collie_mcp_data = {
94 .mccr0 = MCCR0_ADM | MCCR0_ExtClk, 89 .mccr0 = MCCR0_ADM | MCCR0_ExtClk,
95 .sclk_rate = 9216000, 90 .sclk_rate = 9216000,
96 .codec = "ucb1x00", 91 .gpio_base = COLLIE_TC35143_GPIO_BASE,
97 .codec_pdata = &collie_ucb1x00_data,
98}; 92};
99 93
100/* 94/*
@@ -144,8 +138,6 @@ static struct pda_power_pdata collie_power_data = {
144static struct resource collie_power_resource[] = { 138static struct resource collie_power_resource[] = {
145 { 139 {
146 .name = "ac", 140 .name = "ac",
147 .start = gpio_to_irq(COLLIE_GPIO_AC_IN),
148 .end = gpio_to_irq(COLLIE_GPIO_AC_IN),
149 .flags = IORESOURCE_IRQ | 141 .flags = IORESOURCE_IRQ |
150 IORESOURCE_IRQ_HIGHEDGE | 142 IORESOURCE_IRQ_HIGHEDGE |
151 IORESOURCE_IRQ_LOWEDGE, 143 IORESOURCE_IRQ_LOWEDGE,
@@ -347,7 +339,8 @@ static void __init collie_init(void)
347 339
348 GPSR |= _COLLIE_GPIO_UCB1x00_RESET; 340 GPSR |= _COLLIE_GPIO_UCB1x00_RESET;
349 341
350 342 collie_power_resource[0].start = gpio_to_irq(COLLIE_GPIO_AC_IN);
343 collie_power_resource[0].end = gpio_to_irq(COLLIE_GPIO_AC_IN);
351 platform_scoop_config = &collie_pcmcia_config; 344 platform_scoop_config = &collie_pcmcia_config;
352 345
353 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 346 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
@@ -357,16 +350,6 @@ static void __init collie_init(void)
357 350
358 sa11x0_register_mtd(&collie_flash_data, collie_flash_resources, 351 sa11x0_register_mtd(&collie_flash_data, collie_flash_resources,
359 ARRAY_SIZE(collie_flash_resources)); 352 ARRAY_SIZE(collie_flash_resources));
360
361 /*
362 * Setup the PPC unit correctly.
363 */
364 PPDR &= ~PPC_RXD4;
365 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
366 PSDR |= PPC_RXD4;
367 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
368 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
369
370 sa11x0_register_mcp(&collie_mcp_data); 353 sa11x0_register_mcp(&collie_mcp_data);
371 354
372 sharpsl_save_param(); 355 sharpsl_save_param();
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index aaa8acf76b7b..19b2053f5af4 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -228,7 +228,7 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
228 return 0; 228 return 0;
229} 229}
230 230
231static struct cpufreq_driver sa1100_driver = { 231static struct cpufreq_driver sa1100_driver __refdata = {
232 .flags = CPUFREQ_STICKY, 232 .flags = CPUFREQ_STICKY,
233 .verify = sa11x0_verify_speed, 233 .verify = sa11x0_verify_speed,
234 .target = sa1100_target, 234 .target = sa1100_target,
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index e3a28ca2a7b7..bb10ee2cb89f 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -217,15 +217,10 @@ static struct platform_device sa11x0uart3_device = {
217static struct resource sa11x0mcp_resources[] = { 217static struct resource sa11x0mcp_resources[] = {
218 [0] = { 218 [0] = {
219 .start = __PREG(Ser4MCCR0), 219 .start = __PREG(Ser4MCCR0),
220 .end = __PREG(Ser4MCCR0) + 0x1C - 1, 220 .end = __PREG(Ser4MCCR0) + 0xffff,
221 .flags = IORESOURCE_MEM, 221 .flags = IORESOURCE_MEM,
222 }, 222 },
223 [1] = { 223 [1] = {
224 .start = __PREG(Ser4MCCR1),
225 .end = __PREG(Ser4MCCR1) + 0x4 - 1,
226 .flags = IORESOURCE_MEM,
227 },
228 [2] = {
229 .start = IRQ_Ser4MCP, 224 .start = IRQ_Ser4MCP,
230 .end = IRQ_Ser4MCP, 225 .end = IRQ_Ser4MCP,
231 .flags = IORESOURCE_IRQ, 226 .flags = IORESOURCE_IRQ,
@@ -350,29 +345,9 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
350 sa11x0_register_device(&sa11x0ir_device, irda); 345 sa11x0_register_device(&sa11x0ir_device, irda);
351} 346}
352 347
353static struct resource sa11x0rtc_resources[] = {
354 [0] = {
355 .start = 0x90010000,
356 .end = 0x900100ff,
357 .flags = IORESOURCE_MEM,
358 },
359 [1] = {
360 .start = IRQ_RTC1Hz,
361 .end = IRQ_RTC1Hz,
362 .flags = IORESOURCE_IRQ,
363 },
364 [2] = {
365 .start = IRQ_RTCAlrm,
366 .end = IRQ_RTCAlrm,
367 .flags = IORESOURCE_IRQ,
368 },
369};
370
371static struct platform_device sa11x0rtc_device = { 348static struct platform_device sa11x0rtc_device = {
372 .name = "sa1100-rtc", 349 .name = "sa1100-rtc",
373 .id = -1, 350 .id = -1,
374 .resource = sa11x0rtc_resources,
375 .num_resources = ARRAY_SIZE(sa11x0rtc_resources),
376}; 351};
377 352
378static struct platform_device *sa11x0_devices[] __initdata = { 353static struct platform_device *sa11x0_devices[] __initdata = {
diff --git a/arch/arm/mach-sa1100/include/mach/mcp.h b/arch/arm/mach-sa1100/include/mach/mcp.h
index 586cec898b35..ed1a331508a7 100644
--- a/arch/arm/mach-sa1100/include/mach/mcp.h
+++ b/arch/arm/mach-sa1100/include/mach/mcp.h
@@ -17,8 +17,6 @@ struct mcp_plat_data {
17 u32 mccr1; 17 u32 mccr1;
18 unsigned int sclk_rate; 18 unsigned int sclk_rate;
19 int gpio_base; 19 int gpio_base;
20 const char *codec;
21 void *codec_pdata;
22}; 20};
23 21
24#endif 22#endif
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index f50b00bd18a0..b412fc09c80c 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -198,3 +198,5 @@ static int __init jornada_ssp_init(void)
198{ 198{
199 return platform_driver_register(&jornadassp_driver); 199 return platform_driver_register(&jornadassp_driver);
200} 200}
201
202module_init(jornada_ssp_init);
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index d117ceab6215..af4e2761f3db 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -24,20 +24,10 @@
24static struct mcp_plat_data lart_mcp_data = { 24static struct mcp_plat_data lart_mcp_data = {
25 .mccr0 = MCCR0_ADM, 25 .mccr0 = MCCR0_ADM,
26 .sclk_rate = 11981000, 26 .sclk_rate = 11981000,
27 .codec = "ucb1x00",
28}; 27};
29 28
30static void __init lart_init(void) 29static void __init lart_init(void)
31{ 30{
32 /*
33 * Setup the PPC unit correctly.
34 */
35 PPDR &= ~PPC_RXD4;
36 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
37 PSDR |= PPC_RXD4;
38 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
39 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
40
41 sa11x0_register_mcp(&lart_mcp_data); 31 sa11x0_register_mcp(&lart_mcp_data);
42} 32}
43 33
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 748d34435b3f..318b2b766a0b 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -55,22 +55,11 @@ static struct resource shannon_flash_resource = {
55static struct mcp_plat_data shannon_mcp_data = { 55static struct mcp_plat_data shannon_mcp_data = {
56 .mccr0 = MCCR0_ADM, 56 .mccr0 = MCCR0_ADM,
57 .sclk_rate = 11981000, 57 .sclk_rate = 11981000,
58 .codec = "ucb1x00",
59}; 58};
60 59
61static void __init shannon_init(void) 60static void __init shannon_init(void)
62{ 61{
63 sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); 62 sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
64
65 /*
66 * Setup the PPC unit correctly.
67 */
68 PPDR &= ~PPC_RXD4;
69 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
70 PSDR |= PPC_RXD4;
71 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
72 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
73
74 sa11x0_register_mcp(&shannon_mcp_data); 63 sa11x0_register_mcp(&shannon_mcp_data);
75} 64}
76 65
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 458ececefa58..e17c04d6e324 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -14,7 +14,6 @@
14#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/mfd/ucb1x00.h>
18 17
19#include <asm/irq.h> 18#include <asm/irq.h>
20#include <mach/hardware.h> 19#include <mach/hardware.h>
@@ -188,15 +187,10 @@ static struct resource simpad_flash_resources [] = {
188 } 187 }
189}; 188};
190 189
191static struct ucb1x00_plat_data simpad_ucb1x00_data = {
192 .gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
193};
194
195static struct mcp_plat_data simpad_mcp_data = { 190static struct mcp_plat_data simpad_mcp_data = {
196 .mccr0 = MCCR0_ADM, 191 .mccr0 = MCCR0_ADM,
197 .sclk_rate = 11981000, 192 .sclk_rate = 11981000,
198 .codec = "ucb1300", 193 .gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
199 .codec_pdata = &simpad_ucb1x00_data,
200}; 194};
201 195
202 196
@@ -384,16 +378,6 @@ static int __init simpad_init(void)
384 378
385 sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, 379 sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
386 ARRAY_SIZE(simpad_flash_resources)); 380 ARRAY_SIZE(simpad_flash_resources));
387
388 /*
389 * Setup the PPC unit correctly.
390 */
391 PPDR &= ~PPC_RXD4;
392 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
393 PSDR |= PPC_RXD4;
394 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
395 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
396
397 sa11x0_register_mcp(&simpad_mcp_data); 381 sa11x0_register_mcp(&simpad_mcp_data);
398 382
399 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 383 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index cc97ef892d1b..4fe2e9eaf501 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -25,6 +25,7 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/r8a7779.h> 27#include <mach/r8a7779.h>
28#include <asm/smp_plat.h>
28#include <asm/smp_scu.h> 29#include <asm/smp_scu.h>
29#include <asm/smp_twd.h> 30#include <asm/smp_twd.h>
30#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index be1ade76ccc8..0d159d64a345 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -23,6 +23,7 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <mach/common.h> 25#include <mach/common.h>
26#include <asm/smp_plat.h>
26#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
27#include <asm/smp_twd.h> 28#include <asm/smp_twd.h>
28#include <asm/hardware/gic.h> 29#include <asm/hardware/gic.h>
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index a3e0c8692f0d..52af00446a63 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,6 +7,7 @@ config UX500_SOC_COMMON
7 select HAS_MTU 7 select HAS_MTU
8 select ARM_ERRATA_753970 8 select ARM_ERRATA_753970
9 select ARM_ERRATA_754322 9 select ARM_ERRATA_754322
10 select ARM_ERRATA_764369
10 11
11menu "Ux500 SoC" 12menu "Ux500 SoC"
12 13
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 23be34b3bb6e..5dde4d4ebe88 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -261,6 +261,8 @@ void __init mop500_sdi_init(void)
261 261
262void __init snowball_sdi_init(void) 262void __init snowball_sdi_init(void)
263{ 263{
264 /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
265 mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
264 /* On-board eMMC */ 266 /* On-board eMMC */
265 db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID); 267 db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
266 /* External Micro SD slot */ 268 /* External Micro SD slot */
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 122ddde00ba7..da5569d83d58 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -12,44 +12,6 @@
12 12
13static void __iomem *l2x0_base; 13static void __iomem *l2x0_base;
14 14
15static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
16{
17 /* wait for the operation to complete */
18 while (readl_relaxed(reg) & mask)
19 cpu_relax();
20}
21
22static inline void ux500_cache_sync(void)
23{
24 writel_relaxed(0, l2x0_base + L2X0_CACHE_SYNC);
25 ux500_cache_wait(l2x0_base + L2X0_CACHE_SYNC, 1);
26}
27
28/*
29 * The L2 cache cannot be turned off in the non-secure world.
30 * Dummy until a secure service is in place.
31 */
32static void ux500_l2x0_disable(void)
33{
34}
35
36/*
37 * This is only called when doing a kexec, just after turning off the L2
38 * and L1 cache, and it is surrounded by a spinlock in the generic version.
39 * However, we're not really turning off the L2 cache right now and the
40 * PL310 does not support exclusive accesses (used to implement the spinlock).
41 * So, the invalidation needs to be done without the spinlock.
42 */
43static void ux500_l2x0_inv_all(void)
44{
45 uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
46
47 /* invalidate all ways */
48 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
49 ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
50 ux500_cache_sync();
51}
52
53static int __init ux500_l2x0_unlock(void) 15static int __init ux500_l2x0_unlock(void)
54{ 16{
55 int i; 17 int i;
@@ -85,9 +47,13 @@ static int __init ux500_l2x0_init(void)
85 /* 64KB way size, 8 way associativity, force WA */ 47 /* 64KB way size, 8 way associativity, force WA */
86 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff); 48 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
87 49
88 /* Override invalidate function */ 50 /*
89 outer_cache.disable = ux500_l2x0_disable; 51 * We can't disable l2 as we are in non secure mode, currently
90 outer_cache.inv_all = ux500_l2x0_inv_all; 52 * this seems be called only during kexec path. So let's
53 * override outer.disable with nasty assignment until we have
54 * some SMI service available.
55 */
56 outer_cache.disable = NULL;
91 57
92 return 0; 58 return 0;
93} 59}
diff --git a/arch/arm/mach-ux500/hotplug.c b/arch/arm/mach-ux500/hotplug.c
index 572015e57cd9..c76f0f456f04 100644
--- a/arch/arm/mach-ux500/hotplug.c
+++ b/arch/arm/mach-ux500/hotplug.c
@@ -13,6 +13,7 @@
13#include <linux/smp.h> 13#include <linux/smp.h>
14 14
15#include <asm/cacheflush.h> 15#include <asm/cacheflush.h>
16#include <asm/smp_plat.h>
16 17
17extern volatile int pen_release; 18extern volatile int pen_release;
18 19
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index a19e398dade3..d2058ef8345f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -19,6 +19,7 @@
19 19
20#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
21#include <asm/hardware/gic.h> 21#include <asm/hardware/gic.h>
22#include <asm/smp_plat.h>
22#include <asm/smp_scu.h> 23#include <asm/smp_scu.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <mach/setup.h> 25#include <mach/setup.h>
diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c
index 0a01cbdfe063..9f9e1c203061 100644
--- a/arch/arm/mach-ux500/usb.c
+++ b/arch/arm/mach-ux500/usb.c
@@ -95,13 +95,7 @@ static struct musb_hdrc_config musb_hdrc_config = {
95}; 95};
96 96
97static struct musb_hdrc_platform_data musb_platform_data = { 97static struct musb_hdrc_platform_data musb_platform_data = {
98#if defined(CONFIG_USB_MUSB_OTG)
99 .mode = MUSB_OTG, 98 .mode = MUSB_OTG,
100#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
101 .mode = MUSB_PERIPHERAL,
102#else /* defined(CONFIG_USB_MUSB_HOST) */
103 .mode = MUSB_HOST,
104#endif
105 .config = &musb_hdrc_config, 99 .config = &musb_hdrc_config,
106 .board_data = &musb_board_data, 100 .board_data = &musb_board_data,
107}; 101};
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 3fde21c7b315..1b1d2e4892b9 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -217,7 +217,7 @@ static void __init ct_ca9x4_init(void)
217} 217}
218 218
219#ifdef CONFIG_SMP 219#ifdef CONFIG_SMP
220static void ct_ca9x4_init_cpu_map(void) 220static void __init ct_ca9x4_init_cpu_map(void)
221{ 221{
222 int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); 222 int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
223 223
@@ -233,7 +233,7 @@ static void ct_ca9x4_init_cpu_map(void)
233 set_smp_cross_call(gic_raise_softirq); 233 set_smp_cross_call(gic_raise_softirq);
234} 234}
235 235
236static void ct_ca9x4_smp_enable(unsigned int max_cpus) 236static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
237{ 237{
238 scu_enable(MMIO_P2V(A9_MPCORE_SCU)); 238 scu_enable(MMIO_P2V(A9_MPCORE_SCU));
239} 239}
diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c
index 813ee08f96e6..3034a4dab4a1 100644
--- a/arch/arm/mach-vexpress/hotplug.c
+++ b/arch/arm/mach-vexpress/hotplug.c
@@ -13,6 +13,7 @@
13#include <linux/smp.h> 13#include <linux/smp.h>
14 14
15#include <asm/cacheflush.h> 15#include <asm/cacheflush.h>
16#include <asm/smp_plat.h>
16#include <asm/system.h> 17#include <asm/system.h>
17 18
18extern volatile int pen_release; 19extern volatile int pen_release;
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 4cefb57d9ed2..1a3ca2488164 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -882,6 +882,7 @@ config CACHE_XSC3L2
882 882
883config ARM_L1_CACHE_SHIFT_6 883config ARM_L1_CACHE_SHIFT_6
884 bool 884 bool
885 default y if CPU_V7
885 help 886 help
886 Setting ARM L1 cache line size to 64 Bytes. 887 Setting ARM L1 cache line size to 64 Bytes.
887 888
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 6ec1226fc62d..5dc7d127a40f 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -310,7 +310,7 @@ static void arm_memory_present(void)
310 310
311static bool arm_memblock_steal_permitted = true; 311static bool arm_memblock_steal_permitted = true;
312 312
313phys_addr_t arm_memblock_steal(phys_addr_t size, phys_addr_t align) 313phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
314{ 314{
315 phys_addr_t phys; 315 phys_addr_t phys;
316 316
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 80632e8d7538..ba159370fa5f 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -225,7 +225,8 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
225 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype)) 225 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
226 continue; 226 continue;
227 if (__phys_to_pfn(area->phys_addr) > pfn || 227 if (__phys_to_pfn(area->phys_addr) > pfn ||
228 __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1) 228 __pfn_to_phys(pfn) + offset + size-1 >
229 area->phys_addr + area->size-1)
229 continue; 230 continue;
230 /* we can drop the lock here as we know *area is static */ 231 /* we can drop the lock here as we know *area is static */
231 read_unlock(&vmlist_lock); 232 read_unlock(&vmlist_lock);
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7e9b5bf910c1..0404ccbb8aa3 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -148,10 +148,6 @@ ENDPROC(cpu_v7_do_resume)
148 * Initialise TLB, Caches, and MMU state ready to switch the MMU 148 * Initialise TLB, Caches, and MMU state ready to switch the MMU
149 * on. Return in r0 the new CP15 C1 control register setting. 149 * on. Return in r0 the new CP15 C1 control register setting.
150 * 150 *
151 * We automatically detect if we have a Harvard cache, and use the
152 * Harvard cache control instructions insead of the unified cache
153 * control instructions.
154 *
155 * This should be able to cover all ARMv7 cores. 151 * This should be able to cover all ARMv7 cores.
156 * 152 *
157 * It is assumed that: 153 * It is assumed that:
@@ -251,9 +247,7 @@ __v7_setup:
251#endif 247#endif
252 248
2533: mov r10, #0 2493: mov r10, #0
254#ifdef HARVARD_CACHE
255 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate 250 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
256#endif
257 dsb 251 dsb
258#ifdef CONFIG_MMU 252#ifdef CONFIG_MMU
259 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs 253 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
@@ -330,16 +324,6 @@ __v7_ca5mp_proc_info:
330 .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info 324 .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
331 325
332 /* 326 /*
333 * ARM Ltd. Cortex A7 processor.
334 */
335 .type __v7_ca7mp_proc_info, #object
336__v7_ca7mp_proc_info:
337 .long 0x410fc070
338 .long 0xff0ffff0
339 __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
340 .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
341
342 /*
343 * ARM Ltd. Cortex A9 processor. 327 * ARM Ltd. Cortex A9 processor.
344 */ 328 */
345 .type __v7_ca9mp_proc_info, #object 329 .type __v7_ca9mp_proc_info, #object
@@ -351,6 +335,16 @@ __v7_ca9mp_proc_info:
351#endif /* CONFIG_ARM_LPAE */ 335#endif /* CONFIG_ARM_LPAE */
352 336
353 /* 337 /*
338 * ARM Ltd. Cortex A7 processor.
339 */
340 .type __v7_ca7mp_proc_info, #object
341__v7_ca7mp_proc_info:
342 .long 0x410fc070
343 .long 0xff0ffff0
344 __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
345 .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
346
347 /*
354 * ARM Ltd. Cortex A15 processor. 348 * ARM Ltd. Cortex A15 processor.
355 */ 349 */
356 .type __v7_ca15mp_proc_info, #object 350 .type __v7_ca15mp_proc_info, #object
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b30708e28c1d..dcebb1230f7f 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -17,26 +17,17 @@ config ARCH_IMX_V4_V5
17 and ARMv5 SoCs 17 and ARMv5 SoCs
18 18
19config ARCH_IMX_V6_V7 19config ARCH_IMX_V6_V7
20 bool "i.MX3, i.MX6" 20 bool "i.MX3, i.MX5, i.MX6"
21 select AUTO_ZRELADDR if !ZBOOT_ROM 21 select AUTO_ZRELADDR if !ZBOOT_ROM
22 select ARM_PATCH_PHYS_VIRT 22 select ARM_PATCH_PHYS_VIRT
23 select MIGHT_HAVE_CACHE_L2X0 23 select MIGHT_HAVE_CACHE_L2X0
24 help 24 help
25 This enables support for systems based on the Freescale i.MX3 and i.MX6 25 This enables support for systems based on the Freescale i.MX3, i.MX5
26 family. 26 and i.MX6 family.
27
28config ARCH_MX5
29 bool "i.MX50, i.MX51, i.MX53"
30 select AUTO_ZRELADDR if !ZBOOT_ROM
31 select ARM_PATCH_PHYS_VIRT
32 help
33 This enables support for machines using Freescale's i.MX50 and i.MX53
34 processors.
35 27
36endchoice 28endchoice
37 29
38source "arch/arm/mach-imx/Kconfig" 30source "arch/arm/mach-imx/Kconfig"
39source "arch/arm/mach-mx5/Kconfig"
40 31
41endmenu 32endmenu
42 33
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
index 6fa8a707b9a0..f7d18046c04f 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -96,6 +96,6 @@ extern int mxc_gpio_mode(int gpio_mode);
96extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, 96extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
97 const char *label); 97 const char *label);
98 98
99extern int __init imx_iomuxv1_init(void __iomem *base, int numports); 99extern int imx_iomuxv1_init(void __iomem *base, int numports);
100 100
101#endif /* __MACH_IOMUX_V1_H__ */ 101#endif /* __MACH_IOMUX_V1_H__ */
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 92f18d372b69..49c7db48c7f1 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -16,6 +16,7 @@
16#include <linux/smp.h> 16#include <linux/smp.h>
17 17
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/smp_plat.h>
19#include <asm/hardware/gic.h> 20#include <asm/hardware/gic.h>
20 21
21/* 22/*
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 18:00:53 -0500