diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-03-19 06:21:56 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-04-08 07:59:19 -0400 |
commit | 9b819060d349e2247c471d8f055c91a597560da0 (patch) | |
tree | e95bac4ebfd5115cf26e8697124e93de653d2b2e /arch/arm | |
parent | 9bed3e05e94fbdfc986fba4be7fa5e83db909874 (diff) |
clk: ux500: pass clock base adresses in init call
The ux500 clock driver was including <mach/db8500-regs.h>
which will not work when building for multiplatform support
since <mach/*> is going away.
Pass the base adresses in the init call instead.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-ux500/cpu.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 2c5c48baa3eb..ee69439d5a8e 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -70,11 +70,15 @@ void __init ux500_init_irq(void) | |||
70 | if (cpu_is_u8500_family()) { | 70 | if (cpu_is_u8500_family()) { |
71 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); | 71 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); |
72 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); | 72 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); |
73 | u8500_clk_init(); | 73 | u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, |
74 | U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, | ||
75 | U8500_CLKRST6_BASE); | ||
74 | } else if (cpu_is_u9540()) { | 76 | } else if (cpu_is_u9540()) { |
75 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); | 77 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); |
76 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); | 78 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); |
77 | u8500_clk_init(); | 79 | u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, |
80 | U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, | ||
81 | U8500_CLKRST6_BASE); | ||
78 | } else if (cpu_is_u8540()) { | 82 | } else if (cpu_is_u8540()) { |
79 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); | 83 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); |
80 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); | 84 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); |