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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:37:41 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:37:41 -0500
commit6d889d03ab1417645e76e129834f76204bae37c0 (patch)
tree577e37b5597b27f6de25bbbc634a0f17ccfb15f7 /arch/arm
parent7400c12eb069df781894a94dfa5c865f3fe3e2d4 (diff)
parent421b759b86eb8a914cbbd11f6d09a74f411762c6 (diff)
Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Board-level changes This adds and extends support for specific boards on a number of ARM platforms: omap, imx, samsung, tegra, ... * tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits) Enable 32 bit flash support for iMX21ADS board ARM: mx31pdk: Add MC13783 RTC support iomux-mx25: configuration to support CSPI3 on CSI pins MX1:apf9328: Add i2c support mioa701: add newly available DoC G3 chip arm/tegra: remove __initdata annotation from pinmux tables arm/tegra: Use bus notifiers to trigger pinmux setup arm/tegra: Refactor board-*-pinmux.c to share code arm/tegra: Fix mistake in Trimslice's pinmux arm/tegra: Rework Seaboard-vs-Ventana pinmux table arm/tegra: Remove useless entries from ventana_pinmux[] arm/tegra: PCIe: Remove include of mach/pinmux.h arm/tegra: Harmony PCIe: Don't touch pinmux arm/tegra: Add AUXDATA for tegra-pinmux and tegra-gpio arm/tegra: Split Seaboard GPIO table to allow for Ventana ARM: imx6q: generate imx6q dtb files arm/imx6q: Rename Sabreauto to Armadillo2 arm/imx6q-sabrelite: add enet phy ksz9021rn fixup arm/imx6: add imx6q sabrelite board support dts/imx: rename uart labels to consistent with hw spec ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts17
-rw-r--r--arch/arm/boot/dts/imx51.dtsi20
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts18
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts17
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts18
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts19
-rw-r--r--arch/arm/boot/dts/imx53.dtsi34
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts (renamed from arch/arm/boot/dts/imx6q-sabreauto.dts)12
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts49
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi34
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/Makefile.boot3
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c10
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c24
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c2
-rw-r--r--arch/arm/mach-omap2/Kconfig5
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c82
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c46
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c32
-rw-r--r--arch/arm/mach-omap2/devices.c22
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c35
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c25
-rw-r--r--arch/arm/mach-omap2/usb-musb.c3
-rw-r--r--arch/arm/mach-pxa/mioa701.c29
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c18
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/crag6410.h6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c56
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c39
-rw-r--r--arch/arm/mach-s3c64xx/pm.c13
-rw-r--r--arch/arm/mach-tegra/Makefile1
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c16
-rw-r--r--arch/arm/mach-tegra/board-harmony-pcie.c10
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c22
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c24
-rw-r--r--arch/arm/mach-tegra/board-paz00.c27
-rw-r--r--arch/arm/mach-tegra/board-paz00.h3
-rw-r--r--arch/arm/mach-tegra/board-pinmux.c104
-rw-r--r--arch/arm/mach-tegra/board-pinmux.h38
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c120
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c26
-rw-r--r--arch/arm/mach-tegra/pcie.c1
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx25.h4
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h3
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h32
-rw-r--r--arch/arm/plat-samsung/Kconfig8
51 files changed, 866 insertions, 280 deletions
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index f8766af11215..564cb8c19f15 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -35,20 +35,19 @@
35 }; 35 };
36 36
37 esdhc@70008000 { /* ESDHC2 */ 37 esdhc@70008000 { /* ESDHC2 */
38 cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ 38 cd-gpios = <&gpio1 6 0>;
39 wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ 39 wp-gpios = <&gpio1 5 0>;
40 status = "okay"; 40 status = "okay";
41 }; 41 };
42 42
43 uart2: uart@7000c000 { /* UART3 */ 43 uart3: uart@7000c000 {
44 fsl,uart-has-rtscts; 44 fsl,uart-has-rtscts;
45 status = "okay"; 45 status = "okay";
46 }; 46 };
47 47
48 ecspi@70010000 { /* ECSPI1 */ 48 ecspi@70010000 { /* ECSPI1 */
49 fsl,spi-num-chipselects = <2>; 49 fsl,spi-num-chipselects = <2>;
50 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ 50 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
51 <&gpio3 25 0>; /* GPIO4_25 */
52 status = "okay"; 51 status = "okay";
53 52
54 pmic: mc13892@0 { 53 pmic: mc13892@0 {
@@ -57,7 +56,7 @@
57 compatible = "fsl,mc13892"; 56 compatible = "fsl,mc13892";
58 spi-max-frequency = <6000000>; 57 spi-max-frequency = <6000000>;
59 reg = <0>; 58 reg = <0>;
60 mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */ 59 mc13xxx-irq-gpios = <&gpio1 8 0>;
61 fsl,mc13xxx-uses-regulator; 60 fsl,mc13xxx-uses-regulator;
62 }; 61 };
63 62
@@ -91,12 +90,12 @@
91 reg = <0x73fa8000 0x4000>; 90 reg = <0x73fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@73fbc000 { 93 uart1: uart@73fbc000 {
95 fsl,uart-has-rtscts; 94 fsl,uart-has-rtscts;
96 status = "okay"; 95 status = "okay";
97 }; 96 };
98 97
99 uart1: uart@73fc0000 { 98 uart2: uart@73fc0000 {
100 status = "okay"; 99 status = "okay";
101 }; 100 };
102 }; 101 };
@@ -127,7 +126,7 @@
127 126
128 power { 127 power {
129 label = "Power Button"; 128 label = "Power Button";
130 gpios = <&gpio1 21 0>; 129 gpios = <&gpio2 21 0>;
131 linux,code = <116>; /* KEY_POWER */ 130 linux,code = <116>; /* KEY_POWER */
132 gpio-key,wakeup; 131 gpio-key,wakeup;
133 }; 132 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 327ab8e3a4c8..6663986fe1c8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -14,9 +14,9 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 }; 20 };
21 21
22 tzic: tz-interrupt-controller@e0000000 { 22 tzic: tz-interrupt-controller@e0000000 {
@@ -86,7 +86,7 @@
86 status = "disabled"; 86 status = "disabled";
87 }; 87 };
88 88
89 uart2: uart@7000c000 { /* UART3 */ 89 uart3: uart@7000c000 {
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>; 91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>; 92 interrupts = <33>;
@@ -117,7 +117,7 @@
117 }; 117 };
118 }; 118 };
119 119
120 gpio0: gpio@73f84000 { /* GPIO1 */ 120 gpio1: gpio@73f84000 {
121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
122 reg = <0x73f84000 0x4000>; 122 reg = <0x73f84000 0x4000>;
123 interrupts = <50 51>; 123 interrupts = <50 51>;
@@ -127,7 +127,7 @@
127 #interrupt-cells = <1>; 127 #interrupt-cells = <1>;
128 }; 128 };
129 129
130 gpio1: gpio@73f88000 { /* GPIO2 */ 130 gpio2: gpio@73f88000 {
131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
132 reg = <0x73f88000 0x4000>; 132 reg = <0x73f88000 0x4000>;
133 interrupts = <52 53>; 133 interrupts = <52 53>;
@@ -137,7 +137,7 @@
137 #interrupt-cells = <1>; 137 #interrupt-cells = <1>;
138 }; 138 };
139 139
140 gpio2: gpio@73f8c000 { /* GPIO3 */ 140 gpio3: gpio@73f8c000 {
141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
142 reg = <0x73f8c000 0x4000>; 142 reg = <0x73f8c000 0x4000>;
143 interrupts = <54 55>; 143 interrupts = <54 55>;
@@ -147,7 +147,7 @@
147 #interrupt-cells = <1>; 147 #interrupt-cells = <1>;
148 }; 148 };
149 149
150 gpio3: gpio@73f90000 { /* GPIO4 */ 150 gpio4: gpio@73f90000 {
151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
152 reg = <0x73f90000 0x4000>; 152 reg = <0x73f90000 0x4000>;
153 interrupts = <56 57>; 153 interrupts = <56 57>;
@@ -171,14 +171,14 @@
171 status = "disabled"; 171 status = "disabled";
172 }; 172 };
173 173
174 uart0: uart@73fbc000 { 174 uart1: uart@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>; 176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>; 177 interrupts = <31>;
178 status = "disabled"; 178 status = "disabled";
179 }; 179 };
180 180
181 uart1: uart@73fc0000 { 181 uart2: uart@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>; 183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>; 184 interrupts = <32>;
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 2ab7f80a0a35..2dccce46ed81 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */ 32 cd-gpios = <&gpio1 1 0>;
33 wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */ 33 wp-gpios = <&gpio1 9 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 }; 36 };
@@ -44,7 +44,7 @@
44 reg = <0x53fa8000 0x4000>; 44 reg = <0x53fa8000 0x4000>;
45 }; 45 };
46 46
47 uart0: uart@53fbc000 { /* UART1 */ 47 uart1: uart@53fbc000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -67,7 +67,7 @@
67 compatible = "smsc,lan9220", "smsc,lan9115"; 67 compatible = "smsc,lan9220", "smsc,lan9115";
68 reg = <0xf4000000 0x2000000>; 68 reg = <0xf4000000 0x2000000>;
69 phy-mode = "mii"; 69 phy-mode = "mii";
70 interrupt-parent = <&gpio1>; 70 interrupt-parent = <&gpio2>;
71 interrupts = <31>; 71 interrupts = <31>;
72 reg-io-width = <4>; 72 reg-io-width = <4>;
73 smsc,irq-push-pull; 73 smsc,irq-push-pull;
@@ -79,34 +79,34 @@
79 79
80 home { 80 home {
81 label = "Home"; 81 label = "Home";
82 gpios = <&gpio4 10 0>; /* GPIO5_10 */ 82 gpios = <&gpio5 10 0>;
83 linux,code = <102>; /* KEY_HOME */ 83 linux,code = <102>; /* KEY_HOME */
84 gpio-key,wakeup; 84 gpio-key,wakeup;
85 }; 85 };
86 86
87 back { 87 back {
88 label = "Back"; 88 label = "Back";
89 gpios = <&gpio4 11 0>; /* GPIO5_11 */ 89 gpios = <&gpio5 11 0>;
90 linux,code = <158>; /* KEY_BACK */ 90 linux,code = <158>; /* KEY_BACK */
91 gpio-key,wakeup; 91 gpio-key,wakeup;
92 }; 92 };
93 93
94 program { 94 program {
95 label = "Program"; 95 label = "Program";
96 gpios = <&gpio4 12 0>; /* GPIO5_12 */ 96 gpios = <&gpio5 12 0>;
97 linux,code = <362>; /* KEY_PROGRAM */ 97 linux,code = <362>; /* KEY_PROGRAM */
98 gpio-key,wakeup; 98 gpio-key,wakeup;
99 }; 99 };
100 100
101 volume-up { 101 volume-up {
102 label = "Volume Up"; 102 label = "Volume Up";
103 gpios = <&gpio4 13 0>; /* GPIO5_13 */ 103 gpios = <&gpio5 13 0>;
104 linux,code = <115>; /* KEY_VOLUMEUP */ 104 linux,code = <115>; /* KEY_VOLUMEUP */
105 }; 105 };
106 106
107 volume-down { 107 volume-down {
108 label = "Volume Down"; 108 label = "Volume Down";
109 gpios = <&gpio3 0 0>; /* GPIO4_0 */ 109 gpios = <&gpio4 0 0>;
110 linux,code = <114>; /* KEY_VOLUMEDOWN */ 110 linux,code = <114>; /* KEY_VOLUMEDOWN */
111 }; 111 };
112 }; 112 };
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 3f3a88185ff8..5bac4aa4800b 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -29,15 +29,14 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */ 33 wp-gpios = <&gpio3 14 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
37 ecspi@50010000 { /* ECSPI1 */ 37 ecspi@50010000 { /* ECSPI1 */
38 fsl,spi-num-chipselects = <2>; 38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 39 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
40 <&gpio2 19 0>; /* GPIO3_19 */
41 status = "okay"; 40 status = "okay";
42 41
43 flash: at45db321d@1 { 42 flash: at45db321d@1 {
@@ -61,8 +60,8 @@
61 }; 60 };
62 61
63 esdhc@50020000 { /* ESDHC3 */ 62 esdhc@50020000 { /* ESDHC3 */
64 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 63 cd-gpios = <&gpio3 11 0>;
65 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 64 wp-gpios = <&gpio3 12 0>;
66 status = "okay"; 65 status = "okay";
67 }; 66 };
68 }; 67 };
@@ -76,7 +75,7 @@
76 reg = <0x53fa8000 0x4000>; 75 reg = <0x53fa8000 0x4000>;
77 }; 76 };
78 77
79 uart0: uart@53fbc000 { /* UART1 */ 78 uart1: uart@53fbc000 {
80 status = "okay"; 79 status = "okay";
81 }; 80 };
82 }; 81 };
@@ -102,7 +101,7 @@
102 101
103 fec@63fec000 { 102 fec@63fec000 {
104 phy-mode = "rmii"; 103 phy-mode = "rmii";
105 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 104 phy-reset-gpios = <&gpio7 6 0>;
106 status = "okay"; 105 status = "okay";
107 }; 106 };
108 }; 107 };
@@ -113,7 +112,7 @@
113 112
114 green { 113 green {
115 label = "Heartbeat"; 114 label = "Heartbeat";
116 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 115 gpios = <&gpio7 7 0>;
117 linux,default-trigger = "heartbeat"; 116 linux,default-trigger = "heartbeat";
118 }; 117 };
119 }; 118 };
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index ae6de6d0c3f1..5c57c8672c36 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -29,13 +29,13 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 status = "okay"; 33 status = "okay";
34 }; 34 };
35 35
36 esdhc@50020000 { /* ESDHC3 */ 36 esdhc@50020000 { /* ESDHC3 */
37 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 37 cd-gpios = <&gpio3 11 0>;
38 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 38 wp-gpios = <&gpio3 12 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 }; 41 };
@@ -49,7 +49,7 @@
49 reg = <0x53fa8000 0x4000>; 49 reg = <0x53fa8000 0x4000>;
50 }; 50 };
51 51
52 uart0: uart@53fbc000 { /* UART1 */ 52 uart1: uart@53fbc000 {
53 status = "okay"; 53 status = "okay";
54 }; 54 };
55 }; 55 };
@@ -84,7 +84,7 @@
84 84
85 fec@63fec000 { 85 fec@63fec000 {
86 phy-mode = "rmii"; 86 phy-mode = "rmii";
87 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 87 phy-reset-gpios = <&gpio7 6 0>;
88 status = "okay"; 88 status = "okay";
89 }; 89 };
90 }; 90 };
@@ -95,20 +95,20 @@
95 95
96 power { 96 power {
97 label = "Power Button"; 97 label = "Power Button";
98 gpios = <&gpio0 8 0>; /* GPIO1_8 */ 98 gpios = <&gpio1 8 0>;
99 linux,code = <116>; /* KEY_POWER */ 99 linux,code = <116>; /* KEY_POWER */
100 gpio-key,wakeup; 100 gpio-key,wakeup;
101 }; 101 };
102 102
103 volume-up { 103 volume-up {
104 label = "Volume Up"; 104 label = "Volume Up";
105 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 105 gpios = <&gpio2 14 0>;
106 linux,code = <115>; /* KEY_VOLUMEUP */ 106 linux,code = <115>; /* KEY_VOLUMEUP */
107 }; 107 };
108 108
109 volume-down { 109 volume-down {
110 label = "Volume Down"; 110 label = "Volume Down";
111 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 111 gpios = <&gpio2 15 0>;
112 linux,code = <114>; /* KEY_VOLUMEDOWN */ 112 linux,code = <114>; /* KEY_VOLUMEDOWN */
113 }; 113 };
114 }; 114 };
@@ -118,7 +118,7 @@
118 118
119 user { 119 user {
120 label = "Heartbeat"; 120 label = "Heartbeat";
121 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 121 gpios = <&gpio7 7 0>;
122 linux,default-trigger = "heartbeat"; 122 linux,default-trigger = "heartbeat";
123 }; 123 };
124 }; 124 };
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index b1c062eea715..c7ee86c2dfb5 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */ 33 wp-gpios = <&gpio4 11 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
@@ -39,15 +39,14 @@
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
42 uart2: uart@5000c000 { /* UART3 */ 42 uart3: uart@5000c000 {
43 fsl,uart-has-rtscts; 43 fsl,uart-has-rtscts;
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 ecspi@50010000 { /* ECSPI1 */ 47 ecspi@50010000 { /* ECSPI1 */
48 fsl,spi-num-chipselects = <2>; 48 fsl,spi-num-chipselects = <2>;
49 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 49 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
50 <&gpio2 19 0>; /* GPIO3_19 */
51 status = "okay"; 50 status = "okay";
52 51
53 zigbee: mc1323@0 { 52 zigbee: mc1323@0 {
@@ -91,11 +90,11 @@
91 reg = <0x53fa8000 0x4000>; 90 reg = <0x53fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@53fbc000 { /* UART1 */ 93 uart1: uart@53fbc000 {
95 status = "okay"; 94 status = "okay";
96 }; 95 };
97 96
98 uart1: uart@53fc0000 { /* UART2 */ 97 uart2: uart@53fc0000 {
99 status = "okay"; 98 status = "okay";
100 }; 99 };
101 }; 100 };
@@ -145,7 +144,7 @@
145 144
146 fec@63fec000 { 145 fec@63fec000 {
147 phy-mode = "rmii"; 146 phy-mode = "rmii";
148 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 147 phy-reset-gpios = <&gpio7 6 0>;
149 status = "okay"; 148 status = "okay";
150 }; 149 };
151 }; 150 };
@@ -156,13 +155,13 @@
156 155
157 volume-up { 156 volume-up {
158 label = "Volume Up"; 157 label = "Volume Up";
159 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 158 gpios = <&gpio2 14 0>;
160 linux,code = <115>; /* KEY_VOLUMEUP */ 159 linux,code = <115>; /* KEY_VOLUMEUP */
161 }; 160 };
162 161
163 volume-down { 162 volume-down {
164 label = "Volume Down"; 163 label = "Volume Down";
165 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 164 gpios = <&gpio2 15 0>;
166 linux,code = <114>; /* KEY_VOLUMEDOWN */ 165 linux,code = <114>; /* KEY_VOLUMEDOWN */
167 }; 166 };
168 }; 167 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 099cd84ee372..5dd91b942c91 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 tzic: tz-interrupt-controller@0fffc000 { 24 tzic: tz-interrupt-controller@0fffc000 {
@@ -88,7 +88,7 @@
88 status = "disabled"; 88 status = "disabled";
89 }; 89 };
90 90
91 uart2: uart@5000c000 { /* UART3 */ 91 uart3: uart@5000c000 {
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>; 93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>; 94 interrupts = <33>;
@@ -119,7 +119,7 @@
119 }; 119 };
120 }; 120 };
121 121
122 gpio0: gpio@53f84000 { /* GPIO1 */ 122 gpio1: gpio@53f84000 {
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>; 124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>; 125 interrupts = <50 51>;
@@ -129,7 +129,7 @@
129 #interrupt-cells = <1>; 129 #interrupt-cells = <1>;
130 }; 130 };
131 131
132 gpio1: gpio@53f88000 { /* GPIO2 */ 132 gpio2: gpio@53f88000 {
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>; 134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>; 135 interrupts = <52 53>;
@@ -139,7 +139,7 @@
139 #interrupt-cells = <1>; 139 #interrupt-cells = <1>;
140 }; 140 };
141 141
142 gpio2: gpio@53f8c000 { /* GPIO3 */ 142 gpio3: gpio@53f8c000 {
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>; 144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>; 145 interrupts = <54 55>;
@@ -149,7 +149,7 @@
149 #interrupt-cells = <1>; 149 #interrupt-cells = <1>;
150 }; 150 };
151 151
152 gpio3: gpio@53f90000 { /* GPIO4 */ 152 gpio4: gpio@53f90000 {
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>; 154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>; 155 interrupts = <56 57>;
@@ -173,21 +173,21 @@
173 status = "disabled"; 173 status = "disabled";
174 }; 174 };
175 175
176 uart0: uart@53fbc000 { /* UART1 */ 176 uart1: uart@53fbc000 {
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>; 178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>; 179 interrupts = <31>;
180 status = "disabled"; 180 status = "disabled";
181 }; 181 };
182 182
183 uart1: uart@53fc0000 { /* UART2 */ 183 uart2: uart@53fc0000 {
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>; 185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>; 186 interrupts = <32>;
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
190 gpio4: gpio@53fdc000 { /* GPIO5 */ 190 gpio5: gpio@53fdc000 {
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>; 192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>; 193 interrupts = <103 104>;
@@ -197,7 +197,7 @@
197 #interrupt-cells = <1>; 197 #interrupt-cells = <1>;
198 }; 198 };
199 199
200 gpio5: gpio@53fe0000 { /* GPIO6 */ 200 gpio6: gpio@53fe0000 {
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>; 202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>; 203 interrupts = <105 106>;
@@ -207,7 +207,7 @@
207 #interrupt-cells = <1>; 207 #interrupt-cells = <1>;
208 }; 208 };
209 209
210 gpio6: gpio@53fe4000 { /* GPIO7 */ 210 gpio7: gpio@53fe4000 {
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>; 212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>; 213 interrupts = <107 108>;
@@ -226,7 +226,7 @@
226 status = "disabled"; 226 status = "disabled";
227 }; 227 };
228 228
229 uart3: uart@53ff0000 { /* UART4 */ 229 uart4: uart@53ff0000 {
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>; 231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>; 232 interrupts = <13>;
@@ -241,7 +241,7 @@
241 reg = <0x60000000 0x10000000>; 241 reg = <0x60000000 0x10000000>;
242 ranges; 242 ranges;
243 243
244 uart4: uart@63f90000 { /* UART5 */ 244 uart5: uart@63f90000 {
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>; 246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>; 247 interrupts = <86>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 072974e443f2..c3977e0478b9 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -14,8 +14,8 @@
14/include/ "imx6q.dtsi" 14/include/ "imx6q.dtsi"
15 15
16/ { 16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board"; 17 model = "Freescale i.MX6 Quad Armadillo2 Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; 18 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
19 19
20 chosen { 20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; 21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
@@ -34,8 +34,8 @@
34 }; 34 };
35 35
36 usdhc@02198000 { /* uSDHC3 */ 36 usdhc@02198000 { /* uSDHC3 */
37 cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */ 37 cd-gpios = <&gpio6 11 0>;
38 wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */ 38 wp-gpios = <&gpio6 14 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
@@ -44,7 +44,7 @@
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 uart3: uart@021f0000 { /* UART4 */ 47 uart4: uart@021f0000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -55,7 +55,7 @@
55 55
56 debug-led { 56 debug-led {
57 label = "Heartbeat"; 57 label = "Heartbeat";
58 gpios = <&gpio2 25 0>; /* GPIO3_25 */ 58 gpios = <&gpio3 25 0>;
59 linux,default-trigger = "heartbeat"; 59 linux,default-trigger = "heartbeat";
60 }; 60 };
61 }; 61 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
new file mode 100644
index 000000000000..08d920de7286
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -0,0 +1,49 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Lite Board";
18 compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 soc {
25 aips-bus@02100000 { /* AIPS2 */
26 enet@02188000 {
27 phy-mode = "rgmii";
28 phy-reset-gpios = <&gpio3 23 0>;
29 status = "okay";
30 };
31
32 usdhc@02198000 { /* uSDHC3 */
33 cd-gpios = <&gpio7 0 0>;
34 wp-gpios = <&gpio7 1 0>;
35 status = "okay";
36 };
37
38 usdhc@0219c000 { /* uSDHC4 */
39 cd-gpios = <&gpio2 6 0>;
40 wp-gpios = <&gpio2 7 0>;
41 status = "okay";
42 };
43
44 uart2: uart@021e8000 {
45 status = "okay";
46 };
47 };
48 };
49};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 7dda599558cc..263e8f3664b5 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 cpus { 24 cpus {
@@ -165,7 +165,7 @@
165 status = "disabled"; 165 status = "disabled";
166 }; 166 };
167 167
168 uart0: uart@02020000 { /* UART1 */ 168 uart1: uart@02020000 {
169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
170 reg = <0x02020000 0x4000>; 170 reg = <0x02020000 0x4000>;
171 interrupts = <0 26 0x04>; 171 interrupts = <0 26 0x04>;
@@ -247,7 +247,7 @@
247 interrupts = <0 55 0x04>; 247 interrupts = <0 55 0x04>;
248 }; 248 };
249 249
250 gpio0: gpio@0209c000 { /* GPIO1 */ 250 gpio1: gpio@0209c000 {
251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
252 reg = <0x0209c000 0x4000>; 252 reg = <0x0209c000 0x4000>;
253 interrupts = <0 66 0x04 0 67 0x04>; 253 interrupts = <0 66 0x04 0 67 0x04>;
@@ -257,7 +257,7 @@
257 #interrupt-cells = <1>; 257 #interrupt-cells = <1>;
258 }; 258 };
259 259
260 gpio1: gpio@020a0000 { /* GPIO2 */ 260 gpio2: gpio@020a0000 {
261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
262 reg = <0x020a0000 0x4000>; 262 reg = <0x020a0000 0x4000>;
263 interrupts = <0 68 0x04 0 69 0x04>; 263 interrupts = <0 68 0x04 0 69 0x04>;
@@ -267,7 +267,7 @@
267 #interrupt-cells = <1>; 267 #interrupt-cells = <1>;
268 }; 268 };
269 269
270 gpio2: gpio@020a4000 { /* GPIO3 */ 270 gpio3: gpio@020a4000 {
271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
272 reg = <0x020a4000 0x4000>; 272 reg = <0x020a4000 0x4000>;
273 interrupts = <0 70 0x04 0 71 0x04>; 273 interrupts = <0 70 0x04 0 71 0x04>;
@@ -277,7 +277,7 @@
277 #interrupt-cells = <1>; 277 #interrupt-cells = <1>;
278 }; 278 };
279 279
280 gpio3: gpio@020a8000 { /* GPIO4 */ 280 gpio4: gpio@020a8000 {
281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
282 reg = <0x020a8000 0x4000>; 282 reg = <0x020a8000 0x4000>;
283 interrupts = <0 72 0x04 0 73 0x04>; 283 interrupts = <0 72 0x04 0 73 0x04>;
@@ -287,7 +287,7 @@
287 #interrupt-cells = <1>; 287 #interrupt-cells = <1>;
288 }; 288 };
289 289
290 gpio4: gpio@020ac000 { /* GPIO5 */ 290 gpio5: gpio@020ac000 {
291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
292 reg = <0x020ac000 0x4000>; 292 reg = <0x020ac000 0x4000>;
293 interrupts = <0 74 0x04 0 75 0x04>; 293 interrupts = <0 74 0x04 0 75 0x04>;
@@ -297,7 +297,7 @@
297 #interrupt-cells = <1>; 297 #interrupt-cells = <1>;
298 }; 298 };
299 299
300 gpio5: gpio@020b0000 { /* GPIO6 */ 300 gpio6: gpio@020b0000 {
301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
302 reg = <0x020b0000 0x4000>; 302 reg = <0x020b0000 0x4000>;
303 interrupts = <0 76 0x04 0 77 0x04>; 303 interrupts = <0 76 0x04 0 77 0x04>;
@@ -307,7 +307,7 @@
307 #interrupt-cells = <1>; 307 #interrupt-cells = <1>;
308 }; 308 };
309 309
310 gpio6: gpio@020b4000 { /* GPIO7 */ 310 gpio7: gpio@020b4000 {
311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
312 reg = <0x020b4000 0x4000>; 312 reg = <0x020b4000 0x4000>;
313 interrupts = <0 78 0x04 0 79 0x04>; 313 interrupts = <0 78 0x04 0 79 0x04>;
@@ -543,28 +543,28 @@
543 interrupts = <0 18 0x04>; 543 interrupts = <0 18 0x04>;
544 }; 544 };
545 545
546 uart1: uart@021e8000 { /* UART2 */ 546 uart2: uart@021e8000 {
547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
548 reg = <0x021e8000 0x4000>; 548 reg = <0x021e8000 0x4000>;
549 interrupts = <0 27 0x04>; 549 interrupts = <0 27 0x04>;
550 status = "disabled"; 550 status = "disabled";
551 }; 551 };
552 552
553 uart2: uart@021ec000 { /* UART3 */ 553 uart3: uart@021ec000 {
554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
555 reg = <0x021ec000 0x4000>; 555 reg = <0x021ec000 0x4000>;
556 interrupts = <0 28 0x04>; 556 interrupts = <0 28 0x04>;
557 status = "disabled"; 557 status = "disabled";
558 }; 558 };
559 559
560 uart3: uart@021f0000 { /* UART4 */ 560 uart4: uart@021f0000 {
561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
562 reg = <0x021f0000 0x4000>; 562 reg = <0x021f0000 0x4000>;
563 interrupts = <0 29 0x04>; 563 interrupts = <0 29 0x04>;
564 status = "disabled"; 564 status = "disabled";
565 }; 565 };
566 566
567 uart4: uart@021f4000 { /* UART5 */ 567 uart5: uart@021f4000 {
568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
569 reg = <0x021f4000 0x4000>; 569 reg = <0x021f4000 0x4000>;
570 interrupts = <0 30 0x04>; 570 interrupts = <0 30 0x04>;
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index cf497ce41dfe..a22e93079063 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -68,7 +68,6 @@ CONFIG_MTD_CFI=y
68CONFIG_MTD_CFI_ADV_OPTIONS=y 68CONFIG_MTD_CFI_ADV_OPTIONS=y
69CONFIG_MTD_CFI_GEOMETRY=y 69CONFIG_MTD_CFI_GEOMETRY=y
70# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set 70# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
71# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
72# CONFIG_MTD_CFI_I2 is not set 71# CONFIG_MTD_CFI_I2 is not set
73CONFIG_MTD_CFI_INTELEXT=y 72CONFIG_MTD_CFI_INTELEXT=y
74CONFIG_MTD_PHYSMAP=y 73CONFIG_MTD_PHYSMAP=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 35a218cb5c7e..9d8598f29fda 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -98,6 +98,7 @@ config MACH_SCB9328
98config MACH_APF9328 98config MACH_APF9328
99 bool "APF9328" 99 bool "APF9328"
100 select SOC_IMX1 100 select SOC_IMX1
101 select IMX_HAVE_PLATFORM_IMX_I2C
101 select IMX_HAVE_PLATFORM_IMX_UART 102 select IMX_HAVE_PLATFORM_IMX_UART
102 help 103 help
103 Say Yes here if you are using the Armadeus APF9328 development board 104 Say Yes here if you are using the Armadeus APF9328 development board
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index cfede5768aa0..5f4d06af4912 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -25,3 +25,6 @@ initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
28
29dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
30 imx6q-sabrelite.dtb
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 146a4f073464..f4a63ee9e217 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -18,6 +18,7 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/dm9000.h> 20#include <linux/dm9000.h>
21#include <linux/i2c.h>
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -41,6 +42,9 @@ static const int apf9328_pins[] __initconst = {
41 PB29_PF_UART2_RTS, 42 PB29_PF_UART2_RTS,
42 PB30_PF_UART2_TXD, 43 PB30_PF_UART2_TXD,
43 PB31_PF_UART2_RXD, 44 PB31_PF_UART2_RXD,
45 /* I2C */
46 PA15_PF_I2C_SDA,
47 PA16_PF_I2C_SCL,
44}; 48};
45 49
46/* 50/*
@@ -103,6 +107,10 @@ static const struct imxuart_platform_data uart1_pdata __initconst = {
103 .flags = IMXUART_HAVE_RTSCTS, 107 .flags = IMXUART_HAVE_RTSCTS,
104}; 108};
105 109
110static const struct imxi2c_platform_data apf9328_i2c_data __initconst = {
111 .bitrate = 100000,
112};
113
106static struct platform_device *devices[] __initdata = { 114static struct platform_device *devices[] __initdata = {
107 &apf9328_flash_device, 115 &apf9328_flash_device,
108 &dm9000x_device, 116 &dm9000x_device,
@@ -119,6 +127,8 @@ static void __init apf9328_init(void)
119 imx1_add_imx_uart0(NULL); 127 imx1_add_imx_uart0(NULL);
120 imx1_add_imx_uart1(&uart1_pdata); 128 imx1_add_imx_uart1(&uart1_pdata);
121 129
130 imx1_add_imx_i2c(&apf9328_i2c_data);
131
122 platform_add_devices(devices, ARRAY_SIZE(devices)); 132 platform_add_devices(devices, ARRAY_SIZE(devices));
123} 133}
124 134
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 05b49bb5d677..c25728106917 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -19,6 +19,8 @@
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/of_irq.h> 20#include <linux/of_irq.h>
21#include <linux/of_platform.h> 21#include <linux/of_platform.h>
22#include <linux/phy.h>
23#include <linux/micrel_phy.h>
22#include <asm/hardware/cache-l2x0.h> 24#include <asm/hardware/cache-l2x0.h>
23#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
24#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -56,8 +58,27 @@ soft:
56 soft_restart(0); 58 soft_restart(0);
57} 59}
58 60
61/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
62static int ksz9021rn_phy_fixup(struct phy_device *phydev)
63{
64 /* min rx data delay */
65 phy_write(phydev, 0x0b, 0x8105);
66 phy_write(phydev, 0x0c, 0x0000);
67
68 /* max rx/tx clock delay, min rx/tx control delay */
69 phy_write(phydev, 0x0b, 0x8104);
70 phy_write(phydev, 0x0c, 0xf0f0);
71 phy_write(phydev, 0x0b, 0x104);
72
73 return 0;
74}
75
59static void __init imx6q_init_machine(void) 76static void __init imx6q_init_machine(void)
60{ 77{
78 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
79 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
80 ksz9021rn_phy_fixup);
81
61 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 82 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
62 83
63 imx6q_pm_init(); 84 imx6q_pm_init();
@@ -105,7 +126,8 @@ static struct sys_timer imx6q_timer = {
105}; 126};
106 127
107static const char *imx6q_dt_compat[] __initdata = { 128static const char *imx6q_dt_compat[] __initdata = {
108 "fsl,imx6q-sabreauto", 129 "fsl,imx6q-arm2",
130 "fsl,imx6q-sabrelite",
109 NULL, 131 NULL,
110}; 132};
111 133
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 2b565c381347..89c33258639f 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -492,7 +492,7 @@ static struct mc13xxx_platform_data mc13783_pdata = {
492 .regulators = mx31_3ds_regulators, 492 .regulators = mx31_3ds_regulators,
493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), 493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
494 }, 494 },
495 .flags = MC13XXX_USE_TOUCHSCREEN, 495 .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC,
496}; 496};
497 497
498/* SPI */ 498/* SPI */
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index ef25ff4d920d..b7407154c881 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -324,6 +324,11 @@ config MACH_TI8168EVM
324 depends on SOC_OMAPTI81XX 324 depends on SOC_OMAPTI81XX
325 default y 325 default y
326 326
327config MACH_TI8148EVM
328 bool "TI8148 Evaluation Module"
329 depends on SOC_OMAPTI81XX
330 default y
331
327config MACH_OMAP_4430SDP 332config MACH_OMAP_4430SDP
328 bool "OMAP 4430 SDP board" 333 bool "OMAP 4430 SDP board"
329 default y 334 default y
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b009f17dee56..6d226a76d057 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -232,6 +232,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
232 232
233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o 233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o 234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
235obj-$(CONFIG_MACH_TI8148EVM) += board-ti8168evm.o
235 236
236# Platform specific device init code 237# Platform specific device init code
237 238
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index bad5d5a5ef79..5598e00ccf52 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -372,11 +372,17 @@ static struct platform_device sdp4430_vbat = {
372 }, 372 },
373}; 373};
374 374
375static struct platform_device sdp4430_dmic_codec = {
376 .name = "dmic-codec",
377 .id = -1,
378};
379
375static struct platform_device *sdp4430_devices[] __initdata = { 380static struct platform_device *sdp4430_devices[] __initdata = {
376 &sdp4430_gpio_keys_device, 381 &sdp4430_gpio_keys_device,
377 &sdp4430_leds_gpio, 382 &sdp4430_leds_gpio,
378 &sdp4430_leds_pwm, 383 &sdp4430_leds_pwm,
379 &sdp4430_vbat, 384 &sdp4430_vbat,
385 &sdp4430_dmic_codec,
380}; 386};
381 387
382static struct omap_musb_board_data musb_board_data = { 388static struct omap_musb_board_data musb_board_data = {
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 1545102d1f9b..e921e3be24a4 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -53,7 +53,8 @@
53#include "hsmmc.h" 53#include "hsmmc.h"
54#include "common-board-devices.h" 54#include "common-board-devices.h"
55 55
56#define CM_T35_GPIO_PENDOWN 57 56#define CM_T35_GPIO_PENDOWN 57
57#define SB_T35_USB_HUB_RESET_GPIO 167
57 58
58#define CM_T35_SMSC911X_CS 5 59#define CM_T35_SMSC911X_CS 5
59#define CM_T35_SMSC911X_GPIO 163 60#define CM_T35_SMSC911X_GPIO 163
@@ -339,8 +340,10 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
339 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), 340 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
340}; 341};
341 342
342static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { 343static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
343 REGULATOR_SUPPLY("vdvi", "omapdss"), 344 REGULATOR_SUPPLY("vcc", "spi1.0"),
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
346 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
344}; 347};
345 348
346/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 349/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -373,6 +376,19 @@ static struct regulator_init_data cm_t35_vsim = {
373 .consumer_supplies = cm_t35_vsim_supply, 376 .consumer_supplies = cm_t35_vsim_supply,
374}; 377};
375 378
379static struct regulator_init_data cm_t35_vio = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE,
387 },
388 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
389 .consumer_supplies = cm_t35_vio_supplies,
390};
391
376static uint32_t cm_t35_keymap[] = { 392static uint32_t cm_t35_keymap[] = {
377 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), 393 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
378 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), 394 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
@@ -421,6 +437,23 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
421 .reset_gpio_port[2] = -EINVAL 437 .reset_gpio_port[2] = -EINVAL
422}; 438};
423 439
440static void cm_t35_init_usbh(void)
441{
442 int err;
443
444 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
445 GPIOF_OUT_INIT_LOW, "usb hub rst");
446 if (err) {
447 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
448 } else {
449 udelay(10);
450 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
451 msleep(1);
452 }
453
454 usbhs_init(&usbhs_bdata);
455}
456
424static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, 457static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
425 unsigned ngpio) 458 unsigned ngpio)
426{ 459{
@@ -456,17 +489,14 @@ static struct twl4030_platform_data cm_t35_twldata = {
456 .gpio = &cm_t35_gpio_data, 489 .gpio = &cm_t35_gpio_data,
457 .vmmc1 = &cm_t35_vmmc1, 490 .vmmc1 = &cm_t35_vmmc1,
458 .vsim = &cm_t35_vsim, 491 .vsim = &cm_t35_vsim,
492 .vio = &cm_t35_vio,
459}; 493};
460 494
461static void __init cm_t35_init_i2c(void) 495static void __init cm_t35_init_i2c(void)
462{ 496{
463 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 497 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
464 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); 498 TWL_COMMON_REGULATOR_VDAC |
465 499 TWL_COMMON_PDATA_AUDIO);
466 cm_t35_twldata.vpll2->constraints.name = "VDVI";
467 cm_t35_twldata.vpll2->num_consumer_supplies =
468 ARRAY_SIZE(cm_t35_vdvi_supply);
469 cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
470 500
471 omap3_pmic_init("tps65930", &cm_t35_twldata); 501 omap3_pmic_init("tps65930", &cm_t35_twldata);
472} 502}
@@ -570,24 +600,28 @@ static void __init cm_t3x_common_dss_mux_init(int mux_mode)
570 600
571static void __init cm_t35_init_mux(void) 601static void __init cm_t35_init_mux(void)
572{ 602{
573 omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 603 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
574 omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 604
575 omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 605 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
576 omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 606 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
577 omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 607 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
578 omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 608 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
579 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 609 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
610 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
611 cm_t3x_common_dss_mux_init(mux_mode);
580} 612}
581 613
582static void __init cm_t3730_init_mux(void) 614static void __init cm_t3730_init_mux(void)
583{ 615{
584 omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 616 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
585 omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 617
586 omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 618 omap_mux_init_signal("sys_boot0", mux_mode);
587 omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 619 omap_mux_init_signal("sys_boot1", mux_mode);
588 omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 620 omap_mux_init_signal("sys_boot3", mux_mode);
589 omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 621 omap_mux_init_signal("sys_boot4", mux_mode);
590 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 622 omap_mux_init_signal("sys_boot5", mux_mode);
623 omap_mux_init_signal("sys_boot6", mux_mode);
624 cm_t3x_common_dss_mux_init(mux_mode);
591} 625}
592#else 626#else
593static inline void cm_t35_init_mux(void) {} 627static inline void cm_t35_init_mux(void) {}
@@ -612,7 +646,7 @@ static void __init cm_t3x_common_init(void)
612 cm_t35_init_display(); 646 cm_t35_init_display();
613 647
614 usb_musb_init(NULL); 648 usb_musb_init(NULL);
615 usbhs_init(&usbhs_bdata); 649 cm_t35_init_usbh();
616} 650}
617 651
618static void __init cm_t35_init(void) 652static void __init cm_t35_init(void)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 108fee6146fc..d67bcdf724d7 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -15,6 +15,7 @@
15#include <linux/input/matrix_keypad.h> 15#include <linux/input/matrix_keypad.h>
16#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
17#include <linux/wl12xx.h> 17#include <linux/wl12xx.h>
18#include <linux/spi/tsc2005.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
19#include <linux/i2c/twl.h> 20#include <linux/i2c/twl.h>
20#include <linux/clk.h> 21#include <linux/clk.h>
@@ -58,6 +59,9 @@
58 59
59#define RX51_USB_TRANSCEIVER_RST_GPIO 67 60#define RX51_USB_TRANSCEIVER_RST_GPIO 67
60 61
62#define RX51_TSC2005_RESET_GPIO 104
63#define RX51_TSC2005_IRQ_GPIO 100
64
61/* list all spi devices here */ 65/* list all spi devices here */
62enum { 66enum {
63 RX51_SPI_WL1251, 67 RX51_SPI_WL1251,
@@ -66,6 +70,7 @@ enum {
66}; 70};
67 71
68static struct wl12xx_platform_data wl1251_pdata; 72static struct wl12xx_platform_data wl1251_pdata;
73static struct tsc2005_platform_data tsc2005_pdata;
69 74
70#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) 75#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
71static struct tsl2563_platform_data rx51_tsl2563_platform_data = { 76static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
@@ -167,10 +172,10 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
167 .modalias = "tsc2005", 172 .modalias = "tsc2005",
168 .bus_num = 1, 173 .bus_num = 1,
169 .chip_select = 0, 174 .chip_select = 0,
170 /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ 175 .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
171 .max_speed_hz = 6000000, 176 .max_speed_hz = 6000000,
172 .controller_data = &tsc2005_mcspi_config, 177 .controller_data = &tsc2005_mcspi_config,
173 /* .platform_data = &tsc2005_config,*/ 178 .platform_data = &tsc2005_pdata,
174 }, 179 },
175}; 180};
176 181
@@ -1086,6 +1091,42 @@ error:
1086 */ 1091 */
1087} 1092}
1088 1093
1094static struct tsc2005_platform_data tsc2005_pdata = {
1095 .ts_pressure_max = 2048,
1096 .ts_pressure_fudge = 2,
1097 .ts_x_max = 4096,
1098 .ts_x_fudge = 4,
1099 .ts_y_max = 4096,
1100 .ts_y_fudge = 7,
1101 .ts_x_plate_ohm = 280,
1102 .esd_timeout_ms = 8000,
1103};
1104
1105static void rx51_tsc2005_set_reset(bool enable)
1106{
1107 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1108}
1109
1110static void __init rx51_init_tsc2005(void)
1111{
1112 int r;
1113
1114 r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ");
1115 if (r < 0) {
1116 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ");
1117 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0;
1118 }
1119
1120 r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH,
1121 "tsc2005 reset");
1122 if (r >= 0) {
1123 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
1124 } else {
1125 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset");
1126 tsc2005_pdata.esd_timeout_ms = 0;
1127 }
1128}
1129
1089void __init rx51_peripherals_init(void) 1130void __init rx51_peripherals_init(void)
1090{ 1131{
1091 rx51_i2c_init(); 1132 rx51_i2c_init();
@@ -1094,6 +1135,7 @@ void __init rx51_peripherals_init(void)
1094 board_smc91x_init(); 1135 board_smc91x_init();
1095 rx51_add_gpio_keys(); 1136 rx51_add_gpio_keys();
1096 rx51_init_wl1251(); 1137 rx51_init_wl1251();
1138 rx51_init_tsc2005();
1097 rx51_init_si4713(); 1139 rx51_init_si4713();
1098 spi_register_board_info(rx51_peripherals_spi_board_info, 1140 spi_register_board_info(rx51_peripherals_spi_board_info,
1099 ARRAY_SIZE(rx51_peripherals_spi_board_info)); 1141 ARRAY_SIZE(rx51_peripherals_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 1770b28d6522..ab9a7a9e9d64 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Code for TI8168 EVM. 2 * Code for TI8168/TI8148 EVM.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -23,16 +23,25 @@
23#include <plat/irqs.h> 23#include <plat/irqs.h>
24#include <plat/board.h> 24#include <plat/board.h>
25#include "common.h" 25#include "common.h"
26#include <plat/usb.h>
26 27
27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { 28static struct omap_musb_board_data musb_board_data = {
29 .set_phy_power = ti81xx_musb_phy_power,
30 .interface_type = MUSB_INTERFACE_ULPI,
31 .mode = MUSB_OTG,
32 .power = 500,
28}; 33};
29 34
30static void __init ti8168_evm_init(void) 35static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
36};
37
38static void __init ti81xx_evm_init(void)
31{ 39{
32 omap_serial_init(); 40 omap_serial_init();
33 omap_sdrc_init(NULL, NULL); 41 omap_sdrc_init(NULL, NULL);
34 omap_board_config = ti8168_evm_config; 42 omap_board_config = ti81xx_evm_config;
35 omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); 43 omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
44 usb_musb_init(&musb_board_data);
36} 45}
37 46
38MACHINE_START(TI8168EVM, "ti8168evm") 47MACHINE_START(TI8168EVM, "ti8168evm")
@@ -42,6 +51,17 @@ MACHINE_START(TI8168EVM, "ti8168evm")
42 .init_early = ti81xx_init_early, 51 .init_early = ti81xx_init_early,
43 .init_irq = ti81xx_init_irq, 52 .init_irq = ti81xx_init_irq,
44 .timer = &omap3_timer, 53 .timer = &omap3_timer,
45 .init_machine = ti8168_evm_init, 54 .init_machine = ti81xx_evm_init,
55 .restart = omap_prcm_restart,
56MACHINE_END
57
58MACHINE_START(TI8148EVM, "ti8148evm")
59 /* Maintainer: Texas Instruments */
60 .atag_offset = 0x100,
61 .map_io = ti81xx_map_io,
62 .init_early = ti81xx_init_early,
63 .init_irq = ti81xx_init_irq,
64 .timer = &omap3_timer,
65 .init_machine = ti81xx_evm_init,
46 .restart = omap_prcm_restart, 66 .restart = omap_prcm_restart,
47MACHINE_END 67MACHINE_END
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c15cfada5f13..35d5dffab7e1 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -336,6 +336,27 @@ static void omap_init_mcpdm(void)
336static inline void omap_init_mcpdm(void) {} 336static inline void omap_init_mcpdm(void) {}
337#endif 337#endif
338 338
339#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
340 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
341
342static void omap_init_dmic(void)
343{
344 struct omap_hwmod *oh;
345 struct platform_device *pdev;
346
347 oh = omap_hwmod_lookup("dmic");
348 if (!oh) {
349 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
350 return;
351 }
352
353 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
354 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
355}
356#else
357static inline void omap_init_dmic(void) {}
358#endif
359
339#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 360#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
340 361
341#include <plat/mcspi.h> 362#include <plat/mcspi.h>
@@ -681,6 +702,7 @@ static int __init omap2_init_devices(void)
681 */ 702 */
682 omap_init_audio(); 703 omap_init_audio();
683 omap_init_mcpdm(); 704 omap_init_mcpdm();
705 omap_init_dmic();
684 omap_init_camera(); 706 omap_init_camera();
685 omap_init_mbox(); 707 omap_init_mbox();
686 omap_init_mcspi(); 708 omap_init_mcspi();
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3c8476..4c90477e6f82 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,38 @@ void am35x_set_mode(u8 musb_mode)
260 260
261 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); 261 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
262} 262}
263
264void ti81xx_musb_phy_power(u8 on)
265{
266 void __iomem *scm_base = NULL;
267 u32 usbphycfg;
268
269 scm_base = ioremap(TI81XX_SCM_BASE, SZ_2K);
270 if (!scm_base) {
271 pr_err("system control module ioremap failed\n");
272 return;
273 }
274
275 usbphycfg = __raw_readl(scm_base + USBCTRL0);
276
277 if (on) {
278 if (cpu_is_ti816x()) {
279 usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
280 usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
281 } else if (cpu_is_ti814x()) {
282 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
283 | USBPHY_DPINPUT | USBPHY_DMINPUT);
284 usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
285 | USBPHY_DPOPBUFCTL | USBPHY_DMOPBUFCTL);
286 }
287 } else {
288 if (cpu_is_ti816x())
289 usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE;
290 else if (cpu_is_ti814x())
291 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
292
293 }
294 __raw_writel(usbphycfg, scm_base + USBCTRL0);
295
296 iounmap(scm_base);
297}
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index ee3a8ad304cb..7479d7ea1379 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SDRC register values for Nokia boards 2 * SDRC register values for Nokia boards
3 * 3 *
4 * Copyright (C) 2008, 2010 Nokia Corporation 4 * Copyright (C) 2008, 2010-2011 Nokia Corporation
5 * 5 *
6 * Lauri Leukkunen <lauri.leukkunen@nokia.com> 6 * Lauri Leukkunen <lauri.leukkunen@nokia.com>
7 * 7 *
@@ -107,14 +107,37 @@ static const struct sdram_timings nokia_195dot2mhz_timings[] = {
107 }, 107 },
108}; 108};
109 109
110static const struct sdram_timings nokia_200mhz_timings[] = {
111 {
112 .casl = 3,
113 .tDAL = 30000,
114 .tDPL = 15000,
115 .tRRD = 10000,
116 .tRCD = 20000,
117 .tRP = 15000,
118 .tRAS = 40000,
119 .tRC = 55000,
120 .tRFC = 140000,
121 .tXSR = 200000,
122
123 .tREF = 7800,
124
125 .tXP = 2,
126 .tCKE = 4,
127 .tWTR = 2
128 },
129};
130
110static const struct { 131static const struct {
111 long rate; 132 long rate;
112 struct sdram_timings const *data; 133 struct sdram_timings const *data;
113} nokia_timings[] = { 134} nokia_timings[] = {
114 { 83000000, nokia_166mhz_timings }, 135 { 83000000, nokia_166mhz_timings },
115 { 97600000, nokia_97dot6mhz_timings }, 136 { 97600000, nokia_97dot6mhz_timings },
137 { 100000000, nokia_200mhz_timings },
116 { 166000000, nokia_166mhz_timings }, 138 { 166000000, nokia_166mhz_timings },
117 { 195200000, nokia_195dot2mhz_timings }, 139 { 195200000, nokia_195dot2mhz_timings },
140 { 200000000, nokia_200mhz_timings },
118}; 141};
119static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; 142static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1];
120 143
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 267975086a7b..8d5ed775dd56 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -93,6 +93,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
93 if (cpu_is_omap3517() || cpu_is_omap3505()) { 93 if (cpu_is_omap3517() || cpu_is_omap3505()) {
94 oh_name = "am35x_otg_hs"; 94 oh_name = "am35x_otg_hs";
95 name = "musb-am35x"; 95 name = "musb-am35x";
96 } else if (cpu_is_ti81xx()) {
97 oh_name = "usb_otg_hs";
98 name = "musb-ti81xx";
96 } else { 99 } else {
97 oh_name = "usb_otg_hs"; 100 oh_name = "usb_otg_hs";
98 name = "musb-omap2430"; 101 name = "musb-omap2430";
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 924a3b5f8da6..dce71b4a3a55 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -53,6 +53,7 @@
53#include <mach/pxa27x-udc.h> 53#include <mach/pxa27x-udc.h>
54#include <mach/camera.h> 54#include <mach/camera.h>
55#include <mach/audio.h> 55#include <mach/audio.h>
56#include <mach/smemc.h>
56#include <media/soc_camera.h> 57#include <media/soc_camera.h>
57 58
58#include <mach/mioa701.h> 59#include <mach/mioa701.h>
@@ -390,24 +391,19 @@ static struct pxamci_platform_data mioa701_mci_info = {
390}; 391};
391 392
392/* FlashRAM */ 393/* FlashRAM */
393static struct resource strataflash_resource = { 394static struct resource docg3_resource = {
394 .start = PXA_CS0_PHYS, 395 .start = PXA_CS0_PHYS,
395 .end = PXA_CS0_PHYS + SZ_64M - 1, 396 .end = PXA_CS0_PHYS + SZ_8K - 1,
396 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
397}; 398};
398 399
399static struct physmap_flash_data strataflash_data = { 400static struct platform_device docg3 = {
400 .width = 2, 401 .name = "docg3",
401 /* .set_vpp = mioa701_set_vpp, */
402};
403
404static struct platform_device strataflash = {
405 .name = "physmap-flash",
406 .id = -1, 402 .id = -1,
407 .resource = &strataflash_resource, 403 .resource = &docg3_resource,
408 .num_resources = 1, 404 .num_resources = 1,
409 .dev = { 405 .dev = {
410 .platform_data = &strataflash_data, 406 .platform_data = NULL,
411 }, 407 },
412}; 408};
413 409
@@ -685,7 +681,7 @@ static struct platform_device *devices[] __initdata = {
685 &pxa2xx_pcm, 681 &pxa2xx_pcm,
686 &mioa701_sound, 682 &mioa701_sound,
687 &power_dev, 683 &power_dev,
688 &strataflash, 684 &docg3,
689 &gpio_vbus, 685 &gpio_vbus,
690 &mioa701_camera, 686 &mioa701_camera,
691 &mioa701_board, 687 &mioa701_board,
@@ -720,6 +716,15 @@ static void __init mioa701_machine_init(void)
720 RTTR = 32768 - 1; /* Reset crazy WinCE value */ 716 RTTR = 32768 - 1; /* Reset crazy WinCE value */
721 UP2OCR = UP2OCR_HXOE; 717 UP2OCR = UP2OCR_HXOE;
722 718
719 /*
720 * Set up the flash memory : DiskOnChip G3 on first static memory bank
721 */
722 __raw_writel(0x7ff02dd8, MSC0);
723 __raw_writel(0x0001c391, MCMEM0);
724 __raw_writel(0x0001c391, MCATT0);
725 __raw_writel(0x0001c391, MCIO0);
726
727
723 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); 728 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
724 pxa_set_ffuart_info(NULL); 729 pxa_set_ffuart_info(NULL);
725 pxa_set_btuart_info(NULL); 730 pxa_set_btuart_info(NULL);
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 437322ffd88d..adbbb85bc4cd 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -169,6 +169,24 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
169 .lcdcon5 = (S3C2410_LCDCON5_FRM565 | 169 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
170 S3C2410_LCDCON5_HWSWP), 170 S3C2410_LCDCON5_HWSWP),
171 }, 171 },
172 /* mini2440 + 3.5" TFT (LCD-W35i, LQ035Q1DG06 type) + touchscreen*/
173 [3] = {
174 _LCD_DECLARE(
175 /* clock */
176 7,
177 /* xres, margin_right, margin_left, hsync */
178 320, 68, 66, 4,
179 /* yres, margin_top, margin_bottom, vsync */
180 240, 4, 4, 9,
181 /* refresh rate */
182 60),
183 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
184 S3C2410_LCDCON5_INVVDEN |
185 S3C2410_LCDCON5_INVVFRAME |
186 S3C2410_LCDCON5_INVVLINE |
187 S3C2410_LCDCON5_INVVCLK |
188 S3C2410_LCDCON5_HWSWP),
189 },
172}; 190};
173 191
174/* todo - put into gpio header */ 192/* todo - put into gpio header */
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index e42e26d7fd38..dd20c66cd700 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -194,7 +194,7 @@ config SMDK6410_WM1190_EV1
194 depends on MACH_SMDK6410 194 depends on MACH_SMDK6410
195 select REGULATOR 195 select REGULATOR
196 select REGULATOR_WM8350 196 select REGULATOR_WM8350
197 select S3C24XX_GPIO_EXTRA64 197 select SAMSUNG_GPIO_EXTRA64
198 select MFD_WM8350_I2C 198 select MFD_WM8350_I2C
199 select MFD_WM8350_CONFIG_MODE_0 199 select MFD_WM8350_CONFIG_MODE_0
200 select MFD_WM8350_CONFIG_MODE_3 200 select MFD_WM8350_CONFIG_MODE_3
@@ -212,7 +212,7 @@ config SMDK6410_WM1192_EV1
212 depends on MACH_SMDK6410 212 depends on MACH_SMDK6410
213 select REGULATOR 213 select REGULATOR
214 select REGULATOR_WM831X 214 select REGULATOR_WM831X
215 select S3C24XX_GPIO_EXTRA64 215 select SAMSUNG_GPIO_EXTRA64
216 select MFD_WM831X 216 select MFD_WM831X
217 select MFD_WM831X_I2C 217 select MFD_WM831X_I2C
218 help 218 help
@@ -294,7 +294,7 @@ config MACH_WLF_CRAGG_6410
294 select S3C_DEV_WDT 294 select S3C_DEV_WDT
295 select S3C_DEV_RTC 295 select S3C_DEV_RTC
296 select S3C64XX_DEV_SPI0 296 select S3C64XX_DEV_SPI0
297 select S3C24XX_GPIO_EXTRA128 297 select SAMSUNG_GPIO_EXTRA128
298 select I2C 298 select I2C
299 help 299 help
300 Machine support for the Wolfson Cragganmore S3C6410 variant. 300 Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
index be9074e17dfd..5d55ab018b6b 100644
--- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
@@ -15,9 +15,11 @@
15 15
16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START 16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) 17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
18#define CODEC_IRQ_BASE (IRQ_BOARD_START + 128)
18 19
19#define PCA935X_GPIO_BASE GPIO_BOARD_START 20#define PCA935X_GPIO_BASE GPIO_BOARD_START
20#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) 21#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
21#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16) 22#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32)
23#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64)
22 24
23#endif 25#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index 6e34c2f6e670..8b540c42d5dd 100644
--- a/arch/arm/mach-s3c64xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -88,6 +88,6 @@ enum s3c_gpio_number {
88/* define the number of gpios we need to the one after the GPQ() range */ 88/* define the number of gpios we need to the one after the GPQ() range */
89#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) 89#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
90 90
91#define BOARD_NR_GPIOS 16 91#define BOARD_NR_GPIOS (16 + CONFIG_SAMSUNG_GPIO_EXTRA)
92 92
93#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS) 93#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 443f85b3c203..96d60e0d9372 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -169,7 +169,7 @@
169#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) 169#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
170 170
171#ifdef CONFIG_MACH_WLF_CRAGG_6410 171#ifdef CONFIG_MACH_WLF_CRAGG_6410
172#define IRQ_BOARD_NR 128 172#define IRQ_BOARD_NR 160
173#elif defined(CONFIG_SMDK6410_WM1190_EV1) 173#elif defined(CONFIG_SMDK6410_WM1190_EV1)
174#define IRQ_BOARD_NR 64 174#define IRQ_BOARD_NR 64
175#elif defined(CONFIG_SMDK6410_WM1192_EV1) 175#elif defined(CONFIG_SMDK6410_WM1192_EV1)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index f208154b1382..cd3c97e2ee75 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -14,13 +14,43 @@
14 14
15#include <linux/mfd/wm831x/irq.h> 15#include <linux/mfd/wm831x/irq.h>
16#include <linux/mfd/wm831x/gpio.h> 16#include <linux/mfd/wm831x/gpio.h>
17#include <linux/mfd/wm8994/pdata.h>
17 18
19#include <sound/wm5100.h>
18#include <sound/wm8996.h> 20#include <sound/wm8996.h>
19#include <sound/wm8962.h> 21#include <sound/wm8962.h>
20#include <sound/wm9081.h> 22#include <sound/wm9081.h>
21 23
22#include <mach/crag6410.h> 24#include <mach/crag6410.h>
23 25
26static struct wm5100_pdata wm5100_pdata = {
27 .ldo_ena = S3C64XX_GPN(7),
28 .irq_flags = IRQF_TRIGGER_HIGH,
29 .gpio_base = CODEC_GPIO_BASE,
30
31 .in_mode = {
32 WM5100_IN_DIFF,
33 WM5100_IN_DIFF,
34 WM5100_IN_DIFF,
35 WM5100_IN_SE,
36 },
37
38 .hp_pol = CODEC_GPIO_BASE + 3,
39 .jack_modes = {
40 { WM5100_MICDET_MICBIAS3, 0, 0 },
41 { WM5100_MICDET_MICBIAS2, 1, 1 },
42 },
43
44 .gpio_defaults = {
45 0,
46 0,
47 0,
48 0,
49 0x2, /* IRQ: CMOS output */
50 0x3, /* CLKOUT: CMOS output */
51 },
52};
53
24static struct wm8996_retune_mobile_config wm8996_retune[] = { 54static struct wm8996_retune_mobile_config wm8996_retune[] = {
25 { 55 {
26 .name = "Sub LPF", 56 .name = "Sub LPF",
@@ -72,7 +102,6 @@ static struct wm8962_pdata wm8962_pdata __initdata = {
72 0x8000 | WM8962_GPIO_FN_DMICDAT, 102 0x8000 | WM8962_GPIO_FN_DMICDAT,
73 WM8962_GPIO_FN_IRQ, /* Open drain mode */ 103 WM8962_GPIO_FN_IRQ, /* Open drain mode */
74 }, 104 },
75 .irq_active_low = true,
76}; 105};
77 106
78static struct wm9081_pdata wm9081_pdata __initdata = { 107static struct wm9081_pdata wm9081_pdata __initdata = {
@@ -91,6 +120,7 @@ static const struct i2c_board_info wm1254_devs[] = {
91 120
92static const struct i2c_board_info wm1255_devs[] = { 121static const struct i2c_board_info wm1255_devs[] = {
93 { I2C_BOARD_INFO("wm5100", 0x1a), 122 { I2C_BOARD_INFO("wm5100", 0x1a),
123 .platform_data = &wm5100_pdata,
94 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, 124 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
95 }, 125 },
96 { I2C_BOARD_INFO("wm9081", 0x6c), 126 { I2C_BOARD_INFO("wm9081", 0x6c),
@@ -104,6 +134,24 @@ static const struct i2c_board_info wm1259_devs[] = {
104 }, 134 },
105}; 135};
106 136
137static struct wm8994_pdata wm8994_pdata = {
138 .gpio_base = CODEC_GPIO_BASE,
139 .gpio_defaults = {
140 0x3, /* IRQ out, active high, CMOS */
141 },
142 .irq_base = CODEC_IRQ_BASE,
143 .ldo = {
144 { .supply = "WALLVDD" },
145 { .supply = "WALLVDD" },
146 },
147};
148
149static const struct i2c_board_info wm1277_devs[] = {
150 { I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
151 .platform_data = &wm8994_pdata,
152 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
153 },
154};
107 155
108static __devinitdata const struct { 156static __devinitdata const struct {
109 u8 id; 157 u8 id;
@@ -125,6 +173,8 @@ static __devinitdata const struct {
125 { .id = 0x3b, .name = "1255-EV1 Kilchoman", 173 { .id = 0x3b, .name = "1255-EV1 Kilchoman",
126 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) }, 174 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
127 { .id = 0x3c, .name = "1273-EV1 Longmorn" }, 175 { .id = 0x3c, .name = "1273-EV1 Longmorn" },
176 { .id = 0x3d, .name = "1277-EV1 Littlemill",
177 .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
128}; 178};
129 179
130static __devinit int wlf_gf_module_probe(struct i2c_client *i2c, 180static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
@@ -154,8 +204,8 @@ static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
154 "Failed to register dev: %d\n", ret); 204 "Failed to register dev: %d\n", ret);
155 } 205 }
156 } else { 206 } else {
157 dev_warn(&i2c->dev, "Unknown module ID %d revision %d\n", 207 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
158 id, rev); 208 id, rev + 1);
159 } 209 }
160 210
161 return 0; 211 return 0;
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index fb786b6a2eae..680fd758ff2d 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,8 @@
37#include <linux/mfd/wm831x/irq.h> 37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h> 38#include <linux/mfd/wm831x/gpio.h>
39 39
40#include <sound/wm1250-ev1.h>
41
40#include <asm/hardware/vic.h> 42#include <asm/hardware/vic.h>
41#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
42#include <asm/mach-types.h> 44#include <asm/mach-types.h>
@@ -289,6 +291,11 @@ static struct platform_device speyside_wm8962_device = {
289 .id = -1, 291 .id = -1,
290}; 292};
291 293
294static struct platform_device littlemill_device = {
295 .name = "littlemill",
296 .id = -1,
297};
298
292static struct regulator_consumer_supply wallvdd_consumers[] = { 299static struct regulator_consumer_supply wallvdd_consumers[] = {
293 REGULATOR_SUPPLY("SPKVDD1", "1-001a"), 300 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
294 REGULATOR_SUPPLY("SPKVDD2", "1-001a"), 301 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
@@ -341,6 +348,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
341 &crag6410_backlight_device, 348 &crag6410_backlight_device,
342 &speyside_device, 349 &speyside_device,
343 &speyside_wm8962_device, 350 &speyside_wm8962_device,
351 &littlemill_device,
344 &lowland_device, 352 &lowland_device,
345 &wallvdd_device, 353 &wallvdd_device,
346}; 354};
@@ -374,6 +382,10 @@ static struct regulator_init_data vddarm __initdata = {
374 .driver_data = &vddarm_pdata, 382 .driver_data = &vddarm_pdata,
375}; 383};
376 384
385static struct regulator_consumer_supply vddint_consumers[] __initdata = {
386 REGULATOR_SUPPLY("vddint", NULL),
387};
388
377static struct regulator_init_data vddint __initdata = { 389static struct regulator_init_data vddint __initdata = {
378 .constraints = { 390 .constraints = {
379 .name = "VDDINT", 391 .name = "VDDINT",
@@ -382,6 +394,9 @@ static struct regulator_init_data vddint __initdata = {
382 .always_on = 1, 394 .always_on = 1,
383 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 395 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
384 }, 396 },
397 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
398 .consumer_supplies = vddint_consumers,
399 .supply_regulator = "WALLVDD",
385}; 400};
386 401
387static struct regulator_init_data vddmem __initdata = { 402static struct regulator_init_data vddmem __initdata = {
@@ -502,7 +517,8 @@ static struct wm831x_touch_pdata touch_pdata __initdata = {
502static struct wm831x_pdata crag_pmic_pdata __initdata = { 517static struct wm831x_pdata crag_pmic_pdata __initdata = {
503 .wm831x_num = 1, 518 .wm831x_num = 1,
504 .irq_base = BANFF_PMIC_IRQ_BASE, 519 .irq_base = BANFF_PMIC_IRQ_BASE,
505 .gpio_base = GPIO_BOARD_START + 8, 520 .gpio_base = BANFF_PMIC_GPIO_BASE,
521 .soft_shutdown = true,
506 522
507 .backup = &banff_backup_pdata, 523 .backup = &banff_backup_pdata,
508 524
@@ -607,6 +623,7 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
607 .wm831x_num = 2, 623 .wm831x_num = 2,
608 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, 624 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
609 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, 625 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
626 .soft_shutdown = true,
610 627
611 .gpio_defaults = { 628 .gpio_defaults = {
612 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ 629 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
@@ -624,6 +641,16 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
624 .disable_touch = true, 641 .disable_touch = true,
625}; 642};
626 643
644static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
645 .gpios = {
646 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
647 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
648 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
649 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
650 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
651 },
652};
653
627static struct i2c_board_info i2c_devs1[] __initdata = { 654static struct i2c_board_info i2c_devs1[] __initdata = {
628 { I2C_BOARD_INFO("wm8311", 0x34), 655 { I2C_BOARD_INFO("wm8311", 0x34),
629 .irq = S3C_EINT(0), 656 .irq = S3C_EINT(0),
@@ -633,7 +660,13 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
633 { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, 660 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
634 { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, 661 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
635 662
636 { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, 663 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
664 .platform_data = &wm1250_ev1_pdata },
665};
666
667static struct s3c2410_platform_i2c i2c1_pdata = {
668 .frequency = 400000,
669 .bus_num = 1,
637}; 670};
638 671
639static void __init crag6410_map_io(void) 672static void __init crag6410_map_io(void)
@@ -694,7 +727,7 @@ static void __init crag6410_machine_init(void)
694 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); 727 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
695 728
696 s3c_i2c0_set_platdata(&i2c0_pdata); 729 s3c_i2c0_set_platdata(&i2c0_pdata);
697 s3c_i2c1_set_platdata(NULL); 730 s3c_i2c1_set_platdata(&i2c1_pdata);
698 s3c_fb_set_platdata(&crag6410_lcd_pdata); 731 s3c_fb_set_platdata(&crag6410_lcd_pdata);
699 732
700 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 733 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 7d3e81b9dd06..055dac90e0e2 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -346,10 +346,23 @@ int __init s3c64xx_pm_init(void)
346 346
347static __init int s3c64xx_pm_initcall(void) 347static __init int s3c64xx_pm_initcall(void)
348{ 348{
349 u32 val;
350
349 pm_cpu_prep = s3c64xx_pm_prepare; 351 pm_cpu_prep = s3c64xx_pm_prepare;
350 pm_cpu_sleep = s3c64xx_cpu_suspend; 352 pm_cpu_sleep = s3c64xx_cpu_suspend;
351 pm_uart_udivslot = 1; 353 pm_uart_udivslot = 1;
352 354
355 /*
356 * Unconditionally disable power domains that contain only
357 * blocks which have no mainline driver support.
358 */
359 val = __raw_readl(S3C64XX_NORMAL_CFG);
360 val &= ~(S3C64XX_NORMALCFG_DOMAIN_G_ON |
361 S3C64XX_NORMALCFG_DOMAIN_V_ON |
362 S3C64XX_NORMALCFG_DOMAIN_I_ON |
363 S3C64XX_NORMALCFG_DOMAIN_P_ON);
364 __raw_writel(val, S3C64XX_NORMAL_CFG);
365
353#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 366#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
354 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0"); 367 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
355 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1"); 368 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index d9bf7c19660e..e120ff54f663 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,3 +1,4 @@
1obj-y += board-pinmux.o
1obj-y += common.o 2obj-y += common.o
2obj-y += devices.o 3obj-y += devices.o
3obj-y += io.o 4obj-y += io.o
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 47e1fa322f15..7a95e0bc4aba 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -54,6 +54,8 @@ void trimslice_pinmux_init(void);
54void ventana_pinmux_init(void); 54void ventana_pinmux_init(void);
55 55
56struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { 56struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
57 OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
57 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), 59 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), 60 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), 61 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
@@ -110,13 +112,6 @@ static void __init tegra_dt_init(void)
110 112
111 tegra_clk_init_from_table(tegra_dt_clk_init_table); 113 tegra_clk_init_from_table(tegra_dt_clk_init_table);
112 114
113 /*
114 * Finished with the static registrations now; fill in the missing
115 * devices
116 */
117 of_platform_populate(NULL, tegra_dt_match_table,
118 tegra20_auxdata_lookup, NULL);
119
120 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 115 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
121 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 116 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
122 pinmux_configs[i].init(); 117 pinmux_configs[i].init();
@@ -126,6 +121,13 @@ static void __init tegra_dt_init(void)
126 121
127 WARN(i == ARRAY_SIZE(pinmux_configs), 122 WARN(i == ARRAY_SIZE(pinmux_configs),
128 "Unknown platform! Pinmuxing not initialized\n"); 123 "Unknown platform! Pinmuxing not initialized\n");
124
125 /*
126 * Finished with the static registrations now; fill in the missing
127 * devices
128 */
129 of_platform_populate(NULL, tegra_dt_match_table,
130 tegra20_auxdata_lookup, NULL);
129} 131}
130 132
131static const char *tegra20_dt_board_compat[] = { 133static const char *tegra20_dt_board_compat[] = {
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index bd402d0d5d06..33c4fedab840 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -22,8 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/pinmux.h>
26#include <mach/pinmux-tegra20.h>
27#include "board.h" 25#include "board.h"
28#include "board-harmony.h" 26#include "board-harmony.h"
29 27
@@ -49,10 +47,6 @@ static int __init harmony_pcie_init(void)
49 47
50 regulator_enable(regulator); 48 regulator_enable(regulator);
51 49
52 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
53 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
54 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
55
56 err = tegra_pcie_init(true, true); 50 err = tegra_pcie_init(true, true);
57 if (err) 51 if (err)
58 goto err_pcie; 52 goto err_pcie;
@@ -60,10 +54,6 @@ static int __init harmony_pcie_init(void)
60 return 0; 54 return 0;
61 55
62err_pcie: 56err_pcie:
63 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_TRISTATE);
64 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
65 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
66
67 regulator_disable(regulator); 57 regulator_disable(regulator);
68 regulator_put(regulator); 58 regulator_put(regulator);
69err_reg: 59err_reg:
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index b8a2485e3cb9..465808c8ac0b 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -23,7 +23,7 @@
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-harmony.h" 25#include "board-harmony.h"
26#include "devices.h" 26#include "board-pinmux.h"
27 27
28static struct tegra_pingroup_config harmony_pinmux[] = { 28static struct tegra_pingroup_config harmony_pinmux[] = {
29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -144,11 +144,6 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145}; 145};
146 146
147static struct platform_device *pinmux_devices[] = {
148 &tegra_gpio_device,
149 &tegra_pinmux_device,
150};
151
152static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
153 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
154 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 149 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
@@ -162,13 +157,14 @@ static struct tegra_gpio_table gpio_table[] = {
162 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true }, 157 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
163}; 158};
164 159
160static struct tegra_board_pinmux_conf conf = {
161 .pgs = harmony_pinmux,
162 .pg_count = ARRAY_SIZE(harmony_pinmux),
163 .gpios = gpio_table,
164 .gpio_count = ARRAY_SIZE(gpio_table),
165};
166
165void harmony_pinmux_init(void) 167void harmony_pinmux_init(void)
166{ 168{
167 if (!of_machine_is_compatible("nvidia,tegra20")) 169 tegra_board_pinmux_init(&conf, NULL);
168 platform_add_devices(pinmux_devices,
169 ARRAY_SIZE(pinmux_devices));
170
171 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
172
173 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
174} 170}
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index bc1fe58c26fb..c775572dcea4 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -23,7 +23,7 @@
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-paz00.h" 25#include "board-paz00.h"
26#include "devices.h" 26#include "board-pinmux.h"
27 27
28static struct tegra_pingroup_config paz00_pinmux[] = { 28static struct tegra_pingroup_config paz00_pinmux[] = {
29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -31,7 +31,7 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
32 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 32 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
33 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 33 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
34 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 34 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 35 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
36 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
@@ -144,11 +144,6 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145}; 145};
146 146
147static struct platform_device *pinmux_devices[] = {
148 &tegra_gpio_device,
149 &tegra_pinmux_device,
150};
151
152static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
153 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
154 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, 149 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
@@ -159,13 +154,14 @@ static struct tegra_gpio_table gpio_table[] = {
159 { .gpio = TEGRA_WIFI_LED, .enable = true }, 154 { .gpio = TEGRA_WIFI_LED, .enable = true },
160}; 155};
161 156
157static struct tegra_board_pinmux_conf conf = {
158 .pgs = paz00_pinmux,
159 .pg_count = ARRAY_SIZE(paz00_pinmux),
160 .gpios = gpio_table,
161 .gpio_count = ARRAY_SIZE(gpio_table),
162};
163
162void paz00_pinmux_init(void) 164void paz00_pinmux_init(void)
163{ 165{
164 if (!of_machine_is_compatible("nvidia,tegra20")) 166 tegra_board_pinmux_init(&conf, NULL);
165 platform_add_devices(pinmux_devices,
166 ARRAY_SIZE(pinmux_devices));
167
168 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
169
170 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
171} 167}
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 891b1c491bfb..fcf4f377b1dc 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -23,8 +23,10 @@
23#include <linux/serial_8250.h> 23#include <linux/serial_8250.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/gpio_keys.h>
26#include <linux/pda_power.h> 27#include <linux/pda_power.h>
27#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/input.h>
28#include <linux/i2c.h> 30#include <linux/i2c.h>
29#include <linux/gpio.h> 31#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 32#include <linux/rfkill-gpio.h>
@@ -115,12 +117,37 @@ static struct platform_device leds_gpio = {
115 }, 117 },
116}; 118};
117 119
120static struct gpio_keys_button paz00_gpio_keys_buttons[] = {
121 {
122 .code = KEY_POWER,
123 .gpio = TEGRA_GPIO_POWERKEY,
124 .active_low = 1,
125 .desc = "Power",
126 .type = EV_KEY,
127 .wakeup = 1,
128 },
129};
130
131static struct gpio_keys_platform_data paz00_gpio_keys = {
132 .buttons = paz00_gpio_keys_buttons,
133 .nbuttons = ARRAY_SIZE(paz00_gpio_keys_buttons),
134};
135
136static struct platform_device gpio_keys_device = {
137 .name = "gpio-keys",
138 .id = -1,
139 .dev = {
140 .platform_data = &paz00_gpio_keys,
141 },
142};
143
118static struct platform_device *paz00_devices[] __initdata = { 144static struct platform_device *paz00_devices[] __initdata = {
119 &debug_uart, 145 &debug_uart,
120 &tegra_sdhci_device4, 146 &tegra_sdhci_device4,
121 &tegra_sdhci_device1, 147 &tegra_sdhci_device1,
122 &wifi_rfkill_device, 148 &wifi_rfkill_device,
123 &leds_gpio, 149 &leds_gpio,
150 &gpio_keys_device,
124}; 151};
125 152
126static void paz00_i2c_init(void) 153static void paz00_i2c_init(void)
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index 8aff06eb58c3..ffa83f580db6 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -32,6 +32,9 @@
32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1 32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1
33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0 33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0
34 34
35/* WakeUp */
36#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PJ7
37
35void paz00_pinmux_init(void); 38void paz00_pinmux_init(void);
36 39
37#endif 40#endif
diff --git a/arch/arm/mach-tegra/board-pinmux.c b/arch/arm/mach-tegra/board-pinmux.c
new file mode 100644
index 000000000000..adc3efe979b3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.c
@@ -0,0 +1,104 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/notifier.h>
18#include <linux/of.h>
19#include <linux/string.h>
20
21#include <mach/gpio-tegra.h>
22#include <mach/pinmux.h>
23
24#include "board-pinmux.h"
25#include "devices.h"
26
27struct tegra_board_pinmux_conf *confs[2];
28
29static void tegra_board_pinmux_setup_gpios(void)
30{
31 int i;
32
33 for (i = 0; i < ARRAY_SIZE(confs); i++) {
34 if (!confs[i])
35 continue;
36
37 tegra_gpio_config(confs[i]->gpios, confs[i]->gpio_count);
38 }
39}
40
41static void tegra_board_pinmux_setup_pinmux(void)
42{
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(confs); i++) {
46 if (!confs[i])
47 continue;
48
49 tegra_pinmux_config_table(confs[i]->pgs, confs[i]->pg_count);
50
51 if (confs[i]->drives)
52 tegra_drive_pinmux_config_table(confs[i]->drives,
53 confs[i]->drive_count);
54 }
55}
56
57static int tegra_board_pinmux_bus_notify(struct notifier_block *nb,
58 unsigned long event, void *vdev)
59{
60 static bool had_gpio;
61 static bool had_pinmux;
62
63 struct device *dev = vdev;
64 const char *devname;
65
66 if (event != BUS_NOTIFY_BOUND_DRIVER)
67 return NOTIFY_DONE;
68
69 devname = dev_name(dev);
70
71 if (!had_gpio && !strcmp(devname, GPIO_DEV)) {
72 tegra_board_pinmux_setup_gpios();
73 had_gpio = true;
74 } else if (!had_pinmux && !strcmp(devname, PINMUX_DEV)) {
75 tegra_board_pinmux_setup_pinmux();
76 had_pinmux = true;
77 }
78
79 if (had_gpio && had_pinmux)
80 return NOTIFY_STOP_MASK;
81 else
82 return NOTIFY_DONE;
83}
84
85static struct notifier_block nb = {
86 .notifier_call = tegra_board_pinmux_bus_notify,
87};
88
89static struct platform_device *devices[] = {
90 &tegra_gpio_device,
91 &tegra_pinmux_device,
92};
93
94void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
95 struct tegra_board_pinmux_conf *conf_b)
96{
97 confs[0] = conf_a;
98 confs[1] = conf_b;
99
100 bus_register_notifier(&platform_bus_type, &nb);
101
102 if (!of_machine_is_compatible("nvidia,tegra20"))
103 platform_add_devices(devices, ARRAY_SIZE(devices));
104}
diff --git a/arch/arm/mach-tegra/board-pinmux.h b/arch/arm/mach-tegra/board-pinmux.h
new file mode 100644
index 000000000000..4aac73546f54
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#ifndef __MACH_TEGRA_BOARD_PINMUX_H
16#define __MACH_TEGRA_BOARD_PINMUX_H
17
18#define GPIO_DEV "tegra-gpio"
19#define PINMUX_DEV "tegra-pinmux"
20
21struct tegra_pingroup_config;
22struct tegra_gpio_table;
23
24struct tegra_board_pinmux_conf {
25 struct tegra_pingroup_config *pgs;
26 int pg_count;
27
28 struct tegra_drive_pingroup_config *drives;
29 int drive_count;
30
31 struct tegra_gpio_table *gpios;
32 int gpio_count;
33};
34
35void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
36 struct tegra_board_pinmux_conf *conf_b);
37
38#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index f6b9c01ef0db..55e7e43a14ad 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -22,8 +22,8 @@
22#include <mach/pinmux-tegra20.h> 22#include <mach/pinmux-tegra20.h>
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
25#include "board-seaboard.h" 26#include "board-seaboard.h"
26#include "devices.h"
27 27
28#define DEFAULT_DRIVE(_name) \ 28#define DEFAULT_DRIVE(_name) \
29 { \ 29 { \
@@ -37,11 +37,11 @@
37 .slew_falling = TEGRA_SLEW_SLOWEST, \ 37 .slew_falling = TEGRA_SLEW_SLOWEST, \
38 } 38 }
39 39
40static __initdata struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = { 40static struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
41 DEFAULT_DRIVE(SDIO1), 41 DEFAULT_DRIVE(SDIO1),
42}; 42};
43 43
44static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { 44static struct tegra_pingroup_config common_pinmux[] = {
45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -55,7 +55,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
59 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 58 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 59 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
61 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 60 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
@@ -65,7 +64,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
65 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 64 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 65 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
67 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 66 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 67 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
70 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 68 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
71 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 69 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -108,13 +106,8 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
108 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
109 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 108 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
114 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 111 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
119 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 113 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -122,25 +115,19 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
122 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 115 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
123 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 117 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
125 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 118 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 119 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 120 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
129 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 121 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
130 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 122 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
131 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 123 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
132 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
133 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 124 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 125 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 126 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
138 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 127 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
139 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
140 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 128 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
141 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 129 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
142 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 130 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
143 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
144 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 131 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
145 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 132 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
146 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 133 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -160,13 +147,24 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
160 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 147 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161}; 148};
162 149
163static __initdata struct tegra_pingroup_config ventana_pinmux[] = { 150static struct tegra_pingroup_config seaboard_pinmux[] = {
164 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 151 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
152 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
153 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
154 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
155 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
156 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
157 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
158 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
159 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
160 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
162 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
163 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
164};
165
166static struct tegra_pingroup_config ventana_pinmux[] = {
165 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 167 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
166 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
167 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
168 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
169 {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
170 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 168 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
171 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 169 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
172 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 170 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -181,65 +179,59 @@ static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
181 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 179 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
182}; 180};
183 181
184static struct platform_device *pinmux_devices[] = {
185 &tegra_gpio_device,
186 &tegra_pinmux_device,
187};
188
189static struct tegra_gpio_table common_gpio_table[] = { 182static struct tegra_gpio_table common_gpio_table[] = {
190 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 183 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
191 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 184 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 185 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
186 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
187};
188
189static struct tegra_gpio_table seaboard_gpio_table[] = {
193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 190 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 191 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true }, 192 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 193 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
198 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 194 { .gpio = TEGRA_GPIO_USB1, .enable = true },
199}; 195};
200 196
201static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) 197static struct tegra_gpio_table ventana_gpio_table[] = {
202{ 198 /* hp_det */
203 int i, j; 199 { .gpio = TEGRA_GPIO_PW2, .enable = true },
204 struct tegra_pingroup_config *new_pingroup, *base_pingroup; 200 /* int_mic_en */
205 201 { .gpio = TEGRA_GPIO_PX0, .enable = true },
206 /* Update base seaboard pinmux table with secondary board 202 /* ext_mic_en */
207 * specific pinmux table table. 203 { .gpio = TEGRA_GPIO_PX1, .enable = true },
208 */ 204};
209 for (i = 0; i < size; i++) {
210 new_pingroup = &newtbl[i];
211 for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) {
212 base_pingroup = &seaboard_pinmux[j];
213 if (new_pingroup->pingroup == base_pingroup->pingroup) {
214 *base_pingroup = *new_pingroup;
215 break;
216 }
217 }
218 }
219}
220
221void __init seaboard_common_pinmux_init(void)
222{
223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
226 205
227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 206static struct tegra_board_pinmux_conf common_conf = {
207 .pgs = common_pinmux,
208 .pg_count = ARRAY_SIZE(common_pinmux),
209 .gpios = common_gpio_table,
210 .gpio_count = ARRAY_SIZE(common_gpio_table),
211};
228 212
229 tegra_drive_pinmux_config_table(seaboard_drive_pinmux, 213static struct tegra_board_pinmux_conf seaboard_conf = {
230 ARRAY_SIZE(seaboard_drive_pinmux)); 214 .pgs = seaboard_pinmux,
215 .pg_count = ARRAY_SIZE(seaboard_pinmux),
216 .drives = seaboard_drive_pinmux,
217 .drive_count = ARRAY_SIZE(seaboard_drive_pinmux),
218 .gpios = seaboard_gpio_table,
219 .gpio_count = ARRAY_SIZE(seaboard_gpio_table),
220};
231 221
232 tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table)); 222static struct tegra_board_pinmux_conf ventana_conf = {
233} 223 .pgs = ventana_pinmux,
224 .pg_count = ARRAY_SIZE(ventana_pinmux),
225 .gpios = ventana_gpio_table,
226 .gpio_count = ARRAY_SIZE(ventana_gpio_table),
227};
234 228
235void __init seaboard_pinmux_init(void) 229void seaboard_pinmux_init(void)
236{ 230{
237 seaboard_common_pinmux_init(); 231 tegra_board_pinmux_init(&common_conf, &seaboard_conf);
238} 232}
239 233
240void __init ventana_pinmux_init(void) 234void ventana_pinmux_init(void)
241{ 235{
242 update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); 236 tegra_board_pinmux_init(&common_conf, &ventana_conf);
243 seaboard_common_pinmux_init();
244} 237}
245
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 7331e15b73cc..a21a2be57cb6 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -22,10 +22,10 @@
22#include <mach/pinmux-tegra20.h> 22#include <mach/pinmux-tegra20.h>
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
25#include "board-trimslice.h" 26#include "board-trimslice.h"
26#include "devices.h"
27 27
28static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { 28static struct tegra_pingroup_config trimslice_pinmux[] = {
29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
30 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 30 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -106,7 +106,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
106 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
107 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
108 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 108 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
109 {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_PTA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 111 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -144,11 +144,6 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145}; 145};
146 146
147static struct platform_device *pinmux_devices[] = {
148 &tegra_gpio_device,
149 &tegra_pinmux_device,
150};
151
152static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
153 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ 148 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
154 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ 149 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
@@ -157,11 +152,14 @@ static struct tegra_gpio_table gpio_table[] = {
157 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */ 152 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
158}; 153};
159 154
160void __init trimslice_pinmux_init(void) 155static struct tegra_board_pinmux_conf conf = {
156 .pgs = trimslice_pinmux,
157 .pg_count = ARRAY_SIZE(trimslice_pinmux),
158 .gpios = gpio_table,
159 .gpio_count = ARRAY_SIZE(gpio_table),
160};
161
162void trimslice_pinmux_init(void)
161{ 163{
162 if (!of_machine_is_compatible("nvidia,tegra20")) 164 tegra_board_pinmux_init(&conf, NULL);
163 platform_add_devices(pinmux_devices,
164 ARRAY_SIZE(pinmux_devices));
165 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
166 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
167} 165}
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 97ef3e55dfdf..ec63c6b2b6b5 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -37,7 +37,6 @@
37#include <asm/sizes.h> 37#include <asm/sizes.h>
38#include <asm/mach/pci.h> 38#include <asm/mach/pci.h>
39 39
40#include <mach/pinmux.h>
41#include <mach/iomap.h> 40#include <mach/iomap.h>
42#include <mach/clk.h> 41#include <mach/clk.h>
43#include <mach/powergate.h> 42#include <mach/powergate.h>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index bf64e1e594ed..f0726d48df22 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -265,16 +265,20 @@
265#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL) 265#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL)
266#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL) 266#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL)
267#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL) 267#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL)
268#define MX25_PAD_CSI_D2__CSPI3_MOSI IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL)
268 269
269#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL) 270#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL)
270#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL) 271#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL)
272#define MX25_PAD_CSI_D3__CSPI3_MISO IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL)
271 273
272#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL) 274#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL)
273#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL) 275#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL)
274#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL) 276#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL)
277#define MX25_PAD_CSI_D4__CSPI3_SCLK IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL)
275 278
276#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL) 279#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL)
277#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL) 280#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL)
281#define MX25_PAD_CSI_D5__CSPI3_RDY IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL)
278 282
279#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL) 283#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL)
280#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL) 284#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 7fbc361946b5..6ee90495ca4c 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -179,6 +179,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
179 /* TI8168 base boards using UART3 */ 179 /* TI8168 base boards using UART3 */
180 DEBUG_LL_TI81XX(3, ti8168evm); 180 DEBUG_LL_TI81XX(3, ti8168evm);
181 181
182 /* TI8148 base boards using UART1 */
183 DEBUG_LL_TI81XX(1, ti8148evm);
184
182 } while (0); 185 } while (0);
183} 186}
184 187
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c939775c..c616385f27bd 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -114,6 +114,7 @@ extern void am35x_musb_reset(void);
114extern void am35x_musb_phy_power(u8 on); 114extern void am35x_musb_phy_power(u8 on);
115extern void am35x_musb_clear_irq(void); 115extern void am35x_musb_clear_irq(void);
116extern void am35x_set_mode(u8 musb_mode); 116extern void am35x_set_mode(u8 musb_mode);
117extern void ti81xx_musb_phy_power(u8 on);
117 118
118/* 119/*
119 * FIXME correct answer depends on hmc_mode, 120 * FIXME correct answer depends on hmc_mode,
@@ -273,6 +274,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
273#define CONF2_OTGPWRDN (1 << 2) 274#define CONF2_OTGPWRDN (1 << 2)
274#define CONF2_DATPOL (1 << 1) 275#define CONF2_DATPOL (1 << 1)
275 276
277/* TI81XX specific definitions */
278#define USBCTRL0 0x620
279#define USBSTAT0 0x624
280
281/* TI816X PHY controls bits */
282#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
283#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
284
285/* TI814X PHY controls bits */
286#define USBPHY_CM_PWRDN (1 << 0)
287#define USBPHY_OTG_PWRDN (1 << 1)
288#define USBPHY_CHGDET_DIS (1 << 2)
289#define USBPHY_CHGDET_RSTRT (1 << 3)
290#define USBPHY_SRCONDM (1 << 4)
291#define USBPHY_SINKONDP (1 << 5)
292#define USBPHY_CHGISINK_EN (1 << 6)
293#define USBPHY_CHGVSRC_EN (1 << 7)
294#define USBPHY_DMPULLUP (1 << 8)
295#define USBPHY_DPPULLUP (1 << 9)
296#define USBPHY_CDET_EXTCTL (1 << 10)
297#define USBPHY_GPIO_MODE (1 << 12)
298#define USBPHY_DPOPBUFCTL (1 << 13)
299#define USBPHY_DMOPBUFCTL (1 << 14)
300#define USBPHY_DPINPUT (1 << 15)
301#define USBPHY_DMINPUT (1 << 16)
302#define USBPHY_DPGPIO_PD (1 << 17)
303#define USBPHY_DMGPIO_PD (1 << 18)
304#define USBPHY_OTGVDET_EN (1 << 19)
305#define USBPHY_OTGSESSEND_EN (1 << 20)
306#define USBPHY_DATA_POLARITY (1 << 23)
307
276#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) 308#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
277u32 omap1_usb0_init(unsigned nwires, unsigned is_device); 309u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
278u32 omap1_usb1_init(unsigned nwires); 310u32 omap1_usb1_init(unsigned nwires);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 160eea15a6ef..6a2abe67c8b2 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -88,12 +88,20 @@ config S5P_GPIO_DRVSTR
88 88
89config SAMSUNG_GPIO_EXTRA 89config SAMSUNG_GPIO_EXTRA
90 int "Number of additional GPIO pins" 90 int "Number of additional GPIO pins"
91 default 128 if SAMSUNG_GPIO_EXTRA128
92 default 64 if SAMSUNG_GPIO_EXTRA64
91 default 0 93 default 0
92 help 94 help
93 Use additional GPIO space in addition to the GPIO's the SOC 95 Use additional GPIO space in addition to the GPIO's the SOC
94 provides. This allows expanding the GPIO space for use with 96 provides. This allows expanding the GPIO space for use with
95 GPIO expanders. 97 GPIO expanders.
96 98
99config SAMSUNG_GPIO_EXTRA64
100 bool
101
102config SAMSUNG_GPIO_EXTRA128
103 bool
104
97config S3C_GPIO_SPACE 105config S3C_GPIO_SPACE
98 int "Space between gpio banks" 106 int "Space between gpio banks"
99 default 0 107 default 0
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-08 16:21:39 -0500