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authorArnd Bergmann <arnd@arndb.de>2013-04-30 11:52:16 -0400
committerArnd Bergmann <arnd@arndb.de>2013-05-03 16:36:32 -0400
commit6343b05f0a77c5d76d291d15c5cf2d9cf1b4e700 (patch)
treeb3cf2342b56555664b9a87674830ce9eedd0c0ef /arch/arm
parentcb48389bd6c6b827c2c0619063ce9f94fb8a370d (diff)
ARM: SPEAr: conditionalize l2x0 support
If the cache controller implementation is disabled at build time, we must not call any functions related to it. arch/arm/mach-spear/built-in.o: In function `spear13xx_l2x0_init': arch/arm/mach-spear/spear13xx.c:47: undefined reference to `l2x0_init' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Viresh Kumar <viresh.linux@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-spear13xx/spear13xx.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index 25a10191b021..0dacf571ea72 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -92,6 +92,8 @@ void __init spear13xx_l2x0_init(void)
92 * write alloc and 'Full line of zero' options 92 * write alloc and 'Full line of zero' options
93 * 93 *
94 */ 94 */
95 if (!IS_ENABLED(CONFIG_CACHE_L2X0))
96 return;
95 97
96 writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL); 98 writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL);
97 99