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authorCatalin Marinas <catalin.marinas@arm.com>2007-02-14 13:20:28 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-15 09:56:32 -0500
commit4b17244c133689ad0cbdca37ce3e15068f120428 (patch)
tree8b0a1e530a6fdb28c409b981c615f4598e81d81f /arch/arm
parent3edf22ab34e1fdffc8c0c7c7b7da4d0aebdba118 (diff)
[ARM] 4109/2: Add support for the RealView/EB MPCore revC platform
The kernel originally supported revB only. This patch enables revC by default and adds a config option for building the kernel for the revB platform. Since the SCU base address was hard-coded in the proc-v6.S file (and only valid for RealView/EB revB), this patch also adds a more generic support for defining the SCU information. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-realview/Kconfig10
-rw-r--r--arch/arm/mach-realview/realview_eb.c4
-rw-r--r--arch/arm/mm/proc-v6.S8
3 files changed, 17 insertions, 5 deletions
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 17f5f4439fe7..68bc6b226ec7 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -16,4 +16,14 @@ config REALVIEW_MPCORE
16 kernel built with this option enabled is not compatible with 16 kernel built with this option enabled is not compatible with
17 other tiles. 17 other tiles.
18 18
19config REALVIEW_MPCORE_REVB
20 bool "Support MPcore RevB tile"
21 depends on REALVIEW_MPCORE
22 default n
23 help
24 Enable support for the MPCore RevB tile on the Realview platform.
25 Since there are device address differences, a
26 kernel built with this option enabled is not compatible with
27 other tiles.
28
19endmenu 29endmenu
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 00139143dcc1..effe243454e0 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -152,9 +152,9 @@ static void __init gic_init_irq(void)
152#ifdef CONFIG_REALVIEW_MPCORE 152#ifdef CONFIG_REALVIEW_MPCORE
153 unsigned int pldctrl; 153 unsigned int pldctrl;
154 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); 154 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
155 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + 0xd8); 155 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
156 pldctrl |= 0x00800000; /* New irq mode */ 156 pldctrl |= 0x00800000; /* New irq mode */
157 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + 0xd8); 157 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
158 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); 158 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
159#endif 159#endif
160 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29); 160 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 7b1843befb9c..f27d9eb64803 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -14,10 +14,13 @@
14#include <asm/assembler.h> 14#include <asm/assembler.h>
15#include <asm/asm-offsets.h> 15#include <asm/asm-offsets.h>
16#include <asm/elf.h> 16#include <asm/elf.h>
17#include <asm/hardware/arm_scu.h>
18#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable-hwdef.h>
19#include <asm/pgtable.h> 18#include <asm/pgtable.h>
20 19
20#ifdef CONFIG_SMP
21#include <asm/hardware/arm_scu.h>
22#endif
23
21#include "proc-macros.S" 24#include "proc-macros.S"
22 25
23#define D_CACHE_LINE_SIZE 32 26#define D_CACHE_LINE_SIZE 32
@@ -183,8 +186,7 @@ __v6_setup:
183 /* Set up the SCU on core 0 only */ 186 /* Set up the SCU on core 0 only */
184 mrc p15, 0, r0, c0, c0, 5 @ CPU core number 187 mrc p15, 0, r0, c0, c0, 5 @ CPU core number
185 ands r0, r0, #15 188 ands r0, r0, #15
186 moveq r0, #0x10000000 @ SCU_BASE 189 ldreq r0, =SCU_BASE
187 orreq r0, r0, #0x00100000
188 ldreq r5, [r0, #SCU_CTRL] 190 ldreq r5, [r0, #SCU_CTRL]
189 orreq r5, r5, #1 191 orreq r5, r5, #1
190 streq r5, [r0, #SCU_CTRL] 192 streq r5, [r0, #SCU_CTRL]