diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-07-23 19:04:15 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-07-23 19:04:15 -0400 |
commit | 451ce7f9cf2d17e34d5d64b76cac047a2a1a3b89 (patch) | |
tree | 709d19a70338b14f56e08131ddee4e41b6d9a352 /arch/arm | |
parent | b85c14fb833e6da127188aa61b0a2aec8111bf59 (diff) | |
parent | 1a33a4ebecce89163de27cba57ba84fd7aa16137 (diff) |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull general arm-soc cleanups from Arnd Bergmann:
"These are all boring changes, moving stuff around or renaming things
mostly, and also getting rid of stuff that is duplicate or should not
be there to start with. Platform-wise this is all over the place,
mainly omap, samsung, at91, imx and tegra."
Resolve trivial conflict in arch/arm/mach-omap2/clockdomains3xxx_data.c
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits)
ARM: clps711x: Remove the setting of the time
ARM: clps711x: Removed superfluous transform virt_to_bus and related functions
ARM: clps711x/p720t: Replace __initcall by .init_early call
ARM: S3C24XX: Remove unused GPIO definitions for Openmoko GTA02 board
ARM: S3C24XX: Remove unused GPIO definitions for port J
ARM: S3C24XX: Remove unused GPA, GPE, GPH bank GPIO aliases
ARM: S3C24XX: Convert the touchscreen setup code to common GPIO API
ARM: S3C24XX: Convert the PM code to gpiolib API
ARM: S3C24XX: Convert QT2410 board file to the gpiolib API
ARM: S3C24XX: Convert SMDK board file to the gpiolib API
ARM: S3C24XX: Free the backlight gpio requested in Mini2440 board code
ARM: imx: remove unused pdata from device macros
ARM: imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX_SSI from MACH_MX25_3DS
ARM: at91: fix new build errors
ARM: at91: add AIC5 support
ARM: at91: remove mach/irqs.h
ARM: at91: sparse irq support
ARM: at91: at91 based machines specify their own irq handler at run time
ARM: at91: remove static irq priorities for sam9x5
ARM: at91: add of irq priorities support
...
Diffstat (limited to 'arch/arm')
202 files changed, 1769 insertions, 2475 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index f449efc9825f..66389c1c6f62 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi | |||
@@ -52,10 +52,11 @@ | |||
52 | ranges; | 52 | ranges; |
53 | 53 | ||
54 | aic: interrupt-controller@fffff000 { | 54 | aic: interrupt-controller@fffff000 { |
55 | #interrupt-cells = <2>; | 55 | #interrupt-cells = <3>; |
56 | compatible = "atmel,at91rm9200-aic"; | 56 | compatible = "atmel,at91rm9200-aic"; |
57 | interrupt-controller; | 57 | interrupt-controller; |
58 | reg = <0xfffff000 0x200>; | 58 | reg = <0xfffff000 0x200>; |
59 | atmel,external-irqs = <29 30 31>; | ||
59 | }; | 60 | }; |
60 | 61 | ||
61 | ramc0: ramc@ffffea00 { | 62 | ramc0: ramc@ffffea00 { |
@@ -81,25 +82,25 @@ | |||
81 | pit: timer@fffffd30 { | 82 | pit: timer@fffffd30 { |
82 | compatible = "atmel,at91sam9260-pit"; | 83 | compatible = "atmel,at91sam9260-pit"; |
83 | reg = <0xfffffd30 0xf>; | 84 | reg = <0xfffffd30 0xf>; |
84 | interrupts = <1 4>; | 85 | interrupts = <1 4 7>; |
85 | }; | 86 | }; |
86 | 87 | ||
87 | tcb0: timer@fffa0000 { | 88 | tcb0: timer@fffa0000 { |
88 | compatible = "atmel,at91rm9200-tcb"; | 89 | compatible = "atmel,at91rm9200-tcb"; |
89 | reg = <0xfffa0000 0x100>; | 90 | reg = <0xfffa0000 0x100>; |
90 | interrupts = <17 4 18 4 19 4>; | 91 | interrupts = <17 4 0 18 4 0 19 4 0>; |
91 | }; | 92 | }; |
92 | 93 | ||
93 | tcb1: timer@fffdc000 { | 94 | tcb1: timer@fffdc000 { |
94 | compatible = "atmel,at91rm9200-tcb"; | 95 | compatible = "atmel,at91rm9200-tcb"; |
95 | reg = <0xfffdc000 0x100>; | 96 | reg = <0xfffdc000 0x100>; |
96 | interrupts = <26 4 27 4 28 4>; | 97 | interrupts = <26 4 0 27 4 0 28 4 0>; |
97 | }; | 98 | }; |
98 | 99 | ||
99 | pioA: gpio@fffff400 { | 100 | pioA: gpio@fffff400 { |
100 | compatible = "atmel,at91rm9200-gpio"; | 101 | compatible = "atmel,at91rm9200-gpio"; |
101 | reg = <0xfffff400 0x100>; | 102 | reg = <0xfffff400 0x100>; |
102 | interrupts = <2 4>; | 103 | interrupts = <2 4 1>; |
103 | #gpio-cells = <2>; | 104 | #gpio-cells = <2>; |
104 | gpio-controller; | 105 | gpio-controller; |
105 | interrupt-controller; | 106 | interrupt-controller; |
@@ -108,7 +109,7 @@ | |||
108 | pioB: gpio@fffff600 { | 109 | pioB: gpio@fffff600 { |
109 | compatible = "atmel,at91rm9200-gpio"; | 110 | compatible = "atmel,at91rm9200-gpio"; |
110 | reg = <0xfffff600 0x100>; | 111 | reg = <0xfffff600 0x100>; |
111 | interrupts = <3 4>; | 112 | interrupts = <3 4 1>; |
112 | #gpio-cells = <2>; | 113 | #gpio-cells = <2>; |
113 | gpio-controller; | 114 | gpio-controller; |
114 | interrupt-controller; | 115 | interrupt-controller; |
@@ -117,7 +118,7 @@ | |||
117 | pioC: gpio@fffff800 { | 118 | pioC: gpio@fffff800 { |
118 | compatible = "atmel,at91rm9200-gpio"; | 119 | compatible = "atmel,at91rm9200-gpio"; |
119 | reg = <0xfffff800 0x100>; | 120 | reg = <0xfffff800 0x100>; |
120 | interrupts = <4 4>; | 121 | interrupts = <4 4 1>; |
121 | #gpio-cells = <2>; | 122 | #gpio-cells = <2>; |
122 | gpio-controller; | 123 | gpio-controller; |
123 | interrupt-controller; | 124 | interrupt-controller; |
@@ -126,14 +127,14 @@ | |||
126 | dbgu: serial@fffff200 { | 127 | dbgu: serial@fffff200 { |
127 | compatible = "atmel,at91sam9260-usart"; | 128 | compatible = "atmel,at91sam9260-usart"; |
128 | reg = <0xfffff200 0x200>; | 129 | reg = <0xfffff200 0x200>; |
129 | interrupts = <1 4>; | 130 | interrupts = <1 4 7>; |
130 | status = "disabled"; | 131 | status = "disabled"; |
131 | }; | 132 | }; |
132 | 133 | ||
133 | usart0: serial@fffb0000 { | 134 | usart0: serial@fffb0000 { |
134 | compatible = "atmel,at91sam9260-usart"; | 135 | compatible = "atmel,at91sam9260-usart"; |
135 | reg = <0xfffb0000 0x200>; | 136 | reg = <0xfffb0000 0x200>; |
136 | interrupts = <6 4>; | 137 | interrupts = <6 4 5>; |
137 | atmel,use-dma-rx; | 138 | atmel,use-dma-rx; |
138 | atmel,use-dma-tx; | 139 | atmel,use-dma-tx; |
139 | status = "disabled"; | 140 | status = "disabled"; |
@@ -142,7 +143,7 @@ | |||
142 | usart1: serial@fffb4000 { | 143 | usart1: serial@fffb4000 { |
143 | compatible = "atmel,at91sam9260-usart"; | 144 | compatible = "atmel,at91sam9260-usart"; |
144 | reg = <0xfffb4000 0x200>; | 145 | reg = <0xfffb4000 0x200>; |
145 | interrupts = <7 4>; | 146 | interrupts = <7 4 5>; |
146 | atmel,use-dma-rx; | 147 | atmel,use-dma-rx; |
147 | atmel,use-dma-tx; | 148 | atmel,use-dma-tx; |
148 | status = "disabled"; | 149 | status = "disabled"; |
@@ -151,7 +152,7 @@ | |||
151 | usart2: serial@fffb8000 { | 152 | usart2: serial@fffb8000 { |
152 | compatible = "atmel,at91sam9260-usart"; | 153 | compatible = "atmel,at91sam9260-usart"; |
153 | reg = <0xfffb8000 0x200>; | 154 | reg = <0xfffb8000 0x200>; |
154 | interrupts = <8 4>; | 155 | interrupts = <8 4 5>; |
155 | atmel,use-dma-rx; | 156 | atmel,use-dma-rx; |
156 | atmel,use-dma-tx; | 157 | atmel,use-dma-tx; |
157 | status = "disabled"; | 158 | status = "disabled"; |
@@ -160,7 +161,7 @@ | |||
160 | usart3: serial@fffd0000 { | 161 | usart3: serial@fffd0000 { |
161 | compatible = "atmel,at91sam9260-usart"; | 162 | compatible = "atmel,at91sam9260-usart"; |
162 | reg = <0xfffd0000 0x200>; | 163 | reg = <0xfffd0000 0x200>; |
163 | interrupts = <23 4>; | 164 | interrupts = <23 4 5>; |
164 | atmel,use-dma-rx; | 165 | atmel,use-dma-rx; |
165 | atmel,use-dma-tx; | 166 | atmel,use-dma-tx; |
166 | status = "disabled"; | 167 | status = "disabled"; |
@@ -169,7 +170,7 @@ | |||
169 | usart4: serial@fffd4000 { | 170 | usart4: serial@fffd4000 { |
170 | compatible = "atmel,at91sam9260-usart"; | 171 | compatible = "atmel,at91sam9260-usart"; |
171 | reg = <0xfffd4000 0x200>; | 172 | reg = <0xfffd4000 0x200>; |
172 | interrupts = <24 4>; | 173 | interrupts = <24 4 5>; |
173 | atmel,use-dma-rx; | 174 | atmel,use-dma-rx; |
174 | atmel,use-dma-tx; | 175 | atmel,use-dma-tx; |
175 | status = "disabled"; | 176 | status = "disabled"; |
@@ -178,7 +179,7 @@ | |||
178 | usart5: serial@fffd8000 { | 179 | usart5: serial@fffd8000 { |
179 | compatible = "atmel,at91sam9260-usart"; | 180 | compatible = "atmel,at91sam9260-usart"; |
180 | reg = <0xfffd8000 0x200>; | 181 | reg = <0xfffd8000 0x200>; |
181 | interrupts = <25 4>; | 182 | interrupts = <25 4 5>; |
182 | atmel,use-dma-rx; | 183 | atmel,use-dma-rx; |
183 | atmel,use-dma-tx; | 184 | atmel,use-dma-tx; |
184 | status = "disabled"; | 185 | status = "disabled"; |
@@ -187,21 +188,21 @@ | |||
187 | macb0: ethernet@fffc4000 { | 188 | macb0: ethernet@fffc4000 { |
188 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 189 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
189 | reg = <0xfffc4000 0x100>; | 190 | reg = <0xfffc4000 0x100>; |
190 | interrupts = <21 4>; | 191 | interrupts = <21 4 3>; |
191 | status = "disabled"; | 192 | status = "disabled"; |
192 | }; | 193 | }; |
193 | 194 | ||
194 | usb1: gadget@fffa4000 { | 195 | usb1: gadget@fffa4000 { |
195 | compatible = "atmel,at91rm9200-udc"; | 196 | compatible = "atmel,at91rm9200-udc"; |
196 | reg = <0xfffa4000 0x4000>; | 197 | reg = <0xfffa4000 0x4000>; |
197 | interrupts = <10 4>; | 198 | interrupts = <10 4 2>; |
198 | status = "disabled"; | 199 | status = "disabled"; |
199 | }; | 200 | }; |
200 | 201 | ||
201 | adc0: adc@fffe0000 { | 202 | adc0: adc@fffe0000 { |
202 | compatible = "atmel,at91sam9260-adc"; | 203 | compatible = "atmel,at91sam9260-adc"; |
203 | reg = <0xfffe0000 0x100>; | 204 | reg = <0xfffe0000 0x100>; |
204 | interrupts = <5 4>; | 205 | interrupts = <5 4 0>; |
205 | atmel,adc-use-external-triggers; | 206 | atmel,adc-use-external-triggers; |
206 | atmel,adc-channels-used = <0xf>; | 207 | atmel,adc-channels-used = <0xf>; |
207 | atmel,adc-vref = <3300>; | 208 | atmel,adc-vref = <3300>; |
@@ -253,7 +254,7 @@ | |||
253 | usb0: ohci@00500000 { | 254 | usb0: ohci@00500000 { |
254 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 255 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
255 | reg = <0x00500000 0x100000>; | 256 | reg = <0x00500000 0x100000>; |
256 | interrupts = <20 4>; | 257 | interrupts = <20 4 2>; |
257 | status = "disabled"; | 258 | status = "disabled"; |
258 | }; | 259 | }; |
259 | }; | 260 | }; |
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 0209913a65a2..b460d6ce9eb5 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi | |||
@@ -48,10 +48,11 @@ | |||
48 | ranges; | 48 | ranges; |
49 | 49 | ||
50 | aic: interrupt-controller@fffff000 { | 50 | aic: interrupt-controller@fffff000 { |
51 | #interrupt-cells = <2>; | 51 | #interrupt-cells = <3>; |
52 | compatible = "atmel,at91rm9200-aic"; | 52 | compatible = "atmel,at91rm9200-aic"; |
53 | interrupt-controller; | 53 | interrupt-controller; |
54 | reg = <0xfffff000 0x200>; | 54 | reg = <0xfffff000 0x200>; |
55 | atmel,external-irqs = <30 31>; | ||
55 | }; | 56 | }; |
56 | 57 | ||
57 | pmc: pmc@fffffc00 { | 58 | pmc: pmc@fffffc00 { |
@@ -68,13 +69,13 @@ | |||
68 | pit: timer@fffffd30 { | 69 | pit: timer@fffffd30 { |
69 | compatible = "atmel,at91sam9260-pit"; | 70 | compatible = "atmel,at91sam9260-pit"; |
70 | reg = <0xfffffd30 0xf>; | 71 | reg = <0xfffffd30 0xf>; |
71 | interrupts = <1 4>; | 72 | interrupts = <1 4 7>; |
72 | }; | 73 | }; |
73 | 74 | ||
74 | tcb0: timer@fff7c000 { | 75 | tcb0: timer@fff7c000 { |
75 | compatible = "atmel,at91rm9200-tcb"; | 76 | compatible = "atmel,at91rm9200-tcb"; |
76 | reg = <0xfff7c000 0x100>; | 77 | reg = <0xfff7c000 0x100>; |
77 | interrupts = <19 4>; | 78 | interrupts = <19 4 0>; |
78 | }; | 79 | }; |
79 | 80 | ||
80 | rstc@fffffd00 { | 81 | rstc@fffffd00 { |
@@ -90,7 +91,7 @@ | |||
90 | pioA: gpio@fffff200 { | 91 | pioA: gpio@fffff200 { |
91 | compatible = "atmel,at91rm9200-gpio"; | 92 | compatible = "atmel,at91rm9200-gpio"; |
92 | reg = <0xfffff200 0x100>; | 93 | reg = <0xfffff200 0x100>; |
93 | interrupts = <2 4>; | 94 | interrupts = <2 4 1>; |
94 | #gpio-cells = <2>; | 95 | #gpio-cells = <2>; |
95 | gpio-controller; | 96 | gpio-controller; |
96 | interrupt-controller; | 97 | interrupt-controller; |
@@ -99,7 +100,7 @@ | |||
99 | pioB: gpio@fffff400 { | 100 | pioB: gpio@fffff400 { |
100 | compatible = "atmel,at91rm9200-gpio"; | 101 | compatible = "atmel,at91rm9200-gpio"; |
101 | reg = <0xfffff400 0x100>; | 102 | reg = <0xfffff400 0x100>; |
102 | interrupts = <3 4>; | 103 | interrupts = <3 4 1>; |
103 | #gpio-cells = <2>; | 104 | #gpio-cells = <2>; |
104 | gpio-controller; | 105 | gpio-controller; |
105 | interrupt-controller; | 106 | interrupt-controller; |
@@ -108,7 +109,7 @@ | |||
108 | pioC: gpio@fffff600 { | 109 | pioC: gpio@fffff600 { |
109 | compatible = "atmel,at91rm9200-gpio"; | 110 | compatible = "atmel,at91rm9200-gpio"; |
110 | reg = <0xfffff600 0x100>; | 111 | reg = <0xfffff600 0x100>; |
111 | interrupts = <4 4>; | 112 | interrupts = <4 4 1>; |
112 | #gpio-cells = <2>; | 113 | #gpio-cells = <2>; |
113 | gpio-controller; | 114 | gpio-controller; |
114 | interrupt-controller; | 115 | interrupt-controller; |
@@ -117,7 +118,7 @@ | |||
117 | pioD: gpio@fffff800 { | 118 | pioD: gpio@fffff800 { |
118 | compatible = "atmel,at91rm9200-gpio"; | 119 | compatible = "atmel,at91rm9200-gpio"; |
119 | reg = <0xfffff800 0x100>; | 120 | reg = <0xfffff800 0x100>; |
120 | interrupts = <4 4>; | 121 | interrupts = <4 4 1>; |
121 | #gpio-cells = <2>; | 122 | #gpio-cells = <2>; |
122 | gpio-controller; | 123 | gpio-controller; |
123 | interrupt-controller; | 124 | interrupt-controller; |
@@ -126,7 +127,7 @@ | |||
126 | pioE: gpio@fffffa00 { | 127 | pioE: gpio@fffffa00 { |
127 | compatible = "atmel,at91rm9200-gpio"; | 128 | compatible = "atmel,at91rm9200-gpio"; |
128 | reg = <0xfffffa00 0x100>; | 129 | reg = <0xfffffa00 0x100>; |
129 | interrupts = <4 4>; | 130 | interrupts = <4 4 1>; |
130 | #gpio-cells = <2>; | 131 | #gpio-cells = <2>; |
131 | gpio-controller; | 132 | gpio-controller; |
132 | interrupt-controller; | 133 | interrupt-controller; |
@@ -135,14 +136,14 @@ | |||
135 | dbgu: serial@ffffee00 { | 136 | dbgu: serial@ffffee00 { |
136 | compatible = "atmel,at91sam9260-usart"; | 137 | compatible = "atmel,at91sam9260-usart"; |
137 | reg = <0xffffee00 0x200>; | 138 | reg = <0xffffee00 0x200>; |
138 | interrupts = <1 4>; | 139 | interrupts = <1 4 7>; |
139 | status = "disabled"; | 140 | status = "disabled"; |
140 | }; | 141 | }; |
141 | 142 | ||
142 | usart0: serial@fff8c000 { | 143 | usart0: serial@fff8c000 { |
143 | compatible = "atmel,at91sam9260-usart"; | 144 | compatible = "atmel,at91sam9260-usart"; |
144 | reg = <0xfff8c000 0x200>; | 145 | reg = <0xfff8c000 0x200>; |
145 | interrupts = <7 4>; | 146 | interrupts = <7 4 5>; |
146 | atmel,use-dma-rx; | 147 | atmel,use-dma-rx; |
147 | atmel,use-dma-tx; | 148 | atmel,use-dma-tx; |
148 | status = "disabled"; | 149 | status = "disabled"; |
@@ -151,7 +152,7 @@ | |||
151 | usart1: serial@fff90000 { | 152 | usart1: serial@fff90000 { |
152 | compatible = "atmel,at91sam9260-usart"; | 153 | compatible = "atmel,at91sam9260-usart"; |
153 | reg = <0xfff90000 0x200>; | 154 | reg = <0xfff90000 0x200>; |
154 | interrupts = <8 4>; | 155 | interrupts = <8 4 5>; |
155 | atmel,use-dma-rx; | 156 | atmel,use-dma-rx; |
156 | atmel,use-dma-tx; | 157 | atmel,use-dma-tx; |
157 | status = "disabled"; | 158 | status = "disabled"; |
@@ -160,7 +161,7 @@ | |||
160 | usart2: serial@fff94000 { | 161 | usart2: serial@fff94000 { |
161 | compatible = "atmel,at91sam9260-usart"; | 162 | compatible = "atmel,at91sam9260-usart"; |
162 | reg = <0xfff94000 0x200>; | 163 | reg = <0xfff94000 0x200>; |
163 | interrupts = <9 4>; | 164 | interrupts = <9 4 5>; |
164 | atmel,use-dma-rx; | 165 | atmel,use-dma-rx; |
165 | atmel,use-dma-tx; | 166 | atmel,use-dma-tx; |
166 | status = "disabled"; | 167 | status = "disabled"; |
@@ -169,14 +170,14 @@ | |||
169 | macb0: ethernet@fffbc000 { | 170 | macb0: ethernet@fffbc000 { |
170 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 171 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
171 | reg = <0xfffbc000 0x100>; | 172 | reg = <0xfffbc000 0x100>; |
172 | interrupts = <21 4>; | 173 | interrupts = <21 4 3>; |
173 | status = "disabled"; | 174 | status = "disabled"; |
174 | }; | 175 | }; |
175 | 176 | ||
176 | usb1: gadget@fff78000 { | 177 | usb1: gadget@fff78000 { |
177 | compatible = "atmel,at91rm9200-udc"; | 178 | compatible = "atmel,at91rm9200-udc"; |
178 | reg = <0xfff78000 0x4000>; | 179 | reg = <0xfff78000 0x4000>; |
179 | interrupts = <24 4>; | 180 | interrupts = <24 4 2>; |
180 | status = "disabled"; | 181 | status = "disabled"; |
181 | }; | 182 | }; |
182 | }; | 183 | }; |
@@ -200,7 +201,7 @@ | |||
200 | usb0: ohci@00a00000 { | 201 | usb0: ohci@00a00000 { |
201 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 202 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
202 | reg = <0x00a00000 0x100000>; | 203 | reg = <0x00a00000 0x100000>; |
203 | interrupts = <29 4>; | 204 | interrupts = <29 4 2>; |
204 | status = "disabled"; | 205 | status = "disabled"; |
205 | }; | 206 | }; |
206 | }; | 207 | }; |
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 7dbccaf199f7..bafa8806fc17 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi | |||
@@ -53,10 +53,11 @@ | |||
53 | ranges; | 53 | ranges; |
54 | 54 | ||
55 | aic: interrupt-controller@fffff000 { | 55 | aic: interrupt-controller@fffff000 { |
56 | #interrupt-cells = <2>; | 56 | #interrupt-cells = <3>; |
57 | compatible = "atmel,at91rm9200-aic"; | 57 | compatible = "atmel,at91rm9200-aic"; |
58 | interrupt-controller; | 58 | interrupt-controller; |
59 | reg = <0xfffff000 0x200>; | 59 | reg = <0xfffff000 0x200>; |
60 | atmel,external-irqs = <31>; | ||
60 | }; | 61 | }; |
61 | 62 | ||
62 | ramc0: ramc@ffffe400 { | 63 | ramc0: ramc@ffffe400 { |
@@ -78,7 +79,7 @@ | |||
78 | pit: timer@fffffd30 { | 79 | pit: timer@fffffd30 { |
79 | compatible = "atmel,at91sam9260-pit"; | 80 | compatible = "atmel,at91sam9260-pit"; |
80 | reg = <0xfffffd30 0xf>; | 81 | reg = <0xfffffd30 0xf>; |
81 | interrupts = <1 4>; | 82 | interrupts = <1 4 7>; |
82 | }; | 83 | }; |
83 | 84 | ||
84 | 85 | ||
@@ -90,25 +91,25 @@ | |||
90 | tcb0: timer@fff7c000 { | 91 | tcb0: timer@fff7c000 { |
91 | compatible = "atmel,at91rm9200-tcb"; | 92 | compatible = "atmel,at91rm9200-tcb"; |
92 | reg = <0xfff7c000 0x100>; | 93 | reg = <0xfff7c000 0x100>; |
93 | interrupts = <18 4>; | 94 | interrupts = <18 4 0>; |
94 | }; | 95 | }; |
95 | 96 | ||
96 | tcb1: timer@fffd4000 { | 97 | tcb1: timer@fffd4000 { |
97 | compatible = "atmel,at91rm9200-tcb"; | 98 | compatible = "atmel,at91rm9200-tcb"; |
98 | reg = <0xfffd4000 0x100>; | 99 | reg = <0xfffd4000 0x100>; |
99 | interrupts = <18 4>; | 100 | interrupts = <18 4 0>; |
100 | }; | 101 | }; |
101 | 102 | ||
102 | dma: dma-controller@ffffec00 { | 103 | dma: dma-controller@ffffec00 { |
103 | compatible = "atmel,at91sam9g45-dma"; | 104 | compatible = "atmel,at91sam9g45-dma"; |
104 | reg = <0xffffec00 0x200>; | 105 | reg = <0xffffec00 0x200>; |
105 | interrupts = <21 4>; | 106 | interrupts = <21 4 0>; |
106 | }; | 107 | }; |
107 | 108 | ||
108 | pioA: gpio@fffff200 { | 109 | pioA: gpio@fffff200 { |
109 | compatible = "atmel,at91rm9200-gpio"; | 110 | compatible = "atmel,at91rm9200-gpio"; |
110 | reg = <0xfffff200 0x100>; | 111 | reg = <0xfffff200 0x100>; |
111 | interrupts = <2 4>; | 112 | interrupts = <2 4 1>; |
112 | #gpio-cells = <2>; | 113 | #gpio-cells = <2>; |
113 | gpio-controller; | 114 | gpio-controller; |
114 | interrupt-controller; | 115 | interrupt-controller; |
@@ -117,7 +118,7 @@ | |||
117 | pioB: gpio@fffff400 { | 118 | pioB: gpio@fffff400 { |
118 | compatible = "atmel,at91rm9200-gpio"; | 119 | compatible = "atmel,at91rm9200-gpio"; |
119 | reg = <0xfffff400 0x100>; | 120 | reg = <0xfffff400 0x100>; |
120 | interrupts = <3 4>; | 121 | interrupts = <3 4 1>; |
121 | #gpio-cells = <2>; | 122 | #gpio-cells = <2>; |
122 | gpio-controller; | 123 | gpio-controller; |
123 | interrupt-controller; | 124 | interrupt-controller; |
@@ -126,7 +127,7 @@ | |||
126 | pioC: gpio@fffff600 { | 127 | pioC: gpio@fffff600 { |
127 | compatible = "atmel,at91rm9200-gpio"; | 128 | compatible = "atmel,at91rm9200-gpio"; |
128 | reg = <0xfffff600 0x100>; | 129 | reg = <0xfffff600 0x100>; |
129 | interrupts = <4 4>; | 130 | interrupts = <4 4 1>; |
130 | #gpio-cells = <2>; | 131 | #gpio-cells = <2>; |
131 | gpio-controller; | 132 | gpio-controller; |
132 | interrupt-controller; | 133 | interrupt-controller; |
@@ -135,7 +136,7 @@ | |||
135 | pioD: gpio@fffff800 { | 136 | pioD: gpio@fffff800 { |
136 | compatible = "atmel,at91rm9200-gpio"; | 137 | compatible = "atmel,at91rm9200-gpio"; |
137 | reg = <0xfffff800 0x100>; | 138 | reg = <0xfffff800 0x100>; |
138 | interrupts = <5 4>; | 139 | interrupts = <5 4 1>; |
139 | #gpio-cells = <2>; | 140 | #gpio-cells = <2>; |
140 | gpio-controller; | 141 | gpio-controller; |
141 | interrupt-controller; | 142 | interrupt-controller; |
@@ -144,7 +145,7 @@ | |||
144 | pioE: gpio@fffffa00 { | 145 | pioE: gpio@fffffa00 { |
145 | compatible = "atmel,at91rm9200-gpio"; | 146 | compatible = "atmel,at91rm9200-gpio"; |
146 | reg = <0xfffffa00 0x100>; | 147 | reg = <0xfffffa00 0x100>; |
147 | interrupts = <5 4>; | 148 | interrupts = <5 4 1>; |
148 | #gpio-cells = <2>; | 149 | #gpio-cells = <2>; |
149 | gpio-controller; | 150 | gpio-controller; |
150 | interrupt-controller; | 151 | interrupt-controller; |
@@ -153,14 +154,14 @@ | |||
153 | dbgu: serial@ffffee00 { | 154 | dbgu: serial@ffffee00 { |
154 | compatible = "atmel,at91sam9260-usart"; | 155 | compatible = "atmel,at91sam9260-usart"; |
155 | reg = <0xffffee00 0x200>; | 156 | reg = <0xffffee00 0x200>; |
156 | interrupts = <1 4>; | 157 | interrupts = <1 4 7>; |
157 | status = "disabled"; | 158 | status = "disabled"; |
158 | }; | 159 | }; |
159 | 160 | ||
160 | usart0: serial@fff8c000 { | 161 | usart0: serial@fff8c000 { |
161 | compatible = "atmel,at91sam9260-usart"; | 162 | compatible = "atmel,at91sam9260-usart"; |
162 | reg = <0xfff8c000 0x200>; | 163 | reg = <0xfff8c000 0x200>; |
163 | interrupts = <7 4>; | 164 | interrupts = <7 4 5>; |
164 | atmel,use-dma-rx; | 165 | atmel,use-dma-rx; |
165 | atmel,use-dma-tx; | 166 | atmel,use-dma-tx; |
166 | status = "disabled"; | 167 | status = "disabled"; |
@@ -169,7 +170,7 @@ | |||
169 | usart1: serial@fff90000 { | 170 | usart1: serial@fff90000 { |
170 | compatible = "atmel,at91sam9260-usart"; | 171 | compatible = "atmel,at91sam9260-usart"; |
171 | reg = <0xfff90000 0x200>; | 172 | reg = <0xfff90000 0x200>; |
172 | interrupts = <8 4>; | 173 | interrupts = <8 4 5>; |
173 | atmel,use-dma-rx; | 174 | atmel,use-dma-rx; |
174 | atmel,use-dma-tx; | 175 | atmel,use-dma-tx; |
175 | status = "disabled"; | 176 | status = "disabled"; |
@@ -178,7 +179,7 @@ | |||
178 | usart2: serial@fff94000 { | 179 | usart2: serial@fff94000 { |
179 | compatible = "atmel,at91sam9260-usart"; | 180 | compatible = "atmel,at91sam9260-usart"; |
180 | reg = <0xfff94000 0x200>; | 181 | reg = <0xfff94000 0x200>; |
181 | interrupts = <9 4>; | 182 | interrupts = <9 4 5>; |
182 | atmel,use-dma-rx; | 183 | atmel,use-dma-rx; |
183 | atmel,use-dma-tx; | 184 | atmel,use-dma-tx; |
184 | status = "disabled"; | 185 | status = "disabled"; |
@@ -187,7 +188,7 @@ | |||
187 | usart3: serial@fff98000 { | 188 | usart3: serial@fff98000 { |
188 | compatible = "atmel,at91sam9260-usart"; | 189 | compatible = "atmel,at91sam9260-usart"; |
189 | reg = <0xfff98000 0x200>; | 190 | reg = <0xfff98000 0x200>; |
190 | interrupts = <10 4>; | 191 | interrupts = <10 4 5>; |
191 | atmel,use-dma-rx; | 192 | atmel,use-dma-rx; |
192 | atmel,use-dma-tx; | 193 | atmel,use-dma-tx; |
193 | status = "disabled"; | 194 | status = "disabled"; |
@@ -196,14 +197,14 @@ | |||
196 | macb0: ethernet@fffbc000 { | 197 | macb0: ethernet@fffbc000 { |
197 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 198 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
198 | reg = <0xfffbc000 0x100>; | 199 | reg = <0xfffbc000 0x100>; |
199 | interrupts = <25 4>; | 200 | interrupts = <25 4 3>; |
200 | status = "disabled"; | 201 | status = "disabled"; |
201 | }; | 202 | }; |
202 | 203 | ||
203 | adc0: adc@fffb0000 { | 204 | adc0: adc@fffb0000 { |
204 | compatible = "atmel,at91sam9260-adc"; | 205 | compatible = "atmel,at91sam9260-adc"; |
205 | reg = <0xfffb0000 0x100>; | 206 | reg = <0xfffb0000 0x100>; |
206 | interrupts = <20 4>; | 207 | interrupts = <20 4 0>; |
207 | atmel,adc-use-external-triggers; | 208 | atmel,adc-use-external-triggers; |
208 | atmel,adc-channels-used = <0xff>; | 209 | atmel,adc-channels-used = <0xff>; |
209 | atmel,adc-vref = <3300>; | 210 | atmel,adc-vref = <3300>; |
@@ -257,14 +258,14 @@ | |||
257 | usb0: ohci@00700000 { | 258 | usb0: ohci@00700000 { |
258 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 259 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
259 | reg = <0x00700000 0x100000>; | 260 | reg = <0x00700000 0x100000>; |
260 | interrupts = <22 4>; | 261 | interrupts = <22 4 2>; |
261 | status = "disabled"; | 262 | status = "disabled"; |
262 | }; | 263 | }; |
263 | 264 | ||
264 | usb1: ehci@00800000 { | 265 | usb1: ehci@00800000 { |
265 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | 266 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; |
266 | reg = <0x00800000 0x100000>; | 267 | reg = <0x00800000 0x100000>; |
267 | interrupts = <22 4>; | 268 | interrupts = <22 4 2>; |
268 | status = "disabled"; | 269 | status = "disabled"; |
269 | }; | 270 | }; |
270 | }; | 271 | }; |
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index cb84de791b5a..bfac0dfc332c 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
@@ -50,7 +50,7 @@ | |||
50 | ranges; | 50 | ranges; |
51 | 51 | ||
52 | aic: interrupt-controller@fffff000 { | 52 | aic: interrupt-controller@fffff000 { |
53 | #interrupt-cells = <2>; | 53 | #interrupt-cells = <3>; |
54 | compatible = "atmel,at91rm9200-aic"; | 54 | compatible = "atmel,at91rm9200-aic"; |
55 | interrupt-controller; | 55 | interrupt-controller; |
56 | reg = <0xfffff000 0x200>; | 56 | reg = <0xfffff000 0x200>; |
@@ -74,7 +74,7 @@ | |||
74 | pit: timer@fffffe30 { | 74 | pit: timer@fffffe30 { |
75 | compatible = "atmel,at91sam9260-pit"; | 75 | compatible = "atmel,at91sam9260-pit"; |
76 | reg = <0xfffffe30 0xf>; | 76 | reg = <0xfffffe30 0xf>; |
77 | interrupts = <1 4>; | 77 | interrupts = <1 4 7>; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | shdwc@fffffe10 { | 80 | shdwc@fffffe10 { |
@@ -85,25 +85,25 @@ | |||
85 | tcb0: timer@f8008000 { | 85 | tcb0: timer@f8008000 { |
86 | compatible = "atmel,at91sam9x5-tcb"; | 86 | compatible = "atmel,at91sam9x5-tcb"; |
87 | reg = <0xf8008000 0x100>; | 87 | reg = <0xf8008000 0x100>; |
88 | interrupts = <17 4>; | 88 | interrupts = <17 4 0>; |
89 | }; | 89 | }; |
90 | 90 | ||
91 | tcb1: timer@f800c000 { | 91 | tcb1: timer@f800c000 { |
92 | compatible = "atmel,at91sam9x5-tcb"; | 92 | compatible = "atmel,at91sam9x5-tcb"; |
93 | reg = <0xf800c000 0x100>; | 93 | reg = <0xf800c000 0x100>; |
94 | interrupts = <17 4>; | 94 | interrupts = <17 4 0>; |
95 | }; | 95 | }; |
96 | 96 | ||
97 | dma: dma-controller@ffffec00 { | 97 | dma: dma-controller@ffffec00 { |
98 | compatible = "atmel,at91sam9g45-dma"; | 98 | compatible = "atmel,at91sam9g45-dma"; |
99 | reg = <0xffffec00 0x200>; | 99 | reg = <0xffffec00 0x200>; |
100 | interrupts = <20 4>; | 100 | interrupts = <20 4 0>; |
101 | }; | 101 | }; |
102 | 102 | ||
103 | pioA: gpio@fffff400 { | 103 | pioA: gpio@fffff400 { |
104 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 104 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
105 | reg = <0xfffff400 0x100>; | 105 | reg = <0xfffff400 0x100>; |
106 | interrupts = <2 4>; | 106 | interrupts = <2 4 1>; |
107 | #gpio-cells = <2>; | 107 | #gpio-cells = <2>; |
108 | gpio-controller; | 108 | gpio-controller; |
109 | interrupt-controller; | 109 | interrupt-controller; |
@@ -112,7 +112,7 @@ | |||
112 | pioB: gpio@fffff600 { | 112 | pioB: gpio@fffff600 { |
113 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 113 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
114 | reg = <0xfffff600 0x100>; | 114 | reg = <0xfffff600 0x100>; |
115 | interrupts = <2 4>; | 115 | interrupts = <2 4 1>; |
116 | #gpio-cells = <2>; | 116 | #gpio-cells = <2>; |
117 | gpio-controller; | 117 | gpio-controller; |
118 | interrupt-controller; | 118 | interrupt-controller; |
@@ -121,7 +121,7 @@ | |||
121 | pioC: gpio@fffff800 { | 121 | pioC: gpio@fffff800 { |
122 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 122 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
123 | reg = <0xfffff800 0x100>; | 123 | reg = <0xfffff800 0x100>; |
124 | interrupts = <3 4>; | 124 | interrupts = <3 4 1>; |
125 | #gpio-cells = <2>; | 125 | #gpio-cells = <2>; |
126 | gpio-controller; | 126 | gpio-controller; |
127 | interrupt-controller; | 127 | interrupt-controller; |
@@ -130,7 +130,7 @@ | |||
130 | pioD: gpio@fffffa00 { | 130 | pioD: gpio@fffffa00 { |
131 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 131 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
132 | reg = <0xfffffa00 0x100>; | 132 | reg = <0xfffffa00 0x100>; |
133 | interrupts = <3 4>; | 133 | interrupts = <3 4 1>; |
134 | #gpio-cells = <2>; | 134 | #gpio-cells = <2>; |
135 | gpio-controller; | 135 | gpio-controller; |
136 | interrupt-controller; | 136 | interrupt-controller; |
@@ -139,14 +139,14 @@ | |||
139 | dbgu: serial@fffff200 { | 139 | dbgu: serial@fffff200 { |
140 | compatible = "atmel,at91sam9260-usart"; | 140 | compatible = "atmel,at91sam9260-usart"; |
141 | reg = <0xfffff200 0x200>; | 141 | reg = <0xfffff200 0x200>; |
142 | interrupts = <1 4>; | 142 | interrupts = <1 4 7>; |
143 | status = "disabled"; | 143 | status = "disabled"; |
144 | }; | 144 | }; |
145 | 145 | ||
146 | usart0: serial@f801c000 { | 146 | usart0: serial@f801c000 { |
147 | compatible = "atmel,at91sam9260-usart"; | 147 | compatible = "atmel,at91sam9260-usart"; |
148 | reg = <0xf801c000 0x4000>; | 148 | reg = <0xf801c000 0x4000>; |
149 | interrupts = <5 4>; | 149 | interrupts = <5 4 5>; |
150 | atmel,use-dma-rx; | 150 | atmel,use-dma-rx; |
151 | atmel,use-dma-tx; | 151 | atmel,use-dma-tx; |
152 | status = "disabled"; | 152 | status = "disabled"; |
@@ -155,7 +155,7 @@ | |||
155 | usart1: serial@f8020000 { | 155 | usart1: serial@f8020000 { |
156 | compatible = "atmel,at91sam9260-usart"; | 156 | compatible = "atmel,at91sam9260-usart"; |
157 | reg = <0xf8020000 0x4000>; | 157 | reg = <0xf8020000 0x4000>; |
158 | interrupts = <6 4>; | 158 | interrupts = <6 4 5>; |
159 | atmel,use-dma-rx; | 159 | atmel,use-dma-rx; |
160 | atmel,use-dma-tx; | 160 | atmel,use-dma-tx; |
161 | status = "disabled"; | 161 | status = "disabled"; |
@@ -164,7 +164,7 @@ | |||
164 | usart2: serial@f8024000 { | 164 | usart2: serial@f8024000 { |
165 | compatible = "atmel,at91sam9260-usart"; | 165 | compatible = "atmel,at91sam9260-usart"; |
166 | reg = <0xf8024000 0x4000>; | 166 | reg = <0xf8024000 0x4000>; |
167 | interrupts = <7 4>; | 167 | interrupts = <7 4 5>; |
168 | atmel,use-dma-rx; | 168 | atmel,use-dma-rx; |
169 | atmel,use-dma-tx; | 169 | atmel,use-dma-tx; |
170 | status = "disabled"; | 170 | status = "disabled"; |
@@ -173,7 +173,7 @@ | |||
173 | usart3: serial@f8028000 { | 173 | usart3: serial@f8028000 { |
174 | compatible = "atmel,at91sam9260-usart"; | 174 | compatible = "atmel,at91sam9260-usart"; |
175 | reg = <0xf8028000 0x4000>; | 175 | reg = <0xf8028000 0x4000>; |
176 | interrupts = <8 4>; | 176 | interrupts = <8 4 5>; |
177 | atmel,use-dma-rx; | 177 | atmel,use-dma-rx; |
178 | atmel,use-dma-tx; | 178 | atmel,use-dma-tx; |
179 | status = "disabled"; | 179 | status = "disabled"; |
@@ -201,7 +201,7 @@ | |||
201 | usb0: ohci@00500000 { | 201 | usb0: ohci@00500000 { |
202 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 202 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
203 | reg = <0x00500000 0x00100000>; | 203 | reg = <0x00500000 0x00100000>; |
204 | interrupts = <22 4>; | 204 | interrupts = <22 4 2>; |
205 | status = "disabled"; | 205 | status = "disabled"; |
206 | }; | 206 | }; |
207 | }; | 207 | }; |
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 6b3ef4339ae7..4a18c393b136 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -51,10 +51,11 @@ | |||
51 | ranges; | 51 | ranges; |
52 | 52 | ||
53 | aic: interrupt-controller@fffff000 { | 53 | aic: interrupt-controller@fffff000 { |
54 | #interrupt-cells = <2>; | 54 | #interrupt-cells = <3>; |
55 | compatible = "atmel,at91rm9200-aic"; | 55 | compatible = "atmel,at91rm9200-aic"; |
56 | interrupt-controller; | 56 | interrupt-controller; |
57 | reg = <0xfffff000 0x200>; | 57 | reg = <0xfffff000 0x200>; |
58 | atmel,external-irqs = <31>; | ||
58 | }; | 59 | }; |
59 | 60 | ||
60 | ramc0: ramc@ffffe800 { | 61 | ramc0: ramc@ffffe800 { |
@@ -80,37 +81,37 @@ | |||
80 | pit: timer@fffffe30 { | 81 | pit: timer@fffffe30 { |
81 | compatible = "atmel,at91sam9260-pit"; | 82 | compatible = "atmel,at91sam9260-pit"; |
82 | reg = <0xfffffe30 0xf>; | 83 | reg = <0xfffffe30 0xf>; |
83 | interrupts = <1 4>; | 84 | interrupts = <1 4 7>; |
84 | }; | 85 | }; |
85 | 86 | ||
86 | tcb0: timer@f8008000 { | 87 | tcb0: timer@f8008000 { |
87 | compatible = "atmel,at91sam9x5-tcb"; | 88 | compatible = "atmel,at91sam9x5-tcb"; |
88 | reg = <0xf8008000 0x100>; | 89 | reg = <0xf8008000 0x100>; |
89 | interrupts = <17 4>; | 90 | interrupts = <17 4 0>; |
90 | }; | 91 | }; |
91 | 92 | ||
92 | tcb1: timer@f800c000 { | 93 | tcb1: timer@f800c000 { |
93 | compatible = "atmel,at91sam9x5-tcb"; | 94 | compatible = "atmel,at91sam9x5-tcb"; |
94 | reg = <0xf800c000 0x100>; | 95 | reg = <0xf800c000 0x100>; |
95 | interrupts = <17 4>; | 96 | interrupts = <17 4 0>; |
96 | }; | 97 | }; |
97 | 98 | ||
98 | dma0: dma-controller@ffffec00 { | 99 | dma0: dma-controller@ffffec00 { |
99 | compatible = "atmel,at91sam9g45-dma"; | 100 | compatible = "atmel,at91sam9g45-dma"; |
100 | reg = <0xffffec00 0x200>; | 101 | reg = <0xffffec00 0x200>; |
101 | interrupts = <20 4>; | 102 | interrupts = <20 4 0>; |
102 | }; | 103 | }; |
103 | 104 | ||
104 | dma1: dma-controller@ffffee00 { | 105 | dma1: dma-controller@ffffee00 { |
105 | compatible = "atmel,at91sam9g45-dma"; | 106 | compatible = "atmel,at91sam9g45-dma"; |
106 | reg = <0xffffee00 0x200>; | 107 | reg = <0xffffee00 0x200>; |
107 | interrupts = <21 4>; | 108 | interrupts = <21 4 0>; |
108 | }; | 109 | }; |
109 | 110 | ||
110 | pioA: gpio@fffff400 { | 111 | pioA: gpio@fffff400 { |
111 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 112 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
112 | reg = <0xfffff400 0x100>; | 113 | reg = <0xfffff400 0x100>; |
113 | interrupts = <2 4>; | 114 | interrupts = <2 4 1>; |
114 | #gpio-cells = <2>; | 115 | #gpio-cells = <2>; |
115 | gpio-controller; | 116 | gpio-controller; |
116 | interrupt-controller; | 117 | interrupt-controller; |
@@ -119,7 +120,7 @@ | |||
119 | pioB: gpio@fffff600 { | 120 | pioB: gpio@fffff600 { |
120 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 121 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
121 | reg = <0xfffff600 0x100>; | 122 | reg = <0xfffff600 0x100>; |
122 | interrupts = <2 4>; | 123 | interrupts = <2 4 1>; |
123 | #gpio-cells = <2>; | 124 | #gpio-cells = <2>; |
124 | gpio-controller; | 125 | gpio-controller; |
125 | interrupt-controller; | 126 | interrupt-controller; |
@@ -128,7 +129,7 @@ | |||
128 | pioC: gpio@fffff800 { | 129 | pioC: gpio@fffff800 { |
129 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 130 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
130 | reg = <0xfffff800 0x100>; | 131 | reg = <0xfffff800 0x100>; |
131 | interrupts = <3 4>; | 132 | interrupts = <3 4 1>; |
132 | #gpio-cells = <2>; | 133 | #gpio-cells = <2>; |
133 | gpio-controller; | 134 | gpio-controller; |
134 | interrupt-controller; | 135 | interrupt-controller; |
@@ -137,7 +138,7 @@ | |||
137 | pioD: gpio@fffffa00 { | 138 | pioD: gpio@fffffa00 { |
138 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 139 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
139 | reg = <0xfffffa00 0x100>; | 140 | reg = <0xfffffa00 0x100>; |
140 | interrupts = <3 4>; | 141 | interrupts = <3 4 1>; |
141 | #gpio-cells = <2>; | 142 | #gpio-cells = <2>; |
142 | gpio-controller; | 143 | gpio-controller; |
143 | interrupt-controller; | 144 | interrupt-controller; |
@@ -146,14 +147,14 @@ | |||
146 | dbgu: serial@fffff200 { | 147 | dbgu: serial@fffff200 { |
147 | compatible = "atmel,at91sam9260-usart"; | 148 | compatible = "atmel,at91sam9260-usart"; |
148 | reg = <0xfffff200 0x200>; | 149 | reg = <0xfffff200 0x200>; |
149 | interrupts = <1 4>; | 150 | interrupts = <1 4 7>; |
150 | status = "disabled"; | 151 | status = "disabled"; |
151 | }; | 152 | }; |
152 | 153 | ||
153 | usart0: serial@f801c000 { | 154 | usart0: serial@f801c000 { |
154 | compatible = "atmel,at91sam9260-usart"; | 155 | compatible = "atmel,at91sam9260-usart"; |
155 | reg = <0xf801c000 0x200>; | 156 | reg = <0xf801c000 0x200>; |
156 | interrupts = <5 4>; | 157 | interrupts = <5 4 5>; |
157 | atmel,use-dma-rx; | 158 | atmel,use-dma-rx; |
158 | atmel,use-dma-tx; | 159 | atmel,use-dma-tx; |
159 | status = "disabled"; | 160 | status = "disabled"; |
@@ -162,7 +163,7 @@ | |||
162 | usart1: serial@f8020000 { | 163 | usart1: serial@f8020000 { |
163 | compatible = "atmel,at91sam9260-usart"; | 164 | compatible = "atmel,at91sam9260-usart"; |
164 | reg = <0xf8020000 0x200>; | 165 | reg = <0xf8020000 0x200>; |
165 | interrupts = <6 4>; | 166 | interrupts = <6 4 5>; |
166 | atmel,use-dma-rx; | 167 | atmel,use-dma-rx; |
167 | atmel,use-dma-tx; | 168 | atmel,use-dma-tx; |
168 | status = "disabled"; | 169 | status = "disabled"; |
@@ -171,7 +172,7 @@ | |||
171 | usart2: serial@f8024000 { | 172 | usart2: serial@f8024000 { |
172 | compatible = "atmel,at91sam9260-usart"; | 173 | compatible = "atmel,at91sam9260-usart"; |
173 | reg = <0xf8024000 0x200>; | 174 | reg = <0xf8024000 0x200>; |
174 | interrupts = <7 4>; | 175 | interrupts = <7 4 5>; |
175 | atmel,use-dma-rx; | 176 | atmel,use-dma-rx; |
176 | atmel,use-dma-tx; | 177 | atmel,use-dma-tx; |
177 | status = "disabled"; | 178 | status = "disabled"; |
@@ -180,21 +181,21 @@ | |||
180 | macb0: ethernet@f802c000 { | 181 | macb0: ethernet@f802c000 { |
181 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 182 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
182 | reg = <0xf802c000 0x100>; | 183 | reg = <0xf802c000 0x100>; |
183 | interrupts = <24 4>; | 184 | interrupts = <24 4 3>; |
184 | status = "disabled"; | 185 | status = "disabled"; |
185 | }; | 186 | }; |
186 | 187 | ||
187 | macb1: ethernet@f8030000 { | 188 | macb1: ethernet@f8030000 { |
188 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 189 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
189 | reg = <0xf8030000 0x100>; | 190 | reg = <0xf8030000 0x100>; |
190 | interrupts = <27 4>; | 191 | interrupts = <27 4 3>; |
191 | status = "disabled"; | 192 | status = "disabled"; |
192 | }; | 193 | }; |
193 | 194 | ||
194 | adc0: adc@f804c000 { | 195 | adc0: adc@f804c000 { |
195 | compatible = "atmel,at91sam9260-adc"; | 196 | compatible = "atmel,at91sam9260-adc"; |
196 | reg = <0xf804c000 0x100>; | 197 | reg = <0xf804c000 0x100>; |
197 | interrupts = <19 4>; | 198 | interrupts = <19 4 0>; |
198 | atmel,adc-use-external; | 199 | atmel,adc-use-external; |
199 | atmel,adc-channels-used = <0xffff>; | 200 | atmel,adc-channels-used = <0xffff>; |
200 | atmel,adc-vref = <3300>; | 201 | atmel,adc-vref = <3300>; |
@@ -248,14 +249,14 @@ | |||
248 | usb0: ohci@00600000 { | 249 | usb0: ohci@00600000 { |
249 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 250 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
250 | reg = <0x00600000 0x100000>; | 251 | reg = <0x00600000 0x100000>; |
251 | interrupts = <22 4>; | 252 | interrupts = <22 4 2>; |
252 | status = "disabled"; | 253 | status = "disabled"; |
253 | }; | 254 | }; |
254 | 255 | ||
255 | usb1: ehci@00700000 { | 256 | usb1: ehci@00700000 { |
256 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | 257 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; |
257 | reg = <0x00700000 0x100000>; | 258 | reg = <0x00700000 0x100000>; |
258 | interrupts = <22 4>; | 259 | interrupts = <22 4 2>; |
259 | status = "disabled"; | 260 | status = "disabled"; |
260 | }; | 261 | }; |
261 | }; | 262 | }; |
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 7de701365fce..f146dbf6f7f8 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts | |||
@@ -307,7 +307,6 @@ | |||
307 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ | 307 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ |
308 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ | 308 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ |
309 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | 309 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
310 | support-8bit; | ||
311 | bus-width = <8>; | 310 | bus-width = <8>; |
312 | }; | 311 | }; |
313 | 312 | ||
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index bfeb117d5aea..684a9e1ff7e9 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts | |||
@@ -301,7 +301,6 @@ | |||
301 | 301 | ||
302 | sdhci@c8000600 { | 302 | sdhci@c8000600 { |
303 | status = "okay"; | 303 | status = "okay"; |
304 | support-8bit; | ||
305 | bus-width = <8>; | 304 | bus-width = <8>; |
306 | }; | 305 | }; |
307 | 306 | ||
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 89cb7f2acd92..b797901d040d 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts | |||
@@ -334,7 +334,7 @@ | |||
334 | }; | 334 | }; |
335 | }; | 335 | }; |
336 | 336 | ||
337 | emc { | 337 | memory-controller@0x7000f400 { |
338 | emc-table@190000 { | 338 | emc-table@190000 { |
339 | reg = <190000>; | 339 | reg = <190000>; |
340 | compatible = "nvidia,tegra20-emc-table"; | 340 | compatible = "nvidia,tegra20-emc-table"; |
@@ -397,7 +397,6 @@ | |||
397 | 397 | ||
398 | sdhci@c8000600 { | 398 | sdhci@c8000600 { |
399 | status = "okay"; | 399 | status = "okay"; |
400 | support-8bit; | ||
401 | bus-width = <8>; | 400 | bus-width = <8>; |
402 | }; | 401 | }; |
403 | 402 | ||
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 9de5636023f6..9de5636023f6 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts | |||
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 445343b0fbdd..be90544e6b59 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts | |||
@@ -314,7 +314,6 @@ | |||
314 | 314 | ||
315 | sdhci@c8000600 { | 315 | sdhci@c8000600 { |
316 | status = "okay"; | 316 | status = "okay"; |
317 | support-8bit; | ||
318 | bus-width = <8>; | 317 | bus-width = <8>; |
319 | }; | 318 | }; |
320 | 319 | ||
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index c417d67e9027..9f1921634eb7 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -72,7 +72,7 @@ | |||
72 | reg = <0x70002800 0x200>; | 72 | reg = <0x70002800 0x200>; |
73 | interrupts = <0 13 0x04>; | 73 | interrupts = <0 13 0x04>; |
74 | nvidia,dma-request-selector = <&apbdma 2>; | 74 | nvidia,dma-request-selector = <&apbdma 2>; |
75 | status = "disable"; | 75 | status = "disabled"; |
76 | }; | 76 | }; |
77 | 77 | ||
78 | tegra_i2s2: i2s@70002a00 { | 78 | tegra_i2s2: i2s@70002a00 { |
@@ -80,7 +80,7 @@ | |||
80 | reg = <0x70002a00 0x200>; | 80 | reg = <0x70002a00 0x200>; |
81 | interrupts = <0 3 0x04>; | 81 | interrupts = <0 3 0x04>; |
82 | nvidia,dma-request-selector = <&apbdma 1>; | 82 | nvidia,dma-request-selector = <&apbdma 1>; |
83 | status = "disable"; | 83 | status = "disabled"; |
84 | }; | 84 | }; |
85 | 85 | ||
86 | serial@70006000 { | 86 | serial@70006000 { |
@@ -88,7 +88,7 @@ | |||
88 | reg = <0x70006000 0x40>; | 88 | reg = <0x70006000 0x40>; |
89 | reg-shift = <2>; | 89 | reg-shift = <2>; |
90 | interrupts = <0 36 0x04>; | 90 | interrupts = <0 36 0x04>; |
91 | status = "disable"; | 91 | status = "disabled"; |
92 | }; | 92 | }; |
93 | 93 | ||
94 | serial@70006040 { | 94 | serial@70006040 { |
@@ -96,7 +96,7 @@ | |||
96 | reg = <0x70006040 0x40>; | 96 | reg = <0x70006040 0x40>; |
97 | reg-shift = <2>; | 97 | reg-shift = <2>; |
98 | interrupts = <0 37 0x04>; | 98 | interrupts = <0 37 0x04>; |
99 | status = "disable"; | 99 | status = "disabled"; |
100 | }; | 100 | }; |
101 | 101 | ||
102 | serial@70006200 { | 102 | serial@70006200 { |
@@ -104,7 +104,7 @@ | |||
104 | reg = <0x70006200 0x100>; | 104 | reg = <0x70006200 0x100>; |
105 | reg-shift = <2>; | 105 | reg-shift = <2>; |
106 | interrupts = <0 46 0x04>; | 106 | interrupts = <0 46 0x04>; |
107 | status = "disable"; | 107 | status = "disabled"; |
108 | }; | 108 | }; |
109 | 109 | ||
110 | serial@70006300 { | 110 | serial@70006300 { |
@@ -112,7 +112,7 @@ | |||
112 | reg = <0x70006300 0x100>; | 112 | reg = <0x70006300 0x100>; |
113 | reg-shift = <2>; | 113 | reg-shift = <2>; |
114 | interrupts = <0 90 0x04>; | 114 | interrupts = <0 90 0x04>; |
115 | status = "disable"; | 115 | status = "disabled"; |
116 | }; | 116 | }; |
117 | 117 | ||
118 | serial@70006400 { | 118 | serial@70006400 { |
@@ -120,7 +120,7 @@ | |||
120 | reg = <0x70006400 0x100>; | 120 | reg = <0x70006400 0x100>; |
121 | reg-shift = <2>; | 121 | reg-shift = <2>; |
122 | interrupts = <0 91 0x04>; | 122 | interrupts = <0 91 0x04>; |
123 | status = "disable"; | 123 | status = "disabled"; |
124 | }; | 124 | }; |
125 | 125 | ||
126 | i2c@7000c000 { | 126 | i2c@7000c000 { |
@@ -129,7 +129,7 @@ | |||
129 | interrupts = <0 38 0x04>; | 129 | interrupts = <0 38 0x04>; |
130 | #address-cells = <1>; | 130 | #address-cells = <1>; |
131 | #size-cells = <0>; | 131 | #size-cells = <0>; |
132 | status = "disable"; | 132 | status = "disabled"; |
133 | }; | 133 | }; |
134 | 134 | ||
135 | i2c@7000c400 { | 135 | i2c@7000c400 { |
@@ -138,7 +138,7 @@ | |||
138 | interrupts = <0 84 0x04>; | 138 | interrupts = <0 84 0x04>; |
139 | #address-cells = <1>; | 139 | #address-cells = <1>; |
140 | #size-cells = <0>; | 140 | #size-cells = <0>; |
141 | status = "disable"; | 141 | status = "disabled"; |
142 | }; | 142 | }; |
143 | 143 | ||
144 | i2c@7000c500 { | 144 | i2c@7000c500 { |
@@ -147,7 +147,7 @@ | |||
147 | interrupts = <0 92 0x04>; | 147 | interrupts = <0 92 0x04>; |
148 | #address-cells = <1>; | 148 | #address-cells = <1>; |
149 | #size-cells = <0>; | 149 | #size-cells = <0>; |
150 | status = "disable"; | 150 | status = "disabled"; |
151 | }; | 151 | }; |
152 | 152 | ||
153 | i2c@7000d000 { | 153 | i2c@7000d000 { |
@@ -156,7 +156,7 @@ | |||
156 | interrupts = <0 53 0x04>; | 156 | interrupts = <0 53 0x04>; |
157 | #address-cells = <1>; | 157 | #address-cells = <1>; |
158 | #size-cells = <0>; | 158 | #size-cells = <0>; |
159 | status = "disable"; | 159 | status = "disabled"; |
160 | }; | 160 | }; |
161 | 161 | ||
162 | pmc { | 162 | pmc { |
@@ -164,7 +164,7 @@ | |||
164 | reg = <0x7000e400 0x400>; | 164 | reg = <0x7000e400 0x400>; |
165 | }; | 165 | }; |
166 | 166 | ||
167 | mc { | 167 | memory-controller@0x7000f000 { |
168 | compatible = "nvidia,tegra20-mc"; | 168 | compatible = "nvidia,tegra20-mc"; |
169 | reg = <0x7000f000 0x024 | 169 | reg = <0x7000f000 0x024 |
170 | 0x7000f03c 0x3c4>; | 170 | 0x7000f03c 0x3c4>; |
@@ -177,7 +177,7 @@ | |||
177 | 0x58000000 0x02000000>; /* GART aperture */ | 177 | 0x58000000 0x02000000>; /* GART aperture */ |
178 | }; | 178 | }; |
179 | 179 | ||
180 | emc { | 180 | memory-controller@0x7000f400 { |
181 | compatible = "nvidia,tegra20-emc"; | 181 | compatible = "nvidia,tegra20-emc"; |
182 | reg = <0x7000f400 0x200>; | 182 | reg = <0x7000f400 0x200>; |
183 | #address-cells = <1>; | 183 | #address-cells = <1>; |
@@ -190,7 +190,7 @@ | |||
190 | interrupts = <0 20 0x04>; | 190 | interrupts = <0 20 0x04>; |
191 | phy_type = "utmi"; | 191 | phy_type = "utmi"; |
192 | nvidia,has-legacy-mode; | 192 | nvidia,has-legacy-mode; |
193 | status = "disable"; | 193 | status = "disabled"; |
194 | }; | 194 | }; |
195 | 195 | ||
196 | usb@c5004000 { | 196 | usb@c5004000 { |
@@ -198,7 +198,7 @@ | |||
198 | reg = <0xc5004000 0x4000>; | 198 | reg = <0xc5004000 0x4000>; |
199 | interrupts = <0 21 0x04>; | 199 | interrupts = <0 21 0x04>; |
200 | phy_type = "ulpi"; | 200 | phy_type = "ulpi"; |
201 | status = "disable"; | 201 | status = "disabled"; |
202 | }; | 202 | }; |
203 | 203 | ||
204 | usb@c5008000 { | 204 | usb@c5008000 { |
@@ -206,35 +206,35 @@ | |||
206 | reg = <0xc5008000 0x4000>; | 206 | reg = <0xc5008000 0x4000>; |
207 | interrupts = <0 97 0x04>; | 207 | interrupts = <0 97 0x04>; |
208 | phy_type = "utmi"; | 208 | phy_type = "utmi"; |
209 | status = "disable"; | 209 | status = "disabled"; |
210 | }; | 210 | }; |
211 | 211 | ||
212 | sdhci@c8000000 { | 212 | sdhci@c8000000 { |
213 | compatible = "nvidia,tegra20-sdhci"; | 213 | compatible = "nvidia,tegra20-sdhci"; |
214 | reg = <0xc8000000 0x200>; | 214 | reg = <0xc8000000 0x200>; |
215 | interrupts = <0 14 0x04>; | 215 | interrupts = <0 14 0x04>; |
216 | status = "disable"; | 216 | status = "disabled"; |
217 | }; | 217 | }; |
218 | 218 | ||
219 | sdhci@c8000200 { | 219 | sdhci@c8000200 { |
220 | compatible = "nvidia,tegra20-sdhci"; | 220 | compatible = "nvidia,tegra20-sdhci"; |
221 | reg = <0xc8000200 0x200>; | 221 | reg = <0xc8000200 0x200>; |
222 | interrupts = <0 15 0x04>; | 222 | interrupts = <0 15 0x04>; |
223 | status = "disable"; | 223 | status = "disabled"; |
224 | }; | 224 | }; |
225 | 225 | ||
226 | sdhci@c8000400 { | 226 | sdhci@c8000400 { |
227 | compatible = "nvidia,tegra20-sdhci"; | 227 | compatible = "nvidia,tegra20-sdhci"; |
228 | reg = <0xc8000400 0x200>; | 228 | reg = <0xc8000400 0x200>; |
229 | interrupts = <0 19 0x04>; | 229 | interrupts = <0 19 0x04>; |
230 | status = "disable"; | 230 | status = "disabled"; |
231 | }; | 231 | }; |
232 | 232 | ||
233 | sdhci@c8000600 { | 233 | sdhci@c8000600 { |
234 | compatible = "nvidia,tegra20-sdhci"; | 234 | compatible = "nvidia,tegra20-sdhci"; |
235 | reg = <0xc8000600 0x200>; | 235 | reg = <0xc8000600 0x200>; |
236 | interrupts = <0 31 0x04>; | 236 | interrupts = <0 31 0x04>; |
237 | status = "disable"; | 237 | status = "disabled"; |
238 | }; | 238 | }; |
239 | 239 | ||
240 | pmu { | 240 | pmu { |
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra30-cardhu.dts index 36321bceec46..c169bced131e 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra30-cardhu.dts | |||
@@ -144,7 +144,6 @@ | |||
144 | 144 | ||
145 | sdhci@78000600 { | 145 | sdhci@78000600 { |
146 | status = "okay"; | 146 | status = "okay"; |
147 | support-8bit; | ||
148 | bus-width = <8>; | 147 | bus-width = <8>; |
149 | }; | 148 | }; |
150 | 149 | ||
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 2dcc09e784b5..da740191771f 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -82,7 +82,7 @@ | |||
82 | reg = <0x70006000 0x40>; | 82 | reg = <0x70006000 0x40>; |
83 | reg-shift = <2>; | 83 | reg-shift = <2>; |
84 | interrupts = <0 36 0x04>; | 84 | interrupts = <0 36 0x04>; |
85 | status = "disable"; | 85 | status = "disabled"; |
86 | }; | 86 | }; |
87 | 87 | ||
88 | serial@70006040 { | 88 | serial@70006040 { |
@@ -90,7 +90,7 @@ | |||
90 | reg = <0x70006040 0x40>; | 90 | reg = <0x70006040 0x40>; |
91 | reg-shift = <2>; | 91 | reg-shift = <2>; |
92 | interrupts = <0 37 0x04>; | 92 | interrupts = <0 37 0x04>; |
93 | status = "disable"; | 93 | status = "disabled"; |
94 | }; | 94 | }; |
95 | 95 | ||
96 | serial@70006200 { | 96 | serial@70006200 { |
@@ -98,7 +98,7 @@ | |||
98 | reg = <0x70006200 0x100>; | 98 | reg = <0x70006200 0x100>; |
99 | reg-shift = <2>; | 99 | reg-shift = <2>; |
100 | interrupts = <0 46 0x04>; | 100 | interrupts = <0 46 0x04>; |
101 | status = "disable"; | 101 | status = "disabled"; |
102 | }; | 102 | }; |
103 | 103 | ||
104 | serial@70006300 { | 104 | serial@70006300 { |
@@ -106,7 +106,7 @@ | |||
106 | reg = <0x70006300 0x100>; | 106 | reg = <0x70006300 0x100>; |
107 | reg-shift = <2>; | 107 | reg-shift = <2>; |
108 | interrupts = <0 90 0x04>; | 108 | interrupts = <0 90 0x04>; |
109 | status = "disable"; | 109 | status = "disabled"; |
110 | }; | 110 | }; |
111 | 111 | ||
112 | serial@70006400 { | 112 | serial@70006400 { |
@@ -114,7 +114,7 @@ | |||
114 | reg = <0x70006400 0x100>; | 114 | reg = <0x70006400 0x100>; |
115 | reg-shift = <2>; | 115 | reg-shift = <2>; |
116 | interrupts = <0 91 0x04>; | 116 | interrupts = <0 91 0x04>; |
117 | status = "disable"; | 117 | status = "disabled"; |
118 | }; | 118 | }; |
119 | 119 | ||
120 | i2c@7000c000 { | 120 | i2c@7000c000 { |
@@ -123,7 +123,7 @@ | |||
123 | interrupts = <0 38 0x04>; | 123 | interrupts = <0 38 0x04>; |
124 | #address-cells = <1>; | 124 | #address-cells = <1>; |
125 | #size-cells = <0>; | 125 | #size-cells = <0>; |
126 | status = "disable"; | 126 | status = "disabled"; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | i2c@7000c400 { | 129 | i2c@7000c400 { |
@@ -132,7 +132,7 @@ | |||
132 | interrupts = <0 84 0x04>; | 132 | interrupts = <0 84 0x04>; |
133 | #address-cells = <1>; | 133 | #address-cells = <1>; |
134 | #size-cells = <0>; | 134 | #size-cells = <0>; |
135 | status = "disable"; | 135 | status = "disabled"; |
136 | }; | 136 | }; |
137 | 137 | ||
138 | i2c@7000c500 { | 138 | i2c@7000c500 { |
@@ -141,7 +141,7 @@ | |||
141 | interrupts = <0 92 0x04>; | 141 | interrupts = <0 92 0x04>; |
142 | #address-cells = <1>; | 142 | #address-cells = <1>; |
143 | #size-cells = <0>; | 143 | #size-cells = <0>; |
144 | status = "disable"; | 144 | status = "disabled"; |
145 | }; | 145 | }; |
146 | 146 | ||
147 | i2c@7000c700 { | 147 | i2c@7000c700 { |
@@ -150,7 +150,7 @@ | |||
150 | interrupts = <0 120 0x04>; | 150 | interrupts = <0 120 0x04>; |
151 | #address-cells = <1>; | 151 | #address-cells = <1>; |
152 | #size-cells = <0>; | 152 | #size-cells = <0>; |
153 | status = "disable"; | 153 | status = "disabled"; |
154 | }; | 154 | }; |
155 | 155 | ||
156 | i2c@7000d000 { | 156 | i2c@7000d000 { |
@@ -159,7 +159,7 @@ | |||
159 | interrupts = <0 53 0x04>; | 159 | interrupts = <0 53 0x04>; |
160 | #address-cells = <1>; | 160 | #address-cells = <1>; |
161 | #size-cells = <0>; | 161 | #size-cells = <0>; |
162 | status = "disable"; | 162 | status = "disabled"; |
163 | }; | 163 | }; |
164 | 164 | ||
165 | pmc { | 165 | pmc { |
@@ -167,7 +167,7 @@ | |||
167 | reg = <0x7000e400 0x400>; | 167 | reg = <0x7000e400 0x400>; |
168 | }; | 168 | }; |
169 | 169 | ||
170 | mc { | 170 | memory-controller { |
171 | compatible = "nvidia,tegra30-mc"; | 171 | compatible = "nvidia,tegra30-mc"; |
172 | reg = <0x7000f000 0x010 | 172 | reg = <0x7000f000 0x010 |
173 | 0x7000f03c 0x1b4 | 173 | 0x7000f03c 0x1b4 |
@@ -201,35 +201,35 @@ | |||
201 | compatible = "nvidia,tegra30-i2s"; | 201 | compatible = "nvidia,tegra30-i2s"; |
202 | reg = <0x70080300 0x100>; | 202 | reg = <0x70080300 0x100>; |
203 | nvidia,ahub-cif-ids = <4 4>; | 203 | nvidia,ahub-cif-ids = <4 4>; |
204 | status = "disable"; | 204 | status = "disabled"; |
205 | }; | 205 | }; |
206 | 206 | ||
207 | tegra_i2s1: i2s@70080400 { | 207 | tegra_i2s1: i2s@70080400 { |
208 | compatible = "nvidia,tegra30-i2s"; | 208 | compatible = "nvidia,tegra30-i2s"; |
209 | reg = <0x70080400 0x100>; | 209 | reg = <0x70080400 0x100>; |
210 | nvidia,ahub-cif-ids = <5 5>; | 210 | nvidia,ahub-cif-ids = <5 5>; |
211 | status = "disable"; | 211 | status = "disabled"; |
212 | }; | 212 | }; |
213 | 213 | ||
214 | tegra_i2s2: i2s@70080500 { | 214 | tegra_i2s2: i2s@70080500 { |
215 | compatible = "nvidia,tegra30-i2s"; | 215 | compatible = "nvidia,tegra30-i2s"; |
216 | reg = <0x70080500 0x100>; | 216 | reg = <0x70080500 0x100>; |
217 | nvidia,ahub-cif-ids = <6 6>; | 217 | nvidia,ahub-cif-ids = <6 6>; |
218 | status = "disable"; | 218 | status = "disabled"; |
219 | }; | 219 | }; |
220 | 220 | ||
221 | tegra_i2s3: i2s@70080600 { | 221 | tegra_i2s3: i2s@70080600 { |
222 | compatible = "nvidia,tegra30-i2s"; | 222 | compatible = "nvidia,tegra30-i2s"; |
223 | reg = <0x70080600 0x100>; | 223 | reg = <0x70080600 0x100>; |
224 | nvidia,ahub-cif-ids = <7 7>; | 224 | nvidia,ahub-cif-ids = <7 7>; |
225 | status = "disable"; | 225 | status = "disabled"; |
226 | }; | 226 | }; |
227 | 227 | ||
228 | tegra_i2s4: i2s@70080700 { | 228 | tegra_i2s4: i2s@70080700 { |
229 | compatible = "nvidia,tegra30-i2s"; | 229 | compatible = "nvidia,tegra30-i2s"; |
230 | reg = <0x70080700 0x100>; | 230 | reg = <0x70080700 0x100>; |
231 | nvidia,ahub-cif-ids = <8 8>; | 231 | nvidia,ahub-cif-ids = <8 8>; |
232 | status = "disable"; | 232 | status = "disabled"; |
233 | }; | 233 | }; |
234 | }; | 234 | }; |
235 | 235 | ||
@@ -237,28 +237,28 @@ | |||
237 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 237 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
238 | reg = <0x78000000 0x200>; | 238 | reg = <0x78000000 0x200>; |
239 | interrupts = <0 14 0x04>; | 239 | interrupts = <0 14 0x04>; |
240 | status = "disable"; | 240 | status = "disabled"; |
241 | }; | 241 | }; |
242 | 242 | ||
243 | sdhci@78000200 { | 243 | sdhci@78000200 { |
244 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 244 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
245 | reg = <0x78000200 0x200>; | 245 | reg = <0x78000200 0x200>; |
246 | interrupts = <0 15 0x04>; | 246 | interrupts = <0 15 0x04>; |
247 | status = "disable"; | 247 | status = "disabled"; |
248 | }; | 248 | }; |
249 | 249 | ||
250 | sdhci@78000400 { | 250 | sdhci@78000400 { |
251 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 251 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
252 | reg = <0x78000400 0x200>; | 252 | reg = <0x78000400 0x200>; |
253 | interrupts = <0 19 0x04>; | 253 | interrupts = <0 19 0x04>; |
254 | status = "disable"; | 254 | status = "disabled"; |
255 | }; | 255 | }; |
256 | 256 | ||
257 | sdhci@78000600 { | 257 | sdhci@78000600 { |
258 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 258 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
259 | reg = <0x78000600 0x200>; | 259 | reg = <0x78000600 0x200>; |
260 | interrupts = <0 31 0x04>; | 260 | interrupts = <0 31 0x04>; |
261 | status = "disable"; | 261 | status = "disabled"; |
262 | }; | 262 | }; |
263 | 263 | ||
264 | pmu { | 264 | pmu { |
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 8349d4e97e2b..16cedb42c0c3 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -40,13 +40,6 @@ | |||
40 | #include <asm/mach/irq.h> | 40 | #include <asm/mach/irq.h> |
41 | #include <asm/mach/time.h> | 41 | #include <asm/mach/time.h> |
42 | 42 | ||
43 | /* | ||
44 | * No architecture-specific irq_finish function defined in arm/arch/irqs.h. | ||
45 | */ | ||
46 | #ifndef irq_finish | ||
47 | #define irq_finish(irq) do { } while (0) | ||
48 | #endif | ||
49 | |||
50 | unsigned long irq_err_count; | 43 | unsigned long irq_err_count; |
51 | 44 | ||
52 | int arch_show_interrupts(struct seq_file *p, int prec) | 45 | int arch_show_interrupts(struct seq_file *p, int prec) |
@@ -85,9 +78,6 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs) | |||
85 | generic_handle_irq(irq); | 78 | generic_handle_irq(irq); |
86 | } | 79 | } |
87 | 80 | ||
88 | /* AT91 specific workaround */ | ||
89 | irq_finish(irq); | ||
90 | |||
91 | irq_exit(); | 81 | irq_exit(); |
92 | set_irq_regs(old_regs); | 82 | set_irq_regs(old_regs); |
93 | } | 83 | } |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 19505c0a3f01..c8050b14e615 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -29,12 +29,16 @@ comment "Atmel AT91 Processor" | |||
29 | config SOC_AT91SAM9 | 29 | config SOC_AT91SAM9 |
30 | bool | 30 | bool |
31 | select CPU_ARM926T | 31 | select CPU_ARM926T |
32 | select MULTI_IRQ_HANDLER | ||
33 | select SPARSE_IRQ | ||
32 | select AT91_SAM9_TIME | 34 | select AT91_SAM9_TIME |
33 | select AT91_SAM9_SMC | 35 | select AT91_SAM9_SMC |
34 | 36 | ||
35 | config SOC_AT91RM9200 | 37 | config SOC_AT91RM9200 |
36 | bool "AT91RM9200" | 38 | bool "AT91RM9200" |
37 | select CPU_ARM920T | 39 | select CPU_ARM920T |
40 | select MULTI_IRQ_HANDLER | ||
41 | select SPARSE_IRQ | ||
38 | select GENERIC_CLOCKEVENTS | 42 | select GENERIC_CLOCKEVENTS |
39 | select HAVE_AT91_DBGU0 | 43 | select HAVE_AT91_DBGU0 |
40 | 44 | ||
@@ -140,6 +144,8 @@ config ARCH_AT91SAM9G45 | |||
140 | config ARCH_AT91X40 | 144 | config ARCH_AT91X40 |
141 | bool "AT91x40" | 145 | bool "AT91x40" |
142 | depends on !MMU | 146 | depends on !MMU |
147 | select MULTI_IRQ_HANDLER | ||
148 | select SPARSE_IRQ | ||
143 | select ARCH_USES_GETTIMEOFFSET | 149 | select ARCH_USES_GETTIMEOFFSET |
144 | 150 | ||
145 | endchoice | 151 | endchoice |
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 26917687fc30..6f50c6722276 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
18 | #include <asm/system_misc.h> | 18 | #include <asm/system_misc.h> |
19 | #include <mach/at91rm9200.h> | 19 | #include <mach/at91rm9200.h> |
20 | #include <mach/at91_aic.h> | ||
20 | #include <mach/at91_pmc.h> | 21 | #include <mach/at91_pmc.h> |
21 | #include <mach/at91_st.h> | 22 | #include <mach/at91_st.h> |
22 | #include <mach/cpu.h> | 23 | #include <mach/cpu.h> |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index e6b7d0533dd7..01fb7325fecc 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -41,8 +41,8 @@ static struct resource usbh_resources[] = { | |||
41 | .flags = IORESOURCE_MEM, | 41 | .flags = IORESOURCE_MEM, |
42 | }, | 42 | }, |
43 | [1] = { | 43 | [1] = { |
44 | .start = AT91RM9200_ID_UHP, | 44 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, |
45 | .end = AT91RM9200_ID_UHP, | 45 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, |
46 | .flags = IORESOURCE_IRQ, | 46 | .flags = IORESOURCE_IRQ, |
47 | }, | 47 | }, |
48 | }; | 48 | }; |
@@ -94,8 +94,8 @@ static struct resource udc_resources[] = { | |||
94 | .flags = IORESOURCE_MEM, | 94 | .flags = IORESOURCE_MEM, |
95 | }, | 95 | }, |
96 | [1] = { | 96 | [1] = { |
97 | .start = AT91RM9200_ID_UDP, | 97 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, |
98 | .end = AT91RM9200_ID_UDP, | 98 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, |
99 | .flags = IORESOURCE_IRQ, | 99 | .flags = IORESOURCE_IRQ, |
100 | }, | 100 | }, |
101 | }; | 101 | }; |
@@ -145,8 +145,8 @@ static struct resource eth_resources[] = { | |||
145 | .flags = IORESOURCE_MEM, | 145 | .flags = IORESOURCE_MEM, |
146 | }, | 146 | }, |
147 | [1] = { | 147 | [1] = { |
148 | .start = AT91RM9200_ID_EMAC, | 148 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, |
149 | .end = AT91RM9200_ID_EMAC, | 149 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, |
150 | .flags = IORESOURCE_IRQ, | 150 | .flags = IORESOURCE_IRQ, |
151 | }, | 151 | }, |
152 | }; | 152 | }; |
@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { | |||
305 | .flags = IORESOURCE_MEM, | 305 | .flags = IORESOURCE_MEM, |
306 | }, | 306 | }, |
307 | [1] = { | 307 | [1] = { |
308 | .start = AT91RM9200_ID_MCI, | 308 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, |
309 | .end = AT91RM9200_ID_MCI, | 309 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, |
310 | .flags = IORESOURCE_IRQ, | 310 | .flags = IORESOURCE_IRQ, |
311 | }, | 311 | }, |
312 | }; | 312 | }; |
@@ -488,8 +488,8 @@ static struct resource twi_resources[] = { | |||
488 | .flags = IORESOURCE_MEM, | 488 | .flags = IORESOURCE_MEM, |
489 | }, | 489 | }, |
490 | [1] = { | 490 | [1] = { |
491 | .start = AT91RM9200_ID_TWI, | 491 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, |
492 | .end = AT91RM9200_ID_TWI, | 492 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, |
493 | .flags = IORESOURCE_IRQ, | 493 | .flags = IORESOURCE_IRQ, |
494 | }, | 494 | }, |
495 | }; | 495 | }; |
@@ -532,8 +532,8 @@ static struct resource spi_resources[] = { | |||
532 | .flags = IORESOURCE_MEM, | 532 | .flags = IORESOURCE_MEM, |
533 | }, | 533 | }, |
534 | [1] = { | 534 | [1] = { |
535 | .start = AT91RM9200_ID_SPI, | 535 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, |
536 | .end = AT91RM9200_ID_SPI, | 536 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, |
537 | .flags = IORESOURCE_IRQ, | 537 | .flags = IORESOURCE_IRQ, |
538 | }, | 538 | }, |
539 | }; | 539 | }; |
@@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = { | |||
598 | .flags = IORESOURCE_MEM, | 598 | .flags = IORESOURCE_MEM, |
599 | }, | 599 | }, |
600 | [1] = { | 600 | [1] = { |
601 | .start = AT91RM9200_ID_TC0, | 601 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, |
602 | .end = AT91RM9200_ID_TC0, | 602 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, |
603 | .flags = IORESOURCE_IRQ, | 603 | .flags = IORESOURCE_IRQ, |
604 | }, | 604 | }, |
605 | [2] = { | 605 | [2] = { |
606 | .start = AT91RM9200_ID_TC1, | 606 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, |
607 | .end = AT91RM9200_ID_TC1, | 607 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, |
608 | .flags = IORESOURCE_IRQ, | 608 | .flags = IORESOURCE_IRQ, |
609 | }, | 609 | }, |
610 | [3] = { | 610 | [3] = { |
611 | .start = AT91RM9200_ID_TC2, | 611 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, |
612 | .end = AT91RM9200_ID_TC2, | 612 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, |
613 | .flags = IORESOURCE_IRQ, | 613 | .flags = IORESOURCE_IRQ, |
614 | }, | 614 | }, |
615 | }; | 615 | }; |
@@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = { | |||
628 | .flags = IORESOURCE_MEM, | 628 | .flags = IORESOURCE_MEM, |
629 | }, | 629 | }, |
630 | [1] = { | 630 | [1] = { |
631 | .start = AT91RM9200_ID_TC3, | 631 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, |
632 | .end = AT91RM9200_ID_TC3, | 632 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, |
633 | .flags = IORESOURCE_IRQ, | 633 | .flags = IORESOURCE_IRQ, |
634 | }, | 634 | }, |
635 | [2] = { | 635 | [2] = { |
636 | .start = AT91RM9200_ID_TC4, | 636 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, |
637 | .end = AT91RM9200_ID_TC4, | 637 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, |
638 | .flags = IORESOURCE_IRQ, | 638 | .flags = IORESOURCE_IRQ, |
639 | }, | 639 | }, |
640 | [3] = { | 640 | [3] = { |
641 | .start = AT91RM9200_ID_TC5, | 641 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, |
642 | .end = AT91RM9200_ID_TC5, | 642 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, |
643 | .flags = IORESOURCE_IRQ, | 643 | .flags = IORESOURCE_IRQ, |
644 | }, | 644 | }, |
645 | }; | 645 | }; |
@@ -673,8 +673,8 @@ static struct resource rtc_resources[] = { | |||
673 | .flags = IORESOURCE_MEM, | 673 | .flags = IORESOURCE_MEM, |
674 | }, | 674 | }, |
675 | [1] = { | 675 | [1] = { |
676 | .start = AT91_ID_SYS, | 676 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
677 | .end = AT91_ID_SYS, | 677 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
678 | .flags = IORESOURCE_IRQ, | 678 | .flags = IORESOURCE_IRQ, |
679 | }, | 679 | }, |
680 | }; | 680 | }; |
@@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = { | |||
729 | .flags = IORESOURCE_MEM, | 729 | .flags = IORESOURCE_MEM, |
730 | }, | 730 | }, |
731 | [1] = { | 731 | [1] = { |
732 | .start = AT91RM9200_ID_SSC0, | 732 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, |
733 | .end = AT91RM9200_ID_SSC0, | 733 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, |
734 | .flags = IORESOURCE_IRQ, | 734 | .flags = IORESOURCE_IRQ, |
735 | }, | 735 | }, |
736 | }; | 736 | }; |
@@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = { | |||
771 | .flags = IORESOURCE_MEM, | 771 | .flags = IORESOURCE_MEM, |
772 | }, | 772 | }, |
773 | [1] = { | 773 | [1] = { |
774 | .start = AT91RM9200_ID_SSC1, | 774 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, |
775 | .end = AT91RM9200_ID_SSC1, | 775 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, |
776 | .flags = IORESOURCE_IRQ, | 776 | .flags = IORESOURCE_IRQ, |
777 | }, | 777 | }, |
778 | }; | 778 | }; |
@@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = { | |||
813 | .flags = IORESOURCE_MEM, | 813 | .flags = IORESOURCE_MEM, |
814 | }, | 814 | }, |
815 | [1] = { | 815 | [1] = { |
816 | .start = AT91RM9200_ID_SSC2, | 816 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, |
817 | .end = AT91RM9200_ID_SSC2, | 817 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, |
818 | .flags = IORESOURCE_IRQ, | 818 | .flags = IORESOURCE_IRQ, |
819 | }, | 819 | }, |
820 | }; | 820 | }; |
@@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = { | |||
897 | .flags = IORESOURCE_MEM, | 897 | .flags = IORESOURCE_MEM, |
898 | }, | 898 | }, |
899 | [1] = { | 899 | [1] = { |
900 | .start = AT91_ID_SYS, | 900 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
901 | .end = AT91_ID_SYS, | 901 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
902 | .flags = IORESOURCE_IRQ, | 902 | .flags = IORESOURCE_IRQ, |
903 | }, | 903 | }, |
904 | }; | 904 | }; |
@@ -935,8 +935,8 @@ static struct resource uart0_resources[] = { | |||
935 | .flags = IORESOURCE_MEM, | 935 | .flags = IORESOURCE_MEM, |
936 | }, | 936 | }, |
937 | [1] = { | 937 | [1] = { |
938 | .start = AT91RM9200_ID_US0, | 938 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0, |
939 | .end = AT91RM9200_ID_US0, | 939 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0, |
940 | .flags = IORESOURCE_IRQ, | 940 | .flags = IORESOURCE_IRQ, |
941 | }, | 941 | }, |
942 | }; | 942 | }; |
@@ -984,8 +984,8 @@ static struct resource uart1_resources[] = { | |||
984 | .flags = IORESOURCE_MEM, | 984 | .flags = IORESOURCE_MEM, |
985 | }, | 985 | }, |
986 | [1] = { | 986 | [1] = { |
987 | .start = AT91RM9200_ID_US1, | 987 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1, |
988 | .end = AT91RM9200_ID_US1, | 988 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1, |
989 | .flags = IORESOURCE_IRQ, | 989 | .flags = IORESOURCE_IRQ, |
990 | }, | 990 | }, |
991 | }; | 991 | }; |
@@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = { | |||
1035 | .flags = IORESOURCE_MEM, | 1035 | .flags = IORESOURCE_MEM, |
1036 | }, | 1036 | }, |
1037 | [1] = { | 1037 | [1] = { |
1038 | .start = AT91RM9200_ID_US2, | 1038 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2, |
1039 | .end = AT91RM9200_ID_US2, | 1039 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2, |
1040 | .flags = IORESOURCE_IRQ, | 1040 | .flags = IORESOURCE_IRQ, |
1041 | }, | 1041 | }, |
1042 | }; | 1042 | }; |
@@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = { | |||
1078 | .flags = IORESOURCE_MEM, | 1078 | .flags = IORESOURCE_MEM, |
1079 | }, | 1079 | }, |
1080 | [1] = { | 1080 | [1] = { |
1081 | .start = AT91RM9200_ID_US3, | 1081 | .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3, |
1082 | .end = AT91RM9200_ID_US3, | 1082 | .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3, |
1083 | .flags = IORESOURCE_IRQ, | 1083 | .flags = IORESOURCE_IRQ, |
1084 | }, | 1084 | }, |
1085 | }; | 1085 | }; |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 2b1e438ed878..30c7f26a4668 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <mach/cpu.h> | 20 | #include <mach/cpu.h> |
21 | #include <mach/at91_dbgu.h> | 21 | #include <mach/at91_dbgu.h> |
22 | #include <mach/at91sam9260.h> | 22 | #include <mach/at91sam9260.h> |
23 | #include <mach/at91_aic.h> | ||
23 | #include <mach/at91_pmc.h> | 24 | #include <mach/at91_pmc.h> |
24 | #include <mach/at91_rstc.h> | 25 | #include <mach/at91_rstc.h> |
25 | 26 | ||
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 0ded951f785a..7b9c2ba396ed 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { | |||
45 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
46 | }, | 46 | }, |
47 | [1] = { | 47 | [1] = { |
48 | .start = AT91SAM9260_ID_UHP, | 48 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, |
49 | .end = AT91SAM9260_ID_UHP, | 49 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, |
50 | .flags = IORESOURCE_IRQ, | 50 | .flags = IORESOURCE_IRQ, |
51 | }, | 51 | }, |
52 | }; | 52 | }; |
@@ -98,8 +98,8 @@ static struct resource udc_resources[] = { | |||
98 | .flags = IORESOURCE_MEM, | 98 | .flags = IORESOURCE_MEM, |
99 | }, | 99 | }, |
100 | [1] = { | 100 | [1] = { |
101 | .start = AT91SAM9260_ID_UDP, | 101 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, |
102 | .end = AT91SAM9260_ID_UDP, | 102 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, |
103 | .flags = IORESOURCE_IRQ, | 103 | .flags = IORESOURCE_IRQ, |
104 | }, | 104 | }, |
105 | }; | 105 | }; |
@@ -149,8 +149,8 @@ static struct resource eth_resources[] = { | |||
149 | .flags = IORESOURCE_MEM, | 149 | .flags = IORESOURCE_MEM, |
150 | }, | 150 | }, |
151 | [1] = { | 151 | [1] = { |
152 | .start = AT91SAM9260_ID_EMAC, | 152 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, |
153 | .end = AT91SAM9260_ID_EMAC, | 153 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, |
154 | .flags = IORESOURCE_IRQ, | 154 | .flags = IORESOURCE_IRQ, |
155 | }, | 155 | }, |
156 | }; | 156 | }; |
@@ -223,8 +223,8 @@ static struct resource mmc_resources[] = { | |||
223 | .flags = IORESOURCE_MEM, | 223 | .flags = IORESOURCE_MEM, |
224 | }, | 224 | }, |
225 | [1] = { | 225 | [1] = { |
226 | .start = AT91SAM9260_ID_MCI, | 226 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, |
227 | .end = AT91SAM9260_ID_MCI, | 227 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, |
228 | .flags = IORESOURCE_IRQ, | 228 | .flags = IORESOURCE_IRQ, |
229 | }, | 229 | }, |
230 | }; | 230 | }; |
@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { | |||
305 | .flags = IORESOURCE_MEM, | 305 | .flags = IORESOURCE_MEM, |
306 | }, | 306 | }, |
307 | [1] = { | 307 | [1] = { |
308 | .start = AT91SAM9260_ID_MCI, | 308 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, |
309 | .end = AT91SAM9260_ID_MCI, | 309 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, |
310 | .flags = IORESOURCE_IRQ, | 310 | .flags = IORESOURCE_IRQ, |
311 | }, | 311 | }, |
312 | }; | 312 | }; |
@@ -496,8 +496,8 @@ static struct resource twi_resources[] = { | |||
496 | .flags = IORESOURCE_MEM, | 496 | .flags = IORESOURCE_MEM, |
497 | }, | 497 | }, |
498 | [1] = { | 498 | [1] = { |
499 | .start = AT91SAM9260_ID_TWI, | 499 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, |
500 | .end = AT91SAM9260_ID_TWI, | 500 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, |
501 | .flags = IORESOURCE_IRQ, | 501 | .flags = IORESOURCE_IRQ, |
502 | }, | 502 | }, |
503 | }; | 503 | }; |
@@ -540,8 +540,8 @@ static struct resource spi0_resources[] = { | |||
540 | .flags = IORESOURCE_MEM, | 540 | .flags = IORESOURCE_MEM, |
541 | }, | 541 | }, |
542 | [1] = { | 542 | [1] = { |
543 | .start = AT91SAM9260_ID_SPI0, | 543 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, |
544 | .end = AT91SAM9260_ID_SPI0, | 544 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, |
545 | .flags = IORESOURCE_IRQ, | 545 | .flags = IORESOURCE_IRQ, |
546 | }, | 546 | }, |
547 | }; | 547 | }; |
@@ -566,8 +566,8 @@ static struct resource spi1_resources[] = { | |||
566 | .flags = IORESOURCE_MEM, | 566 | .flags = IORESOURCE_MEM, |
567 | }, | 567 | }, |
568 | [1] = { | 568 | [1] = { |
569 | .start = AT91SAM9260_ID_SPI1, | 569 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, |
570 | .end = AT91SAM9260_ID_SPI1, | 570 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, |
571 | .flags = IORESOURCE_IRQ, | 571 | .flags = IORESOURCE_IRQ, |
572 | }, | 572 | }, |
573 | }; | 573 | }; |
@@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = { | |||
652 | .flags = IORESOURCE_MEM, | 652 | .flags = IORESOURCE_MEM, |
653 | }, | 653 | }, |
654 | [1] = { | 654 | [1] = { |
655 | .start = AT91SAM9260_ID_TC0, | 655 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, |
656 | .end = AT91SAM9260_ID_TC0, | 656 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, |
657 | .flags = IORESOURCE_IRQ, | 657 | .flags = IORESOURCE_IRQ, |
658 | }, | 658 | }, |
659 | [2] = { | 659 | [2] = { |
660 | .start = AT91SAM9260_ID_TC1, | 660 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, |
661 | .end = AT91SAM9260_ID_TC1, | 661 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, |
662 | .flags = IORESOURCE_IRQ, | 662 | .flags = IORESOURCE_IRQ, |
663 | }, | 663 | }, |
664 | [3] = { | 664 | [3] = { |
665 | .start = AT91SAM9260_ID_TC2, | 665 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, |
666 | .end = AT91SAM9260_ID_TC2, | 666 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, |
667 | .flags = IORESOURCE_IRQ, | 667 | .flags = IORESOURCE_IRQ, |
668 | }, | 668 | }, |
669 | }; | 669 | }; |
@@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = { | |||
682 | .flags = IORESOURCE_MEM, | 682 | .flags = IORESOURCE_MEM, |
683 | }, | 683 | }, |
684 | [1] = { | 684 | [1] = { |
685 | .start = AT91SAM9260_ID_TC3, | 685 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, |
686 | .end = AT91SAM9260_ID_TC3, | 686 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, |
687 | .flags = IORESOURCE_IRQ, | 687 | .flags = IORESOURCE_IRQ, |
688 | }, | 688 | }, |
689 | [2] = { | 689 | [2] = { |
690 | .start = AT91SAM9260_ID_TC4, | 690 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, |
691 | .end = AT91SAM9260_ID_TC4, | 691 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, |
692 | .flags = IORESOURCE_IRQ, | 692 | .flags = IORESOURCE_IRQ, |
693 | }, | 693 | }, |
694 | [3] = { | 694 | [3] = { |
695 | .start = AT91SAM9260_ID_TC5, | 695 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, |
696 | .end = AT91SAM9260_ID_TC5, | 696 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, |
697 | .flags = IORESOURCE_IRQ, | 697 | .flags = IORESOURCE_IRQ, |
698 | }, | 698 | }, |
699 | }; | 699 | }; |
@@ -807,8 +807,8 @@ static struct resource ssc_resources[] = { | |||
807 | .flags = IORESOURCE_MEM, | 807 | .flags = IORESOURCE_MEM, |
808 | }, | 808 | }, |
809 | [1] = { | 809 | [1] = { |
810 | .start = AT91SAM9260_ID_SSC, | 810 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, |
811 | .end = AT91SAM9260_ID_SSC, | 811 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, |
812 | .flags = IORESOURCE_IRQ, | 812 | .flags = IORESOURCE_IRQ, |
813 | }, | 813 | }, |
814 | }; | 814 | }; |
@@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = { | |||
882 | .flags = IORESOURCE_MEM, | 882 | .flags = IORESOURCE_MEM, |
883 | }, | 883 | }, |
884 | [1] = { | 884 | [1] = { |
885 | .start = AT91_ID_SYS, | 885 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
886 | .end = AT91_ID_SYS, | 886 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
887 | .flags = IORESOURCE_IRQ, | 887 | .flags = IORESOURCE_IRQ, |
888 | }, | 888 | }, |
889 | }; | 889 | }; |
@@ -920,8 +920,8 @@ static struct resource uart0_resources[] = { | |||
920 | .flags = IORESOURCE_MEM, | 920 | .flags = IORESOURCE_MEM, |
921 | }, | 921 | }, |
922 | [1] = { | 922 | [1] = { |
923 | .start = AT91SAM9260_ID_US0, | 923 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, |
924 | .end = AT91SAM9260_ID_US0, | 924 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, |
925 | .flags = IORESOURCE_IRQ, | 925 | .flags = IORESOURCE_IRQ, |
926 | }, | 926 | }, |
927 | }; | 927 | }; |
@@ -971,8 +971,8 @@ static struct resource uart1_resources[] = { | |||
971 | .flags = IORESOURCE_MEM, | 971 | .flags = IORESOURCE_MEM, |
972 | }, | 972 | }, |
973 | [1] = { | 973 | [1] = { |
974 | .start = AT91SAM9260_ID_US1, | 974 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, |
975 | .end = AT91SAM9260_ID_US1, | 975 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, |
976 | .flags = IORESOURCE_IRQ, | 976 | .flags = IORESOURCE_IRQ, |
977 | }, | 977 | }, |
978 | }; | 978 | }; |
@@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = { | |||
1014 | .flags = IORESOURCE_MEM, | 1014 | .flags = IORESOURCE_MEM, |
1015 | }, | 1015 | }, |
1016 | [1] = { | 1016 | [1] = { |
1017 | .start = AT91SAM9260_ID_US2, | 1017 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, |
1018 | .end = AT91SAM9260_ID_US2, | 1018 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, |
1019 | .flags = IORESOURCE_IRQ, | 1019 | .flags = IORESOURCE_IRQ, |
1020 | }, | 1020 | }, |
1021 | }; | 1021 | }; |
@@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = { | |||
1057 | .flags = IORESOURCE_MEM, | 1057 | .flags = IORESOURCE_MEM, |
1058 | }, | 1058 | }, |
1059 | [1] = { | 1059 | [1] = { |
1060 | .start = AT91SAM9260_ID_US3, | 1060 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, |
1061 | .end = AT91SAM9260_ID_US3, | 1061 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, |
1062 | .flags = IORESOURCE_IRQ, | 1062 | .flags = IORESOURCE_IRQ, |
1063 | }, | 1063 | }, |
1064 | }; | 1064 | }; |
@@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = { | |||
1100 | .flags = IORESOURCE_MEM, | 1100 | .flags = IORESOURCE_MEM, |
1101 | }, | 1101 | }, |
1102 | [1] = { | 1102 | [1] = { |
1103 | .start = AT91SAM9260_ID_US4, | 1103 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, |
1104 | .end = AT91SAM9260_ID_US4, | 1104 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, |
1105 | .flags = IORESOURCE_IRQ, | 1105 | .flags = IORESOURCE_IRQ, |
1106 | }, | 1106 | }, |
1107 | }; | 1107 | }; |
@@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = { | |||
1138 | .flags = IORESOURCE_MEM, | 1138 | .flags = IORESOURCE_MEM, |
1139 | }, | 1139 | }, |
1140 | [1] = { | 1140 | [1] = { |
1141 | .start = AT91SAM9260_ID_US5, | 1141 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, |
1142 | .end = AT91SAM9260_ID_US5, | 1142 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, |
1143 | .flags = IORESOURCE_IRQ, | 1143 | .flags = IORESOURCE_IRQ, |
1144 | }, | 1144 | }, |
1145 | }; | 1145 | }; |
@@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = { | |||
1357 | .flags = IORESOURCE_MEM, | 1357 | .flags = IORESOURCE_MEM, |
1358 | }, | 1358 | }, |
1359 | [1] = { | 1359 | [1] = { |
1360 | .start = AT91SAM9260_ID_ADC, | 1360 | .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, |
1361 | .end = AT91SAM9260_ID_ADC, | 1361 | .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, |
1362 | .flags = IORESOURCE_IRQ, | 1362 | .flags = IORESOURCE_IRQ, |
1363 | }, | 1363 | }, |
1364 | }; | 1364 | }; |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index c77d503d09d1..f40762c5fede 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/system_misc.h> | 19 | #include <asm/system_misc.h> |
20 | #include <mach/cpu.h> | 20 | #include <mach/cpu.h> |
21 | #include <mach/at91sam9261.h> | 21 | #include <mach/at91sam9261.h> |
22 | #include <mach/at91_aic.h> | ||
22 | #include <mach/at91_pmc.h> | 23 | #include <mach/at91_pmc.h> |
23 | #include <mach/at91_rstc.h> | 24 | #include <mach/at91_rstc.h> |
24 | 25 | ||
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 9295e90b08ff..8df5c1bdff92 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { | |||
45 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
46 | }, | 46 | }, |
47 | [1] = { | 47 | [1] = { |
48 | .start = AT91SAM9261_ID_UHP, | 48 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, |
49 | .end = AT91SAM9261_ID_UHP, | 49 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, |
50 | .flags = IORESOURCE_IRQ, | 50 | .flags = IORESOURCE_IRQ, |
51 | }, | 51 | }, |
52 | }; | 52 | }; |
@@ -98,8 +98,8 @@ static struct resource udc_resources[] = { | |||
98 | .flags = IORESOURCE_MEM, | 98 | .flags = IORESOURCE_MEM, |
99 | }, | 99 | }, |
100 | [1] = { | 100 | [1] = { |
101 | .start = AT91SAM9261_ID_UDP, | 101 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, |
102 | .end = AT91SAM9261_ID_UDP, | 102 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, |
103 | .flags = IORESOURCE_IRQ, | 103 | .flags = IORESOURCE_IRQ, |
104 | }, | 104 | }, |
105 | }; | 105 | }; |
@@ -148,8 +148,8 @@ static struct resource mmc_resources[] = { | |||
148 | .flags = IORESOURCE_MEM, | 148 | .flags = IORESOURCE_MEM, |
149 | }, | 149 | }, |
150 | [1] = { | 150 | [1] = { |
151 | .start = AT91SAM9261_ID_MCI, | 151 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, |
152 | .end = AT91SAM9261_ID_MCI, | 152 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, |
153 | .flags = IORESOURCE_IRQ, | 153 | .flags = IORESOURCE_IRQ, |
154 | }, | 154 | }, |
155 | }; | 155 | }; |
@@ -310,8 +310,8 @@ static struct resource twi_resources[] = { | |||
310 | .flags = IORESOURCE_MEM, | 310 | .flags = IORESOURCE_MEM, |
311 | }, | 311 | }, |
312 | [1] = { | 312 | [1] = { |
313 | .start = AT91SAM9261_ID_TWI, | 313 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, |
314 | .end = AT91SAM9261_ID_TWI, | 314 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, |
315 | .flags = IORESOURCE_IRQ, | 315 | .flags = IORESOURCE_IRQ, |
316 | }, | 316 | }, |
317 | }; | 317 | }; |
@@ -354,8 +354,8 @@ static struct resource spi0_resources[] = { | |||
354 | .flags = IORESOURCE_MEM, | 354 | .flags = IORESOURCE_MEM, |
355 | }, | 355 | }, |
356 | [1] = { | 356 | [1] = { |
357 | .start = AT91SAM9261_ID_SPI0, | 357 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, |
358 | .end = AT91SAM9261_ID_SPI0, | 358 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, |
359 | .flags = IORESOURCE_IRQ, | 359 | .flags = IORESOURCE_IRQ, |
360 | }, | 360 | }, |
361 | }; | 361 | }; |
@@ -380,8 +380,8 @@ static struct resource spi1_resources[] = { | |||
380 | .flags = IORESOURCE_MEM, | 380 | .flags = IORESOURCE_MEM, |
381 | }, | 381 | }, |
382 | [1] = { | 382 | [1] = { |
383 | .start = AT91SAM9261_ID_SPI1, | 383 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, |
384 | .end = AT91SAM9261_ID_SPI1, | 384 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, |
385 | .flags = IORESOURCE_IRQ, | 385 | .flags = IORESOURCE_IRQ, |
386 | }, | 386 | }, |
387 | }; | 387 | }; |
@@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = { | |||
468 | .flags = IORESOURCE_MEM, | 468 | .flags = IORESOURCE_MEM, |
469 | }, | 469 | }, |
470 | [1] = { | 470 | [1] = { |
471 | .start = AT91SAM9261_ID_LCDC, | 471 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, |
472 | .end = AT91SAM9261_ID_LCDC, | 472 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, |
473 | .flags = IORESOURCE_IRQ, | 473 | .flags = IORESOURCE_IRQ, |
474 | }, | 474 | }, |
475 | #if defined(CONFIG_FB_INTSRAM) | 475 | #if defined(CONFIG_FB_INTSRAM) |
@@ -566,18 +566,18 @@ static struct resource tcb_resources[] = { | |||
566 | .flags = IORESOURCE_MEM, | 566 | .flags = IORESOURCE_MEM, |
567 | }, | 567 | }, |
568 | [1] = { | 568 | [1] = { |
569 | .start = AT91SAM9261_ID_TC0, | 569 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, |
570 | .end = AT91SAM9261_ID_TC0, | 570 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, |
571 | .flags = IORESOURCE_IRQ, | 571 | .flags = IORESOURCE_IRQ, |
572 | }, | 572 | }, |
573 | [2] = { | 573 | [2] = { |
574 | .start = AT91SAM9261_ID_TC1, | 574 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, |
575 | .end = AT91SAM9261_ID_TC1, | 575 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, |
576 | .flags = IORESOURCE_IRQ, | 576 | .flags = IORESOURCE_IRQ, |
577 | }, | 577 | }, |
578 | [3] = { | 578 | [3] = { |
579 | .start = AT91SAM9261_ID_TC2, | 579 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, |
580 | .end = AT91SAM9261_ID_TC2, | 580 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, |
581 | .flags = IORESOURCE_IRQ, | 581 | .flags = IORESOURCE_IRQ, |
582 | }, | 582 | }, |
583 | }; | 583 | }; |
@@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = { | |||
689 | .flags = IORESOURCE_MEM, | 689 | .flags = IORESOURCE_MEM, |
690 | }, | 690 | }, |
691 | [1] = { | 691 | [1] = { |
692 | .start = AT91SAM9261_ID_SSC0, | 692 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, |
693 | .end = AT91SAM9261_ID_SSC0, | 693 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, |
694 | .flags = IORESOURCE_IRQ, | 694 | .flags = IORESOURCE_IRQ, |
695 | }, | 695 | }, |
696 | }; | 696 | }; |
@@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = { | |||
731 | .flags = IORESOURCE_MEM, | 731 | .flags = IORESOURCE_MEM, |
732 | }, | 732 | }, |
733 | [1] = { | 733 | [1] = { |
734 | .start = AT91SAM9261_ID_SSC1, | 734 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, |
735 | .end = AT91SAM9261_ID_SSC1, | 735 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, |
736 | .flags = IORESOURCE_IRQ, | 736 | .flags = IORESOURCE_IRQ, |
737 | }, | 737 | }, |
738 | }; | 738 | }; |
@@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = { | |||
773 | .flags = IORESOURCE_MEM, | 773 | .flags = IORESOURCE_MEM, |
774 | }, | 774 | }, |
775 | [1] = { | 775 | [1] = { |
776 | .start = AT91SAM9261_ID_SSC2, | 776 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, |
777 | .end = AT91SAM9261_ID_SSC2, | 777 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, |
778 | .flags = IORESOURCE_IRQ, | 778 | .flags = IORESOURCE_IRQ, |
779 | }, | 779 | }, |
780 | }; | 780 | }; |
@@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = { | |||
857 | .flags = IORESOURCE_MEM, | 857 | .flags = IORESOURCE_MEM, |
858 | }, | 858 | }, |
859 | [1] = { | 859 | [1] = { |
860 | .start = AT91_ID_SYS, | 860 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
861 | .end = AT91_ID_SYS, | 861 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
862 | .flags = IORESOURCE_IRQ, | 862 | .flags = IORESOURCE_IRQ, |
863 | }, | 863 | }, |
864 | }; | 864 | }; |
@@ -895,8 +895,8 @@ static struct resource uart0_resources[] = { | |||
895 | .flags = IORESOURCE_MEM, | 895 | .flags = IORESOURCE_MEM, |
896 | }, | 896 | }, |
897 | [1] = { | 897 | [1] = { |
898 | .start = AT91SAM9261_ID_US0, | 898 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, |
899 | .end = AT91SAM9261_ID_US0, | 899 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, |
900 | .flags = IORESOURCE_IRQ, | 900 | .flags = IORESOURCE_IRQ, |
901 | }, | 901 | }, |
902 | }; | 902 | }; |
@@ -938,8 +938,8 @@ static struct resource uart1_resources[] = { | |||
938 | .flags = IORESOURCE_MEM, | 938 | .flags = IORESOURCE_MEM, |
939 | }, | 939 | }, |
940 | [1] = { | 940 | [1] = { |
941 | .start = AT91SAM9261_ID_US1, | 941 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, |
942 | .end = AT91SAM9261_ID_US1, | 942 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, |
943 | .flags = IORESOURCE_IRQ, | 943 | .flags = IORESOURCE_IRQ, |
944 | }, | 944 | }, |
945 | }; | 945 | }; |
@@ -981,8 +981,8 @@ static struct resource uart2_resources[] = { | |||
981 | .flags = IORESOURCE_MEM, | 981 | .flags = IORESOURCE_MEM, |
982 | }, | 982 | }, |
983 | [1] = { | 983 | [1] = { |
984 | .start = AT91SAM9261_ID_US2, | 984 | .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, |
985 | .end = AT91SAM9261_ID_US2, | 985 | .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, |
986 | .flags = IORESOURCE_IRQ, | 986 | .flags = IORESOURCE_IRQ, |
987 | }, | 987 | }, |
988 | }; | 988 | }; |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index ed91c7e9f7c2..84b38105231e 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
19 | #include <asm/system_misc.h> | 19 | #include <asm/system_misc.h> |
20 | #include <mach/at91sam9263.h> | 20 | #include <mach/at91sam9263.h> |
21 | #include <mach/at91_aic.h> | ||
21 | #include <mach/at91_pmc.h> | 22 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 23 | #include <mach/at91_rstc.h> |
23 | 24 | ||
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 175e0009eaa9..eb6bbf86fb9f 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -44,8 +44,8 @@ static struct resource usbh_resources[] = { | |||
44 | .flags = IORESOURCE_MEM, | 44 | .flags = IORESOURCE_MEM, |
45 | }, | 45 | }, |
46 | [1] = { | 46 | [1] = { |
47 | .start = AT91SAM9263_ID_UHP, | 47 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, |
48 | .end = AT91SAM9263_ID_UHP, | 48 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, |
49 | .flags = IORESOURCE_IRQ, | 49 | .flags = IORESOURCE_IRQ, |
50 | }, | 50 | }, |
51 | }; | 51 | }; |
@@ -104,8 +104,8 @@ static struct resource udc_resources[] = { | |||
104 | .flags = IORESOURCE_MEM, | 104 | .flags = IORESOURCE_MEM, |
105 | }, | 105 | }, |
106 | [1] = { | 106 | [1] = { |
107 | .start = AT91SAM9263_ID_UDP, | 107 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, |
108 | .end = AT91SAM9263_ID_UDP, | 108 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, |
109 | .flags = IORESOURCE_IRQ, | 109 | .flags = IORESOURCE_IRQ, |
110 | }, | 110 | }, |
111 | }; | 111 | }; |
@@ -155,8 +155,8 @@ static struct resource eth_resources[] = { | |||
155 | .flags = IORESOURCE_MEM, | 155 | .flags = IORESOURCE_MEM, |
156 | }, | 156 | }, |
157 | [1] = { | 157 | [1] = { |
158 | .start = AT91SAM9263_ID_EMAC, | 158 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, |
159 | .end = AT91SAM9263_ID_EMAC, | 159 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, |
160 | .flags = IORESOURCE_IRQ, | 160 | .flags = IORESOURCE_IRQ, |
161 | }, | 161 | }, |
162 | }; | 162 | }; |
@@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = { | |||
229 | .flags = IORESOURCE_MEM, | 229 | .flags = IORESOURCE_MEM, |
230 | }, | 230 | }, |
231 | [1] = { | 231 | [1] = { |
232 | .start = AT91SAM9263_ID_MCI0, | 232 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, |
233 | .end = AT91SAM9263_ID_MCI0, | 233 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, |
234 | .flags = IORESOURCE_IRQ, | 234 | .flags = IORESOURCE_IRQ, |
235 | }, | 235 | }, |
236 | }; | 236 | }; |
@@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = { | |||
254 | .flags = IORESOURCE_MEM, | 254 | .flags = IORESOURCE_MEM, |
255 | }, | 255 | }, |
256 | [1] = { | 256 | [1] = { |
257 | .start = AT91SAM9263_ID_MCI1, | 257 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, |
258 | .end = AT91SAM9263_ID_MCI1, | 258 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, |
259 | .flags = IORESOURCE_IRQ, | 259 | .flags = IORESOURCE_IRQ, |
260 | }, | 260 | }, |
261 | }; | 261 | }; |
@@ -567,8 +567,8 @@ static struct resource twi_resources[] = { | |||
567 | .flags = IORESOURCE_MEM, | 567 | .flags = IORESOURCE_MEM, |
568 | }, | 568 | }, |
569 | [1] = { | 569 | [1] = { |
570 | .start = AT91SAM9263_ID_TWI, | 570 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, |
571 | .end = AT91SAM9263_ID_TWI, | 571 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, |
572 | .flags = IORESOURCE_IRQ, | 572 | .flags = IORESOURCE_IRQ, |
573 | }, | 573 | }, |
574 | }; | 574 | }; |
@@ -611,8 +611,8 @@ static struct resource spi0_resources[] = { | |||
611 | .flags = IORESOURCE_MEM, | 611 | .flags = IORESOURCE_MEM, |
612 | }, | 612 | }, |
613 | [1] = { | 613 | [1] = { |
614 | .start = AT91SAM9263_ID_SPI0, | 614 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, |
615 | .end = AT91SAM9263_ID_SPI0, | 615 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, |
616 | .flags = IORESOURCE_IRQ, | 616 | .flags = IORESOURCE_IRQ, |
617 | }, | 617 | }, |
618 | }; | 618 | }; |
@@ -637,8 +637,8 @@ static struct resource spi1_resources[] = { | |||
637 | .flags = IORESOURCE_MEM, | 637 | .flags = IORESOURCE_MEM, |
638 | }, | 638 | }, |
639 | [1] = { | 639 | [1] = { |
640 | .start = AT91SAM9263_ID_SPI1, | 640 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, |
641 | .end = AT91SAM9263_ID_SPI1, | 641 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, |
642 | .flags = IORESOURCE_IRQ, | 642 | .flags = IORESOURCE_IRQ, |
643 | }, | 643 | }, |
644 | }; | 644 | }; |
@@ -725,8 +725,8 @@ static struct resource ac97_resources[] = { | |||
725 | .flags = IORESOURCE_MEM, | 725 | .flags = IORESOURCE_MEM, |
726 | }, | 726 | }, |
727 | [1] = { | 727 | [1] = { |
728 | .start = AT91SAM9263_ID_AC97C, | 728 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, |
729 | .end = AT91SAM9263_ID_AC97C, | 729 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, |
730 | .flags = IORESOURCE_IRQ, | 730 | .flags = IORESOURCE_IRQ, |
731 | }, | 731 | }, |
732 | }; | 732 | }; |
@@ -776,8 +776,8 @@ static struct resource can_resources[] = { | |||
776 | .flags = IORESOURCE_MEM, | 776 | .flags = IORESOURCE_MEM, |
777 | }, | 777 | }, |
778 | [1] = { | 778 | [1] = { |
779 | .start = AT91SAM9263_ID_CAN, | 779 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, |
780 | .end = AT91SAM9263_ID_CAN, | 780 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, |
781 | .flags = IORESOURCE_IRQ, | 781 | .flags = IORESOURCE_IRQ, |
782 | }, | 782 | }, |
783 | }; | 783 | }; |
@@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = { | |||
816 | .flags = IORESOURCE_MEM, | 816 | .flags = IORESOURCE_MEM, |
817 | }, | 817 | }, |
818 | [1] = { | 818 | [1] = { |
819 | .start = AT91SAM9263_ID_LCDC, | 819 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, |
820 | .end = AT91SAM9263_ID_LCDC, | 820 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, |
821 | .flags = IORESOURCE_IRQ, | 821 | .flags = IORESOURCE_IRQ, |
822 | }, | 822 | }, |
823 | }; | 823 | }; |
@@ -883,8 +883,8 @@ struct resource isi_resources[] = { | |||
883 | .flags = IORESOURCE_MEM, | 883 | .flags = IORESOURCE_MEM, |
884 | }, | 884 | }, |
885 | [1] = { | 885 | [1] = { |
886 | .start = AT91SAM9263_ID_ISI, | 886 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, |
887 | .end = AT91SAM9263_ID_ISI, | 887 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, |
888 | .flags = IORESOURCE_IRQ, | 888 | .flags = IORESOURCE_IRQ, |
889 | }, | 889 | }, |
890 | }; | 890 | }; |
@@ -940,8 +940,8 @@ static struct resource tcb_resources[] = { | |||
940 | .flags = IORESOURCE_MEM, | 940 | .flags = IORESOURCE_MEM, |
941 | }, | 941 | }, |
942 | [1] = { | 942 | [1] = { |
943 | .start = AT91SAM9263_ID_TCB, | 943 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, |
944 | .end = AT91SAM9263_ID_TCB, | 944 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, |
945 | .flags = IORESOURCE_IRQ, | 945 | .flags = IORESOURCE_IRQ, |
946 | }, | 946 | }, |
947 | }; | 947 | }; |
@@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = { | |||
1108 | .flags = IORESOURCE_MEM, | 1108 | .flags = IORESOURCE_MEM, |
1109 | }, | 1109 | }, |
1110 | [1] = { | 1110 | [1] = { |
1111 | .start = AT91SAM9263_ID_PWMC, | 1111 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, |
1112 | .end = AT91SAM9263_ID_PWMC, | 1112 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, |
1113 | .flags = IORESOURCE_IRQ, | 1113 | .flags = IORESOURCE_IRQ, |
1114 | }, | 1114 | }, |
1115 | }; | 1115 | }; |
@@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = { | |||
1161 | .flags = IORESOURCE_MEM, | 1161 | .flags = IORESOURCE_MEM, |
1162 | }, | 1162 | }, |
1163 | [1] = { | 1163 | [1] = { |
1164 | .start = AT91SAM9263_ID_SSC0, | 1164 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, |
1165 | .end = AT91SAM9263_ID_SSC0, | 1165 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, |
1166 | .flags = IORESOURCE_IRQ, | 1166 | .flags = IORESOURCE_IRQ, |
1167 | }, | 1167 | }, |
1168 | }; | 1168 | }; |
@@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = { | |||
1203 | .flags = IORESOURCE_MEM, | 1203 | .flags = IORESOURCE_MEM, |
1204 | }, | 1204 | }, |
1205 | [1] = { | 1205 | [1] = { |
1206 | .start = AT91SAM9263_ID_SSC1, | 1206 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, |
1207 | .end = AT91SAM9263_ID_SSC1, | 1207 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, |
1208 | .flags = IORESOURCE_IRQ, | 1208 | .flags = IORESOURCE_IRQ, |
1209 | }, | 1209 | }, |
1210 | }; | 1210 | }; |
@@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = { | |||
1284 | .flags = IORESOURCE_MEM, | 1284 | .flags = IORESOURCE_MEM, |
1285 | }, | 1285 | }, |
1286 | [1] = { | 1286 | [1] = { |
1287 | .start = AT91_ID_SYS, | 1287 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
1288 | .end = AT91_ID_SYS, | 1288 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
1289 | .flags = IORESOURCE_IRQ, | 1289 | .flags = IORESOURCE_IRQ, |
1290 | }, | 1290 | }, |
1291 | }; | 1291 | }; |
@@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = { | |||
1322 | .flags = IORESOURCE_MEM, | 1322 | .flags = IORESOURCE_MEM, |
1323 | }, | 1323 | }, |
1324 | [1] = { | 1324 | [1] = { |
1325 | .start = AT91SAM9263_ID_US0, | 1325 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, |
1326 | .end = AT91SAM9263_ID_US0, | 1326 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, |
1327 | .flags = IORESOURCE_IRQ, | 1327 | .flags = IORESOURCE_IRQ, |
1328 | }, | 1328 | }, |
1329 | }; | 1329 | }; |
@@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = { | |||
1365 | .flags = IORESOURCE_MEM, | 1365 | .flags = IORESOURCE_MEM, |
1366 | }, | 1366 | }, |
1367 | [1] = { | 1367 | [1] = { |
1368 | .start = AT91SAM9263_ID_US1, | 1368 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, |
1369 | .end = AT91SAM9263_ID_US1, | 1369 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, |
1370 | .flags = IORESOURCE_IRQ, | 1370 | .flags = IORESOURCE_IRQ, |
1371 | }, | 1371 | }, |
1372 | }; | 1372 | }; |
@@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = { | |||
1408 | .flags = IORESOURCE_MEM, | 1408 | .flags = IORESOURCE_MEM, |
1409 | }, | 1409 | }, |
1410 | [1] = { | 1410 | [1] = { |
1411 | .start = AT91SAM9263_ID_US2, | 1411 | .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, |
1412 | .end = AT91SAM9263_ID_US2, | 1412 | .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, |
1413 | .flags = IORESOURCE_IRQ, | 1413 | .flags = IORESOURCE_IRQ, |
1414 | }, | 1414 | }, |
1415 | }; | 1415 | }; |
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index a94758b42737..ffc0957d7623 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c | |||
@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { | |||
137 | .name = "at91_tick", | 137 | .name = "at91_tick", |
138 | .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 138 | .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
139 | .handler = at91sam926x_pit_interrupt, | 139 | .handler = at91sam926x_pit_interrupt, |
140 | .irq = AT91_ID_SYS, | 140 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
141 | }; | 141 | }; |
142 | 142 | ||
143 | static void at91sam926x_pit_reset(void) | 143 | static void at91sam926x_pit_reset(void) |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 4792682d52b9..977127368a7d 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
19 | #include <asm/system_misc.h> | 19 | #include <asm/system_misc.h> |
20 | #include <mach/at91sam9g45.h> | 20 | #include <mach/at91sam9g45.h> |
21 | #include <mach/at91_aic.h> | ||
21 | #include <mach/at91_pmc.h> | 22 | #include <mach/at91_pmc.h> |
22 | #include <mach/cpu.h> | 23 | #include <mach/cpu.h> |
23 | 24 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 933fc9afe7d0..40fb79df2de0 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = { | |||
53 | .flags = IORESOURCE_MEM, | 53 | .flags = IORESOURCE_MEM, |
54 | }, | 54 | }, |
55 | [1] = { | 55 | [1] = { |
56 | .start = AT91SAM9G45_ID_DMA, | 56 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, |
57 | .end = AT91SAM9G45_ID_DMA, | 57 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, |
58 | .flags = IORESOURCE_IRQ, | 58 | .flags = IORESOURCE_IRQ, |
59 | }, | 59 | }, |
60 | }; | 60 | }; |
@@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = { | |||
94 | .flags = IORESOURCE_MEM, | 94 | .flags = IORESOURCE_MEM, |
95 | }, | 95 | }, |
96 | [1] = { | 96 | [1] = { |
97 | .start = AT91SAM9G45_ID_UHPHS, | 97 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, |
98 | .end = AT91SAM9G45_ID_UHPHS, | 98 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, |
99 | .flags = IORESOURCE_IRQ, | 99 | .flags = IORESOURCE_IRQ, |
100 | }, | 100 | }, |
101 | }; | 101 | }; |
@@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = { | |||
156 | .flags = IORESOURCE_MEM, | 156 | .flags = IORESOURCE_MEM, |
157 | }, | 157 | }, |
158 | [1] = { | 158 | [1] = { |
159 | .start = AT91SAM9G45_ID_UHPHS, | 159 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, |
160 | .end = AT91SAM9G45_ID_UHPHS, | 160 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, |
161 | .flags = IORESOURCE_IRQ, | 161 | .flags = IORESOURCE_IRQ, |
162 | }, | 162 | }, |
163 | }; | 163 | }; |
@@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = { | |||
213 | .flags = IORESOURCE_MEM, | 213 | .flags = IORESOURCE_MEM, |
214 | }, | 214 | }, |
215 | [2] = { | 215 | [2] = { |
216 | .start = AT91SAM9G45_ID_UDPHS, | 216 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, |
217 | .end = AT91SAM9G45_ID_UDPHS, | 217 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, |
218 | .flags = IORESOURCE_IRQ, | 218 | .flags = IORESOURCE_IRQ, |
219 | }, | 219 | }, |
220 | }; | 220 | }; |
@@ -296,8 +296,8 @@ static struct resource eth_resources[] = { | |||
296 | .flags = IORESOURCE_MEM, | 296 | .flags = IORESOURCE_MEM, |
297 | }, | 297 | }, |
298 | [1] = { | 298 | [1] = { |
299 | .start = AT91SAM9G45_ID_EMAC, | 299 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, |
300 | .end = AT91SAM9G45_ID_EMAC, | 300 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, |
301 | .flags = IORESOURCE_IRQ, | 301 | .flags = IORESOURCE_IRQ, |
302 | }, | 302 | }, |
303 | }; | 303 | }; |
@@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = { | |||
370 | .flags = IORESOURCE_MEM, | 370 | .flags = IORESOURCE_MEM, |
371 | }, | 371 | }, |
372 | [1] = { | 372 | [1] = { |
373 | .start = AT91SAM9G45_ID_MCI0, | 373 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, |
374 | .end = AT91SAM9G45_ID_MCI0, | 374 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, |
375 | .flags = IORESOURCE_IRQ, | 375 | .flags = IORESOURCE_IRQ, |
376 | }, | 376 | }, |
377 | }; | 377 | }; |
@@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = { | |||
395 | .flags = IORESOURCE_MEM, | 395 | .flags = IORESOURCE_MEM, |
396 | }, | 396 | }, |
397 | [1] = { | 397 | [1] = { |
398 | .start = AT91SAM9G45_ID_MCI1, | 398 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, |
399 | .end = AT91SAM9G45_ID_MCI1, | 399 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, |
400 | .flags = IORESOURCE_IRQ, | 400 | .flags = IORESOURCE_IRQ, |
401 | }, | 401 | }, |
402 | }; | 402 | }; |
@@ -645,8 +645,8 @@ static struct resource twi0_resources[] = { | |||
645 | .flags = IORESOURCE_MEM, | 645 | .flags = IORESOURCE_MEM, |
646 | }, | 646 | }, |
647 | [1] = { | 647 | [1] = { |
648 | .start = AT91SAM9G45_ID_TWI0, | 648 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, |
649 | .end = AT91SAM9G45_ID_TWI0, | 649 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, |
650 | .flags = IORESOURCE_IRQ, | 650 | .flags = IORESOURCE_IRQ, |
651 | }, | 651 | }, |
652 | }; | 652 | }; |
@@ -665,8 +665,8 @@ static struct resource twi1_resources[] = { | |||
665 | .flags = IORESOURCE_MEM, | 665 | .flags = IORESOURCE_MEM, |
666 | }, | 666 | }, |
667 | [1] = { | 667 | [1] = { |
668 | .start = AT91SAM9G45_ID_TWI1, | 668 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, |
669 | .end = AT91SAM9G45_ID_TWI1, | 669 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, |
670 | .flags = IORESOURCE_IRQ, | 670 | .flags = IORESOURCE_IRQ, |
671 | }, | 671 | }, |
672 | }; | 672 | }; |
@@ -720,8 +720,8 @@ static struct resource spi0_resources[] = { | |||
720 | .flags = IORESOURCE_MEM, | 720 | .flags = IORESOURCE_MEM, |
721 | }, | 721 | }, |
722 | [1] = { | 722 | [1] = { |
723 | .start = AT91SAM9G45_ID_SPI0, | 723 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, |
724 | .end = AT91SAM9G45_ID_SPI0, | 724 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, |
725 | .flags = IORESOURCE_IRQ, | 725 | .flags = IORESOURCE_IRQ, |
726 | }, | 726 | }, |
727 | }; | 727 | }; |
@@ -746,8 +746,8 @@ static struct resource spi1_resources[] = { | |||
746 | .flags = IORESOURCE_MEM, | 746 | .flags = IORESOURCE_MEM, |
747 | }, | 747 | }, |
748 | [1] = { | 748 | [1] = { |
749 | .start = AT91SAM9G45_ID_SPI1, | 749 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, |
750 | .end = AT91SAM9G45_ID_SPI1, | 750 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, |
751 | .flags = IORESOURCE_IRQ, | 751 | .flags = IORESOURCE_IRQ, |
752 | }, | 752 | }, |
753 | }; | 753 | }; |
@@ -834,8 +834,8 @@ static struct resource ac97_resources[] = { | |||
834 | .flags = IORESOURCE_MEM, | 834 | .flags = IORESOURCE_MEM, |
835 | }, | 835 | }, |
836 | [1] = { | 836 | [1] = { |
837 | .start = AT91SAM9G45_ID_AC97C, | 837 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, |
838 | .end = AT91SAM9G45_ID_AC97C, | 838 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, |
839 | .flags = IORESOURCE_IRQ, | 839 | .flags = IORESOURCE_IRQ, |
840 | }, | 840 | }, |
841 | }; | 841 | }; |
@@ -887,8 +887,8 @@ struct resource isi_resources[] = { | |||
887 | .flags = IORESOURCE_MEM, | 887 | .flags = IORESOURCE_MEM, |
888 | }, | 888 | }, |
889 | [1] = { | 889 | [1] = { |
890 | .start = AT91SAM9G45_ID_ISI, | 890 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, |
891 | .end = AT91SAM9G45_ID_ISI, | 891 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, |
892 | .flags = IORESOURCE_IRQ, | 892 | .flags = IORESOURCE_IRQ, |
893 | }, | 893 | }, |
894 | }; | 894 | }; |
@@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = { | |||
979 | .flags = IORESOURCE_MEM, | 979 | .flags = IORESOURCE_MEM, |
980 | }, | 980 | }, |
981 | [1] = { | 981 | [1] = { |
982 | .start = AT91SAM9G45_ID_LCDC, | 982 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, |
983 | .end = AT91SAM9G45_ID_LCDC, | 983 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, |
984 | .flags = IORESOURCE_IRQ, | 984 | .flags = IORESOURCE_IRQ, |
985 | }, | 985 | }, |
986 | }; | 986 | }; |
@@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = { | |||
1054 | .flags = IORESOURCE_MEM, | 1054 | .flags = IORESOURCE_MEM, |
1055 | }, | 1055 | }, |
1056 | [1] = { | 1056 | [1] = { |
1057 | .start = AT91SAM9G45_ID_TCB, | 1057 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, |
1058 | .end = AT91SAM9G45_ID_TCB, | 1058 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, |
1059 | .flags = IORESOURCE_IRQ, | 1059 | .flags = IORESOURCE_IRQ, |
1060 | }, | 1060 | }, |
1061 | }; | 1061 | }; |
@@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = { | |||
1075 | .flags = IORESOURCE_MEM, | 1075 | .flags = IORESOURCE_MEM, |
1076 | }, | 1076 | }, |
1077 | [1] = { | 1077 | [1] = { |
1078 | .start = AT91SAM9G45_ID_TCB, | 1078 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, |
1079 | .end = AT91SAM9G45_ID_TCB, | 1079 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, |
1080 | .flags = IORESOURCE_IRQ, | 1080 | .flags = IORESOURCE_IRQ, |
1081 | }, | 1081 | }, |
1082 | }; | 1082 | }; |
@@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = { | |||
1110 | .flags = IORESOURCE_MEM, | 1110 | .flags = IORESOURCE_MEM, |
1111 | }, | 1111 | }, |
1112 | [1] = { | 1112 | [1] = { |
1113 | .start = AT91_ID_SYS, | 1113 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
1114 | .end = AT91_ID_SYS, | 1114 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
1115 | .flags = IORESOURCE_IRQ, | 1115 | .flags = IORESOURCE_IRQ, |
1116 | }, | 1116 | }, |
1117 | }; | 1117 | }; |
@@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = { | |||
1147 | .flags = IORESOURCE_MEM, | 1147 | .flags = IORESOURCE_MEM, |
1148 | }, | 1148 | }, |
1149 | [1] = { | 1149 | [1] = { |
1150 | .start = AT91SAM9G45_ID_TSC, | 1150 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, |
1151 | .end = AT91SAM9G45_ID_TSC, | 1151 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, |
1152 | .flags = IORESOURCE_IRQ, | 1152 | .flags = IORESOURCE_IRQ, |
1153 | } | 1153 | } |
1154 | }; | 1154 | }; |
@@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = { | |||
1197 | .flags = IORESOURCE_MEM, | 1197 | .flags = IORESOURCE_MEM, |
1198 | }, | 1198 | }, |
1199 | [1] = { | 1199 | [1] = { |
1200 | .start = AT91SAM9G45_ID_TSC, | 1200 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, |
1201 | .end = AT91SAM9G45_ID_TSC, | 1201 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, |
1202 | .flags = IORESOURCE_IRQ, | 1202 | .flags = IORESOURCE_IRQ, |
1203 | } | 1203 | } |
1204 | }; | 1204 | }; |
@@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = { | |||
1400 | .flags = IORESOURCE_MEM, | 1400 | .flags = IORESOURCE_MEM, |
1401 | }, | 1401 | }, |
1402 | [1] = { | 1402 | [1] = { |
1403 | .start = AT91SAM9G45_ID_PWMC, | 1403 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, |
1404 | .end = AT91SAM9G45_ID_PWMC, | 1404 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, |
1405 | .flags = IORESOURCE_IRQ, | 1405 | .flags = IORESOURCE_IRQ, |
1406 | }, | 1406 | }, |
1407 | }; | 1407 | }; |
@@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = { | |||
1453 | .flags = IORESOURCE_MEM, | 1453 | .flags = IORESOURCE_MEM, |
1454 | }, | 1454 | }, |
1455 | [1] = { | 1455 | [1] = { |
1456 | .start = AT91SAM9G45_ID_SSC0, | 1456 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, |
1457 | .end = AT91SAM9G45_ID_SSC0, | 1457 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, |
1458 | .flags = IORESOURCE_IRQ, | 1458 | .flags = IORESOURCE_IRQ, |
1459 | }, | 1459 | }, |
1460 | }; | 1460 | }; |
@@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = { | |||
1495 | .flags = IORESOURCE_MEM, | 1495 | .flags = IORESOURCE_MEM, |
1496 | }, | 1496 | }, |
1497 | [1] = { | 1497 | [1] = { |
1498 | .start = AT91SAM9G45_ID_SSC1, | 1498 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, |
1499 | .end = AT91SAM9G45_ID_SSC1, | 1499 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, |
1500 | .flags = IORESOURCE_IRQ, | 1500 | .flags = IORESOURCE_IRQ, |
1501 | }, | 1501 | }, |
1502 | }; | 1502 | }; |
@@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = { | |||
1575 | .flags = IORESOURCE_MEM, | 1575 | .flags = IORESOURCE_MEM, |
1576 | }, | 1576 | }, |
1577 | [1] = { | 1577 | [1] = { |
1578 | .start = AT91_ID_SYS, | 1578 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
1579 | .end = AT91_ID_SYS, | 1579 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
1580 | .flags = IORESOURCE_IRQ, | 1580 | .flags = IORESOURCE_IRQ, |
1581 | }, | 1581 | }, |
1582 | }; | 1582 | }; |
@@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = { | |||
1613 | .flags = IORESOURCE_MEM, | 1613 | .flags = IORESOURCE_MEM, |
1614 | }, | 1614 | }, |
1615 | [1] = { | 1615 | [1] = { |
1616 | .start = AT91SAM9G45_ID_US0, | 1616 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, |
1617 | .end = AT91SAM9G45_ID_US0, | 1617 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, |
1618 | .flags = IORESOURCE_IRQ, | 1618 | .flags = IORESOURCE_IRQ, |
1619 | }, | 1619 | }, |
1620 | }; | 1620 | }; |
@@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = { | |||
1656 | .flags = IORESOURCE_MEM, | 1656 | .flags = IORESOURCE_MEM, |
1657 | }, | 1657 | }, |
1658 | [1] = { | 1658 | [1] = { |
1659 | .start = AT91SAM9G45_ID_US1, | 1659 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, |
1660 | .end = AT91SAM9G45_ID_US1, | 1660 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, |
1661 | .flags = IORESOURCE_IRQ, | 1661 | .flags = IORESOURCE_IRQ, |
1662 | }, | 1662 | }, |
1663 | }; | 1663 | }; |
@@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = { | |||
1699 | .flags = IORESOURCE_MEM, | 1699 | .flags = IORESOURCE_MEM, |
1700 | }, | 1700 | }, |
1701 | [1] = { | 1701 | [1] = { |
1702 | .start = AT91SAM9G45_ID_US2, | 1702 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, |
1703 | .end = AT91SAM9G45_ID_US2, | 1703 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, |
1704 | .flags = IORESOURCE_IRQ, | 1704 | .flags = IORESOURCE_IRQ, |
1705 | }, | 1705 | }, |
1706 | }; | 1706 | }; |
@@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = { | |||
1742 | .flags = IORESOURCE_MEM, | 1742 | .flags = IORESOURCE_MEM, |
1743 | }, | 1743 | }, |
1744 | [1] = { | 1744 | [1] = { |
1745 | .start = AT91SAM9G45_ID_US3, | 1745 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, |
1746 | .end = AT91SAM9G45_ID_US3, | 1746 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, |
1747 | .flags = IORESOURCE_IRQ, | 1747 | .flags = IORESOURCE_IRQ, |
1748 | }, | 1748 | }, |
1749 | }; | 1749 | }; |
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index e420085a57ef..72ce50a50de5 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <mach/cpu.h> | 19 | #include <mach/cpu.h> |
20 | #include <mach/at91_dbgu.h> | 20 | #include <mach/at91_dbgu.h> |
21 | #include <mach/at91sam9rl.h> | 21 | #include <mach/at91sam9rl.h> |
22 | #include <mach/at91_aic.h> | ||
22 | #include <mach/at91_pmc.h> | 23 | #include <mach/at91_pmc.h> |
23 | #include <mach/at91_rstc.h> | 24 | #include <mach/at91_rstc.h> |
24 | 25 | ||
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 9c0b1481a9a7..f09fff932172 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = { | |||
41 | .flags = IORESOURCE_MEM, | 41 | .flags = IORESOURCE_MEM, |
42 | }, | 42 | }, |
43 | [2] = { | 43 | [2] = { |
44 | .start = AT91SAM9RL_ID_DMA, | 44 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, |
45 | .end = AT91SAM9RL_ID_DMA, | 45 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, |
46 | .flags = IORESOURCE_IRQ, | 46 | .flags = IORESOURCE_IRQ, |
47 | }, | 47 | }, |
48 | }; | 48 | }; |
@@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = { | |||
84 | .flags = IORESOURCE_MEM, | 84 | .flags = IORESOURCE_MEM, |
85 | }, | 85 | }, |
86 | [2] = { | 86 | [2] = { |
87 | .start = AT91SAM9RL_ID_UDPHS, | 87 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, |
88 | .end = AT91SAM9RL_ID_UDPHS, | 88 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, |
89 | .flags = IORESOURCE_IRQ, | 89 | .flags = IORESOURCE_IRQ, |
90 | }, | 90 | }, |
91 | }; | 91 | }; |
@@ -172,8 +172,8 @@ static struct resource mmc_resources[] = { | |||
172 | .flags = IORESOURCE_MEM, | 172 | .flags = IORESOURCE_MEM, |
173 | }, | 173 | }, |
174 | [1] = { | 174 | [1] = { |
175 | .start = AT91SAM9RL_ID_MCI, | 175 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, |
176 | .end = AT91SAM9RL_ID_MCI, | 176 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, |
177 | .flags = IORESOURCE_IRQ, | 177 | .flags = IORESOURCE_IRQ, |
178 | }, | 178 | }, |
179 | }; | 179 | }; |
@@ -339,8 +339,8 @@ static struct resource twi_resources[] = { | |||
339 | .flags = IORESOURCE_MEM, | 339 | .flags = IORESOURCE_MEM, |
340 | }, | 340 | }, |
341 | [1] = { | 341 | [1] = { |
342 | .start = AT91SAM9RL_ID_TWI0, | 342 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, |
343 | .end = AT91SAM9RL_ID_TWI0, | 343 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, |
344 | .flags = IORESOURCE_IRQ, | 344 | .flags = IORESOURCE_IRQ, |
345 | }, | 345 | }, |
346 | }; | 346 | }; |
@@ -383,8 +383,8 @@ static struct resource spi_resources[] = { | |||
383 | .flags = IORESOURCE_MEM, | 383 | .flags = IORESOURCE_MEM, |
384 | }, | 384 | }, |
385 | [1] = { | 385 | [1] = { |
386 | .start = AT91SAM9RL_ID_SPI, | 386 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, |
387 | .end = AT91SAM9RL_ID_SPI, | 387 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, |
388 | .flags = IORESOURCE_IRQ, | 388 | .flags = IORESOURCE_IRQ, |
389 | }, | 389 | }, |
390 | }; | 390 | }; |
@@ -452,8 +452,8 @@ static struct resource ac97_resources[] = { | |||
452 | .flags = IORESOURCE_MEM, | 452 | .flags = IORESOURCE_MEM, |
453 | }, | 453 | }, |
454 | [1] = { | 454 | [1] = { |
455 | .start = AT91SAM9RL_ID_AC97C, | 455 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, |
456 | .end = AT91SAM9RL_ID_AC97C, | 456 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, |
457 | .flags = IORESOURCE_IRQ, | 457 | .flags = IORESOURCE_IRQ, |
458 | }, | 458 | }, |
459 | }; | 459 | }; |
@@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = { | |||
507 | .flags = IORESOURCE_MEM, | 507 | .flags = IORESOURCE_MEM, |
508 | }, | 508 | }, |
509 | [1] = { | 509 | [1] = { |
510 | .start = AT91SAM9RL_ID_LCDC, | 510 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, |
511 | .end = AT91SAM9RL_ID_LCDC, | 511 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, |
512 | .flags = IORESOURCE_IRQ, | 512 | .flags = IORESOURCE_IRQ, |
513 | }, | 513 | }, |
514 | }; | 514 | }; |
@@ -574,18 +574,18 @@ static struct resource tcb_resources[] = { | |||
574 | .flags = IORESOURCE_MEM, | 574 | .flags = IORESOURCE_MEM, |
575 | }, | 575 | }, |
576 | [1] = { | 576 | [1] = { |
577 | .start = AT91SAM9RL_ID_TC0, | 577 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, |
578 | .end = AT91SAM9RL_ID_TC0, | 578 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, |
579 | .flags = IORESOURCE_IRQ, | 579 | .flags = IORESOURCE_IRQ, |
580 | }, | 580 | }, |
581 | [2] = { | 581 | [2] = { |
582 | .start = AT91SAM9RL_ID_TC1, | 582 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, |
583 | .end = AT91SAM9RL_ID_TC1, | 583 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, |
584 | .flags = IORESOURCE_IRQ, | 584 | .flags = IORESOURCE_IRQ, |
585 | }, | 585 | }, |
586 | [3] = { | 586 | [3] = { |
587 | .start = AT91SAM9RL_ID_TC2, | 587 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, |
588 | .end = AT91SAM9RL_ID_TC2, | 588 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, |
589 | .flags = IORESOURCE_IRQ, | 589 | .flags = IORESOURCE_IRQ, |
590 | }, | 590 | }, |
591 | }; | 591 | }; |
@@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = { | |||
621 | .flags = IORESOURCE_MEM, | 621 | .flags = IORESOURCE_MEM, |
622 | }, | 622 | }, |
623 | [1] = { | 623 | [1] = { |
624 | .start = AT91SAM9RL_ID_TSC, | 624 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, |
625 | .end = AT91SAM9RL_ID_TSC, | 625 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, |
626 | .flags = IORESOURCE_IRQ, | 626 | .flags = IORESOURCE_IRQ, |
627 | } | 627 | } |
628 | }; | 628 | }; |
@@ -768,8 +768,8 @@ static struct resource pwm_resources[] = { | |||
768 | .flags = IORESOURCE_MEM, | 768 | .flags = IORESOURCE_MEM, |
769 | }, | 769 | }, |
770 | [1] = { | 770 | [1] = { |
771 | .start = AT91SAM9RL_ID_PWMC, | 771 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, |
772 | .end = AT91SAM9RL_ID_PWMC, | 772 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, |
773 | .flags = IORESOURCE_IRQ, | 773 | .flags = IORESOURCE_IRQ, |
774 | }, | 774 | }, |
775 | }; | 775 | }; |
@@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = { | |||
821 | .flags = IORESOURCE_MEM, | 821 | .flags = IORESOURCE_MEM, |
822 | }, | 822 | }, |
823 | [1] = { | 823 | [1] = { |
824 | .start = AT91SAM9RL_ID_SSC0, | 824 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, |
825 | .end = AT91SAM9RL_ID_SSC0, | 825 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, |
826 | .flags = IORESOURCE_IRQ, | 826 | .flags = IORESOURCE_IRQ, |
827 | }, | 827 | }, |
828 | }; | 828 | }; |
@@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = { | |||
863 | .flags = IORESOURCE_MEM, | 863 | .flags = IORESOURCE_MEM, |
864 | }, | 864 | }, |
865 | [1] = { | 865 | [1] = { |
866 | .start = AT91SAM9RL_ID_SSC1, | 866 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, |
867 | .end = AT91SAM9RL_ID_SSC1, | 867 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, |
868 | .flags = IORESOURCE_IRQ, | 868 | .flags = IORESOURCE_IRQ, |
869 | }, | 869 | }, |
870 | }; | 870 | }; |
@@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = { | |||
943 | .flags = IORESOURCE_MEM, | 943 | .flags = IORESOURCE_MEM, |
944 | }, | 944 | }, |
945 | [1] = { | 945 | [1] = { |
946 | .start = AT91_ID_SYS, | 946 | .start = NR_IRQS_LEGACY + AT91_ID_SYS, |
947 | .end = AT91_ID_SYS, | 947 | .end = NR_IRQS_LEGACY + AT91_ID_SYS, |
948 | .flags = IORESOURCE_IRQ, | 948 | .flags = IORESOURCE_IRQ, |
949 | }, | 949 | }, |
950 | }; | 950 | }; |
@@ -981,8 +981,8 @@ static struct resource uart0_resources[] = { | |||
981 | .flags = IORESOURCE_MEM, | 981 | .flags = IORESOURCE_MEM, |
982 | }, | 982 | }, |
983 | [1] = { | 983 | [1] = { |
984 | .start = AT91SAM9RL_ID_US0, | 984 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, |
985 | .end = AT91SAM9RL_ID_US0, | 985 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, |
986 | .flags = IORESOURCE_IRQ, | 986 | .flags = IORESOURCE_IRQ, |
987 | }, | 987 | }, |
988 | }; | 988 | }; |
@@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = { | |||
1032 | .flags = IORESOURCE_MEM, | 1032 | .flags = IORESOURCE_MEM, |
1033 | }, | 1033 | }, |
1034 | [1] = { | 1034 | [1] = { |
1035 | .start = AT91SAM9RL_ID_US1, | 1035 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, |
1036 | .end = AT91SAM9RL_ID_US1, | 1036 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, |
1037 | .flags = IORESOURCE_IRQ, | 1037 | .flags = IORESOURCE_IRQ, |
1038 | }, | 1038 | }, |
1039 | }; | 1039 | }; |
@@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = { | |||
1075 | .flags = IORESOURCE_MEM, | 1075 | .flags = IORESOURCE_MEM, |
1076 | }, | 1076 | }, |
1077 | [1] = { | 1077 | [1] = { |
1078 | .start = AT91SAM9RL_ID_US2, | 1078 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, |
1079 | .end = AT91SAM9RL_ID_US2, | 1079 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, |
1080 | .flags = IORESOURCE_IRQ, | 1080 | .flags = IORESOURCE_IRQ, |
1081 | }, | 1081 | }, |
1082 | }; | 1082 | }; |
@@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = { | |||
1118 | .flags = IORESOURCE_MEM, | 1118 | .flags = IORESOURCE_MEM, |
1119 | }, | 1119 | }, |
1120 | [1] = { | 1120 | [1] = { |
1121 | .start = AT91SAM9RL_ID_US3, | 1121 | .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, |
1122 | .end = AT91SAM9RL_ID_US3, | 1122 | .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, |
1123 | .flags = IORESOURCE_IRQ, | 1123 | .flags = IORESOURCE_IRQ, |
1124 | }, | 1124 | }, |
1125 | }; | 1125 | }; |
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 1b144b4d3ce1..477cf9d06672 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c | |||
@@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void) | |||
312 | 312 | ||
313 | void __init at91sam9x5_initialize(void) | 313 | void __init at91sam9x5_initialize(void) |
314 | { | 314 | { |
315 | at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); | ||
316 | |||
317 | /* Register GPIO subsystem (using DT) */ | 315 | /* Register GPIO subsystem (using DT) */ |
318 | at91_gpio_init(NULL, 0); | 316 | at91_gpio_init(NULL, 0); |
319 | } | 317 | } |
@@ -321,47 +319,9 @@ void __init at91sam9x5_initialize(void) | |||
321 | /* -------------------------------------------------------------------- | 319 | /* -------------------------------------------------------------------- |
322 | * Interrupt initialization | 320 | * Interrupt initialization |
323 | * -------------------------------------------------------------------- */ | 321 | * -------------------------------------------------------------------- */ |
324 | /* | ||
325 | * The default interrupt priority levels (0 = lowest, 7 = highest). | ||
326 | */ | ||
327 | static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { | ||
328 | 7, /* Advanced Interrupt Controller (FIQ) */ | ||
329 | 7, /* System Peripherals */ | ||
330 | 1, /* Parallel IO Controller A and B */ | ||
331 | 1, /* Parallel IO Controller C and D */ | ||
332 | 4, /* Soft Modem */ | ||
333 | 5, /* USART 0 */ | ||
334 | 5, /* USART 1 */ | ||
335 | 5, /* USART 2 */ | ||
336 | 5, /* USART 3 */ | ||
337 | 6, /* Two-Wire Interface 0 */ | ||
338 | 6, /* Two-Wire Interface 1 */ | ||
339 | 6, /* Two-Wire Interface 2 */ | ||
340 | 0, /* Multimedia Card Interface 0 */ | ||
341 | 5, /* Serial Peripheral Interface 0 */ | ||
342 | 5, /* Serial Peripheral Interface 1 */ | ||
343 | 5, /* UART 0 */ | ||
344 | 5, /* UART 1 */ | ||
345 | 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */ | ||
346 | 0, /* Pulse Width Modulation Controller */ | ||
347 | 0, /* ADC Controller */ | ||
348 | 0, /* DMA Controller 0 */ | ||
349 | 0, /* DMA Controller 1 */ | ||
350 | 2, /* USB Host High Speed port */ | ||
351 | 2, /* USB Device High speed port */ | ||
352 | 3, /* Ethernet MAC 0 */ | ||
353 | 3, /* LDC Controller or Image Sensor Interface */ | ||
354 | 0, /* Multimedia Card Interface 1 */ | ||
355 | 3, /* Ethernet MAC 1 */ | ||
356 | 4, /* Synchronous Serial Interface */ | ||
357 | 4, /* CAN Controller 0 */ | ||
358 | 4, /* CAN Controller 1 */ | ||
359 | 0, /* Advanced Interrupt Controller (IRQ0) */ | ||
360 | }; | ||
361 | 322 | ||
362 | struct at91_init_soc __initdata at91sam9x5_soc = { | 323 | struct at91_init_soc __initdata at91sam9x5_soc = { |
363 | .map_io = at91sam9x5_map_io, | 324 | .map_io = at91sam9x5_map_io, |
364 | .default_irq_priority = at91sam9x5_default_irq_priority, | ||
365 | .register_clocks = at91sam9x5_register_clocks, | 325 | .register_clocks = at91sam9x5_register_clocks, |
366 | .init = at91sam9x5_initialize, | 326 | .init = at91sam9x5_initialize, |
367 | }; | 327 | }; |
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index d62fe090d814..46090e642d8e 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c | |||
@@ -13,10 +13,12 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/io.h> | ||
16 | #include <asm/proc-fns.h> | 17 | #include <asm/proc-fns.h> |
17 | #include <asm/system_misc.h> | 18 | #include <asm/system_misc.h> |
18 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
19 | #include <mach/at91x40.h> | 20 | #include <mach/at91x40.h> |
21 | #include <mach/at91_aic.h> | ||
20 | #include <mach/at91_st.h> | 22 | #include <mach/at91_st.h> |
21 | #include <mach/timex.h> | 23 | #include <mach/timex.h> |
22 | #include "generic.h" | 24 | #include "generic.h" |
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 271f994314a4..22d8856094f1 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c | |||
@@ -36,6 +36,7 @@ | |||
36 | 36 | ||
37 | #include <mach/board.h> | 37 | #include <mach/board.h> |
38 | #include <mach/cpu.h> | 38 | #include <mach/cpu.h> |
39 | #include <mach/at91_aic.h> | ||
39 | 40 | ||
40 | #include "generic.h" | 41 | #include "generic.h" |
41 | 42 | ||
@@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") | |||
91 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ | 92 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ |
92 | .timer = &at91rm9200_timer, | 93 | .timer = &at91rm9200_timer, |
93 | .map_io = at91_map_io, | 94 | .map_io = at91_map_io, |
95 | .handle_irq = at91_aic_handle_irq, | ||
94 | .init_early = onearm_init_early, | 96 | .init_early = onearm_init_early, |
95 | .init_irq = at91_init_irq_default, | 97 | .init_irq = at91_init_irq_default, |
96 | .init_machine = onearm_board_init, | 98 | .init_machine = onearm_board_init, |
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index b7d8aa7b81e6..de7be1931817 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <asm/mach/irq.h> | 44 | #include <asm/mach/irq.h> |
45 | 45 | ||
46 | #include <mach/board.h> | 46 | #include <mach/board.h> |
47 | #include <mach/at91_aic.h> | ||
47 | 48 | ||
48 | #include "generic.h" | 49 | #include "generic.h" |
49 | 50 | ||
@@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board") | |||
212 | /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ | 213 | /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ |
213 | .timer = &at91sam926x_timer, | 214 | .timer = &at91sam926x_timer, |
214 | .map_io = at91_map_io, | 215 | .map_io = at91_map_io, |
216 | .handle_irq = at91_aic_handle_irq, | ||
215 | .init_early = afeb9260_init_early, | 217 | .init_early = afeb9260_init_early, |
216 | .init_irq = at91_init_irq_default, | 218 | .init_irq = at91_init_irq_default, |
217 | .init_machine = afeb9260_board_init, | 219 | .init_machine = afeb9260_board_init, |
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 29d3ef0a50fb..477e708497bc 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/mach/irq.h> | 39 | #include <asm/mach/irq.h> |
40 | 40 | ||
41 | #include <mach/board.h> | 41 | #include <mach/board.h> |
42 | #include <mach/at91_aic.h> | ||
42 | #include <mach/at91sam9_smc.h> | 43 | #include <mach/at91sam9_smc.h> |
43 | 44 | ||
44 | #include "sam9_smc.h" | 45 | #include "sam9_smc.h" |
@@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60") | |||
188 | /* Maintainer: KwikByte */ | 189 | /* Maintainer: KwikByte */ |
189 | .timer = &at91sam926x_timer, | 190 | .timer = &at91sam926x_timer, |
190 | .map_io = at91_map_io, | 191 | .map_io = at91_map_io, |
192 | .handle_irq = at91_aic_handle_irq, | ||
191 | .init_early = cam60_init_early, | 193 | .init_early = cam60_init_early, |
192 | .init_irq = at91_init_irq_default, | 194 | .init_irq = at91_init_irq_default, |
193 | .init_machine = cam60_board_init, | 195 | .init_machine = cam60_board_init, |
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 44328a6d4609..a5b002f32a61 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c | |||
@@ -36,6 +36,7 @@ | |||
36 | 36 | ||
37 | #include <mach/hardware.h> | 37 | #include <mach/hardware.h> |
38 | #include <mach/board.h> | 38 | #include <mach/board.h> |
39 | #include <mach/at91_aic.h> | ||
39 | 40 | ||
40 | #include "generic.h" | 41 | #include "generic.h" |
41 | 42 | ||
@@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva") | |||
158 | /* Maintainer: Conitec Datasystems */ | 159 | /* Maintainer: Conitec Datasystems */ |
159 | .timer = &at91rm9200_timer, | 160 | .timer = &at91rm9200_timer, |
160 | .map_io = at91_map_io, | 161 | .map_io = at91_map_io, |
162 | .handle_irq = at91_aic_handle_irq, | ||
161 | .init_early = carmeva_init_early, | 163 | .init_early = carmeva_init_early, |
162 | .init_irq = at91_init_irq_default, | 164 | .init_irq = at91_init_irq_default, |
163 | .init_machine = carmeva_board_init, | 165 | .init_machine = carmeva_board_init, |
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 69951ec7dbf3..ecbc13b594de 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c | |||
@@ -41,6 +41,7 @@ | |||
41 | 41 | ||
42 | #include <mach/hardware.h> | 42 | #include <mach/hardware.h> |
43 | #include <mach/board.h> | 43 | #include <mach/board.h> |
44 | #include <mach/at91_aic.h> | ||
44 | #include <mach/at91sam9_smc.h> | 45 | #include <mach/at91sam9_smc.h> |
45 | #include <mach/at91sam9260_matrix.h> | 46 | #include <mach/at91sam9260_matrix.h> |
46 | #include <mach/at91_matrix.h> | 47 | #include <mach/at91_matrix.h> |
@@ -376,6 +377,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") | |||
376 | /* Maintainer: Eric Benard - EUKREA Electromatique */ | 377 | /* Maintainer: Eric Benard - EUKREA Electromatique */ |
377 | .timer = &at91sam926x_timer, | 378 | .timer = &at91sam926x_timer, |
378 | .map_io = at91_map_io, | 379 | .map_io = at91_map_io, |
380 | .handle_irq = at91_aic_handle_irq, | ||
379 | .init_early = cpu9krea_init_early, | 381 | .init_early = cpu9krea_init_early, |
380 | .init_irq = at91_init_irq_default, | 382 | .init_irq = at91_init_irq_default, |
381 | .init_machine = cpu9krea_board_init, | 383 | .init_machine = cpu9krea_board_init, |
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 895cf2dba612..2e6d043c82f2 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <asm/mach/irq.h> | 37 | #include <asm/mach/irq.h> |
38 | 38 | ||
39 | #include <mach/board.h> | 39 | #include <mach/board.h> |
40 | #include <mach/at91_aic.h> | ||
40 | #include <mach/at91rm9200_mc.h> | 41 | #include <mach/at91rm9200_mc.h> |
41 | #include <mach/at91_ramc.h> | 42 | #include <mach/at91_ramc.h> |
42 | #include <mach/cpu.h> | 43 | #include <mach/cpu.h> |
@@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea") | |||
178 | /* Maintainer: Eric Benard - EUKREA Electromatique */ | 179 | /* Maintainer: Eric Benard - EUKREA Electromatique */ |
179 | .timer = &at91rm9200_timer, | 180 | .timer = &at91rm9200_timer, |
180 | .map_io = at91_map_io, | 181 | .map_io = at91_map_io, |
182 | .handle_irq = at91_aic_handle_irq, | ||
181 | .init_early = cpuat91_init_early, | 183 | .init_early = cpuat91_init_early, |
182 | .init_irq = at91_init_irq_default, | 184 | .init_irq = at91_init_irq_default, |
183 | .init_machine = cpuat91_board_init, | 185 | .init_machine = cpuat91_board_init, |
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index cd813361cd26..462bc319cbc5 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c | |||
@@ -39,6 +39,7 @@ | |||
39 | 39 | ||
40 | #include <mach/hardware.h> | 40 | #include <mach/hardware.h> |
41 | #include <mach/board.h> | 41 | #include <mach/board.h> |
42 | #include <mach/at91_aic.h> | ||
42 | 43 | ||
43 | #include "generic.h" | 44 | #include "generic.h" |
44 | 45 | ||
@@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337") | |||
252 | /* Maintainer: Bill Gatliff */ | 253 | /* Maintainer: Bill Gatliff */ |
253 | .timer = &at91rm9200_timer, | 254 | .timer = &at91rm9200_timer, |
254 | .map_io = at91_map_io, | 255 | .map_io = at91_map_io, |
256 | .handle_irq = at91_aic_handle_irq, | ||
255 | .init_early = csb337_init_early, | 257 | .init_early = csb337_init_early, |
256 | .init_irq = at91_init_irq_default, | 258 | .init_irq = at91_init_irq_default, |
257 | .init_machine = csb337_board_init, | 259 | .init_machine = csb337_board_init, |
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 7c8b05a57d7f..872871ab1160 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c | |||
@@ -36,6 +36,7 @@ | |||
36 | 36 | ||
37 | #include <mach/hardware.h> | 37 | #include <mach/hardware.h> |
38 | #include <mach/board.h> | 38 | #include <mach/board.h> |
39 | #include <mach/at91_aic.h> | ||
39 | 40 | ||
40 | #include "generic.h" | 41 | #include "generic.h" |
41 | 42 | ||
@@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637") | |||
133 | /* Maintainer: Bill Gatliff */ | 134 | /* Maintainer: Bill Gatliff */ |
134 | .timer = &at91rm9200_timer, | 135 | .timer = &at91rm9200_timer, |
135 | .map_io = at91_map_io, | 136 | .map_io = at91_map_io, |
137 | .handle_irq = at91_aic_handle_irq, | ||
136 | .init_early = csb637_init_early, | 138 | .init_early = csb637_init_early, |
137 | .init_irq = at91_init_irq_default, | 139 | .init_irq = at91_init_irq_default, |
138 | .init_machine = csb637_board_init, | 140 | .init_machine = csb637_board_init, |
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index a1fce05aa7a5..e8f45c4e0ea8 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/of_platform.h> | 16 | #include <linux/of_platform.h> |
17 | 17 | ||
18 | #include <mach/board.h> | 18 | #include <mach/board.h> |
19 | #include <mach/at91_aic.h> | ||
19 | 20 | ||
20 | #include <asm/setup.h> | 21 | #include <asm/setup.h> |
21 | #include <asm/irq.h> | 22 | #include <asm/irq.h> |
@@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") | |||
53 | /* Maintainer: Atmel */ | 54 | /* Maintainer: Atmel */ |
54 | .timer = &at91sam926x_timer, | 55 | .timer = &at91sam926x_timer, |
55 | .map_io = at91_map_io, | 56 | .map_io = at91_map_io, |
57 | .handle_irq = at91_aic_handle_irq, | ||
56 | .init_early = at91_dt_initialize, | 58 | .init_early = at91_dt_initialize, |
57 | .init_irq = at91_dt_init_irq, | 59 | .init_irq = at91_dt_init_irq, |
58 | .init_machine = at91_dt_device_init, | 60 | .init_machine = at91_dt_device_init, |
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c index d2023f27c652..01f66e99ece7 100644 --- a/arch/arm/mach-at91/board-eb01.c +++ b/arch/arm/mach-at91/board-eb01.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
29 | #include <asm/mach/map.h> | 29 | #include <asm/mach/map.h> |
30 | #include <mach/board.h> | 30 | #include <mach/board.h> |
31 | #include <mach/at91_aic.h> | ||
31 | #include "generic.h" | 32 | #include "generic.h" |
32 | 33 | ||
33 | static void __init at91eb01_init_irq(void) | 34 | static void __init at91eb01_init_irq(void) |
@@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void) | |||
43 | MACHINE_START(AT91EB01, "Atmel AT91 EB01") | 44 | MACHINE_START(AT91EB01, "Atmel AT91 EB01") |
44 | /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ | 45 | /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ |
45 | .timer = &at91x40_timer, | 46 | .timer = &at91x40_timer, |
47 | .handle_irq = at91_aic_handle_irq, | ||
46 | .init_early = at91eb01_init_early, | 48 | .init_early = at91eb01_init_early, |
47 | .init_irq = at91eb01_init_irq, | 49 | .init_irq = at91eb01_init_irq, |
48 | MACHINE_END | 50 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index bd1017297989..d1e1f3fc0a47 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <asm/mach/irq.h> | 36 | #include <asm/mach/irq.h> |
37 | 37 | ||
38 | #include <mach/board.h> | 38 | #include <mach/board.h> |
39 | #include <mach/at91_aic.h> | ||
39 | 40 | ||
40 | #include "generic.h" | 41 | #include "generic.h" |
41 | 42 | ||
@@ -118,6 +119,7 @@ static void __init eb9200_board_init(void) | |||
118 | MACHINE_START(ATEB9200, "Embest ATEB9200") | 119 | MACHINE_START(ATEB9200, "Embest ATEB9200") |
119 | .timer = &at91rm9200_timer, | 120 | .timer = &at91rm9200_timer, |
120 | .map_io = at91_map_io, | 121 | .map_io = at91_map_io, |
122 | .handle_irq = at91_aic_handle_irq, | ||
121 | .init_early = eb9200_init_early, | 123 | .init_early = eb9200_init_early, |
122 | .init_irq = at91_init_irq_default, | 124 | .init_irq = at91_init_irq_default, |
123 | .init_machine = eb9200_board_init, | 125 | .init_machine = eb9200_board_init, |
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 89cc3726a9ce..9c24cb25707c 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c | |||
@@ -39,6 +39,7 @@ | |||
39 | 39 | ||
40 | #include <mach/board.h> | 40 | #include <mach/board.h> |
41 | #include <mach/cpu.h> | 41 | #include <mach/cpu.h> |
42 | #include <mach/at91_aic.h> | ||
42 | 43 | ||
43 | #include "generic.h" | 44 | #include "generic.h" |
44 | 45 | ||
@@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91") | |||
170 | /* Maintainer: emQbit.com */ | 171 | /* Maintainer: emQbit.com */ |
171 | .timer = &at91rm9200_timer, | 172 | .timer = &at91rm9200_timer, |
172 | .map_io = at91_map_io, | 173 | .map_io = at91_map_io, |
174 | .handle_irq = at91_aic_handle_irq, | ||
173 | .init_early = ecb_at91init_early, | 175 | .init_early = ecb_at91init_early, |
174 | .init_irq = at91_init_irq_default, | 176 | .init_irq = at91_init_irq_default, |
175 | .init_machine = ecb_at91board_init, | 177 | .init_machine = ecb_at91board_init, |
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 558546cf63f4..82bdfde3405f 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
26 | 26 | ||
27 | #include <mach/board.h> | 27 | #include <mach/board.h> |
28 | #include <mach/at91_aic.h> | ||
28 | #include <mach/at91rm9200_mc.h> | 29 | #include <mach/at91rm9200_mc.h> |
29 | #include <mach/at91_ramc.h> | 30 | #include <mach/at91_ramc.h> |
30 | #include <mach/cpu.h> | 31 | #include <mach/cpu.h> |
@@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920") | |||
132 | /* Maintainer: Sascha Hauer */ | 133 | /* Maintainer: Sascha Hauer */ |
133 | .timer = &at91rm9200_timer, | 134 | .timer = &at91rm9200_timer, |
134 | .map_io = at91_map_io, | 135 | .map_io = at91_map_io, |
136 | .handle_irq = at91_aic_handle_irq, | ||
135 | .init_early = eco920_init_early, | 137 | .init_early = eco920_init_early, |
136 | .init_irq = at91_init_irq_default, | 138 | .init_irq = at91_init_irq_default, |
137 | .init_machine = eco920_board_init, | 139 | .init_machine = eco920_board_init, |
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 47658f78105d..6cc83a87d77c 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c | |||
@@ -34,6 +34,7 @@ | |||
34 | 34 | ||
35 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
36 | #include <mach/board.h> | 36 | #include <mach/board.h> |
37 | #include <mach/at91_aic.h> | ||
37 | 38 | ||
38 | #include "generic.h" | 39 | #include "generic.h" |
39 | 40 | ||
@@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect") | |||
160 | /* Maintainer: Maxim Osipov */ | 161 | /* Maintainer: Maxim Osipov */ |
161 | .timer = &at91sam926x_timer, | 162 | .timer = &at91sam926x_timer, |
162 | .map_io = at91_map_io, | 163 | .map_io = at91_map_io, |
164 | .handle_irq = at91_aic_handle_irq, | ||
163 | .init_early = flexibity_init_early, | 165 | .init_early = flexibity_init_early, |
164 | .init_irq = at91_init_irq_default, | 166 | .init_irq = at91_init_irq_default, |
165 | .init_machine = flexibity_board_init, | 167 | .init_machine = flexibity_board_init, |
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index 33411e6ecb1f..69ab1247ef81 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <asm/mach/irq.h> | 42 | #include <asm/mach/irq.h> |
43 | 43 | ||
44 | #include <mach/board.h> | 44 | #include <mach/board.h> |
45 | #include <mach/at91_aic.h> | ||
45 | #include <mach/at91sam9_smc.h> | 46 | #include <mach/at91sam9_smc.h> |
46 | 47 | ||
47 | #include "sam9_smc.h" | 48 | #include "sam9_smc.h" |
@@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") | |||
262 | /* Maintainer: Sergio Tanzilli */ | 263 | /* Maintainer: Sergio Tanzilli */ |
263 | .timer = &at91sam926x_timer, | 264 | .timer = &at91sam926x_timer, |
264 | .map_io = at91_map_io, | 265 | .map_io = at91_map_io, |
266 | .handle_irq = at91_aic_handle_irq, | ||
265 | .init_early = foxg20_init_early, | 267 | .init_early = foxg20_init_early, |
266 | .init_irq = at91_init_irq_default, | 268 | .init_irq = at91_init_irq_default, |
267 | .init_machine = foxg20_board_init, | 269 | .init_machine = foxg20_board_init, |
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index 3e0dfa643a86..a9d5e78118c5 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | 32 | ||
33 | #include <mach/board.h> | 33 | #include <mach/board.h> |
34 | #include <mach/at91_aic.h> | ||
34 | #include <mach/at91sam9_smc.h> | 35 | #include <mach/at91sam9_smc.h> |
35 | #include <mach/gsia18s.h> | 36 | #include <mach/gsia18s.h> |
36 | #include <mach/stamp9g20.h> | 37 | #include <mach/stamp9g20.h> |
@@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void) | |||
575 | MACHINE_START(GSIA18S, "GS_IA18_S") | 576 | MACHINE_START(GSIA18S, "GS_IA18_S") |
576 | .timer = &at91sam926x_timer, | 577 | .timer = &at91sam926x_timer, |
577 | .map_io = at91_map_io, | 578 | .map_io = at91_map_io, |
579 | .handle_irq = at91_aic_handle_irq, | ||
578 | .init_early = gsia18s_init_early, | 580 | .init_early = gsia18s_init_early, |
579 | .init_irq = at91_init_irq_default, | 581 | .init_irq = at91_init_irq_default, |
580 | .init_machine = gsia18s_board_init, | 582 | .init_machine = gsia18s_board_init, |
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index f260657f32bc..64c1dbf88a07 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <asm/mach/irq.h> | 35 | #include <asm/mach/irq.h> |
36 | 36 | ||
37 | #include <mach/board.h> | 37 | #include <mach/board.h> |
38 | #include <mach/at91_aic.h> | ||
38 | #include <mach/cpu.h> | 39 | #include <mach/cpu.h> |
39 | 40 | ||
40 | #include "generic.h" | 41 | #include "generic.h" |
@@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA") | |||
93 | /* Maintainer: Sergei Sharonov */ | 94 | /* Maintainer: Sergei Sharonov */ |
94 | .timer = &at91rm9200_timer, | 95 | .timer = &at91rm9200_timer, |
95 | .map_io = at91_map_io, | 96 | .map_io = at91_map_io, |
97 | .handle_irq = at91_aic_handle_irq, | ||
96 | .init_early = kafa_init_early, | 98 | .init_early = kafa_init_early, |
97 | .init_irq = at91_init_irq_default, | 99 | .init_irq = at91_init_irq_default, |
98 | .init_machine = kafa_board_init, | 100 | .init_machine = kafa_board_init, |
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index ba39db5482b9..5d96cb85175f 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c | |||
@@ -37,6 +37,7 @@ | |||
37 | 37 | ||
38 | #include <mach/board.h> | 38 | #include <mach/board.h> |
39 | #include <mach/cpu.h> | 39 | #include <mach/cpu.h> |
40 | #include <mach/at91_aic.h> | ||
40 | #include <mach/at91rm9200_mc.h> | 41 | #include <mach/at91rm9200_mc.h> |
41 | #include <mach/at91_ramc.h> | 42 | #include <mach/at91_ramc.h> |
42 | 43 | ||
@@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x") | |||
133 | /* Maintainer: KwikByte, Inc. */ | 134 | /* Maintainer: KwikByte, Inc. */ |
134 | .timer = &at91rm9200_timer, | 135 | .timer = &at91rm9200_timer, |
135 | .map_io = at91_map_io, | 136 | .map_io = at91_map_io, |
137 | .handle_irq = at91_aic_handle_irq, | ||
136 | .init_early = kb9202_init_early, | 138 | .init_early = kb9202_init_early, |
137 | .init_irq = at91_init_irq_default, | 139 | .init_irq = at91_init_irq_default, |
138 | .init_machine = kb9202_board_init, | 140 | .init_machine = kb9202_board_init, |
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index d2f4cc161766..18103c5d993c 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c | |||
@@ -45,6 +45,7 @@ | |||
45 | 45 | ||
46 | #include <mach/hardware.h> | 46 | #include <mach/hardware.h> |
47 | #include <mach/board.h> | 47 | #include <mach/board.h> |
48 | #include <mach/at91_aic.h> | ||
48 | #include <mach/at91sam9_smc.h> | 49 | #include <mach/at91sam9_smc.h> |
49 | 50 | ||
50 | #include "sam9_smc.h" | 51 | #include "sam9_smc.h" |
@@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") | |||
378 | /* Maintainer: ADENEO */ | 379 | /* Maintainer: ADENEO */ |
379 | .timer = &at91sam926x_timer, | 380 | .timer = &at91sam926x_timer, |
380 | .map_io = at91_map_io, | 381 | .map_io = at91_map_io, |
382 | .handle_irq = at91_aic_handle_irq, | ||
381 | .init_early = neocore926_init_early, | 383 | .init_early = neocore926_init_early, |
382 | .init_irq = at91_init_irq_default, | 384 | .init_irq = at91_init_irq_default, |
383 | .init_machine = neocore926_board_init, | 385 | .init_machine = neocore926_board_init, |
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 7fe638342421..9ca3e32c54cb 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
31 | 31 | ||
32 | #include <mach/board.h> | 32 | #include <mach/board.h> |
33 | #include <mach/at91_aic.h> | ||
33 | #include <mach/at91sam9_smc.h> | 34 | #include <mach/at91sam9_smc.h> |
34 | #include <mach/stamp9g20.h> | 35 | #include <mach/stamp9g20.h> |
35 | 36 | ||
@@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20") | |||
218 | /* Maintainer: pgsellmann@portner-elektronik.at */ | 219 | /* Maintainer: pgsellmann@portner-elektronik.at */ |
219 | .timer = &at91sam926x_timer, | 220 | .timer = &at91sam926x_timer, |
220 | .map_io = at91_map_io, | 221 | .map_io = at91_map_io, |
222 | .handle_irq = at91_aic_handle_irq, | ||
221 | .init_early = pcontrol_g20_init_early, | 223 | .init_early = pcontrol_g20_init_early, |
222 | .init_irq = at91_init_irq_default, | 224 | .init_irq = at91_init_irq_default, |
223 | .init_machine = pcontrol_g20_board_init, | 225 | .init_machine = pcontrol_g20_board_init, |
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index b45c0a5d5ca7..127065504508 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <asm/mach/irq.h> | 38 | #include <asm/mach/irq.h> |
39 | 39 | ||
40 | #include <mach/board.h> | 40 | #include <mach/board.h> |
41 | #include <mach/at91_aic.h> | ||
41 | #include <mach/at91rm9200_mc.h> | 42 | #include <mach/at91rm9200_mc.h> |
42 | #include <mach/at91_ramc.h> | 43 | #include <mach/at91_ramc.h> |
43 | 44 | ||
@@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200") | |||
120 | /* Maintainer: Kleinhenz Elektronik GmbH */ | 121 | /* Maintainer: Kleinhenz Elektronik GmbH */ |
121 | .timer = &at91rm9200_timer, | 122 | .timer = &at91rm9200_timer, |
122 | .map_io = at91_map_io, | 123 | .map_io = at91_map_io, |
124 | .handle_irq = at91_aic_handle_irq, | ||
123 | .init_early = picotux200_init_early, | 125 | .init_early = picotux200_init_early, |
124 | .init_irq = at91_init_irq_default, | 126 | .init_irq = at91_init_irq_default, |
125 | .init_machine = picotux200_board_init, | 127 | .init_machine = picotux200_board_init, |
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 0c61bf0d272c..bf351e285422 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c | |||
@@ -41,6 +41,7 @@ | |||
41 | 41 | ||
42 | #include <mach/hardware.h> | 42 | #include <mach/hardware.h> |
43 | #include <mach/board.h> | 43 | #include <mach/board.h> |
44 | #include <mach/at91_aic.h> | ||
44 | #include <mach/at91sam9_smc.h> | 45 | #include <mach/at91sam9_smc.h> |
45 | #include <mach/at91_shdwc.h> | 46 | #include <mach/at91_shdwc.h> |
46 | 47 | ||
@@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260") | |||
258 | /* Maintainer: calao-systems */ | 259 | /* Maintainer: calao-systems */ |
259 | .timer = &at91sam926x_timer, | 260 | .timer = &at91sam926x_timer, |
260 | .map_io = at91_map_io, | 261 | .map_io = at91_map_io, |
262 | .handle_irq = at91_aic_handle_irq, | ||
261 | .init_early = ek_init_early, | 263 | .init_early = ek_init_early, |
262 | .init_irq = at91_init_irq_default, | 264 | .init_irq = at91_init_irq_default, |
263 | .init_machine = ek_board_init, | 265 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index afd7a4713766..cc2bf9796073 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -40,6 +40,7 @@ | |||
40 | 40 | ||
41 | #include <mach/hardware.h> | 41 | #include <mach/hardware.h> |
42 | #include <mach/board.h> | 42 | #include <mach/board.h> |
43 | #include <mach/at91_aic.h> | ||
43 | #include <mach/at91rm9200_mc.h> | 44 | #include <mach/at91rm9200_mc.h> |
44 | #include <mach/at91_ramc.h> | 45 | #include <mach/at91_ramc.h> |
45 | 46 | ||
@@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") | |||
223 | /* Maintainer: SAN People/Atmel */ | 224 | /* Maintainer: SAN People/Atmel */ |
224 | .timer = &at91rm9200_timer, | 225 | .timer = &at91rm9200_timer, |
225 | .map_io = at91_map_io, | 226 | .map_io = at91_map_io, |
227 | .handle_irq = at91_aic_handle_irq, | ||
226 | .init_early = dk_init_early, | 228 | .init_early = dk_init_early, |
227 | .init_irq = at91_init_irq_default, | 229 | .init_irq = at91_init_irq_default, |
228 | .init_machine = dk_board_init, | 230 | .init_machine = dk_board_init, |
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 2b15b8adec4c..62e19e64c9d3 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c | |||
@@ -40,6 +40,7 @@ | |||
40 | 40 | ||
41 | #include <mach/hardware.h> | 41 | #include <mach/hardware.h> |
42 | #include <mach/board.h> | 42 | #include <mach/board.h> |
43 | #include <mach/at91_aic.h> | ||
43 | #include <mach/at91rm9200_mc.h> | 44 | #include <mach/at91rm9200_mc.h> |
44 | #include <mach/at91_ramc.h> | 45 | #include <mach/at91_ramc.h> |
45 | 46 | ||
@@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") | |||
190 | /* Maintainer: SAN People/Atmel */ | 191 | /* Maintainer: SAN People/Atmel */ |
191 | .timer = &at91rm9200_timer, | 192 | .timer = &at91rm9200_timer, |
192 | .map_io = at91_map_io, | 193 | .map_io = at91_map_io, |
194 | .handle_irq = at91_aic_handle_irq, | ||
193 | .init_early = ek_init_early, | 195 | .init_early = ek_init_early, |
194 | .init_irq = at91_init_irq_default, | 196 | .init_irq = at91_init_irq_default, |
195 | .init_machine = ek_board_init, | 197 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index 24ab9be7510f..c3b43aefdb75 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | #include <mach/board.h> | 28 | #include <mach/board.h> |
29 | #include <mach/at91_aic.h> | ||
29 | 30 | ||
30 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
31 | 32 | ||
@@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS") | |||
225 | /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */ | 226 | /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */ |
226 | .timer = &at91rm9200_timer, | 227 | .timer = &at91rm9200_timer, |
227 | .map_io = at91_map_io, | 228 | .map_io = at91_map_io, |
229 | .handle_irq = at91_aic_handle_irq, | ||
228 | .init_early = rsi_ews_init_early, | 230 | .init_early = rsi_ews_init_early, |
229 | .init_irq = at91_init_irq_default, | 231 | .init_irq = at91_init_irq_default, |
230 | .init_machine = rsi_ews_board_init, | 232 | .init_machine = rsi_ews_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index cdd21f2595d2..7bf6da70d7d5 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <asm/mach/irq.h> | 38 | #include <asm/mach/irq.h> |
39 | 39 | ||
40 | #include <mach/board.h> | 40 | #include <mach/board.h> |
41 | #include <mach/at91_aic.h> | ||
41 | #include <mach/at91sam9_smc.h> | 42 | #include <mach/at91sam9_smc.h> |
42 | 43 | ||
43 | #include "sam9_smc.h" | 44 | #include "sam9_smc.h" |
@@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") | |||
202 | /* Maintainer: Olimex */ | 203 | /* Maintainer: Olimex */ |
203 | .timer = &at91sam926x_timer, | 204 | .timer = &at91sam926x_timer, |
204 | .map_io = at91_map_io, | 205 | .map_io = at91_map_io, |
206 | .handle_irq = at91_aic_handle_irq, | ||
205 | .init_early = ek_init_early, | 207 | .init_early = ek_init_early, |
206 | .init_irq = at91_init_irq_default, | 208 | .init_irq = at91_init_irq_default, |
207 | .init_machine = ek_board_init, | 209 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 7b3c3913551a..889c1bf71eb5 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -42,6 +42,7 @@ | |||
42 | 42 | ||
43 | #include <mach/hardware.h> | 43 | #include <mach/hardware.h> |
44 | #include <mach/board.h> | 44 | #include <mach/board.h> |
45 | #include <mach/at91_aic.h> | ||
45 | #include <mach/at91sam9_smc.h> | 46 | #include <mach/at91sam9_smc.h> |
46 | #include <mach/at91_shdwc.h> | 47 | #include <mach/at91_shdwc.h> |
47 | #include <mach/system_rev.h> | 48 | #include <mach/system_rev.h> |
@@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") | |||
344 | /* Maintainer: Atmel */ | 345 | /* Maintainer: Atmel */ |
345 | .timer = &at91sam926x_timer, | 346 | .timer = &at91sam926x_timer, |
346 | .map_io = at91_map_io, | 347 | .map_io = at91_map_io, |
348 | .handle_irq = at91_aic_handle_irq, | ||
347 | .init_early = ek_init_early, | 349 | .init_early = ek_init_early, |
348 | .init_irq = at91_init_irq_default, | 350 | .init_irq = at91_init_irq_default, |
349 | .init_machine = ek_board_init, | 351 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 2736453821b0..2269be5fa384 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -46,6 +46,7 @@ | |||
46 | 46 | ||
47 | #include <mach/hardware.h> | 47 | #include <mach/hardware.h> |
48 | #include <mach/board.h> | 48 | #include <mach/board.h> |
49 | #include <mach/at91_aic.h> | ||
49 | #include <mach/at91sam9_smc.h> | 50 | #include <mach/at91sam9_smc.h> |
50 | #include <mach/at91_shdwc.h> | 51 | #include <mach/at91_shdwc.h> |
51 | #include <mach/system_rev.h> | 52 | #include <mach/system_rev.h> |
@@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") | |||
615 | /* Maintainer: Atmel */ | 616 | /* Maintainer: Atmel */ |
616 | .timer = &at91sam926x_timer, | 617 | .timer = &at91sam926x_timer, |
617 | .map_io = at91_map_io, | 618 | .map_io = at91_map_io, |
619 | .handle_irq = at91_aic_handle_irq, | ||
618 | .init_early = ek_init_early, | 620 | .init_early = ek_init_early, |
619 | .init_irq = at91_init_irq_default, | 621 | .init_irq = at91_init_irq_default, |
620 | .init_machine = ek_board_init, | 622 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 983cb98d2465..82adf581afc2 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -45,6 +45,7 @@ | |||
45 | 45 | ||
46 | #include <mach/hardware.h> | 46 | #include <mach/hardware.h> |
47 | #include <mach/board.h> | 47 | #include <mach/board.h> |
48 | #include <mach/at91_aic.h> | ||
48 | #include <mach/at91sam9_smc.h> | 49 | #include <mach/at91sam9_smc.h> |
49 | #include <mach/at91_shdwc.h> | 50 | #include <mach/at91_shdwc.h> |
50 | #include <mach/system_rev.h> | 51 | #include <mach/system_rev.h> |
@@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") | |||
443 | /* Maintainer: Atmel */ | 444 | /* Maintainer: Atmel */ |
444 | .timer = &at91sam926x_timer, | 445 | .timer = &at91sam926x_timer, |
445 | .map_io = at91_map_io, | 446 | .map_io = at91_map_io, |
447 | .handle_irq = at91_aic_handle_irq, | ||
446 | .init_early = ek_init_early, | 448 | .init_early = ek_init_early, |
447 | .init_irq = at91_init_irq_default, | 449 | .init_irq = at91_init_irq_default, |
448 | .init_machine = ek_board_init, | 450 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 6860d3451100..4ea4ee00364b 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <asm/mach/irq.h> | 44 | #include <asm/mach/irq.h> |
45 | 45 | ||
46 | #include <mach/board.h> | 46 | #include <mach/board.h> |
47 | #include <mach/at91_aic.h> | ||
47 | #include <mach/at91sam9_smc.h> | 48 | #include <mach/at91sam9_smc.h> |
48 | #include <mach/system_rev.h> | 49 | #include <mach/system_rev.h> |
49 | 50 | ||
@@ -413,6 +414,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") | |||
413 | /* Maintainer: Atmel */ | 414 | /* Maintainer: Atmel */ |
414 | .timer = &at91sam926x_timer, | 415 | .timer = &at91sam926x_timer, |
415 | .map_io = at91_map_io, | 416 | .map_io = at91_map_io, |
417 | .handle_irq = at91_aic_handle_irq, | ||
416 | .init_early = ek_init_early, | 418 | .init_early = ek_init_early, |
417 | .init_irq = at91_init_irq_default, | 419 | .init_irq = at91_init_irq_default, |
418 | .init_machine = ek_board_init, | 420 | .init_machine = ek_board_init, |
@@ -422,6 +424,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") | |||
422 | /* Maintainer: Atmel */ | 424 | /* Maintainer: Atmel */ |
423 | .timer = &at91sam926x_timer, | 425 | .timer = &at91sam926x_timer, |
424 | .map_io = at91_map_io, | 426 | .map_io = at91_map_io, |
427 | .handle_irq = at91_aic_handle_irq, | ||
425 | .init_early = ek_init_early, | 428 | .init_early = ek_init_early, |
426 | .init_irq = at91_init_irq_default, | 429 | .init_irq = at91_init_irq_default, |
427 | .init_machine = ek_board_init, | 430 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 63163dc7df46..3d48ec154685 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <asm/mach/irq.h> | 43 | #include <asm/mach/irq.h> |
44 | 44 | ||
45 | #include <mach/board.h> | 45 | #include <mach/board.h> |
46 | #include <mach/at91_aic.h> | ||
46 | #include <mach/at91sam9_smc.h> | 47 | #include <mach/at91sam9_smc.h> |
47 | #include <mach/at91_shdwc.h> | 48 | #include <mach/at91_shdwc.h> |
48 | #include <mach/system_rev.h> | 49 | #include <mach/system_rev.h> |
@@ -503,6 +504,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") | |||
503 | /* Maintainer: Atmel */ | 504 | /* Maintainer: Atmel */ |
504 | .timer = &at91sam926x_timer, | 505 | .timer = &at91sam926x_timer, |
505 | .map_io = at91_map_io, | 506 | .map_io = at91_map_io, |
507 | .handle_irq = at91_aic_handle_irq, | ||
506 | .init_early = ek_init_early, | 508 | .init_early = ek_init_early, |
507 | .init_irq = at91_init_irq_default, | 509 | .init_irq = at91_init_irq_default, |
508 | .init_machine = ek_board_init, | 510 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index be3239f13daa..e7dc3ead7045 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
33 | #include <mach/board.h> | 33 | #include <mach/board.h> |
34 | #include <mach/at91_aic.h> | ||
34 | #include <mach/at91sam9_smc.h> | 35 | #include <mach/at91sam9_smc.h> |
35 | #include <mach/at91_shdwc.h> | 36 | #include <mach/at91_shdwc.h> |
36 | 37 | ||
@@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") | |||
319 | /* Maintainer: Atmel */ | 320 | /* Maintainer: Atmel */ |
320 | .timer = &at91sam926x_timer, | 321 | .timer = &at91sam926x_timer, |
321 | .map_io = at91_map_io, | 322 | .map_io = at91_map_io, |
323 | .handle_irq = at91_aic_handle_irq, | ||
322 | .init_early = ek_init_early, | 324 | .init_early = ek_init_early, |
323 | .init_irq = at91_init_irq_default, | 325 | .init_irq = at91_init_irq_default, |
324 | .init_machine = ek_board_init, | 326 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 9d446f1bb45f..a4e031a039fd 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c | |||
@@ -33,6 +33,7 @@ | |||
33 | 33 | ||
34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
35 | #include <mach/board.h> | 35 | #include <mach/board.h> |
36 | #include <mach/at91_aic.h> | ||
36 | #include <mach/at91sam9_smc.h> | 37 | #include <mach/at91sam9_smc.h> |
37 | 38 | ||
38 | #include "sam9_smc.h" | 39 | #include "sam9_smc.h" |
@@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void) | |||
178 | MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") | 179 | MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") |
179 | .timer = &at91sam926x_timer, | 180 | .timer = &at91sam926x_timer, |
180 | .map_io = at91_map_io, | 181 | .map_io = at91_map_io, |
182 | .handle_irq = at91_aic_handle_irq, | ||
181 | .init_early = snapper9260_init_early, | 183 | .init_early = snapper9260_init_early, |
182 | .init_irq = at91_init_irq_default, | 184 | .init_irq = at91_init_irq_default, |
183 | .init_machine = snapper9260_board_init, | 185 | .init_machine = snapper9260_board_init, |
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index ee86f9d7ee72..29eae1626bf7 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
27 | 27 | ||
28 | #include <mach/board.h> | 28 | #include <mach/board.h> |
29 | #include <mach/at91_aic.h> | ||
29 | #include <mach/at91sam9_smc.h> | 30 | #include <mach/at91sam9_smc.h> |
30 | 31 | ||
31 | #include "sam9_smc.h" | 32 | #include "sam9_smc.h" |
@@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20") | |||
287 | /* Maintainer: taskit GmbH */ | 288 | /* Maintainer: taskit GmbH */ |
288 | .timer = &at91sam926x_timer, | 289 | .timer = &at91sam926x_timer, |
289 | .map_io = at91_map_io, | 290 | .map_io = at91_map_io, |
291 | .handle_irq = at91_aic_handle_irq, | ||
290 | .init_early = stamp9g20_init_early, | 292 | .init_early = stamp9g20_init_early, |
291 | .init_irq = at91_init_irq_default, | 293 | .init_irq = at91_init_irq_default, |
292 | .init_machine = portuxg20_board_init, | 294 | .init_machine = portuxg20_board_init, |
@@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") | |||
296 | /* Maintainer: taskit GmbH */ | 298 | /* Maintainer: taskit GmbH */ |
297 | .timer = &at91sam926x_timer, | 299 | .timer = &at91sam926x_timer, |
298 | .map_io = at91_map_io, | 300 | .map_io = at91_map_io, |
301 | .handle_irq = at91_aic_handle_irq, | ||
299 | .init_early = stamp9g20_init_early, | 302 | .init_early = stamp9g20_init_early, |
300 | .init_irq = at91_init_irq_default, | 303 | .init_irq = at91_init_irq_default, |
301 | .init_machine = stamp9g20evb_board_init, | 304 | .init_machine = stamp9g20evb_board_init, |
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 95393fcaf199..c1476b9fe7b9 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c | |||
@@ -42,6 +42,7 @@ | |||
42 | 42 | ||
43 | #include <mach/hardware.h> | 43 | #include <mach/hardware.h> |
44 | #include <mach/board.h> | 44 | #include <mach/board.h> |
45 | #include <mach/at91_aic.h> | ||
45 | #include <mach/at91sam9_smc.h> | 46 | #include <mach/at91sam9_smc.h> |
46 | #include <mach/at91_shdwc.h> | 47 | #include <mach/at91_shdwc.h> |
47 | 48 | ||
@@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263") | |||
358 | /* Maintainer: calao-systems */ | 359 | /* Maintainer: calao-systems */ |
359 | .timer = &at91sam926x_timer, | 360 | .timer = &at91sam926x_timer, |
360 | .map_io = at91_map_io, | 361 | .map_io = at91_map_io, |
362 | .handle_irq = at91_aic_handle_irq, | ||
361 | .init_early = ek_init_early, | 363 | .init_early = ek_init_early, |
362 | .init_irq = at91_init_irq_default, | 364 | .init_irq = at91_init_irq_default, |
363 | .init_machine = ek_board_init, | 365 | .init_machine = ek_board_init, |
@@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260") | |||
367 | /* Maintainer: calao-systems */ | 369 | /* Maintainer: calao-systems */ |
368 | .timer = &at91sam926x_timer, | 370 | .timer = &at91sam926x_timer, |
369 | .map_io = at91_map_io, | 371 | .map_io = at91_map_io, |
372 | .handle_irq = at91_aic_handle_irq, | ||
370 | .init_early = ek_init_early, | 373 | .init_early = ek_init_early, |
371 | .init_irq = at91_init_irq_default, | 374 | .init_irq = at91_init_irq_default, |
372 | .init_machine = ek_board_init, | 375 | .init_machine = ek_board_init, |
@@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0") | |||
376 | /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ | 379 | /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ |
377 | .timer = &at91sam926x_timer, | 380 | .timer = &at91sam926x_timer, |
378 | .map_io = at91_map_io, | 381 | .map_io = at91_map_io, |
382 | .handle_irq = at91_aic_handle_irq, | ||
379 | .init_early = ek_init_early, | 383 | .init_early = ek_init_early, |
380 | .init_irq = at91_init_irq_default, | 384 | .init_irq = at91_init_irq_default, |
381 | .init_machine = ek_board_init, | 385 | .init_machine = ek_board_init, |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index d56665ea4b55..516d340549d8 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -44,6 +44,7 @@ | |||
44 | 44 | ||
45 | #include <mach/hardware.h> | 45 | #include <mach/hardware.h> |
46 | #include <mach/board.h> | 46 | #include <mach/board.h> |
47 | #include <mach/at91_aic.h> | ||
47 | #include <mach/at91rm9200_mc.h> | 48 | #include <mach/at91rm9200_mc.h> |
48 | #include <mach/at91_ramc.h> | 49 | #include <mach/at91_ramc.h> |
49 | #include <mach/cpu.h> | 50 | #include <mach/cpu.h> |
@@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200") | |||
590 | /* Maintainer: S.Birtles */ | 591 | /* Maintainer: S.Birtles */ |
591 | .timer = &at91rm9200_timer, | 592 | .timer = &at91rm9200_timer, |
592 | .map_io = at91_map_io, | 593 | .map_io = at91_map_io, |
594 | .handle_irq = at91_aic_handle_irq, | ||
593 | .init_early = yl9200_init_early, | 595 | .init_early = yl9200_init_early, |
594 | .init_irq = at91_init_irq_default, | 596 | .init_irq = at91_init_irq_default, |
595 | .init_machine = yl9200_board_init, | 597 | .init_machine = yl9200_board_init, |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 0a60bf837037..f49650677653 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]); | |||
29 | extern void __init at91_aic_init(unsigned int priority[]); | 29 | extern void __init at91_aic_init(unsigned int priority[]); |
30 | extern int __init at91_aic_of_init(struct device_node *node, | 30 | extern int __init at91_aic_of_init(struct device_node *node, |
31 | struct device_node *parent); | 31 | struct device_node *parent); |
32 | extern int __init at91_aic5_of_init(struct device_node *node, | ||
33 | struct device_node *parent); | ||
32 | 34 | ||
33 | 35 | ||
34 | /* Timer */ | 36 | /* Timer */ |
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 325837a264c9..be42cf0e74bd 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <linux/of_irq.h> | 26 | #include <linux/of_irq.h> |
27 | #include <linux/of_gpio.h> | 27 | #include <linux/of_gpio.h> |
28 | 28 | ||
29 | #include <asm/mach/irq.h> | ||
30 | |||
29 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
30 | #include <mach/at91_pio.h> | 32 | #include <mach/at91_pio.h> |
31 | 33 | ||
@@ -585,15 +587,14 @@ static struct irq_chip gpio_irqchip = { | |||
585 | 587 | ||
586 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | 588 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) |
587 | { | 589 | { |
590 | struct irq_chip *chip = irq_desc_get_chip(desc); | ||
588 | struct irq_data *idata = irq_desc_get_irq_data(desc); | 591 | struct irq_data *idata = irq_desc_get_irq_data(desc); |
589 | struct irq_chip *chip = irq_data_get_irq_chip(idata); | ||
590 | struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); | 592 | struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); |
591 | void __iomem *pio = at91_gpio->regbase; | 593 | void __iomem *pio = at91_gpio->regbase; |
592 | unsigned long isr; | 594 | unsigned long isr; |
593 | int n; | 595 | int n; |
594 | 596 | ||
595 | /* temporarily mask (level sensitive) parent IRQ */ | 597 | chained_irq_enter(chip, desc); |
596 | chip->irq_ack(idata); | ||
597 | for (;;) { | 598 | for (;;) { |
598 | /* Reading ISR acks pending (edge triggered) GPIO interrupts. | 599 | /* Reading ISR acks pending (edge triggered) GPIO interrupts. |
599 | * When there none are pending, we're finished unless we need | 600 | * When there none are pending, we're finished unless we need |
@@ -614,7 +615,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
614 | n = find_next_bit(&isr, BITS_PER_LONG, n + 1); | 615 | n = find_next_bit(&isr, BITS_PER_LONG, n + 1); |
615 | } | 616 | } |
616 | } | 617 | } |
617 | chip->irq_unmask(idata); | 618 | chained_irq_exit(chip, desc); |
618 | /* now it may re-trigger */ | 619 | /* now it may re-trigger */ |
619 | } | 620 | } |
620 | 621 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h index 3045781c473f..eaea66197fa1 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/include/mach/at91_aic.h | |||
@@ -23,12 +23,23 @@ extern void __iomem *at91_aic_base; | |||
23 | __raw_readl(at91_aic_base + field) | 23 | __raw_readl(at91_aic_base + field) |
24 | 24 | ||
25 | #define at91_aic_write(field, value) \ | 25 | #define at91_aic_write(field, value) \ |
26 | __raw_writel(value, at91_aic_base + field); | 26 | __raw_writel(value, at91_aic_base + field) |
27 | #else | 27 | #else |
28 | .extern at91_aic_base | 28 | .extern at91_aic_base |
29 | #endif | 29 | #endif |
30 | 30 | ||
31 | /* Number of irq lines managed by AIC */ | ||
32 | #define NR_AIC_IRQS 32 | ||
33 | #define NR_AIC5_IRQS 128 | ||
34 | |||
35 | #define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */ | ||
36 | #define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */ | ||
37 | |||
38 | #define AT91_AIC_IRQ_MIN_PRIORITY 0 | ||
39 | #define AT91_AIC_IRQ_MAX_PRIORITY 7 | ||
40 | |||
31 | #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ | 41 | #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ |
42 | #define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */ | ||
32 | #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ | 43 | #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ |
33 | #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ | 44 | #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ |
34 | #define AT91_AIC_SRCTYPE_LOW (0 << 5) | 45 | #define AT91_AIC_SRCTYPE_LOW (0 << 5) |
@@ -37,29 +48,52 @@ extern void __iomem *at91_aic_base; | |||
37 | #define AT91_AIC_SRCTYPE_RISING (3 << 5) | 48 | #define AT91_AIC_SRCTYPE_RISING (3 << 5) |
38 | 49 | ||
39 | #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ | 50 | #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ |
51 | #define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */ | ||
40 | #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ | 52 | #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ |
53 | #define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */ | ||
41 | #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ | 54 | #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ |
55 | #define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */ | ||
42 | #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ | 56 | #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ |
57 | #define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */ | ||
43 | #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ | 58 | #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ |
44 | 59 | ||
45 | #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ | 60 | #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ |
61 | #define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */ | ||
62 | #define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */ | ||
63 | #define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */ | ||
64 | #define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */ | ||
46 | #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ | 65 | #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ |
66 | #define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */ | ||
47 | #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ | 67 | #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ |
68 | #define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */ | ||
48 | #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ | 69 | #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ |
49 | #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ | 70 | #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ |
50 | 71 | ||
51 | #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ | 72 | #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ |
73 | #define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */ | ||
52 | #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ | 74 | #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ |
75 | #define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */ | ||
53 | #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ | 76 | #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ |
77 | #define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */ | ||
54 | #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ | 78 | #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ |
79 | #define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */ | ||
55 | #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ | 80 | #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ |
81 | #define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */ | ||
56 | #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ | 82 | #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ |
83 | #define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */ | ||
57 | #define AT91_AIC_DCR 0x138 /* Debug Control Register */ | 84 | #define AT91_AIC_DCR 0x138 /* Debug Control Register */ |
85 | #define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */ | ||
58 | #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ | 86 | #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ |
59 | #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ | 87 | #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ |
60 | 88 | ||
61 | #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ | 89 | #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ |
90 | #define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */ | ||
62 | #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ | 91 | #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ |
92 | #define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */ | ||
63 | #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ | 93 | #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ |
94 | #define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */ | ||
95 | |||
96 | void at91_aic_handle_irq(struct pt_regs *regs); | ||
97 | void at91_aic5_handle_irq(struct pt_regs *regs); | ||
64 | 98 | ||
65 | #endif | 99 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91_spi.h b/arch/arm/mach-at91/include/mach/at91_spi.h deleted file mode 100644 index 2f6ba0c5636e..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_spi.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/at91_spi.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Ivan Kokshaysky | ||
5 | * Copyright (C) SAN People | ||
6 | * | ||
7 | * Serial Peripheral Interface (SPI) registers. | ||
8 | * Based on AT91RM9200 datasheet revision E. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifndef AT91_SPI_H | ||
17 | #define AT91_SPI_H | ||
18 | |||
19 | #define AT91_SPI_CR 0x00 /* Control Register */ | ||
20 | #define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ | ||
21 | #define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ | ||
22 | #define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ | ||
23 | #define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ | ||
24 | |||
25 | #define AT91_SPI_MR 0x04 /* Mode Register */ | ||
26 | #define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ | ||
27 | #define AT91_SPI_PS (1 << 1) /* Peripheral Select */ | ||
28 | #define AT91_SPI_PS_FIXED (0 << 1) | ||
29 | #define AT91_SPI_PS_VARIABLE (1 << 1) | ||
30 | #define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ | ||
31 | #define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ | ||
32 | #define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ | ||
33 | #define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ | ||
34 | #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ | ||
35 | #define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ | ||
36 | |||
37 | #define AT91_SPI_RDR 0x08 /* Receive Data Register */ | ||
38 | #define AT91_SPI_RD (0xffff << 0) /* Receive Data */ | ||
39 | #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ | ||
40 | |||
41 | #define AT91_SPI_TDR 0x0c /* Transmit Data Register */ | ||
42 | #define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ | ||
43 | #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ | ||
44 | #define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ | ||
45 | |||
46 | #define AT91_SPI_SR 0x10 /* Status Register */ | ||
47 | #define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ | ||
48 | #define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ | ||
49 | #define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ | ||
50 | #define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ | ||
51 | #define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ | ||
52 | #define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ | ||
53 | #define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ | ||
54 | #define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ | ||
55 | #define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ | ||
56 | #define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ | ||
57 | #define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ | ||
58 | |||
59 | #define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ | ||
60 | #define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ | ||
61 | #define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ | ||
62 | |||
63 | #define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ | ||
64 | #define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ | ||
65 | #define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ | ||
66 | #define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ | ||
67 | #define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ | ||
68 | #define AT91_SPI_BITS_8 (0 << 4) | ||
69 | #define AT91_SPI_BITS_9 (1 << 4) | ||
70 | #define AT91_SPI_BITS_10 (2 << 4) | ||
71 | #define AT91_SPI_BITS_11 (3 << 4) | ||
72 | #define AT91_SPI_BITS_12 (4 << 4) | ||
73 | #define AT91_SPI_BITS_13 (5 << 4) | ||
74 | #define AT91_SPI_BITS_14 (6 << 4) | ||
75 | #define AT91_SPI_BITS_15 (7 << 4) | ||
76 | #define AT91_SPI_BITS_16 (8 << 4) | ||
77 | #define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ | ||
78 | #define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ | ||
79 | #define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ | ||
80 | |||
81 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_ssc.h b/arch/arm/mach-at91/include/mach/at91_ssc.h deleted file mode 100644 index a81114c11c74..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_ssc.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/at91_ssc.h | ||
3 | * | ||
4 | * Copyright (C) SAN People | ||
5 | * | ||
6 | * Serial Synchronous Controller (SSC) registers. | ||
7 | * Based on AT91RM9200 datasheet revision E. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #ifndef AT91_SSC_H | ||
16 | #define AT91_SSC_H | ||
17 | |||
18 | #define AT91_SSC_CR 0x00 /* Control Register */ | ||
19 | #define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ | ||
20 | #define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ | ||
21 | #define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ | ||
22 | #define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ | ||
23 | #define AT91_SSC_SWRST (1 << 15) /* Software Reset */ | ||
24 | |||
25 | #define AT91_SSC_CMR 0x04 /* Clock Mode Register */ | ||
26 | #define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ | ||
27 | |||
28 | #define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ | ||
29 | #define AT91_SSC_CKS (3 << 0) /* Clock Selection */ | ||
30 | #define AT91_SSC_CKS_DIV (0 << 0) | ||
31 | #define AT91_SSC_CKS_CLOCK (1 << 0) | ||
32 | #define AT91_SSC_CKS_PIN (2 << 0) | ||
33 | #define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ | ||
34 | #define AT91_SSC_CKO_NONE (0 << 2) | ||
35 | #define AT91_SSC_CKO_CONTINUOUS (1 << 2) | ||
36 | #define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ | ||
37 | #define AT91_SSC_CKI_FALLING (0 << 5) | ||
38 | #define AT91_SSC_CK_RISING (1 << 5) | ||
39 | #define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */ | ||
40 | #define AT91_SSC_CKG_NONE (0 << 6) | ||
41 | #define AT91_SSC_CKG_RFLOW (1 << 6) | ||
42 | #define AT91_SSC_CKG_RFHIGH (2 << 6) | ||
43 | #define AT91_SSC_START (0xf << 8) /* Start Selection */ | ||
44 | #define AT91_SSC_START_CONTINUOUS (0 << 8) | ||
45 | #define AT91_SSC_START_TX_RX (1 << 8) | ||
46 | #define AT91_SSC_START_LOW_RF (2 << 8) | ||
47 | #define AT91_SSC_START_HIGH_RF (3 << 8) | ||
48 | #define AT91_SSC_START_FALLING_RF (4 << 8) | ||
49 | #define AT91_SSC_START_RISING_RF (5 << 8) | ||
50 | #define AT91_SSC_START_LEVEL_RF (6 << 8) | ||
51 | #define AT91_SSC_START_EDGE_RF (7 << 8) | ||
52 | #define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */ | ||
53 | #define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ | ||
54 | #define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ | ||
55 | |||
56 | #define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ | ||
57 | #define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ | ||
58 | #define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ | ||
59 | #define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ | ||
60 | #define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ | ||
61 | #define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ | ||
62 | #define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ | ||
63 | #define AT91_SSC_FSOS_NONE (0 << 20) | ||
64 | #define AT91_SSC_FSOS_NEGATIVE (1 << 20) | ||
65 | #define AT91_SSC_FSOS_POSITIVE (2 << 20) | ||
66 | #define AT91_SSC_FSOS_LOW (3 << 20) | ||
67 | #define AT91_SSC_FSOS_HIGH (4 << 20) | ||
68 | #define AT91_SSC_FSOS_TOGGLE (5 << 20) | ||
69 | #define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ | ||
70 | #define AT91_SSC_FSEDGE_POSITIVE (0 << 24) | ||
71 | #define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) | ||
72 | |||
73 | #define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ | ||
74 | #define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ | ||
75 | #define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ | ||
76 | #define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ | ||
77 | |||
78 | #define AT91_SSC_RHR 0x20 /* Receive Holding Register */ | ||
79 | #define AT91_SSC_THR 0x24 /* Transmit Holding Register */ | ||
80 | #define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ | ||
81 | #define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ | ||
82 | |||
83 | #define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */ | ||
84 | #define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */ | ||
85 | |||
86 | #define AT91_SSC_SR 0x40 /* Status Register */ | ||
87 | #define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ | ||
88 | #define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ | ||
89 | #define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ | ||
90 | #define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ | ||
91 | #define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ | ||
92 | #define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ | ||
93 | #define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ | ||
94 | #define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ | ||
95 | #define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */ | ||
96 | #define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */ | ||
97 | #define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ | ||
98 | #define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ | ||
99 | #define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ | ||
100 | #define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ | ||
101 | |||
102 | #define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ | ||
103 | #define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ | ||
104 | #define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ | ||
105 | |||
106 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S deleted file mode 100644 index 903bf205a333..000000000000 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Copyright (C) 2003-2005 SAN People | ||
5 | * | ||
6 | * Low-level IRQ helper macros for AT91RM9200 platforms | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <mach/hardware.h> | ||
14 | #include <mach/at91_aic.h> | ||
15 | |||
16 | .macro get_irqnr_preamble, base, tmp | ||
17 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral | ||
18 | ldr \base, [\base] | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
22 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | ||
23 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number | ||
24 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt | ||
25 | streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. | ||
26 | .endm | ||
27 | |||
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h deleted file mode 100644 index ac8b7dfc85ef..000000000000 --- a/arch/arm/mach-at91/include/mach/irqs.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/irqs.h | ||
3 | * | ||
4 | * Copyright (C) 2004 SAN People | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASM_ARCH_IRQS_H | ||
22 | #define __ASM_ARCH_IRQS_H | ||
23 | |||
24 | #include <linux/io.h> | ||
25 | #include <mach/at91_aic.h> | ||
26 | |||
27 | #define NR_AIC_IRQS 32 | ||
28 | |||
29 | |||
30 | /* | ||
31 | * Acknowledge interrupt with AIC after interrupt has been handled. | ||
32 | * (by kernel/irq.c) | ||
33 | */ | ||
34 | #define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) | ||
35 | |||
36 | |||
37 | /* | ||
38 | * IRQ interrupt symbols are the AT91xxx_ID_* symbols | ||
39 | * for IRQs handled directly through the AIC, or else the AT91_PIN_* | ||
40 | * symbols in gpio.h for ones handled indirectly as GPIOs. | ||
41 | * We make provision for 5 banks of GPIO. | ||
42 | */ | ||
43 | #define NR_IRQS (NR_AIC_IRQS + (5 * 32)) | ||
44 | |||
45 | /* FIQ is AIC source 0. */ | ||
46 | #define FIQ_START AT91_ID_FIQ | ||
47 | |||
48 | #endif | ||
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index cfcfcbe36269..1e02c0e49dcc 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
25 | #include <linux/mm.h> | 25 | #include <linux/mm.h> |
26 | #include <linux/bitmap.h> | ||
26 | #include <linux/types.h> | 27 | #include <linux/types.h> |
27 | #include <linux/irq.h> | 28 | #include <linux/irq.h> |
28 | #include <linux/of.h> | 29 | #include <linux/of.h> |
@@ -30,38 +31,218 @@ | |||
30 | #include <linux/of_irq.h> | 31 | #include <linux/of_irq.h> |
31 | #include <linux/irqdomain.h> | 32 | #include <linux/irqdomain.h> |
32 | #include <linux/err.h> | 33 | #include <linux/err.h> |
34 | #include <linux/slab.h> | ||
33 | 35 | ||
34 | #include <mach/hardware.h> | 36 | #include <mach/hardware.h> |
35 | #include <asm/irq.h> | 37 | #include <asm/irq.h> |
36 | #include <asm/setup.h> | 38 | #include <asm/setup.h> |
37 | 39 | ||
40 | #include <asm/exception.h> | ||
38 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
39 | #include <asm/mach/irq.h> | 42 | #include <asm/mach/irq.h> |
40 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
41 | 44 | ||
45 | #include <mach/at91_aic.h> | ||
46 | |||
42 | void __iomem *at91_aic_base; | 47 | void __iomem *at91_aic_base; |
43 | static struct irq_domain *at91_aic_domain; | 48 | static struct irq_domain *at91_aic_domain; |
44 | static struct device_node *at91_aic_np; | 49 | static struct device_node *at91_aic_np; |
50 | static unsigned int n_irqs = NR_AIC_IRQS; | ||
51 | static unsigned long at91_aic_caps = 0; | ||
52 | |||
53 | /* AIC5 introduces a Source Select Register */ | ||
54 | #define AT91_AIC_CAP_AIC5 (1 << 0) | ||
55 | #define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5) | ||
56 | |||
57 | #ifdef CONFIG_PM | ||
58 | |||
59 | static unsigned long *wakeups; | ||
60 | static unsigned long *backups; | ||
61 | |||
62 | #define set_backup(bit) set_bit(bit, backups) | ||
63 | #define clear_backup(bit) clear_bit(bit, backups) | ||
64 | |||
65 | static int at91_aic_pm_init(void) | ||
66 | { | ||
67 | backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); | ||
68 | if (!backups) | ||
69 | return -ENOMEM; | ||
70 | |||
71 | wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); | ||
72 | if (!wakeups) { | ||
73 | kfree(backups); | ||
74 | return -ENOMEM; | ||
75 | } | ||
76 | |||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | static int at91_aic_set_wake(struct irq_data *d, unsigned value) | ||
81 | { | ||
82 | if (unlikely(d->hwirq >= n_irqs)) | ||
83 | return -EINVAL; | ||
84 | |||
85 | if (value) | ||
86 | set_bit(d->hwirq, wakeups); | ||
87 | else | ||
88 | clear_bit(d->hwirq, wakeups); | ||
89 | |||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | void at91_irq_suspend(void) | ||
94 | { | ||
95 | int i = 0, bit; | ||
96 | |||
97 | if (has_aic5()) { | ||
98 | /* disable enabled irqs */ | ||
99 | while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { | ||
100 | at91_aic_write(AT91_AIC5_SSR, | ||
101 | bit & AT91_AIC5_INTSEL_MSK); | ||
102 | at91_aic_write(AT91_AIC5_IDCR, 1); | ||
103 | i = bit; | ||
104 | } | ||
105 | /* enable wakeup irqs */ | ||
106 | i = 0; | ||
107 | while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { | ||
108 | at91_aic_write(AT91_AIC5_SSR, | ||
109 | bit & AT91_AIC5_INTSEL_MSK); | ||
110 | at91_aic_write(AT91_AIC5_IECR, 1); | ||
111 | i = bit; | ||
112 | } | ||
113 | } else { | ||
114 | at91_aic_write(AT91_AIC_IDCR, *backups); | ||
115 | at91_aic_write(AT91_AIC_IECR, *wakeups); | ||
116 | } | ||
117 | } | ||
118 | |||
119 | void at91_irq_resume(void) | ||
120 | { | ||
121 | int i = 0, bit; | ||
122 | |||
123 | if (has_aic5()) { | ||
124 | /* disable wakeup irqs */ | ||
125 | while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { | ||
126 | at91_aic_write(AT91_AIC5_SSR, | ||
127 | bit & AT91_AIC5_INTSEL_MSK); | ||
128 | at91_aic_write(AT91_AIC5_IDCR, 1); | ||
129 | i = bit; | ||
130 | } | ||
131 | /* enable irqs disabled for suspend */ | ||
132 | i = 0; | ||
133 | while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { | ||
134 | at91_aic_write(AT91_AIC5_SSR, | ||
135 | bit & AT91_AIC5_INTSEL_MSK); | ||
136 | at91_aic_write(AT91_AIC5_IECR, 1); | ||
137 | i = bit; | ||
138 | } | ||
139 | } else { | ||
140 | at91_aic_write(AT91_AIC_IDCR, *wakeups); | ||
141 | at91_aic_write(AT91_AIC_IECR, *backups); | ||
142 | } | ||
143 | } | ||
144 | |||
145 | #else | ||
146 | static inline int at91_aic_pm_init(void) | ||
147 | { | ||
148 | return 0; | ||
149 | } | ||
150 | |||
151 | #define set_backup(bit) | ||
152 | #define clear_backup(bit) | ||
153 | #define at91_aic_set_wake NULL | ||
154 | |||
155 | #endif /* CONFIG_PM */ | ||
156 | |||
157 | asmlinkage void __exception_irq_entry | ||
158 | at91_aic_handle_irq(struct pt_regs *regs) | ||
159 | { | ||
160 | u32 irqnr; | ||
161 | u32 irqstat; | ||
162 | |||
163 | irqnr = at91_aic_read(AT91_AIC_IVR); | ||
164 | irqstat = at91_aic_read(AT91_AIC_ISR); | ||
165 | |||
166 | /* | ||
167 | * ISR value is 0 when there is no current interrupt or when there is | ||
168 | * a spurious interrupt | ||
169 | */ | ||
170 | if (!irqstat) | ||
171 | at91_aic_write(AT91_AIC_EOICR, 0); | ||
172 | else | ||
173 | handle_IRQ(irqnr, regs); | ||
174 | } | ||
175 | |||
176 | asmlinkage void __exception_irq_entry | ||
177 | at91_aic5_handle_irq(struct pt_regs *regs) | ||
178 | { | ||
179 | u32 irqnr; | ||
180 | u32 irqstat; | ||
181 | |||
182 | irqnr = at91_aic_read(AT91_AIC5_IVR); | ||
183 | irqstat = at91_aic_read(AT91_AIC5_ISR); | ||
184 | |||
185 | if (!irqstat) | ||
186 | at91_aic_write(AT91_AIC5_EOICR, 0); | ||
187 | else | ||
188 | handle_IRQ(irqnr, regs); | ||
189 | } | ||
45 | 190 | ||
46 | static void at91_aic_mask_irq(struct irq_data *d) | 191 | static void at91_aic_mask_irq(struct irq_data *d) |
47 | { | 192 | { |
48 | /* Disable interrupt on AIC */ | 193 | /* Disable interrupt on AIC */ |
49 | at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); | 194 | at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); |
195 | /* Update ISR cache */ | ||
196 | clear_backup(d->hwirq); | ||
197 | } | ||
198 | |||
199 | static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) | ||
200 | { | ||
201 | /* Disable interrupt on AIC5 */ | ||
202 | at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); | ||
203 | at91_aic_write(AT91_AIC5_IDCR, 1); | ||
204 | /* Update ISR cache */ | ||
205 | clear_backup(d->hwirq); | ||
50 | } | 206 | } |
51 | 207 | ||
52 | static void at91_aic_unmask_irq(struct irq_data *d) | 208 | static void at91_aic_unmask_irq(struct irq_data *d) |
53 | { | 209 | { |
54 | /* Enable interrupt on AIC */ | 210 | /* Enable interrupt on AIC */ |
55 | at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); | 211 | at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); |
212 | /* Update ISR cache */ | ||
213 | set_backup(d->hwirq); | ||
214 | } | ||
215 | |||
216 | static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) | ||
217 | { | ||
218 | /* Enable interrupt on AIC5 */ | ||
219 | at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); | ||
220 | at91_aic_write(AT91_AIC5_IECR, 1); | ||
221 | /* Update ISR cache */ | ||
222 | set_backup(d->hwirq); | ||
56 | } | 223 | } |
57 | 224 | ||
58 | unsigned int at91_extern_irq; | 225 | static void at91_aic_eoi(struct irq_data *d) |
226 | { | ||
227 | /* | ||
228 | * Mark end-of-interrupt on AIC, the controller doesn't care about | ||
229 | * the value written. Moreover it's a write-only register. | ||
230 | */ | ||
231 | at91_aic_write(AT91_AIC_EOICR, 0); | ||
232 | } | ||
233 | |||
234 | static void __maybe_unused at91_aic5_eoi(struct irq_data *d) | ||
235 | { | ||
236 | at91_aic_write(AT91_AIC5_EOICR, 0); | ||
237 | } | ||
59 | 238 | ||
60 | #define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) | 239 | unsigned long *at91_extern_irq; |
61 | 240 | ||
62 | static int at91_aic_set_type(struct irq_data *d, unsigned type) | 241 | #define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq) |
242 | |||
243 | static int at91_aic_compute_srctype(struct irq_data *d, unsigned type) | ||
63 | { | 244 | { |
64 | unsigned int smr, srctype; | 245 | int srctype; |
65 | 246 | ||
66 | switch (type) { | 247 | switch (type) { |
67 | case IRQ_TYPE_LEVEL_HIGH: | 248 | case IRQ_TYPE_LEVEL_HIGH: |
@@ -74,65 +255,51 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) | |||
74 | if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ | 255 | if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ |
75 | srctype = AT91_AIC_SRCTYPE_LOW; | 256 | srctype = AT91_AIC_SRCTYPE_LOW; |
76 | else | 257 | else |
77 | return -EINVAL; | 258 | srctype = -EINVAL; |
78 | break; | 259 | break; |
79 | case IRQ_TYPE_EDGE_FALLING: | 260 | case IRQ_TYPE_EDGE_FALLING: |
80 | if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ | 261 | if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ |
81 | srctype = AT91_AIC_SRCTYPE_FALLING; | 262 | srctype = AT91_AIC_SRCTYPE_FALLING; |
82 | else | 263 | else |
83 | return -EINVAL; | 264 | srctype = -EINVAL; |
84 | break; | 265 | break; |
85 | default: | 266 | default: |
86 | return -EINVAL; | 267 | srctype = -EINVAL; |
87 | } | 268 | } |
88 | 269 | ||
89 | smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; | 270 | return srctype; |
90 | at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); | ||
91 | return 0; | ||
92 | } | 271 | } |
93 | 272 | ||
94 | #ifdef CONFIG_PM | 273 | static int at91_aic_set_type(struct irq_data *d, unsigned type) |
95 | |||
96 | static u32 wakeups; | ||
97 | static u32 backups; | ||
98 | |||
99 | static int at91_aic_set_wake(struct irq_data *d, unsigned value) | ||
100 | { | 274 | { |
101 | if (unlikely(d->hwirq >= NR_AIC_IRQS)) | 275 | unsigned int smr; |
102 | return -EINVAL; | 276 | int srctype; |
103 | 277 | ||
104 | if (value) | 278 | srctype = at91_aic_compute_srctype(d, type); |
105 | wakeups |= (1 << d->hwirq); | 279 | if (srctype < 0) |
106 | else | 280 | return srctype; |
107 | wakeups &= ~(1 << d->hwirq); | 281 | |
282 | if (has_aic5()) { | ||
283 | at91_aic_write(AT91_AIC5_SSR, | ||
284 | d->hwirq & AT91_AIC5_INTSEL_MSK); | ||
285 | smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE; | ||
286 | at91_aic_write(AT91_AIC5_SMR, smr | srctype); | ||
287 | } else { | ||
288 | smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) | ||
289 | & ~AT91_AIC_SRCTYPE; | ||
290 | at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); | ||
291 | } | ||
108 | 292 | ||
109 | return 0; | 293 | return 0; |
110 | } | 294 | } |
111 | 295 | ||
112 | void at91_irq_suspend(void) | ||
113 | { | ||
114 | backups = at91_aic_read(AT91_AIC_IMR); | ||
115 | at91_aic_write(AT91_AIC_IDCR, backups); | ||
116 | at91_aic_write(AT91_AIC_IECR, wakeups); | ||
117 | } | ||
118 | |||
119 | void at91_irq_resume(void) | ||
120 | { | ||
121 | at91_aic_write(AT91_AIC_IDCR, wakeups); | ||
122 | at91_aic_write(AT91_AIC_IECR, backups); | ||
123 | } | ||
124 | |||
125 | #else | ||
126 | #define at91_aic_set_wake NULL | ||
127 | #endif | ||
128 | |||
129 | static struct irq_chip at91_aic_chip = { | 296 | static struct irq_chip at91_aic_chip = { |
130 | .name = "AIC", | 297 | .name = "AIC", |
131 | .irq_ack = at91_aic_mask_irq, | ||
132 | .irq_mask = at91_aic_mask_irq, | 298 | .irq_mask = at91_aic_mask_irq, |
133 | .irq_unmask = at91_aic_unmask_irq, | 299 | .irq_unmask = at91_aic_unmask_irq, |
134 | .irq_set_type = at91_aic_set_type, | 300 | .irq_set_type = at91_aic_set_type, |
135 | .irq_set_wake = at91_aic_set_wake, | 301 | .irq_set_wake = at91_aic_set_wake, |
302 | .irq_eoi = at91_aic_eoi, | ||
136 | }; | 303 | }; |
137 | 304 | ||
138 | static void __init at91_aic_hw_init(unsigned int spu_vector) | 305 | static void __init at91_aic_hw_init(unsigned int spu_vector) |
@@ -161,41 +328,172 @@ static void __init at91_aic_hw_init(unsigned int spu_vector) | |||
161 | at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); | 328 | at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); |
162 | } | 329 | } |
163 | 330 | ||
331 | static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) | ||
332 | { | ||
333 | int i; | ||
334 | |||
335 | /* | ||
336 | * Perform 8 End Of Interrupt Command to make sure AIC | ||
337 | * will not Lock out nIRQ | ||
338 | */ | ||
339 | for (i = 0; i < 8; i++) | ||
340 | at91_aic_write(AT91_AIC5_EOICR, 0); | ||
341 | |||
342 | /* | ||
343 | * Spurious Interrupt ID in Spurious Vector Register. | ||
344 | * When there is no current interrupt, the IRQ Vector Register | ||
345 | * reads the value stored in AIC_SPU | ||
346 | */ | ||
347 | at91_aic_write(AT91_AIC5_SPU, spu_vector); | ||
348 | |||
349 | /* No debugging in AIC: Debug (Protect) Control Register */ | ||
350 | at91_aic_write(AT91_AIC5_DCR, 0); | ||
351 | |||
352 | /* Disable and clear all interrupts initially */ | ||
353 | for (i = 0; i < n_irqs; i++) { | ||
354 | at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK); | ||
355 | at91_aic_write(AT91_AIC5_IDCR, 1); | ||
356 | at91_aic_write(AT91_AIC5_ICCR, 1); | ||
357 | } | ||
358 | } | ||
359 | |||
164 | #if defined(CONFIG_OF) | 360 | #if defined(CONFIG_OF) |
361 | static unsigned int *at91_aic_irq_priorities; | ||
362 | |||
165 | static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, | 363 | static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, |
166 | irq_hw_number_t hw) | 364 | irq_hw_number_t hw) |
167 | { | 365 | { |
168 | /* Put virq number in Source Vector Register */ | 366 | /* Put virq number in Source Vector Register */ |
169 | at91_aic_write(AT91_AIC_SVR(hw), virq); | 367 | at91_aic_write(AT91_AIC_SVR(hw), virq); |
170 | 368 | ||
171 | /* Active Low interrupt, without priority */ | 369 | /* Active Low interrupt, with priority */ |
172 | at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); | 370 | at91_aic_write(AT91_AIC_SMR(hw), |
371 | AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); | ||
173 | 372 | ||
174 | irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq); | 373 | irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); |
175 | set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); | 374 | set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); |
176 | 375 | ||
177 | return 0; | 376 | return 0; |
178 | } | 377 | } |
179 | 378 | ||
379 | static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq, | ||
380 | irq_hw_number_t hw) | ||
381 | { | ||
382 | at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK); | ||
383 | |||
384 | /* Put virq number in Source Vector Register */ | ||
385 | at91_aic_write(AT91_AIC5_SVR, virq); | ||
386 | |||
387 | /* Active Low interrupt, with priority */ | ||
388 | at91_aic_write(AT91_AIC5_SMR, | ||
389 | AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); | ||
390 | |||
391 | irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); | ||
392 | set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); | ||
393 | |||
394 | return 0; | ||
395 | } | ||
396 | |||
397 | static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, | ||
398 | const u32 *intspec, unsigned int intsize, | ||
399 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | ||
400 | { | ||
401 | if (WARN_ON(intsize < 3)) | ||
402 | return -EINVAL; | ||
403 | if (WARN_ON(intspec[0] >= n_irqs)) | ||
404 | return -EINVAL; | ||
405 | if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) | ||
406 | || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) | ||
407 | return -EINVAL; | ||
408 | |||
409 | *out_hwirq = intspec[0]; | ||
410 | *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; | ||
411 | at91_aic_irq_priorities[*out_hwirq] = intspec[2]; | ||
412 | |||
413 | return 0; | ||
414 | } | ||
415 | |||
180 | static struct irq_domain_ops at91_aic_irq_ops = { | 416 | static struct irq_domain_ops at91_aic_irq_ops = { |
181 | .map = at91_aic_irq_map, | 417 | .map = at91_aic_irq_map, |
182 | .xlate = irq_domain_xlate_twocell, | 418 | .xlate = at91_aic_irq_domain_xlate, |
183 | }; | 419 | }; |
184 | 420 | ||
185 | int __init at91_aic_of_init(struct device_node *node, | 421 | int __init at91_aic_of_common_init(struct device_node *node, |
186 | struct device_node *parent) | 422 | struct device_node *parent) |
187 | { | 423 | { |
424 | struct property *prop; | ||
425 | const __be32 *p; | ||
426 | u32 val; | ||
427 | |||
428 | at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) | ||
429 | * sizeof(*at91_extern_irq), GFP_KERNEL); | ||
430 | if (!at91_extern_irq) | ||
431 | return -ENOMEM; | ||
432 | |||
433 | if (at91_aic_pm_init()) { | ||
434 | kfree(at91_extern_irq); | ||
435 | return -ENOMEM; | ||
436 | } | ||
437 | |||
438 | at91_aic_irq_priorities = kzalloc(n_irqs | ||
439 | * sizeof(*at91_aic_irq_priorities), | ||
440 | GFP_KERNEL); | ||
441 | if (!at91_aic_irq_priorities) | ||
442 | return -ENOMEM; | ||
443 | |||
188 | at91_aic_base = of_iomap(node, 0); | 444 | at91_aic_base = of_iomap(node, 0); |
189 | at91_aic_np = node; | 445 | at91_aic_np = node; |
190 | 446 | ||
191 | at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS, | 447 | at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs, |
192 | &at91_aic_irq_ops, NULL); | 448 | &at91_aic_irq_ops, NULL); |
193 | if (!at91_aic_domain) | 449 | if (!at91_aic_domain) |
194 | panic("Unable to add AIC irq domain (DT)\n"); | 450 | panic("Unable to add AIC irq domain (DT)\n"); |
195 | 451 | ||
452 | of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { | ||
453 | if (val >= n_irqs) | ||
454 | pr_warn("AIC: external irq %d >= %d skip it\n", | ||
455 | val, n_irqs); | ||
456 | else | ||
457 | set_bit(val, at91_extern_irq); | ||
458 | } | ||
459 | |||
196 | irq_set_default_host(at91_aic_domain); | 460 | irq_set_default_host(at91_aic_domain); |
197 | 461 | ||
198 | at91_aic_hw_init(NR_AIC_IRQS); | 462 | return 0; |
463 | } | ||
464 | |||
465 | int __init at91_aic_of_init(struct device_node *node, | ||
466 | struct device_node *parent) | ||
467 | { | ||
468 | int err; | ||
469 | |||
470 | err = at91_aic_of_common_init(node, parent); | ||
471 | if (err) | ||
472 | return err; | ||
473 | |||
474 | at91_aic_hw_init(n_irqs); | ||
475 | |||
476 | return 0; | ||
477 | } | ||
478 | |||
479 | int __init at91_aic5_of_init(struct device_node *node, | ||
480 | struct device_node *parent) | ||
481 | { | ||
482 | int err; | ||
483 | |||
484 | at91_aic_caps |= AT91_AIC_CAP_AIC5; | ||
485 | n_irqs = NR_AIC5_IRQS; | ||
486 | at91_aic_chip.irq_ack = at91_aic5_mask_irq; | ||
487 | at91_aic_chip.irq_mask = at91_aic5_mask_irq; | ||
488 | at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; | ||
489 | at91_aic_chip.irq_eoi = at91_aic5_eoi; | ||
490 | at91_aic_irq_ops.map = at91_aic5_irq_map; | ||
491 | |||
492 | err = at91_aic_of_common_init(node, parent); | ||
493 | if (err) | ||
494 | return err; | ||
495 | |||
496 | at91_aic5_hw_init(n_irqs); | ||
199 | 497 | ||
200 | return 0; | 498 | return 0; |
201 | } | 499 | } |
@@ -204,22 +502,25 @@ int __init at91_aic_of_init(struct device_node *node, | |||
204 | /* | 502 | /* |
205 | * Initialize the AIC interrupt controller. | 503 | * Initialize the AIC interrupt controller. |
206 | */ | 504 | */ |
207 | void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) | 505 | void __init at91_aic_init(unsigned int *priority) |
208 | { | 506 | { |
209 | unsigned int i; | 507 | unsigned int i; |
210 | int irq_base; | 508 | int irq_base; |
211 | 509 | ||
510 | if (at91_aic_pm_init()) | ||
511 | panic("Unable to allocate bit maps\n"); | ||
512 | |||
212 | at91_aic_base = ioremap(AT91_AIC, 512); | 513 | at91_aic_base = ioremap(AT91_AIC, 512); |
213 | if (!at91_aic_base) | 514 | if (!at91_aic_base) |
214 | panic("Unable to ioremap AIC registers\n"); | 515 | panic("Unable to ioremap AIC registers\n"); |
215 | 516 | ||
216 | /* Add irq domain for AIC */ | 517 | /* Add irq domain for AIC */ |
217 | irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0); | 518 | irq_base = irq_alloc_descs(-1, 0, n_irqs, 0); |
218 | if (irq_base < 0) { | 519 | if (irq_base < 0) { |
219 | WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); | 520 | WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); |
220 | irq_base = 0; | 521 | irq_base = 0; |
221 | } | 522 | } |
222 | at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS, | 523 | at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs, |
223 | irq_base, 0, | 524 | irq_base, 0, |
224 | &irq_domain_simple_ops, NULL); | 525 | &irq_domain_simple_ops, NULL); |
225 | 526 | ||
@@ -232,15 +533,14 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) | |||
232 | * The IVR is used by macro get_irqnr_and_base to read and verify. | 533 | * The IVR is used by macro get_irqnr_and_base to read and verify. |
233 | * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. | 534 | * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. |
234 | */ | 535 | */ |
235 | for (i = 0; i < NR_AIC_IRQS; i++) { | 536 | for (i = 0; i < n_irqs; i++) { |
236 | /* Put hardware irq number in Source Vector Register: */ | 537 | /* Put hardware irq number in Source Vector Register: */ |
237 | at91_aic_write(AT91_AIC_SVR(i), i); | 538 | at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); |
238 | /* Active Low interrupt, with the specified priority */ | 539 | /* Active Low interrupt, with the specified priority */ |
239 | at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); | 540 | at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); |
240 | 541 | irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); | |
241 | irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); | ||
242 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 542 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
243 | } | 543 | } |
244 | 544 | ||
245 | at91_aic_hw_init(NR_AIC_IRQS); | 545 | at91_aic_hw_init(n_irqs); |
246 | } | 546 | } |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 1bfaad628731..2c2d86505a54 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <asm/mach/time.h> | 25 | #include <asm/mach/time.h> |
26 | #include <asm/mach/irq.h> | 26 | #include <asm/mach/irq.h> |
27 | 27 | ||
28 | #include <mach/at91_aic.h> | ||
28 | #include <mach/at91_pmc.h> | 29 | #include <mach/at91_pmc.h> |
29 | #include <mach/cpu.h> | 30 | #include <mach/cpu.h> |
30 | 31 | ||
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index c965fd8eb31a..f15293bd7974 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/irq.h> | 27 | #include <linux/irq.h> |
28 | #include <linux/sched.h> | 28 | #include <linux/sched.h> |
29 | #include <linux/timex.h> | ||
30 | 29 | ||
31 | #include <asm/sizes.h> | 30 | #include <asm/sizes.h> |
32 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
@@ -188,7 +187,6 @@ static struct irqaction clps711x_timer_irq = { | |||
188 | 187 | ||
189 | static void __init clps711x_timer_init(void) | 188 | static void __init clps711x_timer_init(void) |
190 | { | 189 | { |
191 | struct timespec tv; | ||
192 | unsigned int syscon; | 190 | unsigned int syscon; |
193 | 191 | ||
194 | syscon = clps_readl(SYSCON1); | 192 | syscon = clps_readl(SYSCON1); |
@@ -198,10 +196,6 @@ static void __init clps711x_timer_init(void) | |||
198 | clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ | 196 | clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ |
199 | 197 | ||
200 | setup_irq(IRQ_TC2OI, &clps711x_timer_irq); | 198 | setup_irq(IRQ_TC2OI, &clps711x_timer_irq); |
201 | |||
202 | tv.tv_nsec = 0; | ||
203 | tv.tv_sec = clps_readl(RTCDR); | ||
204 | do_settimeofday(&tv); | ||
205 | } | 199 | } |
206 | 200 | ||
207 | struct sys_timer clps711x_timer = { | 201 | struct sys_timer clps711x_timer = { |
diff --git a/arch/arm/mach-clps711x/include/mach/memory.h b/arch/arm/mach-clps711x/include/mach/memory.h index 3a032a67725c..fc0e028d9405 100644 --- a/arch/arm/mach-clps711x/include/mach/memory.h +++ b/arch/arm/mach-clps711x/include/mach/memory.h | |||
@@ -25,26 +25,6 @@ | |||
25 | */ | 25 | */ |
26 | #define PLAT_PHYS_OFFSET UL(0xc0000000) | 26 | #define PLAT_PHYS_OFFSET UL(0xc0000000) |
27 | 27 | ||
28 | #if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12) | ||
29 | |||
30 | #define __virt_to_bus(x) ((x) - PAGE_OFFSET) | ||
31 | #define __bus_to_virt(x) ((x) + PAGE_OFFSET) | ||
32 | #define __pfn_to_bus(x) (__pfn_to_phys(x) - PHYS_OFFSET) | ||
33 | #define __bus_to_pfn(x) __phys_to_pfn((x) + PHYS_OFFSET) | ||
34 | |||
35 | #endif | ||
36 | |||
37 | |||
38 | /* | ||
39 | * Like the SA1100, the EDB7211 has a large gap between physical RAM | ||
40 | * banks. In 2.2, the Psion (CL-PS7110) port added custom support for | ||
41 | * discontiguous physical memory. In 2.4, we can use the standard | ||
42 | * Linux NUMA support. | ||
43 | * | ||
44 | * This is not necessary for EP7211 implementations with only one used | ||
45 | * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. | ||
46 | */ | ||
47 | |||
48 | /* | 28 | /* |
49 | * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 | 29 | * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 |
50 | * uses only one of the two banks (bank #1). However, even within | 30 | * uses only one of the two banks (bank #1). However, even within |
@@ -54,23 +34,6 @@ | |||
54 | * them, so we use 24 for the node max shift to get 16MB node sizes. | 34 | * them, so we use 24 for the node max shift to get 16MB node sizes. |
55 | */ | 35 | */ |
56 | 36 | ||
57 | /* | ||
58 | * Because of the wide memory address space between physical RAM banks on the | ||
59 | * SA1100, it's much more convenient to use Linux's NUMA support to implement | ||
60 | * our memory map representation. Assuming all memory nodes have equal access | ||
61 | * characteristics, we then have generic discontiguous memory support. | ||
62 | * | ||
63 | * Of course, all this isn't mandatory for SA1100 implementations with only | ||
64 | * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. | ||
65 | * | ||
66 | * The nodes are matched with the physical memory bank addresses which are | ||
67 | * incidentally the same as virtual addresses. | ||
68 | * | ||
69 | * node 0: 0xc0000000 - 0xc7ffffff | ||
70 | * node 1: 0xc8000000 - 0xcfffffff | ||
71 | * node 2: 0xd0000000 - 0xd7ffffff | ||
72 | * node 3: 0xd8000000 - 0xdfffffff | ||
73 | */ | ||
74 | #define SECTION_SIZE_BITS 24 | 37 | #define SECTION_SIZE_BITS 24 |
75 | #define MAX_PHYSMEM_BITS 32 | 38 | #define MAX_PHYSMEM_BITS 32 |
76 | 39 | ||
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 42ee8f33eafb..f266d90b9efc 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c | |||
@@ -86,17 +86,7 @@ static void __init p720t_map_io(void) | |||
86 | iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc)); | 86 | iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc)); |
87 | } | 87 | } |
88 | 88 | ||
89 | MACHINE_START(P720T, "ARM-Prospector720T") | 89 | static void __init p720t_init_early(void) |
90 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | ||
91 | .atag_offset = 0x100, | ||
92 | .fixup = fixup_p720t, | ||
93 | .map_io = p720t_map_io, | ||
94 | .init_irq = clps711x_init_irq, | ||
95 | .timer = &clps711x_timer, | ||
96 | .restart = clps711x_restart, | ||
97 | MACHINE_END | ||
98 | |||
99 | static int p720t_hw_init(void) | ||
100 | { | 90 | { |
101 | /* | 91 | /* |
102 | * Power down as much as possible in case we don't | 92 | * Power down as much as possible in case we don't |
@@ -111,13 +101,19 @@ static int p720t_hw_init(void) | |||
111 | PLD_CODEC = 0; | 101 | PLD_CODEC = 0; |
112 | PLD_TCH = 0; | 102 | PLD_TCH = 0; |
113 | PLD_SPI = 0; | 103 | PLD_SPI = 0; |
114 | #ifndef CONFIG_DEBUG_LL | 104 | if (!IS_ENABLED(CONFIG_DEBUG_LL)) { |
115 | PLD_COM2 = 0; | 105 | PLD_COM2 = 0; |
116 | PLD_COM1 = 0; | 106 | PLD_COM1 = 0; |
117 | #endif | 107 | } |
118 | |||
119 | return 0; | ||
120 | } | 108 | } |
121 | 109 | ||
122 | __initcall(p720t_hw_init); | 110 | MACHINE_START(P720T, "ARM-Prospector720T") |
123 | 111 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | |
112 | .atag_offset = 0x100, | ||
113 | .fixup = fixup_p720t, | ||
114 | .init_early = p720t_init_early, | ||
115 | .map_io = p720t_map_io, | ||
116 | .init_irq = clps711x_init_irq, | ||
117 | .timer = &clps711x_timer, | ||
118 | .restart = clps711x_restart, | ||
119 | MACHINE_END | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h deleted file mode 100644 index b9bf3d6a4423..000000000000 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty, remove once unused */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h deleted file mode 100644 index b9bf3d6a4423..000000000000 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty, remove once unused */ | ||
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 742edd3bbec3..0ec1a91388c7 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -712,31 +712,6 @@ static int __init exynos4_l2x0_cache_init(void) | |||
712 | early_initcall(exynos4_l2x0_cache_init); | 712 | early_initcall(exynos4_l2x0_cache_init); |
713 | #endif | 713 | #endif |
714 | 714 | ||
715 | static int __init exynos5_l2_cache_init(void) | ||
716 | { | ||
717 | unsigned int val; | ||
718 | |||
719 | if (!soc_is_exynos5250()) | ||
720 | return 0; | ||
721 | |||
722 | asm volatile("mrc p15, 0, %0, c1, c0, 0\n" | ||
723 | "bic %0, %0, #(1 << 2)\n" /* cache disable */ | ||
724 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
725 | "mrc p15, 1, %0, c9, c0, 2\n" | ||
726 | : "=r"(val)); | ||
727 | |||
728 | val |= (1 << 9) | (1 << 5) | (2 << 6) | (2 << 0); | ||
729 | |||
730 | asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val)); | ||
731 | asm volatile("mrc p15, 0, %0, c1, c0, 0\n" | ||
732 | "orr %0, %0, #(1 << 2)\n" /* cache enable */ | ||
733 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
734 | : : "r"(val)); | ||
735 | |||
736 | return 0; | ||
737 | } | ||
738 | early_initcall(exynos5_l2_cache_init); | ||
739 | |||
740 | static int __init exynos_init(void) | 715 | static int __init exynos_init(void) |
741 | { | 716 | { |
742 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | 717 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); |
diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h deleted file mode 100644 index c71a5fba6a84..000000000000 --- a/arch/arm/mach-exynos/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Co. Ltd. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #ifndef __ASM_ARCH_SPI_CLKS_H | ||
11 | #define __ASM_ARCH_SPI_CLKS_H __FILE__ | ||
12 | |||
13 | /* Must source from SCLK_SPI */ | ||
14 | #define EXYNOS_SPI_SRCCLK_SCLK 0 | ||
15 | |||
16 | #endif /* __ASM_ARCH_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 656f8fc9addd..f3b328d0aff6 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -50,7 +50,6 @@ | |||
50 | #include <plat/gpio-cfg.h> | 50 | #include <plat/gpio-cfg.h> |
51 | #include <plat/iic.h> | 51 | #include <plat/iic.h> |
52 | #include <plat/mfc.h> | 52 | #include <plat/mfc.h> |
53 | #include <plat/pd.h> | ||
54 | #include <plat/fimc-core.h> | 53 | #include <plat/fimc-core.h> |
55 | #include <plat/camport.h> | 54 | #include <plat/camport.h> |
56 | #include <plat/mipi_csis.h> | 55 | #include <plat/mipi_csis.h> |
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index f5572be9d7bf..873c708fd340 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #include <plat/clock.h> | 38 | #include <plat/clock.h> |
39 | #include <plat/gpio-cfg.h> | 39 | #include <plat/gpio-cfg.h> |
40 | #include <plat/backlight.h> | 40 | #include <plat/backlight.h> |
41 | #include <plat/pd.h> | ||
42 | #include <plat/fb.h> | 41 | #include <plat/fb.h> |
43 | #include <plat/mfc.h> | 42 | #include <plat/mfc.h> |
44 | 43 | ||
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index 262e9e446a96..5fb209c4a594 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <plat/keypad.h> | 34 | #include <plat/keypad.h> |
35 | #include <plat/sdhci.h> | 35 | #include <plat/sdhci.h> |
36 | #include <plat/iic.h> | 36 | #include <plat/iic.h> |
37 | #include <plat/pd.h> | ||
38 | #include <plat/gpio-cfg.h> | 37 | #include <plat/gpio-cfg.h> |
39 | #include <plat/backlight.h> | 38 | #include <plat/backlight.h> |
40 | #include <plat/mfc.h> | 39 | #include <plat/mfc.h> |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index cd92fa86ba41..68719f57dcea 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <plat/fb.h> | 39 | #include <plat/fb.h> |
40 | #include <plat/mfc.h> | 40 | #include <plat/mfc.h> |
41 | #include <plat/sdhci.h> | 41 | #include <plat/sdhci.h> |
42 | #include <plat/pd.h> | ||
43 | #include <plat/regs-fb-v4.h> | 42 | #include <plat/regs-fb-v4.h> |
44 | #include <plat/fimc-core.h> | 43 | #include <plat/fimc-core.h> |
45 | #include <plat/s5p-time.h> | 44 | #include <plat/s5p-time.h> |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index eff4db5de0dd..0da882a3c063 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -158,7 +158,6 @@ config MACH_MX25_3DS | |||
158 | select IMX_HAVE_PLATFORM_IMX2_WDT | 158 | select IMX_HAVE_PLATFORM_IMX2_WDT |
159 | select IMX_HAVE_PLATFORM_IMXDI_RTC | 159 | select IMX_HAVE_PLATFORM_IMXDI_RTC |
160 | select IMX_HAVE_PLATFORM_IMX_I2C | 160 | select IMX_HAVE_PLATFORM_IMX_I2C |
161 | select IMX_HAVE_PLATFORM_IMX_SSI | ||
162 | select IMX_HAVE_PLATFORM_IMX_FB | 161 | select IMX_HAVE_PLATFORM_IMX_FB |
163 | select IMX_HAVE_PLATFORM_IMX_KEYPAD | 162 | select IMX_HAVE_PLATFORM_IMX_KEYPAD |
164 | select IMX_HAVE_PLATFORM_IMX_UART | 163 | select IMX_HAVE_PLATFORM_IMX_UART |
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index e1a17ac7b3b4..abb42e7453a9 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c | |||
@@ -388,12 +388,9 @@ int __init mx6q_clocks_init(void) | |||
388 | pr_err("i.MX6q clk %d: register failed with %ld\n", | 388 | pr_err("i.MX6q clk %d: register failed with %ld\n", |
389 | i, PTR_ERR(clk[i])); | 389 | i, PTR_ERR(clk[i])); |
390 | 390 | ||
391 | clk_register_clkdev(clk[mmdc_ch0_axi], NULL, "mmdc_ch0_axi"); | ||
392 | clk_register_clkdev(clk[mmdc_ch1_axi], NULL, "mmdc_ch1_axi"); | ||
393 | clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0"); | 391 | clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0"); |
394 | clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); | 392 | clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); |
395 | clk_register_clkdev(clk[twd], NULL, "smp_twd"); | 393 | clk_register_clkdev(clk[twd], NULL, "smp_twd"); |
396 | clk_register_clkdev(clk[usboh3], NULL, "usboh3"); | ||
397 | clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); | 394 | clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); |
398 | clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); | 395 | clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); |
399 | clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial"); | 396 | clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial"); |
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 2628e0c474dc..93ece55f75df 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h | |||
@@ -14,7 +14,7 @@ extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; | |||
14 | imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata) | 14 | imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata) |
15 | 15 | ||
16 | extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data; | 16 | extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data; |
17 | #define imx21_add_imx2_wdt(pdata) \ | 17 | #define imx21_add_imx2_wdt() \ |
18 | imx_add_imx2_wdt(&imx21_imx2_wdt_data) | 18 | imx_add_imx2_wdt(&imx21_imx2_wdt_data) |
19 | 19 | ||
20 | extern const struct imx_imx_fb_data imx21_imx_fb_data; | 20 | extern const struct imx_imx_fb_data imx21_imx_fb_data; |
@@ -50,7 +50,7 @@ extern const struct imx_mxc_nand_data imx21_mxc_nand_data; | |||
50 | imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) | 50 | imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) |
51 | 51 | ||
52 | extern const struct imx_mxc_w1_data imx21_mxc_w1_data; | 52 | extern const struct imx_mxc_w1_data imx21_mxc_w1_data; |
53 | #define imx21_add_mxc_w1(pdata) \ | 53 | #define imx21_add_mxc_w1() \ |
54 | imx_add_mxc_w1(&imx21_mxc_w1_data) | 54 | imx_add_mxc_w1(&imx21_mxc_w1_data) |
55 | 55 | ||
56 | extern const struct imx_spi_imx_data imx21_cspi_data[]; | 56 | extern const struct imx_spi_imx_data imx21_cspi_data[]; |
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h index efa0761c508d..f8e03dd1f116 100644 --- a/arch/arm/mach-imx/devices-imx25.h +++ b/arch/arm/mach-imx/devices-imx25.h | |||
@@ -24,11 +24,11 @@ extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data; | |||
24 | imx_add_fsl_usb2_udc(&imx25_fsl_usb2_udc_data, pdata) | 24 | imx_add_fsl_usb2_udc(&imx25_fsl_usb2_udc_data, pdata) |
25 | 25 | ||
26 | extern struct imx_imxdi_rtc_data imx25_imxdi_rtc_data; | 26 | extern struct imx_imxdi_rtc_data imx25_imxdi_rtc_data; |
27 | #define imx25_add_imxdi_rtc(pdata) \ | 27 | #define imx25_add_imxdi_rtc() \ |
28 | imx_add_imxdi_rtc(&imx25_imxdi_rtc_data) | 28 | imx_add_imxdi_rtc(&imx25_imxdi_rtc_data) |
29 | 29 | ||
30 | extern const struct imx_imx2_wdt_data imx25_imx2_wdt_data; | 30 | extern const struct imx_imx2_wdt_data imx25_imx2_wdt_data; |
31 | #define imx25_add_imx2_wdt(pdata) \ | 31 | #define imx25_add_imx2_wdt() \ |
32 | imx_add_imx2_wdt(&imx25_imx2_wdt_data) | 32 | imx_add_imx2_wdt(&imx25_imx2_wdt_data) |
33 | 33 | ||
34 | extern const struct imx_imx_fb_data imx25_imx_fb_data; | 34 | extern const struct imx_imx_fb_data imx25_imx_fb_data; |
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 28537a5d9048..436c5720fe6a 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h | |||
@@ -18,7 +18,7 @@ extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data; | |||
18 | imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata) | 18 | imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata) |
19 | 19 | ||
20 | extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data; | 20 | extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data; |
21 | #define imx27_add_imx2_wdt(pdata) \ | 21 | #define imx27_add_imx2_wdt() \ |
22 | imx_add_imx2_wdt(&imx27_imx2_wdt_data) | 22 | imx_add_imx2_wdt(&imx27_imx2_wdt_data) |
23 | 23 | ||
24 | extern const struct imx_imx_fb_data imx27_imx_fb_data; | 24 | extern const struct imx_imx_fb_data imx27_imx_fb_data; |
@@ -50,7 +50,7 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[]; | |||
50 | extern const struct imx_mx2_camera_data imx27_mx2_camera_data; | 50 | extern const struct imx_mx2_camera_data imx27_mx2_camera_data; |
51 | #define imx27_add_mx2_camera(pdata) \ | 51 | #define imx27_add_mx2_camera(pdata) \ |
52 | imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) | 52 | imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) |
53 | #define imx27_add_mx2_emmaprp(pdata) \ | 53 | #define imx27_add_mx2_emmaprp() \ |
54 | imx_add_mx2_emmaprp(&imx27_mx2_camera_data) | 54 | imx_add_mx2_emmaprp(&imx27_mx2_camera_data) |
55 | 55 | ||
56 | extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; | 56 | extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; |
@@ -69,7 +69,7 @@ extern const struct imx_mxc_nand_data imx27_mxc_nand_data; | |||
69 | imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) | 69 | imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) |
70 | 70 | ||
71 | extern const struct imx_mxc_w1_data imx27_mxc_w1_data; | 71 | extern const struct imx_mxc_w1_data imx27_mxc_w1_data; |
72 | #define imx27_add_mxc_w1(pdata) \ | 72 | #define imx27_add_mxc_w1() \ |
73 | imx_add_mxc_w1(&imx27_mxc_w1_data) | 73 | imx_add_mxc_w1(&imx27_mxc_w1_data) |
74 | 74 | ||
75 | extern const struct imx_spi_imx_data imx27_cspi_data[]; | 75 | extern const struct imx_spi_imx_data imx27_cspi_data[]; |
diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h index 488e241a6db6..13f533d0aa5c 100644 --- a/arch/arm/mach-imx/devices-imx31.h +++ b/arch/arm/mach-imx/devices-imx31.h | |||
@@ -14,7 +14,7 @@ extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; | |||
14 | imx_add_fsl_usb2_udc(&imx31_fsl_usb2_udc_data, pdata) | 14 | imx_add_fsl_usb2_udc(&imx31_fsl_usb2_udc_data, pdata) |
15 | 15 | ||
16 | extern const struct imx_imx2_wdt_data imx31_imx2_wdt_data; | 16 | extern const struct imx_imx2_wdt_data imx31_imx2_wdt_data; |
17 | #define imx31_add_imx2_wdt(pdata) \ | 17 | #define imx31_add_imx2_wdt() \ |
18 | imx_add_imx2_wdt(&imx31_imx2_wdt_data) | 18 | imx_add_imx2_wdt(&imx31_imx2_wdt_data) |
19 | 19 | ||
20 | extern const struct imx_imx_i2c_data imx31_imx_i2c_data[]; | 20 | extern const struct imx_imx_i2c_data imx31_imx_i2c_data[]; |
@@ -65,11 +65,11 @@ extern const struct imx_mxc_nand_data imx31_mxc_nand_data; | |||
65 | imx_add_mxc_nand(&imx31_mxc_nand_data, pdata) | 65 | imx_add_mxc_nand(&imx31_mxc_nand_data, pdata) |
66 | 66 | ||
67 | extern const struct imx_mxc_rtc_data imx31_mxc_rtc_data; | 67 | extern const struct imx_mxc_rtc_data imx31_mxc_rtc_data; |
68 | #define imx31_add_mxc_rtc(pdata) \ | 68 | #define imx31_add_mxc_rtc() \ |
69 | imx_add_mxc_rtc(&imx31_mxc_rtc_data) | 69 | imx_add_mxc_rtc(&imx31_mxc_rtc_data) |
70 | 70 | ||
71 | extern const struct imx_mxc_w1_data imx31_mxc_w1_data; | 71 | extern const struct imx_mxc_w1_data imx31_mxc_w1_data; |
72 | #define imx31_add_mxc_w1(pdata) \ | 72 | #define imx31_add_mxc_w1() \ |
73 | imx_add_mxc_w1(&imx31_mxc_w1_data) | 73 | imx_add_mxc_w1(&imx31_mxc_w1_data) |
74 | 74 | ||
75 | extern const struct imx_spi_imx_data imx31_cspi_data[]; | 75 | extern const struct imx_spi_imx_data imx31_cspi_data[]; |
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h index 7b99ef0bb501..27245ce9cab2 100644 --- a/arch/arm/mach-imx/devices-imx35.h +++ b/arch/arm/mach-imx/devices-imx35.h | |||
@@ -24,7 +24,7 @@ extern const struct imx_flexcan_data imx35_flexcan_data[]; | |||
24 | #define imx35_add_flexcan1(pdata) imx35_add_flexcan(1, pdata) | 24 | #define imx35_add_flexcan1(pdata) imx35_add_flexcan(1, pdata) |
25 | 25 | ||
26 | extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data; | 26 | extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data; |
27 | #define imx35_add_imx2_wdt(pdata) \ | 27 | #define imx35_add_imx2_wdt() \ |
28 | imx_add_imx2_wdt(&imx35_imx2_wdt_data) | 28 | imx_add_imx2_wdt(&imx35_imx2_wdt_data) |
29 | 29 | ||
30 | extern const struct imx_imx_i2c_data imx35_imx_i2c_data[]; | 30 | extern const struct imx_imx_i2c_data imx35_imx_i2c_data[]; |
@@ -69,7 +69,7 @@ extern const struct imx_mxc_nand_data imx35_mxc_nand_data; | |||
69 | imx_add_mxc_nand(&imx35_mxc_nand_data, pdata) | 69 | imx_add_mxc_nand(&imx35_mxc_nand_data, pdata) |
70 | 70 | ||
71 | extern const struct imx_mxc_w1_data imx35_mxc_w1_data; | 71 | extern const struct imx_mxc_w1_data imx35_mxc_w1_data; |
72 | #define imx35_add_mxc_w1(pdata) \ | 72 | #define imx35_add_mxc_w1() \ |
73 | imx_add_mxc_w1(&imx35_mxc_w1_data) | 73 | imx_add_mxc_w1(&imx35_mxc_w1_data) |
74 | 74 | ||
75 | extern const struct imx_sdhci_esdhc_imx_data imx35_sdhci_esdhc_imx_data[]; | 75 | extern const struct imx_sdhci_esdhc_imx_data imx35_sdhci_esdhc_imx_data[]; |
diff --git a/arch/arm/mach-imx/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h index af488bc0e225..9f1718725195 100644 --- a/arch/arm/mach-imx/devices-imx51.h +++ b/arch/arm/mach-imx/devices-imx51.h | |||
@@ -55,7 +55,7 @@ extern const struct imx_spi_imx_data imx51_ecspi_data[]; | |||
55 | imx_add_spi_imx(&imx51_ecspi_data[id], pdata) | 55 | imx_add_spi_imx(&imx51_ecspi_data[id], pdata) |
56 | 56 | ||
57 | extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[]; | 57 | extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[]; |
58 | #define imx51_add_imx2_wdt(id, pdata) \ | 58 | #define imx51_add_imx2_wdt(id) \ |
59 | imx_add_imx2_wdt(&imx51_imx2_wdt_data[id]) | 59 | imx_add_imx2_wdt(&imx51_imx2_wdt_data[id]) |
60 | 60 | ||
61 | extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[]; | 61 | extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[]; |
diff --git a/arch/arm/mach-imx/devices-imx53.h b/arch/arm/mach-imx/devices-imx53.h index 6e1e5d1f8c3a..77e0db96c448 100644 --- a/arch/arm/mach-imx/devices-imx53.h +++ b/arch/arm/mach-imx/devices-imx53.h | |||
@@ -30,7 +30,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[]; | |||
30 | imx_add_spi_imx(&imx53_ecspi_data[id], pdata) | 30 | imx_add_spi_imx(&imx53_ecspi_data[id], pdata) |
31 | 31 | ||
32 | extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; | 32 | extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; |
33 | #define imx53_add_imx2_wdt(id, pdata) \ | 33 | #define imx53_add_imx2_wdt(id) \ |
34 | imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) | 34 | imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) |
35 | 35 | ||
36 | extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; | 36 | extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; |
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index eee0cc8d92a4..52efe4d5149b 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c | |||
@@ -75,7 +75,7 @@ static struct sys_timer imx27_timer = { | |||
75 | .init = imx27_timer_init, | 75 | .init = imx27_timer_init, |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static const char *imx27_dt_board_compat[] __initdata = { | 78 | static const char * const imx27_dt_board_compat[] __initconst = { |
79 | "fsl,imx27", | 79 | "fsl,imx27", |
80 | NULL | 80 | NULL |
81 | }; | 81 | }; |
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index d085aea08709..9a3b06e688c5 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c | |||
@@ -233,18 +233,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
233 | .phy_mode = FSL_USB2_PHY_ULPI, | 233 | .phy_mode = FSL_USB2_PHY_ULPI, |
234 | }; | 234 | }; |
235 | 235 | ||
236 | static int otg_mode_host; | 236 | static bool otg_mode_host __initdata; |
237 | 237 | ||
238 | static int __init eukrea_cpuimx27_otg_mode(char *options) | 238 | static int __init eukrea_cpuimx27_otg_mode(char *options) |
239 | { | 239 | { |
240 | if (!strcmp(options, "host")) | 240 | if (!strcmp(options, "host")) |
241 | otg_mode_host = 1; | 241 | otg_mode_host = true; |
242 | else if (!strcmp(options, "device")) | 242 | else if (!strcmp(options, "device")) |
243 | otg_mode_host = 0; | 243 | otg_mode_host = false; |
244 | else | 244 | else |
245 | pr_info("otg_mode neither \"host\" nor \"device\". " | 245 | pr_info("otg_mode neither \"host\" nor \"device\". " |
246 | "Defaulting to device\n"); | 246 | "Defaulting to device\n"); |
247 | return 0; | 247 | return 1; |
248 | } | 248 | } |
249 | __setup("otg_mode=", eukrea_cpuimx27_otg_mode); | 249 | __setup("otg_mode=", eukrea_cpuimx27_otg_mode); |
250 | 250 | ||
@@ -266,8 +266,8 @@ static void __init eukrea_cpuimx27_init(void) | |||
266 | 266 | ||
267 | imx27_add_fec(NULL); | 267 | imx27_add_fec(NULL); |
268 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 268 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
269 | imx27_add_imx2_wdt(NULL); | 269 | imx27_add_imx2_wdt(); |
270 | imx27_add_mxc_w1(NULL); | 270 | imx27_add_mxc_w1(); |
271 | 271 | ||
272 | #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) | 272 | #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) |
273 | /* SDHC2 can be used for Wifi */ | 273 | /* SDHC2 can be used for Wifi */ |
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index 6450303f1a7a..1634e54ffed5 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c | |||
@@ -141,18 +141,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
141 | .workaround = FLS_USB2_WORKAROUND_ENGCM09152, | 141 | .workaround = FLS_USB2_WORKAROUND_ENGCM09152, |
142 | }; | 142 | }; |
143 | 143 | ||
144 | static int otg_mode_host; | 144 | static bool otg_mode_host __initdata; |
145 | 145 | ||
146 | static int __init eukrea_cpuimx35_otg_mode(char *options) | 146 | static int __init eukrea_cpuimx35_otg_mode(char *options) |
147 | { | 147 | { |
148 | if (!strcmp(options, "host")) | 148 | if (!strcmp(options, "host")) |
149 | otg_mode_host = 1; | 149 | otg_mode_host = true; |
150 | else if (!strcmp(options, "device")) | 150 | else if (!strcmp(options, "device")) |
151 | otg_mode_host = 0; | 151 | otg_mode_host = false; |
152 | else | 152 | else |
153 | pr_info("otg_mode neither \"host\" nor \"device\". " | 153 | pr_info("otg_mode neither \"host\" nor \"device\". " |
154 | "Defaulting to device\n"); | 154 | "Defaulting to device\n"); |
155 | return 0; | 155 | return 1; |
156 | } | 156 | } |
157 | __setup("otg_mode=", eukrea_cpuimx35_otg_mode); | 157 | __setup("otg_mode=", eukrea_cpuimx35_otg_mode); |
158 | 158 | ||
@@ -167,7 +167,7 @@ static void __init eukrea_cpuimx35_init(void) | |||
167 | ARRAY_SIZE(eukrea_cpuimx35_pads)); | 167 | ARRAY_SIZE(eukrea_cpuimx35_pads)); |
168 | 168 | ||
169 | imx35_add_fec(NULL); | 169 | imx35_add_fec(NULL); |
170 | imx35_add_imx2_wdt(NULL); | 170 | imx35_add_imx2_wdt(); |
171 | 171 | ||
172 | imx35_add_imx_uart0(&uart_pdata); | 172 | imx35_add_imx_uart0(&uart_pdata); |
173 | imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info); | 173 | imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info); |
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c index 1e09de50cbcd..e78b40b41462 100644 --- a/arch/arm/mach-imx/mach-cpuimx51sd.c +++ b/arch/arm/mach-imx/mach-cpuimx51sd.c | |||
@@ -217,18 +217,18 @@ static const struct mxc_usbh_platform_data usbh1_config __initconst = { | |||
217 | .portsc = MXC_EHCI_MODE_ULPI, | 217 | .portsc = MXC_EHCI_MODE_ULPI, |
218 | }; | 218 | }; |
219 | 219 | ||
220 | static int otg_mode_host; | 220 | static bool otg_mode_host __initdata; |
221 | 221 | ||
222 | static int __init eukrea_cpuimx51sd_otg_mode(char *options) | 222 | static int __init eukrea_cpuimx51sd_otg_mode(char *options) |
223 | { | 223 | { |
224 | if (!strcmp(options, "host")) | 224 | if (!strcmp(options, "host")) |
225 | otg_mode_host = 1; | 225 | otg_mode_host = true; |
226 | else if (!strcmp(options, "device")) | 226 | else if (!strcmp(options, "device")) |
227 | otg_mode_host = 0; | 227 | otg_mode_host = false; |
228 | else | 228 | else |
229 | pr_info("otg_mode neither \"host\" nor \"device\". " | 229 | pr_info("otg_mode neither \"host\" nor \"device\". " |
230 | "Defaulting to device\n"); | 230 | "Defaulting to device\n"); |
231 | return 0; | 231 | return 1; |
232 | } | 232 | } |
233 | __setup("otg_mode=", eukrea_cpuimx51sd_otg_mode); | 233 | __setup("otg_mode=", eukrea_cpuimx51sd_otg_mode); |
234 | 234 | ||
@@ -292,7 +292,7 @@ static void __init eukrea_cpuimx51sd_init(void) | |||
292 | 292 | ||
293 | imx51_add_imx_uart(0, &uart_pdata); | 293 | imx51_add_imx_uart(0, &uart_pdata); |
294 | imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info); | 294 | imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info); |
295 | imx51_add_imx2_wdt(0, NULL); | 295 | imx51_add_imx2_wdt(0); |
296 | 296 | ||
297 | gpio_request(ETH_RST, "eth_rst"); | 297 | gpio_request(ETH_RST, "eth_rst"); |
298 | gpio_set_value(ETH_RST, 1); | 298 | gpio_set_value(ETH_RST, 1); |
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index d1e04e676e33..017bbb70ea41 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c | |||
@@ -109,18 +109,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
109 | .workaround = FLS_USB2_WORKAROUND_ENGCM09152, | 109 | .workaround = FLS_USB2_WORKAROUND_ENGCM09152, |
110 | }; | 110 | }; |
111 | 111 | ||
112 | static int otg_mode_host; | 112 | static bool otg_mode_host __initdata; |
113 | 113 | ||
114 | static int __init eukrea_cpuimx25_otg_mode(char *options) | 114 | static int __init eukrea_cpuimx25_otg_mode(char *options) |
115 | { | 115 | { |
116 | if (!strcmp(options, "host")) | 116 | if (!strcmp(options, "host")) |
117 | otg_mode_host = 1; | 117 | otg_mode_host = true; |
118 | else if (!strcmp(options, "device")) | 118 | else if (!strcmp(options, "device")) |
119 | otg_mode_host = 0; | 119 | otg_mode_host = false; |
120 | else | 120 | else |
121 | pr_info("otg_mode neither \"host\" nor \"device\". " | 121 | pr_info("otg_mode neither \"host\" nor \"device\". " |
122 | "Defaulting to device\n"); | 122 | "Defaulting to device\n"); |
123 | return 0; | 123 | return 1; |
124 | } | 124 | } |
125 | __setup("otg_mode=", eukrea_cpuimx25_otg_mode); | 125 | __setup("otg_mode=", eukrea_cpuimx25_otg_mode); |
126 | 126 | ||
@@ -134,9 +134,9 @@ static void __init eukrea_cpuimx25_init(void) | |||
134 | 134 | ||
135 | imx25_add_imx_uart0(&uart_pdata); | 135 | imx25_add_imx_uart0(&uart_pdata); |
136 | imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info); | 136 | imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info); |
137 | imx25_add_imxdi_rtc(NULL); | 137 | imx25_add_imxdi_rtc(); |
138 | imx25_add_fec(&mx25_fec_pdata); | 138 | imx25_add_fec(&mx25_fec_pdata); |
139 | imx25_add_imx2_wdt(NULL); | 139 | imx25_add_imx2_wdt(); |
140 | 140 | ||
141 | i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices, | 141 | i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices, |
142 | ARRAY_SIZE(eukrea_cpuimx25_i2c_devices)); | 142 | ARRAY_SIZE(eukrea_cpuimx25_i2c_devices)); |
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index c9d350c5dcc8..7381387a8905 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c | |||
@@ -57,7 +57,7 @@ static void __init mx27ipcam_init(void) | |||
57 | 57 | ||
58 | imx27_add_imx_uart0(NULL); | 58 | imx27_add_imx_uart0(NULL); |
59 | imx27_add_fec(NULL); | 59 | imx27_add_fec(NULL); |
60 | imx27_add_imx2_wdt(NULL); | 60 | imx27_add_imx2_wdt(); |
61 | } | 61 | } |
62 | 62 | ||
63 | static void __init mx27ipcam_timer_init(void) | 63 | static void __init mx27ipcam_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index f26734298aa6..ce247fd1269a 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c | |||
@@ -237,9 +237,9 @@ static void __init mx25pdk_init(void) | |||
237 | imx25_add_fsl_usb2_udc(&otg_device_pdata); | 237 | imx25_add_fsl_usb2_udc(&otg_device_pdata); |
238 | imx25_add_mxc_ehci_hs(&usbh2_pdata); | 238 | imx25_add_mxc_ehci_hs(&usbh2_pdata); |
239 | imx25_add_mxc_nand(&mx25pdk_nand_board_info); | 239 | imx25_add_mxc_nand(&mx25pdk_nand_board_info); |
240 | imx25_add_imxdi_rtc(NULL); | 240 | imx25_add_imxdi_rtc(); |
241 | imx25_add_imx_fb(&mx25pdk_fb_pdata); | 241 | imx25_add_imx_fb(&mx25pdk_fb_pdata); |
242 | imx25_add_imx2_wdt(NULL); | 242 | imx25_add_imx2_wdt(); |
243 | 243 | ||
244 | mx25pdk_fec_reset(); | 244 | mx25pdk_fec_reset(); |
245 | imx25_add_fec(&mx25_fec_pdata); | 245 | imx25_add_fec(&mx25_fec_pdata); |
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index c6d385c52257..ce9a5c26290c 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -241,18 +241,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
241 | .phy_mode = FSL_USB2_PHY_ULPI, | 241 | .phy_mode = FSL_USB2_PHY_ULPI, |
242 | }; | 242 | }; |
243 | 243 | ||
244 | static int otg_mode_host; | 244 | static bool otg_mode_host __initdata; |
245 | 245 | ||
246 | static int __init mx27_3ds_otg_mode(char *options) | 246 | static int __init mx27_3ds_otg_mode(char *options) |
247 | { | 247 | { |
248 | if (!strcmp(options, "host")) | 248 | if (!strcmp(options, "host")) |
249 | otg_mode_host = 1; | 249 | otg_mode_host = true; |
250 | else if (!strcmp(options, "device")) | 250 | else if (!strcmp(options, "device")) |
251 | otg_mode_host = 0; | 251 | otg_mode_host = false; |
252 | else | 252 | else |
253 | pr_info("otg_mode neither \"host\" nor \"device\". " | 253 | pr_info("otg_mode neither \"host\" nor \"device\". " |
254 | "Defaulting to device\n"); | 254 | "Defaulting to device\n"); |
255 | return 0; | 255 | return 1; |
256 | } | 256 | } |
257 | __setup("otg_mode=", mx27_3ds_otg_mode); | 257 | __setup("otg_mode=", mx27_3ds_otg_mode); |
258 | 258 | ||
@@ -480,7 +480,7 @@ static void __init mx27pdk_init(void) | |||
480 | imx27_add_fec(NULL); | 480 | imx27_add_fec(NULL); |
481 | imx27_add_imx_keypad(&mx27_3ds_keymap_data); | 481 | imx27_add_imx_keypad(&mx27_3ds_keymap_data); |
482 | imx27_add_mxc_mmc(0, &sdhc1_pdata); | 482 | imx27_add_mxc_mmc(0, &sdhc1_pdata); |
483 | imx27_add_imx2_wdt(NULL); | 483 | imx27_add_imx2_wdt(); |
484 | otg_phy_init(); | 484 | otg_phy_init(); |
485 | 485 | ||
486 | if (otg_mode_host) { | 486 | if (otg_mode_host) { |
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 0228d2e07fe0..7936bb32264d 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c | |||
@@ -310,7 +310,7 @@ static void __init mx27ads_board_init(void) | |||
310 | 310 | ||
311 | imx27_add_fec(NULL); | 311 | imx27_add_fec(NULL); |
312 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 312 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
313 | imx27_add_mxc_w1(NULL); | 313 | imx27_add_mxc_w1(); |
314 | } | 314 | } |
315 | 315 | ||
316 | static void __init mx27ads_timer_init(void) | 316 | static void __init mx27ads_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 4eafdf275ea2..928e1dcbc6a7 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
@@ -671,18 +671,18 @@ static const struct fsl_usb2_platform_data usbotg_pdata __initconst = { | |||
671 | .phy_mode = FSL_USB2_PHY_ULPI, | 671 | .phy_mode = FSL_USB2_PHY_ULPI, |
672 | }; | 672 | }; |
673 | 673 | ||
674 | static int otg_mode_host; | 674 | static bool otg_mode_host __initdata; |
675 | 675 | ||
676 | static int __init mx31_3ds_otg_mode(char *options) | 676 | static int __init mx31_3ds_otg_mode(char *options) |
677 | { | 677 | { |
678 | if (!strcmp(options, "host")) | 678 | if (!strcmp(options, "host")) |
679 | otg_mode_host = 1; | 679 | otg_mode_host = true; |
680 | else if (!strcmp(options, "device")) | 680 | else if (!strcmp(options, "device")) |
681 | otg_mode_host = 0; | 681 | otg_mode_host = false; |
682 | else | 682 | else |
683 | pr_info("otg_mode neither \"host\" nor \"device\". " | 683 | pr_info("otg_mode neither \"host\" nor \"device\". " |
684 | "Defaulting to device\n"); | 684 | "Defaulting to device\n"); |
685 | return 0; | 685 | return 1; |
686 | } | 686 | } |
687 | __setup("otg_mode=", mx31_3ds_otg_mode); | 687 | __setup("otg_mode=", mx31_3ds_otg_mode); |
688 | 688 | ||
@@ -739,7 +739,7 @@ static void __init mx31_3ds_init(void) | |||
739 | if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT)) | 739 | if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT)) |
740 | printk(KERN_WARNING "Init of the debug board failed, all " | 740 | printk(KERN_WARNING "Init of the debug board failed, all " |
741 | "devices on the debug board are unusable.\n"); | 741 | "devices on the debug board are unusable.\n"); |
742 | imx31_add_imx2_wdt(NULL); | 742 | imx31_add_imx2_wdt(); |
743 | imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); | 743 | imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); |
744 | imx31_add_mxc_mmc(0, &sdhc1_pdata); | 744 | imx31_add_mxc_mmc(0, &sdhc1_pdata); |
745 | 745 | ||
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 016791f038b0..63e84e67b990 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c | |||
@@ -544,7 +544,7 @@ static void __init mx31moboard_init(void) | |||
544 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 544 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
545 | gpio_led_register_device(-1, &mx31moboard_led_pdata); | 545 | gpio_led_register_device(-1, &mx31moboard_led_pdata); |
546 | 546 | ||
547 | imx31_add_imx2_wdt(NULL); | 547 | imx31_add_imx2_wdt(); |
548 | 548 | ||
549 | imx31_add_imx_uart0(&uart0_pdata); | 549 | imx31_add_imx_uart0(&uart0_pdata); |
550 | imx31_add_imx_uart4(&uart4_pdata); | 550 | imx31_add_imx_uart4(&uart4_pdata); |
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 28aa19476de7..6bff87907317 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c | |||
@@ -540,18 +540,18 @@ static const struct mxc_usbh_platform_data usb_host_pdata __initconst = { | |||
540 | .portsc = MXC_EHCI_MODE_SERIAL, | 540 | .portsc = MXC_EHCI_MODE_SERIAL, |
541 | }; | 541 | }; |
542 | 542 | ||
543 | static int otg_mode_host; | 543 | static bool otg_mode_host __initdata; |
544 | 544 | ||
545 | static int __init mx35_3ds_otg_mode(char *options) | 545 | static int __init mx35_3ds_otg_mode(char *options) |
546 | { | 546 | { |
547 | if (!strcmp(options, "host")) | 547 | if (!strcmp(options, "host")) |
548 | otg_mode_host = 1; | 548 | otg_mode_host = true; |
549 | else if (!strcmp(options, "device")) | 549 | else if (!strcmp(options, "device")) |
550 | otg_mode_host = 0; | 550 | otg_mode_host = false; |
551 | else | 551 | else |
552 | pr_info("otg_mode neither \"host\" nor \"device\". " | 552 | pr_info("otg_mode neither \"host\" nor \"device\". " |
553 | "Defaulting to device\n"); | 553 | "Defaulting to device\n"); |
554 | return 0; | 554 | return 1; |
555 | } | 555 | } |
556 | __setup("otg_mode=", mx35_3ds_otg_mode); | 556 | __setup("otg_mode=", mx35_3ds_otg_mode); |
557 | 557 | ||
@@ -571,7 +571,7 @@ static void __init mx35_3ds_init(void) | |||
571 | mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); | 571 | mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); |
572 | 572 | ||
573 | imx35_add_fec(NULL); | 573 | imx35_add_fec(NULL); |
574 | imx35_add_imx2_wdt(NULL); | 574 | imx35_add_imx2_wdt(); |
575 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 575 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
576 | 576 | ||
577 | imx35_add_imx_uart0(&uart_pdata); | 577 | imx35_add_imx_uart0(&uart_pdata); |
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c index 3c5b163923f6..2edb563b968d 100644 --- a/arch/arm/mach-imx/mach-mx51_3ds.c +++ b/arch/arm/mach-imx/mach-mx51_3ds.c | |||
@@ -154,7 +154,7 @@ static void __init mx51_3ds_init(void) | |||
154 | 154 | ||
155 | imx51_add_sdhci_esdhc_imx(0, NULL); | 155 | imx51_add_sdhci_esdhc_imx(0, NULL); |
156 | imx51_add_imx_keypad(&mx51_3ds_map_data); | 156 | imx51_add_imx_keypad(&mx51_3ds_map_data); |
157 | imx51_add_imx2_wdt(0, NULL); | 157 | imx51_add_imx2_wdt(0); |
158 | } | 158 | } |
159 | 159 | ||
160 | static void __init mx51_3ds_timer_init(void) | 160 | static void __init mx51_3ds_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c index dde397014d4b..7b31cbde8775 100644 --- a/arch/arm/mach-imx/mach-mx51_babbage.c +++ b/arch/arm/mach-imx/mach-mx51_babbage.c | |||
@@ -307,18 +307,18 @@ static const struct mxc_usbh_platform_data usbh1_config __initconst = { | |||
307 | .portsc = MXC_EHCI_MODE_ULPI, | 307 | .portsc = MXC_EHCI_MODE_ULPI, |
308 | }; | 308 | }; |
309 | 309 | ||
310 | static int otg_mode_host; | 310 | static bool otg_mode_host __initdata; |
311 | 311 | ||
312 | static int __init babbage_otg_mode(char *options) | 312 | static int __init babbage_otg_mode(char *options) |
313 | { | 313 | { |
314 | if (!strcmp(options, "host")) | 314 | if (!strcmp(options, "host")) |
315 | otg_mode_host = 1; | 315 | otg_mode_host = true; |
316 | else if (!strcmp(options, "device")) | 316 | else if (!strcmp(options, "device")) |
317 | otg_mode_host = 0; | 317 | otg_mode_host = false; |
318 | else | 318 | else |
319 | pr_info("otg_mode neither \"host\" nor \"device\". " | 319 | pr_info("otg_mode neither \"host\" nor \"device\". " |
320 | "Defaulting to device\n"); | 320 | "Defaulting to device\n"); |
321 | return 0; | 321 | return 1; |
322 | } | 322 | } |
323 | __setup("otg_mode=", babbage_otg_mode); | 323 | __setup("otg_mode=", babbage_otg_mode); |
324 | 324 | ||
@@ -411,7 +411,7 @@ static void __init mx51_babbage_init(void) | |||
411 | spi_register_board_info(mx51_babbage_spi_board_info, | 411 | spi_register_board_info(mx51_babbage_spi_board_info, |
412 | ARRAY_SIZE(mx51_babbage_spi_board_info)); | 412 | ARRAY_SIZE(mx51_babbage_spi_board_info)); |
413 | imx51_add_ecspi(0, &mx51_babbage_spi_pdata); | 413 | imx51_add_ecspi(0, &mx51_babbage_spi_pdata); |
414 | imx51_add_imx2_wdt(0, NULL); | 414 | imx51_add_imx2_wdt(0); |
415 | } | 415 | } |
416 | 416 | ||
417 | static void __init mx51_babbage_timer_init(void) | 417 | static void __init mx51_babbage_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c index 05641980dc5e..4a7593a953e2 100644 --- a/arch/arm/mach-imx/mach-mx53_ard.c +++ b/arch/arm/mach-imx/mach-mx53_ard.c | |||
@@ -243,7 +243,7 @@ static void __init mx53_ard_board_init(void) | |||
243 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 243 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
244 | 244 | ||
245 | imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); | 245 | imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); |
246 | imx53_add_imx2_wdt(0, NULL); | 246 | imx53_add_imx2_wdt(0); |
247 | imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); | 247 | imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); |
248 | imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); | 248 | imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); |
249 | imx_add_gpio_keys(&ard_button_data); | 249 | imx_add_gpio_keys(&ard_button_data); |
diff --git a/arch/arm/mach-imx/mach-mx53_evk.c b/arch/arm/mach-imx/mach-mx53_evk.c index 5a72188b9cdb..a1060b26fb23 100644 --- a/arch/arm/mach-imx/mach-mx53_evk.c +++ b/arch/arm/mach-imx/mach-mx53_evk.c | |||
@@ -154,7 +154,7 @@ static void __init mx53_evk_board_init(void) | |||
154 | spi_register_board_info(mx53_evk_spi_board_info, | 154 | spi_register_board_info(mx53_evk_spi_board_info, |
155 | ARRAY_SIZE(mx53_evk_spi_board_info)); | 155 | ARRAY_SIZE(mx53_evk_spi_board_info)); |
156 | imx53_add_ecspi(0, &mx53_evk_spi_data); | 156 | imx53_add_ecspi(0, &mx53_evk_spi_data); |
157 | imx53_add_imx2_wdt(0, NULL); | 157 | imx53_add_imx2_wdt(0); |
158 | gpio_led_register_device(-1, &mx53evk_leds_data); | 158 | gpio_led_register_device(-1, &mx53evk_leds_data); |
159 | } | 159 | } |
160 | 160 | ||
diff --git a/arch/arm/mach-imx/mach-mx53_loco.c b/arch/arm/mach-imx/mach-mx53_loco.c index 37f67cac15a4..388c415d6b62 100644 --- a/arch/arm/mach-imx/mach-mx53_loco.c +++ b/arch/arm/mach-imx/mach-mx53_loco.c | |||
@@ -283,7 +283,7 @@ static void __init mx53_loco_board_init(void) | |||
283 | imx53_add_imx_uart(0, NULL); | 283 | imx53_add_imx_uart(0, NULL); |
284 | mx53_loco_fec_reset(); | 284 | mx53_loco_fec_reset(); |
285 | imx53_add_fec(&mx53_loco_fec_data); | 285 | imx53_add_fec(&mx53_loco_fec_data); |
286 | imx53_add_imx2_wdt(0, NULL); | 286 | imx53_add_imx2_wdt(0); |
287 | 287 | ||
288 | ret = gpio_request_one(LOCO_ACCEL_EN, GPIOF_OUT_INIT_HIGH, "accel_en"); | 288 | ret = gpio_request_one(LOCO_ACCEL_EN, GPIOF_OUT_INIT_HIGH, "accel_en"); |
289 | if (ret) | 289 | if (ret) |
diff --git a/arch/arm/mach-imx/mach-mx53_smd.c b/arch/arm/mach-imx/mach-mx53_smd.c index 8e972c5c3e13..f297df7ccb39 100644 --- a/arch/arm/mach-imx/mach-mx53_smd.c +++ b/arch/arm/mach-imx/mach-mx53_smd.c | |||
@@ -138,7 +138,7 @@ static void __init mx53_smd_board_init(void) | |||
138 | mx53_smd_init_uart(); | 138 | mx53_smd_init_uart(); |
139 | mx53_smd_fec_reset(); | 139 | mx53_smd_fec_reset(); |
140 | imx53_add_fec(&mx53_smd_fec_data); | 140 | imx53_add_fec(&mx53_smd_fec_data); |
141 | imx53_add_imx2_wdt(0, NULL); | 141 | imx53_add_imx2_wdt(0); |
142 | imx53_add_imx_i2c(0, &mx53_smd_i2c_data); | 142 | imx53_add_imx_i2c(0, &mx53_smd_i2c_data); |
143 | imx53_add_sdhci_esdhc_imx(0, NULL); | 143 | imx53_add_sdhci_esdhc_imx(0, NULL); |
144 | imx53_add_sdhci_esdhc_imx(1, NULL); | 144 | imx53_add_sdhci_esdhc_imx(1, NULL); |
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 541152e450c4..d37ed25003b2 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c | |||
@@ -298,18 +298,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
298 | .phy_mode = FSL_USB2_PHY_ULPI, | 298 | .phy_mode = FSL_USB2_PHY_ULPI, |
299 | }; | 299 | }; |
300 | 300 | ||
301 | static int otg_mode_host; | 301 | static bool otg_mode_host __initdata; |
302 | 302 | ||
303 | static int __init pca100_otg_mode(char *options) | 303 | static int __init pca100_otg_mode(char *options) |
304 | { | 304 | { |
305 | if (!strcmp(options, "host")) | 305 | if (!strcmp(options, "host")) |
306 | otg_mode_host = 1; | 306 | otg_mode_host = true; |
307 | else if (!strcmp(options, "device")) | 307 | else if (!strcmp(options, "device")) |
308 | otg_mode_host = 0; | 308 | otg_mode_host = false; |
309 | else | 309 | else |
310 | pr_info("otg_mode neither \"host\" nor \"device\". " | 310 | pr_info("otg_mode neither \"host\" nor \"device\". " |
311 | "Defaulting to device\n"); | 311 | "Defaulting to device\n"); |
312 | return 0; | 312 | return 1; |
313 | } | 313 | } |
314 | __setup("otg_mode=", pca100_otg_mode); | 314 | __setup("otg_mode=", pca100_otg_mode); |
315 | 315 | ||
@@ -408,8 +408,8 @@ static void __init pca100_init(void) | |||
408 | imx27_add_imx_fb(&pca100_fb_data); | 408 | imx27_add_imx_fb(&pca100_fb_data); |
409 | 409 | ||
410 | imx27_add_fec(NULL); | 410 | imx27_add_fec(NULL); |
411 | imx27_add_imx2_wdt(NULL); | 411 | imx27_add_imx2_wdt(); |
412 | imx27_add_mxc_w1(NULL); | 412 | imx27_add_mxc_w1(); |
413 | } | 413 | } |
414 | 414 | ||
415 | static void __init pca100_timer_init(void) | 415 | static void __init pca100_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index 0a40004154f2..cd48712a6f50 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c | |||
@@ -557,18 +557,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
557 | .phy_mode = FSL_USB2_PHY_ULPI, | 557 | .phy_mode = FSL_USB2_PHY_ULPI, |
558 | }; | 558 | }; |
559 | 559 | ||
560 | static int otg_mode_host; | 560 | static bool otg_mode_host __initdata; |
561 | 561 | ||
562 | static int __init pcm037_otg_mode(char *options) | 562 | static int __init pcm037_otg_mode(char *options) |
563 | { | 563 | { |
564 | if (!strcmp(options, "host")) | 564 | if (!strcmp(options, "host")) |
565 | otg_mode_host = 1; | 565 | otg_mode_host = true; |
566 | else if (!strcmp(options, "device")) | 566 | else if (!strcmp(options, "device")) |
567 | otg_mode_host = 0; | 567 | otg_mode_host = false; |
568 | else | 568 | else |
569 | pr_info("otg_mode neither \"host\" nor \"device\". " | 569 | pr_info("otg_mode neither \"host\" nor \"device\". " |
570 | "Defaulting to device\n"); | 570 | "Defaulting to device\n"); |
571 | return 0; | 571 | return 1; |
572 | } | 572 | } |
573 | __setup("otg_mode=", pcm037_otg_mode); | 573 | __setup("otg_mode=", pcm037_otg_mode); |
574 | 574 | ||
@@ -619,13 +619,13 @@ static void __init pcm037_init(void) | |||
619 | 619 | ||
620 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 620 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
621 | 621 | ||
622 | imx31_add_imx2_wdt(NULL); | 622 | imx31_add_imx2_wdt(); |
623 | imx31_add_imx_uart0(&uart_pdata); | 623 | imx31_add_imx_uart0(&uart_pdata); |
624 | /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */ | 624 | /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */ |
625 | imx31_add_imx_uart1(&uart_pdata); | 625 | imx31_add_imx_uart1(&uart_pdata); |
626 | imx31_add_imx_uart2(&uart_pdata); | 626 | imx31_add_imx_uart2(&uart_pdata); |
627 | 627 | ||
628 | imx31_add_mxc_w1(NULL); | 628 | imx31_add_mxc_w1(); |
629 | 629 | ||
630 | /* LAN9217 IRQ pin */ | 630 | /* LAN9217 IRQ pin */ |
631 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); | 631 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); |
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 2f3debe2a113..3fbb89d74fcc 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c | |||
@@ -332,8 +332,8 @@ static void __init pcm038_init(void) | |||
332 | 332 | ||
333 | imx27_add_fec(NULL); | 333 | imx27_add_fec(NULL); |
334 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 334 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
335 | imx27_add_imx2_wdt(NULL); | 335 | imx27_add_imx2_wdt(); |
336 | imx27_add_mxc_w1(NULL); | 336 | imx27_add_mxc_w1(); |
337 | 337 | ||
338 | #ifdef CONFIG_MACH_PCM970_BASEBOARD | 338 | #ifdef CONFIG_MACH_PCM970_BASEBOARD |
339 | pcm970_baseboard_init(); | 339 | pcm970_baseboard_init(); |
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 73585f55cca0..1f20f222375e 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c | |||
@@ -330,18 +330,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
330 | .phy_mode = FSL_USB2_PHY_UTMI, | 330 | .phy_mode = FSL_USB2_PHY_UTMI, |
331 | }; | 331 | }; |
332 | 332 | ||
333 | static int otg_mode_host; | 333 | static bool otg_mode_host __initdata; |
334 | 334 | ||
335 | static int __init pcm043_otg_mode(char *options) | 335 | static int __init pcm043_otg_mode(char *options) |
336 | { | 336 | { |
337 | if (!strcmp(options, "host")) | 337 | if (!strcmp(options, "host")) |
338 | otg_mode_host = 1; | 338 | otg_mode_host = true; |
339 | else if (!strcmp(options, "device")) | 339 | else if (!strcmp(options, "device")) |
340 | otg_mode_host = 0; | 340 | otg_mode_host = false; |
341 | else | 341 | else |
342 | pr_info("otg_mode neither \"host\" nor \"device\". " | 342 | pr_info("otg_mode neither \"host\" nor \"device\". " |
343 | "Defaulting to device\n"); | 343 | "Defaulting to device\n"); |
344 | return 0; | 344 | return 1; |
345 | } | 345 | } |
346 | __setup("otg_mode=", pcm043_otg_mode); | 346 | __setup("otg_mode=", pcm043_otg_mode); |
347 | 347 | ||
@@ -363,7 +363,7 @@ static void __init pcm043_init(void) | |||
363 | 363 | ||
364 | imx35_add_fec(NULL); | 364 | imx35_add_fec(NULL); |
365 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 365 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
366 | imx35_add_imx2_wdt(NULL); | 366 | imx35_add_imx2_wdt(); |
367 | 367 | ||
368 | imx35_add_imx_uart0(&uart_pdata); | 368 | imx35_add_imx_uart0(&uart_pdata); |
369 | imx35_add_mxc_nand(&pcm037_nand_board_info); | 369 | imx35_add_mxc_nand(&pcm037_nand_board_info); |
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index 260621055b6b..a13087b11a6e 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c | |||
@@ -252,7 +252,7 @@ static void __init qong_init(void) | |||
252 | mxc_init_imx_uart(); | 252 | mxc_init_imx_uart(); |
253 | qong_init_nor_mtd(); | 253 | qong_init_nor_mtd(); |
254 | qong_init_fpga(); | 254 | qong_init_fpga(); |
255 | imx31_add_imx2_wdt(NULL); | 255 | imx31_add_imx2_wdt(); |
256 | } | 256 | } |
257 | 257 | ||
258 | static void __init qong_timer_init(void) | 258 | static void __init qong_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index add8c69c6c1a..b26209d4bcef 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c | |||
@@ -272,7 +272,7 @@ static void __init vpr200_board_init(void) | |||
272 | mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads)); | 272 | mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads)); |
273 | 273 | ||
274 | imx35_add_fec(NULL); | 274 | imx35_add_fec(NULL); |
275 | imx35_add_imx2_wdt(NULL); | 275 | imx35_add_imx2_wdt(); |
276 | imx_add_gpio_keys(&vpr200_gpio_keys_data); | 276 | imx_add_gpio_keys(&vpr200_gpio_keys_data); |
277 | 277 | ||
278 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 278 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index bf0fb87946ba..fa60ef6ac7ff 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c | |||
@@ -191,6 +191,6 @@ void __init mx31lite_db_init(void) | |||
191 | imx31_add_mxc_mmc(0, &mmc_pdata); | 191 | imx31_add_mxc_mmc(0, &mmc_pdata); |
192 | imx31_add_spi_imx0(&spi0_pdata); | 192 | imx31_add_spi_imx0(&spi0_pdata); |
193 | gpio_led_register_device(-1, &litekit_led_platform_data); | 193 | gpio_led_register_device(-1, &litekit_led_platform_data); |
194 | imx31_add_imx2_wdt(NULL); | 194 | imx31_add_imx2_wdt(); |
195 | imx31_add_mxc_rtc(NULL); | 195 | imx31_add_mxc_rtc(); |
196 | } | 196 | } |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index f2f8a5847018..c53469802c03 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -37,12 +37,12 @@ | |||
37 | #include <plat/board-ams-delta.h> | 37 | #include <plat/board-ams-delta.h> |
38 | #include <plat/keypad.h> | 38 | #include <plat/keypad.h> |
39 | #include <plat/mux.h> | 39 | #include <plat/mux.h> |
40 | #include <plat/usb.h> | ||
41 | #include <plat/board.h> | 40 | #include <plat/board.h> |
42 | 41 | ||
43 | #include <mach/hardware.h> | 42 | #include <mach/hardware.h> |
44 | #include <mach/ams-delta-fiq.h> | 43 | #include <mach/ams-delta-fiq.h> |
45 | #include <mach/camera.h> | 44 | #include <mach/camera.h> |
45 | #include <mach/usb.h> | ||
46 | 46 | ||
47 | #include "iomap.h" | 47 | #include "iomap.h" |
48 | #include "common.h" | 48 | #include "common.h" |
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index e75e2d55a2d7..6ec385e2b98e 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c | |||
@@ -23,8 +23,10 @@ | |||
23 | #include <asm/mach/map.h> | 23 | #include <asm/mach/map.h> |
24 | 24 | ||
25 | #include <plat/mux.h> | 25 | #include <plat/mux.h> |
26 | #include <plat/usb.h> | ||
27 | #include <plat/board.h> | 26 | #include <plat/board.h> |
27 | |||
28 | #include <mach/usb.h> | ||
29 | |||
28 | #include "common.h" | 30 | #include "common.h" |
29 | 31 | ||
30 | /* assume no Mini-AB port */ | 32 | /* assume no Mini-AB port */ |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index a28e989a63f4..44a4ab195fbc 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -40,11 +40,11 @@ | |||
40 | #include <plat/dma.h> | 40 | #include <plat/dma.h> |
41 | #include <plat/tc.h> | 41 | #include <plat/tc.h> |
42 | #include <plat/irda.h> | 42 | #include <plat/irda.h> |
43 | #include <plat/usb.h> | ||
44 | #include <plat/keypad.h> | 43 | #include <plat/keypad.h> |
45 | #include <plat/flash.h> | 44 | #include <plat/flash.h> |
46 | 45 | ||
47 | #include <mach/hardware.h> | 46 | #include <mach/hardware.h> |
47 | #include <mach/usb.h> | ||
48 | 48 | ||
49 | #include "common.h" | 49 | #include "common.h" |
50 | #include "board-h2.h" | 50 | #include "board-h2.h" |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 108a8640fc6f..86cb5a04a404 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -40,13 +40,13 @@ | |||
40 | 40 | ||
41 | #include <plat/mux.h> | 41 | #include <plat/mux.h> |
42 | #include <plat/tc.h> | 42 | #include <plat/tc.h> |
43 | #include <plat/usb.h> | ||
44 | #include <plat/keypad.h> | 43 | #include <plat/keypad.h> |
45 | #include <plat/dma.h> | 44 | #include <plat/dma.h> |
46 | #include <plat/flash.h> | 45 | #include <plat/flash.h> |
47 | 46 | ||
48 | #include <mach/hardware.h> | 47 | #include <mach/hardware.h> |
49 | #include <mach/irqs.h> | 48 | #include <mach/irqs.h> |
49 | #include <mach/usb.h> | ||
50 | 50 | ||
51 | #include "common.h" | 51 | #include "common.h" |
52 | #include "board-h3.h" | 52 | #include "board-h3.h" |
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 118a9d4a4c54..b3f6e943e661 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c | |||
@@ -44,10 +44,10 @@ | |||
44 | #include <plat/omap7xx.h> | 44 | #include <plat/omap7xx.h> |
45 | #include <plat/board.h> | 45 | #include <plat/board.h> |
46 | #include <plat/keypad.h> | 46 | #include <plat/keypad.h> |
47 | #include <plat/usb.h> | ||
48 | #include <plat/mmc.h> | 47 | #include <plat/mmc.h> |
49 | 48 | ||
50 | #include <mach/irqs.h> | 49 | #include <mach/irqs.h> |
50 | #include <mach/usb.h> | ||
51 | 51 | ||
52 | #include "common.h" | 52 | #include "common.h" |
53 | 53 | ||
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 7970223a559d..f21c2966daad 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -35,11 +35,11 @@ | |||
35 | #include <plat/flash.h> | 35 | #include <plat/flash.h> |
36 | #include <plat/fpga.h> | 36 | #include <plat/fpga.h> |
37 | #include <plat/tc.h> | 37 | #include <plat/tc.h> |
38 | #include <plat/usb.h> | ||
39 | #include <plat/keypad.h> | 38 | #include <plat/keypad.h> |
40 | #include <plat/mmc.h> | 39 | #include <plat/mmc.h> |
41 | 40 | ||
42 | #include <mach/hardware.h> | 41 | #include <mach/hardware.h> |
42 | #include <mach/usb.h> | ||
43 | 43 | ||
44 | #include "iomap.h" | 44 | #include "iomap.h" |
45 | #include "common.h" | 45 | #include "common.h" |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 7212ae97f44a..4007a372481b 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
27 | 27 | ||
28 | #include <plat/mux.h> | 28 | #include <plat/mux.h> |
29 | #include <plat/usb.h> | ||
30 | #include <plat/board.h> | 29 | #include <plat/board.h> |
31 | #include <plat/keypad.h> | 30 | #include <plat/keypad.h> |
32 | #include <plat/lcd_mipid.h> | 31 | #include <plat/lcd_mipid.h> |
@@ -34,6 +33,7 @@ | |||
34 | #include <plat/clock.h> | 33 | #include <plat/clock.h> |
35 | 34 | ||
36 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
36 | #include <mach/usb.h> | ||
37 | 37 | ||
38 | #include "common.h" | 38 | #include "common.h" |
39 | 39 | ||
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index da8d872d3d1c..8784705edb60 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -45,11 +45,11 @@ | |||
45 | #include <asm/mach/map.h> | 45 | #include <asm/mach/map.h> |
46 | 46 | ||
47 | #include <plat/flash.h> | 47 | #include <plat/flash.h> |
48 | #include <plat/usb.h> | ||
49 | #include <plat/mux.h> | 48 | #include <plat/mux.h> |
50 | #include <plat/tc.h> | 49 | #include <plat/tc.h> |
51 | 50 | ||
52 | #include <mach/hardware.h> | 51 | #include <mach/hardware.h> |
52 | #include <mach/usb.h> | ||
53 | 53 | ||
54 | #include "common.h" | 54 | #include "common.h" |
55 | 55 | ||
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 949b62a73693..26bcb9defcdc 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
@@ -35,7 +35,6 @@ | |||
35 | 35 | ||
36 | #include <plat/flash.h> | 36 | #include <plat/flash.h> |
37 | #include <plat/mux.h> | 37 | #include <plat/mux.h> |
38 | #include <plat/usb.h> | ||
39 | #include <plat/tc.h> | 38 | #include <plat/tc.h> |
40 | #include <plat/dma.h> | 39 | #include <plat/dma.h> |
41 | #include <plat/board.h> | 40 | #include <plat/board.h> |
@@ -43,6 +42,7 @@ | |||
43 | #include <plat/keypad.h> | 42 | #include <plat/keypad.h> |
44 | 43 | ||
45 | #include <mach/hardware.h> | 44 | #include <mach/hardware.h> |
45 | #include <mach/usb.h> | ||
46 | 46 | ||
47 | #include "common.h" | 47 | #include "common.h" |
48 | 48 | ||
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 7f1e1cf2bf46..4d099446dfa8 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <plat/led.h> | 35 | #include <plat/led.h> |
36 | #include <plat/flash.h> | 36 | #include <plat/flash.h> |
37 | #include <plat/mux.h> | 37 | #include <plat/mux.h> |
38 | #include <plat/usb.h> | ||
39 | #include <plat/dma.h> | 38 | #include <plat/dma.h> |
40 | #include <plat/tc.h> | 39 | #include <plat/tc.h> |
41 | #include <plat/board.h> | 40 | #include <plat/board.h> |
@@ -43,6 +42,7 @@ | |||
43 | #include <plat/keypad.h> | 42 | #include <plat/keypad.h> |
44 | 43 | ||
45 | #include <mach/hardware.h> | 44 | #include <mach/hardware.h> |
45 | #include <mach/usb.h> | ||
46 | 46 | ||
47 | #include "common.h" | 47 | #include "common.h" |
48 | 48 | ||
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 3c71c6bace2c..cc71a26723ef 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -37,7 +37,6 @@ | |||
37 | 37 | ||
38 | #include <plat/flash.h> | 38 | #include <plat/flash.h> |
39 | #include <plat/mux.h> | 39 | #include <plat/mux.h> |
40 | #include <plat/usb.h> | ||
41 | #include <plat/dma.h> | 40 | #include <plat/dma.h> |
42 | #include <plat/tc.h> | 41 | #include <plat/tc.h> |
43 | #include <plat/board.h> | 42 | #include <plat/board.h> |
@@ -45,6 +44,7 @@ | |||
45 | #include <plat/keypad.h> | 44 | #include <plat/keypad.h> |
46 | 45 | ||
47 | #include <mach/hardware.h> | 46 | #include <mach/hardware.h> |
47 | #include <mach/usb.h> | ||
48 | 48 | ||
49 | #include "common.h" | 49 | #include "common.h" |
50 | 50 | ||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 3b7b82b13684..8c665bd16ac2 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
@@ -37,13 +37,13 @@ | |||
37 | #include <plat/mux.h> | 37 | #include <plat/mux.h> |
38 | #include <plat/dma.h> | 38 | #include <plat/dma.h> |
39 | #include <plat/irda.h> | 39 | #include <plat/irda.h> |
40 | #include <plat/usb.h> | ||
41 | #include <plat/tc.h> | 40 | #include <plat/tc.h> |
42 | #include <plat/board.h> | 41 | #include <plat/board.h> |
43 | #include <plat/keypad.h> | 42 | #include <plat/keypad.h> |
44 | #include <plat/board-sx1.h> | 43 | #include <plat/board-sx1.h> |
45 | 44 | ||
46 | #include <mach/hardware.h> | 45 | #include <mach/hardware.h> |
46 | #include <mach/usb.h> | ||
47 | 47 | ||
48 | #include "common.h" | 48 | #include "common.h" |
49 | 49 | ||
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index afd67f0ec495..3497769eb353 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -35,9 +35,10 @@ | |||
35 | #include <plat/flash.h> | 35 | #include <plat/flash.h> |
36 | #include <plat/mux.h> | 36 | #include <plat/mux.h> |
37 | #include <plat/tc.h> | 37 | #include <plat/tc.h> |
38 | #include <plat/usb.h> | 38 | #include <plat/board.h> |
39 | 39 | ||
40 | #include <mach/hardware.h> | 40 | #include <mach/hardware.h> |
41 | #include <mach/usb.h> | ||
41 | 42 | ||
42 | #include "common.h" | 43 | #include "common.h" |
43 | 44 | ||
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index c6ce93f71d08..c007d80dfb62 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -25,10 +25,11 @@ | |||
25 | #include <plat/clock.h> | 25 | #include <plat/clock.h> |
26 | #include <plat/cpu.h> | 26 | #include <plat/cpu.h> |
27 | #include <plat/clkdev_omap.h> | 27 | #include <plat/clkdev_omap.h> |
28 | #include <plat/board.h> | ||
28 | #include <plat/sram.h> /* for omap_sram_reprogram_clock() */ | 29 | #include <plat/sram.h> /* for omap_sram_reprogram_clock() */ |
29 | #include <plat/usb.h> /* for OTG_BASE */ | ||
30 | 30 | ||
31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
32 | #include <mach/usb.h> /* for OTG_BASE */ | ||
32 | 33 | ||
33 | #include "iomap.h" | 34 | #include "iomap.h" |
34 | #include "clock.h" | 35 | #include "clock.h" |
diff --git a/arch/arm/mach-omap1/include/mach/usb.h b/arch/arm/mach-omap1/include/mach/usb.h new file mode 100644 index 000000000000..753cd5ce6949 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/usb.h | |||
@@ -0,0 +1,165 @@ | |||
1 | /* | ||
2 | * FIXME correct answer depends on hmc_mode, | ||
3 | * as does (on omap1) any nonzero value for config->otg port number | ||
4 | */ | ||
5 | #ifdef CONFIG_USB_GADGET_OMAP | ||
6 | #define is_usb0_device(config) 1 | ||
7 | #else | ||
8 | #define is_usb0_device(config) 0 | ||
9 | #endif | ||
10 | |||
11 | struct omap_usb_config { | ||
12 | /* Configure drivers according to the connectors on your board: | ||
13 | * - "A" connector (rectagular) | ||
14 | * ... for host/OHCI use, set "register_host". | ||
15 | * - "B" connector (squarish) or "Mini-B" | ||
16 | * ... for device/gadget use, set "register_dev". | ||
17 | * - "Mini-AB" connector (very similar to Mini-B) | ||
18 | * ... for OTG use as device OR host, initialize "otg" | ||
19 | */ | ||
20 | unsigned register_host:1; | ||
21 | unsigned register_dev:1; | ||
22 | u8 otg; /* port number, 1-based: usb1 == 2 */ | ||
23 | |||
24 | u8 hmc_mode; | ||
25 | |||
26 | /* implicitly true if otg: host supports remote wakeup? */ | ||
27 | u8 rwc; | ||
28 | |||
29 | /* signaling pins used to talk to transceiver on usbN: | ||
30 | * 0 == usbN unused | ||
31 | * 2 == usb0-only, using internal transceiver | ||
32 | * 3 == 3 wire bidirectional | ||
33 | * 4 == 4 wire bidirectional | ||
34 | * 6 == 6 wire unidirectional (or TLL) | ||
35 | */ | ||
36 | u8 pins[3]; | ||
37 | |||
38 | struct platform_device *udc_device; | ||
39 | struct platform_device *ohci_device; | ||
40 | struct platform_device *otg_device; | ||
41 | |||
42 | u32 (*usb0_init)(unsigned nwires, unsigned is_device); | ||
43 | u32 (*usb1_init)(unsigned nwires); | ||
44 | u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); | ||
45 | |||
46 | int (*ocpi_enable)(void); | ||
47 | }; | ||
48 | |||
49 | void omap_otg_init(struct omap_usb_config *config); | ||
50 | |||
51 | #if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE) | ||
52 | void omap1_usb_init(struct omap_usb_config *pdata); | ||
53 | #else | ||
54 | static inline void omap1_usb_init(struct omap_usb_config *pdata) | ||
55 | { | ||
56 | } | ||
57 | #endif | ||
58 | |||
59 | #define OMAP1_OTG_BASE 0xfffb0400 | ||
60 | #define OMAP1_UDC_BASE 0xfffb4000 | ||
61 | #define OMAP1_OHCI_BASE 0xfffba000 | ||
62 | |||
63 | #define OMAP2_OHCI_BASE 0x4805e000 | ||
64 | #define OMAP2_UDC_BASE 0x4805e200 | ||
65 | #define OMAP2_OTG_BASE 0x4805e300 | ||
66 | #define OTG_BASE OMAP1_OTG_BASE | ||
67 | #define UDC_BASE OMAP1_UDC_BASE | ||
68 | #define OMAP_OHCI_BASE OMAP1_OHCI_BASE | ||
69 | |||
70 | /* | ||
71 | * OTG and transceiver registers, for OMAPs starting with ARM926 | ||
72 | */ | ||
73 | #define OTG_REV (OTG_BASE + 0x00) | ||
74 | #define OTG_SYSCON_1 (OTG_BASE + 0x04) | ||
75 | # define USB2_TRX_MODE(w) (((w)>>24)&0x07) | ||
76 | # define USB1_TRX_MODE(w) (((w)>>20)&0x07) | ||
77 | # define USB0_TRX_MODE(w) (((w)>>16)&0x07) | ||
78 | # define OTG_IDLE_EN (1 << 15) | ||
79 | # define HST_IDLE_EN (1 << 14) | ||
80 | # define DEV_IDLE_EN (1 << 13) | ||
81 | # define OTG_RESET_DONE (1 << 2) | ||
82 | # define OTG_SOFT_RESET (1 << 1) | ||
83 | #define OTG_SYSCON_2 (OTG_BASE + 0x08) | ||
84 | # define OTG_EN (1 << 31) | ||
85 | # define USBX_SYNCHRO (1 << 30) | ||
86 | # define OTG_MST16 (1 << 29) | ||
87 | # define SRP_GPDATA (1 << 28) | ||
88 | # define SRP_GPDVBUS (1 << 27) | ||
89 | # define SRP_GPUVBUS(w) (((w)>>24)&0x07) | ||
90 | # define A_WAIT_VRISE(w) (((w)>>20)&0x07) | ||
91 | # define B_ASE_BRST(w) (((w)>>16)&0x07) | ||
92 | # define SRP_DPW (1 << 14) | ||
93 | # define SRP_DATA (1 << 13) | ||
94 | # define SRP_VBUS (1 << 12) | ||
95 | # define OTG_PADEN (1 << 10) | ||
96 | # define HMC_PADEN (1 << 9) | ||
97 | # define UHOST_EN (1 << 8) | ||
98 | # define HMC_TLLSPEED (1 << 7) | ||
99 | # define HMC_TLLATTACH (1 << 6) | ||
100 | # define OTG_HMC(w) (((w)>>0)&0x3f) | ||
101 | #define OTG_CTRL (OTG_BASE + 0x0c) | ||
102 | # define OTG_USB2_EN (1 << 29) | ||
103 | # define OTG_USB2_DP (1 << 28) | ||
104 | # define OTG_USB2_DM (1 << 27) | ||
105 | # define OTG_USB1_EN (1 << 26) | ||
106 | # define OTG_USB1_DP (1 << 25) | ||
107 | # define OTG_USB1_DM (1 << 24) | ||
108 | # define OTG_USB0_EN (1 << 23) | ||
109 | # define OTG_USB0_DP (1 << 22) | ||
110 | # define OTG_USB0_DM (1 << 21) | ||
111 | # define OTG_ASESSVLD (1 << 20) | ||
112 | # define OTG_BSESSEND (1 << 19) | ||
113 | # define OTG_BSESSVLD (1 << 18) | ||
114 | # define OTG_VBUSVLD (1 << 17) | ||
115 | # define OTG_ID (1 << 16) | ||
116 | # define OTG_DRIVER_SEL (1 << 15) | ||
117 | # define OTG_A_SETB_HNPEN (1 << 12) | ||
118 | # define OTG_A_BUSREQ (1 << 11) | ||
119 | # define OTG_B_HNPEN (1 << 9) | ||
120 | # define OTG_B_BUSREQ (1 << 8) | ||
121 | # define OTG_BUSDROP (1 << 7) | ||
122 | # define OTG_PULLDOWN (1 << 5) | ||
123 | # define OTG_PULLUP (1 << 4) | ||
124 | # define OTG_DRV_VBUS (1 << 3) | ||
125 | # define OTG_PD_VBUS (1 << 2) | ||
126 | # define OTG_PU_VBUS (1 << 1) | ||
127 | # define OTG_PU_ID (1 << 0) | ||
128 | #define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ | ||
129 | # define DRIVER_SWITCH (1 << 15) | ||
130 | # define A_VBUS_ERR (1 << 13) | ||
131 | # define A_REQ_TMROUT (1 << 12) | ||
132 | # define A_SRP_DETECT (1 << 11) | ||
133 | # define B_HNP_FAIL (1 << 10) | ||
134 | # define B_SRP_TMROUT (1 << 9) | ||
135 | # define B_SRP_DONE (1 << 8) | ||
136 | # define B_SRP_STARTED (1 << 7) | ||
137 | # define OPRT_CHG (1 << 0) | ||
138 | #define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ | ||
139 | // same bits as in IRQ_EN | ||
140 | #define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ | ||
141 | # define OTGVPD (1 << 14) | ||
142 | # define OTGVPU (1 << 13) | ||
143 | # define OTGPUID (1 << 12) | ||
144 | # define USB2VDR (1 << 10) | ||
145 | # define USB2PDEN (1 << 9) | ||
146 | # define USB2PUEN (1 << 8) | ||
147 | # define USB1VDR (1 << 6) | ||
148 | # define USB1PDEN (1 << 5) | ||
149 | # define USB1PUEN (1 << 4) | ||
150 | # define USB0VDR (1 << 2) | ||
151 | # define USB0PDEN (1 << 1) | ||
152 | # define USB0PUEN (1 << 0) | ||
153 | #define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ | ||
154 | #define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ | ||
155 | |||
156 | /*-------------------------------------------------------------------------*/ | ||
157 | |||
158 | /* OMAP1 */ | ||
159 | #define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) | ||
160 | # define CONF_USB2_UNI_R (1 << 8) | ||
161 | # define CONF_USB1_UNI_R (1 << 7) | ||
162 | # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) | ||
163 | # define CONF_USB0_ISOLATE_R (1 << 3) | ||
164 | # define CONF_USB_PWRDN_DM_R (1 << 2) | ||
165 | # define CONF_USB_PWRDN_DP_R (1 << 1) | ||
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index e61afd922766..65f88176fba8 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c | |||
@@ -27,7 +27,8 @@ | |||
27 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
28 | 28 | ||
29 | #include <plat/mux.h> | 29 | #include <plat/mux.h> |
30 | #include <plat/usb.h> | 30 | |
31 | #include <mach/usb.h> | ||
31 | 32 | ||
32 | #include "common.h" | 33 | #include "common.h" |
33 | 34 | ||
@@ -55,6 +56,119 @@ | |||
55 | #define INT_USB_IRQ_HGEN INT_USB_HHC_1 | 56 | #define INT_USB_IRQ_HGEN INT_USB_HHC_1 |
56 | #define INT_USB_IRQ_OTG IH2_BASE + 8 | 57 | #define INT_USB_IRQ_OTG IH2_BASE + 8 |
57 | 58 | ||
59 | #ifdef CONFIG_ARCH_OMAP_OTG | ||
60 | |||
61 | void __init | ||
62 | omap_otg_init(struct omap_usb_config *config) | ||
63 | { | ||
64 | u32 syscon; | ||
65 | int alt_pingroup = 0; | ||
66 | |||
67 | /* NOTE: no bus or clock setup (yet?) */ | ||
68 | |||
69 | syscon = omap_readl(OTG_SYSCON_1) & 0xffff; | ||
70 | if (!(syscon & OTG_RESET_DONE)) | ||
71 | pr_debug("USB resets not complete?\n"); | ||
72 | |||
73 | //omap_writew(0, OTG_IRQ_EN); | ||
74 | |||
75 | /* pin muxing and transceiver pinouts */ | ||
76 | if (config->pins[0] > 2) /* alt pingroup 2 */ | ||
77 | alt_pingroup = 1; | ||
78 | syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); | ||
79 | syscon |= config->usb1_init(config->pins[1]); | ||
80 | syscon |= config->usb2_init(config->pins[2], alt_pingroup); | ||
81 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | ||
82 | omap_writel(syscon, OTG_SYSCON_1); | ||
83 | |||
84 | syscon = config->hmc_mode; | ||
85 | syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; | ||
86 | #ifdef CONFIG_USB_OTG | ||
87 | if (config->otg) | ||
88 | syscon |= OTG_EN; | ||
89 | #endif | ||
90 | if (cpu_class_is_omap1()) | ||
91 | pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", | ||
92 | omap_readl(USB_TRANSCEIVER_CTRL)); | ||
93 | pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); | ||
94 | omap_writel(syscon, OTG_SYSCON_2); | ||
95 | |||
96 | printk("USB: hmc %d", config->hmc_mode); | ||
97 | if (!alt_pingroup) | ||
98 | printk(", usb2 alt %d wires", config->pins[2]); | ||
99 | else if (config->pins[0]) | ||
100 | printk(", usb0 %d wires%s", config->pins[0], | ||
101 | is_usb0_device(config) ? " (dev)" : ""); | ||
102 | if (config->pins[1]) | ||
103 | printk(", usb1 %d wires", config->pins[1]); | ||
104 | if (!alt_pingroup && config->pins[2]) | ||
105 | printk(", usb2 %d wires", config->pins[2]); | ||
106 | if (config->otg) | ||
107 | printk(", Mini-AB on usb%d", config->otg - 1); | ||
108 | printk("\n"); | ||
109 | |||
110 | if (cpu_class_is_omap1()) { | ||
111 | u16 w; | ||
112 | |||
113 | /* leave USB clocks/controllers off until needed */ | ||
114 | w = omap_readw(ULPD_SOFT_REQ); | ||
115 | w &= ~SOFT_USB_CLK_REQ; | ||
116 | omap_writew(w, ULPD_SOFT_REQ); | ||
117 | |||
118 | w = omap_readw(ULPD_CLOCK_CTRL); | ||
119 | w &= ~USB_MCLK_EN; | ||
120 | w |= DIS_USB_PVCI_CLK; | ||
121 | omap_writew(w, ULPD_CLOCK_CTRL); | ||
122 | } | ||
123 | syscon = omap_readl(OTG_SYSCON_1); | ||
124 | syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; | ||
125 | |||
126 | #ifdef CONFIG_USB_GADGET_OMAP | ||
127 | if (config->otg || config->register_dev) { | ||
128 | struct platform_device *udc_device = config->udc_device; | ||
129 | int status; | ||
130 | |||
131 | syscon &= ~DEV_IDLE_EN; | ||
132 | udc_device->dev.platform_data = config; | ||
133 | status = platform_device_register(udc_device); | ||
134 | if (status) | ||
135 | pr_debug("can't register UDC device, %d\n", status); | ||
136 | } | ||
137 | #endif | ||
138 | |||
139 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
140 | if (config->otg || config->register_host) { | ||
141 | struct platform_device *ohci_device = config->ohci_device; | ||
142 | int status; | ||
143 | |||
144 | syscon &= ~HST_IDLE_EN; | ||
145 | ohci_device->dev.platform_data = config; | ||
146 | status = platform_device_register(ohci_device); | ||
147 | if (status) | ||
148 | pr_debug("can't register OHCI device, %d\n", status); | ||
149 | } | ||
150 | #endif | ||
151 | |||
152 | #ifdef CONFIG_USB_OTG | ||
153 | if (config->otg) { | ||
154 | struct platform_device *otg_device = config->otg_device; | ||
155 | int status; | ||
156 | |||
157 | syscon &= ~OTG_IDLE_EN; | ||
158 | otg_device->dev.platform_data = config; | ||
159 | status = platform_device_register(otg_device); | ||
160 | if (status) | ||
161 | pr_debug("can't register OTG device, %d\n", status); | ||
162 | } | ||
163 | #endif | ||
164 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | ||
165 | omap_writel(syscon, OTG_SYSCON_1); | ||
166 | } | ||
167 | |||
168 | #else | ||
169 | void omap_otg_init(struct omap_usb_config *config) {} | ||
170 | #endif | ||
171 | |||
58 | #ifdef CONFIG_USB_GADGET_OMAP | 172 | #ifdef CONFIG_USB_GADGET_OMAP |
59 | 173 | ||
60 | static struct resource udc_resources[] = { | 174 | static struct resource udc_resources[] = { |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2f4ace6f91d1..184469517f15 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -66,19 +66,16 @@ config SOC_OMAP2420 | |||
66 | depends on ARCH_OMAP2 | 66 | depends on ARCH_OMAP2 |
67 | default y | 67 | default y |
68 | select OMAP_DM_TIMER | 68 | select OMAP_DM_TIMER |
69 | select ARCH_OMAP_OTG | ||
70 | 69 | ||
71 | config SOC_OMAP2430 | 70 | config SOC_OMAP2430 |
72 | bool "OMAP2430 support" | 71 | bool "OMAP2430 support" |
73 | depends on ARCH_OMAP2 | 72 | depends on ARCH_OMAP2 |
74 | default y | 73 | default y |
75 | select ARCH_OMAP_OTG | ||
76 | 74 | ||
77 | config SOC_OMAP3430 | 75 | config SOC_OMAP3430 |
78 | bool "OMAP3430 support" | 76 | bool "OMAP3430 support" |
79 | depends on ARCH_OMAP3 | 77 | depends on ARCH_OMAP3 |
80 | default y | 78 | default y |
81 | select ARCH_OMAP_OTG | ||
82 | 79 | ||
83 | config SOC_TI81XX | 80 | config SOC_TI81XX |
84 | bool "TI81XX support" | 81 | bool "TI81XX support" |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 6be43ac5c35c..8e8ef8200bf0 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -119,7 +119,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o | |||
119 | 119 | ||
120 | # PRCM clockdomain control | 120 | # PRCM clockdomain control |
121 | clockdomain-common += clockdomain.o | 121 | clockdomain-common += clockdomain.o |
122 | clockdomain-common += clockdomains_common_data.o | ||
123 | obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) | 122 | obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) |
124 | obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o | 123 | obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o |
125 | obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o | 124 | obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o |
@@ -247,9 +246,6 @@ obj-y += $(omap-flash-y) $(omap-flash-m) | |||
247 | omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o | 246 | omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o |
248 | obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) | 247 | obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) |
249 | 248 | ||
250 | |||
251 | usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o | ||
252 | obj-y += $(usbfs-m) $(usbfs-y) | ||
253 | obj-y += usb-musb.o | 249 | obj-y += usb-musb.o |
254 | obj-y += omap_phy_internal.o | 250 | obj-y += omap_phy_internal.o |
255 | 251 | ||
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 0dac4db01139..9511584fdc4f 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -251,16 +251,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = { | |||
251 | {} /* Terminator */ | 251 | {} /* Terminator */ |
252 | }; | 252 | }; |
253 | 253 | ||
254 | static struct omap_usb_config sdp2430_usb_config __initdata = { | ||
255 | .otg = 1, | ||
256 | #ifdef CONFIG_USB_GADGET_OMAP | ||
257 | .hmc_mode = 0x0, | ||
258 | #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
259 | .hmc_mode = 0x1, | ||
260 | #endif | ||
261 | .pins[0] = 3, | ||
262 | }; | ||
263 | |||
264 | #ifdef CONFIG_OMAP_MUX | 254 | #ifdef CONFIG_OMAP_MUX |
265 | static struct omap_board_mux board_mux[] __initdata = { | 255 | static struct omap_board_mux board_mux[] __initdata = { |
266 | { .reg_offset = OMAP_MUX_TERMINATOR }, | 256 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
@@ -277,7 +267,6 @@ static void __init omap_2430sdp_init(void) | |||
277 | omap_serial_init(); | 267 | omap_serial_init(); |
278 | omap_sdrc_init(NULL, NULL); | 268 | omap_sdrc_init(NULL, NULL); |
279 | omap_hsmmc_init(mmc); | 269 | omap_hsmmc_init(mmc); |
280 | omap2_usbfs_init(&sdp2430_usb_config); | ||
281 | 270 | ||
282 | omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); | 271 | omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); |
283 | usb_musb_init(NULL); | 272 | usb_musb_init(NULL); |
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 502c31e123be..519bcd3079e8 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <asm/mach/flash.h> | 35 | #include <asm/mach/flash.h> |
36 | 36 | ||
37 | #include <plat/led.h> | 37 | #include <plat/led.h> |
38 | #include <plat/usb.h> | ||
39 | #include <plat/board.h> | 38 | #include <plat/board.h> |
40 | #include "common.h" | 39 | #include "common.h" |
41 | #include <plat/gpmc.h> | 40 | #include <plat/gpmc.h> |
@@ -253,13 +252,6 @@ out: | |||
253 | clk_put(gpmc_fck); | 252 | clk_put(gpmc_fck); |
254 | } | 253 | } |
255 | 254 | ||
256 | static struct omap_usb_config apollon_usb_config __initdata = { | ||
257 | .register_dev = 1, | ||
258 | .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ | ||
259 | |||
260 | .pins[0] = 6, | ||
261 | }; | ||
262 | |||
263 | static struct panel_generic_dpi_data apollon_panel_data = { | 255 | static struct panel_generic_dpi_data apollon_panel_data = { |
264 | .name = "apollon", | 256 | .name = "apollon", |
265 | }; | 257 | }; |
@@ -297,15 +289,6 @@ static void __init apollon_led_init(void) | |||
297 | gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds)); | 289 | gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds)); |
298 | } | 290 | } |
299 | 291 | ||
300 | static void __init apollon_usb_init(void) | ||
301 | { | ||
302 | /* USB device */ | ||
303 | /* DEVICE_SUSPEND */ | ||
304 | omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); | ||
305 | gpio_request_one(12, GPIOF_OUT_INIT_LOW, "USB suspend"); | ||
306 | omap2_usbfs_init(&apollon_usb_config); | ||
307 | } | ||
308 | |||
309 | #ifdef CONFIG_OMAP_MUX | 292 | #ifdef CONFIG_OMAP_MUX |
310 | static struct omap_board_mux board_mux[] __initdata = { | 293 | static struct omap_board_mux board_mux[] __initdata = { |
311 | { .reg_offset = OMAP_MUX_TERMINATOR }, | 294 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
@@ -321,7 +304,6 @@ static void __init omap_apollon_init(void) | |||
321 | apollon_init_smc91x(); | 304 | apollon_init_smc91x(); |
322 | apollon_led_init(); | 305 | apollon_led_init(); |
323 | apollon_flash_init(); | 306 | apollon_flash_init(); |
324 | apollon_usb_init(); | ||
325 | 307 | ||
326 | /* REVISIT: where's the correct place */ | 308 | /* REVISIT: where's the correct place */ |
327 | omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP); | 309 | omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP); |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 876becf8205a..ace20482e3e1 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
33 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
34 | 34 | ||
35 | #include <plat/usb.h> | ||
36 | #include <plat/board.h> | 35 | #include <plat/board.h> |
37 | #include "common.h" | 36 | #include "common.h" |
38 | #include <plat/menelaus.h> | 37 | #include <plat/menelaus.h> |
@@ -329,17 +328,6 @@ static void __init h4_init_flash(void) | |||
329 | h4_flash_resource.end = base + SZ_64M - 1; | 328 | h4_flash_resource.end = base + SZ_64M - 1; |
330 | } | 329 | } |
331 | 330 | ||
332 | static struct omap_usb_config h4_usb_config __initdata = { | ||
333 | /* S1.10 OFF -- usb "download port" | ||
334 | * usb0 switched to Mini-B port and isp1105 transceiver; | ||
335 | * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging | ||
336 | */ | ||
337 | .register_dev = 1, | ||
338 | .pins[0] = 3, | ||
339 | /* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */ | ||
340 | .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */ | ||
341 | }; | ||
342 | |||
343 | static struct at24_platform_data m24c01 = { | 331 | static struct at24_platform_data m24c01 = { |
344 | .byte_len = SZ_1K / 8, | 332 | .byte_len = SZ_1K / 8, |
345 | .page_size = 16, | 333 | .page_size = 16, |
@@ -381,7 +369,6 @@ static void __init omap_h4_init(void) | |||
381 | ARRAY_SIZE(h4_i2c_board_info)); | 369 | ARRAY_SIZE(h4_i2c_board_info)); |
382 | 370 | ||
383 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); | 371 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); |
384 | omap2_usbfs_init(&h4_usb_config); | ||
385 | omap_serial_init(); | 372 | omap_serial_init(); |
386 | omap_sdrc_init(NULL, NULL); | 373 | omap_sdrc_init(NULL, NULL); |
387 | h4_init_flash(); | 374 | h4_init_flash(); |
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index bace9308a4db..7e39015357b1 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
@@ -1774,8 +1774,6 @@ static struct omap_clk omap2420_clks[] = { | |||
1774 | CLK(NULL, "osc_ck", &osc_ck, CK_242X), | 1774 | CLK(NULL, "osc_ck", &osc_ck, CK_242X), |
1775 | CLK(NULL, "sys_ck", &sys_ck, CK_242X), | 1775 | CLK(NULL, "sys_ck", &sys_ck, CK_242X), |
1776 | CLK(NULL, "alt_ck", &alt_ck, CK_242X), | 1776 | CLK(NULL, "alt_ck", &alt_ck, CK_242X), |
1777 | CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X), | ||
1778 | CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X), | ||
1779 | CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X), | 1777 | CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X), |
1780 | /* internal analog sources */ | 1778 | /* internal analog sources */ |
1781 | CLK(NULL, "dpll_ck", &dpll_ck, CK_242X), | 1779 | CLK(NULL, "dpll_ck", &dpll_ck, CK_242X), |
@@ -1784,8 +1782,6 @@ static struct omap_clk omap2420_clks[] = { | |||
1784 | /* internal prcm root sources */ | 1782 | /* internal prcm root sources */ |
1785 | CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X), | 1783 | CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X), |
1786 | CLK(NULL, "core_ck", &core_ck, CK_242X), | 1784 | CLK(NULL, "core_ck", &core_ck, CK_242X), |
1787 | CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X), | ||
1788 | CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X), | ||
1789 | CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X), | 1785 | CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X), |
1790 | CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X), | 1786 | CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X), |
1791 | CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X), | 1787 | CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X), |
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 3b4d09a50399..90a08c3b12ac 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
@@ -1858,11 +1858,6 @@ static struct omap_clk omap2430_clks[] = { | |||
1858 | CLK(NULL, "osc_ck", &osc_ck, CK_243X), | 1858 | CLK(NULL, "osc_ck", &osc_ck, CK_243X), |
1859 | CLK(NULL, "sys_ck", &sys_ck, CK_243X), | 1859 | CLK(NULL, "sys_ck", &sys_ck, CK_243X), |
1860 | CLK(NULL, "alt_ck", &alt_ck, CK_243X), | 1860 | CLK(NULL, "alt_ck", &alt_ck, CK_243X), |
1861 | CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X), | ||
1862 | CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X), | ||
1863 | CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X), | ||
1864 | CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X), | ||
1865 | CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X), | ||
1866 | CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X), | 1861 | CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X), |
1867 | /* internal analog sources */ | 1862 | /* internal analog sources */ |
1868 | CLK(NULL, "dpll_ck", &dpll_ck, CK_243X), | 1863 | CLK(NULL, "dpll_ck", &dpll_ck, CK_243X), |
@@ -1871,11 +1866,6 @@ static struct omap_clk omap2430_clks[] = { | |||
1871 | /* internal prcm root sources */ | 1866 | /* internal prcm root sources */ |
1872 | CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X), | 1867 | CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X), |
1873 | CLK(NULL, "core_ck", &core_ck, CK_243X), | 1868 | CLK(NULL, "core_ck", &core_ck, CK_243X), |
1874 | CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X), | ||
1875 | CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X), | ||
1876 | CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X), | ||
1877 | CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X), | ||
1878 | CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X), | ||
1879 | CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X), | 1869 | CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X), |
1880 | CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X), | 1870 | CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X), |
1881 | CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X), | 1871 | CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X), |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index a67aaa97dcd8..049061778a85 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3240,11 +3240,6 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3240 | CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), | 3240 | CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), |
3241 | CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), | 3241 | CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), |
3242 | CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), | 3242 | CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), |
3243 | CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX), | ||
3244 | CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX), | ||
3245 | CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX), | ||
3246 | CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX), | ||
3247 | CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX), | ||
3248 | CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), | 3243 | CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), |
3249 | CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), | 3244 | CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), |
3250 | CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), | 3245 | CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), |
@@ -3311,8 +3306,6 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3311 | CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3306 | CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3312 | CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3307 | CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3313 | CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3308 | CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3314 | CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), | ||
3315 | CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), | ||
3316 | CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), | 3309 | CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), |
3317 | CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3310 | CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3318 | CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), | 3311 | CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), |
@@ -3417,9 +3410,6 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3417 | CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), | 3410 | CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), |
3418 | CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), | 3411 | CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), |
3419 | CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), | 3412 | CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), |
3420 | CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX), | ||
3421 | CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX), | ||
3422 | CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX), | ||
3423 | CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), | 3413 | CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), |
3424 | CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), | 3414 | CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), |
3425 | CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), | 3415 | CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), |
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 6227e9505c2d..c9523c6164b0 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h | |||
@@ -210,7 +210,5 @@ extern struct clkdm_ops omap4_clkdm_operations; | |||
210 | extern struct clkdm_dep gfx_24xx_wkdeps[]; | 210 | extern struct clkdm_dep gfx_24xx_wkdeps[]; |
211 | extern struct clkdm_dep dsp_24xx_wkdeps[]; | 211 | extern struct clkdm_dep dsp_24xx_wkdeps[]; |
212 | extern struct clockdomain wkup_common_clkdm; | 212 | extern struct clockdomain wkup_common_clkdm; |
213 | extern struct clockdomain prm_common_clkdm; | ||
214 | extern struct clockdomain cm_common_clkdm; | ||
215 | 213 | ||
216 | #endif | 214 | #endif |
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c index 0ab8e46d5b2b..5c741852fac0 100644 --- a/arch/arm/mach-omap2/clockdomains2420_data.c +++ b/arch/arm/mach-omap2/clockdomains2420_data.c | |||
@@ -131,8 +131,6 @@ static struct clockdomain dss_2420_clkdm = { | |||
131 | 131 | ||
132 | static struct clockdomain *clockdomains_omap242x[] __initdata = { | 132 | static struct clockdomain *clockdomains_omap242x[] __initdata = { |
133 | &wkup_common_clkdm, | 133 | &wkup_common_clkdm, |
134 | &cm_common_clkdm, | ||
135 | &prm_common_clkdm, | ||
136 | &mpu_2420_clkdm, | 134 | &mpu_2420_clkdm, |
137 | &iva1_2420_clkdm, | 135 | &iva1_2420_clkdm, |
138 | &dsp_2420_clkdm, | 136 | &dsp_2420_clkdm, |
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c index 3645ed044890..f09617555e15 100644 --- a/arch/arm/mach-omap2/clockdomains2430_data.c +++ b/arch/arm/mach-omap2/clockdomains2430_data.c | |||
@@ -157,8 +157,6 @@ static struct clockdomain dss_2430_clkdm = { | |||
157 | 157 | ||
158 | static struct clockdomain *clockdomains_omap243x[] __initdata = { | 158 | static struct clockdomain *clockdomains_omap243x[] __initdata = { |
159 | &wkup_common_clkdm, | 159 | &wkup_common_clkdm, |
160 | &cm_common_clkdm, | ||
161 | &prm_common_clkdm, | ||
162 | &mpu_2430_clkdm, | 160 | &mpu_2430_clkdm, |
163 | &mdm_clkdm, | 161 | &mdm_clkdm, |
164 | &dsp_2430_clkdm, | 162 | &dsp_2430_clkdm, |
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c index 8e35080026d3..56089c49142a 100644 --- a/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c | |||
@@ -454,8 +454,6 @@ static struct clkdm_autodep clkdm_am35x_autodeps[] = { | |||
454 | 454 | ||
455 | static struct clockdomain *clockdomains_common[] __initdata = { | 455 | static struct clockdomain *clockdomains_common[] __initdata = { |
456 | &wkup_common_clkdm, | 456 | &wkup_common_clkdm, |
457 | &cm_common_clkdm, | ||
458 | &prm_common_clkdm, | ||
459 | &neon_clkdm, | 457 | &neon_clkdm, |
460 | &core_l3_3xxx_clkdm, | 458 | &core_l3_3xxx_clkdm, |
461 | &core_l4_3xxx_clkdm, | 459 | &core_l4_3xxx_clkdm, |
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index 7f2133abe7d3..63d60a773d3b 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c | |||
@@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { | |||
430 | &l4_wkup_44xx_clkdm, | 430 | &l4_wkup_44xx_clkdm, |
431 | &emu_sys_44xx_clkdm, | 431 | &emu_sys_44xx_clkdm, |
432 | &l3_dma_44xx_clkdm, | 432 | &l3_dma_44xx_clkdm, |
433 | &prm_common_clkdm, | ||
434 | &cm_common_clkdm, | ||
435 | NULL | 433 | NULL |
436 | }; | 434 | }; |
437 | 435 | ||
diff --git a/arch/arm/mach-omap2/clockdomains_common_data.c b/arch/arm/mach-omap2/clockdomains_common_data.c deleted file mode 100644 index 615b1f04967d..000000000000 --- a/arch/arm/mach-omap2/clockdomains_common_data.c +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * OMAP2+-common clockdomain data | ||
3 | * | ||
4 | * Copyright (C) 2008-2012 Texas Instruments, Inc. | ||
5 | * Copyright (C) 2008-2010 Nokia Corporation | ||
6 | * | ||
7 | * Paul Walmsley, Jouni Högander | ||
8 | */ | ||
9 | |||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/io.h> | ||
12 | |||
13 | #include "clockdomain.h" | ||
14 | |||
15 | /* These are implicit clockdomains - they are never defined as such in TRM */ | ||
16 | struct clockdomain prm_common_clkdm = { | ||
17 | .name = "prm_clkdm", | ||
18 | .pwrdm = { .name = "wkup_pwrdm" }, | ||
19 | }; | ||
20 | |||
21 | struct clockdomain cm_common_clkdm = { | ||
22 | .name = "cm_clkdm", | ||
23 | .pwrdm = { .name = "core_pwrdm" }, | ||
24 | }; | ||
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 08e674bb0417..3223b81e7532 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -241,6 +241,49 @@ void omap3_ctrl_write_boot_mode(u8 bootmode) | |||
241 | 241 | ||
242 | #endif | 242 | #endif |
243 | 243 | ||
244 | /** | ||
245 | * omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor | ||
246 | * @bootaddr: physical address of the boot loader | ||
247 | * | ||
248 | * Set boot address for the boot loader of a supported processor | ||
249 | * when a power ON sequence occurs. | ||
250 | */ | ||
251 | void omap_ctrl_write_dsp_boot_addr(u32 bootaddr) | ||
252 | { | ||
253 | u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR : | ||
254 | cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR : | ||
255 | cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR : | ||
256 | 0; | ||
257 | |||
258 | if (!offset) { | ||
259 | pr_err("%s: unsupported omap type\n", __func__); | ||
260 | return; | ||
261 | } | ||
262 | |||
263 | omap_ctrl_writel(bootaddr, offset); | ||
264 | } | ||
265 | |||
266 | /** | ||
267 | * omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor | ||
268 | * @bootmode: 8-bit value to pass to some boot code | ||
269 | * | ||
270 | * Sets boot mode for the boot loader of a supported processor | ||
271 | * when a power ON sequence occurs. | ||
272 | */ | ||
273 | void omap_ctrl_write_dsp_boot_mode(u8 bootmode) | ||
274 | { | ||
275 | u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD : | ||
276 | cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD : | ||
277 | 0; | ||
278 | |||
279 | if (!offset) { | ||
280 | pr_err("%s: unsupported omap type\n", __func__); | ||
281 | return; | ||
282 | } | ||
283 | |||
284 | omap_ctrl_writel(bootmode, offset); | ||
285 | } | ||
286 | |||
244 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) | 287 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) |
245 | /* | 288 | /* |
246 | * Clears the scratchpad contents in case of cold boot- | 289 | * Clears the scratchpad contents in case of cold boot- |
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index a406fd045ce1..fcc98f822d9d 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h | |||
@@ -397,6 +397,8 @@ extern u32 omap3_arm_context[128]; | |||
397 | extern void omap3_control_save_context(void); | 397 | extern void omap3_control_save_context(void); |
398 | extern void omap3_control_restore_context(void); | 398 | extern void omap3_control_restore_context(void); |
399 | extern void omap3_ctrl_write_boot_mode(u8 bootmode); | 399 | extern void omap3_ctrl_write_boot_mode(u8 bootmode); |
400 | extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr); | ||
401 | extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); | ||
400 | extern void omap3630_ctrl_disable_rta(void); | 402 | extern void omap3630_ctrl_disable_rta(void); |
401 | extern int omap3_ctrl_save_padconf(void); | 403 | extern int omap3_ctrl_save_padconf(void); |
402 | #else | 404 | #else |
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c index 88ffa1e645cd..a636ebc16b39 100644 --- a/arch/arm/mach-omap2/dsp.c +++ b/arch/arm/mach-omap2/dsp.c | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | #include <asm/memblock.h> | 24 | #include <asm/memblock.h> |
25 | 25 | ||
26 | #include "control.h" | ||
26 | #include "cm2xxx_3xxx.h" | 27 | #include "cm2xxx_3xxx.h" |
27 | #include "prm2xxx_3xxx.h" | 28 | #include "prm2xxx_3xxx.h" |
28 | #ifdef CONFIG_BRIDGE_DVFS | 29 | #ifdef CONFIG_BRIDGE_DVFS |
@@ -46,6 +47,9 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = { | |||
46 | .dsp_cm_read = omap2_cm_read_mod_reg, | 47 | .dsp_cm_read = omap2_cm_read_mod_reg, |
47 | .dsp_cm_write = omap2_cm_write_mod_reg, | 48 | .dsp_cm_write = omap2_cm_write_mod_reg, |
48 | .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, | 49 | .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, |
50 | |||
51 | .set_bootaddr = omap_ctrl_write_dsp_boot_addr, | ||
52 | .set_bootmode = omap_ctrl_write_dsp_boot_mode, | ||
49 | }; | 53 | }; |
50 | 54 | ||
51 | static phys_addr_t omap_dsp_phys_mempool_base; | 55 | static phys_addr_t omap_dsp_phys_mempool_base; |
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h index 2f7ac70a20d8..01970824e0e5 100644 --- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h | |||
@@ -42,6 +42,7 @@ | |||
42 | #define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 | 42 | #define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 |
43 | #define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 | 43 | #define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 |
44 | #define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 | 44 | #define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 |
45 | #define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304 | ||
45 | #define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 | 46 | #define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 |
46 | #define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 | 47 | #define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 |
47 | #define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 | 48 | #define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 2d710f50fca2..bdc1ec2edb4d 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -166,6 +166,31 @@ | |||
166 | */ | 166 | */ |
167 | #define LINKS_PER_OCP_IF 2 | 167 | #define LINKS_PER_OCP_IF 2 |
168 | 168 | ||
169 | /** | ||
170 | * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations | ||
171 | * @enable_module: function to enable a module (via MODULEMODE) | ||
172 | * @disable_module: function to disable a module (via MODULEMODE) | ||
173 | * | ||
174 | * XXX Eventually this functionality will be hidden inside the PRM/CM | ||
175 | * device drivers. Until then, this should avoid huge blocks of cpu_is_*() | ||
176 | * conditionals in this code. | ||
177 | */ | ||
178 | struct omap_hwmod_soc_ops { | ||
179 | void (*enable_module)(struct omap_hwmod *oh); | ||
180 | int (*disable_module)(struct omap_hwmod *oh); | ||
181 | int (*wait_target_ready)(struct omap_hwmod *oh); | ||
182 | int (*assert_hardreset)(struct omap_hwmod *oh, | ||
183 | struct omap_hwmod_rst_info *ohri); | ||
184 | int (*deassert_hardreset)(struct omap_hwmod *oh, | ||
185 | struct omap_hwmod_rst_info *ohri); | ||
186 | int (*is_hardreset_asserted)(struct omap_hwmod *oh, | ||
187 | struct omap_hwmod_rst_info *ohri); | ||
188 | int (*init_clkdm)(struct omap_hwmod *oh); | ||
189 | }; | ||
190 | |||
191 | /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ | ||
192 | static struct omap_hwmod_soc_ops soc_ops; | ||
193 | |||
169 | /* omap_hwmod_list contains all registered struct omap_hwmods */ | 194 | /* omap_hwmod_list contains all registered struct omap_hwmods */ |
170 | static LIST_HEAD(omap_hwmod_list); | 195 | static LIST_HEAD(omap_hwmod_list); |
171 | 196 | ||
@@ -186,6 +211,9 @@ static struct omap_hwmod_link *linkspace; | |||
186 | */ | 211 | */ |
187 | static unsigned short free_ls, max_ls, ls_supp; | 212 | static unsigned short free_ls, max_ls, ls_supp; |
188 | 213 | ||
214 | /* inited: set to true once the hwmod code is initialized */ | ||
215 | static bool inited; | ||
216 | |||
189 | /* Private functions */ | 217 | /* Private functions */ |
190 | 218 | ||
191 | /** | 219 | /** |
@@ -771,23 +799,19 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) | |||
771 | } | 799 | } |
772 | 800 | ||
773 | /** | 801 | /** |
774 | * _enable_module - enable CLKCTRL modulemode on OMAP4 | 802 | * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 |
775 | * @oh: struct omap_hwmod * | 803 | * @oh: struct omap_hwmod * |
776 | * | 804 | * |
777 | * Enables the PRCM module mode related to the hwmod @oh. | 805 | * Enables the PRCM module mode related to the hwmod @oh. |
778 | * No return value. | 806 | * No return value. |
779 | */ | 807 | */ |
780 | static void _enable_module(struct omap_hwmod *oh) | 808 | static void _omap4_enable_module(struct omap_hwmod *oh) |
781 | { | 809 | { |
782 | /* The module mode does not exist prior OMAP4 */ | ||
783 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
784 | return; | ||
785 | |||
786 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) | 810 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
787 | return; | 811 | return; |
788 | 812 | ||
789 | pr_debug("omap_hwmod: %s: _enable_module: %d\n", | 813 | pr_debug("omap_hwmod: %s: %s: %d\n", |
790 | oh->name, oh->prcm.omap4.modulemode); | 814 | oh->name, __func__, oh->prcm.omap4.modulemode); |
791 | 815 | ||
792 | omap4_cminst_module_enable(oh->prcm.omap4.modulemode, | 816 | omap4_cminst_module_enable(oh->prcm.omap4.modulemode, |
793 | oh->clkdm->prcm_partition, | 817 | oh->clkdm->prcm_partition, |
@@ -807,10 +831,7 @@ static void _enable_module(struct omap_hwmod *oh) | |||
807 | */ | 831 | */ |
808 | static int _omap4_wait_target_disable(struct omap_hwmod *oh) | 832 | static int _omap4_wait_target_disable(struct omap_hwmod *oh) |
809 | { | 833 | { |
810 | if (!cpu_is_omap44xx()) | 834 | if (!oh || !oh->clkdm) |
811 | return 0; | ||
812 | |||
813 | if (!oh) | ||
814 | return -EINVAL; | 835 | return -EINVAL; |
815 | 836 | ||
816 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | 837 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
@@ -1301,24 +1322,20 @@ static struct omap_hwmod *_lookup(const char *name) | |||
1301 | 1322 | ||
1302 | return oh; | 1323 | return oh; |
1303 | } | 1324 | } |
1325 | |||
1304 | /** | 1326 | /** |
1305 | * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod | 1327 | * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod |
1306 | * @oh: struct omap_hwmod * | 1328 | * @oh: struct omap_hwmod * |
1307 | * | 1329 | * |
1308 | * Convert a clockdomain name stored in a struct omap_hwmod into a | 1330 | * Convert a clockdomain name stored in a struct omap_hwmod into a |
1309 | * clockdomain pointer, and save it into the struct omap_hwmod. | 1331 | * clockdomain pointer, and save it into the struct omap_hwmod. |
1310 | * return -EINVAL if clkdm_name does not exist or if the lookup failed. | 1332 | * Return -EINVAL if the clkdm_name lookup failed. |
1311 | */ | 1333 | */ |
1312 | static int _init_clkdm(struct omap_hwmod *oh) | 1334 | static int _init_clkdm(struct omap_hwmod *oh) |
1313 | { | 1335 | { |
1314 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | 1336 | if (!oh->clkdm_name) |
1315 | return 0; | 1337 | return 0; |
1316 | 1338 | ||
1317 | if (!oh->clkdm_name) { | ||
1318 | pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); | ||
1319 | return -EINVAL; | ||
1320 | } | ||
1321 | |||
1322 | oh->clkdm = clkdm_lookup(oh->clkdm_name); | 1339 | oh->clkdm = clkdm_lookup(oh->clkdm_name); |
1323 | if (!oh->clkdm) { | 1340 | if (!oh->clkdm) { |
1324 | pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", | 1341 | pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", |
@@ -1354,7 +1371,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | |||
1354 | ret |= _init_main_clk(oh); | 1371 | ret |= _init_main_clk(oh); |
1355 | ret |= _init_interface_clks(oh); | 1372 | ret |= _init_interface_clks(oh); |
1356 | ret |= _init_opt_clks(oh); | 1373 | ret |= _init_opt_clks(oh); |
1357 | ret |= _init_clkdm(oh); | 1374 | if (soc_ops.init_clkdm) |
1375 | ret |= soc_ops.init_clkdm(oh); | ||
1358 | 1376 | ||
1359 | if (!ret) | 1377 | if (!ret) |
1360 | oh->_state = _HWMOD_STATE_CLKS_INITED; | 1378 | oh->_state = _HWMOD_STATE_CLKS_INITED; |
@@ -1365,53 +1383,6 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | |||
1365 | } | 1383 | } |
1366 | 1384 | ||
1367 | /** | 1385 | /** |
1368 | * _wait_target_ready - wait for a module to leave slave idle | ||
1369 | * @oh: struct omap_hwmod * | ||
1370 | * | ||
1371 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | ||
1372 | * does not have an IDLEST bit or if the module successfully leaves | ||
1373 | * slave idle; otherwise, pass along the return value of the | ||
1374 | * appropriate *_cm*_wait_module_ready() function. | ||
1375 | */ | ||
1376 | static int _wait_target_ready(struct omap_hwmod *oh) | ||
1377 | { | ||
1378 | struct omap_hwmod_ocp_if *os; | ||
1379 | int ret; | ||
1380 | |||
1381 | if (!oh) | ||
1382 | return -EINVAL; | ||
1383 | |||
1384 | if (oh->flags & HWMOD_NO_IDLEST) | ||
1385 | return 0; | ||
1386 | |||
1387 | os = _find_mpu_rt_port(oh); | ||
1388 | if (!os) | ||
1389 | return 0; | ||
1390 | |||
1391 | /* XXX check module SIDLEMODE */ | ||
1392 | |||
1393 | /* XXX check clock enable states */ | ||
1394 | |||
1395 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | ||
1396 | ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, | ||
1397 | oh->prcm.omap2.idlest_reg_id, | ||
1398 | oh->prcm.omap2.idlest_idle_bit); | ||
1399 | } else if (cpu_is_omap44xx()) { | ||
1400 | if (!oh->clkdm) | ||
1401 | return -EINVAL; | ||
1402 | |||
1403 | ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, | ||
1404 | oh->clkdm->cm_inst, | ||
1405 | oh->clkdm->clkdm_offs, | ||
1406 | oh->prcm.omap4.clkctrl_offs); | ||
1407 | } else { | ||
1408 | BUG(); | ||
1409 | }; | ||
1410 | |||
1411 | return ret; | ||
1412 | } | ||
1413 | |||
1414 | /** | ||
1415 | * _lookup_hardreset - fill register bit info for this hwmod/reset line | 1386 | * _lookup_hardreset - fill register bit info for this hwmod/reset line |
1416 | * @oh: struct omap_hwmod * | 1387 | * @oh: struct omap_hwmod * |
1417 | * @name: name of the reset line in the context of this hwmod | 1388 | * @name: name of the reset line in the context of this hwmod |
@@ -1447,32 +1418,31 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, | |||
1447 | * @oh: struct omap_hwmod * | 1418 | * @oh: struct omap_hwmod * |
1448 | * @name: name of the reset line to lookup and assert | 1419 | * @name: name of the reset line to lookup and assert |
1449 | * | 1420 | * |
1450 | * Some IP like dsp, ipu or iva contain processor that require | 1421 | * Some IP like dsp, ipu or iva contain processor that require an HW |
1451 | * an HW reset line to be assert / deassert in order to enable fully | 1422 | * reset line to be assert / deassert in order to enable fully the IP. |
1452 | * the IP. | 1423 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
1424 | * asserting the hardreset line on the currently-booted SoC, or passes | ||
1425 | * along the return value from _lookup_hardreset() or the SoC's | ||
1426 | * assert_hardreset code. | ||
1453 | */ | 1427 | */ |
1454 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | 1428 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) |
1455 | { | 1429 | { |
1456 | struct omap_hwmod_rst_info ohri; | 1430 | struct omap_hwmod_rst_info ohri; |
1457 | u8 ret; | 1431 | u8 ret = -EINVAL; |
1458 | 1432 | ||
1459 | if (!oh) | 1433 | if (!oh) |
1460 | return -EINVAL; | 1434 | return -EINVAL; |
1461 | 1435 | ||
1436 | if (!soc_ops.assert_hardreset) | ||
1437 | return -ENOSYS; | ||
1438 | |||
1462 | ret = _lookup_hardreset(oh, name, &ohri); | 1439 | ret = _lookup_hardreset(oh, name, &ohri); |
1463 | if (IS_ERR_VALUE(ret)) | 1440 | if (IS_ERR_VALUE(ret)) |
1464 | return ret; | 1441 | return ret; |
1465 | 1442 | ||
1466 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | 1443 | ret = soc_ops.assert_hardreset(oh, &ohri); |
1467 | return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, | 1444 | |
1468 | ohri.rst_shift); | 1445 | return ret; |
1469 | else if (cpu_is_omap44xx()) | ||
1470 | return omap4_prminst_assert_hardreset(ohri.rst_shift, | ||
1471 | oh->clkdm->pwrdm.ptr->prcm_partition, | ||
1472 | oh->clkdm->pwrdm.ptr->prcm_offs, | ||
1473 | oh->prcm.omap4.rstctrl_offs); | ||
1474 | else | ||
1475 | return -EINVAL; | ||
1476 | } | 1446 | } |
1477 | 1447 | ||
1478 | /** | 1448 | /** |
@@ -1481,38 +1451,29 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | |||
1481 | * @oh: struct omap_hwmod * | 1451 | * @oh: struct omap_hwmod * |
1482 | * @name: name of the reset line to look up and deassert | 1452 | * @name: name of the reset line to look up and deassert |
1483 | * | 1453 | * |
1484 | * Some IP like dsp, ipu or iva contain processor that require | 1454 | * Some IP like dsp, ipu or iva contain processor that require an HW |
1485 | * an HW reset line to be assert / deassert in order to enable fully | 1455 | * reset line to be assert / deassert in order to enable fully the IP. |
1486 | * the IP. | 1456 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
1457 | * deasserting the hardreset line on the currently-booted SoC, or passes | ||
1458 | * along the return value from _lookup_hardreset() or the SoC's | ||
1459 | * deassert_hardreset code. | ||
1487 | */ | 1460 | */ |
1488 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) | 1461 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) |
1489 | { | 1462 | { |
1490 | struct omap_hwmod_rst_info ohri; | 1463 | struct omap_hwmod_rst_info ohri; |
1491 | int ret; | 1464 | int ret = -EINVAL; |
1492 | 1465 | ||
1493 | if (!oh) | 1466 | if (!oh) |
1494 | return -EINVAL; | 1467 | return -EINVAL; |
1495 | 1468 | ||
1469 | if (!soc_ops.deassert_hardreset) | ||
1470 | return -ENOSYS; | ||
1471 | |||
1496 | ret = _lookup_hardreset(oh, name, &ohri); | 1472 | ret = _lookup_hardreset(oh, name, &ohri); |
1497 | if (IS_ERR_VALUE(ret)) | 1473 | if (IS_ERR_VALUE(ret)) |
1498 | return ret; | 1474 | return ret; |
1499 | 1475 | ||
1500 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | 1476 | ret = soc_ops.deassert_hardreset(oh, &ohri); |
1501 | ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, | ||
1502 | ohri.rst_shift, | ||
1503 | ohri.st_shift); | ||
1504 | } else if (cpu_is_omap44xx()) { | ||
1505 | if (ohri.st_shift) | ||
1506 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", | ||
1507 | oh->name, name); | ||
1508 | ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, | ||
1509 | oh->clkdm->pwrdm.ptr->prcm_partition, | ||
1510 | oh->clkdm->pwrdm.ptr->prcm_offs, | ||
1511 | oh->prcm.omap4.rstctrl_offs); | ||
1512 | } else { | ||
1513 | return -EINVAL; | ||
1514 | } | ||
1515 | |||
1516 | if (ret == -EBUSY) | 1477 | if (ret == -EBUSY) |
1517 | pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); | 1478 | pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); |
1518 | 1479 | ||
@@ -1525,31 +1486,28 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) | |||
1525 | * @oh: struct omap_hwmod * | 1486 | * @oh: struct omap_hwmod * |
1526 | * @name: name of the reset line to look up and read | 1487 | * @name: name of the reset line to look up and read |
1527 | * | 1488 | * |
1528 | * Return the state of the reset line. | 1489 | * Return the state of the reset line. Returns -EINVAL if @oh is |
1490 | * null, -ENOSYS if we have no way of reading the hardreset line | ||
1491 | * status on the currently-booted SoC, or passes along the return | ||
1492 | * value from _lookup_hardreset() or the SoC's is_hardreset_asserted | ||
1493 | * code. | ||
1529 | */ | 1494 | */ |
1530 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) | 1495 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) |
1531 | { | 1496 | { |
1532 | struct omap_hwmod_rst_info ohri; | 1497 | struct omap_hwmod_rst_info ohri; |
1533 | u8 ret; | 1498 | u8 ret = -EINVAL; |
1534 | 1499 | ||
1535 | if (!oh) | 1500 | if (!oh) |
1536 | return -EINVAL; | 1501 | return -EINVAL; |
1537 | 1502 | ||
1503 | if (!soc_ops.is_hardreset_asserted) | ||
1504 | return -ENOSYS; | ||
1505 | |||
1538 | ret = _lookup_hardreset(oh, name, &ohri); | 1506 | ret = _lookup_hardreset(oh, name, &ohri); |
1539 | if (IS_ERR_VALUE(ret)) | 1507 | if (IS_ERR_VALUE(ret)) |
1540 | return ret; | 1508 | return ret; |
1541 | 1509 | ||
1542 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | 1510 | return soc_ops.is_hardreset_asserted(oh, &ohri); |
1543 | return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, | ||
1544 | ohri.st_shift); | ||
1545 | } else if (cpu_is_omap44xx()) { | ||
1546 | return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, | ||
1547 | oh->clkdm->pwrdm.ptr->prcm_partition, | ||
1548 | oh->clkdm->pwrdm.ptr->prcm_offs, | ||
1549 | oh->prcm.omap4.rstctrl_offs); | ||
1550 | } else { | ||
1551 | return -EINVAL; | ||
1552 | } | ||
1553 | } | 1511 | } |
1554 | 1512 | ||
1555 | /** | 1513 | /** |
@@ -1587,10 +1545,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh) | |||
1587 | { | 1545 | { |
1588 | int v; | 1546 | int v; |
1589 | 1547 | ||
1590 | /* The module mode does not exist prior OMAP4 */ | ||
1591 | if (!cpu_is_omap44xx()) | ||
1592 | return -EINVAL; | ||
1593 | |||
1594 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) | 1548 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
1595 | return -EINVAL; | 1549 | return -EINVAL; |
1596 | 1550 | ||
@@ -1830,9 +1784,11 @@ static int _enable(struct omap_hwmod *oh) | |||
1830 | } | 1784 | } |
1831 | 1785 | ||
1832 | _enable_clocks(oh); | 1786 | _enable_clocks(oh); |
1833 | _enable_module(oh); | 1787 | if (soc_ops.enable_module) |
1788 | soc_ops.enable_module(oh); | ||
1834 | 1789 | ||
1835 | r = _wait_target_ready(oh); | 1790 | r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : |
1791 | -EINVAL; | ||
1836 | if (!r) { | 1792 | if (!r) { |
1837 | /* | 1793 | /* |
1838 | * Set the clockdomain to HW_AUTO only if the target is ready, | 1794 | * Set the clockdomain to HW_AUTO only if the target is ready, |
@@ -1886,7 +1842,8 @@ static int _idle(struct omap_hwmod *oh) | |||
1886 | _idle_sysc(oh); | 1842 | _idle_sysc(oh); |
1887 | _del_initiator_dep(oh, mpu_oh); | 1843 | _del_initiator_dep(oh, mpu_oh); |
1888 | 1844 | ||
1889 | _omap4_disable_module(oh); | 1845 | if (soc_ops.disable_module) |
1846 | soc_ops.disable_module(oh); | ||
1890 | 1847 | ||
1891 | /* | 1848 | /* |
1892 | * The module must be in idle mode before disabling any parents | 1849 | * The module must be in idle mode before disabling any parents |
@@ -1991,7 +1948,8 @@ static int _shutdown(struct omap_hwmod *oh) | |||
1991 | if (oh->_state == _HWMOD_STATE_ENABLED) { | 1948 | if (oh->_state == _HWMOD_STATE_ENABLED) { |
1992 | _del_initiator_dep(oh, mpu_oh); | 1949 | _del_initiator_dep(oh, mpu_oh); |
1993 | /* XXX what about the other system initiators here? dma, dsp */ | 1950 | /* XXX what about the other system initiators here? dma, dsp */ |
1994 | _omap4_disable_module(oh); | 1951 | if (soc_ops.disable_module) |
1952 | soc_ops.disable_module(oh); | ||
1995 | _disable_clocks(oh); | 1953 | _disable_clocks(oh); |
1996 | if (oh->clkdm) | 1954 | if (oh->clkdm) |
1997 | clkdm_hwmod_disable(oh->clkdm, oh); | 1955 | clkdm_hwmod_disable(oh->clkdm, oh); |
@@ -2447,6 +2405,194 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) | |||
2447 | return 0; | 2405 | return 0; |
2448 | } | 2406 | } |
2449 | 2407 | ||
2408 | /* Static functions intended only for use in soc_ops field function pointers */ | ||
2409 | |||
2410 | /** | ||
2411 | * _omap2_wait_target_ready - wait for a module to leave slave idle | ||
2412 | * @oh: struct omap_hwmod * | ||
2413 | * | ||
2414 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | ||
2415 | * does not have an IDLEST bit or if the module successfully leaves | ||
2416 | * slave idle; otherwise, pass along the return value of the | ||
2417 | * appropriate *_cm*_wait_module_ready() function. | ||
2418 | */ | ||
2419 | static int _omap2_wait_target_ready(struct omap_hwmod *oh) | ||
2420 | { | ||
2421 | if (!oh) | ||
2422 | return -EINVAL; | ||
2423 | |||
2424 | if (oh->flags & HWMOD_NO_IDLEST) | ||
2425 | return 0; | ||
2426 | |||
2427 | if (!_find_mpu_rt_port(oh)) | ||
2428 | return 0; | ||
2429 | |||
2430 | /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ | ||
2431 | |||
2432 | return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, | ||
2433 | oh->prcm.omap2.idlest_reg_id, | ||
2434 | oh->prcm.omap2.idlest_idle_bit); | ||
2435 | } | ||
2436 | |||
2437 | /** | ||
2438 | * _omap4_wait_target_ready - wait for a module to leave slave idle | ||
2439 | * @oh: struct omap_hwmod * | ||
2440 | * | ||
2441 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | ||
2442 | * does not have an IDLEST bit or if the module successfully leaves | ||
2443 | * slave idle; otherwise, pass along the return value of the | ||
2444 | * appropriate *_cm*_wait_module_ready() function. | ||
2445 | */ | ||
2446 | static int _omap4_wait_target_ready(struct omap_hwmod *oh) | ||
2447 | { | ||
2448 | if (!oh || !oh->clkdm) | ||
2449 | return -EINVAL; | ||
2450 | |||
2451 | if (oh->flags & HWMOD_NO_IDLEST) | ||
2452 | return 0; | ||
2453 | |||
2454 | if (!_find_mpu_rt_port(oh)) | ||
2455 | return 0; | ||
2456 | |||
2457 | /* XXX check module SIDLEMODE, hardreset status */ | ||
2458 | |||
2459 | return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, | ||
2460 | oh->clkdm->cm_inst, | ||
2461 | oh->clkdm->clkdm_offs, | ||
2462 | oh->prcm.omap4.clkctrl_offs); | ||
2463 | } | ||
2464 | |||
2465 | /** | ||
2466 | * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args | ||
2467 | * @oh: struct omap_hwmod * to assert hardreset | ||
2468 | * @ohri: hardreset line data | ||
2469 | * | ||
2470 | * Call omap2_prm_assert_hardreset() with parameters extracted from | ||
2471 | * the hwmod @oh and the hardreset line data @ohri. Only intended for | ||
2472 | * use as an soc_ops function pointer. Passes along the return value | ||
2473 | * from omap2_prm_assert_hardreset(). XXX This function is scheduled | ||
2474 | * for removal when the PRM code is moved into drivers/. | ||
2475 | */ | ||
2476 | static int _omap2_assert_hardreset(struct omap_hwmod *oh, | ||
2477 | struct omap_hwmod_rst_info *ohri) | ||
2478 | { | ||
2479 | return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, | ||
2480 | ohri->rst_shift); | ||
2481 | } | ||
2482 | |||
2483 | /** | ||
2484 | * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args | ||
2485 | * @oh: struct omap_hwmod * to deassert hardreset | ||
2486 | * @ohri: hardreset line data | ||
2487 | * | ||
2488 | * Call omap2_prm_deassert_hardreset() with parameters extracted from | ||
2489 | * the hwmod @oh and the hardreset line data @ohri. Only intended for | ||
2490 | * use as an soc_ops function pointer. Passes along the return value | ||
2491 | * from omap2_prm_deassert_hardreset(). XXX This function is | ||
2492 | * scheduled for removal when the PRM code is moved into drivers/. | ||
2493 | */ | ||
2494 | static int _omap2_deassert_hardreset(struct omap_hwmod *oh, | ||
2495 | struct omap_hwmod_rst_info *ohri) | ||
2496 | { | ||
2497 | return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, | ||
2498 | ohri->rst_shift, | ||
2499 | ohri->st_shift); | ||
2500 | } | ||
2501 | |||
2502 | /** | ||
2503 | * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args | ||
2504 | * @oh: struct omap_hwmod * to test hardreset | ||
2505 | * @ohri: hardreset line data | ||
2506 | * | ||
2507 | * Call omap2_prm_is_hardreset_asserted() with parameters extracted | ||
2508 | * from the hwmod @oh and the hardreset line data @ohri. Only | ||
2509 | * intended for use as an soc_ops function pointer. Passes along the | ||
2510 | * return value from omap2_prm_is_hardreset_asserted(). XXX This | ||
2511 | * function is scheduled for removal when the PRM code is moved into | ||
2512 | * drivers/. | ||
2513 | */ | ||
2514 | static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, | ||
2515 | struct omap_hwmod_rst_info *ohri) | ||
2516 | { | ||
2517 | return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, | ||
2518 | ohri->st_shift); | ||
2519 | } | ||
2520 | |||
2521 | /** | ||
2522 | * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args | ||
2523 | * @oh: struct omap_hwmod * to assert hardreset | ||
2524 | * @ohri: hardreset line data | ||
2525 | * | ||
2526 | * Call omap4_prminst_assert_hardreset() with parameters extracted | ||
2527 | * from the hwmod @oh and the hardreset line data @ohri. Only | ||
2528 | * intended for use as an soc_ops function pointer. Passes along the | ||
2529 | * return value from omap4_prminst_assert_hardreset(). XXX This | ||
2530 | * function is scheduled for removal when the PRM code is moved into | ||
2531 | * drivers/. | ||
2532 | */ | ||
2533 | static int _omap4_assert_hardreset(struct omap_hwmod *oh, | ||
2534 | struct omap_hwmod_rst_info *ohri) | ||
2535 | { | ||
2536 | if (!oh->clkdm) | ||
2537 | return -EINVAL; | ||
2538 | |||
2539 | return omap4_prminst_assert_hardreset(ohri->rst_shift, | ||
2540 | oh->clkdm->pwrdm.ptr->prcm_partition, | ||
2541 | oh->clkdm->pwrdm.ptr->prcm_offs, | ||
2542 | oh->prcm.omap4.rstctrl_offs); | ||
2543 | } | ||
2544 | |||
2545 | /** | ||
2546 | * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args | ||
2547 | * @oh: struct omap_hwmod * to deassert hardreset | ||
2548 | * @ohri: hardreset line data | ||
2549 | * | ||
2550 | * Call omap4_prminst_deassert_hardreset() with parameters extracted | ||
2551 | * from the hwmod @oh and the hardreset line data @ohri. Only | ||
2552 | * intended for use as an soc_ops function pointer. Passes along the | ||
2553 | * return value from omap4_prminst_deassert_hardreset(). XXX This | ||
2554 | * function is scheduled for removal when the PRM code is moved into | ||
2555 | * drivers/. | ||
2556 | */ | ||
2557 | static int _omap4_deassert_hardreset(struct omap_hwmod *oh, | ||
2558 | struct omap_hwmod_rst_info *ohri) | ||
2559 | { | ||
2560 | if (!oh->clkdm) | ||
2561 | return -EINVAL; | ||
2562 | |||
2563 | if (ohri->st_shift) | ||
2564 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", | ||
2565 | oh->name, ohri->name); | ||
2566 | return omap4_prminst_deassert_hardreset(ohri->rst_shift, | ||
2567 | oh->clkdm->pwrdm.ptr->prcm_partition, | ||
2568 | oh->clkdm->pwrdm.ptr->prcm_offs, | ||
2569 | oh->prcm.omap4.rstctrl_offs); | ||
2570 | } | ||
2571 | |||
2572 | /** | ||
2573 | * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args | ||
2574 | * @oh: struct omap_hwmod * to test hardreset | ||
2575 | * @ohri: hardreset line data | ||
2576 | * | ||
2577 | * Call omap4_prminst_is_hardreset_asserted() with parameters | ||
2578 | * extracted from the hwmod @oh and the hardreset line data @ohri. | ||
2579 | * Only intended for use as an soc_ops function pointer. Passes along | ||
2580 | * the return value from omap4_prminst_is_hardreset_asserted(). XXX | ||
2581 | * This function is scheduled for removal when the PRM code is moved | ||
2582 | * into drivers/. | ||
2583 | */ | ||
2584 | static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, | ||
2585 | struct omap_hwmod_rst_info *ohri) | ||
2586 | { | ||
2587 | if (!oh->clkdm) | ||
2588 | return -EINVAL; | ||
2589 | |||
2590 | return omap4_prminst_is_hardreset_asserted(ohri->rst_shift, | ||
2591 | oh->clkdm->pwrdm.ptr->prcm_partition, | ||
2592 | oh->clkdm->pwrdm.ptr->prcm_offs, | ||
2593 | oh->prcm.omap4.rstctrl_offs); | ||
2594 | } | ||
2595 | |||
2450 | /* Public functions */ | 2596 | /* Public functions */ |
2451 | 2597 | ||
2452 | u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) | 2598 | u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) |
@@ -2579,12 +2725,18 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), | |||
2579 | * | 2725 | * |
2580 | * Intended to be called early in boot before the clock framework is | 2726 | * Intended to be called early in boot before the clock framework is |
2581 | * initialized. If @ois is not null, will register all omap_hwmods | 2727 | * initialized. If @ois is not null, will register all omap_hwmods |
2582 | * listed in @ois that are valid for this chip. Returns 0. | 2728 | * listed in @ois that are valid for this chip. Returns -EINVAL if |
2729 | * omap_hwmod_init() hasn't been called before calling this function, | ||
2730 | * -ENOMEM if the link memory area can't be allocated, or 0 upon | ||
2731 | * success. | ||
2583 | */ | 2732 | */ |
2584 | int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) | 2733 | int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) |
2585 | { | 2734 | { |
2586 | int r, i; | 2735 | int r, i; |
2587 | 2736 | ||
2737 | if (!inited) | ||
2738 | return -EINVAL; | ||
2739 | |||
2588 | if (!ois) | 2740 | if (!ois) |
2589 | return 0; | 2741 | return 0; |
2590 | 2742 | ||
@@ -3417,3 +3569,32 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) | |||
3417 | 3569 | ||
3418 | return 0; | 3570 | return 0; |
3419 | } | 3571 | } |
3572 | |||
3573 | /** | ||
3574 | * omap_hwmod_init - initialize the hwmod code | ||
3575 | * | ||
3576 | * Sets up some function pointers needed by the hwmod code to operate on the | ||
3577 | * currently-booted SoC. Intended to be called once during kernel init | ||
3578 | * before any hwmods are registered. No return value. | ||
3579 | */ | ||
3580 | void __init omap_hwmod_init(void) | ||
3581 | { | ||
3582 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | ||
3583 | soc_ops.wait_target_ready = _omap2_wait_target_ready; | ||
3584 | soc_ops.assert_hardreset = _omap2_assert_hardreset; | ||
3585 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; | ||
3586 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; | ||
3587 | } else if (cpu_is_omap44xx()) { | ||
3588 | soc_ops.enable_module = _omap4_enable_module; | ||
3589 | soc_ops.disable_module = _omap4_disable_module; | ||
3590 | soc_ops.wait_target_ready = _omap4_wait_target_ready; | ||
3591 | soc_ops.assert_hardreset = _omap4_assert_hardreset; | ||
3592 | soc_ops.deassert_hardreset = _omap4_deassert_hardreset; | ||
3593 | soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; | ||
3594 | soc_ops.init_clkdm = _init_clkdm; | ||
3595 | } else { | ||
3596 | WARN(1, "omap_hwmod: unknown SoC type\n"); | ||
3597 | } | ||
3598 | |||
3599 | inited = true; | ||
3600 | } | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index a7640d1b215e..50cfab61b0e2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -192,6 +192,11 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { | |||
192 | .name = "mcbsp", | 192 | .name = "mcbsp", |
193 | }; | 193 | }; |
194 | 194 | ||
195 | static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { | ||
196 | { .role = "pad_fck", .clk = "mcbsp_clks" }, | ||
197 | { .role = "prcm_fck", .clk = "func_96m_ck" }, | ||
198 | }; | ||
199 | |||
195 | /* mcbsp1 */ | 200 | /* mcbsp1 */ |
196 | static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { | 201 | static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { |
197 | { .name = "tx", .irq = 59 }, | 202 | { .name = "tx", .irq = 59 }, |
@@ -214,6 +219,8 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { | |||
214 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, | 219 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, |
215 | }, | 220 | }, |
216 | }, | 221 | }, |
222 | .opt_clks = mcbsp_opt_clks, | ||
223 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
217 | }; | 224 | }; |
218 | 225 | ||
219 | /* mcbsp2 */ | 226 | /* mcbsp2 */ |
@@ -238,6 +245,8 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { | |||
238 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, | 245 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, |
239 | }, | 246 | }, |
240 | }, | 247 | }, |
248 | .opt_clks = mcbsp_opt_clks, | ||
249 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
241 | }; | 250 | }; |
242 | 251 | ||
243 | static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { | 252 | static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { |
@@ -585,5 +594,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { | |||
585 | 594 | ||
586 | int __init omap2420_hwmod_init(void) | 595 | int __init omap2420_hwmod_init(void) |
587 | { | 596 | { |
597 | omap_hwmod_init(); | ||
588 | return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); | 598 | return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); |
589 | } | 599 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 4d7264981230..58b5bc196d32 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -296,6 +296,11 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { | |||
296 | .rev = MCBSP_CONFIG_TYPE2, | 296 | .rev = MCBSP_CONFIG_TYPE2, |
297 | }; | 297 | }; |
298 | 298 | ||
299 | static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { | ||
300 | { .role = "pad_fck", .clk = "mcbsp_clks" }, | ||
301 | { .role = "prcm_fck", .clk = "func_96m_ck" }, | ||
302 | }; | ||
303 | |||
299 | /* mcbsp1 */ | 304 | /* mcbsp1 */ |
300 | static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { | 305 | static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { |
301 | { .name = "tx", .irq = 59 }, | 306 | { .name = "tx", .irq = 59 }, |
@@ -320,6 +325,8 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { | |||
320 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, | 325 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, |
321 | }, | 326 | }, |
322 | }, | 327 | }, |
328 | .opt_clks = mcbsp_opt_clks, | ||
329 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
323 | }; | 330 | }; |
324 | 331 | ||
325 | /* mcbsp2 */ | 332 | /* mcbsp2 */ |
@@ -345,6 +352,8 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { | |||
345 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, | 352 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, |
346 | }, | 353 | }, |
347 | }, | 354 | }, |
355 | .opt_clks = mcbsp_opt_clks, | ||
356 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
348 | }; | 357 | }; |
349 | 358 | ||
350 | /* mcbsp3 */ | 359 | /* mcbsp3 */ |
@@ -370,6 +379,8 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { | |||
370 | .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, | 379 | .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, |
371 | }, | 380 | }, |
372 | }, | 381 | }, |
382 | .opt_clks = mcbsp_opt_clks, | ||
383 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
373 | }; | 384 | }; |
374 | 385 | ||
375 | /* mcbsp4 */ | 386 | /* mcbsp4 */ |
@@ -401,6 +412,8 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { | |||
401 | .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, | 412 | .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, |
402 | }, | 413 | }, |
403 | }, | 414 | }, |
415 | .opt_clks = mcbsp_opt_clks, | ||
416 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
404 | }; | 417 | }; |
405 | 418 | ||
406 | /* mcbsp5 */ | 419 | /* mcbsp5 */ |
@@ -432,6 +445,8 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { | |||
432 | .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, | 445 | .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, |
433 | }, | 446 | }, |
434 | }, | 447 | }, |
448 | .opt_clks = mcbsp_opt_clks, | ||
449 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), | ||
435 | }; | 450 | }; |
436 | 451 | ||
437 | /* MMC/SD/SDIO common */ | 452 | /* MMC/SD/SDIO common */ |
@@ -938,5 +953,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { | |||
938 | 953 | ||
939 | int __init omap2430_hwmod_init(void) | 954 | int __init omap2430_hwmod_init(void) |
940 | { | 955 | { |
956 | omap_hwmod_init(); | ||
941 | return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); | 957 | return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); |
942 | } | 958 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index a8653af19697..892c7c740976 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1093,6 +1093,17 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = { | |||
1093 | .rev = MCBSP_CONFIG_TYPE3, | 1093 | .rev = MCBSP_CONFIG_TYPE3, |
1094 | }; | 1094 | }; |
1095 | 1095 | ||
1096 | /* McBSP functional clock mapping */ | ||
1097 | static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = { | ||
1098 | { .role = "pad_fck", .clk = "mcbsp_clks" }, | ||
1099 | { .role = "prcm_fck", .clk = "core_96m_fck" }, | ||
1100 | }; | ||
1101 | |||
1102 | static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = { | ||
1103 | { .role = "pad_fck", .clk = "mcbsp_clks" }, | ||
1104 | { .role = "prcm_fck", .clk = "per_96m_fck" }, | ||
1105 | }; | ||
1106 | |||
1096 | /* mcbsp1 */ | 1107 | /* mcbsp1 */ |
1097 | static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { | 1108 | static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { |
1098 | { .name = "common", .irq = 16 }, | 1109 | { .name = "common", .irq = 16 }, |
@@ -1116,6 +1127,8 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { | |||
1116 | .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, | 1127 | .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, |
1117 | }, | 1128 | }, |
1118 | }, | 1129 | }, |
1130 | .opt_clks = mcbsp15_opt_clks, | ||
1131 | .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks), | ||
1119 | }; | 1132 | }; |
1120 | 1133 | ||
1121 | /* mcbsp2 */ | 1134 | /* mcbsp2 */ |
@@ -1145,6 +1158,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { | |||
1145 | .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, | 1158 | .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, |
1146 | }, | 1159 | }, |
1147 | }, | 1160 | }, |
1161 | .opt_clks = mcbsp234_opt_clks, | ||
1162 | .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), | ||
1148 | .dev_attr = &omap34xx_mcbsp2_dev_attr, | 1163 | .dev_attr = &omap34xx_mcbsp2_dev_attr, |
1149 | }; | 1164 | }; |
1150 | 1165 | ||
@@ -1175,6 +1190,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { | |||
1175 | .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, | 1190 | .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, |
1176 | }, | 1191 | }, |
1177 | }, | 1192 | }, |
1193 | .opt_clks = mcbsp234_opt_clks, | ||
1194 | .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), | ||
1178 | .dev_attr = &omap34xx_mcbsp3_dev_attr, | 1195 | .dev_attr = &omap34xx_mcbsp3_dev_attr, |
1179 | }; | 1196 | }; |
1180 | 1197 | ||
@@ -1207,6 +1224,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { | |||
1207 | .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, | 1224 | .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, |
1208 | }, | 1225 | }, |
1209 | }, | 1226 | }, |
1227 | .opt_clks = mcbsp234_opt_clks, | ||
1228 | .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), | ||
1210 | }; | 1229 | }; |
1211 | 1230 | ||
1212 | /* mcbsp5 */ | 1231 | /* mcbsp5 */ |
@@ -1238,6 +1257,8 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { | |||
1238 | .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, | 1257 | .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, |
1239 | }, | 1258 | }, |
1240 | }, | 1259 | }, |
1260 | .opt_clks = mcbsp15_opt_clks, | ||
1261 | .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks), | ||
1241 | }; | 1262 | }; |
1242 | 1263 | ||
1243 | /* 'mcbsp sidetone' class */ | 1264 | /* 'mcbsp sidetone' class */ |
@@ -3404,6 +3425,8 @@ int __init omap3xxx_hwmod_init(void) | |||
3404 | struct omap_hwmod_ocp_if **h = NULL; | 3425 | struct omap_hwmod_ocp_if **h = NULL; |
3405 | unsigned int rev; | 3426 | unsigned int rev; |
3406 | 3427 | ||
3428 | omap_hwmod_init(); | ||
3429 | |||
3407 | /* Register hwmod links common to all OMAP3 */ | 3430 | /* Register hwmod links common to all OMAP3 */ |
3408 | r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs); | 3431 | r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs); |
3409 | if (r < 0) | 3432 | if (r < 0) |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index b7bcba5221ba..4cab6318d33e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -2544,14 +2544,12 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = { | |||
2544 | static struct omap_hwmod omap44xx_cm_core_aon_hwmod = { | 2544 | static struct omap_hwmod omap44xx_cm_core_aon_hwmod = { |
2545 | .name = "cm_core_aon", | 2545 | .name = "cm_core_aon", |
2546 | .class = &omap44xx_prcm_hwmod_class, | 2546 | .class = &omap44xx_prcm_hwmod_class, |
2547 | .clkdm_name = "cm_clkdm", | ||
2548 | }; | 2547 | }; |
2549 | 2548 | ||
2550 | /* cm_core */ | 2549 | /* cm_core */ |
2551 | static struct omap_hwmod omap44xx_cm_core_hwmod = { | 2550 | static struct omap_hwmod omap44xx_cm_core_hwmod = { |
2552 | .name = "cm_core", | 2551 | .name = "cm_core", |
2553 | .class = &omap44xx_prcm_hwmod_class, | 2552 | .class = &omap44xx_prcm_hwmod_class, |
2554 | .clkdm_name = "cm_clkdm", | ||
2555 | }; | 2553 | }; |
2556 | 2554 | ||
2557 | /* prm */ | 2555 | /* prm */ |
@@ -2568,7 +2566,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = { | |||
2568 | static struct omap_hwmod omap44xx_prm_hwmod = { | 2566 | static struct omap_hwmod omap44xx_prm_hwmod = { |
2569 | .name = "prm", | 2567 | .name = "prm", |
2570 | .class = &omap44xx_prcm_hwmod_class, | 2568 | .class = &omap44xx_prcm_hwmod_class, |
2571 | .clkdm_name = "prm_clkdm", | ||
2572 | .mpu_irqs = omap44xx_prm_irqs, | 2569 | .mpu_irqs = omap44xx_prm_irqs, |
2573 | .rst_lines = omap44xx_prm_resets, | 2570 | .rst_lines = omap44xx_prm_resets, |
2574 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets), | 2571 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets), |
@@ -6148,6 +6145,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { | |||
6148 | 6145 | ||
6149 | int __init omap44xx_hwmod_init(void) | 6146 | int __init omap44xx_hwmod_init(void) |
6150 | { | 6147 | { |
6148 | omap_hwmod_init(); | ||
6151 | return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); | 6149 | return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); |
6152 | } | 6150 | } |
6153 | 6151 | ||
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c deleted file mode 100644 index 1481078763b8..000000000000 --- a/arch/arm/mach-omap2/usb-fs.c +++ /dev/null | |||
@@ -1,359 +0,0 @@ | |||
1 | /* | ||
2 | * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx | ||
3 | * | ||
4 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/module.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/types.h> | ||
24 | #include <linux/errno.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/clk.h> | ||
28 | #include <linux/err.h> | ||
29 | |||
30 | #include <asm/irq.h> | ||
31 | |||
32 | #include <plat/usb.h> | ||
33 | #include <plat/board.h> | ||
34 | |||
35 | #include "control.h" | ||
36 | #include "mux.h" | ||
37 | |||
38 | #define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN | ||
39 | #define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO | ||
40 | #define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO | ||
41 | #define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN | ||
42 | #define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG | ||
43 | |||
44 | #if defined(CONFIG_ARCH_OMAP2) | ||
45 | |||
46 | #ifdef CONFIG_USB_GADGET_OMAP | ||
47 | |||
48 | static struct resource udc_resources[] = { | ||
49 | /* order is significant! */ | ||
50 | { /* registers */ | ||
51 | .start = UDC_BASE, | ||
52 | .end = UDC_BASE + 0xff, | ||
53 | .flags = IORESOURCE_MEM, | ||
54 | }, { /* general IRQ */ | ||
55 | .start = INT_USB_IRQ_GEN, | ||
56 | .flags = IORESOURCE_IRQ, | ||
57 | }, { /* PIO IRQ */ | ||
58 | .start = INT_USB_IRQ_NISO, | ||
59 | .flags = IORESOURCE_IRQ, | ||
60 | }, { /* SOF IRQ */ | ||
61 | .start = INT_USB_IRQ_ISO, | ||
62 | .flags = IORESOURCE_IRQ, | ||
63 | }, | ||
64 | }; | ||
65 | |||
66 | static u64 udc_dmamask = ~(u32)0; | ||
67 | |||
68 | static struct platform_device udc_device = { | ||
69 | .name = "omap_udc", | ||
70 | .id = -1, | ||
71 | .dev = { | ||
72 | .dma_mask = &udc_dmamask, | ||
73 | .coherent_dma_mask = 0xffffffff, | ||
74 | }, | ||
75 | .num_resources = ARRAY_SIZE(udc_resources), | ||
76 | .resource = udc_resources, | ||
77 | }; | ||
78 | |||
79 | static inline void udc_device_init(struct omap_usb_config *pdata) | ||
80 | { | ||
81 | pdata->udc_device = &udc_device; | ||
82 | } | ||
83 | |||
84 | #else | ||
85 | |||
86 | static inline void udc_device_init(struct omap_usb_config *pdata) | ||
87 | { | ||
88 | } | ||
89 | |||
90 | #endif | ||
91 | |||
92 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
93 | |||
94 | /* The dmamask must be set for OHCI to work */ | ||
95 | static u64 ohci_dmamask = ~(u32)0; | ||
96 | |||
97 | static struct resource ohci_resources[] = { | ||
98 | { | ||
99 | .start = OMAP_OHCI_BASE, | ||
100 | .end = OMAP_OHCI_BASE + 0xff, | ||
101 | .flags = IORESOURCE_MEM, | ||
102 | }, | ||
103 | { | ||
104 | .start = INT_USB_IRQ_HGEN, | ||
105 | .flags = IORESOURCE_IRQ, | ||
106 | }, | ||
107 | }; | ||
108 | |||
109 | static struct platform_device ohci_device = { | ||
110 | .name = "ohci", | ||
111 | .id = -1, | ||
112 | .dev = { | ||
113 | .dma_mask = &ohci_dmamask, | ||
114 | .coherent_dma_mask = 0xffffffff, | ||
115 | }, | ||
116 | .num_resources = ARRAY_SIZE(ohci_resources), | ||
117 | .resource = ohci_resources, | ||
118 | }; | ||
119 | |||
120 | static inline void ohci_device_init(struct omap_usb_config *pdata) | ||
121 | { | ||
122 | pdata->ohci_device = &ohci_device; | ||
123 | } | ||
124 | |||
125 | #else | ||
126 | |||
127 | static inline void ohci_device_init(struct omap_usb_config *pdata) | ||
128 | { | ||
129 | } | ||
130 | |||
131 | #endif | ||
132 | |||
133 | #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) | ||
134 | |||
135 | static struct resource otg_resources[] = { | ||
136 | /* order is significant! */ | ||
137 | { | ||
138 | .start = OTG_BASE, | ||
139 | .end = OTG_BASE + 0xff, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, { | ||
142 | .start = INT_USB_IRQ_OTG, | ||
143 | .flags = IORESOURCE_IRQ, | ||
144 | }, | ||
145 | }; | ||
146 | |||
147 | static struct platform_device otg_device = { | ||
148 | .name = "omap_otg", | ||
149 | .id = -1, | ||
150 | .num_resources = ARRAY_SIZE(otg_resources), | ||
151 | .resource = otg_resources, | ||
152 | }; | ||
153 | |||
154 | static inline void otg_device_init(struct omap_usb_config *pdata) | ||
155 | { | ||
156 | pdata->otg_device = &otg_device; | ||
157 | } | ||
158 | |||
159 | #else | ||
160 | |||
161 | static inline void otg_device_init(struct omap_usb_config *pdata) | ||
162 | { | ||
163 | } | ||
164 | |||
165 | #endif | ||
166 | |||
167 | static void omap2_usb_devconf_clear(u8 port, u32 mask) | ||
168 | { | ||
169 | u32 r; | ||
170 | |||
171 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
172 | r &= ~USBTXWRMODEI(port, mask); | ||
173 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
174 | } | ||
175 | |||
176 | static void omap2_usb_devconf_set(u8 port, u32 mask) | ||
177 | { | ||
178 | u32 r; | ||
179 | |||
180 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
181 | r |= USBTXWRMODEI(port, mask); | ||
182 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
183 | } | ||
184 | |||
185 | static void omap2_usb2_disable_5pinbitll(void) | ||
186 | { | ||
187 | u32 r; | ||
188 | |||
189 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
190 | r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI); | ||
191 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
192 | } | ||
193 | |||
194 | static void omap2_usb2_enable_5pinunitll(void) | ||
195 | { | ||
196 | u32 r; | ||
197 | |||
198 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
199 | r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI; | ||
200 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
201 | } | ||
202 | |||
203 | static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device) | ||
204 | { | ||
205 | u32 syscon1 = 0; | ||
206 | |||
207 | omap2_usb_devconf_clear(0, USB_BIDIR_TLL); | ||
208 | |||
209 | if (nwires == 0) | ||
210 | return 0; | ||
211 | |||
212 | if (is_device) | ||
213 | omap_mux_init_signal("usb0_puen", 0); | ||
214 | |||
215 | omap_mux_init_signal("usb0_dat", 0); | ||
216 | omap_mux_init_signal("usb0_txen", 0); | ||
217 | omap_mux_init_signal("usb0_se0", 0); | ||
218 | if (nwires != 3) | ||
219 | omap_mux_init_signal("usb0_rcv", 0); | ||
220 | |||
221 | switch (nwires) { | ||
222 | case 3: | ||
223 | syscon1 = 2; | ||
224 | omap2_usb_devconf_set(0, USB_BIDIR); | ||
225 | break; | ||
226 | case 4: | ||
227 | syscon1 = 1; | ||
228 | omap2_usb_devconf_set(0, USB_BIDIR); | ||
229 | break; | ||
230 | case 6: | ||
231 | syscon1 = 3; | ||
232 | omap_mux_init_signal("usb0_vp", 0); | ||
233 | omap_mux_init_signal("usb0_vm", 0); | ||
234 | omap2_usb_devconf_set(0, USB_UNIDIR); | ||
235 | break; | ||
236 | default: | ||
237 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
238 | 0, nwires); | ||
239 | } | ||
240 | |||
241 | return syscon1 << 16; | ||
242 | } | ||
243 | |||
244 | static u32 __init omap2_usb1_init(unsigned nwires) | ||
245 | { | ||
246 | u32 syscon1 = 0; | ||
247 | |||
248 | omap2_usb_devconf_clear(1, USB_BIDIR_TLL); | ||
249 | |||
250 | if (nwires == 0) | ||
251 | return 0; | ||
252 | |||
253 | /* NOTE: board-specific code must set up pin muxing for usb1, | ||
254 | * since each signal could come out on either of two balls. | ||
255 | */ | ||
256 | |||
257 | switch (nwires) { | ||
258 | case 2: | ||
259 | /* NOTE: board-specific code must override this setting if | ||
260 | * this TLL link is not using DP/DM | ||
261 | */ | ||
262 | syscon1 = 1; | ||
263 | omap2_usb_devconf_set(1, USB_BIDIR_TLL); | ||
264 | break; | ||
265 | case 3: | ||
266 | syscon1 = 2; | ||
267 | omap2_usb_devconf_set(1, USB_BIDIR); | ||
268 | break; | ||
269 | case 4: | ||
270 | syscon1 = 1; | ||
271 | omap2_usb_devconf_set(1, USB_BIDIR); | ||
272 | break; | ||
273 | case 6: | ||
274 | default: | ||
275 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
276 | 1, nwires); | ||
277 | } | ||
278 | |||
279 | return syscon1 << 20; | ||
280 | } | ||
281 | |||
282 | static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup) | ||
283 | { | ||
284 | u32 syscon1 = 0; | ||
285 | |||
286 | omap2_usb2_disable_5pinbitll(); | ||
287 | alt_pingroup = 0; | ||
288 | |||
289 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | ||
290 | if (alt_pingroup || nwires == 0) | ||
291 | return 0; | ||
292 | |||
293 | omap_mux_init_signal("usb2_dat", 0); | ||
294 | omap_mux_init_signal("usb2_se0", 0); | ||
295 | if (nwires > 2) | ||
296 | omap_mux_init_signal("usb2_txen", 0); | ||
297 | if (nwires > 3) | ||
298 | omap_mux_init_signal("usb2_rcv", 0); | ||
299 | |||
300 | switch (nwires) { | ||
301 | case 2: | ||
302 | /* NOTE: board-specific code must override this setting if | ||
303 | * this TLL link is not using DP/DM | ||
304 | */ | ||
305 | syscon1 = 1; | ||
306 | omap2_usb_devconf_set(2, USB_BIDIR_TLL); | ||
307 | break; | ||
308 | case 3: | ||
309 | syscon1 = 2; | ||
310 | omap2_usb_devconf_set(2, USB_BIDIR); | ||
311 | break; | ||
312 | case 4: | ||
313 | syscon1 = 1; | ||
314 | omap2_usb_devconf_set(2, USB_BIDIR); | ||
315 | break; | ||
316 | case 5: | ||
317 | /* NOTE: board-specific code must mux this setting depending | ||
318 | * on TLL link using DP/DM. Something must also | ||
319 | * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} | ||
320 | * 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0 | ||
321 | * 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0 | ||
322 | */ | ||
323 | |||
324 | syscon1 = 3; | ||
325 | omap2_usb2_enable_5pinunitll(); | ||
326 | break; | ||
327 | case 6: | ||
328 | default: | ||
329 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
330 | 2, nwires); | ||
331 | } | ||
332 | |||
333 | return syscon1 << 24; | ||
334 | } | ||
335 | |||
336 | void __init omap2_usbfs_init(struct omap_usb_config *pdata) | ||
337 | { | ||
338 | struct clk *ick; | ||
339 | |||
340 | if (!cpu_is_omap24xx()) | ||
341 | return; | ||
342 | |||
343 | ick = clk_get(NULL, "usb_l4_ick"); | ||
344 | if (IS_ERR(ick)) | ||
345 | return; | ||
346 | |||
347 | clk_enable(ick); | ||
348 | pdata->usb0_init = omap2_usb0_init; | ||
349 | pdata->usb1_init = omap2_usb1_init; | ||
350 | pdata->usb2_init = omap2_usb2_init; | ||
351 | udc_device_init(pdata); | ||
352 | ohci_device_init(pdata); | ||
353 | otg_device_init(pdata); | ||
354 | omap_otg_init(pdata); | ||
355 | clk_disable(ick); | ||
356 | clk_put(ick); | ||
357 | } | ||
358 | |||
359 | #endif | ||
diff --git a/arch/arm/mach-s3c24xx/common-smdk.c b/arch/arm/mach-s3c24xx/common-smdk.c index 084604be6ad1..87e75a250d5e 100644 --- a/arch/arm/mach-s3c24xx/common-smdk.c +++ b/arch/arm/mach-s3c24xx/common-smdk.c | |||
@@ -182,19 +182,21 @@ static struct platform_device __initdata *smdk_devs[] = { | |||
182 | &smdk_led7, | 182 | &smdk_led7, |
183 | }; | 183 | }; |
184 | 184 | ||
185 | static const struct gpio smdk_led_gpios[] = { | ||
186 | { S3C2410_GPF(4), GPIOF_OUT_INIT_HIGH, NULL }, | ||
187 | { S3C2410_GPF(5), GPIOF_OUT_INIT_HIGH, NULL }, | ||
188 | { S3C2410_GPF(6), GPIOF_OUT_INIT_HIGH, NULL }, | ||
189 | { S3C2410_GPF(7), GPIOF_OUT_INIT_HIGH, NULL }, | ||
190 | }; | ||
191 | |||
185 | void __init smdk_machine_init(void) | 192 | void __init smdk_machine_init(void) |
186 | { | 193 | { |
187 | /* Configure the LEDs (even if we have no LED support)*/ | 194 | /* Configure the LEDs (even if we have no LED support)*/ |
188 | 195 | ||
189 | s3c_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT); | 196 | int ret = gpio_request_array(smdk_led_gpios, |
190 | s3c_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT); | 197 | ARRAY_SIZE(smdk_led_gpios)); |
191 | s3c_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT); | 198 | if (!WARN_ON(ret < 0)) |
192 | s3c_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT); | 199 | gpio_free_array(smdk_led_gpios, ARRAY_SIZE(smdk_led_gpios)); |
193 | |||
194 | s3c2410_gpio_setpin(S3C2410_GPF(4), 1); | ||
195 | s3c2410_gpio_setpin(S3C2410_GPF(5), 1); | ||
196 | s3c2410_gpio_setpin(S3C2410_GPF(6), 1); | ||
197 | s3c2410_gpio_setpin(S3C2410_GPF(7), 1); | ||
198 | 200 | ||
199 | if (machine_is_smdk2443()) | 201 | if (machine_is_smdk2443()) |
200 | smdk_nand_info.twrph0 = 50; | 202 | smdk_nand_info.twrph0 = 50; |
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 56cdd34cce41..0c9e9a785ef6 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c | |||
@@ -41,7 +41,6 @@ | |||
41 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
42 | #include <asm/mach/map.h> | 42 | #include <asm/mach/map.h> |
43 | 43 | ||
44 | #include <mach/regs-clock.h> | ||
45 | #include <mach/regs-gpio.h> | 44 | #include <mach/regs-gpio.h> |
46 | #include <plat/regs-serial.h> | 45 | #include <plat/regs-serial.h> |
47 | 46 | ||
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h b/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h deleted file mode 100644 index 4c38b39b741d..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/bast-pmu.h | ||
2 | * | ||
3 | * Copyright (c) 2003-2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * Vincent Sanders <vince@simtec.co.uk> | ||
6 | * | ||
7 | * Machine BAST - Power Management chip | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_BASTPMU_H | ||
15 | #define __ASM_ARCH_BASTPMU_H "08_OCT_2004" | ||
16 | |||
17 | #define BASTPMU_REG_IDENT (0x00) | ||
18 | #define BASTPMU_REG_VERSION (0x01) | ||
19 | #define BASTPMU_REG_DDCCTRL (0x02) | ||
20 | #define BASTPMU_REG_POWER (0x03) | ||
21 | #define BASTPMU_REG_RESET (0x04) | ||
22 | #define BASTPMU_REG_GWO (0x05) | ||
23 | #define BASTPMU_REG_WOL (0x06) | ||
24 | #define BASTPMU_REG_WOR (0x07) | ||
25 | #define BASTPMU_REG_UID (0x09) | ||
26 | |||
27 | #define BASTPMU_EEPROM (0xC0) | ||
28 | |||
29 | #define BASTPMU_EEP_UID (BASTPMU_EEPROM + 0) | ||
30 | #define BASTPMU_EEP_WOL (BASTPMU_EEPROM + 8) | ||
31 | #define BASTPMU_EEP_WOR (BASTPMU_EEPROM + 9) | ||
32 | |||
33 | #define BASTPMU_IDENT_0 0x53 | ||
34 | #define BASTPMU_IDENT_1 0x42 | ||
35 | #define BASTPMU_IDENT_2 0x50 | ||
36 | #define BASTPMU_IDENT_3 0x4d | ||
37 | |||
38 | #define BASTPMU_RESET_GUARD (0x55) | ||
39 | |||
40 | #endif /* __ASM_ARCH_BASTPMU_H */ | ||
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h index 019ea86057f6..3890a05948fb 100644 --- a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h | |||
@@ -93,26 +93,5 @@ enum s3c_gpio_number { | |||
93 | #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) | 93 | #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) |
94 | #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) | 94 | #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) |
95 | 95 | ||
96 | /* compatibility until drivers can be modified */ | ||
97 | |||
98 | #define S3C2410_GPA0 S3C2410_GPA(0) | ||
99 | #define S3C2410_GPA1 S3C2410_GPA(1) | ||
100 | #define S3C2410_GPA3 S3C2410_GPA(3) | ||
101 | #define S3C2410_GPA7 S3C2410_GPA(7) | ||
102 | |||
103 | #define S3C2410_GPE0 S3C2410_GPE(0) | ||
104 | #define S3C2410_GPE1 S3C2410_GPE(1) | ||
105 | #define S3C2410_GPE2 S3C2410_GPE(2) | ||
106 | #define S3C2410_GPE3 S3C2410_GPE(3) | ||
107 | #define S3C2410_GPE4 S3C2410_GPE(4) | ||
108 | #define S3C2410_GPE5 S3C2410_GPE(5) | ||
109 | #define S3C2410_GPE6 S3C2410_GPE(6) | ||
110 | #define S3C2410_GPE7 S3C2410_GPE(7) | ||
111 | #define S3C2410_GPE8 S3C2410_GPE(8) | ||
112 | #define S3C2410_GPE9 S3C2410_GPE(9) | ||
113 | #define S3C2410_GPE10 S3C2410_GPE(10) | ||
114 | |||
115 | #define S3C2410_GPH10 S3C2410_GPH(10) | ||
116 | |||
117 | #endif /* __MACH_GPIONRS_H */ | 96 | #endif /* __MACH_GPIONRS_H */ |
118 | 97 | ||
diff --git a/arch/arm/mach-s3c24xx/include/mach/gta02.h b/arch/arm/mach-s3c24xx/include/mach/gta02.h index 3a56a229cac6..217393482153 100644 --- a/arch/arm/mach-s3c24xx/include/mach/gta02.h +++ b/arch/arm/mach-s3c24xx/include/mach/gta02.h | |||
@@ -3,82 +3,13 @@ | |||
3 | 3 | ||
4 | #include <mach/regs-gpio.h> | 4 | #include <mach/regs-gpio.h> |
5 | 5 | ||
6 | /* Different hardware revisions, passed in ATAG_REVISION by u-boot */ | ||
7 | #define GTA02v1_SYSTEM_REV 0x00000310 | ||
8 | #define GTA02v2_SYSTEM_REV 0x00000320 | ||
9 | #define GTA02v3_SYSTEM_REV 0x00000330 | ||
10 | #define GTA02v4_SYSTEM_REV 0x00000340 | ||
11 | #define GTA02v5_SYSTEM_REV 0x00000350 | ||
12 | /* since A7 is basically same as A6, we use A6 PCB ID */ | ||
13 | #define GTA02v6_SYSTEM_REV 0x00000360 | ||
14 | |||
15 | #define GTA02_GPIO_n3DL_GSM S3C2410_GPA(13) /* v1 + v2 + v3 only */ | ||
16 | |||
17 | #define GTA02_GPIO_PWR_LED1 S3C2410_GPB(0) | ||
18 | #define GTA02_GPIO_PWR_LED2 S3C2410_GPB(1) | ||
19 | #define GTA02_GPIO_AUX_LED S3C2410_GPB(2) | 6 | #define GTA02_GPIO_AUX_LED S3C2410_GPB(2) |
20 | #define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB(3) | ||
21 | #define GTA02_GPIO_MODEM_RST S3C2410_GPB(5) | ||
22 | #define GTA02_GPIO_BT_EN S3C2410_GPB(6) | ||
23 | #define GTA02_GPIO_MODEM_ON S3C2410_GPB(7) | ||
24 | #define GTA02_GPIO_EXTINT8 S3C2410_GPB(8) | ||
25 | #define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) | 7 | #define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) |
26 | |||
27 | #define GTA02_GPIO_PIO5 S3C2410_GPC(5) /* v3 + v4 only */ | ||
28 | |||
29 | #define GTA02v3_GPIO_nG1_CS S3C2410_GPD(12) /* v3 + v4 only */ | ||
30 | #define GTA02v3_GPIO_nG2_CS S3C2410_GPD(13) /* v3 + v4 only */ | ||
31 | #define GTA02v5_GPIO_HDQ S3C2410_GPD(14) /* v5 + */ | ||
32 | |||
33 | #define GTA02_GPIO_nG1_INT S3C2410_GPF(0) | ||
34 | #define GTA02_GPIO_IO1 S3C2410_GPF(1) | ||
35 | #define GTA02_GPIO_PIO_2 S3C2410_GPF(2) /* v2 + v3 + v4 only */ | ||
36 | #define GTA02_GPIO_JACK_INSERT S3C2410_GPF(4) | ||
37 | #define GTA02_GPIO_WLAN_GPIO1 S3C2410_GPF(5) /* v2 + v3 + v4 only */ | ||
38 | #define GTA02_GPIO_AUX_KEY S3C2410_GPF(6) | 8 | #define GTA02_GPIO_AUX_KEY S3C2410_GPF(6) |
39 | #define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7) | 9 | #define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7) |
40 | |||
41 | #define GTA02_GPIO_3D_IRQ S3C2410_GPG(4) | ||
42 | #define GTA02v2_GPIO_nG2_INT S3C2410_GPG(8) /* v2 + v3 + v4 only */ | ||
43 | #define GTA02v3_GPIO_nUSB_OC S3C2410_GPG(9) /* v3 + v4 only */ | ||
44 | #define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */ | ||
45 | #define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */ | ||
46 | |||
47 | #define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ | 10 | #define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ |
48 | #define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2) | ||
49 | #define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ | 11 | #define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ |
50 | #define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */ | ||
51 | #define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4) | ||
52 | #define GTA02_GPIO_3D_RESET S3C2410_GPJ(5) | ||
53 | #define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */ | ||
54 | #define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7) | ||
55 | #define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8) | ||
56 | #define GTA02_GPIO_KEEPACT S3C2410_GPJ(8) | ||
57 | #define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10) | ||
58 | #define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */ | ||
59 | #define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */ | ||
60 | 12 | ||
61 | #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 | ||
62 | #define GTA02_IRQ_MODEM IRQ_EINT1 | ||
63 | #define GTA02_IRQ_PIO_2 IRQ_EINT2 /* v2 + v3 + v4 only */ | ||
64 | #define GTA02_IRQ_nJACK_INSERT IRQ_EINT4 | ||
65 | #define GTA02_IRQ_WLAN_GPIO1 IRQ_EINT5 | ||
66 | #define GTA02_IRQ_AUX IRQ_EINT6 | ||
67 | #define GTA02_IRQ_nHOLD IRQ_EINT7 | ||
68 | #define GTA02_IRQ_PCF50633 IRQ_EINT9 | 13 | #define GTA02_IRQ_PCF50633 IRQ_EINT9 |
69 | #define GTA02_IRQ_3D IRQ_EINT12 | ||
70 | #define GTA02_IRQ_GSENSOR_2 IRQ_EINT16 /* v2 + v3 + v4 only */ | ||
71 | #define GTA02v3_IRQ_nUSB_OC IRQ_EINT17 /* v3 + v4 only */ | ||
72 | #define GTA02v3_IRQ_nUSB_FLT IRQ_EINT18 /* v3 + v4 only */ | ||
73 | #define GTA02v3_IRQ_nGSM_OC IRQ_EINT19 /* v3 + v4 only */ | ||
74 | |||
75 | /* returns 00 000 on GTA02 A5 and earlier, A6 returns 01 001 */ | ||
76 | #define GTA02_PCB_ID1_0 S3C2410_GPC(13) | ||
77 | #define GTA02_PCB_ID1_1 S3C2410_GPC(15) | ||
78 | #define GTA02_PCB_ID1_2 S3C2410_GPD(0) | ||
79 | #define GTA02_PCB_ID2_0 S3C2410_GPD(3) | ||
80 | #define GTA02_PCB_ID2_1 S3C2410_GPD(4) | ||
81 | |||
82 | int gta02_get_pcb_revision(void); | ||
83 | 14 | ||
84 | #endif /* _GTA02_H */ | 15 | #endif /* _GTA02_H */ |
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h index cac1ad6b582c..a11a638bd599 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | |||
@@ -302,7 +302,7 @@ | |||
302 | /* S3C2410: | 302 | /* S3C2410: |
303 | * Port G consists of 8 GPIO/IRQ/Special function | 303 | * Port G consists of 8 GPIO/IRQ/Special function |
304 | * | 304 | * |
305 | * GPGCON has 2 bits for each of the input pins on port F | 305 | * GPGCON has 2 bits for each of the input pins on port G |
306 | * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func | 306 | * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func |
307 | * | 307 | * |
308 | * pull up works like all other ports. | 308 | * pull up works like all other ports. |
@@ -366,7 +366,7 @@ | |||
366 | 366 | ||
367 | /* Port H consists of11 GPIO/serial/Misc pins | 367 | /* Port H consists of11 GPIO/serial/Misc pins |
368 | * | 368 | * |
369 | * GPGCON has 2 bits for each of the input pins on port F | 369 | * GPHCON has 2 bits for each of the input pins on port H |
370 | * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func | 370 | * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func |
371 | * | 371 | * |
372 | * pull up works like all other ports. | 372 | * pull up works like all other ports. |
@@ -427,6 +427,19 @@ | |||
427 | * for the 2412/2413 from the 2410/2440/2442 | 427 | * for the 2412/2413 from the 2410/2440/2442 |
428 | */ | 428 | */ |
429 | 429 | ||
430 | /* | ||
431 | * Port J consists of 13 GPIO/Camera pins. GPJCON has 2 bits | ||
432 | * for each of the pins on port J. | ||
433 | * 00 - input, 01 output, 10 - camera | ||
434 | * | ||
435 | * Pull up works like all other ports. | ||
436 | */ | ||
437 | |||
438 | #define S3C2413_GPJCON S3C2410_GPIOREG(0x80) | ||
439 | #define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) | ||
440 | #define S3C2413_GPJUP S3C2410_GPIOREG(0x88) | ||
441 | #define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) | ||
442 | |||
430 | /* S3C2443 and above */ | 443 | /* S3C2443 and above */ |
431 | #define S3C2440_GPJCON S3C2410_GPIOREG(0xD0) | 444 | #define S3C2440_GPJCON S3C2410_GPIOREG(0xD0) |
432 | #define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4) | 445 | #define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4) |
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h deleted file mode 100644 index 19575e061114..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-gpioj.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2440 GPIO J register definitions | ||
11 | */ | ||
12 | |||
13 | |||
14 | #ifndef __ASM_ARCH_REGS_GPIOJ_H | ||
15 | #define __ASM_ARCH_REGS_GPIOJ_H "gpioj" | ||
16 | |||
17 | /* Port J consists of 13 GPIO/Camera pins | ||
18 | * | ||
19 | * GPJCON has 2 bits for each of the input pins on port F | ||
20 | * 00 = 0 input, 1 output, 2 Camera | ||
21 | * | ||
22 | * pull up works like all other ports. | ||
23 | */ | ||
24 | |||
25 | #define S3C2413_GPJCON S3C2410_GPIOREG(0x80) | ||
26 | #define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) | ||
27 | #define S3C2413_GPJUP S3C2410_GPIOREG(0x88) | ||
28 | #define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) | ||
29 | |||
30 | #define S3C2440_GPJ0_OUTP (0x01 << 0) | ||
31 | #define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) | ||
32 | |||
33 | #define S3C2440_GPJ1_OUTP (0x01 << 2) | ||
34 | #define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) | ||
35 | |||
36 | #define S3C2440_GPJ2_OUTP (0x01 << 4) | ||
37 | #define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) | ||
38 | |||
39 | #define S3C2440_GPJ3_OUTP (0x01 << 6) | ||
40 | #define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) | ||
41 | |||
42 | #define S3C2440_GPJ4_OUTP (0x01 << 8) | ||
43 | #define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) | ||
44 | |||
45 | #define S3C2440_GPJ5_OUTP (0x01 << 10) | ||
46 | #define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) | ||
47 | |||
48 | #define S3C2440_GPJ6_OUTP (0x01 << 12) | ||
49 | #define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) | ||
50 | |||
51 | #define S3C2440_GPJ7_OUTP (0x01 << 14) | ||
52 | #define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) | ||
53 | |||
54 | #define S3C2440_GPJ8_OUTP (0x01 << 16) | ||
55 | #define S3C2440_GPJ8_CAMPCLK (0x02 << 16) | ||
56 | |||
57 | #define S3C2440_GPJ9_OUTP (0x01 << 18) | ||
58 | #define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) | ||
59 | |||
60 | #define S3C2440_GPJ10_OUTP (0x01 << 20) | ||
61 | #define S3C2440_GPJ10_CAMHREF (0x02 << 20) | ||
62 | |||
63 | #define S3C2440_GPJ11_OUTP (0x01 << 22) | ||
64 | #define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) | ||
65 | |||
66 | #define S3C2440_GPJ12_OUTP (0x01 << 24) | ||
67 | #define S3C2440_GPJ12_CAMRESET (0x02 << 24) | ||
68 | |||
69 | #endif /* __ASM_ARCH_REGS_GPIOJ_H */ | ||
70 | |||
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index 0f29f64a3eeb..92e1f93a6bca 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c | |||
@@ -71,7 +71,6 @@ | |||
71 | 71 | ||
72 | #include <mach/regs-irq.h> | 72 | #include <mach/regs-irq.h> |
73 | #include <mach/regs-gpio.h> | 73 | #include <mach/regs-gpio.h> |
74 | #include <mach/regs-gpioj.h> | ||
75 | #include <mach/fb.h> | 74 | #include <mach/fb.h> |
76 | 75 | ||
77 | #include <plat/usb-control.h> | 76 | #include <plat/usb-control.h> |
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c index f092b188ab70..bd6d2525debe 100644 --- a/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/arch/arm/mach-s3c24xx/mach-mini2440.c | |||
@@ -634,8 +634,8 @@ static void __init mini2440_init(void) | |||
634 | s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); | 634 | s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); |
635 | 635 | ||
636 | /* Turn the backlight early on */ | 636 | /* Turn the backlight early on */ |
637 | WARN_ON(gpio_request(S3C2410_GPG(4), "backlight")); | 637 | WARN_ON(gpio_request_one(S3C2410_GPG(4), GPIOF_OUT_INIT_HIGH, NULL)); |
638 | gpio_direction_output(S3C2410_GPG(4), 1); | 638 | gpio_free(S3C2410_GPG(4)); |
639 | 639 | ||
640 | /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ | 640 | /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ |
641 | s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); | 641 | s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); |
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c index b868dddcb836..678bbca2b5e5 100644 --- a/arch/arm/mach-s3c24xx/mach-qt2410.c +++ b/arch/arm/mach-s3c24xx/mach-qt2410.c | |||
@@ -47,7 +47,6 @@ | |||
47 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
48 | #include <asm/mach-types.h> | 48 | #include <asm/mach-types.h> |
49 | 49 | ||
50 | #include <mach/regs-gpio.h> | ||
51 | #include <mach/leds-gpio.h> | 50 | #include <mach/leds-gpio.h> |
52 | #include <mach/regs-lcd.h> | 51 | #include <mach/regs-lcd.h> |
53 | #include <plat/regs-serial.h> | 52 | #include <plat/regs-serial.h> |
@@ -325,8 +324,9 @@ static void __init qt2410_machine_init(void) | |||
325 | } | 324 | } |
326 | s3c24xx_fb_set_platdata(&qt2410_fb_info); | 325 | s3c24xx_fb_set_platdata(&qt2410_fb_info); |
327 | 326 | ||
328 | s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT); | 327 | /* set initial state of the LED GPIO */ |
329 | s3c2410_gpio_setpin(S3C2410_GPB(0), 1); | 328 | WARN_ON(gpio_request_one(S3C2410_GPB(0), GPIOF_OUT_INIT_HIGH, NULL)); |
329 | gpio_free(S3C2410_GPB(0)); | ||
330 | 330 | ||
331 | s3c24xx_udc_set_platdata(&qt2410_udc_cfg); | 331 | s3c24xx_udc_set_platdata(&qt2410_udc_cfg); |
332 | s3c_i2c0_set_platdata(NULL); | 332 | s3c_i2c0_set_platdata(NULL); |
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index a6762aae4727..7ee73f27f207 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c | |||
@@ -42,7 +42,6 @@ | |||
42 | #include <asm/mach-types.h> | 42 | #include <asm/mach-types.h> |
43 | 43 | ||
44 | #include <mach/regs-gpio.h> | 44 | #include <mach/regs-gpio.h> |
45 | #include <mach/regs-gpioj.h> | ||
46 | #include <mach/regs-lcd.h> | 45 | #include <mach/regs-lcd.h> |
47 | #include <mach/h1940.h> | 46 | #include <mach/h1940.h> |
48 | #include <mach/fb.h> | 47 | #include <mach/fb.h> |
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c index 03f706dd6009..949ae05e07c5 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2410.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c | |||
@@ -77,8 +77,10 @@ static void s3c2410_pm_prepare(void) | |||
77 | __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); | 77 | __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); |
78 | } | 78 | } |
79 | 79 | ||
80 | if ( machine_is_aml_m5900() ) | 80 | if (machine_is_aml_m5900()) { |
81 | s3c2410_gpio_setpin(S3C2410_GPF(2), 1); | 81 | gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL); |
82 | gpio_free(S3C2410_GPF(2)); | ||
83 | } | ||
82 | 84 | ||
83 | if (machine_is_rx1950()) { | 85 | if (machine_is_rx1950()) { |
84 | /* According to S3C2442 user's manual, page 7-17, | 86 | /* According to S3C2442 user's manual, page 7-17, |
@@ -103,8 +105,10 @@ static void s3c2410_pm_resume(void) | |||
103 | tmp &= S3C2410_GSTATUS2_OFFRESET; | 105 | tmp &= S3C2410_GSTATUS2_OFFRESET; |
104 | __raw_writel(tmp, S3C2410_GSTATUS2); | 106 | __raw_writel(tmp, S3C2410_GSTATUS2); |
105 | 107 | ||
106 | if ( machine_is_aml_m5900() ) | 108 | if (machine_is_aml_m5900()) { |
107 | s3c2410_gpio_setpin(S3C2410_GPF(2), 0); | 109 | gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL); |
110 | gpio_free(S3C2410_GPF(2)); | ||
111 | } | ||
108 | } | 112 | } |
109 | 113 | ||
110 | struct syscore_ops s3c2410_pm_syscore_ops = { | 114 | struct syscore_ops s3c2410_pm_syscore_ops = { |
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c index d04588506ec4..c60f67a75aff 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2412.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
27 | 27 | ||
28 | #include <mach/regs-power.h> | 28 | #include <mach/regs-power.h> |
29 | #include <mach/regs-gpioj.h> | ||
30 | #include <mach/regs-gpio.h> | 29 | #include <mach/regs-gpio.h> |
31 | #include <mach/regs-dsc.h> | 30 | #include <mach/regs-dsc.h> |
32 | 31 | ||
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index d4bc7f960bbb..6c5f4031ff0c 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <plat/regs-serial.h> | 39 | #include <plat/regs-serial.h> |
40 | #include <mach/regs-power.h> | 40 | #include <mach/regs-power.h> |
41 | #include <mach/regs-gpio.h> | 41 | #include <mach/regs-gpio.h> |
42 | #include <mach/regs-gpioj.h> | ||
43 | #include <mach/regs-dsc.h> | 42 | #include <mach/regs-dsc.h> |
44 | #include <plat/regs-spi.h> | 43 | #include <plat/regs-spi.h> |
45 | #include <mach/regs-s3c2412.h> | 44 | #include <mach/regs-s3c2412.h> |
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index 6f74118f60c6..b0b60a1154d6 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <mach/regs-clock.h> | 36 | #include <mach/regs-clock.h> |
37 | #include <plat/regs-serial.h> | 37 | #include <plat/regs-serial.h> |
38 | #include <mach/regs-gpio.h> | 38 | #include <mach/regs-gpio.h> |
39 | #include <mach/regs-gpioj.h> | ||
40 | #include <mach/regs-dsc.h> | 39 | #include <mach/regs-dsc.h> |
41 | 40 | ||
42 | #include <plat/s3c2410.h> | 41 | #include <plat/s3c2410.h> |
diff --git a/arch/arm/mach-s3c24xx/setup-ts.c b/arch/arm/mach-s3c24xx/setup-ts.c index ed2638663675..4e11affce3a8 100644 --- a/arch/arm/mach-s3c24xx/setup-ts.c +++ b/arch/arm/mach-s3c24xx/setup-ts.c | |||
@@ -16,7 +16,6 @@ | |||
16 | struct platform_device; /* don't need the contents */ | 16 | struct platform_device; /* don't need the contents */ |
17 | 17 | ||
18 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
19 | #include <mach/regs-gpio.h> | ||
20 | 19 | ||
21 | /** | 20 | /** |
22 | * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems | 21 | * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems |
@@ -27,8 +26,5 @@ struct platform_device; /* don't need the contents */ | |||
27 | */ | 26 | */ |
28 | void s3c24xx_ts_cfg_gpio(struct platform_device *dev) | 27 | void s3c24xx_ts_cfg_gpio(struct platform_device *dev) |
29 | { | 28 | { |
30 | s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON); | 29 | s3c_gpio_cfgpin_range(S3C2410_GPG(12), 4, S3C_GPIO_SFN(3)); |
31 | s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON); | ||
32 | s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON); | ||
33 | s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON); | ||
34 | } | 30 | } |
diff --git a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h deleted file mode 100644 index 9d0c43b4b687..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2009 Samsung Electronics Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S3C64XX_PLAT_SPI_CLKS_H | ||
12 | #define __S3C64XX_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S3C64XX_SPI_SRCCLK_PCLK 0 | ||
15 | #define S3C64XX_SPI_SRCCLK_SPIBUS 1 | ||
16 | #define S3C64XX_SPI_SRCCLK_48M 2 | ||
17 | |||
18 | #endif /* __S3C64XX_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index 2ee5dc069b37..9c4ce085f585 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -36,8 +36,6 @@ | |||
36 | #include <plat/devs.h> | 36 | #include <plat/devs.h> |
37 | #include <plat/irqs.h> | 37 | #include <plat/irqs.h> |
38 | 38 | ||
39 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
40 | |||
41 | static u8 s5p6440_pdma_peri[] = { | 39 | static u8 s5p6440_pdma_peri[] = { |
42 | DMACH_UART0_RX, | 40 | DMACH_UART0_RX, |
43 | DMACH_UART0_TX, | 41 | DMACH_UART0_TX, |
diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h deleted file mode 100644 index 170a20a9643a..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SPI_CLKS_H | ||
15 | #define __ASM_ARCH_SPI_CLKS_H __FILE__ | ||
16 | |||
17 | #define S5P64X0_SPI_SRCCLK_PCLK 0 | ||
18 | #define S5P64X0_SPI_SRCCLK_SCLK 1 | ||
19 | |||
20 | #endif /* __ASM_ARCH_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index afd8db2d5991..b1418409709e 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c | |||
@@ -33,8 +33,6 @@ | |||
33 | #include <mach/irqs.h> | 33 | #include <mach/irqs.h> |
34 | #include <mach/dma.h> | 34 | #include <mach/dma.h> |
35 | 35 | ||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
37 | |||
38 | static u8 pdma0_peri[] = { | 36 | static u8 pdma0_peri[] = { |
39 | DMACH_UART0_RX, | 37 | DMACH_UART0_RX, |
40 | DMACH_UART0_TX, | 38 | DMACH_UART0_TX, |
diff --git a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h deleted file mode 100644 index 65e426370bb2..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5PC100_PLAT_SPI_CLKS_H | ||
12 | #define __S5PC100_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5PC100_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5PC100_SPI_SRCCLK_48M 1 | ||
16 | #define S5PC100_SPI_SRCCLK_SPIBUS 2 | ||
17 | |||
18 | #endif /* __S5PC100_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h deleted file mode 100644 index 02acded5f73d..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5PV210_PLAT_SPI_CLKS_H | ||
12 | #define __S5PV210_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5PV210_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5PV210_SPI_SRCCLK_SCLK 1 | ||
16 | |||
17 | #endif /* __S5PV210_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 6a113a9bb87a..7c407393cd07 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
@@ -63,7 +63,6 @@ comment "Tegra board type" | |||
63 | config MACH_HARMONY | 63 | config MACH_HARMONY |
64 | bool "Harmony board" | 64 | bool "Harmony board" |
65 | depends on ARCH_TEGRA_2x_SOC | 65 | depends on ARCH_TEGRA_2x_SOC |
66 | select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC | ||
67 | help | 66 | help |
68 | Support for nVidia Harmony development platform | 67 | Support for nVidia Harmony development platform |
69 | 68 | ||
@@ -71,7 +70,6 @@ config MACH_KAEN | |||
71 | bool "Kaen board" | 70 | bool "Kaen board" |
72 | depends on ARCH_TEGRA_2x_SOC | 71 | depends on ARCH_TEGRA_2x_SOC |
73 | select MACH_SEABOARD | 72 | select MACH_SEABOARD |
74 | select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC | ||
75 | help | 73 | help |
76 | Support for the Kaen version of Seaboard | 74 | Support for the Kaen version of Seaboard |
77 | 75 | ||
@@ -84,7 +82,6 @@ config MACH_PAZ00 | |||
84 | config MACH_SEABOARD | 82 | config MACH_SEABOARD |
85 | bool "Seaboard board" | 83 | bool "Seaboard board" |
86 | depends on ARCH_TEGRA_2x_SOC | 84 | depends on ARCH_TEGRA_2x_SOC |
87 | select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC | ||
88 | help | 85 | help |
89 | Support for nVidia Seaboard development platform. It will | 86 | Support for nVidia Seaboard development platform. It will |
90 | also be included for some of the derivative boards that | 87 | also be included for some of the derivative boards that |
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 2eb4445ddb14..35253fdd1ba7 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile | |||
@@ -8,9 +8,9 @@ obj-y += timer.o | |||
8 | obj-y += fuse.o | 8 | obj-y += fuse.o |
9 | obj-y += pmc.o | 9 | obj-y += pmc.o |
10 | obj-y += flowctrl.o | 10 | obj-y += flowctrl.o |
11 | obj-y += powergate.o | ||
11 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 12 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
12 | obj-$(CONFIG_CPU_IDLE) += sleep.o | 13 | obj-$(CONFIG_CPU_IDLE) += sleep.o |
13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o | ||
14 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o | 14 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o |
15 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o | 15 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o |
16 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o | 16 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o |
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 9a82094092d7..8040345bd971 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot | |||
@@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 | |||
2 | params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 | 2 | params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 |
3 | initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 | 3 | initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 |
4 | 4 | ||
5 | dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb | 5 | dtb-$(CONFIG_MACH_HARMONY) += tegra20-harmony.dtb |
6 | dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb | 6 | dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb |
7 | dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb | 7 | dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb |
8 | dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb | 8 | dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb |
9 | dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb | 9 | dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb |
10 | dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb | 10 | dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb |
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index d83a8c0296f5..566e2f88899b 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c | |||
@@ -27,9 +27,9 @@ | |||
27 | #include <linux/cpuidle.h> | 27 | #include <linux/cpuidle.h> |
28 | #include <linux/hrtimer.h> | 28 | #include <linux/hrtimer.h> |
29 | 29 | ||
30 | #include <mach/iomap.h> | 30 | #include <asm/proc-fns.h> |
31 | 31 | ||
32 | extern void tegra_cpu_wfi(void); | 32 | #include <mach/iomap.h> |
33 | 33 | ||
34 | static int tegra_idle_enter_lp3(struct cpuidle_device *dev, | 34 | static int tegra_idle_enter_lp3(struct cpuidle_device *dev, |
35 | struct cpuidle_driver *drv, int index); | 35 | struct cpuidle_driver *drv, int index); |
@@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev, | |||
64 | 64 | ||
65 | enter = ktime_get(); | 65 | enter = ktime_get(); |
66 | 66 | ||
67 | tegra_cpu_wfi(); | 67 | cpu_do_idle(); |
68 | 68 | ||
69 | exit = ktime_sub(ktime_get(), enter); | 69 | exit = ktime_sub(ktime_get(), enter); |
70 | us = ktime_to_us(exit); | 70 | us = ktime_to_us(exit); |
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index 5b20197bae7f..d29b156a8011 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S | |||
@@ -62,32 +62,3 @@ | |||
62 | movw \reg, #:lower16:\val | 62 | movw \reg, #:lower16:\val |
63 | movt \reg, #:upper16:\val | 63 | movt \reg, #:upper16:\val |
64 | .endm | 64 | .endm |
65 | |||
66 | /* | ||
67 | * tegra_cpu_wfi | ||
68 | * | ||
69 | * puts current CPU in clock-gated wfi using the flow controller | ||
70 | * | ||
71 | * corrupts r0-r3 | ||
72 | * must be called with MMU on | ||
73 | */ | ||
74 | |||
75 | ENTRY(tegra_cpu_wfi) | ||
76 | cpu_id r0 | ||
77 | cpu_to_halt_reg r1, r0 | ||
78 | cpu_to_csr_reg r2, r0 | ||
79 | mov32 r0, TEGRA_FLOW_CTRL_VIRT | ||
80 | mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG | ||
81 | str r3, [r0, r2] @ clear event & interrupt status | ||
82 | mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME | ||
83 | str r3, [r0, r1] @ put flow controller in wait irq mode | ||
84 | dsb | ||
85 | wfi | ||
86 | mov r3, #0 | ||
87 | str r3, [r0, r1] @ clear flow controller halt status | ||
88 | mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG | ||
89 | str r3, [r0, r2] @ clear event & interrupt status | ||
90 | dsb | ||
91 | mov pc, lr | ||
92 | ENDPROC(tegra_cpu_wfi) | ||
93 | |||
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index ed8605f01155..6d87532871cd 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ | 6 | obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ |
7 | usb.o fb.o counter_32k.o | 7 | fb.o counter_32k.o |
8 | obj-m := | 8 | obj-m := |
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index cb16ade437cb..7fe626761e53 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -573,22 +573,25 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode); | |||
573 | 573 | ||
574 | static inline void omap_enable_channel_irq(int lch) | 574 | static inline void omap_enable_channel_irq(int lch) |
575 | { | 575 | { |
576 | u32 status; | ||
577 | |||
578 | /* Clear CSR */ | 576 | /* Clear CSR */ |
579 | if (cpu_class_is_omap1()) | 577 | if (cpu_class_is_omap1()) |
580 | status = p->dma_read(CSR, lch); | 578 | p->dma_read(CSR, lch); |
581 | else if (cpu_class_is_omap2()) | 579 | else |
582 | p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); | 580 | p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); |
583 | 581 | ||
584 | /* Enable some nice interrupts. */ | 582 | /* Enable some nice interrupts. */ |
585 | p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); | 583 | p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); |
586 | } | 584 | } |
587 | 585 | ||
588 | static void omap_disable_channel_irq(int lch) | 586 | static inline void omap_disable_channel_irq(int lch) |
589 | { | 587 | { |
590 | if (cpu_class_is_omap2()) | 588 | /* disable channel interrupts */ |
591 | p->dma_write(0, CICR, lch); | 589 | p->dma_write(0, CICR, lch); |
590 | /* Clear CSR */ | ||
591 | if (cpu_class_is_omap1()) | ||
592 | p->dma_read(CSR, lch); | ||
593 | else | ||
594 | p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); | ||
592 | } | 595 | } |
593 | 596 | ||
594 | void omap_enable_dma_irq(int lch, u16 bits) | 597 | void omap_enable_dma_irq(int lch, u16 bits) |
@@ -632,14 +635,14 @@ static inline void disable_lnk(int lch) | |||
632 | l = p->dma_read(CLNK_CTRL, lch); | 635 | l = p->dma_read(CLNK_CTRL, lch); |
633 | 636 | ||
634 | /* Disable interrupts */ | 637 | /* Disable interrupts */ |
638 | omap_disable_channel_irq(lch); | ||
639 | |||
635 | if (cpu_class_is_omap1()) { | 640 | if (cpu_class_is_omap1()) { |
636 | p->dma_write(0, CICR, lch); | ||
637 | /* Set the STOP_LNK bit */ | 641 | /* Set the STOP_LNK bit */ |
638 | l |= 1 << 14; | 642 | l |= 1 << 14; |
639 | } | 643 | } |
640 | 644 | ||
641 | if (cpu_class_is_omap2()) { | 645 | if (cpu_class_is_omap2()) { |
642 | omap_disable_channel_irq(lch); | ||
643 | /* Clear the ENABLE_LNK bit */ | 646 | /* Clear the ENABLE_LNK bit */ |
644 | l &= ~(1 << 15); | 647 | l &= ~(1 << 15); |
645 | } | 648 | } |
@@ -657,6 +660,9 @@ static inline void omap2_enable_irq_lch(int lch) | |||
657 | return; | 660 | return; |
658 | 661 | ||
659 | spin_lock_irqsave(&dma_chan_lock, flags); | 662 | spin_lock_irqsave(&dma_chan_lock, flags); |
663 | /* clear IRQ STATUS */ | ||
664 | p->dma_write(1 << lch, IRQSTATUS_L0, lch); | ||
665 | /* Enable interrupt */ | ||
660 | val = p->dma_read(IRQENABLE_L0, lch); | 666 | val = p->dma_read(IRQENABLE_L0, lch); |
661 | val |= 1 << lch; | 667 | val |= 1 << lch; |
662 | p->dma_write(val, IRQENABLE_L0, lch); | 668 | p->dma_write(val, IRQENABLE_L0, lch); |
@@ -672,9 +678,12 @@ static inline void omap2_disable_irq_lch(int lch) | |||
672 | return; | 678 | return; |
673 | 679 | ||
674 | spin_lock_irqsave(&dma_chan_lock, flags); | 680 | spin_lock_irqsave(&dma_chan_lock, flags); |
681 | /* Disable interrupt */ | ||
675 | val = p->dma_read(IRQENABLE_L0, lch); | 682 | val = p->dma_read(IRQENABLE_L0, lch); |
676 | val &= ~(1 << lch); | 683 | val &= ~(1 << lch); |
677 | p->dma_write(val, IRQENABLE_L0, lch); | 684 | p->dma_write(val, IRQENABLE_L0, lch); |
685 | /* clear IRQ STATUS */ | ||
686 | p->dma_write(1 << lch, IRQSTATUS_L0, lch); | ||
678 | spin_unlock_irqrestore(&dma_chan_lock, flags); | 687 | spin_unlock_irqrestore(&dma_chan_lock, flags); |
679 | } | 688 | } |
680 | 689 | ||
@@ -745,11 +754,8 @@ int omap_request_dma(int dev_id, const char *dev_name, | |||
745 | } | 754 | } |
746 | 755 | ||
747 | if (cpu_class_is_omap2()) { | 756 | if (cpu_class_is_omap2()) { |
748 | omap2_enable_irq_lch(free_ch); | ||
749 | omap_enable_channel_irq(free_ch); | 757 | omap_enable_channel_irq(free_ch); |
750 | /* Clear the CSR register and IRQ status register */ | 758 | omap2_enable_irq_lch(free_ch); |
751 | p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch); | ||
752 | p->dma_write(1 << free_ch, IRQSTATUS_L0, 0); | ||
753 | } | 759 | } |
754 | 760 | ||
755 | *dma_ch_out = free_ch; | 761 | *dma_ch_out = free_ch; |
@@ -768,27 +774,19 @@ void omap_free_dma(int lch) | |||
768 | return; | 774 | return; |
769 | } | 775 | } |
770 | 776 | ||
771 | if (cpu_class_is_omap1()) { | 777 | /* Disable interrupt for logical channel */ |
772 | /* Disable all DMA interrupts for the channel. */ | 778 | if (cpu_class_is_omap2()) |
773 | p->dma_write(0, CICR, lch); | ||
774 | /* Make sure the DMA transfer is stopped. */ | ||
775 | p->dma_write(0, CCR, lch); | ||
776 | } | ||
777 | |||
778 | if (cpu_class_is_omap2()) { | ||
779 | omap2_disable_irq_lch(lch); | 779 | omap2_disable_irq_lch(lch); |
780 | 780 | ||
781 | /* Clear the CSR register and IRQ status register */ | 781 | /* Disable all DMA interrupts for the channel. */ |
782 | p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); | 782 | omap_disable_channel_irq(lch); |
783 | p->dma_write(1 << lch, IRQSTATUS_L0, lch); | ||
784 | 783 | ||
785 | /* Disable all DMA interrupts for the channel. */ | 784 | /* Make sure the DMA transfer is stopped. */ |
786 | p->dma_write(0, CICR, lch); | 785 | p->dma_write(0, CCR, lch); |
787 | 786 | ||
788 | /* Make sure the DMA transfer is stopped. */ | 787 | /* Clear registers */ |
789 | p->dma_write(0, CCR, lch); | 788 | if (cpu_class_is_omap2()) |
790 | omap_clear_dma(lch); | 789 | omap_clear_dma(lch); |
791 | } | ||
792 | 790 | ||
793 | spin_lock_irqsave(&dma_chan_lock, flags); | 791 | spin_lock_irqsave(&dma_chan_lock, flags); |
794 | dma_chan[lch].dev_id = -1; | 792 | dma_chan[lch].dev_id = -1; |
@@ -943,8 +941,7 @@ void omap_stop_dma(int lch) | |||
943 | u32 l; | 941 | u32 l; |
944 | 942 | ||
945 | /* Disable all interrupts on the channel */ | 943 | /* Disable all interrupts on the channel */ |
946 | if (cpu_class_is_omap1()) | 944 | omap_disable_channel_irq(lch); |
947 | p->dma_write(0, CICR, lch); | ||
948 | 945 | ||
949 | l = p->dma_read(CCR, lch); | 946 | l = p->dma_read(CCR, lch); |
950 | if (IS_DMA_ERRATA(DMA_ERRATA_i541) && | 947 | if (IS_DMA_ERRATA(DMA_ERRATA_i541) && |
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h index 4814c5b65306..e62f20a5c0af 100644 --- a/arch/arm/plat-omap/include/plat/board.h +++ b/arch/arm/plat-omap/include/plat/board.h | |||
@@ -57,44 +57,6 @@ struct omap_camera_sensor_config { | |||
57 | int (*power_off)(void * data); | 57 | int (*power_off)(void * data); |
58 | }; | 58 | }; |
59 | 59 | ||
60 | struct omap_usb_config { | ||
61 | /* Configure drivers according to the connectors on your board: | ||
62 | * - "A" connector (rectagular) | ||
63 | * ... for host/OHCI use, set "register_host". | ||
64 | * - "B" connector (squarish) or "Mini-B" | ||
65 | * ... for device/gadget use, set "register_dev". | ||
66 | * - "Mini-AB" connector (very similar to Mini-B) | ||
67 | * ... for OTG use as device OR host, initialize "otg" | ||
68 | */ | ||
69 | unsigned register_host:1; | ||
70 | unsigned register_dev:1; | ||
71 | u8 otg; /* port number, 1-based: usb1 == 2 */ | ||
72 | |||
73 | u8 hmc_mode; | ||
74 | |||
75 | /* implicitly true if otg: host supports remote wakeup? */ | ||
76 | u8 rwc; | ||
77 | |||
78 | /* signaling pins used to talk to transceiver on usbN: | ||
79 | * 0 == usbN unused | ||
80 | * 2 == usb0-only, using internal transceiver | ||
81 | * 3 == 3 wire bidirectional | ||
82 | * 4 == 4 wire bidirectional | ||
83 | * 6 == 6 wire unidirectional (or TLL) | ||
84 | */ | ||
85 | u8 pins[3]; | ||
86 | |||
87 | struct platform_device *udc_device; | ||
88 | struct platform_device *ohci_device; | ||
89 | struct platform_device *otg_device; | ||
90 | |||
91 | u32 (*usb0_init)(unsigned nwires, unsigned is_device); | ||
92 | u32 (*usb1_init)(unsigned nwires); | ||
93 | u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); | ||
94 | |||
95 | int (*ocpi_enable)(void); | ||
96 | }; | ||
97 | |||
98 | struct omap_lcd_config { | 60 | struct omap_lcd_config { |
99 | char panel_name[16]; | 61 | char panel_name[16]; |
100 | char ctrl_name[16]; | 62 | char ctrl_name[16]; |
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index d0ef57c1d71b..656b9862279e 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
@@ -156,7 +156,6 @@ struct dpll_data { | |||
156 | u8 min_divider; | 156 | u8 min_divider; |
157 | u16 max_divider; | 157 | u16 max_divider; |
158 | u8 modes; | 158 | u8 modes; |
159 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | ||
160 | void __iomem *autoidle_reg; | 159 | void __iomem *autoidle_reg; |
161 | void __iomem *idlest_reg; | 160 | void __iomem *idlest_reg; |
162 | u32 autoidle_mask; | 161 | u32 autoidle_mask; |
@@ -167,7 +166,6 @@ struct dpll_data { | |||
167 | u8 auto_recal_bit; | 166 | u8 auto_recal_bit; |
168 | u8 recal_en_bit; | 167 | u8 recal_en_bit; |
169 | u8 recal_st_bit; | 168 | u8 recal_st_bit; |
170 | # endif | ||
171 | u8 flags; | 169 | u8 flags; |
172 | }; | 170 | }; |
173 | 171 | ||
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h index 9c604b390f9f..5927709b1908 100644 --- a/arch/arm/plat-omap/include/plat/dsp.h +++ b/arch/arm/plat-omap/include/plat/dsp.h | |||
@@ -18,6 +18,9 @@ struct omap_dsp_platform_data { | |||
18 | u32 (*dsp_cm_read)(s16 , u16); | 18 | u32 (*dsp_cm_read)(s16 , u16); |
19 | u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); | 19 | u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); |
20 | 20 | ||
21 | void (*set_bootaddr)(u32); | ||
22 | void (*set_bootmode)(u8); | ||
23 | |||
21 | phys_addr_t phys_mempool_base; | 24 | phys_addr_t phys_mempool_base; |
22 | phys_addr_t phys_mempool_size; | 25 | phys_addr_t phys_mempool_size; |
23 | }; | 26 | }; |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index c835b7194ff5..a8ecc53b3670 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -629,6 +629,8 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); | |||
629 | 629 | ||
630 | int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); | 630 | int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); |
631 | 631 | ||
632 | extern void __init omap_hwmod_init(void); | ||
633 | |||
632 | /* | 634 | /* |
633 | * Chip variant-specific hwmod init routines - XXX should be converted | 635 | * Chip variant-specific hwmod init routines - XXX should be converted |
634 | * to use initcalls once the initial boot ordering is straightened out | 636 | * to use initcalls once the initial boot ordering is straightened out |
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index 762eeb0626c1..548a4c8d63df 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
@@ -44,6 +44,8 @@ struct usbhs_omap_board_data { | |||
44 | struct regulator *regulator[OMAP3_HS_USB_PORTS]; | 44 | struct regulator *regulator[OMAP3_HS_USB_PORTS]; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | #ifdef CONFIG_ARCH_OMAP2PLUS | ||
48 | |||
47 | struct ehci_hcd_omap_platform_data { | 49 | struct ehci_hcd_omap_platform_data { |
48 | enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; | 50 | enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; |
49 | int reset_gpio_port[OMAP3_HS_USB_PORTS]; | 51 | int reset_gpio_port[OMAP3_HS_USB_PORTS]; |
@@ -64,26 +66,6 @@ struct usbhs_omap_platform_data { | |||
64 | }; | 66 | }; |
65 | /*-------------------------------------------------------------------------*/ | 67 | /*-------------------------------------------------------------------------*/ |
66 | 68 | ||
67 | #define OMAP1_OTG_BASE 0xfffb0400 | ||
68 | #define OMAP1_UDC_BASE 0xfffb4000 | ||
69 | #define OMAP1_OHCI_BASE 0xfffba000 | ||
70 | |||
71 | #define OMAP2_OHCI_BASE 0x4805e000 | ||
72 | #define OMAP2_UDC_BASE 0x4805e200 | ||
73 | #define OMAP2_OTG_BASE 0x4805e300 | ||
74 | |||
75 | #ifdef CONFIG_ARCH_OMAP1 | ||
76 | |||
77 | #define OTG_BASE OMAP1_OTG_BASE | ||
78 | #define UDC_BASE OMAP1_UDC_BASE | ||
79 | #define OMAP_OHCI_BASE OMAP1_OHCI_BASE | ||
80 | |||
81 | #else | ||
82 | |||
83 | #define OTG_BASE OMAP2_OTG_BASE | ||
84 | #define UDC_BASE OMAP2_UDC_BASE | ||
85 | #define OMAP_OHCI_BASE OMAP2_OHCI_BASE | ||
86 | |||
87 | struct omap_musb_board_data { | 69 | struct omap_musb_board_data { |
88 | u8 interface_type; | 70 | u8 interface_type; |
89 | u8 mode; | 71 | u8 mode; |
@@ -107,44 +89,6 @@ extern int omap4430_phy_init(struct device *dev); | |||
107 | extern int omap4430_phy_exit(struct device *dev); | 89 | extern int omap4430_phy_exit(struct device *dev); |
108 | extern int omap4430_phy_suspend(struct device *dev, int suspend); | 90 | extern int omap4430_phy_suspend(struct device *dev, int suspend); |
109 | 91 | ||
110 | /* | ||
111 | * NOTE: Please update omap USB drivers to use ioremap + read/write | ||
112 | */ | ||
113 | |||
114 | #define OMAP2_L4_IO_OFFSET 0xb2000000 | ||
115 | #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) | ||
116 | |||
117 | static inline u8 omap_readb(u32 pa) | ||
118 | { | ||
119 | return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); | ||
120 | } | ||
121 | |||
122 | static inline u16 omap_readw(u32 pa) | ||
123 | { | ||
124 | return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); | ||
125 | } | ||
126 | |||
127 | static inline u32 omap_readl(u32 pa) | ||
128 | { | ||
129 | return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); | ||
130 | } | ||
131 | |||
132 | static inline void omap_writeb(u8 v, u32 pa) | ||
133 | { | ||
134 | __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
135 | } | ||
136 | |||
137 | |||
138 | static inline void omap_writew(u16 v, u32 pa) | ||
139 | { | ||
140 | __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
141 | } | ||
142 | |||
143 | static inline void omap_writel(u32 v, u32 pa) | ||
144 | { | ||
145 | __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
146 | } | ||
147 | |||
148 | #endif | 92 | #endif |
149 | 93 | ||
150 | extern void am35x_musb_reset(void); | 94 | extern void am35x_musb_reset(void); |
@@ -153,142 +97,6 @@ extern void am35x_musb_clear_irq(void); | |||
153 | extern void am35x_set_mode(u8 musb_mode); | 97 | extern void am35x_set_mode(u8 musb_mode); |
154 | extern void ti81xx_musb_phy_power(u8 on); | 98 | extern void ti81xx_musb_phy_power(u8 on); |
155 | 99 | ||
156 | /* | ||
157 | * FIXME correct answer depends on hmc_mode, | ||
158 | * as does (on omap1) any nonzero value for config->otg port number | ||
159 | */ | ||
160 | #ifdef CONFIG_USB_GADGET_OMAP | ||
161 | #define is_usb0_device(config) 1 | ||
162 | #else | ||
163 | #define is_usb0_device(config) 0 | ||
164 | #endif | ||
165 | |||
166 | void omap_otg_init(struct omap_usb_config *config); | ||
167 | |||
168 | #if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE) | ||
169 | void omap1_usb_init(struct omap_usb_config *pdata); | ||
170 | #else | ||
171 | static inline void omap1_usb_init(struct omap_usb_config *pdata) | ||
172 | { | ||
173 | } | ||
174 | #endif | ||
175 | |||
176 | #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE) | ||
177 | void omap2_usbfs_init(struct omap_usb_config *pdata); | ||
178 | #else | ||
179 | static inline void omap2_usbfs_init(struct omap_usb_config *pdata) | ||
180 | { | ||
181 | } | ||
182 | #endif | ||
183 | |||
184 | /*-------------------------------------------------------------------------*/ | ||
185 | |||
186 | /* | ||
187 | * OTG and transceiver registers, for OMAPs starting with ARM926 | ||
188 | */ | ||
189 | #define OTG_REV (OTG_BASE + 0x00) | ||
190 | #define OTG_SYSCON_1 (OTG_BASE + 0x04) | ||
191 | # define USB2_TRX_MODE(w) (((w)>>24)&0x07) | ||
192 | # define USB1_TRX_MODE(w) (((w)>>20)&0x07) | ||
193 | # define USB0_TRX_MODE(w) (((w)>>16)&0x07) | ||
194 | # define OTG_IDLE_EN (1 << 15) | ||
195 | # define HST_IDLE_EN (1 << 14) | ||
196 | # define DEV_IDLE_EN (1 << 13) | ||
197 | # define OTG_RESET_DONE (1 << 2) | ||
198 | # define OTG_SOFT_RESET (1 << 1) | ||
199 | #define OTG_SYSCON_2 (OTG_BASE + 0x08) | ||
200 | # define OTG_EN (1 << 31) | ||
201 | # define USBX_SYNCHRO (1 << 30) | ||
202 | # define OTG_MST16 (1 << 29) | ||
203 | # define SRP_GPDATA (1 << 28) | ||
204 | # define SRP_GPDVBUS (1 << 27) | ||
205 | # define SRP_GPUVBUS(w) (((w)>>24)&0x07) | ||
206 | # define A_WAIT_VRISE(w) (((w)>>20)&0x07) | ||
207 | # define B_ASE_BRST(w) (((w)>>16)&0x07) | ||
208 | # define SRP_DPW (1 << 14) | ||
209 | # define SRP_DATA (1 << 13) | ||
210 | # define SRP_VBUS (1 << 12) | ||
211 | # define OTG_PADEN (1 << 10) | ||
212 | # define HMC_PADEN (1 << 9) | ||
213 | # define UHOST_EN (1 << 8) | ||
214 | # define HMC_TLLSPEED (1 << 7) | ||
215 | # define HMC_TLLATTACH (1 << 6) | ||
216 | # define OTG_HMC(w) (((w)>>0)&0x3f) | ||
217 | #define OTG_CTRL (OTG_BASE + 0x0c) | ||
218 | # define OTG_USB2_EN (1 << 29) | ||
219 | # define OTG_USB2_DP (1 << 28) | ||
220 | # define OTG_USB2_DM (1 << 27) | ||
221 | # define OTG_USB1_EN (1 << 26) | ||
222 | # define OTG_USB1_DP (1 << 25) | ||
223 | # define OTG_USB1_DM (1 << 24) | ||
224 | # define OTG_USB0_EN (1 << 23) | ||
225 | # define OTG_USB0_DP (1 << 22) | ||
226 | # define OTG_USB0_DM (1 << 21) | ||
227 | # define OTG_ASESSVLD (1 << 20) | ||
228 | # define OTG_BSESSEND (1 << 19) | ||
229 | # define OTG_BSESSVLD (1 << 18) | ||
230 | # define OTG_VBUSVLD (1 << 17) | ||
231 | # define OTG_ID (1 << 16) | ||
232 | # define OTG_DRIVER_SEL (1 << 15) | ||
233 | # define OTG_A_SETB_HNPEN (1 << 12) | ||
234 | # define OTG_A_BUSREQ (1 << 11) | ||
235 | # define OTG_B_HNPEN (1 << 9) | ||
236 | # define OTG_B_BUSREQ (1 << 8) | ||
237 | # define OTG_BUSDROP (1 << 7) | ||
238 | # define OTG_PULLDOWN (1 << 5) | ||
239 | # define OTG_PULLUP (1 << 4) | ||
240 | # define OTG_DRV_VBUS (1 << 3) | ||
241 | # define OTG_PD_VBUS (1 << 2) | ||
242 | # define OTG_PU_VBUS (1 << 1) | ||
243 | # define OTG_PU_ID (1 << 0) | ||
244 | #define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ | ||
245 | # define DRIVER_SWITCH (1 << 15) | ||
246 | # define A_VBUS_ERR (1 << 13) | ||
247 | # define A_REQ_TMROUT (1 << 12) | ||
248 | # define A_SRP_DETECT (1 << 11) | ||
249 | # define B_HNP_FAIL (1 << 10) | ||
250 | # define B_SRP_TMROUT (1 << 9) | ||
251 | # define B_SRP_DONE (1 << 8) | ||
252 | # define B_SRP_STARTED (1 << 7) | ||
253 | # define OPRT_CHG (1 << 0) | ||
254 | #define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ | ||
255 | // same bits as in IRQ_EN | ||
256 | #define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ | ||
257 | # define OTGVPD (1 << 14) | ||
258 | # define OTGVPU (1 << 13) | ||
259 | # define OTGPUID (1 << 12) | ||
260 | # define USB2VDR (1 << 10) | ||
261 | # define USB2PDEN (1 << 9) | ||
262 | # define USB2PUEN (1 << 8) | ||
263 | # define USB1VDR (1 << 6) | ||
264 | # define USB1PDEN (1 << 5) | ||
265 | # define USB1PUEN (1 << 4) | ||
266 | # define USB0VDR (1 << 2) | ||
267 | # define USB0PDEN (1 << 1) | ||
268 | # define USB0PUEN (1 << 0) | ||
269 | #define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ | ||
270 | #define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ | ||
271 | |||
272 | /*-------------------------------------------------------------------------*/ | ||
273 | |||
274 | /* OMAP1 */ | ||
275 | #define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) | ||
276 | # define CONF_USB2_UNI_R (1 << 8) | ||
277 | # define CONF_USB1_UNI_R (1 << 7) | ||
278 | # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) | ||
279 | # define CONF_USB0_ISOLATE_R (1 << 3) | ||
280 | # define CONF_USB_PWRDN_DM_R (1 << 2) | ||
281 | # define CONF_USB_PWRDN_DP_R (1 << 1) | ||
282 | |||
283 | /* OMAP2 */ | ||
284 | # define USB_UNIDIR 0x0 | ||
285 | # define USB_UNIDIR_TLL 0x1 | ||
286 | # define USB_BIDIR 0x2 | ||
287 | # define USB_BIDIR_TLL 0x3 | ||
288 | # define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2))) | ||
289 | # define USBT2TLL5PI (1 << 17) | ||
290 | # define USB0PUENACTLOI (1 << 16) | ||
291 | # define USBSTANDBYCTRL (1 << 15) | ||
292 | /* AM35x */ | 100 | /* AM35x */ |
293 | /* USB 2.0 PHY Control */ | 101 | /* USB 2.0 PHY Control */ |
294 | #define CONF2_PHY_GPIOMODE (1 << 23) | 102 | #define CONF2_PHY_GPIOMODE (1 << 23) |
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c deleted file mode 100644 index daa0327381b5..000000000000 --- a/arch/arm/plat-omap/usb.c +++ /dev/null | |||
@@ -1,145 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/usb.c -- platform level USB initialization | ||
3 | * | ||
4 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #undef DEBUG | ||
22 | |||
23 | #include <linux/module.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/io.h> | ||
28 | |||
29 | #include <plat/usb.h> | ||
30 | #include <plat/board.h> | ||
31 | |||
32 | #include <mach/hardware.h> | ||
33 | |||
34 | #ifdef CONFIG_ARCH_OMAP_OTG | ||
35 | |||
36 | void __init | ||
37 | omap_otg_init(struct omap_usb_config *config) | ||
38 | { | ||
39 | u32 syscon; | ||
40 | int alt_pingroup = 0; | ||
41 | |||
42 | /* NOTE: no bus or clock setup (yet?) */ | ||
43 | |||
44 | syscon = omap_readl(OTG_SYSCON_1) & 0xffff; | ||
45 | if (!(syscon & OTG_RESET_DONE)) | ||
46 | pr_debug("USB resets not complete?\n"); | ||
47 | |||
48 | //omap_writew(0, OTG_IRQ_EN); | ||
49 | |||
50 | /* pin muxing and transceiver pinouts */ | ||
51 | if (config->pins[0] > 2) /* alt pingroup 2 */ | ||
52 | alt_pingroup = 1; | ||
53 | syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); | ||
54 | syscon |= config->usb1_init(config->pins[1]); | ||
55 | syscon |= config->usb2_init(config->pins[2], alt_pingroup); | ||
56 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | ||
57 | omap_writel(syscon, OTG_SYSCON_1); | ||
58 | |||
59 | syscon = config->hmc_mode; | ||
60 | syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; | ||
61 | #ifdef CONFIG_USB_OTG | ||
62 | if (config->otg) | ||
63 | syscon |= OTG_EN; | ||
64 | #endif | ||
65 | if (cpu_class_is_omap1()) | ||
66 | pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", | ||
67 | omap_readl(USB_TRANSCEIVER_CTRL)); | ||
68 | pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); | ||
69 | omap_writel(syscon, OTG_SYSCON_2); | ||
70 | |||
71 | printk("USB: hmc %d", config->hmc_mode); | ||
72 | if (!alt_pingroup) | ||
73 | printk(", usb2 alt %d wires", config->pins[2]); | ||
74 | else if (config->pins[0]) | ||
75 | printk(", usb0 %d wires%s", config->pins[0], | ||
76 | is_usb0_device(config) ? " (dev)" : ""); | ||
77 | if (config->pins[1]) | ||
78 | printk(", usb1 %d wires", config->pins[1]); | ||
79 | if (!alt_pingroup && config->pins[2]) | ||
80 | printk(", usb2 %d wires", config->pins[2]); | ||
81 | if (config->otg) | ||
82 | printk(", Mini-AB on usb%d", config->otg - 1); | ||
83 | printk("\n"); | ||
84 | |||
85 | if (cpu_class_is_omap1()) { | ||
86 | u16 w; | ||
87 | |||
88 | /* leave USB clocks/controllers off until needed */ | ||
89 | w = omap_readw(ULPD_SOFT_REQ); | ||
90 | w &= ~SOFT_USB_CLK_REQ; | ||
91 | omap_writew(w, ULPD_SOFT_REQ); | ||
92 | |||
93 | w = omap_readw(ULPD_CLOCK_CTRL); | ||
94 | w &= ~USB_MCLK_EN; | ||
95 | w |= DIS_USB_PVCI_CLK; | ||
96 | omap_writew(w, ULPD_CLOCK_CTRL); | ||
97 | } | ||
98 | syscon = omap_readl(OTG_SYSCON_1); | ||
99 | syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; | ||
100 | |||
101 | #ifdef CONFIG_USB_GADGET_OMAP | ||
102 | if (config->otg || config->register_dev) { | ||
103 | struct platform_device *udc_device = config->udc_device; | ||
104 | int status; | ||
105 | |||
106 | syscon &= ~DEV_IDLE_EN; | ||
107 | udc_device->dev.platform_data = config; | ||
108 | status = platform_device_register(udc_device); | ||
109 | if (status) | ||
110 | pr_debug("can't register UDC device, %d\n", status); | ||
111 | } | ||
112 | #endif | ||
113 | |||
114 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
115 | if (config->otg || config->register_host) { | ||
116 | struct platform_device *ohci_device = config->ohci_device; | ||
117 | int status; | ||
118 | |||
119 | syscon &= ~HST_IDLE_EN; | ||
120 | ohci_device->dev.platform_data = config; | ||
121 | status = platform_device_register(ohci_device); | ||
122 | if (status) | ||
123 | pr_debug("can't register OHCI device, %d\n", status); | ||
124 | } | ||
125 | #endif | ||
126 | |||
127 | #ifdef CONFIG_USB_OTG | ||
128 | if (config->otg) { | ||
129 | struct platform_device *otg_device = config->otg_device; | ||
130 | int status; | ||
131 | |||
132 | syscon &= ~OTG_IDLE_EN; | ||
133 | otg_device->dev.platform_data = config; | ||
134 | status = platform_device_register(otg_device); | ||
135 | if (status) | ||
136 | pr_debug("can't register OTG device, %d\n", status); | ||
137 | } | ||
138 | #endif | ||
139 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | ||
140 | omap_writel(syscon, OTG_SYSCON_1); | ||
141 | } | ||
142 | |||
143 | #else | ||
144 | void omap_otg_init(struct omap_usb_config *config) {} | ||
145 | #endif | ||
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index a2fae4ea0936..ffc84acb7e97 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -491,14 +491,6 @@ config S5P_SLEEP | |||
491 | Internal config node to apply common S5P sleep management code. | 491 | Internal config node to apply common S5P sleep management code. |
492 | Can be selected by S5P and newer SoCs with similar sleep procedure. | 492 | Can be selected by S5P and newer SoCs with similar sleep procedure. |
493 | 493 | ||
494 | comment "Power Domain" | ||
495 | |||
496 | config SAMSUNG_PD | ||
497 | bool "Samsung Power Domain" | ||
498 | depends on PM_RUNTIME | ||
499 | help | ||
500 | Say Y here if you want to control Power Domain by Runtime PM. | ||
501 | |||
502 | config DEBUG_S3C_UART | 494 | config DEBUG_S3C_UART |
503 | depends on PLAT_SAMSUNG | 495 | depends on PLAT_SAMSUNG |
504 | int | 496 | int |
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 860b2db4db15..4bb58c2dc704 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
@@ -60,10 +60,6 @@ obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o | |||
60 | obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o | 60 | obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o |
61 | obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o | 61 | obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o |
62 | 62 | ||
63 | # PD support | ||
64 | |||
65 | obj-$(CONFIG_SAMSUNG_PD) += pd.o | ||
66 | |||
67 | # PWM support | 63 | # PWM support |
68 | 64 | ||
69 | obj-$(CONFIG_HAVE_PWM) += pwm.o | 65 | obj-$(CONFIG_HAVE_PWM) += pwm.o |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 61ca2f356c52..5da4b4f38f40 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -131,7 +131,6 @@ extern struct platform_device exynos4_device_ohci; | |||
131 | extern struct platform_device exynos4_device_pcm0; | 131 | extern struct platform_device exynos4_device_pcm0; |
132 | extern struct platform_device exynos4_device_pcm1; | 132 | extern struct platform_device exynos4_device_pcm1; |
133 | extern struct platform_device exynos4_device_pcm2; | 133 | extern struct platform_device exynos4_device_pcm2; |
134 | extern struct platform_device exynos4_device_pd[]; | ||
135 | extern struct platform_device exynos4_device_spdif; | 134 | extern struct platform_device exynos4_device_spdif; |
136 | 135 | ||
137 | extern struct platform_device exynos_device_drm; | 136 | extern struct platform_device exynos_device_drm; |
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 536002ff2ab8..b885322717a1 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h | |||
@@ -43,7 +43,6 @@ struct s3c_fb_pd_win { | |||
43 | * @setup_gpio: Setup the external GPIO pins to the right state to transfer | 43 | * @setup_gpio: Setup the external GPIO pins to the right state to transfer |
44 | * the data from the display system to the connected display | 44 | * the data from the display system to the connected display |
45 | * device. | 45 | * device. |
46 | * @default_win: default window layer number to be used for UI layer. | ||
47 | * @vidcon0: The base vidcon0 values to control the panel data format. | 46 | * @vidcon0: The base vidcon0 values to control the panel data format. |
48 | * @vidcon1: The base vidcon1 values to control the panel data output. | 47 | * @vidcon1: The base vidcon1 values to control the panel data output. |
49 | * @vtiming: Video timing when connected to a RGB type panel. | 48 | * @vtiming: Video timing when connected to a RGB type panel. |
diff --git a/arch/arm/plat-samsung/include/plat/pd.h b/arch/arm/plat-samsung/include/plat/pd.h deleted file mode 100644 index abb4bc32716a..000000000000 --- a/arch/arm/plat-samsung/include/plat/pd.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/pd.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_PLAT_SAMSUNG_PD_H | ||
12 | #define __ASM_PLAT_SAMSUNG_PD_H __FILE__ | ||
13 | |||
14 | struct samsung_pd_info { | ||
15 | int (*enable)(struct device *dev); | ||
16 | int (*disable)(struct device *dev); | ||
17 | void __iomem *base; | ||
18 | }; | ||
19 | |||
20 | enum exynos4_pd_block { | ||
21 | PD_MFC, | ||
22 | PD_G3D, | ||
23 | PD_LCD0, | ||
24 | PD_LCD1, | ||
25 | PD_TV, | ||
26 | PD_CAM, | ||
27 | PD_GPS | ||
28 | }; | ||
29 | |||
30 | #endif /* __ASM_PLAT_SAMSUNG_PD_H */ | ||
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c deleted file mode 100644 index 312b510d86b7..000000000000 --- a/arch/arm/plat-samsung/pd.c +++ /dev/null | |||
@@ -1,95 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/pd.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung Power domain support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/export.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/err.h> | ||
17 | #include <linux/pm_runtime.h> | ||
18 | |||
19 | #include <plat/pd.h> | ||
20 | |||
21 | static int samsung_pd_probe(struct platform_device *pdev) | ||
22 | { | ||
23 | struct samsung_pd_info *pdata = pdev->dev.platform_data; | ||
24 | struct device *dev = &pdev->dev; | ||
25 | |||
26 | if (!pdata) { | ||
27 | dev_err(dev, "no device data specified\n"); | ||
28 | return -ENOENT; | ||
29 | } | ||
30 | |||
31 | pm_runtime_set_active(dev); | ||
32 | pm_runtime_enable(dev); | ||
33 | |||
34 | dev_info(dev, "power domain registered\n"); | ||
35 | return 0; | ||
36 | } | ||
37 | |||
38 | static int __devexit samsung_pd_remove(struct platform_device *pdev) | ||
39 | { | ||
40 | struct device *dev = &pdev->dev; | ||
41 | |||
42 | pm_runtime_disable(dev); | ||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | static int samsung_pd_runtime_suspend(struct device *dev) | ||
47 | { | ||
48 | struct samsung_pd_info *pdata = dev->platform_data; | ||
49 | int ret = 0; | ||
50 | |||
51 | if (pdata->disable) | ||
52 | ret = pdata->disable(dev); | ||
53 | |||
54 | dev_dbg(dev, "suspended\n"); | ||
55 | return ret; | ||
56 | } | ||
57 | |||
58 | static int samsung_pd_runtime_resume(struct device *dev) | ||
59 | { | ||
60 | struct samsung_pd_info *pdata = dev->platform_data; | ||
61 | int ret = 0; | ||
62 | |||
63 | if (pdata->enable) | ||
64 | ret = pdata->enable(dev); | ||
65 | |||
66 | dev_dbg(dev, "resumed\n"); | ||
67 | return ret; | ||
68 | } | ||
69 | |||
70 | static const struct dev_pm_ops samsung_pd_pm_ops = { | ||
71 | .runtime_suspend = samsung_pd_runtime_suspend, | ||
72 | .runtime_resume = samsung_pd_runtime_resume, | ||
73 | }; | ||
74 | |||
75 | static struct platform_driver samsung_pd_driver = { | ||
76 | .driver = { | ||
77 | .name = "samsung-pd", | ||
78 | .owner = THIS_MODULE, | ||
79 | .pm = &samsung_pd_pm_ops, | ||
80 | }, | ||
81 | .probe = samsung_pd_probe, | ||
82 | .remove = __devexit_p(samsung_pd_remove), | ||
83 | }; | ||
84 | |||
85 | static int __init samsung_pd_init(void) | ||
86 | { | ||
87 | int ret; | ||
88 | |||
89 | ret = platform_driver_register(&samsung_pd_driver); | ||
90 | if (ret) | ||
91 | printk(KERN_ERR "%s: failed to add PD driver\n", __func__); | ||
92 | |||
93 | return ret; | ||
94 | } | ||
95 | arch_initcall(samsung_pd_init); | ||
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c index c559d8438c70..d3583050fb05 100644 --- a/arch/arm/plat-samsung/pwm.c +++ b/arch/arm/plat-samsung/pwm.c | |||
@@ -36,7 +36,6 @@ struct pwm_device { | |||
36 | unsigned int duty_ns; | 36 | unsigned int duty_ns; |
37 | 37 | ||
38 | unsigned char tcon_base; | 38 | unsigned char tcon_base; |
39 | unsigned char running; | ||
40 | unsigned char use_count; | 39 | unsigned char use_count; |
41 | unsigned char pwm_id; | 40 | unsigned char pwm_id; |
42 | }; | 41 | }; |
@@ -116,7 +115,6 @@ int pwm_enable(struct pwm_device *pwm) | |||
116 | 115 | ||
117 | local_irq_restore(flags); | 116 | local_irq_restore(flags); |
118 | 117 | ||
119 | pwm->running = 1; | ||
120 | return 0; | 118 | return 0; |
121 | } | 119 | } |
122 | 120 | ||
@@ -134,8 +132,6 @@ void pwm_disable(struct pwm_device *pwm) | |||
134 | __raw_writel(tcon, S3C2410_TCON); | 132 | __raw_writel(tcon, S3C2410_TCON); |
135 | 133 | ||
136 | local_irq_restore(flags); | 134 | local_irq_restore(flags); |
137 | |||
138 | pwm->running = 0; | ||
139 | } | 135 | } |
140 | 136 | ||
141 | EXPORT_SYMBOL(pwm_disable); | 137 | EXPORT_SYMBOL(pwm_disable); |