diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2011-06-22 10:41:30 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-07-07 04:01:12 -0400 |
commit | 3622360430e90d47a0d028dd5333a13771589331 (patch) | |
tree | a2a4df6d905d4157bf0e3cb5e5d6b3b5d481d0b6 /arch/arm | |
parent | 8dd7b817a1135940406a3271346a4a8e39e2b87c (diff) |
ARM: mxc: clean up imx-dma device registration
The patch follows the implementation of gpio-mxc device registration
to break the concentrated imx-dma device registration into soc
specific setup function. Then we can avoid the churn of "#ifdef"
and the cpu_is_mx checking on such a long list, which makes no sense,
considering more soc supports need to be added and we need to support
single image for multiple socs in the long run.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-imx/mm-imx21.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx25.c | 26 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx27.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx31.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx35.c | 44 | ||||
-rw-r--r-- | arch/arm/mach-mx5/mm.c | 49 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices.c | 16 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-dma.c | 232 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/devices-common.h | 6 |
9 files changed, 183 insertions, 220 deletions
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index f8fb41ce68d1..4f32a8a9aeed 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <mach/devices-common.h> | ||
25 | #include <asm/pgtable.h> | 26 | #include <asm/pgtable.h> |
26 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
27 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
@@ -82,4 +83,6 @@ void __init imx21_soc_init(void) | |||
82 | mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 83 | mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
83 | mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 84 | mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
84 | mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 85 | mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
86 | |||
87 | imx_add_imx_dma(); | ||
85 | } | 88 | } |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 1b6d583f750a..0c545207ce00 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
25 | 25 | ||
26 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/devices-common.h> | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <mach/mx25.h> | 29 | #include <mach/mx25.h> |
29 | #include <mach/iomux-v3.h> | 30 | #include <mach/iomux-v3.h> |
@@ -61,10 +62,35 @@ void __init mx25_init_irq(void) | |||
61 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); | 62 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); |
62 | } | 63 | } |
63 | 64 | ||
65 | static struct sdma_script_start_addrs imx25_sdma_script __initdata = { | ||
66 | .ap_2_ap_addr = 729, | ||
67 | .uart_2_mcu_addr = 904, | ||
68 | .per_2_app_addr = 1255, | ||
69 | .mcu_2_app_addr = 834, | ||
70 | .uartsh_2_mcu_addr = 1120, | ||
71 | .per_2_shp_addr = 1329, | ||
72 | .mcu_2_shp_addr = 1048, | ||
73 | .ata_2_mcu_addr = 1560, | ||
74 | .mcu_2_ata_addr = 1479, | ||
75 | .app_2_per_addr = 1189, | ||
76 | .app_2_mcu_addr = 770, | ||
77 | .shp_2_per_addr = 1407, | ||
78 | .shp_2_mcu_addr = 979, | ||
79 | }; | ||
80 | |||
81 | static struct sdma_platform_data imx25_sdma_pdata __initdata = { | ||
82 | .sdma_version = 2, | ||
83 | .cpu_name = "imx25", | ||
84 | .to_version = 1, | ||
85 | .script_addrs = &imx25_sdma_script, | ||
86 | }; | ||
87 | |||
64 | void __init imx25_soc_init(void) | 88 | void __init imx25_soc_init(void) |
65 | { | 89 | { |
66 | mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); | 90 | mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); |
67 | mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); | 91 | mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); |
68 | mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); | 92 | mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); |
69 | mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); | 93 | mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); |
94 | |||
95 | imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); | ||
70 | } | 96 | } |
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index acc6db45439e..944e02d3ccc2 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <mach/devices-common.h> | ||
25 | #include <asm/pgtable.h> | 26 | #include <asm/pgtable.h> |
26 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
27 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
@@ -82,4 +83,6 @@ void __init imx27_soc_init(void) | |||
82 | mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 83 | mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
83 | mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 84 | mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
84 | mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 85 | mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
86 | |||
87 | imx_add_imx_dma(); | ||
85 | } | 88 | } |
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index cb16ac661776..6af8519d3d6c 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
25 | 25 | ||
26 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/devices-common.h> | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <mach/iomux-v3.h> | 29 | #include <mach/iomux-v3.h> |
29 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
@@ -57,9 +58,32 @@ void __init mx31_init_irq(void) | |||
57 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); | 58 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); |
58 | } | 59 | } |
59 | 60 | ||
61 | static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { | ||
62 | .per_2_per_addr = 1677, | ||
63 | }; | ||
64 | |||
65 | static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { | ||
66 | .ap_2_ap_addr = 423, | ||
67 | .ap_2_bp_addr = 829, | ||
68 | .bp_2_ap_addr = 1029, | ||
69 | }; | ||
70 | |||
71 | static struct sdma_platform_data imx31_sdma_pdata __initdata = { | ||
72 | .sdma_version = 1, | ||
73 | .cpu_name = "imx31", | ||
74 | .script_addrs = &imx31_to2_sdma_script, | ||
75 | }; | ||
76 | |||
60 | void __init imx31_soc_init(void) | 77 | void __init imx31_soc_init(void) |
61 | { | 78 | { |
79 | int to_version = mx31_revision() >> 4; | ||
80 | |||
62 | mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); | 81 | mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); |
63 | mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); | 82 | mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); |
64 | mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); | 83 | mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); |
84 | |||
85 | imx31_sdma_pdata.to_version = to_version; | ||
86 | if (to_version == 1) | ||
87 | imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; | ||
88 | imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); | ||
65 | } | 89 | } |
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index 648bfca0163e..9891adb52458 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <asm/hardware/cache-l2x0.h> | 25 | #include <asm/hardware/cache-l2x0.h> |
26 | 26 | ||
27 | #include <mach/common.h> | 27 | #include <mach/common.h> |
28 | #include <mach/devices-common.h> | ||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | #include <mach/iomux-v3.h> | 30 | #include <mach/iomux-v3.h> |
30 | #include <mach/irqs.h> | 31 | #include <mach/irqs.h> |
@@ -54,9 +55,52 @@ void __init mx35_init_irq(void) | |||
54 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | 55 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); |
55 | } | 56 | } |
56 | 57 | ||
58 | static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { | ||
59 | .ap_2_ap_addr = 642, | ||
60 | .uart_2_mcu_addr = 817, | ||
61 | .mcu_2_app_addr = 747, | ||
62 | .uartsh_2_mcu_addr = 1183, | ||
63 | .per_2_shp_addr = 1033, | ||
64 | .mcu_2_shp_addr = 961, | ||
65 | .ata_2_mcu_addr = 1333, | ||
66 | .mcu_2_ata_addr = 1252, | ||
67 | .app_2_mcu_addr = 683, | ||
68 | .shp_2_per_addr = 1111, | ||
69 | .shp_2_mcu_addr = 892, | ||
70 | }; | ||
71 | |||
72 | static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { | ||
73 | .ap_2_ap_addr = 729, | ||
74 | .uart_2_mcu_addr = 904, | ||
75 | .per_2_app_addr = 1597, | ||
76 | .mcu_2_app_addr = 834, | ||
77 | .uartsh_2_mcu_addr = 1270, | ||
78 | .per_2_shp_addr = 1120, | ||
79 | .mcu_2_shp_addr = 1048, | ||
80 | .ata_2_mcu_addr = 1429, | ||
81 | .mcu_2_ata_addr = 1339, | ||
82 | .app_2_per_addr = 1531, | ||
83 | .app_2_mcu_addr = 770, | ||
84 | .shp_2_per_addr = 1198, | ||
85 | .shp_2_mcu_addr = 979, | ||
86 | }; | ||
87 | |||
88 | static struct sdma_platform_data imx35_sdma_pdata __initdata = { | ||
89 | .sdma_version = 2, | ||
90 | .cpu_name = "imx35", | ||
91 | .script_addrs = &imx35_to2_sdma_script, | ||
92 | }; | ||
93 | |||
57 | void __init imx35_soc_init(void) | 94 | void __init imx35_soc_init(void) |
58 | { | 95 | { |
96 | int to_version = mx35_revision() >> 4; | ||
97 | |||
59 | mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); | 98 | mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); |
60 | mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); | 99 | mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); |
61 | mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); | 100 | mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); |
101 | |||
102 | imx35_sdma_pdata.to_version = to_version; | ||
103 | if (to_version == 1) | ||
104 | imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; | ||
105 | imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); | ||
62 | } | 106 | } |
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index 800bb8b21081..aa848ea987e8 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c | |||
@@ -18,6 +18,7 @@ | |||
18 | 18 | ||
19 | #include <mach/hardware.h> | 19 | #include <mach/hardware.h> |
20 | #include <mach/common.h> | 20 | #include <mach/common.h> |
21 | #include <mach/devices-common.h> | ||
21 | #include <mach/iomux-v3.h> | 22 | #include <mach/iomux-v3.h> |
22 | 23 | ||
23 | /* | 24 | /* |
@@ -100,12 +101,58 @@ void __init mx53_init_irq(void) | |||
100 | tzic_init_irq(tzic_virt); | 101 | tzic_init_irq(tzic_virt); |
101 | } | 102 | } |
102 | 103 | ||
104 | static struct sdma_script_start_addrs imx51_sdma_script __initdata = { | ||
105 | .ap_2_ap_addr = 642, | ||
106 | .uart_2_mcu_addr = 817, | ||
107 | .mcu_2_app_addr = 747, | ||
108 | .mcu_2_shp_addr = 961, | ||
109 | .ata_2_mcu_addr = 1473, | ||
110 | .mcu_2_ata_addr = 1392, | ||
111 | .app_2_per_addr = 1033, | ||
112 | .app_2_mcu_addr = 683, | ||
113 | .shp_2_per_addr = 1251, | ||
114 | .shp_2_mcu_addr = 892, | ||
115 | }; | ||
116 | |||
117 | static struct sdma_platform_data imx51_sdma_pdata __initdata = { | ||
118 | .sdma_version = 2, | ||
119 | .cpu_name = "imx51", | ||
120 | .to_version = 1, | ||
121 | .script_addrs = &imx51_sdma_script, | ||
122 | }; | ||
123 | |||
124 | static struct sdma_script_start_addrs imx53_sdma_script __initdata = { | ||
125 | .ap_2_ap_addr = 642, | ||
126 | .app_2_mcu_addr = 683, | ||
127 | .mcu_2_app_addr = 747, | ||
128 | .uart_2_mcu_addr = 817, | ||
129 | .shp_2_mcu_addr = 891, | ||
130 | .mcu_2_shp_addr = 960, | ||
131 | .uartsh_2_mcu_addr = 1032, | ||
132 | .spdif_2_mcu_addr = 1100, | ||
133 | .mcu_2_spdif_addr = 1134, | ||
134 | .firi_2_mcu_addr = 1193, | ||
135 | .mcu_2_firi_addr = 1290, | ||
136 | }; | ||
137 | |||
138 | static struct sdma_platform_data imx53_sdma_pdata __initdata = { | ||
139 | .sdma_version = 2, | ||
140 | .cpu_name = "imx53", | ||
141 | .to_version = 1, | ||
142 | .script_addrs = &imx53_sdma_script, | ||
143 | }; | ||
144 | |||
103 | void __init imx51_soc_init(void) | 145 | void __init imx51_soc_init(void) |
104 | { | 146 | { |
147 | int to_version = mx51_revision() >> 4; | ||
148 | |||
105 | mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); | 149 | mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); |
106 | mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); | 150 | mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); |
107 | mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); | 151 | mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); |
108 | mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); | 152 | mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); |
153 | |||
154 | imx51_sdma_pdata.to_version = to_version; | ||
155 | imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); | ||
109 | } | 156 | } |
110 | 157 | ||
111 | void __init imx53_soc_init(void) | 158 | void __init imx53_soc_init(void) |
@@ -117,4 +164,6 @@ void __init imx53_soc_init(void) | |||
117 | mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); | 164 | mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); |
118 | mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); | 165 | mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); |
119 | mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); | 166 | mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); |
167 | |||
168 | imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); | ||
120 | } | 169 | } |
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index fb166b20f60f..0d6ed31bdbf2 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c | |||
@@ -95,8 +95,22 @@ struct device mxc_aips_bus = { | |||
95 | .parent = &platform_bus, | 95 | .parent = &platform_bus, |
96 | }; | 96 | }; |
97 | 97 | ||
98 | struct device mxc_ahb_bus = { | ||
99 | .init_name = "mxc_ahb", | ||
100 | .parent = &platform_bus, | ||
101 | }; | ||
102 | |||
98 | static int __init mxc_device_init(void) | 103 | static int __init mxc_device_init(void) |
99 | { | 104 | { |
100 | return device_register(&mxc_aips_bus); | 105 | int ret; |
106 | |||
107 | ret = device_register(&mxc_aips_bus); | ||
108 | if (IS_ERR_VALUE(ret)) | ||
109 | goto done; | ||
110 | |||
111 | ret = device_register(&mxc_ahb_bus); | ||
112 | |||
113 | done: | ||
114 | return ret; | ||
101 | } | 115 | } |
102 | core_initcall(mxc_device_init); | 116 | core_initcall(mxc_device_init); |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 27104f581700..2b0fdb23beb8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c | |||
@@ -6,235 +6,29 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/compiler.h> | ||
10 | #include <linux/err.h> | ||
11 | #include <linux/init.h> | ||
12 | |||
13 | #include <mach/hardware.h> | ||
14 | #include <mach/devices-common.h> | 9 | #include <mach/devices-common.h> |
15 | #include <mach/sdma.h> | ||
16 | |||
17 | struct imx_imx_sdma_data { | ||
18 | resource_size_t iobase; | ||
19 | resource_size_t irq; | ||
20 | struct sdma_platform_data pdata; | ||
21 | }; | ||
22 | |||
23 | #define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ | ||
24 | { \ | ||
25 | .iobase = soc ## _SDMA ## _BASE_ADDR, \ | ||
26 | .irq = soc ## _INT_SDMA, \ | ||
27 | .pdata = { \ | ||
28 | .sdma_version = _sdma_version, \ | ||
29 | .cpu_name = _cpu_name, \ | ||
30 | .to_version = _to_version, \ | ||
31 | }, \ | ||
32 | } | ||
33 | |||
34 | #ifdef CONFIG_SOC_IMX25 | ||
35 | struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = | ||
36 | imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1); | ||
37 | #endif /* ifdef CONFIG_SOC_IMX25 */ | ||
38 | 10 | ||
39 | #ifdef CONFIG_SOC_IMX31 | 11 | struct platform_device __init __maybe_unused *imx_add_imx_dma(void) |
40 | struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = | 12 | { |
41 | imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1); | 13 | return platform_device_register_resndata(&mxc_ahb_bus, |
42 | #endif /* ifdef CONFIG_SOC_IMX31 */ | 14 | "imx-dma", -1, NULL, 0, NULL, 0); |
43 | 15 | } | |
44 | #ifdef CONFIG_SOC_IMX35 | ||
45 | struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = | ||
46 | imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1); | ||
47 | #endif /* ifdef CONFIG_SOC_IMX35 */ | ||
48 | |||
49 | #ifdef CONFIG_SOC_IMX51 | ||
50 | struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = | ||
51 | imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); | ||
52 | #endif /* ifdef CONFIG_SOC_IMX51 */ | ||
53 | |||
54 | #ifdef CONFIG_SOC_IMX53 | ||
55 | struct imx_imx_sdma_data imx53_imx_sdma_data __initconst = | ||
56 | imx_imx_sdma_data_entry_single(MX53, 2, "imx53", 0); | ||
57 | #endif /* ifdef CONFIG_SOC_IMX53 */ | ||
58 | 16 | ||
59 | static struct platform_device __init __maybe_unused *imx_add_imx_sdma( | 17 | struct platform_device __init __maybe_unused *imx_add_imx_sdma( |
60 | const struct imx_imx_sdma_data *data) | 18 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata) |
61 | { | 19 | { |
62 | struct resource res[] = { | 20 | struct resource res[] = { |
63 | { | 21 | { |
64 | .start = data->iobase, | 22 | .start = iobase, |
65 | .end = data->iobase + SZ_16K - 1, | 23 | .end = iobase + SZ_16K - 1, |
66 | .flags = IORESOURCE_MEM, | 24 | .flags = IORESOURCE_MEM, |
67 | }, { | 25 | }, { |
68 | .start = data->irq, | 26 | .start = irq, |
69 | .end = data->irq, | 27 | .end = irq, |
70 | .flags = IORESOURCE_IRQ, | 28 | .flags = IORESOURCE_IRQ, |
71 | }, | 29 | }, |
72 | }; | 30 | }; |
73 | 31 | ||
74 | return imx_add_platform_device("imx-sdma", -1, | 32 | return platform_device_register_resndata(&mxc_ahb_bus, "imx-sdma", |
75 | res, ARRAY_SIZE(res), | 33 | -1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); |
76 | &data->pdata, sizeof(data->pdata)); | ||
77 | } | ||
78 | |||
79 | static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) | ||
80 | { | ||
81 | return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); | ||
82 | } | ||
83 | |||
84 | #ifdef CONFIG_ARCH_MX25 | ||
85 | static struct sdma_script_start_addrs addr_imx25 = { | ||
86 | .ap_2_ap_addr = 729, | ||
87 | .uart_2_mcu_addr = 904, | ||
88 | .per_2_app_addr = 1255, | ||
89 | .mcu_2_app_addr = 834, | ||
90 | .uartsh_2_mcu_addr = 1120, | ||
91 | .per_2_shp_addr = 1329, | ||
92 | .mcu_2_shp_addr = 1048, | ||
93 | .ata_2_mcu_addr = 1560, | ||
94 | .mcu_2_ata_addr = 1479, | ||
95 | .app_2_per_addr = 1189, | ||
96 | .app_2_mcu_addr = 770, | ||
97 | .shp_2_per_addr = 1407, | ||
98 | .shp_2_mcu_addr = 979, | ||
99 | }; | ||
100 | #endif | ||
101 | |||
102 | #ifdef CONFIG_SOC_IMX31 | ||
103 | static struct sdma_script_start_addrs addr_imx31_to1 = { | ||
104 | .per_2_per_addr = 1677, | ||
105 | }; | ||
106 | |||
107 | static struct sdma_script_start_addrs addr_imx31_to2 = { | ||
108 | .ap_2_ap_addr = 423, | ||
109 | .ap_2_bp_addr = 829, | ||
110 | .bp_2_ap_addr = 1029, | ||
111 | }; | ||
112 | #endif | ||
113 | |||
114 | #ifdef CONFIG_SOC_IMX35 | ||
115 | static struct sdma_script_start_addrs addr_imx35_to1 = { | ||
116 | .ap_2_ap_addr = 642, | ||
117 | .uart_2_mcu_addr = 817, | ||
118 | .mcu_2_app_addr = 747, | ||
119 | .uartsh_2_mcu_addr = 1183, | ||
120 | .per_2_shp_addr = 1033, | ||
121 | .mcu_2_shp_addr = 961, | ||
122 | .ata_2_mcu_addr = 1333, | ||
123 | .mcu_2_ata_addr = 1252, | ||
124 | .app_2_mcu_addr = 683, | ||
125 | .shp_2_per_addr = 1111, | ||
126 | .shp_2_mcu_addr = 892, | ||
127 | }; | ||
128 | |||
129 | static struct sdma_script_start_addrs addr_imx35_to2 = { | ||
130 | .ap_2_ap_addr = 729, | ||
131 | .uart_2_mcu_addr = 904, | ||
132 | .per_2_app_addr = 1597, | ||
133 | .mcu_2_app_addr = 834, | ||
134 | .uartsh_2_mcu_addr = 1270, | ||
135 | .per_2_shp_addr = 1120, | ||
136 | .mcu_2_shp_addr = 1048, | ||
137 | .ata_2_mcu_addr = 1429, | ||
138 | .mcu_2_ata_addr = 1339, | ||
139 | .app_2_per_addr = 1531, | ||
140 | .app_2_mcu_addr = 770, | ||
141 | .shp_2_per_addr = 1198, | ||
142 | .shp_2_mcu_addr = 979, | ||
143 | }; | ||
144 | #endif | ||
145 | |||
146 | #ifdef CONFIG_SOC_IMX51 | ||
147 | static struct sdma_script_start_addrs addr_imx51 = { | ||
148 | .ap_2_ap_addr = 642, | ||
149 | .uart_2_mcu_addr = 817, | ||
150 | .mcu_2_app_addr = 747, | ||
151 | .mcu_2_shp_addr = 961, | ||
152 | .ata_2_mcu_addr = 1473, | ||
153 | .mcu_2_ata_addr = 1392, | ||
154 | .app_2_per_addr = 1033, | ||
155 | .app_2_mcu_addr = 683, | ||
156 | .shp_2_per_addr = 1251, | ||
157 | .shp_2_mcu_addr = 892, | ||
158 | }; | ||
159 | #endif | ||
160 | |||
161 | #ifdef CONFIG_SOC_IMX53 | ||
162 | static struct sdma_script_start_addrs addr_imx53 = { | ||
163 | .ap_2_ap_addr = 642, | ||
164 | .app_2_mcu_addr = 683, | ||
165 | .mcu_2_app_addr = 747, | ||
166 | .uart_2_mcu_addr = 817, | ||
167 | .shp_2_mcu_addr = 891, | ||
168 | .mcu_2_shp_addr = 960, | ||
169 | .uartsh_2_mcu_addr = 1032, | ||
170 | .spdif_2_mcu_addr = 1100, | ||
171 | .mcu_2_spdif_addr = 1134, | ||
172 | .firi_2_mcu_addr = 1193, | ||
173 | .mcu_2_firi_addr = 1290, | ||
174 | }; | ||
175 | #endif | ||
176 | |||
177 | static int __init imxXX_add_imx_dma(void) | ||
178 | { | ||
179 | struct platform_device *ret; | ||
180 | |||
181 | #if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) | ||
182 | if (cpu_is_mx21() || cpu_is_mx27()) | ||
183 | ret = imx_add_imx_dma(); | ||
184 | else | ||
185 | #endif | ||
186 | |||
187 | #if defined(CONFIG_SOC_IMX25) | ||
188 | if (cpu_is_mx25()) { | ||
189 | imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25; | ||
190 | ret = imx_add_imx_sdma(&imx25_imx_sdma_data); | ||
191 | } else | ||
192 | #endif | ||
193 | |||
194 | #if defined(CONFIG_SOC_IMX31) | ||
195 | if (cpu_is_mx31()) { | ||
196 | int to_version = mx31_revision() >> 4; | ||
197 | imx31_imx_sdma_data.pdata.to_version = to_version; | ||
198 | if (to_version == 1) | ||
199 | imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to1; | ||
200 | else | ||
201 | imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to2; | ||
202 | ret = imx_add_imx_sdma(&imx31_imx_sdma_data); | ||
203 | } else | ||
204 | #endif | ||
205 | |||
206 | #if defined(CONFIG_SOC_IMX35) | ||
207 | if (cpu_is_mx35()) { | ||
208 | int to_version = mx35_revision() >> 4; | ||
209 | imx35_imx_sdma_data.pdata.to_version = to_version; | ||
210 | if (to_version == 1) | ||
211 | imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to1; | ||
212 | else | ||
213 | imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to2; | ||
214 | ret = imx_add_imx_sdma(&imx35_imx_sdma_data); | ||
215 | } else | ||
216 | #endif | ||
217 | |||
218 | #if defined(CONFIG_SOC_IMX51) | ||
219 | if (cpu_is_mx51()) { | ||
220 | int to_version = mx51_revision() >> 4; | ||
221 | imx51_imx_sdma_data.pdata.to_version = to_version; | ||
222 | imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51; | ||
223 | ret = imx_add_imx_sdma(&imx51_imx_sdma_data); | ||
224 | } else | ||
225 | #endif | ||
226 | |||
227 | #if defined(CONFIG_SOC_IMX53) | ||
228 | if (cpu_is_mx53()) { | ||
229 | imx53_imx_sdma_data.pdata.script_addrs = &addr_imx53; | ||
230 | ret = imx_add_imx_sdma(&imx53_imx_sdma_data); | ||
231 | } else | ||
232 | #endif | ||
233 | ret = ERR_PTR(-ENODEV); | ||
234 | |||
235 | if (IS_ERR(ret)) | ||
236 | return PTR_ERR(ret); | ||
237 | |||
238 | return 0; | ||
239 | } | 34 | } |
240 | arch_initcall(imxXX_add_imx_dma); | ||
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 03f626645374..bf93820ab61c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h | |||
@@ -9,8 +9,10 @@ | |||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <mach/sdma.h> | ||
12 | 13 | ||
13 | extern struct device mxc_aips_bus; | 14 | extern struct device mxc_aips_bus; |
15 | extern struct device mxc_ahb_bus; | ||
14 | 16 | ||
15 | struct platform_device *imx_add_platform_device_dmamask( | 17 | struct platform_device *imx_add_platform_device_dmamask( |
16 | const char *name, int id, | 18 | const char *name, int id, |
@@ -293,3 +295,7 @@ struct imx_spi_imx_data { | |||
293 | struct platform_device *__init imx_add_spi_imx( | 295 | struct platform_device *__init imx_add_spi_imx( |
294 | const struct imx_spi_imx_data *data, | 296 | const struct imx_spi_imx_data *data, |
295 | const struct spi_imx_master *pdata); | 297 | const struct spi_imx_master *pdata); |
298 | |||
299 | struct platform_device *imx_add_imx_dma(void); | ||
300 | struct platform_device *imx_add_imx_sdma( | ||
301 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); | ||