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authorPawel Moll <pawel.moll@arm.com>2012-07-11 12:07:25 -0400
committerPawel Moll <pawel.moll@arm.com>2012-07-13 06:48:29 -0400
commit1b820eaf42cde1df11d718909273611ee8e86ad0 (patch)
tree23696596fd8cc08cf47cee8b923b1677c3fed90f /arch/arm
parent375faa93cbd8062317d17ddfa6d8fea75f3bbf9b (diff)
ARM: vexpress: Config option for early printk console
Versatile Express platform can be used in different configurations, the console UART used by early printk may be located at different addresses in the address space. This patch makes it possible to select the base address of a PL011 UART to be used as a console output in the kernel configuration. The default behaviour is still the heuristic detecting memory map on Cortex-A core tiles. The zImage decompressor will use the same configuration values or print out nothing if DEBUG_LL is not enabled. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig.debug26
-rw-r--r--arch/arm/mach-vexpress/include/mach/debug-macro.S41
-rw-r--r--arch/arm/mach-vexpress/include/mach/uncompress.h14
3 files changed, 81 insertions, 0 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 01a134141216..a03b5a7059e2 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -310,6 +310,32 @@ choice
310 The uncompressor code port configuration is now handled 310 The uncompressor code port configuration is now handled
311 by CONFIG_S3C_LOWLEVEL_UART_PORT. 311 by CONFIG_S3C_LOWLEVEL_UART_PORT.
312 312
313 config DEBUG_VEXPRESS_UART0_DETECT
314 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
315 depends on ARCH_VEXPRESS && CPU_CP15_MMU
316 help
317 This option enables a simple heuristic which tries to determine
318 the motherboard's memory map variant (original or RS1) and then
319 choose the relevant UART0 base address.
320
321 Note that this will only work with standard A-class core tiles,
322 and may fail with non-standard SMM or custom software models.
323
324 config DEBUG_VEXPRESS_UART0_CA9
325 bool "Use PL011 UART0 at 0x10009000 (V2P-CA9 core tile)"
326 depends on ARCH_VEXPRESS
327 help
328 This option selects UART0 at 0x10009000. Except for custom models,
329 this applies only to the V2P-CA9 tile.
330
331 config DEBUG_VEXPRESS_UART0_RS1
332 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
333 depends on ARCH_VEXPRESS
334 help
335 This option selects UART0 at 0x1c090000. This applies to most
336 of the tiles using the RS1 memory map, including all new A-class
337 core tiles, FPGA-based SMMs and software models.
338
313 config DEBUG_LL_UART_NONE 339 config DEBUG_LL_UART_NONE
314 bool "No low-level debugging UART" 340 bool "No low-level debugging UART"
315 help 341 help
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S
index fa8224794e0b..9f509f55d078 100644
--- a/arch/arm/mach-vexpress/include/mach/debug-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S
@@ -18,6 +18,8 @@
18 18
19#define DEBUG_LL_VIRT_BASE 0xf8000000 19#define DEBUG_LL_VIRT_BASE 0xf8000000
20 20
21#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT)
22
21 .macro addruart,rp,rv,tmp 23 .macro addruart,rp,rv,tmp
22 24
23 @ Make an educated guess regarding the memory map: 25 @ Make an educated guess regarding the memory map:
@@ -41,3 +43,42 @@
41 .endm 43 .endm
42 44
43#include <asm/hardware/debug-pl01x.S> 45#include <asm/hardware/debug-pl01x.S>
46
47#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9)
48
49 .macro addruart,rp,rv,tmp
50 mov \rp, #DEBUG_LL_UART_OFFSET
51 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
52 orr \rp, \rp, #DEBUG_LL_PHYS_BASE
53 .endm
54
55#include <asm/hardware/debug-pl01x.S>
56
57#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1)
58
59 .macro addruart,rp,rv,tmp
60 mov \rp, #DEBUG_LL_UART_OFFSET_RS1
61 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
62 orr \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
63 .endm
64
65#include <asm/hardware/debug-pl01x.S>
66
67#else /* CONFIG_DEBUG_LL_UART_NONE */
68
69 .macro addruart, rp, rv, tmp
70 /* Safe dummy values */
71 mov \rp, #0
72 mov \rv, #DEBUG_LL_VIRT_BASE
73 .endm
74
75 .macro senduart,rd,rx
76 .endm
77
78 .macro waituart,rd,rx
79 .endm
80
81 .macro busyuart,rd,rx
82 .endm
83
84#endif
diff --git a/arch/arm/mach-vexpress/include/mach/uncompress.h b/arch/arm/mach-vexpress/include/mach/uncompress.h
index 7dab5596b868..1e472eb0bbdc 100644
--- a/arch/arm/mach-vexpress/include/mach/uncompress.h
+++ b/arch/arm/mach-vexpress/include/mach/uncompress.h
@@ -27,6 +27,7 @@
27 27
28static unsigned long get_uart_base(void) 28static unsigned long get_uart_base(void)
29{ 29{
30#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT)
30 unsigned long mpcore_periph; 31 unsigned long mpcore_periph;
31 32
32 /* 33 /*
@@ -42,6 +43,13 @@ static unsigned long get_uart_base(void)
42 return UART_BASE; 43 return UART_BASE;
43 else 44 else
44 return UART_BASE_RS1; 45 return UART_BASE_RS1;
46#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9)
47 return UART_BASE;
48#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1)
49 return UART_BASE_RS1;
50#else
51 return 0;
52#endif
45} 53}
46 54
47/* 55/*
@@ -51,6 +59,9 @@ static inline void putc(int c)
51{ 59{
52 unsigned long base = get_uart_base(); 60 unsigned long base = get_uart_base();
53 61
62 if (!base)
63 return;
64
54 while (AMBA_UART_FR(base) & (1 << 5)) 65 while (AMBA_UART_FR(base) & (1 << 5))
55 barrier(); 66 barrier();
56 67
@@ -61,6 +72,9 @@ static inline void flush(void)
61{ 72{
62 unsigned long base = get_uart_base(); 73 unsigned long base = get_uart_base();
63 74
75 if (!base)
76 return;
77
64 while (AMBA_UART_FR(base) & (1 << 3)) 78 while (AMBA_UART_FR(base) & (1 << 3))
65 barrier(); 79 barrier();
66} 80}