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authorWolfram Sang <w.sang@pengutronix.de>2012-10-08 06:46:32 -0400
committerWolfram Sang <w.sang@pengutronix.de>2012-10-08 06:46:32 -0400
commit102084d3d3969646cc89ea159e50898aeafc6649 (patch)
treee92924469b3fab3ee6fa29e338e0a3a4cb167e82 /arch/arm
parent6ccbe607132bd823abbad8d32b13af89161707da (diff)
parent979570e02981d4a8fc20b3cc8fd651856c98ee9d (diff)
Merge tag 'v3.6-rc7' into i2c-embedded/for-next
Linux 3.6-rc7 Needed to get updates from i2c-embedded/for-current into i2c-embedded/for-next
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig.debug6
-rw-r--r--arch/arm/Makefile4
-rw-r--r--arch/arm/boot/compressed/head.S5
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
-rw-r--r--arch/arm/include/asm/assembler.h8
-rw-r--r--arch/arm/include/asm/memory.h3
-rw-r--r--arch/arm/include/asm/tlb.h4
-rw-r--r--arch/arm/include/asm/uaccess.h58
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S1
-rw-r--r--arch/arm/kernel/hw_breakpoint.c62
-rw-r--r--arch/arm/kernel/smp_twd.c48
-rw-r--r--arch/arm/kernel/traps.c11
-rw-r--r--arch/arm/lib/delay.c1
-rw-r--r--arch/arm/lib/getuser.S23
-rw-r--r--arch/arm/lib/putuser.S6
-rw-r--r--arch/arm/mach-imx/clk-imx25.c8
-rw-r--r--arch/arm/mach-imx/clk-imx35.c6
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c3
-rw-r--r--arch/arm/mach-omap2/Kconfig3
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c14
-rw-r--r--arch/arm/mach-omap2/clockdomain2xxx_3xxx.c50
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h1
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c15
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c12
-rw-r--r--arch/arm/mach-omap2/timer.c7
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c4
-rw-r--r--arch/arm/mm/context.c7
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/mm/mm.h3
-rw-r--r--arch/arm/mm/mmu.c8
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h1
-rw-r--r--arch/arm/plat-omap/sram.c11
-rw-r--r--arch/arm/plat-samsung/clock.c10
41 files changed, 333 insertions, 100 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f15f82bf3a50..e968a52e4881 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -356,15 +356,15 @@ choice
356 is nothing connected to read from the DCC. 356 is nothing connected to read from the DCC.
357 357
358 config DEBUG_SEMIHOSTING 358 config DEBUG_SEMIHOSTING
359 bool "Kernel low-level debug output via semihosting I" 359 bool "Kernel low-level debug output via semihosting I/O"
360 help 360 help
361 Semihosting enables code running on an ARM target to use 361 Semihosting enables code running on an ARM target to use
362 the I/O facilities on a host debugger/emulator through a 362 the I/O facilities on a host debugger/emulator through a
363 simple SVC calls. The host debugger or emulator must have 363 simple SVC call. The host debugger or emulator must have
364 semihosting enabled for the special svc call to be trapped 364 semihosting enabled for the special svc call to be trapped
365 otherwise the kernel will crash. 365 otherwise the kernel will crash.
366 366
367 This is known to work with OpenOCD, as wellas 367 This is known to work with OpenOCD, as well as
368 ARM's Fast Models, or any other controlling environment 368 ARM's Fast Models, or any other controlling environment
369 that implements semihosting. 369 that implements semihosting.
370 370
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 30eae87ead6d..a051dfbdd7db 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -284,10 +284,10 @@ zImage Image xipImage bootpImage uImage: vmlinux
284zinstall uinstall install: vmlinux 284zinstall uinstall install: vmlinux
285 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ 285 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
286 286
287%.dtb: 287%.dtb: scripts
288 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 288 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
289 289
290dtbs: 290dtbs: scripts
291 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 291 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
292 292
293# We use MRPROPER_FILES and CLEAN_FILES now 293# We use MRPROPER_FILES and CLEAN_FILES now
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b8c64b80bafc..bc67cbff3944 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -653,16 +653,21 @@ __armv7_mmu_cache_on:
653 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs 653 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
654#endif 654#endif
655 mrc p15, 0, r0, c1, c0, 0 @ read control reg 655 mrc p15, 0, r0, c1, c0, 0 @ read control reg
656 bic r0, r0, #1 << 28 @ clear SCTLR.TRE
656 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 657 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
657 orr r0, r0, #0x003c @ write buffer 658 orr r0, r0, #0x003c @ write buffer
658#ifdef CONFIG_MMU 659#ifdef CONFIG_MMU
659#ifdef CONFIG_CPU_ENDIAN_BE8 660#ifdef CONFIG_CPU_ENDIAN_BE8
660 orr r0, r0, #1 << 25 @ big-endian page tables 661 orr r0, r0, #1 << 25 @ big-endian page tables
661#endif 662#endif
663 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
662 orrne r0, r0, #1 @ MMU enabled 664 orrne r0, r0, #1 @ MMU enabled
663 movne r1, #0xfffffffd @ domain 0 = client 665 movne r1, #0xfffffffd @ domain 0 = client
666 bic r6, r6, #1 << 31 @ 32-bit translation system
667 bic r6, r6, #3 << 0 @ use only ttbr0
664 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer 668 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
665 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control 669 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
670 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
666#endif 671#endif
667 mcr p15, 0, r0, c7, c5, 4 @ ISB 672 mcr p15, 0, r0, c7, c5, 4 @ ISB
668 mcr p15, 0, r0, c1, c0, 0 @ load control register 673 mcr p15, 0, r0, c1, c0, 0 @ load control register
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index edef4521cef4..d410581a5a85 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -105,6 +105,7 @@
105 #gpio-cells = <2>; 105 #gpio-cells = <2>;
106 gpio-controller; 106 gpio-controller;
107 interrupt-controller; 107 interrupt-controller;
108 #interrupt-cells = <2>;
108 }; 109 };
109 110
110 pioB: gpio@fffff600 { 111 pioB: gpio@fffff600 {
@@ -114,6 +115,7 @@
114 #gpio-cells = <2>; 115 #gpio-cells = <2>;
115 gpio-controller; 116 gpio-controller;
116 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
117 }; 119 };
118 120
119 pioC: gpio@fffff800 { 121 pioC: gpio@fffff800 {
@@ -123,6 +125,7 @@
123 #gpio-cells = <2>; 125 #gpio-cells = <2>;
124 gpio-controller; 126 gpio-controller;
125 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
126 }; 129 };
127 130
128 dbgu: serial@fffff200 { 131 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index e7942c7e3f67..3e6e5c1abbf3 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -96,6 +96,7 @@
96 #gpio-cells = <2>; 96 #gpio-cells = <2>;
97 gpio-controller; 97 gpio-controller;
98 interrupt-controller; 98 interrupt-controller;
99 #interrupt-cells = <2>;
99 }; 100 };
100 101
101 pioB: gpio@fffff400 { 102 pioB: gpio@fffff400 {
@@ -105,6 +106,7 @@
105 #gpio-cells = <2>; 106 #gpio-cells = <2>;
106 gpio-controller; 107 gpio-controller;
107 interrupt-controller; 108 interrupt-controller;
109 #interrupt-cells = <2>;
108 }; 110 };
109 111
110 pioC: gpio@fffff600 { 112 pioC: gpio@fffff600 {
@@ -114,6 +116,7 @@
114 #gpio-cells = <2>; 116 #gpio-cells = <2>;
115 gpio-controller; 117 gpio-controller;
116 interrupt-controller; 118 interrupt-controller;
119 #interrupt-cells = <2>;
117 }; 120 };
118 121
119 pioD: gpio@fffff800 { 122 pioD: gpio@fffff800 {
@@ -123,6 +126,7 @@
123 #gpio-cells = <2>; 126 #gpio-cells = <2>;
124 gpio-controller; 127 gpio-controller;
125 interrupt-controller; 128 interrupt-controller;
129 #interrupt-cells = <2>;
126 }; 130 };
127 131
128 pioE: gpio@fffffa00 { 132 pioE: gpio@fffffa00 {
@@ -132,6 +136,7 @@
132 #gpio-cells = <2>; 136 #gpio-cells = <2>;
133 gpio-controller; 137 gpio-controller;
134 interrupt-controller; 138 interrupt-controller;
139 #interrupt-cells = <2>;
135 }; 140 };
136 141
137 dbgu: serial@ffffee00 { 142 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ae4bb6da2878..3add030d61f8 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -115,6 +115,7 @@
115 #gpio-cells = <2>; 115 #gpio-cells = <2>;
116 gpio-controller; 116 gpio-controller;
117 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
118 }; 119 };
119 120
120 pioB: gpio@fffff400 { 121 pioB: gpio@fffff400 {
@@ -124,6 +125,7 @@
124 #gpio-cells = <2>; 125 #gpio-cells = <2>;
125 gpio-controller; 126 gpio-controller;
126 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
127 }; 129 };
128 130
129 pioC: gpio@fffff600 { 131 pioC: gpio@fffff600 {
@@ -133,6 +135,7 @@
133 #gpio-cells = <2>; 135 #gpio-cells = <2>;
134 gpio-controller; 136 gpio-controller;
135 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <2>;
136 }; 139 };
137 140
138 pioD: gpio@fffff800 { 141 pioD: gpio@fffff800 {
@@ -142,6 +145,7 @@
142 #gpio-cells = <2>; 145 #gpio-cells = <2>;
143 gpio-controller; 146 gpio-controller;
144 interrupt-controller; 147 interrupt-controller;
148 #interrupt-cells = <2>;
145 }; 149 };
146 150
147 pioE: gpio@fffffa00 { 151 pioE: gpio@fffffa00 {
@@ -151,6 +155,7 @@
151 #gpio-cells = <2>; 155 #gpio-cells = <2>;
152 gpio-controller; 156 gpio-controller;
153 interrupt-controller; 157 interrupt-controller;
158 #interrupt-cells = <2>;
154 }; 159 };
155 160
156 dbgu: serial@ffffee00 { 161 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 42e9fba44237..82508d68aa7e 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -109,6 +109,7 @@
109 #gpio-cells = <2>; 109 #gpio-cells = <2>;
110 gpio-controller; 110 gpio-controller;
111 interrupt-controller; 111 interrupt-controller;
112 #interrupt-cells = <2>;
112 }; 113 };
113 114
114 pioB: gpio@fffff600 { 115 pioB: gpio@fffff600 {
@@ -118,6 +119,7 @@
118 #gpio-cells = <2>; 119 #gpio-cells = <2>;
119 gpio-controller; 120 gpio-controller;
120 interrupt-controller; 121 interrupt-controller;
122 #interrupt-cells = <2>;
121 }; 123 };
122 124
123 pioC: gpio@fffff800 { 125 pioC: gpio@fffff800 {
@@ -127,6 +129,7 @@
127 #gpio-cells = <2>; 129 #gpio-cells = <2>;
128 gpio-controller; 130 gpio-controller;
129 interrupt-controller; 131 interrupt-controller;
132 #interrupt-cells = <2>;
130 }; 133 };
131 134
132 pioD: gpio@fffffa00 { 135 pioD: gpio@fffffa00 {
@@ -136,6 +139,7 @@
136 #gpio-cells = <2>; 139 #gpio-cells = <2>;
137 gpio-controller; 140 gpio-controller;
138 interrupt-controller; 141 interrupt-controller;
142 #interrupt-cells = <2>;
139 }; 143 };
140 144
141 dbgu: serial@fffff200 { 145 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index e05afbc3e047..03fc136421c5 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -118,6 +118,7 @@
118 #gpio-cells = <2>; 118 #gpio-cells = <2>;
119 gpio-controller; 119 gpio-controller;
120 interrupt-controller; 120 interrupt-controller;
121 #interrupt-cells = <2>;
121 }; 122 };
122 123
123 pioB: gpio@fffff600 { 124 pioB: gpio@fffff600 {
@@ -127,6 +128,7 @@
127 #gpio-cells = <2>; 128 #gpio-cells = <2>;
128 gpio-controller; 129 gpio-controller;
129 interrupt-controller; 130 interrupt-controller;
131 #interrupt-cells = <2>;
130 }; 132 };
131 133
132 pioC: gpio@fffff800 { 134 pioC: gpio@fffff800 {
@@ -136,6 +138,7 @@
136 #gpio-cells = <2>; 138 #gpio-cells = <2>;
137 gpio-controller; 139 gpio-controller;
138 interrupt-controller; 140 interrupt-controller;
141 #interrupt-cells = <2>;
139 }; 142 };
140 143
141 pioD: gpio@fffffa00 { 144 pioD: gpio@fffffa00 {
@@ -145,6 +148,7 @@
145 #gpio-cells = <2>; 148 #gpio-cells = <2>;
146 gpio-controller; 149 gpio-controller;
147 interrupt-controller; 150 interrupt-controller;
151 #interrupt-cells = <2>;
148 }; 152 };
149 153
150 dbgu: serial@fffff200 { 154 dbgu: serial@fffff200 {
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 03fb93621d0d..5c8b3bf4d825 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -320,4 +320,12 @@
320 .size \name , . - \name 320 .size \name , . - \name
321 .endm 321 .endm
322 322
323 .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
324#ifndef CONFIG_CPU_USE_DOMAINS
325 adds \tmp, \addr, #\size - 1
326 sbcccs \tmp, \tmp, \limit
327 bcs \bad
328#endif
329 .endm
330
323#endif /* __ASM_ASSEMBLER_H__ */ 331#endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index e965f1b560f1..5f6ddcc56452 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -187,6 +187,7 @@ static inline unsigned long __phys_to_virt(unsigned long x)
187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) 187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
188#endif 188#endif
189#endif 189#endif
190#endif /* __ASSEMBLY__ */
190 191
191#ifndef PHYS_OFFSET 192#ifndef PHYS_OFFSET
192#ifdef PLAT_PHYS_OFFSET 193#ifdef PLAT_PHYS_OFFSET
@@ -196,6 +197,8 @@ static inline unsigned long __phys_to_virt(unsigned long x)
196#endif 197#endif
197#endif 198#endif
198 199
200#ifndef __ASSEMBLY__
201
199/* 202/*
200 * PFNs are used to describe any physical page; this means 203 * PFNs are used to describe any physical page; this means
201 * PFN 0 == physical address 0. 204 * PFN 0 == physical address 0.
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 314d4664eae7..99a19512ee26 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -199,6 +199,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
199{ 199{
200 pgtable_page_dtor(pte); 200 pgtable_page_dtor(pte);
201 201
202#ifdef CONFIG_ARM_LPAE
203 tlb_add_flush(tlb, addr);
204#else
202 /* 205 /*
203 * With the classic ARM MMU, a pte page has two corresponding pmd 206 * With the classic ARM MMU, a pte page has two corresponding pmd
204 * entries, each covering 1MB. 207 * entries, each covering 1MB.
@@ -206,6 +209,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
206 addr &= PMD_MASK; 209 addr &= PMD_MASK;
207 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE); 210 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
208 tlb_add_flush(tlb, addr + SZ_1M); 211 tlb_add_flush(tlb, addr + SZ_1M);
212#endif
209 213
210 tlb_remove_page(tlb, pte); 214 tlb_remove_page(tlb, pte);
211} 215}
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 479a6352e0b5..77bd79f2ffdb 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -101,28 +101,39 @@ extern int __get_user_1(void *);
101extern int __get_user_2(void *); 101extern int __get_user_2(void *);
102extern int __get_user_4(void *); 102extern int __get_user_4(void *);
103 103
104#define __get_user_x(__r2,__p,__e,__s,__i...) \ 104#define __GUP_CLOBBER_1 "lr", "cc"
105#ifdef CONFIG_CPU_USE_DOMAINS
106#define __GUP_CLOBBER_2 "ip", "lr", "cc"
107#else
108#define __GUP_CLOBBER_2 "lr", "cc"
109#endif
110#define __GUP_CLOBBER_4 "lr", "cc"
111
112#define __get_user_x(__r2,__p,__e,__l,__s) \
105 __asm__ __volatile__ ( \ 113 __asm__ __volatile__ ( \
106 __asmeq("%0", "r0") __asmeq("%1", "r2") \ 114 __asmeq("%0", "r0") __asmeq("%1", "r2") \
115 __asmeq("%3", "r1") \
107 "bl __get_user_" #__s \ 116 "bl __get_user_" #__s \
108 : "=&r" (__e), "=r" (__r2) \ 117 : "=&r" (__e), "=r" (__r2) \
109 : "0" (__p) \ 118 : "0" (__p), "r" (__l) \
110 : __i, "cc") 119 : __GUP_CLOBBER_##__s)
111 120
112#define get_user(x,p) \ 121#define __get_user_check(x,p) \
113 ({ \ 122 ({ \
123 unsigned long __limit = current_thread_info()->addr_limit - 1; \
114 register const typeof(*(p)) __user *__p asm("r0") = (p);\ 124 register const typeof(*(p)) __user *__p asm("r0") = (p);\
115 register unsigned long __r2 asm("r2"); \ 125 register unsigned long __r2 asm("r2"); \
126 register unsigned long __l asm("r1") = __limit; \
116 register int __e asm("r0"); \ 127 register int __e asm("r0"); \
117 switch (sizeof(*(__p))) { \ 128 switch (sizeof(*(__p))) { \
118 case 1: \ 129 case 1: \
119 __get_user_x(__r2, __p, __e, 1, "lr"); \ 130 __get_user_x(__r2, __p, __e, __l, 1); \
120 break; \ 131 break; \
121 case 2: \ 132 case 2: \
122 __get_user_x(__r2, __p, __e, 2, "r3", "lr"); \ 133 __get_user_x(__r2, __p, __e, __l, 2); \
123 break; \ 134 break; \
124 case 4: \ 135 case 4: \
125 __get_user_x(__r2, __p, __e, 4, "lr"); \ 136 __get_user_x(__r2, __p, __e, __l, 4); \
126 break; \ 137 break; \
127 default: __e = __get_user_bad(); break; \ 138 default: __e = __get_user_bad(); break; \
128 } \ 139 } \
@@ -130,42 +141,57 @@ extern int __get_user_4(void *);
130 __e; \ 141 __e; \
131 }) 142 })
132 143
144#define get_user(x,p) \
145 ({ \
146 might_fault(); \
147 __get_user_check(x,p); \
148 })
149
133extern int __put_user_1(void *, unsigned int); 150extern int __put_user_1(void *, unsigned int);
134extern int __put_user_2(void *, unsigned int); 151extern int __put_user_2(void *, unsigned int);
135extern int __put_user_4(void *, unsigned int); 152extern int __put_user_4(void *, unsigned int);
136extern int __put_user_8(void *, unsigned long long); 153extern int __put_user_8(void *, unsigned long long);
137 154
138#define __put_user_x(__r2,__p,__e,__s) \ 155#define __put_user_x(__r2,__p,__e,__l,__s) \
139 __asm__ __volatile__ ( \ 156 __asm__ __volatile__ ( \
140 __asmeq("%0", "r0") __asmeq("%2", "r2") \ 157 __asmeq("%0", "r0") __asmeq("%2", "r2") \
158 __asmeq("%3", "r1") \
141 "bl __put_user_" #__s \ 159 "bl __put_user_" #__s \
142 : "=&r" (__e) \ 160 : "=&r" (__e) \
143 : "0" (__p), "r" (__r2) \ 161 : "0" (__p), "r" (__r2), "r" (__l) \
144 : "ip", "lr", "cc") 162 : "ip", "lr", "cc")
145 163
146#define put_user(x,p) \ 164#define __put_user_check(x,p) \
147 ({ \ 165 ({ \
166 unsigned long __limit = current_thread_info()->addr_limit - 1; \
148 register const typeof(*(p)) __r2 asm("r2") = (x); \ 167 register const typeof(*(p)) __r2 asm("r2") = (x); \
149 register const typeof(*(p)) __user *__p asm("r0") = (p);\ 168 register const typeof(*(p)) __user *__p asm("r0") = (p);\
169 register unsigned long __l asm("r1") = __limit; \
150 register int __e asm("r0"); \ 170 register int __e asm("r0"); \
151 switch (sizeof(*(__p))) { \ 171 switch (sizeof(*(__p))) { \
152 case 1: \ 172 case 1: \
153 __put_user_x(__r2, __p, __e, 1); \ 173 __put_user_x(__r2, __p, __e, __l, 1); \
154 break; \ 174 break; \
155 case 2: \ 175 case 2: \
156 __put_user_x(__r2, __p, __e, 2); \ 176 __put_user_x(__r2, __p, __e, __l, 2); \
157 break; \ 177 break; \
158 case 4: \ 178 case 4: \
159 __put_user_x(__r2, __p, __e, 4); \ 179 __put_user_x(__r2, __p, __e, __l, 4); \
160 break; \ 180 break; \
161 case 8: \ 181 case 8: \
162 __put_user_x(__r2, __p, __e, 8); \ 182 __put_user_x(__r2, __p, __e, __l, 8); \
163 break; \ 183 break; \
164 default: __e = __put_user_bad(); break; \ 184 default: __e = __put_user_bad(); break; \
165 } \ 185 } \
166 __e; \ 186 __e; \
167 }) 187 })
168 188
189#define put_user(x,p) \
190 ({ \
191 might_fault(); \
192 __put_user_check(x,p); \
193 })
194
169#else /* CONFIG_MMU */ 195#else /* CONFIG_MMU */
170 196
171/* 197/*
@@ -219,6 +245,7 @@ do { \
219 unsigned long __gu_addr = (unsigned long)(ptr); \ 245 unsigned long __gu_addr = (unsigned long)(ptr); \
220 unsigned long __gu_val; \ 246 unsigned long __gu_val; \
221 __chk_user_ptr(ptr); \ 247 __chk_user_ptr(ptr); \
248 might_fault(); \
222 switch (sizeof(*(ptr))) { \ 249 switch (sizeof(*(ptr))) { \
223 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \ 250 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \
224 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \ 251 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \
@@ -300,6 +327,7 @@ do { \
300 unsigned long __pu_addr = (unsigned long)(ptr); \ 327 unsigned long __pu_addr = (unsigned long)(ptr); \
301 __typeof__(*(ptr)) __pu_val = (x); \ 328 __typeof__(*(ptr)) __pu_val = (x); \
302 __chk_user_ptr(ptr); \ 329 __chk_user_ptr(ptr); \
330 might_fault(); \
303 switch (sizeof(*(ptr))) { \ 331 switch (sizeof(*(ptr))) { \
304 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \ 332 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \
305 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \ 333 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 0cab47d4a83f..2fde5fd1acce 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -404,6 +404,7 @@
404#define __NR_setns (__NR_SYSCALL_BASE+375) 404#define __NR_setns (__NR_SYSCALL_BASE+375)
405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376) 405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377) 406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
407 /* 378 for kcmp */
407 408
408/* 409/*
409 * The following SWIs are ARM private. 410 * The following SWIs are ARM private.
@@ -483,6 +484,7 @@
483 */ 484 */
484#define __IGNORE_fadvise64_64 485#define __IGNORE_fadvise64_64
485#define __IGNORE_migrate_pages 486#define __IGNORE_migrate_pages
487#define __IGNORE_kcmp
486 488
487#endif /* __KERNEL__ */ 489#endif /* __KERNEL__ */
488#endif /* __ASM_ARM_UNISTD_H */ 490#endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 463ff4a0ec8a..e337879595e5 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -387,6 +387,7 @@
387/* 375 */ CALL(sys_setns) 387/* 375 */ CALL(sys_setns)
388 CALL(sys_process_vm_readv) 388 CALL(sys_process_vm_readv)
389 CALL(sys_process_vm_writev) 389 CALL(sys_process_vm_writev)
390 CALL(sys_ni_syscall) /* reserved for sys_kcmp */
390#ifndef syscalls_counted 391#ifndef syscalls_counted
391.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 392.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
392#define syscalls_counted 393#define syscalls_counted
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index ba386bd94107..281bf3301241 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -159,6 +159,12 @@ static int debug_arch_supported(void)
159 arch >= ARM_DEBUG_ARCH_V7_1; 159 arch >= ARM_DEBUG_ARCH_V7_1;
160} 160}
161 161
162/* Can we determine the watchpoint access type from the fsr? */
163static int debug_exception_updates_fsr(void)
164{
165 return 0;
166}
167
162/* Determine number of WRP registers available. */ 168/* Determine number of WRP registers available. */
163static int get_num_wrp_resources(void) 169static int get_num_wrp_resources(void)
164{ 170{
@@ -604,13 +610,14 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
604 /* Aligned */ 610 /* Aligned */
605 break; 611 break;
606 case 1: 612 case 1:
607 /* Allow single byte watchpoint. */
608 if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
609 break;
610 case 2: 613 case 2:
611 /* Allow halfword watchpoints and breakpoints. */ 614 /* Allow halfword watchpoints and breakpoints. */
612 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2) 615 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2)
613 break; 616 break;
617 case 3:
618 /* Allow single byte watchpoint. */
619 if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
620 break;
614 default: 621 default:
615 ret = -EINVAL; 622 ret = -EINVAL;
616 goto out; 623 goto out;
@@ -619,18 +626,35 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
619 info->address &= ~alignment_mask; 626 info->address &= ~alignment_mask;
620 info->ctrl.len <<= offset; 627 info->ctrl.len <<= offset;
621 628
622 /* 629 if (!bp->overflow_handler) {
623 * Currently we rely on an overflow handler to take 630 /*
624 * care of single-stepping the breakpoint when it fires. 631 * Mismatch breakpoints are required for single-stepping
625 * In the case of userspace breakpoints on a core with V7 debug, 632 * breakpoints.
626 * we can use the mismatch feature as a poor-man's hardware 633 */
627 * single-step, but this only works for per-task breakpoints. 634 if (!core_has_mismatch_brps())
628 */ 635 return -EINVAL;
629 if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) || 636
630 !core_has_mismatch_brps() || !bp->hw.bp_target)) { 637 /* We don't allow mismatch breakpoints in kernel space. */
631 pr_warning("overflow handler required but none found\n"); 638 if (arch_check_bp_in_kernelspace(bp))
632 ret = -EINVAL; 639 return -EPERM;
640
641 /*
642 * Per-cpu breakpoints are not supported by our stepping
643 * mechanism.
644 */
645 if (!bp->hw.bp_target)
646 return -EINVAL;
647
648 /*
649 * We only support specific access types if the fsr
650 * reports them.
651 */
652 if (!debug_exception_updates_fsr() &&
653 (info->ctrl.type == ARM_BREAKPOINT_LOAD ||
654 info->ctrl.type == ARM_BREAKPOINT_STORE))
655 return -EINVAL;
633 } 656 }
657
634out: 658out:
635 return ret; 659 return ret;
636} 660}
@@ -706,10 +730,12 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
706 goto unlock; 730 goto unlock;
707 731
708 /* Check that the access type matches. */ 732 /* Check that the access type matches. */
709 access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W : 733 if (debug_exception_updates_fsr()) {
710 HW_BREAKPOINT_R; 734 access = (fsr & ARM_FSR_ACCESS_MASK) ?
711 if (!(access & hw_breakpoint_type(wp))) 735 HW_BREAKPOINT_W : HW_BREAKPOINT_R;
712 goto unlock; 736 if (!(access & hw_breakpoint_type(wp)))
737 goto unlock;
738 }
713 739
714 /* We have a winner. */ 740 /* We have a winner. */
715 info->trigger = addr; 741 info->trigger = addr;
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fef42b21cecb..e1f906989bb8 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -11,7 +11,6 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/cpufreq.h>
15#include <linux/delay.h> 14#include <linux/delay.h>
16#include <linux/device.h> 15#include <linux/device.h>
17#include <linux/err.h> 16#include <linux/err.h>
@@ -96,7 +95,52 @@ static void twd_timer_stop(struct clock_event_device *clk)
96 disable_percpu_irq(clk->irq); 95 disable_percpu_irq(clk->irq);
97} 96}
98 97
99#ifdef CONFIG_CPU_FREQ 98#ifdef CONFIG_COMMON_CLK
99
100/*
101 * Updates clockevent frequency when the cpu frequency changes.
102 * Called on the cpu that is changing frequency with interrupts disabled.
103 */
104static void twd_update_frequency(void *new_rate)
105{
106 twd_timer_rate = *((unsigned long *) new_rate);
107
108 clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
109}
110
111static int twd_rate_change(struct notifier_block *nb,
112 unsigned long flags, void *data)
113{
114 struct clk_notifier_data *cnd = data;
115
116 /*
117 * The twd clock events must be reprogrammed to account for the new
118 * frequency. The timer is local to a cpu, so cross-call to the
119 * changing cpu.
120 */
121 if (flags == POST_RATE_CHANGE)
122 smp_call_function(twd_update_frequency,
123 (void *)&cnd->new_rate, 1);
124
125 return NOTIFY_OK;
126}
127
128static struct notifier_block twd_clk_nb = {
129 .notifier_call = twd_rate_change,
130};
131
132static int twd_clk_init(void)
133{
134 if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
135 return clk_notifier_register(twd_clk, &twd_clk_nb);
136
137 return 0;
138}
139core_initcall(twd_clk_init);
140
141#elif defined (CONFIG_CPU_FREQ)
142
143#include <linux/cpufreq.h>
100 144
101/* 145/*
102 * Updates clockevent frequency when the cpu frequency changes. 146 * Updates clockevent frequency when the cpu frequency changes.
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f7945218b8c6..b0179b89a04c 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -420,20 +420,23 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
420#endif 420#endif
421 instr = *(u32 *) pc; 421 instr = *(u32 *) pc;
422 } else if (thumb_mode(regs)) { 422 } else if (thumb_mode(regs)) {
423 get_user(instr, (u16 __user *)pc); 423 if (get_user(instr, (u16 __user *)pc))
424 goto die_sig;
424 if (is_wide_instruction(instr)) { 425 if (is_wide_instruction(instr)) {
425 unsigned int instr2; 426 unsigned int instr2;
426 get_user(instr2, (u16 __user *)pc+1); 427 if (get_user(instr2, (u16 __user *)pc+1))
428 goto die_sig;
427 instr <<= 16; 429 instr <<= 16;
428 instr |= instr2; 430 instr |= instr2;
429 } 431 }
430 } else { 432 } else if (get_user(instr, (u32 __user *)pc)) {
431 get_user(instr, (u32 __user *)pc); 433 goto die_sig;
432 } 434 }
433 435
434 if (call_undef_hook(regs, instr) == 0) 436 if (call_undef_hook(regs, instr) == 0)
435 return; 437 return;
436 438
439die_sig:
437#ifdef CONFIG_DEBUG_USER 440#ifdef CONFIG_DEBUG_USER
438 if (user_debug & UDBG_UNDEFINED) { 441 if (user_debug & UDBG_UNDEFINED) {
439 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", 442 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index d6dacc69254e..395d5fbb8fa2 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -59,6 +59,7 @@ void __init init_current_timer_delay(unsigned long freq)
59{ 59{
60 pr_info("Switching to timer-based delay loop\n"); 60 pr_info("Switching to timer-based delay loop\n");
61 lpj_fine = freq / HZ; 61 lpj_fine = freq / HZ;
62 loops_per_jiffy = lpj_fine;
62 arm_delay_ops.delay = __timer_delay; 63 arm_delay_ops.delay = __timer_delay;
63 arm_delay_ops.const_udelay = __timer_const_udelay; 64 arm_delay_ops.const_udelay = __timer_const_udelay;
64 arm_delay_ops.udelay = __timer_udelay; 65 arm_delay_ops.udelay = __timer_udelay;
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 11093a7c3e32..9b06bb41fca6 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -16,8 +16,9 @@
16 * __get_user_X 16 * __get_user_X
17 * 17 *
18 * Inputs: r0 contains the address 18 * Inputs: r0 contains the address
19 * r1 contains the address limit, which must be preserved
19 * Outputs: r0 is the error code 20 * Outputs: r0 is the error code
20 * r2, r3 contains the zero-extended value 21 * r2 contains the zero-extended value
21 * lr corrupted 22 * lr corrupted
22 * 23 *
23 * No other registers must be altered. (see <asm/uaccess.h> 24 * No other registers must be altered. (see <asm/uaccess.h>
@@ -27,33 +28,39 @@
27 * Note also that it is intended that __get_user_bad is not global. 28 * Note also that it is intended that __get_user_bad is not global.
28 */ 29 */
29#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/assembler.h>
30#include <asm/errno.h> 32#include <asm/errno.h>
31#include <asm/domain.h> 33#include <asm/domain.h>
32 34
33ENTRY(__get_user_1) 35ENTRY(__get_user_1)
36 check_uaccess r0, 1, r1, r2, __get_user_bad
341: TUSER(ldrb) r2, [r0] 371: TUSER(ldrb) r2, [r0]
35 mov r0, #0 38 mov r0, #0
36 mov pc, lr 39 mov pc, lr
37ENDPROC(__get_user_1) 40ENDPROC(__get_user_1)
38 41
39ENTRY(__get_user_2) 42ENTRY(__get_user_2)
40#ifdef CONFIG_THUMB2_KERNEL 43 check_uaccess r0, 2, r1, r2, __get_user_bad
412: TUSER(ldrb) r2, [r0] 44#ifdef CONFIG_CPU_USE_DOMAINS
423: TUSER(ldrb) r3, [r0, #1] 45rb .req ip
462: ldrbt r2, [r0], #1
473: ldrbt rb, [r0], #0
43#else 48#else
442: TUSER(ldrb) r2, [r0], #1 49rb .req r0
453: TUSER(ldrb) r3, [r0] 502: ldrb r2, [r0]
513: ldrb rb, [r0, #1]
46#endif 52#endif
47#ifndef __ARMEB__ 53#ifndef __ARMEB__
48 orr r2, r2, r3, lsl #8 54 orr r2, r2, rb, lsl #8
49#else 55#else
50 orr r2, r3, r2, lsl #8 56 orr r2, rb, r2, lsl #8
51#endif 57#endif
52 mov r0, #0 58 mov r0, #0
53 mov pc, lr 59 mov pc, lr
54ENDPROC(__get_user_2) 60ENDPROC(__get_user_2)
55 61
56ENTRY(__get_user_4) 62ENTRY(__get_user_4)
63 check_uaccess r0, 4, r1, r2, __get_user_bad
574: TUSER(ldr) r2, [r0] 644: TUSER(ldr) r2, [r0]
58 mov r0, #0 65 mov r0, #0
59 mov pc, lr 66 mov pc, lr
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index 7db25990c589..3d73dcb959b0 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -16,6 +16,7 @@
16 * __put_user_X 16 * __put_user_X
17 * 17 *
18 * Inputs: r0 contains the address 18 * Inputs: r0 contains the address
19 * r1 contains the address limit, which must be preserved
19 * r2, r3 contains the value 20 * r2, r3 contains the value
20 * Outputs: r0 is the error code 21 * Outputs: r0 is the error code
21 * lr corrupted 22 * lr corrupted
@@ -27,16 +28,19 @@
27 * Note also that it is intended that __put_user_bad is not global. 28 * Note also that it is intended that __put_user_bad is not global.
28 */ 29 */
29#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/assembler.h>
30#include <asm/errno.h> 32#include <asm/errno.h>
31#include <asm/domain.h> 33#include <asm/domain.h>
32 34
33ENTRY(__put_user_1) 35ENTRY(__put_user_1)
36 check_uaccess r0, 1, r1, ip, __put_user_bad
341: TUSER(strb) r2, [r0] 371: TUSER(strb) r2, [r0]
35 mov r0, #0 38 mov r0, #0
36 mov pc, lr 39 mov pc, lr
37ENDPROC(__put_user_1) 40ENDPROC(__put_user_1)
38 41
39ENTRY(__put_user_2) 42ENTRY(__put_user_2)
43 check_uaccess r0, 2, r1, ip, __put_user_bad
40 mov ip, r2, lsr #8 44 mov ip, r2, lsr #8
41#ifdef CONFIG_THUMB2_KERNEL 45#ifdef CONFIG_THUMB2_KERNEL
42#ifndef __ARMEB__ 46#ifndef __ARMEB__
@@ -60,12 +64,14 @@ ENTRY(__put_user_2)
60ENDPROC(__put_user_2) 64ENDPROC(__put_user_2)
61 65
62ENTRY(__put_user_4) 66ENTRY(__put_user_4)
67 check_uaccess r0, 4, r1, ip, __put_user_bad
634: TUSER(str) r2, [r0] 684: TUSER(str) r2, [r0]
64 mov r0, #0 69 mov r0, #0
65 mov pc, lr 70 mov pc, lr
66ENDPROC(__put_user_4) 71ENDPROC(__put_user_4)
67 72
68ENTRY(__put_user_8) 73ENTRY(__put_user_8)
74 check_uaccess r0, 8, r1, ip, __put_user_bad
69#ifdef CONFIG_THUMB2_KERNEL 75#ifdef CONFIG_THUMB2_KERNEL
705: TUSER(str) r2, [r0] 765: TUSER(str) r2, [r0]
716: TUSER(str) r3, [r0, #4] 776: TUSER(str) r3, [r0, #4]
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index fdd8cc87c9fe..d20d4795f4ea 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -222,10 +222,8 @@ int __init mx25_clocks_init(void)
222 clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); 222 clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
223 clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); 223 clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
224 clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); 224 clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
225 clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); 225 clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
226 clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); 226 clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
227 clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1");
228 clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");
229 clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); 227 clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
230 clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); 228 clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
231 clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); 229 clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
@@ -243,6 +241,6 @@ int __init mx25_clocks_init(void)
243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); 241 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
244 clk_register_clkdev(clk[iim_ipg], "iim", NULL); 242 clk_register_clkdev(clk[iim_ipg], "iim", NULL);
245 243
246 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 244 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
247 return 0; 245 return 0;
248} 246}
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index c6422fb10bae..65fb8bcd86cb 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -230,10 +230,8 @@ int __init mx35_clocks_init()
230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); 230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); 231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); 232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
233 clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); 233 clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
234 clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); 234 clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
235 clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1");
236 clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1");
237 /* i.mx35 has the i.mx21 type uart */ 235 /* i.mx35 has the i.mx21 type uart */
238 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); 236 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
239 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); 237 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 2c6ab3273f9e..5985ed1b8c98 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info); 526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
527 527
528 /* set NAND page size to 2k if not configured via boot mode pins */ 528 /* set NAND page size to 2k if not configured via boot mode pins */
529 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); 529 __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
530 (1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
530 531
531 /* RTC */ 532 /* RTC */
532 /* Get RTC IRQ and register the chip */ 533 /* Get RTC IRQ and register the chip */
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index fcd4e85c4ddc..346fd26f3aa6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -232,10 +232,11 @@ config MACH_OMAP3_PANDORA
232 select OMAP_PACKAGE_CBB 232 select OMAP_PACKAGE_CBB
233 select REGULATOR_FIXED_VOLTAGE if REGULATOR 233 select REGULATOR_FIXED_VOLTAGE if REGULATOR
234 234
235config MACH_OMAP3_TOUCHBOOK 235config MACH_TOUCHBOOK
236 bool "OMAP3 Touch Book" 236 bool "OMAP3 Touch Book"
237 depends on ARCH_OMAP3 237 depends on ARCH_OMAP3
238 default y 238 default y
239 select OMAP_PACKAGE_CBB
239 240
240config MACH_OMAP_3430SDP 241config MACH_OMAP_3430SDP
241 bool "OMAP 3430 SDP board" 242 bool "OMAP 3430 SDP board"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f6a24b3f9c4f..34c2c7f59f0a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -255,7 +255,7 @@ obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-display.o
255obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o 255obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
256obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o 256obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
257obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o 257obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
258obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o 258obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
259obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o 259obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
260obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o 260obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o
261 261
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 25bbcc7ca4dc..ae27de8899a6 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1036,13 +1036,13 @@ static struct omap_clk am33xx_clks[] = {
1036 CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), 1036 CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX),
1037 CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), 1037 CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX),
1038 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), 1038 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX),
1039 CLK(NULL, "gpt1_fck", &timer1_fck, CK_AM33XX), 1039 CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX),
1040 CLK(NULL, "gpt2_fck", &timer2_fck, CK_AM33XX), 1040 CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX),
1041 CLK(NULL, "gpt3_fck", &timer3_fck, CK_AM33XX), 1041 CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX),
1042 CLK(NULL, "gpt4_fck", &timer4_fck, CK_AM33XX), 1042 CLK(NULL, "timer4_fck", &timer4_fck, CK_AM33XX),
1043 CLK(NULL, "gpt5_fck", &timer5_fck, CK_AM33XX), 1043 CLK(NULL, "timer5_fck", &timer5_fck, CK_AM33XX),
1044 CLK(NULL, "gpt6_fck", &timer6_fck, CK_AM33XX), 1044 CLK(NULL, "timer6_fck", &timer6_fck, CK_AM33XX),
1045 CLK(NULL, "gpt7_fck", &timer7_fck, CK_AM33XX), 1045 CLK(NULL, "timer7_fck", &timer7_fck, CK_AM33XX),
1046 CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX), 1046 CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX),
1047 CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX), 1047 CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX),
1048 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX), 1048 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index a0d68dbecfa3..f99e65cfb862 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -241,6 +241,52 @@ static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
241 _clkdm_del_autodeps(clkdm); 241 _clkdm_del_autodeps(clkdm);
242} 242}
243 243
244static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
245{
246 bool hwsup = false;
247
248 if (!clkdm->clktrctrl_mask)
249 return 0;
250
251 hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
252 clkdm->clktrctrl_mask);
253
254 if (hwsup) {
255 /* Disable HW transitions when we are changing deps */
256 _disable_hwsup(clkdm);
257 _clkdm_add_autodeps(clkdm);
258 _enable_hwsup(clkdm);
259 } else {
260 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
261 omap3_clkdm_wakeup(clkdm);
262 }
263
264 return 0;
265}
266
267static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
268{
269 bool hwsup = false;
270
271 if (!clkdm->clktrctrl_mask)
272 return 0;
273
274 hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
275 clkdm->clktrctrl_mask);
276
277 if (hwsup) {
278 /* Disable HW transitions when we are changing deps */
279 _disable_hwsup(clkdm);
280 _clkdm_del_autodeps(clkdm);
281 _enable_hwsup(clkdm);
282 } else {
283 if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
284 omap3_clkdm_sleep(clkdm);
285 }
286
287 return 0;
288}
289
244struct clkdm_ops omap2_clkdm_operations = { 290struct clkdm_ops omap2_clkdm_operations = {
245 .clkdm_add_wkdep = omap2_clkdm_add_wkdep, 291 .clkdm_add_wkdep = omap2_clkdm_add_wkdep,
246 .clkdm_del_wkdep = omap2_clkdm_del_wkdep, 292 .clkdm_del_wkdep = omap2_clkdm_del_wkdep,
@@ -267,6 +313,6 @@ struct clkdm_ops omap3_clkdm_operations = {
267 .clkdm_wakeup = omap3_clkdm_wakeup, 313 .clkdm_wakeup = omap3_clkdm_wakeup,
268 .clkdm_allow_idle = omap3_clkdm_allow_idle, 314 .clkdm_allow_idle = omap3_clkdm_allow_idle,
269 .clkdm_deny_idle = omap3_clkdm_deny_idle, 315 .clkdm_deny_idle = omap3_clkdm_deny_idle,
270 .clkdm_clk_enable = omap2_clkdm_clk_enable, 316 .clkdm_clk_enable = omap3xxx_clkdm_clk_enable,
271 .clkdm_clk_disable = omap2_clkdm_clk_disable, 317 .clkdm_clk_disable = omap3xxx_clkdm_clk_disable,
272}; 318};
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 766338fe4d34..975f6bda0e0b 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -67,6 +67,7 @@
67#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 67#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
68 68
69/* CM_IDLEST_IVA2 */ 69/* CM_IDLEST_IVA2 */
70#define OMAP3430_ST_IVA2_SHIFT 0
70#define OMAP3430_ST_IVA2_MASK (1 << 0) 71#define OMAP3430_ST_IVA2_MASK (1 << 0)
71 72
72/* CM_IDLEST_PLL_IVA2 */ 73/* CM_IDLEST_PLL_IVA2 */
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 05fdebfaa195..330d4c6e746b 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -46,7 +46,7 @@
46static void __iomem *wakeupgen_base; 46static void __iomem *wakeupgen_base;
47static void __iomem *sar_base; 47static void __iomem *sar_base;
48static DEFINE_SPINLOCK(wakeupgen_lock); 48static DEFINE_SPINLOCK(wakeupgen_lock);
49static unsigned int irq_target_cpu[NR_IRQS]; 49static unsigned int irq_target_cpu[MAX_IRQS];
50static unsigned int irq_banks = MAX_NR_REG_BANKS; 50static unsigned int irq_banks = MAX_NR_REG_BANKS;
51static unsigned int max_irqs = MAX_IRQS; 51static unsigned int max_irqs = MAX_IRQS;
52static unsigned int omap_secure_apis; 52static unsigned int omap_secure_apis;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6ca8e519968d..37afbd173c2c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1889,6 +1889,7 @@ static int _enable(struct omap_hwmod *oh)
1889 _enable_sysc(oh); 1889 _enable_sysc(oh);
1890 } 1890 }
1891 } else { 1891 } else {
1892 _omap4_disable_module(oh);
1892 _disable_clocks(oh); 1893 _disable_clocks(oh);
1893 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", 1894 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1894 oh->name, r); 1895 oh->name, r);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c9e38200216b..ce7e6068768f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
100 100
101/* IVA2 (IVA2) */ 101/* IVA2 (IVA2) */
102static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = { 102static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {
103 { .name = "logic", .rst_shift = 0 }, 103 { .name = "logic", .rst_shift = 0, .st_shift = 8 },
104 { .name = "seq0", .rst_shift = 1 }, 104 { .name = "seq0", .rst_shift = 1, .st_shift = 9 },
105 { .name = "seq1", .rst_shift = 2 }, 105 { .name = "seq1", .rst_shift = 2, .st_shift = 10 },
106}; 106};
107 107
108static struct omap_hwmod omap3xxx_iva_hwmod = { 108static struct omap_hwmod omap3xxx_iva_hwmod = {
@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
112 .rst_lines = omap3xxx_iva_resets, 112 .rst_lines = omap3xxx_iva_resets,
113 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets), 113 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets),
114 .main_clk = "iva2_ck", 114 .main_clk = "iva2_ck",
115 .prcm = {
116 .omap2 = {
117 .module_offs = OMAP3430_IVA2_MOD,
118 .prcm_reg_id = 1,
119 .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
120 .idlest_reg_id = 1,
121 .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
122 }
123 },
115}; 124};
116 125
117/* timer class */ 126/* timer class */
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 242aee498ceb..afb60917a948 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -4210,7 +4210,7 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
4210}; 4210};
4211 4211
4212/* dsp -> sl2if */ 4212/* dsp -> sl2if */
4213static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = { 4213static struct omap_hwmod_ocp_if __maybe_unused omap44xx_dsp__sl2if = {
4214 .master = &omap44xx_dsp_hwmod, 4214 .master = &omap44xx_dsp_hwmod,
4215 .slave = &omap44xx_sl2if_hwmod, 4215 .slave = &omap44xx_sl2if_hwmod,
4216 .clk = "dpll_iva_m5x2_ck", 4216 .clk = "dpll_iva_m5x2_ck",
@@ -4828,7 +4828,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
4828}; 4828};
4829 4829
4830/* iva -> sl2if */ 4830/* iva -> sl2if */
4831static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = { 4831static struct omap_hwmod_ocp_if __maybe_unused omap44xx_iva__sl2if = {
4832 .master = &omap44xx_iva_hwmod, 4832 .master = &omap44xx_iva_hwmod,
4833 .slave = &omap44xx_sl2if_hwmod, 4833 .slave = &omap44xx_sl2if_hwmod,
4834 .clk = "dpll_iva_m5x2_ck", 4834 .clk = "dpll_iva_m5x2_ck",
@@ -5362,7 +5362,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__scrm = {
5362}; 5362};
5363 5363
5364/* l3_main_2 -> sl2if */ 5364/* l3_main_2 -> sl2if */
5365static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = { 5365static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
5366 .master = &omap44xx_l3_main_2_hwmod, 5366 .master = &omap44xx_l3_main_2_hwmod,
5367 .slave = &omap44xx_sl2if_hwmod, 5367 .slave = &omap44xx_sl2if_hwmod,
5368 .clk = "l3_div_ck", 5368 .clk = "l3_div_ck",
@@ -6032,7 +6032,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6032 &omap44xx_l4_abe__dmic, 6032 &omap44xx_l4_abe__dmic,
6033 &omap44xx_l4_abe__dmic_dma, 6033 &omap44xx_l4_abe__dmic_dma,
6034 &omap44xx_dsp__iva, 6034 &omap44xx_dsp__iva,
6035 &omap44xx_dsp__sl2if, 6035 /* &omap44xx_dsp__sl2if, */
6036 &omap44xx_l4_cfg__dsp, 6036 &omap44xx_l4_cfg__dsp,
6037 &omap44xx_l3_main_2__dss, 6037 &omap44xx_l3_main_2__dss,
6038 &omap44xx_l4_per__dss, 6038 &omap44xx_l4_per__dss,
@@ -6068,7 +6068,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6068 &omap44xx_l4_per__i2c4, 6068 &omap44xx_l4_per__i2c4,
6069 &omap44xx_l3_main_2__ipu, 6069 &omap44xx_l3_main_2__ipu,
6070 &omap44xx_l3_main_2__iss, 6070 &omap44xx_l3_main_2__iss,
6071 &omap44xx_iva__sl2if, 6071 /* &omap44xx_iva__sl2if, */
6072 &omap44xx_l3_main_2__iva, 6072 &omap44xx_l3_main_2__iva,
6073 &omap44xx_l4_wkup__kbd, 6073 &omap44xx_l4_wkup__kbd,
6074 &omap44xx_l4_cfg__mailbox, 6074 &omap44xx_l4_cfg__mailbox,
@@ -6099,7 +6099,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6099 &omap44xx_l4_cfg__cm_core, 6099 &omap44xx_l4_cfg__cm_core,
6100 &omap44xx_l4_wkup__prm, 6100 &omap44xx_l4_wkup__prm,
6101 &omap44xx_l4_wkup__scrm, 6101 &omap44xx_l4_wkup__scrm,
6102 &omap44xx_l3_main_2__sl2if, 6102 /* &omap44xx_l3_main_2__sl2if, */
6103 &omap44xx_l4_abe__slimbus1, 6103 &omap44xx_l4_abe__slimbus1,
6104 &omap44xx_l4_abe__slimbus1_dma, 6104 &omap44xx_l4_abe__slimbus1_dma,
6105 &omap44xx_l4_per__slimbus2, 6105 &omap44xx_l4_per__slimbus2,
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 2ff6d41ec6c6..2ba4f57dda86 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -260,6 +260,7 @@ static u32 notrace dmtimer_read_sched_clock(void)
260 return 0; 260 return 0;
261} 261}
262 262
263#ifdef CONFIG_OMAP_32K_TIMER
263/* Setup free-running counter for clocksource */ 264/* Setup free-running counter for clocksource */
264static int __init omap2_sync32k_clocksource_init(void) 265static int __init omap2_sync32k_clocksource_init(void)
265{ 266{
@@ -299,6 +300,12 @@ static int __init omap2_sync32k_clocksource_init(void)
299 300
300 return ret; 301 return ret;
301} 302}
303#else
304static inline int omap2_sync32k_clocksource_init(void)
305{
306 return -ENODEV;
307}
308#endif
302 309
303static void __init omap2_gptimer_clocksource_init(int gptimer_id, 310static void __init omap2_gptimer_clocksource_init(int gptimer_id,
304 const char *fck_source) 311 const char *fck_source)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32c..3b8a0171c3cb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
346 .flags = IORESOURCE_MEM, 346 .flags = IORESOURCE_MEM,
347 }, 347 },
348 [1] = { 348 [1] = {
349 .start = gic_spi(141), 349 .start = gic_spi(140),
350 .flags = IORESOURCE_IRQ, 350 .flags = IORESOURCE_IRQ,
351 }, 351 },
352 [2] = { 352 [2] = {
353 .start = gic_spi(140), 353 .start = gic_spi(141),
354 .flags = IORESOURCE_IRQ, 354 .flags = IORESOURCE_IRQ,
355 }, 355 },
356}; 356};
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 119bc52ab93e..4e07eec1270d 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd,
63 pid = task_pid_nr(thread->task) << ASID_BITS; 63 pid = task_pid_nr(thread->task) << ASID_BITS;
64 asm volatile( 64 asm volatile(
65 " mrc p15, 0, %0, c13, c0, 1\n" 65 " mrc p15, 0, %0, c13, c0, 1\n"
66 " bfi %1, %0, #0, %2\n" 66 " and %0, %0, %2\n"
67 " mcr p15, 0, %1, c13, c0, 1\n" 67 " orr %0, %0, %1\n"
68 " mcr p15, 0, %0, c13, c0, 1\n"
68 : "=r" (contextidr), "+r" (pid) 69 : "=r" (contextidr), "+r" (pid)
69 : "I" (ASID_BITS)); 70 : "I" (~ASID_MASK));
70 isb(); 71 isb();
71 72
72 return NOTIFY_OK; 73 return NOTIFY_OK;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 051204fc4617..e59c4ab71bcb 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -489,7 +489,7 @@ static bool __in_atomic_pool(void *start, size_t size)
489 void *pool_start = pool->vaddr; 489 void *pool_start = pool->vaddr;
490 void *pool_end = pool->vaddr + pool->size; 490 void *pool_end = pool->vaddr + pool->size;
491 491
492 if (start < pool_start || start > pool_end) 492 if (start < pool_start || start >= pool_end)
493 return false; 493 return false;
494 494
495 if (end <= pool_end) 495 if (end <= pool_end)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 6776160618ef..a8ee92da3544 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -55,6 +55,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
55/* permanent static mappings from iotable_init() */ 55/* permanent static mappings from iotable_init() */
56#define VM_ARM_STATIC_MAPPING 0x40000000 56#define VM_ARM_STATIC_MAPPING 0x40000000
57 57
58/* empty mapping */
59#define VM_ARM_EMPTY_MAPPING 0x20000000
60
58/* mapping type (attributes) for permanent static mappings */ 61/* mapping type (attributes) for permanent static mappings */
59#define VM_ARM_MTYPE(mt) ((mt) << 20) 62#define VM_ARM_MTYPE(mt) ((mt) << 20)
60#define VM_ARM_MTYPE_MASK (0x1f << 20) 63#define VM_ARM_MTYPE_MASK (0x1f << 20)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4c2d0451e84a..c2fa21d0103e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -807,7 +807,7 @@ static void __init pmd_empty_section_gap(unsigned long addr)
807 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm)); 807 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
808 vm->addr = (void *)addr; 808 vm->addr = (void *)addr;
809 vm->size = SECTION_SIZE; 809 vm->size = SECTION_SIZE;
810 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; 810 vm->flags = VM_IOREMAP | VM_ARM_EMPTY_MAPPING;
811 vm->caller = pmd_empty_section_gap; 811 vm->caller = pmd_empty_section_gap;
812 vm_area_add_early(vm); 812 vm_area_add_early(vm);
813} 813}
@@ -820,7 +820,7 @@ static void __init fill_pmd_gaps(void)
820 820
821 /* we're still single threaded hence no lock needed here */ 821 /* we're still single threaded hence no lock needed here */
822 for (vm = vmlist; vm; vm = vm->next) { 822 for (vm = vmlist; vm; vm = vm->next) {
823 if (!(vm->flags & VM_ARM_STATIC_MAPPING)) 823 if (!(vm->flags & (VM_ARM_STATIC_MAPPING | VM_ARM_EMPTY_MAPPING)))
824 continue; 824 continue;
825 addr = (unsigned long)vm->addr; 825 addr = (unsigned long)vm->addr;
826 if (addr < next) 826 if (addr < next)
@@ -961,8 +961,8 @@ void __init sanity_check_meminfo(void)
961 * Check whether this memory bank would partially overlap 961 * Check whether this memory bank would partially overlap
962 * the vmalloc area. 962 * the vmalloc area.
963 */ 963 */
964 if (__va(bank->start + bank->size) > vmalloc_min || 964 if (__va(bank->start + bank->size - 1) >= vmalloc_min ||
965 __va(bank->start + bank->size) < __va(bank->start)) { 965 __va(bank->start + bank->size - 1) <= __va(bank->start)) {
966 unsigned long newsize = vmalloc_min - __va(bank->start); 966 unsigned long newsize = vmalloc_min - __va(bank->start);
967 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx " 967 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
968 "to -%.8llx (vmalloc region overlap).\n", 968 "to -%.8llx (vmalloc region overlap).\n",
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 627d94f1b010..ec466400a200 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -98,6 +98,7 @@
98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) 98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) 99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) 100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
101#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
101#define MX25_INT_FEC (NR_IRQS_LEGACY + 57) 102#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
102 103
103#define MX25_DMA_REQ_SSI2_RX1 22 104#define MX25_DMA_REQ_SSI2_RX1 22
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 766181cb5c95..024f3b08db29 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -68,6 +68,7 @@
68 68
69static unsigned long omap_sram_start; 69static unsigned long omap_sram_start;
70static void __iomem *omap_sram_base; 70static void __iomem *omap_sram_base;
71static unsigned long omap_sram_skip;
71static unsigned long omap_sram_size; 72static unsigned long omap_sram_size;
72static void __iomem *omap_sram_ceil; 73static void __iomem *omap_sram_ceil;
73 74
@@ -106,6 +107,7 @@ static int is_sram_locked(void)
106 */ 107 */
107static void __init omap_detect_sram(void) 108static void __init omap_detect_sram(void)
108{ 109{
110 omap_sram_skip = SRAM_BOOTLOADER_SZ;
109 if (cpu_class_is_omap2()) { 111 if (cpu_class_is_omap2()) {
110 if (is_sram_locked()) { 112 if (is_sram_locked()) {
111 if (cpu_is_omap34xx()) { 113 if (cpu_is_omap34xx()) {
@@ -113,6 +115,7 @@ static void __init omap_detect_sram(void)
113 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) || 115 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
114 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) { 116 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
115 omap_sram_size = 0x7000; /* 28K */ 117 omap_sram_size = 0x7000; /* 28K */
118 omap_sram_skip += SZ_16K;
116 } else { 119 } else {
117 omap_sram_size = 0x8000; /* 32K */ 120 omap_sram_size = 0x8000; /* 32K */
118 } 121 }
@@ -175,8 +178,10 @@ static void __init omap_map_sram(void)
175 return; 178 return;
176 179
177#ifdef CONFIG_OMAP4_ERRATA_I688 180#ifdef CONFIG_OMAP4_ERRATA_I688
181 if (cpu_is_omap44xx()) {
178 omap_sram_start += PAGE_SIZE; 182 omap_sram_start += PAGE_SIZE;
179 omap_sram_size -= SZ_16K; 183 omap_sram_size -= SZ_16K;
184 }
180#endif 185#endif
181 if (cpu_is_omap34xx()) { 186 if (cpu_is_omap34xx()) {
182 /* 187 /*
@@ -203,8 +208,8 @@ static void __init omap_map_sram(void)
203 * Looks like we need to preserve some bootloader code at the 208 * Looks like we need to preserve some bootloader code at the
204 * beginning of SRAM for jumping to flash for reboot to work... 209 * beginning of SRAM for jumping to flash for reboot to work...
205 */ 210 */
206 memset_io(omap_sram_base + SRAM_BOOTLOADER_SZ, 0, 211 memset_io(omap_sram_base + omap_sram_skip, 0,
207 omap_sram_size - SRAM_BOOTLOADER_SZ); 212 omap_sram_size - omap_sram_skip);
208} 213}
209 214
210/* 215/*
@@ -218,7 +223,7 @@ void *omap_sram_push_address(unsigned long size)
218{ 223{
219 unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; 224 unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
220 225
221 available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ); 226 available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
222 227
223 if (size > available) { 228 if (size > available) {
224 pr_err("Not enough space in SRAM\n"); 229 pr_err("Not enough space in SRAM\n");
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca475e7..d1116e2dfbea 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
144 144
145int clk_set_rate(struct clk *clk, unsigned long rate) 145int clk_set_rate(struct clk *clk, unsigned long rate)
146{ 146{
147 unsigned long flags;
147 int ret; 148 int ret;
148 149
149 if (IS_ERR(clk)) 150 if (IS_ERR(clk))
@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
159 if (clk->ops == NULL || clk->ops->set_rate == NULL) 160 if (clk->ops == NULL || clk->ops->set_rate == NULL)
160 return -EINVAL; 161 return -EINVAL;
161 162
162 spin_lock(&clocks_lock); 163 spin_lock_irqsave(&clocks_lock, flags);
163 ret = (clk->ops->set_rate)(clk, rate); 164 ret = (clk->ops->set_rate)(clk, rate);
164 spin_unlock(&clocks_lock); 165 spin_unlock_irqrestore(&clocks_lock, flags);
165 166
166 return ret; 167 return ret;
167} 168}
@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
173 174
174int clk_set_parent(struct clk *clk, struct clk *parent) 175int clk_set_parent(struct clk *clk, struct clk *parent)
175{ 176{
177 unsigned long flags;
176 int ret = 0; 178 int ret = 0;
177 179
178 if (IS_ERR(clk)) 180 if (IS_ERR(clk))
179 return -EINVAL; 181 return -EINVAL;
180 182
181 spin_lock(&clocks_lock); 183 spin_lock_irqsave(&clocks_lock, flags);
182 184
183 if (clk->ops && clk->ops->set_parent) 185 if (clk->ops && clk->ops->set_parent)
184 ret = (clk->ops->set_parent)(clk, parent); 186 ret = (clk->ops->set_parent)(clk, parent);
185 187
186 spin_unlock(&clocks_lock); 188 spin_unlock_irqrestore(&clocks_lock, flags);
187 189
188 return ret; 190 return ret;
189} 191}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-26 07:24:53 -0500