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authorBen Dooks <ben-linux@fluff.org>2008-10-21 09:06:21 -0400
committerBen Dooks <ben-linux@fluff.org>2008-12-15 16:45:45 -0500
commit7f565ecc33c5536a76cd73847874df5f804a49aa (patch)
treef2e70ec95d952b289ea0ea87a078b75f0a74a902 /arch/arm
parentb2a6cf3b1e099a724504ba16a4c9aea1eb0122a6 (diff)
[ARM] S3C: Add <plat/cpu-freq.h> for initial cpufreq definitions
This is the header file that defines the basic cpu frequency scalling support for the Samsung S3C series of SoC. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-s3c/include/plat/cpu-freq.h94
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h
new file mode 100644
index 000000000000..c86a13307e90
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h
@@ -0,0 +1,94 @@
1/* arch/arm/plat-s3c/include/plat/cpu-freq.h
2 *
3 * Copyright (c) 2006,2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C CPU frequency scaling support - driver and board
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/cpufreq.h>
15
16struct s3c_cpufreq_info;
17struct s3c_cpufreq_board;
18struct s3c_iotimings;
19
20struct s3c_freq {
21 unsigned long fclk;
22 unsigned long armclk;
23 unsigned long hclk_tns; /* in 10ths of ns */
24 unsigned long hclk;
25 unsigned long pclk;
26};
27
28/* wrapper 'struct cpufreq_freqs' so that any drivers receiving the
29 * notification can use this information that is not provided by just
30 * having the core frequency alone.
31 */
32
33struct s3c_cpufreq_freqs {
34 struct cpufreq_freqs freqs;
35 struct s3c_freq old;
36 struct s3c_freq new;
37};
38
39#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs)
40
41struct s3c_clkdivs {
42 int p_divisor; /* fclk / pclk */
43 int h_divisor; /* fclk / hclk */
44 int arm_divisor; /* not all cpus have this. */
45 unsigned char dvs; /* using dvs mode to arm. */
46};
47
48#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s))
49
50struct s3c_pllval {
51 unsigned long freq;
52 unsigned long pll_reg;
53};
54
55struct s3c_cpufreq_config {
56 struct s3c_freq freq;
57 struct s3c_pllval pll;
58 struct s3c_clkdivs divs;
59 struct s3c_cpufreq_info *info; /* for core, not drivers */
60 struct s3c_cpufreq_board *board;
61};
62
63/* s3c_cpufreq_board
64 *
65 * per-board configuraton information, such as memory refresh and
66 * how to initialise IO timings.
67 */
68struct s3c_cpufreq_board {
69 unsigned int refresh; /* refresh period in ns */
70 unsigned int auto_io:1; /* automatically init io timings. */
71 unsigned int need_io:1; /* set if needs io timing support. */
72
73 /* any non-zero field in here is taken as an upper limit. */
74 struct s3c_freq max; /* frequency limits */
75};
76
77/* Things depending on frequency scaling. */
78#ifdef CONFIG_CPU_FREQ_S3C
79#define __init_or_cpufreq
80#else
81#define __init_or_cpufreq __init
82#endif
83
84/* Board functions */
85
86#ifdef CONFIG_CPU_FREQ_S3C
87extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board);
88#else
89
90static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
91{
92 return 0;
93}
94#endif /* CONFIG_CPU_FREQ_S3C */