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authorAndrew Victor <andrew@sanpeople.com>2006-11-30 06:27:38 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-11-30 17:51:38 -0500
commit62c1660d908c44663c63ad6c679f6afa1d33c5f6 (patch)
tree29936dcf2048635ef7f0962be42316d94d1e9664 /arch/arm
parent79da7a610a1f81b51a1a77e2ac27438d7a5c5124 (diff)
[ARM] 3948/1: AT91: Initial support for AT91SAM9261 and AT91SAM9260
This patch adds the initial support for the newer Atmel AT91SAM9261 and AT91SAM9260 processors. The code is based on, and makes use of, the existing AT91RM9200 support. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-at91rm9200/Makefile6
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9260.c294
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9261.c289
-rw-r--r--arch/arm/mach-at91rm9200/generic.h5
4 files changed, 591 insertions, 3 deletions
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile
index 568d8d76cde0..40e89bf459f1 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91rm9200/Makefile
@@ -11,10 +11,10 @@ obj-$(CONFIG_PM) += pm.o
11 11
12# CPU-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.c 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.c
14obj-$(CONFIG_ARCH_AT91SAM9260) += 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o
16 16
17# AT91RM9200 Board-specific support 17# AT91RM9200 board-specific support
18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o 19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o 20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91rm9200/at91sam9260.c
new file mode 100644
index 000000000000..203f073a53e6
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260.c
@@ -0,0 +1,294 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9260.c
3 *
4 * Copyright (C) 2006 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9260.h>
18#include <asm/arch/at91_pmc.h>
19
20#include "generic.h"
21#include "clock.h"
22
23static struct map_desc at91sam9260_io_desc[] __initdata = {
24 {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
27 .length = SZ_16K,
28 .type = MT_DEVICE,
29 }, {
30 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
31 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
32 .length = AT91SAM9260_SRAM0_SIZE,
33 .type = MT_DEVICE,
34 }, {
35 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
36 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
37 .length = AT91SAM9260_SRAM1_SIZE,
38 .type = MT_DEVICE,
39 },
40};
41
42/* --------------------------------------------------------------------
43 * Clocks
44 * -------------------------------------------------------------------- */
45
46/*
47 * The peripheral clocks.
48 */
49static struct clk pioA_clk = {
50 .name = "pioA_clk",
51 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioB_clk = {
55 .name = "pioB_clk",
56 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk pioC_clk = {
60 .name = "pioC_clk",
61 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
62 .type = CLK_TYPE_PERIPHERAL,
63};
64static struct clk adc_clk = {
65 .name = "adc_clk",
66 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
67 .type = CLK_TYPE_PERIPHERAL,
68};
69static struct clk usart0_clk = {
70 .name = "usart0_clk",
71 .pmc_mask = 1 << AT91SAM9260_ID_US0,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk usart1_clk = {
75 .name = "usart1_clk",
76 .pmc_mask = 1 << AT91SAM9260_ID_US1,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk usart2_clk = {
80 .name = "usart2_clk",
81 .pmc_mask = 1 << AT91SAM9260_ID_US2,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk mmc_clk = {
85 .name = "mci_clk",
86 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk udc_clk = {
90 .name = "udc_clk",
91 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk twi_clk = {
95 .name = "twi_clk",
96 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk spi0_clk = {
100 .name = "spi0_clk",
101 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk spi1_clk = {
105 .name = "spi1_clk",
106 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109static struct clk ohci_clk = {
110 .name = "ohci_clk",
111 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
112 .type = CLK_TYPE_PERIPHERAL,
113};
114static struct clk ether_clk = {
115 .name = "ether_clk",
116 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
117 .type = CLK_TYPE_PERIPHERAL,
118};
119static struct clk isi_clk = {
120 .name = "isi_clk",
121 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
122 .type = CLK_TYPE_PERIPHERAL,
123};
124static struct clk usart3_clk = {
125 .name = "usart3_clk",
126 .pmc_mask = 1 << AT91SAM9260_ID_US3,
127 .type = CLK_TYPE_PERIPHERAL,
128};
129static struct clk usart4_clk = {
130 .name = "usart4_clk",
131 .pmc_mask = 1 << AT91SAM9260_ID_US4,
132 .type = CLK_TYPE_PERIPHERAL,
133};
134static struct clk usart5_clk = {
135 .name = "usart5_clk",
136 .pmc_mask = 1 << AT91SAM9260_ID_US5,
137 .type = CLK_TYPE_PERIPHERAL,
138};
139
140static struct clk *periph_clocks[] __initdata = {
141 &pioA_clk,
142 &pioB_clk,
143 &pioC_clk,
144 &adc_clk,
145 &usart0_clk,
146 &usart1_clk,
147 &usart2_clk,
148 &mmc_clk,
149 &udc_clk,
150 &twi_clk,
151 &spi0_clk,
152 &spi1_clk,
153 // ssc
154 // tc0 .. tc2
155 &ohci_clk,
156 &ether_clk,
157 &isi_clk,
158 &usart3_clk,
159 &usart4_clk,
160 &usart5_clk,
161 // tc3 .. tc5
162 // irq0 .. irq2
163};
164
165/*
166 * The two programmable clocks.
167 * You must configure pin multiplexing to bring these signals out.
168 */
169static struct clk pck0 = {
170 .name = "pck0",
171 .pmc_mask = AT91_PMC_PCK0,
172 .type = CLK_TYPE_PROGRAMMABLE,
173 .id = 0,
174};
175static struct clk pck1 = {
176 .name = "pck1",
177 .pmc_mask = AT91_PMC_PCK1,
178 .type = CLK_TYPE_PROGRAMMABLE,
179 .id = 1,
180};
181
182static void __init at91sam9260_register_clocks(void)
183{
184 int i;
185
186 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
187 clk_register(periph_clocks[i]);
188
189 clk_register(&pck0);
190 clk_register(&pck1);
191}
192
193/* --------------------------------------------------------------------
194 * GPIO
195 * -------------------------------------------------------------------- */
196
197static struct at91_gpio_bank at91sam9260_gpio[] = {
198 {
199 .id = AT91SAM9260_ID_PIOA,
200 .offset = AT91_PIOA,
201 .clock = &pioA_clk,
202 }, {
203 .id = AT91SAM9260_ID_PIOB,
204 .offset = AT91_PIOB,
205 .clock = &pioB_clk,
206 }, {
207 .id = AT91SAM9260_ID_PIOC,
208 .offset = AT91_PIOC,
209 .clock = &pioC_clk,
210 }
211};
212
213static void at91sam9260_reset(void)
214{
215#warning "Implement CPU reset"
216}
217
218
219/* --------------------------------------------------------------------
220 * AT91SAM9260 processor initialization
221 * -------------------------------------------------------------------- */
222
223void __init at91sam9260_initialize(unsigned long main_clock)
224{
225 /* Map peripherals */
226 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
227
228 at91_arch_reset = at91sam9260_reset;
229 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
230 | (1 << AT91SAM9260_ID_IRQ2);
231
232 /* Init clock subsystem */
233 at91_clock_init(main_clock);
234
235 /* Register the processor-specific clocks */
236 at91sam9260_register_clocks();
237
238 /* Register GPIO subsystem */
239 at91_gpio_init(at91sam9260_gpio, 3);
240}
241
242/* --------------------------------------------------------------------
243 * Interrupt initialization
244 * -------------------------------------------------------------------- */
245
246/*
247 * The default interrupt priority levels (0 = lowest, 7 = highest).
248 */
249static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
250 7, /* Advanced Interrupt Controller */
251 7, /* System Peripherals */
252 0, /* Parallel IO Controller A */
253 0, /* Parallel IO Controller B */
254 0, /* Parallel IO Controller C */
255 0, /* Analog-to-Digital Converter */
256 6, /* USART 0 */
257 6, /* USART 1 */
258 6, /* USART 2 */
259 0, /* Multimedia Card Interface */
260 4, /* USB Device Port */
261 0, /* Two-Wire Interface */
262 6, /* Serial Peripheral Interface 0 */
263 6, /* Serial Peripheral Interface 1 */
264 5, /* Serial Synchronous Controller */
265 0,
266 0,
267 0, /* Timer Counter 0 */
268 0, /* Timer Counter 1 */
269 0, /* Timer Counter 2 */
270 3, /* USB Host port */
271 3, /* Ethernet */
272 0, /* Image Sensor Interface */
273 6, /* USART 3 */
274 6, /* USART 4 */
275 6, /* USART 5 */
276 0, /* Timer Counter 3 */
277 0, /* Timer Counter 4 */
278 0, /* Timer Counter 5 */
279 0, /* Advanced Interrupt Controller */
280 0, /* Advanced Interrupt Controller */
281 0, /* Advanced Interrupt Controller */
282};
283
284void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
285{
286 if (!priority)
287 priority = at91sam9260_default_irq_priority;
288
289 /* Initialize the AIC interrupt controller */
290 at91_aic_init(priority);
291
292 /* Enable GPIO interrupts */
293 at91_gpio_irq_setup();
294}
diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91rm9200/at91sam9261.c
new file mode 100644
index 000000000000..5a82f35da2e9
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261.c
@@ -0,0 +1,289 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9261.c
3 *
4 * Copyright (C) 2005 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9261.h>
18#include <asm/arch/at91_pmc.h>
19
20#include "generic.h"
21#include "clock.h"
22
23static struct map_desc at91sam9261_io_desc[] __initdata = {
24 {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
27 .length = SZ_16K,
28 .type = MT_DEVICE,
29 }, {
30 .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
31 .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
32 .length = AT91SAM9261_SRAM_SIZE,
33 .type = MT_DEVICE,
34 },
35};
36
37/* --------------------------------------------------------------------
38 * Clocks
39 * -------------------------------------------------------------------- */
40
41/*
42 * The peripheral clocks.
43 */
44static struct clk pioA_clk = {
45 .name = "pioA_clk",
46 .pmc_mask = 1 << AT91SAM9261_ID_PIOA,
47 .type = CLK_TYPE_PERIPHERAL,
48};
49static struct clk pioB_clk = {
50 .name = "pioB_clk",
51 .pmc_mask = 1 << AT91SAM9261_ID_PIOB,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioC_clk = {
55 .name = "pioC_clk",
56 .pmc_mask = 1 << AT91SAM9261_ID_PIOC,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk usart0_clk = {
60 .name = "usart0_clk",
61 .pmc_mask = 1 << AT91SAM9261_ID_US0,
62 .type = CLK_TYPE_PERIPHERAL,
63};
64static struct clk usart1_clk = {
65 .name = "usart1_clk",
66 .pmc_mask = 1 << AT91SAM9261_ID_US1,
67 .type = CLK_TYPE_PERIPHERAL,
68};
69static struct clk usart2_clk = {
70 .name = "usart2_clk",
71 .pmc_mask = 1 << AT91SAM9261_ID_US2,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk mmc_clk = {
75 .name = "mci_clk",
76 .pmc_mask = 1 << AT91SAM9261_ID_MCI,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk udc_clk = {
80 .name = "udc_clk",
81 .pmc_mask = 1 << AT91SAM9261_ID_UDP,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk twi_clk = {
85 .name = "twi_clk",
86 .pmc_mask = 1 << AT91SAM9261_ID_TWI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk spi0_clk = {
90 .name = "spi0_clk",
91 .pmc_mask = 1 << AT91SAM9261_ID_SPI0,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk spi1_clk = {
95 .name = "spi1_clk",
96 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk ohci_clk = {
100 .name = "ohci_clk",
101 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk lcdc_clk = {
105 .name = "lcdc_clk",
106 .pmc_mask = 1 << AT91SAM9261_ID_LCDC,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109
110static struct clk *periph_clocks[] __initdata = {
111 &pioA_clk,
112 &pioB_clk,
113 &pioC_clk,
114 &usart0_clk,
115 &usart1_clk,
116 &usart2_clk,
117 &mmc_clk,
118 &udc_clk,
119 &twi_clk,
120 &spi0_clk,
121 &spi1_clk,
122 // ssc 0 .. ssc2
123 // tc0 .. tc2
124 &ohci_clk,
125 &lcdc_clk,
126 // irq0 .. irq2
127};
128
129/*
130 * The four programmable clocks.
131 * You must configure pin multiplexing to bring these signals out.
132 */
133static struct clk pck0 = {
134 .name = "pck0",
135 .pmc_mask = AT91_PMC_PCK0,
136 .type = CLK_TYPE_PROGRAMMABLE,
137 .id = 0,
138};
139static struct clk pck1 = {
140 .name = "pck1",
141 .pmc_mask = AT91_PMC_PCK1,
142 .type = CLK_TYPE_PROGRAMMABLE,
143 .id = 1,
144};
145static struct clk pck2 = {
146 .name = "pck2",
147 .pmc_mask = AT91_PMC_PCK2,
148 .type = CLK_TYPE_PROGRAMMABLE,
149 .id = 2,
150};
151static struct clk pck3 = {
152 .name = "pck3",
153 .pmc_mask = AT91_PMC_PCK3,
154 .type = CLK_TYPE_PROGRAMMABLE,
155 .id = 3,
156};
157
158/* HClocks */
159static struct clk hck0 = {
160 .name = "hck0",
161 .pmc_mask = AT91_PMC_HCK0,
162 .type = CLK_TYPE_SYSTEM,
163 .id = 0,
164};
165static struct clk hck1 = {
166 .name = "hck1",
167 .pmc_mask = AT91_PMC_HCK1,
168 .type = CLK_TYPE_SYSTEM,
169 .id = 1,
170};
171
172static void __init at91sam9261_register_clocks(void)
173{
174 int i;
175
176 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
177 clk_register(periph_clocks[i]);
178
179 clk_register(&pck0);
180 clk_register(&pck1);
181 clk_register(&pck2);
182 clk_register(&pck3);
183
184 clk_register(&hck0);
185 clk_register(&hck1);
186}
187
188/* --------------------------------------------------------------------
189 * GPIO
190 * -------------------------------------------------------------------- */
191
192static struct at91_gpio_bank at91sam9261_gpio[] = {
193 {
194 .id = AT91SAM9261_ID_PIOA,
195 .offset = AT91_PIOA,
196 .clock = &pioA_clk,
197 }, {
198 .id = AT91SAM9261_ID_PIOB,
199 .offset = AT91_PIOB,
200 .clock = &pioB_clk,
201 }, {
202 .id = AT91SAM9261_ID_PIOC,
203 .offset = AT91_PIOC,
204 .clock = &pioC_clk,
205 }
206};
207
208static void at91sam9261_reset(void)
209{
210#warning "Implement CPU reset"
211}
212
213
214/* --------------------------------------------------------------------
215 * AT91SAM9261 processor initialization
216 * -------------------------------------------------------------------- */
217
218void __init at91sam9261_initialize(unsigned long main_clock)
219{
220 /* Map peripherals */
221 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
222
223 at91_arch_reset = at91sam9261_reset;
224 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
225 | (1 << AT91SAM9261_ID_IRQ2);
226
227 /* Init clock subsystem */
228 at91_clock_init(main_clock);
229
230 /* Register the processor-specific clocks */
231 at91sam9261_register_clocks();
232
233 /* Register GPIO subsystem */
234 at91_gpio_init(at91sam9261_gpio, 3);
235}
236
237/* --------------------------------------------------------------------
238 * Interrupt initialization
239 * -------------------------------------------------------------------- */
240
241/*
242 * The default interrupt priority levels (0 = lowest, 7 = highest).
243 */
244static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
245 7, /* Advanced Interrupt Controller */
246 7, /* System Peripherals */
247 0, /* Parallel IO Controller A */
248 0, /* Parallel IO Controller B */
249 0, /* Parallel IO Controller C */
250 0,
251 6, /* USART 0 */
252 6, /* USART 1 */
253 6, /* USART 2 */
254 0, /* Multimedia Card Interface */
255 4, /* USB Device Port */
256 0, /* Two-Wire Interface */
257 6, /* Serial Peripheral Interface 0 */
258 6, /* Serial Peripheral Interface 1 */
259 5, /* Serial Synchronous Controller 0 */
260 5, /* Serial Synchronous Controller 1 */
261 5, /* Serial Synchronous Controller 2 */
262 0, /* Timer Counter 0 */
263 0, /* Timer Counter 1 */
264 0, /* Timer Counter 2 */
265 3, /* USB Host port */
266 3, /* LCD Controller */
267 0,
268 0,
269 0,
270 0,
271 0,
272 0,
273 0,
274 0, /* Advanced Interrupt Controller */
275 0, /* Advanced Interrupt Controller */
276 0, /* Advanced Interrupt Controller */
277};
278
279void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
280{
281 if (!priority)
282 priority = at91sam9261_default_irq_priority;
283
284 /* Initialize the AIC interrupt controller */
285 at91_aic_init(priority);
286
287 /* Enable GPIO interrupts */
288 at91_gpio_irq_setup();
289}
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index fd98e353c5a2..8c4d5a77d485 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -10,14 +10,19 @@
10 10
11 /* Processors */ 11 /* Processors */
12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks); 12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
13extern void __init at91sam9260_initialize(unsigned long main_clock);
14extern void __init at91sam9261_initialize(unsigned long main_clock);
13 15
14 /* Interrupts */ 16 /* Interrupts */
15extern void __init at91rm9200_init_interrupts(unsigned int priority[]); 17extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
18extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
19extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
16extern void __init at91_aic_init(unsigned int priority[]); 20extern void __init at91_aic_init(unsigned int priority[]);
17 21
18 /* Timer */ 22 /* Timer */
19struct sys_timer; 23struct sys_timer;
20extern struct sys_timer at91rm9200_timer; 24extern struct sys_timer at91rm9200_timer;
25extern struct sys_timer at91sam926x_timer;
21 26
22 /* Clocks */ 27 /* Clocks */
23extern int __init at91_clock_init(unsigned long main_clock); 28extern int __init at91_clock_init(unsigned long main_clock);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 05:06:02 -0500