diff options
author | Magnus Damm <damm@opensource.se> | 2011-10-12 03:21:16 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-11-04 12:01:50 -0400 |
commit | e753068093c4c4da80771bd5ee53a6a782dee7b6 (patch) | |
tree | 13eeb14fa3542a38f67b1a7f41731cba188130d3 /arch/arm | |
parent | 13fc7e7c2cd08a884f76eeb940957160b296d5c3 (diff) |
ARM: mach-shmobile: Use common INTC IRQ code on sh7367
Make use of INTC_IRQ_PINS_16() for INTCA on sh7367.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-shmobile/intc-sh7367.c | 40 |
1 files changed, 6 insertions, 34 deletions
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c index cc442d198cdc..cfde9bfc3669 100644 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ b/arch/arm/mach-shmobile/intc-sh7367.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/sh_intc.h> | 24 | #include <linux/sh_intc.h> |
25 | #include <mach/intc.h> | ||
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
27 | 28 | ||
@@ -31,8 +32,6 @@ enum { | |||
31 | DISABLED, | 32 | DISABLED, |
32 | 33 | ||
33 | /* interrupt sources INTCA */ | 34 | /* interrupt sources INTCA */ |
34 | IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, | ||
35 | IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A, | ||
36 | DIRC, | 35 | DIRC, |
37 | CRYPT1_ERR, CRYPT2_STD, | 36 | CRYPT1_ERR, CRYPT2_STD, |
38 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, | 37 | IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, |
@@ -76,14 +75,6 @@ enum { | |||
76 | }; | 75 | }; |
77 | 76 | ||
78 | static struct intc_vect intca_vectors[] __initdata = { | 77 | static struct intc_vect intca_vectors[] __initdata = { |
79 | INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220), | ||
80 | INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260), | ||
81 | INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0), | ||
82 | INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0), | ||
83 | INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320), | ||
84 | INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360), | ||
85 | INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0), | ||
86 | INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), | ||
87 | INTC_VECT(DIRC, 0x0560), | 78 | INTC_VECT(DIRC, 0x0560), |
88 | INTC_VECT(CRYPT1_ERR, 0x05e0), | 79 | INTC_VECT(CRYPT1_ERR, 0x05e0), |
89 | INTC_VECT(CRYPT2_STD, 0x0700), | 80 | INTC_VECT(CRYPT2_STD, 0x0700), |
@@ -163,10 +154,6 @@ static struct intc_group intca_groups[] __initdata = { | |||
163 | }; | 154 | }; |
164 | 155 | ||
165 | static struct intc_mask_reg intca_mask_registers[] __initdata = { | 156 | static struct intc_mask_reg intca_mask_registers[] __initdata = { |
166 | { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */ | ||
167 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
168 | { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */ | ||
169 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
170 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ | 157 | { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ |
171 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, | 158 | { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, |
172 | ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } }, | 159 | ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } }, |
@@ -212,11 +199,6 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { | |||
212 | }; | 199 | }; |
213 | 200 | ||
214 | static struct intc_prio_reg intca_prio_registers[] __initdata = { | 201 | static struct intc_prio_reg intca_prio_registers[] __initdata = { |
215 | { 0xe6900010, 0, 32, 4, /* INTPRI00A */ | ||
216 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
217 | { 0xe6900014, 0, 32, 4, /* INTPRI10A */ | ||
218 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
219 | |||
220 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, | 202 | { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, |
221 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } }, | 203 | { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } }, |
222 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD, | 204 | { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD, |
@@ -240,29 +222,18 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
240 | { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } }, | 222 | { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } }, |
241 | }; | 223 | }; |
242 | 224 | ||
243 | static struct intc_sense_reg intca_sense_registers[] __initdata = { | ||
244 | { 0xe6900000, 16, 2, /* ICR1A */ | ||
245 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
246 | { 0xe6900004, 16, 2, /* ICR2A */ | ||
247 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
248 | }; | ||
249 | |||
250 | static struct intc_mask_reg intca_ack_registers[] __initdata = { | ||
251 | { 0xe6900020, 0, 8, /* INTREQ00A */ | ||
252 | { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } }, | ||
253 | { 0xe6900024, 0, 8, /* INTREQ10A */ | ||
254 | { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, | ||
255 | }; | ||
256 | |||
257 | static struct intc_desc intca_desc __initdata = { | 225 | static struct intc_desc intca_desc __initdata = { |
258 | .name = "sh7367-intca", | 226 | .name = "sh7367-intca", |
259 | .force_enable = ENABLED, | 227 | .force_enable = ENABLED, |
260 | .force_disable = DISABLED, | 228 | .force_disable = DISABLED, |
261 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, | 229 | .hw = INTC_HW_DESC(intca_vectors, intca_groups, |
262 | intca_mask_registers, intca_prio_registers, | 230 | intca_mask_registers, intca_prio_registers, |
263 | intca_sense_registers, intca_ack_registers), | 231 | NULL, NULL), |
264 | }; | 232 | }; |
265 | 233 | ||
234 | INTC_IRQ_PINS_16(intca_irq_pins, 0xe6900000, | ||
235 | INTC_VECT, "sh7367-intca-irq-pins"); | ||
236 | |||
266 | enum { | 237 | enum { |
267 | UNUSED_INTCS = 0, | 238 | UNUSED_INTCS = 0, |
268 | 239 | ||
@@ -432,6 +403,7 @@ void __init sh7367_init_irq(void) | |||
432 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); | 403 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); |
433 | 404 | ||
434 | register_intc_controller(&intca_desc); | 405 | register_intc_controller(&intca_desc); |
406 | register_intc_controller(&intca_irq_pins_desc); | ||
435 | register_intc_controller(&intcs_desc); | 407 | register_intc_controller(&intcs_desc); |
436 | 408 | ||
437 | /* demux using INTEVTSA */ | 409 | /* demux using INTEVTSA */ |