Merge branch 'for-russell' of git://hansjkoch.de/git/linux-tcc into HEAD

Conflicts:
	arch/arm/plat-omap/include/plat/common.h

212 files changed, 1576 insertions, 3912 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983f..849e3ad93707 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -220,8 +220,9 @@ config NEED_MACH_MEMORY_H
           be avoided when possible.
 
 config PHYS_OFFSET
-        hex "Physical address of main memory"
+        hex "Physical address of main memory" if MMU
         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
+        default DRAM_BASE if !MMU
         help
           Please provide the physical address corresponding to the
           location of main memory in your system.
@@ -867,16 +868,6 @@ config ARCH_SHARK
           Support for the StrongARM based Digital DNARD machine, also known
           as "Shark" (<http://www.shark-linux.de/shark.html>).
 
-config ARCH_TCC_926
-        bool "Telechips TCC ARM926-based systems"
-        select CLKSRC_MMIO
-        select CPU_ARM926T
-        select HAVE_CLK
-        select CLKDEV_LOOKUP
-        select GENERIC_CLOCKEVENTS
-        help
-          Support for Telechips TCC ARM926-based systems.
-
 config ARCH_U300
         bool "ST-Ericsson U300 Series"
         depends on MMU
@@ -1059,8 +1050,6 @@ source "arch/arm/plat-s5p/Kconfig"
 
 source "arch/arm/plat-spear/Kconfig"
 
-source "arch/arm/plat-tcc/Kconfig"
-
 if ARCH_S3C2410
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-s3c2412/Kconfig"
@@ -1231,7 +1220,7 @@ config ARM_ERRATA_742231
           capabilities of the processor.
 
 config PL310_ERRATA_588369
-        bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
+        bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
         depends on CACHE_L2X0
         help
            The PL310 L2 cache controller implements three types of Clean &
@@ -1256,7 +1245,7 @@ config ARM_ERRATA_720789
           entries regardless of the ASID.
 
 config PL310_ERRATA_727915
-        bool "Background Clean & Invalidate by Way operation can cause data corruption"
+        bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
         depends on CACHE_L2X0
         help
           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
@@ -1289,8 +1278,8 @@ config ARM_ERRATA_751472
           operation is received by a CPU before the ICIALLUIS has completed,
           potentially leading to corrupted entries in the cache or TLB.
 
-config ARM_ERRATA_753970
-        bool "ARM errata: cache sync operation may be faulty"
+config PL310_ERRATA_753970
+        bool "PL310 errata: cache sync operation may be faulty"
         depends on CACHE_PL310
         help
           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
@@ -1352,6 +1341,18 @@ config ARM_ERRATA_764369
           relevant cache maintenance functions and sets a specific bit
           in the diagnostic control register of the SCU.
 
+config PL310_ERRATA_769419
+        bool "PL310 errata: no automatic Store Buffer drain"
+        depends on CACHE_L2X0
+        help
+          On revisions of the PL310 prior to r3p2, the Store Buffer does
+          not automatically drain. This can cause normal, non-cacheable
+          writes to be retained when the memory system is idle, leading
+          to suboptimal I/O performance for drivers using coherent DMA.
+          This option adds a write barrier to the cpu_idle loop so that,
+          on systems with an outer cache, the store buffer is drained
+          explicitly.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dfcf3b033e10..40319d91bb7f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4)		:= exynos
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
 machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
-machine-$(CONFIG_ARCH_TCC8K)            := tcc8k
 machine-$(CONFIG_ARCH_TEGRA)            := tegra
 machine-$(CONFIG_ARCH_U300)             := u300
 machine-$(CONFIG_ARCH_U8500)            := ux500
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ)		:= zynq
 plat-$(CONFIG_ARCH_MXC)         := mxc
 plat-$(CONFIG_ARCH_OMAP)        := omap
 plat-$(CONFIG_ARCH_S3C64XX)     := samsung
-plat-$(CONFIG_ARCH_TCC_926)     := tcc
 plat-$(CONFIG_ARCH_ZYNQ)        := versatile
 plat-$(CONFIG_PLAT_IOP)         := iop
 plat-$(CONFIG_PLAT_NOMADIK)     := nomadik
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 176062ac7f07..5df26a9976a2 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -65,6 +65,8 @@ $(obj)/%.dtb: $(src)/dts/%.dts
 
 $(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
 
+clean-files := *.dtb
+
 quiet_cmd_uimage = UIMAGE  $@
       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \
                    -C none -a $(LOADADDR) -e $(STARTADDR) \
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 9b29a623aaf1..3f9abd6b6964 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -22,11 +22,10 @@
         sdhci@c8000400 {
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-                power-gpios = <&gpio 155 0>; /* gpio PT3 */
+                power-gpios = <&gpio 70 0>; /* gpio PI6 */
         };
 
         sdhci@c8000600 {
-                power-gpios = <&gpio 70 0>; /* gpio PI6 */
                 support-8bit;
         };
 };
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0e6ae470c94f..410a546060a2 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -526,7 +526,8 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
                 sizeof(u32));
         BUG_ON(!gic->saved_ppi_conf);
 
-        cpu_pm_register_notifier(&gic_notifier_block);
+        if (gic == &gic_data[0])
+                cpu_pm_register_notifier(&gic_notifier_block);
 }
 #else
 static void __init gic_pm_init(struct gic_chip_data *gic)
@@ -581,13 +582,16 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
          * For primary GICs, skip over SGIs.
          * For secondary GICs, skip over PPIs, too.
          */
+        domain->hwirq_base = 32;
         if (gic_nr == 0) {
                 gic_cpu_base_addr = cpu_base;
-                domain->hwirq_base = 16;
-                if (irq_start > 0)
-                        irq_start = (irq_start & ~31) + 16;
-        } else
-                domain->hwirq_base = 32;
+
+                if ((irq_start & 31) > 0) {
+                        domain->hwirq_base = 16;
+                        if (irq_start != -1)
+                                irq_start = (irq_start & ~31) + 16;
+                }
+        }
 
         /*
          * Find out how many interrupts are supported.
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 7129cfbdacd6..f407a6b35d3d 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1211,8 +1211,8 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
         ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
         ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
 
-        ccr |= (rqc->dcctl << CC_SRCCCTRL_SHFT);
-        ccr |= (rqc->scctl << CC_DSTCCTRL_SHFT);
+        ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
+        ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
 
         ccr |= (rqc->swap << CC_SWAP_SHFT);
 
@@ -1623,6 +1623,11 @@ static inline int _alloc_event(struct pl330_thread *thrd)
         return -1;
 }
 
+static bool _chan_ns(const struct pl330_info *pi, int i)
+{
+        return pi->pcfg.irq_ns & (1 << i);
+}
+
 /* Upon success, returns IdentityToken for the
  * allocated channel, NULL otherwise.
  */
@@ -1647,7 +1652,8 @@ void *pl330_request_channel(const struct pl330_info *pi)
 
         for (i = 0; i < chans; i++) {
                 thrd = &pl330->channels[i];
-                if (thrd->free) {
+                if ((thrd->free) && (!_manager_ns(thrd) ||
+                                        _chan_ns(pi, i))) {
                         thrd->ev = _alloc_event(thrd);
                         if (thrd->ev >= 0) {
                                 thrd->free = false;
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9_defconfig
index ffb1edd93363..8826eb218e73 100644
--- a/arch/arm/configs/at91cap9adk_defconfig
+++ b/arch/arm/configs/at91cap9_defconfig
@@ -38,7 +38,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -52,16 +51,12 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -81,7 +76,6 @@ CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_CLUT224 is not set
@@ -99,7 +93,6 @@ CONFIG_MMC_AT91=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
index 38cb7c985426..bbe4e1a1f5d8 100644
--- a/arch/arm/configs/at91rm9200_defconfig
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
@@ -56,7 +55,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
 CONFIG_INET_IPCOMP=m
@@ -75,18 +73,8 @@ CONFIG_IPV6_TUNNEL=m
 CONFIG_BRIDGE=m
 CONFIG_VLAN_8021Q=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_AFS_PARTS=y
 CONFIG_MTD_CHAR=y
@@ -108,8 +96,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_LEGACY=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=m
@@ -119,14 +105,23 @@ CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_TUN=m
+CONFIG_ARM_AT91_ETHER=y
 CONFIG_PHYLIB=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_SMSC_PHY=y
 CONFIG_MICREL_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_ARM_AT91_ETHER=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=m
+CONFIG_PPP_ASYNC=y
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
 CONFIG_USB_CATC=m
 CONFIG_USB_KAWETH=m
 CONFIG_USB_PEGASUS=m
@@ -139,18 +134,6 @@ CONFIG_USB_NET_RNDIS_HOST=m
 CONFIG_USB_ALI_M5632=y
 CONFIG_USB_AN2720=y
 CONFIG_USB_EPSON2888=y
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPPOE=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
@@ -158,9 +141,9 @@ CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_LEGACY_PTY_COUNT=32
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=32
 CONFIG_HW_RANDOM=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -290,7 +273,6 @@ CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
-CONFIG_SMB_FS=m
 CONFIG_CIFS=m
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAC_PARTITION=y
@@ -335,7 +317,6 @@ CONFIG_NLS_UTF8=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_FTRACE is not set
 CONFIG_CRYPTO_PCBC=y
 CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260_defconfig
index f8a9226413bf..505b3765f87e 100644
--- a/arch/arm/configs/at91sam9260ek_defconfig
+++ b/arch/arm/configs/at91sam9260_defconfig
@@ -12,11 +12,23 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9260=y
+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
 CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
 CONFIG_FPE_NWFPE=y
 CONFIG_NET=y
@@ -33,12 +45,10 @@ CONFIG_IP_PNP_BOOTP=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -55,7 +65,6 @@ CONFIG_I2C_GPIO=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_VGA_CONSOLE is not set
 # CONFIG_USB_HID is not set
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
@@ -71,7 +80,6 @@ CONFIG_USB_G_SERIAL=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_CRAMFS=y
diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index 9e90e6d79297..9123568d9a8d 100644
--- a/arch/arm/configs/at91sam9g20ek_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -14,6 +14,15 @@ CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_MACH_AT91SAM9G20EK=y
 CONFIG_MACH_AT91SAM9G20EK_2MMC=y
+CONFIG_MACH_CPU9G20=y
+CONFIG_MACH_ACMENETUSFOXG20=y
+CONFIG_MACH_PORTUXG20=y
+CONFIG_MACH_STAMP9G20=y
+CONFIG_MACH_PCONTROL_G20=y
+CONFIG_MACH_GSIA18S=y
+CONFIG_MACH_USB_A9G20=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_AEABI=y
@@ -21,9 +30,10 @@ CONFIG_LEDS=y
 CONFIG_LEDS_CPU=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -37,8 +47,6 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -48,17 +56,13 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
@@ -66,15 +70,14 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_HW_RANDOM=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_SEQUENCER=y
@@ -82,7 +85,6 @@ CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
 CONFIG_SND_SEQUENCER_OSS=y
 # CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_AT73C213=y
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
@@ -105,7 +107,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
index c5876d244f4b..606d48f3b8f8 100644
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -18,6 +18,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9G45=y
 CONFIG_MACH_AT91SAM9M10G45EK=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 CONFIG_AT91_SLOW_CLOCK=y
 CONFIG_AEABI=y
@@ -73,11 +74,8 @@ CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_MII=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_DAVICOM_PHY=y
 CONFIG_LIBERTAS_THINFIRM=m
 CONFIG_LIBERTAS_THINFIRM_USB=m
 CONFIG_AT76C50X_USB=m
@@ -131,7 +129,6 @@ CONFIG_I2C_GPIO=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 # CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
 CONFIG_FB_UDL=m
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rl_defconfig
index 75621e4d03fc..ad562ee64209 100644
--- a/arch/arm/configs/at91sam9rlek_defconfig
+++ b/arch/arm/configs/at91sam9rl_defconfig
@@ -23,8 +23,6 @@ CONFIG_NET=y
 CONFIG_UNIX=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -35,7 +33,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=4
 CONFIG_BLK_DEV_RAM_SIZE=24576
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
@@ -62,13 +59,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_MMC=y
 CONFIG_MMC_AT91=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
index 227a477346ed..d95763d5f0d8 100644
--- a/arch/arm/configs/ezx_defconfig
+++ b/arch/arm/configs/ezx_defconfig
@@ -287,7 +287,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_MMC=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index 176ec22af034..fd996bb13022 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -263,7 +263,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_MMC=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index a88e64d4e9a5..443675d317e6 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -132,7 +132,7 @@ CONFIG_USB_MON=m
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VBUS_DRAW=500
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_USB_GADGETFS=m
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7b63462b349d..945a34f2a34d 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,13 +48,7 @@ CONFIG_MACH_SX1=y
 CONFIG_MACH_NOKIA770=y
 CONFIG_MACH_AMS_DELTA=y
 CONFIG_MACH_OMAP_GENERIC=y
-CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
-CONFIG_OMAP_ARM_216MHZ=y
-CONFIG_OMAP_ARM_195MHZ=y
-CONFIG_OMAP_ARM_192MHZ=y
 CONFIG_OMAP_ARM_182MHZ=y
-CONFIG_OMAP_ARM_168MHZ=y
-# CONFIG_OMAP_ARM_60MHZ is not set
 # CONFIG_ARM_THUMB is not set
 CONFIG_PCCARD=y
 CONFIG_OMAP_CF=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index 4a5a12681be2..374000ec4e4e 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -14,8 +14,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U300=y
 CONFIG_MACH_U300=y
 CONFIG_MACH_U300_BS335=y
-CONFIG_MACH_U300_DUAL_RAM=y
-CONFIG_U300_DEBUG=y
 CONFIG_MACH_U300_SPIDUMMY=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -26,19 +24,21 @@ CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
 CONFIG_CPU_IDLE=y
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 # CONFIG_SUSPEND is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_MISC_DEVICES is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSMC=y
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 # CONFIG_HWMON is not set
@@ -51,6 +51,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
+CONFIG_MMC_CLKGATE=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
@@ -65,10 +66,8 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_PREEMPT is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 97d31a4663da..2d7b6e7b7271 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -10,7 +10,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U8500=y
 CONFIG_UX500_SOC_DB5500=y
 CONFIG_UX500_SOC_DB8500=y
-CONFIG_MACH_U8500=y
+CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_U5500=y
 CONFIG_NO_HZ=y
@@ -24,6 +24,7 @@ CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_VFP=y
 CONFIG_NEON=y
+CONFIG_PM_RUNTIME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -41,11 +42,8 @@ CONFIG_MISC_DEVICES=y
 CONFIG_AB8500_PWM=y
 CONFIG_SENSORS_BH1780=y
 CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_SMSC_PHY=y
 # CONFIG_WLAN is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
@@ -72,15 +70,12 @@ CONFIG_SPI=y
 CONFIG_SPI_PL022=y
 CONFIG_GPIO_STMPE=y
 CONFIG_GPIO_TC3589X=y
-# CONFIG_HWMON is not set
 CONFIG_MFD_STMPE=y
 CONFIG_MFD_TC3589X=y
+CONFIG_AB5500_CORE=y
 CONFIG_AB8500_CORE=y
 CONFIG_REGULATOR_AB8500=y
 # CONFIG_HID_SUPPORT is not set
-CONFIG_USB_MUSB_HDRC=y
-CONFIG_USB_GADGET_MUSB_HDRC=y
-CONFIG_MUSB_PIO_ONLY=y
 CONFIG_USB_GADGET=y
 CONFIG_AB8500_USB=y
 CONFIG_MMC=y
@@ -97,6 +92,7 @@ CONFIG_DMADEVICES=y
 CONFIG_STE_DMA40=y
 CONFIG_STAGING=y
 CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
+CONFIG_HSEM_U8500=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
index 59577ad3f4ef..547a3c1e59db 100644
--- a/arch/arm/configs/zeus_defconfig
+++ b/arch/arm/configs/zeus_defconfig
@@ -140,7 +140,7 @@ CONFIG_USB_SERIAL=m
 CONFIG_USB_SERIAL_GENERIC=y
 CONFIG_USB_SERIAL_MCT_U232=m
 CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_FILE_STORAGE=m
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 1db1143a9483..7df239bcdf27 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -20,6 +20,8 @@
 #ifndef __ASM_ARM_HARDWARE_L2X0_H
 #define __ASM_ARM_HARDWARE_L2X0_H
 
+#include <linux/errno.h>
+
 #define L2X0_CACHE_ID                   0x000
 #define L2X0_CACHE_TYPE                 0x004
 #define L2X0_CTRL                       0x100
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 7d19425dd496..2b0efc3104ac 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -13,6 +13,7 @@
 struct tag;
 struct meminfo;
 struct sys_timer;
+struct pt_regs;
 
 struct machine_desc {
         unsigned int            nr;             /* architecture number  */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 71d99b83cdb9..0bda22c094a6 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -55,16 +55,6 @@ reserve_pmu(enum arm_pmu_type type);
 extern void
 release_pmu(enum arm_pmu_type type);
 
-/**
- * init_pmu() - Initialise the PMU.
- *
- * Initialise the system ready for PMU enabling. This should typically set the
- * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do
- * the actual hardware initialisation.
- */
-extern int
-init_pmu(enum arm_pmu_type type);
-
 #else /* CONFIG_CPU_HAS_PMU */
 
 #include <linux/err.h>
diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
index a7e457ed27c3..58b8b84adcd2 100644
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -25,7 +25,7 @@ extern struct cputopo_arm cpu_topology[NR_CPUS];
 
 void init_cpu_topology(void);
 void store_cpu_topology(unsigned int cpuid);
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
+const struct cpumask *cpu_coregroup_mask(int cpu);
 
 #else
 
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index c60a2944f95b..4a1123783806 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -402,6 +402,8 @@
 #define __NR_syncfs                     (__NR_SYSCALL_BASE+373)
 #define __NR_sendmmsg                   (__NR_SYSCALL_BASE+374)
 #define __NR_setns                      (__NR_SYSCALL_BASE+375)
+#define __NR_process_vm_readv           (__NR_SYSCALL_BASE+376)
+#define __NR_process_vm_writev          (__NR_SYSCALL_BASE+377)
 
 /*
  * The following SWIs are ARM private.
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h
index a5edf421005c..d1c3f3a71c94 100644
--- a/arch/arm/include/asm/unwind.h
+++ b/arch/arm/include/asm/unwind.h
@@ -30,14 +30,15 @@ enum unwind_reason_code {
 };
 
 struct unwind_idx {
-        unsigned long addr;
+        unsigned long addr_offset;
         unsigned long insn;
 };
 
 struct unwind_table {
         struct list_head list;
-        struct unwind_idx *start;
-        struct unwind_idx *stop;
+        const struct unwind_idx *start;
+        const struct unwind_idx *origin;
+        const struct unwind_idx *stop;
         unsigned long begin_addr;
         unsigned long end_addr;
 };
@@ -49,15 +50,6 @@ extern struct unwind_table *unwind_table_add(unsigned long start,
 extern void unwind_table_del(struct unwind_table *tab);
 extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk);
 
-#ifdef CONFIG_ARM_UNWIND
-extern int __init unwind_init(void);
-#else
-static inline int __init unwind_init(void)
-{
-        return 0;
-}
-#endif
-
 #endif  /* !__ASSEMBLY__ */
 
 #ifdef CONFIG_ARM_UNWIND
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9943e9e74a1b..463ff4a0ec8a 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -385,6 +385,8 @@
                 CALL(sys_syncfs)
                 CALL(sys_sendmmsg)
 /* 375 */       CALL(sys_setns)
+                CALL(sys_process_vm_readv)
+                CALL(sys_process_vm_writev)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 9ad50c4208ae..b145f16c91bc 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -497,7 +497,7 @@ ENDPROC(__und_usr)
         .popsection
         .pushsection __ex_table,"a"
         .long   1b, 4b
-#if __LINUX_ARM_ARCH__ >= 7
+#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
         .long   2b, 4b
         .long   3b, 4b
 #endif
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 566c54c2a1fe..08c82fd844a8 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -360,7 +360,7 @@ __secondary_data:
  *  r13 = *virtual* address to jump to upon completion
  */
 __enable_mmu:
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
         orr     r0, r0, #CR_A
 #else
         bic     r0, r0, #CR_A
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c
index 9fe8910308af..8a30c89da70e 100644
--- a/arch/arm/kernel/kprobes-arm.c
+++ b/arch/arm/kernel/kprobes-arm.c
@@ -519,10 +519,12 @@ static const union decode_item arm_cccc_0000_____1001_table[] = {
 static const union decode_item arm_cccc_0001_____1001_table[] = {
         /* Synchronization primitives                                   */
 
+#if __LINUX_ARM_ARCH__ < 6
+        /* Deprecated on ARMv6 and may be UNDEFINED on v7               */
         /* SMP/SWPB             cccc 0001 0x00 xxxx xxxx xxxx 1001 xxxx */
         DECODE_EMULATEX (0x0fb000f0, 0x01000090, emulate_rd12rn16rm0_rwflags_nopc,
                                                  REGS(NOPC, NOPC, 0, 0, NOPC)),
-
+#endif
         /* LDREX/STREX{,D,B,H}  cccc 0001 1xxx xxxx xxxx xxxx 1001 xxxx */
         /* And unallocated instructions...                              */
         DECODE_END
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index fc82de8bdcce..ba32b393b3f0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -427,18 +427,25 @@ void kprobe_arm_test_cases(void)
 
         TEST_GROUP("Synchronization primitives")
 
-        /*
-         * Use hard coded constants for SWP instructions to avoid warnings
-         * about deprecated instructions.
-         */
-        TEST_RP( ".word 0xe108e097 @ swp        lr, r",7,VAL2,", [r",8,0,"]")
-        TEST_R(  ".word 0x610d0091 @ swpvs      r0, r",1,VAL1,", [sp]")
-        TEST_RP( ".word 0xe10cd09e @ swp        sp, r",14,VAL2,", [r",12,13*4,"]")
+#if __LINUX_ARM_ARCH__ < 6
+        TEST_RP("swp    lr, r",7,VAL2,", [r",8,0,"]")
+        TEST_R( "swpvs  r0, r",1,VAL1,", [sp]")
+        TEST_RP("swp    sp, r",14,VAL2,", [r",12,13*4,"]")
+#else
+        TEST_UNSUPPORTED(".word 0xe108e097 @ swp        lr, r7, [r8]")
+        TEST_UNSUPPORTED(".word 0x610d0091 @ swpvs      r0, r1, [sp]")
+        TEST_UNSUPPORTED(".word 0xe10cd09e @ swp        sp, r14 [r12]")
+#endif
         TEST_UNSUPPORTED(".word 0xe102f091 @ swp pc, r1, [r2]")
         TEST_UNSUPPORTED(".word 0xe102009f @ swp r0, pc, [r2]")
         TEST_UNSUPPORTED(".word 0xe10f0091 @ swp r0, r1, [pc]")
-        TEST_RP( ".word 0xe148e097 @ swpb       lr, r",7,VAL2,", [r",8,0,"]")
-        TEST_R(  ".word 0x614d0091 @ swpvsb     r0, r",1,VAL1,", [sp]")
+#if __LINUX_ARM_ARCH__ < 6
+        TEST_RP("swpb   lr, r",7,VAL2,", [r",8,0,"]")
+        TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
+#else
+        TEST_UNSUPPORTED(".word 0xe148e097 @ swpb       lr, r7, [r8]")
+        TEST_UNSUPPORTED(".word 0x614d0091 @ swpvsb     r0, r1, [sp]")
+#endif
         TEST_UNSUPPORTED(".word 0xe142f091 @ swpb pc, r1, [r2]")
 
         TEST_UNSUPPORTED(".word 0xe1100090") /* Unallocated space */
@@ -550,7 +557,7 @@ void kprobe_arm_test_cases(void)
         TEST_RPR(  "strccd      r",8, VAL2,", [r",13,0, ", r",12,48,"]")
         TEST_RPR(  "strd        r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
         TEST_RPR(  "strcsd      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
-        TEST_RPR(  "strd        r",2, VAL1,", [r",3, 24,"], r",4,48,"")
+        TEST_RPR(  "strd        r",2, VAL1,", [r",5, 24,"], r",4,48,"")
         TEST_RPR(  "strd        r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
         TEST_UNSUPPORTED(".word 0xe1afc0fa      @ strd r12, [pc, r10]!")
 
diff --git a/arch/arm/kernel/kprobes-test-thumb.c b/arch/arm/kernel/kprobes-test-thumb.c
index 5e726c31c45a..5d8b85792222 100644
--- a/arch/arm/kernel/kprobes-test-thumb.c
+++ b/arch/arm/kernel/kprobes-test-thumb.c
@@ -222,8 +222,8 @@ void kprobe_thumb16_test_cases(void)
 DONT_TEST_IN_ITBLOCK(
         TEST_BF_R(  "cbnz       r",0,0, ", 2f")
         TEST_BF_R(  "cbz        r",2,-1,", 2f")
-        TEST_BF_RX( "cbnz       r",4,1, ", 2f",0x20)
-        TEST_BF_RX( "cbz        r",7,0, ", 2f",0x40)
+        TEST_BF_RX( "cbnz       r",4,1, ", 2f", SPACE_0x20)
+        TEST_BF_RX( "cbz        r",7,0, ", 2f", SPACE_0x40)
 )
         TEST_R("sxth    r0, r",7, HH1,"")
         TEST_R("sxth    r7, r",0, HH2,"")
@@ -246,7 +246,7 @@ DONT_TEST_IN_ITBLOCK(
         TESTCASE_START(code)            \
         TEST_ARG_PTR(13, offset)        \
         TEST_ARG_END("")                \
-        TEST_BRANCH_F(code,0)           \
+        TEST_BRANCH_F(code)             \
         TESTCASE_END
 
         TEST("push      {r0}")
@@ -319,8 +319,8 @@ CONDITION_INSTRUCTIONS(8,
 
         TEST_BF(  "b    2f")
         TEST_BB(  "b    2b")
-        TEST_BF_X("b    2f", 0x400)
-        TEST_BB_X("b    2b", 0x400)
+        TEST_BF_X("b    2f", SPACE_0x400)
+        TEST_BB_X("b    2b", SPACE_0x400)
 
         TEST_GROUP("Testing instructions in IT blocks")
 
@@ -746,7 +746,7 @@ CONDITION_INSTRUCTIONS(22,
         TEST_BB("bne.w  2b")
         TEST_BF("bgt.w  2f")
         TEST_BB("blt.w  2b")
-        TEST_BF_X("bpl.w        2f",0x1000)
+        TEST_BF_X("bpl.w        2f", SPACE_0x1000)
 )
 
         TEST_UNSUPPORTED("msr   cpsr, r0")
@@ -786,11 +786,11 @@ CONDITION_INSTRUCTIONS(22,
 
         TEST_BF(  "b.w  2f")
         TEST_BB(  "b.w  2b")
-        TEST_BF_X("b.w  2f", 0x1000)
+        TEST_BF_X("b.w  2f", SPACE_0x1000)
 
         TEST_BF(  "bl.w 2f")
         TEST_BB(  "bl.w 2b")
-        TEST_BB_X("bl.w 2b", 0x1000)
+        TEST_BB_X("bl.w 2b", SPACE_0x1000)
 
         TEST_X( "blx    __dummy_arm_subroutine",
                 ".arm                           \n\t"
diff --git a/arch/arm/kernel/kprobes-test.h b/arch/arm/kernel/kprobes-test.h
index 0dc5d77b9356..e28a869b1ae4 100644
--- a/arch/arm/kernel/kprobes-test.h
+++ b/arch/arm/kernel/kprobes-test.h
@@ -149,23 +149,31 @@ struct test_arg_end {
         "1:     "instruction"                           \n\t"   \
         "       nop                                     \n\t"
 
-#define TEST_BRANCH_F(instruction, xtra_dist)                   \
+#define TEST_BRANCH_F(instruction)                              \
         TEST_INSTRUCTION(instruction)                           \
-        ".if "#xtra_dist"                               \n\t"   \
         "       b       99f                             \n\t"   \
-        ".space "#xtra_dist"                            \n\t"   \
-        ".endif                                         \n\t"   \
+        "2:     nop                                     \n\t"
+
+#define TEST_BRANCH_B(instruction)                              \
+        "       b       50f                             \n\t"   \
+        "       b       99f                             \n\t"   \
+        "2:     nop                                     \n\t"   \
+        "       b       99f                             \n\t"   \
+        TEST_INSTRUCTION(instruction)
+
+#define TEST_BRANCH_FX(instruction, codex)                      \
+        TEST_INSTRUCTION(instruction)                           \
+        "       b       99f                             \n\t"   \
+        codex"                                          \n\t"   \
         "       b       99f                             \n\t"   \
         "2:     nop                                     \n\t"
 
-#define TEST_BRANCH_B(instruction, xtra_dist)                   \
+#define TEST_BRANCH_BX(instruction, codex)                      \
         "       b       50f                             \n\t"   \
         "       b       99f                             \n\t"   \
         "2:     nop                                     \n\t"   \
         "       b       99f                             \n\t"   \
-        ".if "#xtra_dist"                               \n\t"   \
-        ".space "#xtra_dist"                            \n\t"   \
-        ".endif                                         \n\t"   \
+        codex"                                          \n\t"   \
         TEST_INSTRUCTION(instruction)
 
 #define TESTCASE_END                                            \
@@ -301,47 +309,60 @@ struct test_arg_end {
         TESTCASE_START(code1 #reg1 code2)       \
         TEST_ARG_PTR(reg1, val1)                \
         TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code1 #reg1 code2, 0)     \
+        TEST_BRANCH_F(code1 #reg1 code2)        \
         TESTCASE_END
 
-#define TEST_BF_X(code, xtra_dist)              \
+#define TEST_BF(code)                           \
         TESTCASE_START(code)                    \
         TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code, xtra_dist)          \
+        TEST_BRANCH_F(code)                     \
         TESTCASE_END
 
-#define TEST_BB_X(code, xtra_dist)              \
+#define TEST_BB(code)                           \
         TESTCASE_START(code)                    \
         TEST_ARG_END("")                        \
-        TEST_BRANCH_B(code, xtra_dist)          \
+        TEST_BRANCH_B(code)                     \
         TESTCASE_END
 
-#define TEST_BF_RX(code1, reg, val, code2, xtra_dist)   \
-        TESTCASE_START(code1 #reg code2)                \
-        TEST_ARG_REG(reg, val)                          \
-        TEST_ARG_END("")                                \
-        TEST_BRANCH_F(code1 #reg code2, xtra_dist)      \
+#define TEST_BF_R(code1, reg, val, code2)       \
+        TESTCASE_START(code1 #reg code2)        \
+        TEST_ARG_REG(reg, val)                  \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_F(code1 #reg code2)         \
         TESTCASE_END
 
-#define TEST_BB_RX(code1, reg, val, code2, xtra_dist)   \
-        TESTCASE_START(code1 #reg code2)                \
-        TEST_ARG_REG(reg, val)                          \
-        TEST_ARG_END("")                                \
-        TEST_BRANCH_B(code1 #reg code2, xtra_dist)      \
+#define TEST_BB_R(code1, reg, val, code2)       \
+        TESTCASE_START(code1 #reg code2)        \
+        TEST_ARG_REG(reg, val)                  \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_B(code1 #reg code2)         \
         TESTCASE_END
 
-#define TEST_BF(code)   TEST_BF_X(code, 0)
-#define TEST_BB(code)   TEST_BB_X(code, 0)
-
-#define TEST_BF_R(code1, reg, val, code2) TEST_BF_RX(code1, reg, val, code2, 0)
-#define TEST_BB_R(code1, reg, val, code2) TEST_BB_RX(code1, reg, val, code2, 0)
-
 #define TEST_BF_RR(code1, reg1, val1, code2, reg2, val2, code3) \
         TESTCASE_START(code1 #reg1 code2 #reg2 code3)           \
         TEST_ARG_REG(reg1, val1)                                \
         TEST_ARG_REG(reg2, val2)                                \
         TEST_ARG_END("")                                        \
-        TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3, 0)         \
+        TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3)            \
+        TESTCASE_END
+
+#define TEST_BF_X(code, codex)                  \
+        TESTCASE_START(code)                    \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_FX(code, codex)             \
+        TESTCASE_END
+
+#define TEST_BB_X(code, codex)                  \
+        TESTCASE_START(code)                    \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_BX(code, codex)             \
+        TESTCASE_END
+
+#define TEST_BF_RX(code1, reg, val, code2, codex)       \
+        TESTCASE_START(code1 #reg code2)                \
+        TEST_ARG_REG(reg, val)                          \
+        TEST_ARG_END("")                                \
+        TEST_BRANCH_FX(code1 #reg code2, codex)         \
         TESTCASE_END
 
 #define TEST_X(code, codex)                     \
@@ -372,6 +393,25 @@ struct test_arg_end {
         TESTCASE_END
 
 
+/*
+ * Macros for defining space directives spread over multiple lines.
+ * These are required so the compiler guesses better the length of inline asm
+ * code and will spill the literal pool early enough to avoid generating PC
+ * relative loads with out of range offsets.
+ */
+#define TWICE(x)        x x
+#define SPACE_0x8       TWICE(".space 4\n\t")
+#define SPACE_0x10      TWICE(SPACE_0x8)
+#define SPACE_0x20      TWICE(SPACE_0x10)
+#define SPACE_0x40      TWICE(SPACE_0x20)
+#define SPACE_0x80      TWICE(SPACE_0x40)
+#define SPACE_0x100     TWICE(SPACE_0x80)
+#define SPACE_0x200     TWICE(SPACE_0x100)
+#define SPACE_0x400     TWICE(SPACE_0x200)
+#define SPACE_0x800     TWICE(SPACE_0x400)
+#define SPACE_0x1000    TWICE(SPACE_0x800)
+
+
 /* Various values used in test cases... */
 #define N(val)  (val ^ 0xffffffff)
 #define VAL1    0x12345678
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index c1b4463dcc83..e59bbd496c39 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -32,24 +32,6 @@ static atomic_t waiting_for_crash_ipi;
 
 int machine_kexec_prepare(struct kimage *image)
 {
-        unsigned long page_list;
-        void *reboot_code_buffer;
-        page_list = image->head & PAGE_MASK;
-
-        reboot_code_buffer = page_address(image->control_code_page);
-
-        /* Prepare parameters for reboot_code_buffer*/
-        kexec_start_address = image->start;
-        kexec_indirection_page = page_list;
-        kexec_mach_type = machine_arch_type;
-        kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
-
-        /* copy our kernel relocation code to the control code page */
-        memcpy(reboot_code_buffer,
-               relocate_new_kernel, relocate_new_kernel_size);
-
-        flush_icache_range((unsigned long) reboot_code_buffer,
-                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         return 0;
 }
 
@@ -100,14 +82,31 @@ void (*kexec_reinit)(void);
 
 void machine_kexec(struct kimage *image)
 {
+        unsigned long page_list;
         unsigned long reboot_code_buffer_phys;
         void *reboot_code_buffer;
 
+
+        page_list = image->head & PAGE_MASK;
+
         /* we need both effective and real address here */
         reboot_code_buffer_phys =
             page_to_pfn(image->control_code_page) << PAGE_SHIFT;
         reboot_code_buffer = page_address(image->control_code_page);
 
+        /* Prepare parameters for reboot_code_buffer*/
+        kexec_start_address = image->start;
+        kexec_indirection_page = page_list;
+        kexec_mach_type = machine_arch_type;
+        kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
+
+        /* copy our kernel relocation code to the control code page */
+        memcpy(reboot_code_buffer,
+               relocate_new_kernel, relocate_new_kernel_size);
+
+
+        flush_icache_range((unsigned long) reboot_code_buffer,
+                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         printk(KERN_INFO "Bye!\n");
 
         if (kexec_reinit)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 24e2347be6b1..88b0941ce51e 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -343,19 +343,25 @@ validate_group(struct perf_event *event)
 {
         struct perf_event *sibling, *leader = event->group_leader;
         struct pmu_hw_events fake_pmu;
+        DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
 
-        memset(&fake_pmu, 0, sizeof(fake_pmu));
+        /*
+         * Initialise the fake PMU. We only need to populate the
+         * used_mask for the purposes of validation.
+         */
+        memset(fake_used_mask, 0, sizeof(fake_used_mask));
+        fake_pmu.used_mask = fake_used_mask;
 
         if (!validate_event(&fake_pmu, leader))
-                return -ENOSPC;
+                return -EINVAL;
 
         list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
                 if (!validate_event(&fake_pmu, sibling))
-                        return -ENOSPC;
+                        return -EINVAL;
         }
 
         if (!validate_event(&fake_pmu, event))
-                return -ENOSPC;
+                return -EINVAL;
 
         return 0;
 }
@@ -396,6 +402,9 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
         int i, err, irq, irqs;
         struct platform_device *pmu_device = armpmu->plat_device;
 
+        if (!pmu_device)
+                return -ENODEV;
+
         err = reserve_pmu(armpmu->type);
         if (err) {
                 pr_warning("unable to reserve pmu\n");
@@ -631,6 +640,9 @@ static struct platform_device_id armpmu_plat_device_ids[] = {
 
 static int __devinit armpmu_device_probe(struct platform_device *pdev)
 {
+        if (!cpu_pmu)
+                return -ENODEV;
+
         cpu_pmu->plat_device = pdev;
         return 0;
 }
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index 2c3407ee8576..2334bf8a650a 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -33,3 +33,4 @@ release_pmu(enum arm_pmu_type type)
 {
         clear_bit_unlock(type, pmu_lock);
 }
+EXPORT_SYMBOL_GPL(release_pmu);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 75316f0dd02a..3d0c6fb74ae4 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -192,6 +192,9 @@ void cpu_idle(void)
 #endif
 
                         local_irq_disable();
+#ifdef CONFIG_PL310_ERRATA_769419
+                        wmb();
+#endif
                         if (hlt_counter) {
                                 local_irq_enable();
                                 cpu_relax();
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7e7977ab994f..8fc2c8fcbdc6 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -461,8 +461,10 @@ static void __init setup_processor(void)
                cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
                proc_arch[cpu_architecture()], cr_alignment);
 
-        sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
-        sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
+        snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
+                 list->arch_name, ENDIANNESS);
+        snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
+                 list->elf_name, ENDIANNESS);
         elf_hwcap = list->elf_hwcap;
 #ifndef CONFIG_ARM_THUMB
         elf_hwcap &= ~HWCAP_THUMB;
@@ -893,8 +895,6 @@ void __init setup_arch(char **cmdline_p)
 {
         struct machine_desc *mdesc;
 
-        unwind_init();
-
         setup_processor();
         mdesc = setup_machine_fdt(__atags_pointer);
         if (!mdesc)
@@ -902,6 +902,12 @@ void __init setup_arch(char **cmdline_p)
         machine_desc = mdesc;
         machine_name = mdesc->name;
 
+#ifdef CONFIG_ZONE_DMA
+        if (mdesc->dma_zone_size) {
+                extern unsigned long arm_dma_zone_size;
+                arm_dma_zone_size = mdesc->dma_zone_size;
+        }
+#endif
         if (mdesc->soft_reboot)
                 reboot_setup("s");
 
@@ -932,12 +938,6 @@ void __init setup_arch(char **cmdline_p)
 
         tcm_init();
 
-#ifdef CONFIG_ZONE_DMA
-        if (mdesc->dma_zone_size) {
-                extern unsigned long arm_dma_zone_size;
-                arm_dma_zone_size = mdesc->dma_zone_size;
-        }
-#endif
 #ifdef CONFIG_MULTI_IRQ_HANDLER
         handle_arch_irq = mdesc->handle_irq;
 #endif
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 1040c00405d0..8200deaa14f6 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -43,7 +43,7 @@
 
 struct cputopo_arm cpu_topology[NR_CPUS];
 
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+const struct cpumask *cpu_coregroup_mask(int cpu)
 {
         return &cpu_topology[cpu].core_sibling;
 }
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index e7e8365795c3..00df012c4678 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -67,7 +67,7 @@ EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2);
 
 struct unwind_ctrl_block {
         unsigned long vrs[16];          /* virtual register set */
-        unsigned long *insn;            /* pointer to the current instructions word */
+        const unsigned long *insn;      /* pointer to the current instructions word */
         int entries;                    /* number of entries left to interpret */
         int byte;                       /* current byte number in the instructions word */
 };
@@ -83,8 +83,9 @@ enum regs {
         PC = 15
 };
 
-extern struct unwind_idx __start_unwind_idx[];
-extern struct unwind_idx __stop_unwind_idx[];
+extern const struct unwind_idx __start_unwind_idx[];
+static const struct unwind_idx *__origin_unwind_idx;
+extern const struct unwind_idx __stop_unwind_idx[];
 
 static DEFINE_SPINLOCK(unwind_lock);
 static LIST_HEAD(unwind_tables);
@@ -98,45 +99,99 @@ static LIST_HEAD(unwind_tables);
 })
 
 /*
- * Binary search in the unwind index. The entries entries are
+ * Binary search in the unwind index. The entries are
  * guaranteed to be sorted in ascending order by the linker.
+ *
+ * start = first entry
+ * origin = first entry with positive offset (or stop if there is no such entry)
+ * stop - 1 = last entry
  */
-static struct unwind_idx *search_index(unsigned long addr,
-                                       struct unwind_idx *first,
-                                       struct unwind_idx *last)
+static const struct unwind_idx *search_index(unsigned long addr,
+                                       const struct unwind_idx *start,
+                                       const struct unwind_idx *origin,
+                                       const struct unwind_idx *stop)
 {
-        pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last);
+        unsigned long addr_prel31;
+
+        pr_debug("%s(%08lx, %p, %p, %p)\n",
+                        __func__, addr, start, origin, stop);
+
+        /*
+         * only search in the section with the matching sign. This way the
+         * prel31 numbers can be compared as unsigned longs.
+         */
+        if (addr < (unsigned long)start)
+                /* negative offsets: [start; origin) */
+                stop = origin;
+        else
+                /* positive offsets: [origin; stop) */
+                start = origin;
+
+        /* prel31 for address relavive to start */
+        addr_prel31 = (addr - (unsigned long)start) & 0x7fffffff;
 
-        if (addr < first->addr) {
+        while (start < stop - 1) {
+                const struct unwind_idx *mid = start + ((stop - start) >> 1);
+
+                /*
+                 * As addr_prel31 is relative to start an offset is needed to
+                 * make it relative to mid.
+                 */
+                if (addr_prel31 - ((unsigned long)mid - (unsigned long)start) <
+                                mid->addr_offset)
+                        stop = mid;
+                else {
+                        /* keep addr_prel31 relative to start */
+                        addr_prel31 -= ((unsigned long)mid -
+                                        (unsigned long)start);
+                        start = mid;
+                }
+        }
+
+        if (likely(start->addr_offset <= addr_prel31))
+                return start;
+        else {
                 pr_warning("unwind: Unknown symbol address %08lx\n", addr);
                 return NULL;
-        } else if (addr >= last->addr)
-                return last;
+        }
+}
 
-        while (first < last - 1) {
-                struct unwind_idx *mid = first + ((last - first + 1) >> 1);
+static const struct unwind_idx *unwind_find_origin(
+                const struct unwind_idx *start, const struct unwind_idx *stop)
+{
+        pr_debug("%s(%p, %p)\n", __func__, start, stop);
+        while (start < stop) {
+                const struct unwind_idx *mid = start + ((stop - start) >> 1);
 
-                if (addr < mid->addr)
-                        last = mid;
+                if (mid->addr_offset >= 0x40000000)
+                        /* negative offset */
+                        start = mid + 1;
                 else
-                        first = mid;
+                        /* positive offset */
+                        stop = mid;
         }
-
-        return first;
+        pr_debug("%s -> %p\n", __func__, stop);
+        return stop;
 }
 
-static struct unwind_idx *unwind_find_idx(unsigned long addr)
+static const struct unwind_idx *unwind_find_idx(unsigned long addr)
 {
-        struct unwind_idx *idx = NULL;
+        const struct unwind_idx *idx = NULL;
         unsigned long flags;
 
         pr_debug("%s(%08lx)\n", __func__, addr);
 
-        if (core_kernel_text(addr))
+        if (core_kernel_text(addr)) {
+                if (unlikely(!__origin_unwind_idx))
+                        __origin_unwind_idx =
+                                unwind_find_origin(__start_unwind_idx,
+                                                __stop_unwind_idx);
+
                 /* main unwind table */
                 idx = search_index(addr, __start_unwind_idx,
-                                   __stop_unwind_idx - 1);
-        else {
+                                   __origin_unwind_idx,
+                                   __stop_unwind_idx);
+        } else {
                 /* module unwind tables */
                 struct unwind_table *table;
 
@@ -145,7 +200,8 @@ static struct unwind_idx *unwind_find_idx(unsigned long addr)
                         if (addr >= table->begin_addr &&
                             addr < table->end_addr) {
                                 idx = search_index(addr, table->start,
-                                                   table->stop - 1);
+                                                   table->origin,
+                                                   table->stop);
                                 /* Move-to-front to exploit common traces */
                                 list_move(&table->list, &unwind_tables);
                                 break;
@@ -274,7 +330,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
 int unwind_frame(struct stackframe *frame)
 {
         unsigned long high, low;
-        struct unwind_idx *idx;
+        const struct unwind_idx *idx;
         struct unwind_ctrl_block ctrl;
 
         /* only go to a higher address on the stack */
@@ -399,7 +455,6 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
                                       unsigned long text_size)
 {
         unsigned long flags;
-        struct unwind_idx *idx;
         struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL);
 
         pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size,
@@ -408,15 +463,12 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
         if (!tab)
                 return tab;
 
-        tab->start = (struct unwind_idx *)start;
-        tab->stop = (struct unwind_idx *)(start + size);
+        tab->start = (const struct unwind_idx *)start;
+        tab->stop = (const struct unwind_idx *)(start + size);
+        tab->origin = unwind_find_origin(tab->start, tab->stop);
         tab->begin_addr = text_addr;
         tab->end_addr = text_addr + text_size;
 
-        /* Convert the symbol addresses to absolute values */
-        for (idx = tab->start; idx < tab->stop; idx++)
-                idx->addr = prel31_to_addr(&idx->addr);
-
         spin_lock_irqsave(&unwind_lock, flags);
         list_add_tail(&tab->list, &unwind_tables);
         spin_unlock_irqrestore(&unwind_lock, flags);
@@ -437,16 +489,3 @@ void unwind_table_del(struct unwind_table *tab)
 
         kfree(tab);
 }
-
-int __init unwind_init(void)
-{
-        struct unwind_idx *idx;
-
-        /* Convert the symbol addresses to absolute values */
-        for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++)
-                idx->addr = prel31_to_addr(&idx->addr);
-
-        pr_debug("unwind: ARM stack unwinding initialised\n");
-
-        return 0;
-}
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 10d868a5a481..d6408d1ee543 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,5 +1,9 @@
+#include <asm/unwind.h>
+
 #if __LINUX_ARM_ARCH__ >= 6
-        .macro  bitop, instr
+        .macro  bitop, name, instr
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         mov     r2, #1
@@ -13,9 +17,13 @@
         cmp     r0, #0
         bne     1b
         bx      lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 
-        .macro  testop, instr, store
+        .macro  testop, name, instr, store
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         mov     r2, #1
@@ -34,9 +42,13 @@
         cmp     r0, #0
         movne   r0, #1
 2:      bx      lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 #else
-        .macro  bitop, instr
+        .macro  bitop, name, instr
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         and     r2, r0, #31
@@ -49,6 +61,8 @@
         str     r2, [r1, r0, lsl #2]
         restore_irqs ip
         mov     pc, lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 
 /**
@@ -59,7 +73,9 @@
  * Note: we can trivially conditionalise the store instruction
  * to avoid dirtying the data cache.
  */
-        .macro  testop, instr, store
+        .macro  testop, name, instr, store
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         and     r3, r0, #31
@@ -73,5 +89,7 @@
         moveq   r0, #0
         restore_irqs ip
         mov     pc, lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 #endif
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 68ed5b62e839..f4027862172f 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_change_bit)
-        bitop   eor
-ENDPROC(_change_bit)
+bitop   _change_bit, eor
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 4c04c3b51eeb..f6b75fb64d30 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_clear_bit)
-        bitop   bic
-ENDPROC(_clear_bit)
+bitop   _clear_bit, bic
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index bbee5c66a23e..618fedae4b37 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_set_bit)
-        bitop   orr
-ENDPROC(_set_bit)
+bitop   _set_bit, orr
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 15a4d431f229..4becdc3a59cb 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_test_and_change_bit)
-        testop  eor, str
-ENDPROC(_test_and_change_bit)
+testop  _test_and_change_bit, eor, str
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 521b66b5b95d..918841dcce7a 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_test_and_clear_bit)
-        testop  bicne, strne
-ENDPROC(_test_and_clear_bit)
+testop  _test_and_clear_bit, bicne, strne
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 1c98cc2185bb..8d1b2fe9e487 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_test_and_set_bit)
-        testop  orreq, streq
-ENDPROC(_test_and_set_bit)
+testop  _test_and_set_bit, orreq, streq
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index a4401d6b5b07..adad70db70eb 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -98,7 +98,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB HS Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
+#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
 
 static struct resource usba_udc_resources[] = {
         [0] = {
@@ -1021,8 +1021,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -1035,7 +1035,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 01d8bbd1468b..ad930688358c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -891,7 +891,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b84a9f642f59..0d20677fbef0 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -195,9 +195,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
-        CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
-        CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
-        CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
         /* more usart lookup table for DT entries */
         CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 24b6f8c0440d..629fa9774972 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -837,8 +837,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -851,7 +851,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 3b70b3897d95..a178b58b0b9c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -816,8 +816,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -830,7 +830,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 3faa1fde9ad9..d5fbac9ff4fa 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -1196,8 +1196,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -1210,7 +1210,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 000b5e1da965..09a16d6bd5cd 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -197,7 +197,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
  *  USB HS Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
+#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
 static struct resource usba_udc_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_UDPHS_FIFO,
@@ -1332,8 +1332,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -1346,7 +1346,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 305a851b5bff..628eb566d60c 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -75,7 +75,7 @@ void __init at91_add_device_hdmac(void) {}
  *  USB HS Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
+#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
 
 static struct resource usba_udc_resources[] = {
         [0] = {
@@ -908,8 +908,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
-                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DBGU,
+                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -922,7 +922,6 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
-        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 649b052231f5..12a3f955162b 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -384,7 +384,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
 #include <video/s1d13xxxfb.h>
 
 
-static void __init yl9200_init_video(void)
+static void yl9200_init_video(void)
 {
         /* NWAIT Signal */
         at91_set_A_periph(AT91_PIN_PC6, 0);
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index 8f4866045b41..ec164a4124c9 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -19,7 +19,7 @@
 #define BOARD_HAVE_NAND_16BIT   (1 << 31)
 static inline int board_have_nand_16bit(void)
 {
-        return system_rev & BOARD_HAVE_NAND_16BIT;
+        return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
 }
 
 #endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
index 8eb459f3f5b7..8e4a1bd0ab1d 100644
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ b/arch/arm/mach-at91/include/mach/vmalloc.h
@@ -21,6 +21,8 @@
 #ifndef __ASM_ARCH_VMALLOC_H
 #define __ASM_ARCH_VMALLOC_H
 
+#include <mach/hardware.h>
+
 #define VMALLOC_END             (AT91_VIRT_BASE & PGDIR_MASK)
 
 #endif
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 43eadbcc29ed..430da120a297 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -235,7 +235,7 @@ void __init bcmring_init_timer(void)
          */
         bcmring_clocksource_init();
 
-        sp804_clockevents_register(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
+        sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
 }
 
 struct sys_timer bcmring_timer = {
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index b52b8de91bde..f4d4d6d174d0 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -36,6 +36,7 @@
 #include <linux/mm.h>
 #include <linux/pfn.h>
 #include <linux/atomic.h>
+#include <linux/sched.h>
 #include <mach/dma.h>
 
 /* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1d7d24995226..6659a90dbcad 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
         .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
         .tdm_slots      = 2,
         .serial_dir     = da850_iis_serializer_direction,
-        .asp_chan_q     = EVENTQ_1,
+        .asp_chan_q     = EVENTQ_0,
         .version        = MCASP_VERSION_2,
         .txnumevt       = 1,
         .rxnumevt       = 1,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1918ae711428..46e1f4173b97 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
                 /* UBL (a few copies) plus U-Boot */
                 .name           = "bootloader",
                 .offset         = 0,
-                .size           = 28 * NAND_BLOCK_SIZE,
+                .size           = 30 * NAND_BLOCK_SIZE,
                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
         }, {
                 /* U-Boot environment */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f837a8..635bf7740157 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
         int val;
         u32 value;
 
-        if (!vpif_vsclkdis_reg || !cpld_client)
+        if (!vpif_vidclkctl_reg || !cpld_client)
                 return -ENXIO;
 
         val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                 return val;
 
         spin_lock_irqsave(&vpif_reg_lock, flags);
-        value = __raw_readl(vpif_vsclkdis_reg);
+        value = __raw_readl(vpif_vidclkctl_reg);
         if (mux_mode) {
                 val &= VPIF_INPUT_TWO_CHANNEL;
                 value |= VIDCH1CLK;
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                 val |= VPIF_INPUT_ONE_CHANNEL;
                 value &= ~VIDCH1CLK;
         }
-        __raw_writel(value, vpif_vsclkdis_reg);
+        __raw_writel(value, vpif_vidclkctl_reg);
         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 
         err = i2c_smbus_write_byte(cpld_client, val);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed534f8e..af27c130595f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -161,7 +161,6 @@ static struct clk dsp_clk = {
         .name = "dsp",
         .parent = &pll1_sysclk1,
         .lpsc = DM646X_LPSC_C64X_CPU,
-        .flags = PSC_DSP,
         .usecount = 1,                  /* REVISIT how to disable? */
 };
 
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index fa59c097223d..8bc3fc256171 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
 #define PTCMD           0x120
 #define PTSTAT          0x128
 #define PDSTAT          0x200
-#define PDCTL1          0x304
+#define PDCTL           0x300
 #define MDSTAT          0x800
 #define MDCTL           0xA00
 
@@ -244,7 +244,10 @@
 #define PSC_STATE_ENABLE        3
 
 #define MDSTAT_STATE_MASK       0x3f
+#define PDSTAT_STATE_MASK       0x1f
 #define MDCTL_FORCE             BIT(31)
+#define PDCTL_NEXT              BIT(1)
+#define PDCTL_EPCGOOD           BIT(8)
 
 #ifndef __ASSEMBLER__
 
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 1fb6bdff38c1..d7e210f4b55c 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 unsigned int id, bool enable, u32 flags)
 {
-        u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
+        u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
         void __iomem *psc_base;
         struct davinci_soc_info *soc_info = &davinci_soc_info;
         u32 next_state = PSC_STATE_ENABLE;
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 mdctl |= MDCTL_FORCE;
         __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
 
-        pdstat = __raw_readl(psc_base + PDSTAT);
-        if ((pdstat & 0x00000001) == 0) {
-                pdctl1 = __raw_readl(psc_base + PDCTL1);
-                pdctl1 |= 0x1;
-                __raw_writel(pdctl1, psc_base + PDCTL1);
+        pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
+        if ((pdstat & PDSTAT_STATE_MASK) == 0) {
+                pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
+                pdctl |= PDCTL_NEXT;
+                __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
 
                 ptcmd = 1 << domain;
                 __raw_writel(ptcmd, psc_base + PTCMD);
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                         epcpr = __raw_readl(psc_base + EPCPR);
                 } while ((((epcpr >> domain) & 1) == 0));
 
-                pdctl1 = __raw_readl(psc_base + PDCTL1);
-                pdctl1 |= 0x100;
-                __raw_writel(pdctl1, psc_base + PDCTL1);
+                pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
+                pdctl |= PDCTL_EPCGOOD;
+                __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
         } else {
                 ptcmd = 1 << domain;
                 __raw_writel(ptcmd, psc_base + PTCMD);
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 35f6502144ae..4ebb382c5979 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/cpuidle.h>
 #include <linux/io.h>
+#include <linux/export.h>
+#include <linux/time.h>
 
 #include <asm/proc-fns.h>
 
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 97343df8f132..85b5527d0918 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -44,8 +44,6 @@ struct mct_clock_event_device {
         char name[10];
 };
 
-static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
-
 static void exynos4_mct_write(unsigned int value, void *addr)
 {
         void __iomem *stat_addr;
@@ -264,6 +262,9 @@ static void exynos4_clockevent_init(void)
 }
 
 #ifdef CONFIG_LOCAL_TIMERS
+
+static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
+
 /* Clock event handling */
 static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt)
 {
@@ -428,9 +429,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
 
 void local_timer_stop(struct clock_event_device *evt)
 {
+        unsigned int cpu = smp_processor_id();
         evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
         if (mct_int_type == MCT_INT_SPI)
-                disable_irq(evt->irq);
+                if (cpu == 0)
+                        remove_irq(evt->irq, &mct_tick0_event_irq);
+                else
+                        remove_irq(evt->irq, &mct_tick1_event_irq);
         else
                 disable_percpu_irq(IRQ_MCT_LOCALTIMER);
 }
@@ -443,6 +448,7 @@ static void __init exynos4_timer_resources(void)
 
         clk_rate = clk_get_rate(mct_clk);
 
+#ifdef CONFIG_LOCAL_TIMERS
         if (mct_int_type == MCT_INT_PPI) {
                 int err;
 
@@ -452,6 +458,7 @@ static void __init exynos4_timer_resources(void)
                 WARN(err, "MCT: can't request IRQ %d (%d)\n",
                      IRQ_MCT_LOCALTIMER, err);
         }
+#endif /* CONFIG_LOCAL_TIMERS */
 }
 
 static void __init exynos4_timer_init(void)
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b82dcf08e747..88660d500f5b 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -22,6 +22,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 
 #include <asm/cacheflush.h>
 #include <asm/unified.h>
@@ -72,6 +73,9 @@ static void __init highbank_map_io(void)
 
 void highbank_set_cpu_jump(int cpu, void *jump_addr)
 {
+#ifdef CONFIG_SMP
+        cpu = cpu_logical_map(cpu);
+#endif
         writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
         __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
         outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2a34ae..c44aa974e79c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
 config HAVE_IMX_SRC
         bool
 
-#
-# ARCH_MX31 and ARCH_MX35 are left for compatibility
-# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
-# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
-# more sensible) names are used: SOC_IMX31 and SOC_IMX35
 config ARCH_MX1
         bool
 
@@ -27,12 +22,6 @@ config ARCH_MX25
 config MACH_MX27
         bool
 
-config ARCH_MX31
-        bool
-
-config ARCH_MX35
-        bool
-
 config SOC_IMX1
         bool
         select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31
         select CPU_V6
         select IMX_HAVE_PLATFORM_MXC_RNGA
         select ARCH_MXC_AUDMUX_V2
-        select ARCH_MX31
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
@@ -82,7 +70,6 @@ config SOC_IMX35
         select ARCH_MXC_IOMUX_V3
         select ARCH_MXC_AUDMUX_V2
         select HAVE_EPIT
-        select ARCH_MX35
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 22d85889f622..cfede5768aa0 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,22 +1,26 @@
-zreladdr-$(CONFIG_ARCH_MX1)     += 0x08008000
-params_phys-$(CONFIG_ARCH_MX1)  := 0x08000100
-initrd_phys-$(CONFIG_ARCH_MX1)  := 0x08800000
+zreladdr-$(CONFIG_SOC_IMX1)     += 0x08008000
+params_phys-$(CONFIG_SOC_IMX1)  := 0x08000100
+initrd_phys-$(CONFIG_SOC_IMX1)  := 0x08800000
 
-zreladdr-$(CONFIG_MACH_MX21)    += 0xC0008000
-params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
-initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
+zreladdr-$(CONFIG_SOC_IMX21)    += 0xC0008000
+params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
+initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
 
-zreladdr-$(CONFIG_ARCH_MX25)    += 0x80008000
-params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
-initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
+zreladdr-$(CONFIG_SOC_IMX25)    += 0x80008000
+params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
+initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
 
-zreladdr-$(CONFIG_MACH_MX27)    += 0xA0008000
-params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
-initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
+zreladdr-$(CONFIG_SOC_IMX27)    += 0xA0008000
+params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
+initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
 
-zreladdr-$(CONFIG_ARCH_MX3)     += 0x80008000
-params_phys-$(CONFIG_ARCH_MX3)  := 0x80000100
-initrd_phys-$(CONFIG_ARCH_MX3)  := 0x80800000
+zreladdr-$(CONFIG_SOC_IMX31)    += 0x80008000
+params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
+initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
+
+zreladdr-$(CONFIG_SOC_IMX35)    += 0x80008000
+params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
+initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
 
 zreladdr-$(CONFIG_SOC_IMX6Q)    += 0x10008000
 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index e0b926dfeced..039a7abb165a 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
                 return -EINVAL;
 
         max_div = ((d->bm_pred >> d->bp_pred) + 1) *
-                  ((d->bm_pred >> d->bp_pred) + 1);
+                  ((d->bm_podf >> d->bp_podf) + 1);
 
         div = parent_rate / rate;
         if (div == 0)
@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = {
         imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
 };
 
+void __init imx6q_clock_map_io(void)
+{
+        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
+}
+
 int __init mx6q_clocks_init(void)
 {
         struct device_node *np;
         void __iomem *base;
         int i, irq;
 
-        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
-
         /* retrieve the freqency of fixed clocks from device tree */
         for_each_compatible_node(np, NULL, "fixed-clock") {
                 u32 rate;
@@ -2002,6 +2005,21 @@ int __init mx6q_clocks_init(void)
         clk_set_rate(&asrc_serial_clk, 1500000);
         clk_set_rate(&enfc_clk, 11000000);
 
+        /*
+         * Before pinctrl API is available, we have to rely on the pad
+         * configuration set up by bootloader.  For usdhc example here,
+         * u-boot sets up the pads for 49.5 MHz case, and we have to lower
+         * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
+         *
+         * FIXME: This is should be removed after pinctrl API is available.
+         * At that time, usdhc driver can call pinctrl API to change pad
+         * configuration dynamically per different usdhc clock settings.
+         */
+        clk_set_rate(&usdhc1_clk, 49500000);
+        clk_set_rate(&usdhc2_clk, 49500000);
+        clk_set_rate(&usdhc3_clk, 49500000);
+        clk_set_rate(&usdhc4_clk, 49500000);
+
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
         base = of_iomap(np, 0);
         WARN_ON(!base);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8bf5fa349484..8deb012189b5 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -34,16 +34,18 @@ static void __init imx6q_map_io(void)
 {
         imx_lluart_map_io();
         imx_scu_map_io();
+        imx6q_clock_map_io();
 }
 
-static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
+static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 7; /* imx6q gets 7 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx6q_irq_match[] __initconst = {
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec3398..31807d2a8b7b 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
 static void imx3_idle(void)
 {
         unsigned long reg = 0;
-        __asm__ __volatile__(
-                /* disable I and D cache */
-                "mrc p15, 0, %0, c1, c0, 0\n"
-                "bic %0, %0, #0x00001000\n"
-                "bic %0, %0, #0x00000004\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
-                /* invalidate I cache */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c5, 0\n"
-                /* clear and invalidate D cache */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c14, 0\n"
-                /* WFI */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c0, 4\n"
-                "nop\n" "nop\n" "nop\n" "nop\n"
-                "nop\n" "nop\n" "nop\n"
-                /* enable I and D cache */
-                "mrc p15, 0, %0, c1, c0, 0\n"
-                "orr %0, %0, #0x00001000\n"
-                "orr %0, %0, #0x00000004\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
-                : "=r" (reg));
+
+        if (!need_resched())
+                __asm__ __volatile__(
+                        /* disable I and D cache */
+                        "mrc p15, 0, %0, c1, c0, 0\n"
+                        "bic %0, %0, #0x00001000\n"
+                        "bic %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        /* invalidate I cache */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c5, 0\n"
+                        /* clear and invalidate D cache */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c14, 0\n"
+                        /* WFI */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c0, 4\n"
+                        "nop\n" "nop\n" "nop\n" "nop\n"
+                        "nop\n" "nop\n" "nop\n"
+                        /* enable I and D cache */
+                        "mrc p15, 0, %0, c1, c0, 0\n"
+                        "orr %0, %0, #0x00001000\n"
+                        "orr %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        : "=r" (reg));
+        local_irq_enable();
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
         l2x0_init(l2x0_base, 0x00030024, 0x00000000);
 }
 
+#ifdef CONFIG_SOC_IMX31
 static struct map_desc mx31_io_desc[] __initdata = {
         imx_map_entry(MX31, X_MEMC, MT_DEVICE),
         imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
         iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
 }
 
-static struct map_desc mx35_io_desc[] __initdata = {
-        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
-        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
-};
-
-void __init mx35_map_io(void)
-{
-        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
-}
-
 void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
-        imx_ioremap = imx3_ioremap;
-}
-
-void __init imx35_init_early(void)
-{
-        mxc_set_cpu_type(MXC_CPU_MX35);
-        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
-        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
+        pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
 }
 
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
         mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
 }
 
-void __init mx35_init_irq(void)
-{
-        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
-}
-
 static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
         .per_2_per_addr = 1677,
 };
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
 
         imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX31 */
+
+#ifdef CONFIG_SOC_IMX35
+static struct map_desc mx35_io_desc[] __initdata = {
+        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
+        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
+};
+
+void __init mx35_map_io(void)
+{
+        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
+}
+
+void __init imx35_init_early(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX35);
+        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
+        pm_idle = imx3_idle;
+        imx_ioremap = imx3_ioremap;
+}
+
+void __init mx35_init_irq(void)
+{
+        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
+}
 
 static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
         .ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
 
         imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 36cacbd0dcc2..a8e33681b732 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 #include <asm/unified.h>
 
 #define SRC_SCR                         0x000
@@ -23,10 +24,15 @@
 
 static void __iomem *src_base;
 
+#ifndef CONFIG_SMP
+#define cpu_logical_map(cpu)            0
+#endif
+
 void imx_enable_cpu(int cpu, bool enable)
 {
         u32 mask, val;
 
+        cpu = cpu_logical_map(cpu);
         mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
         val = readl_relaxed(src_base + SRC_SCR);
         val = enable ? val | mask : val & ~mask;
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable)
 
 void imx_set_cpu_jump(int cpu, void *jump_addr)
 {
+        cpu = cpu_logical_map(cpu);
         writel_relaxed(BSYM(virt_to_phys(jump_addr)),
                        src_base + SRC_GPR1 + cpu * 8);
 }
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc41..4665767a4f79 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -182,7 +182,7 @@ static void __init gplugd_init(void)
 
         /* on-chip devices */
         pxa168_add_uart(3);
-        pxa168_add_ssp(0);
+        pxa168_add_ssp(1);
         pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
 
         pxa168_add_eth(&gplugd_eth_platform_data);
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index d14eeaf16322..99b4ce1b6562 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,7 +7,7 @@
 #define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
 
 #define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (GPIO_REGS_VIRT + (x))
+#define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
 
 #define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
 
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 4285dfd80b6f..4ad3969b9881 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -15,6 +15,8 @@ obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
 obj-$(CONFIG_MSM_SMD) += last_radio_log.o
 obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
 
+CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
+
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_SMP) += headsmp.o platsmp.o
 
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 71de5062c71e..db81ed531031 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -42,8 +42,8 @@
 
 extern struct sys_timer msm_timer;
 
-static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag,
-                         char **cmdline, struct meminfo *mi)
+static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
+                struct meminfo *mi)
 {
         for (; tag->hdr.size; tag = tag_next(tag))
                 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index b04468e7d00e..6dc1cbd2a595 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -32,8 +32,8 @@
 
 #include "devices.h"
 
-static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
-                         char **cmdline, struct meminfo *mi)
+static void __init msm8960_fixup(struct tag *tag, char **cmdline,
+                struct meminfo *mi)
 {
         for (; tag->hdr.size; tag = tag_next(tag))
                 if (tag->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index cf38e2284fa9..44bf71688373 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -28,8 +28,8 @@
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 
-static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
-                         char **cmdline, struct meminfo *mi)
+static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
+                struct meminfo *mi)
 {
         for (; tag->hdr.size; tag = tag_next(tag))
                 if (tag->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 24030d0da6e3..0fb7a17df398 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -18,6 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/bootmem.h>
+#include <linux/module.h>
 #include <mach/irqs.h>
 #include <mach/iommu.h>
 
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index 232f97a04504..bafabb502580 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -180,6 +180,9 @@ static u32 smc(u32 cmd_addr)
                         __asmeq("%1", "r0")
                         __asmeq("%2", "r1")
                         __asmeq("%3", "r2")
+#ifdef REQUIRES_SEC
+                        ".arch_extension sec\n"
+#endif
                         "smc    #0      @ switch to secure world\n"
                         : "=r" (r0)
                         : "r" (r0), "r" (r1), "r" (r2)
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 5c837603ff0f..24994bb52147 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -362,7 +362,7 @@ static void __init mx51_babbage_init(void)
 {
         iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
         iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
-                PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
+                PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
 
         imx51_soc_init();
 
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 6bea31ab8f85..64bbfcea6f35 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -106,7 +106,7 @@ static inline void mx53_evk_fec_reset(void)
         gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
 }
 
-static struct fec_platform_data mx53_evk_fec_pdata = {
+static const struct fec_platform_data mx53_evk_fec_pdata __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 7678f7734db6..237bdecd9331 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -242,7 +242,7 @@ static inline void mx53_loco_fec_reset(void)
         gpio_set_value(LOCO_FEC_PHY_RST, 1);
 }
 
-static struct fec_platform_data mx53_loco_fec_data = {
+static const struct fec_platform_data mx53_loco_fec_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index 59c0845eb4a6..d42132a80e8f 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -104,7 +104,7 @@ static inline void mx53_smd_fec_reset(void)
         gpio_set_value(SMD_FEC_PHY_RST, 1);
 }
 
-static struct fec_platform_data mx53_smd_fec_data = {
+static const struct fec_platform_data mx53_smd_fec_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 2aacf41c48e7..4cb276977190 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
         NULL,  NULL, &ipg_clk, &gpt_ipg_clk);
 
 DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
-        NULL, NULL, &ipg_clk, NULL);
+        NULL, NULL, &ipg_perclk, NULL);
 DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
-        NULL, NULL, &ipg_clk, NULL);
+        NULL, NULL, &ipg_perclk, NULL);
 
 /* I2C */
 DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
@@ -1634,6 +1634,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
         return 0;
 }
 
+#ifdef CONFIG_OF
 static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
                                    unsigned long *ckih1, unsigned long *ckih2)
 {
@@ -1671,3 +1672,4 @@ int __init mx53_clocks_init_dt(void)
         clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
         return mx53_clocks_init(ckil, osc, ckih1, ckih2);
 }
+#endif
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 5c5328257dca..5e2e7a843860 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -16,7 +16,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <mach/hardware.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 static int mx5_cpu_rev = -1;
 
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
         if (!cpu_is_mx51())
                 return 0;
 
-        if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) {
+        if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
+                        (elf_hwcap & HWCAP_NEON)) {
                 elf_hwcap &= ~HWCAP_NEON;
                 pr_info("Turning off NEON support, detected broken NEON implementation\n");
         }
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index ccc61585659b..596edd967dbf 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
         { /* sentinel */ }
 };
 
-static void __init imx51_tzic_add_irq_domain(struct device_node *np,
+static int __init imx51_tzic_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
         irq_domain_add_simple(np, 0);
+        return 0;
 }
 
-static void __init imx51_gpio_add_irq_domain(struct device_node *np,
+static int __init imx51_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 4; /* imx51 gets 4 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx51_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index ccaa0b81b768..85bfd5ff21b0 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
         { /* sentinel */ }
 };
 
-static void __init imx53_tzic_add_irq_domain(struct device_node *np,
+static int __init imx53_tzic_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
         irq_domain_add_simple(np, 0);
+        return 0;
 }
 
-static void __init imx53_gpio_add_irq_domain(struct device_node *np,
+static int __init imx53_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 7; /* imx53 gets 7 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx53_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 26eacc9d0d90..df4a508f240a 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,7 +23,9 @@
 
 static void imx5_idle(void)
 {
-        mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        if (!need_resched())
+                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        local_irq_enable();
 }
 
 /*
@@ -89,7 +91,7 @@ void __init imx51_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX51);
         mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
-        imx_idle = imx5_idle;
+        pm_idle = imx5_idle;
 }
 
 void __init imx53_init_early(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 229ae3494216..da6e4aad177c 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)		\
         reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);         \
         reg &= ~BM_CLKCTRL_##dr##_DIV;                                  \
         reg |= div << BP_CLKCTRL_##dr##_DIV;                            \
-        if (reg | (1 << clk->enable_shift)) {                           \
+        if (reg & (1 << clk->enable_shift)) {                           \
                 pr_err("%s: clock is gated\n", __func__);               \
                 return -EINVAL;                                         \
         }                                                               \
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h
index 75d86118b76a..30c7990f3c01 100644
--- a/arch/arm/mach-mxs/include/mach/mx28.h
+++ b/arch/arm/mach-mxs/include/mach/mx28.h
@@ -104,8 +104,8 @@
 #define MX28_INT_CAN1                   9
 #define MX28_INT_LRADC_TOUCH            10
 #define MX28_INT_HSADC                  13
-#define MX28_INT_IRADC_THRESH0          14
-#define MX28_INT_IRADC_THRESH1          15
+#define MX28_INT_LRADC_THRESH0          14
+#define MX28_INT_LRADC_THRESH1          15
 #define MX28_INT_LRADC_CH0              16
 #define MX28_INT_LRADC_CH1              17
 #define MX28_INT_LRADC_CH2              18
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index 0d2d2b470998..bde5f6634747 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -30,6 +30,7 @@
  */
 #define cpu_is_mx23()           (                                       \
                 machine_is_mx23evk() ||                                 \
+                machine_is_stmp378x() ||                                \
                 0)
 #define cpu_is_mx28()           (                                       \
                 machine_is_mx28evk() ||                                 \
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 3b1681e4f49a..6b00577b7025 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -361,6 +361,6 @@ static struct sys_timer m28evk_timer = {
 MACHINE_START(M28EVK, "DENX M28 EVK")
         .map_io         = mx28_map_io,
         .init_irq       = mx28_init_irq,
-        .init_machine   = m28evk_init,
         .timer          = &m28evk_timer,
+        .init_machine   = m28evk_init,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index ac2316d53d3c..064ec5abaa55 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -471,7 +471,8 @@ static void __init mx28evk_init(void)
                                "mmc0-slot-power");
         if (ret)
                 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
-        mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
+        else
+                mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
 
         ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
                                "mmc1-slot-power");
@@ -480,7 +481,6 @@ static void __init mx28evk_init(void)
         else
                 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
 
-        mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
         mx28_add_rtc_stmp3xxx();
 
         gpio_led_register_device(0, &mx28evk_led_data);
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 177e53123a02..6834dea38c04 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -115,6 +115,6 @@ static struct sys_timer stmp378x_dvb_timer = {
 MACHINE_START(STMP378X, "STMP378X")
         .map_io         = mx23_map_io,
         .init_irq       = mx23_init_irq,
-        .init_machine   = stmp378x_dvb_init,
         .timer          = &stmp378x_dvb_timer,
+        .init_machine   = stmp378x_dvb_init,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index 0fcff47009cf..9a7b08b2a925 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
         MX28_PAD_ENET0_CRS__ENET1_RX_EN,
 };
 
-static struct fec_platform_data tx28_fec0_data = {
+static const struct fec_platform_data tx28_fec0_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
-static struct fec_platform_data tx28_fec1_data = {
+static const struct fec_platform_data tx28_fec1_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index e0a028161dde..73f287d6429b 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC
 comment "OMAP CPU Speed"
         depends on ARCH_OMAP1
 
-config OMAP_CLOCKS_SET_BY_BOOTLOADER
-        bool "OMAP clocks set by bootloader"
-        depends on ARCH_OMAP1
-        help
-          Enable this option to prevent the kernel from overriding the clock
-          frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
-          internal LCD controller and MPU peripherals.
-
 config OMAP_ARM_216MHZ
         bool "OMAP ARM 216 MHz CPU (1710 only)"
         depends on ARCH_OMAP1 && ARCH_OMAP16XX
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 1b374009b1a3..af7911963c0d 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
         omap_cfg_reg(J19_1610_CAM_D6);
         omap_cfg_reg(J18_1610_CAM_D7);
 
-        iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-
         omap_board_config = ams_delta_config;
         omap_board_config_size = ARRAY_SIZE(ams_delta_config);
         omap_serial_init();
@@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void)
 }
 arch_initcall(ams_delta_modem_init);
 
+static void __init ams_delta_map_io(void)
+{
+        omap15xx_map_io();
+        iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
+}
+
 MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
         /* Maintainer: Jonathan McDowell <noodles@earth.li> */
         .atag_offset    = 0x100,
-        .map_io         = omap15xx_map_io,
+        .map_io         = ams_delta_map_io,
         .init_early     = omap1_init_early,
         .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index eaf09efb91ca..16b1423b454a 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -17,7 +17,8 @@
 
 #include <plat/clock.h>
 
-extern int __init omap1_clk_init(void);
+int omap1_clk_init(void);
+void omap1_clk_late_init(void);
 extern int omap1_clk_enable(struct clk *clk);
 extern void omap1_clk_disable(struct clk *clk);
 extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 92400b9eb69f..9ff90a744a21 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -16,6 +16,8 @@
 
 #include <linux/kernel.h>
 #include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include <asm/mach-types.h>  /* for machine_is_* */
@@ -767,6 +769,15 @@ static struct clk_functions omap1_clk_functions = {
         .clk_disable_unused     = omap1_clk_disable_unused,
 };
 
+static void __init omap1_show_rates(void)
+{
+        pr_notice("Clocking rate (xtal/DPLL1/MPU): "
+                        "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+                ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+                ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+                arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+}
+
 int __init omap1_clk_init(void)
 {
         struct omap_clk *c;
@@ -835,9 +846,12 @@ int __init omap1_clk_init(void)
         /* We want to be in syncronous scalable mode */
         omap_writew(0x1000, ARM_SYSST);
 
-#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
-        /* Use values set by bootloader. Determine PLL rate and recalculate
-         * dependent clocks as if kernel had changed PLL or divisors.
+
+        /*
+         * Initially use the values set by bootloader. Determine PLL rate and
+         * recalculate dependent clocks as if kernel had changed PLL or
+         * divisors. See also omap1_clk_late_init() that can reprogram dpll1
+         * after the SRAM is initialized.
          */
         {
                 unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +876,10 @@ int __init omap1_clk_init(void)
                         }
                 }
         }
-#else
-        /* Find the highest supported frequency and enable it */
-        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
-                printk(KERN_ERR "System frequencies not set. Check your config.\n");
-                /* Guess sane values (60MHz) */
-                omap_writew(0x2290, DPLL_CTL);
-                omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
-                ck_dpll1.rate = 60000000;
-        }
-#endif
         propagate_rate(&ck_dpll1);
         /* Cache rates for clocks connected to ck_ref (not dpll1) */
         propagate_rate(&ck_ref);
-        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
-                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
-               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
-               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
-               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
-
+        omap1_show_rates();
         if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
                 /* Select slicer output as OMAP input clock */
                 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +924,27 @@ int __init omap1_clk_init(void)
 
         return 0;
 }
+
+#define OMAP1_DPLL1_SANE_VALUE  60000000
+
+void __init omap1_clk_late_init(void)
+{
+        unsigned long rate = ck_dpll1.rate;
+
+        if (rate >= OMAP1_DPLL1_SANE_VALUE)
+                return;
+
+        /* System booting at unusable rate, force reprogramming of DPLL1 */
+        ck_dpll1_p->rate = 0;
+
+        /* Find the highest supported frequency and enable it */
+        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+                pr_err("System frequencies not set, using default. Check your config.\n");
+                omap_writew(0x2290, DPLL_CTL);
+                omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL);
+                ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
+        }
+        propagate_rate(&ck_dpll1);
+        omap1_show_rates();
+        loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate);
+}
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 9d47ca7f80fa..1d76a63c0983 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -30,6 +30,8 @@
 #include <plat/omap7xx.h>
 #include <plat/mcbsp.h>
 
+#include "clock.h"
+
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
                 return -ENODEV;
 
         omap_sram_init();
+        omap1_clk_late_init();
 
         /* please keep these calls, and their implementations above,
          * in alphabetical order so they're easier to sort through.
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 503414718905..e1293aa513d3 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -334,6 +334,7 @@ config MACH_OMAP4_PANDA
 config OMAP3_EMU
         bool "OMAP3 debugging peripherals"
         depends on ARCH_OMAP3
+        select ARM_AMBA
         select OC_ETM
         help
           Say Y here to enable debugging hardware of omap3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69ab1c069134..b009f17dee56 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-         common.o gpio.o dma.o wd_timer.o
+         common.o gpio.o dma.o wd_timer.o display.o
 
 omap-2-3-common                         = irq.o sdrc.o
 hwmod-common                            = omap_hwmod.o \
@@ -264,7 +264,4 @@ smsc911x-$(CONFIG_SMSC911X)		:= gpmc-smsc911x.o
 obj-y                                   += $(smsc911x-m) $(smsc911x-y)
 obj-$(CONFIG_ARCH_OMAP4)                += hwspinlock.o
 
-disp-$(CONFIG_OMAP2_DSS)                := display.o
-obj-y                                   += $(disp-m) $(disp-y)
-
 obj-y                                   += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index bd18d691c6ad..108fee6146fc 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -193,7 +193,7 @@ static struct platform_device rx51_charger_device = {
 static void __init rx51_charger_init(void)
 {
         WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
-                GPIOF_OUT_INIT_LOW, "isp1704_reset"));
+                GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
 
         platform_device_register(&rx51_charger_device);
 }
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 1fe35c24fba2..942bb4f19f9f 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -24,6 +24,7 @@
 
 #include <linux/sched.h>
 #include <linux/cpuidle.h>
+#include <linux/export.h>
 
 #include <plat/prcm.h>
 #include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index adb2756e242f..dce9905d64bb 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -27,8 +27,35 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
+#include <plat/common.h>
 
 #include "control.h"
+#include "display.h"
+
+#define DISPC_CONTROL           0x0040
+#define DISPC_CONTROL2          0x0238
+#define DISPC_IRQSTATUS         0x0018
+
+#define DSS_SYSCONFIG           0x10
+#define DSS_SYSSTATUS           0x14
+#define DSS_CONTROL             0x40
+#define DSS_SDI_CONTROL         0x44
+#define DSS_PLL_CONTROL         0x48
+
+#define LCD_EN_MASK             (0x1 << 0)
+#define DIGIT_EN_MASK           (0x1 << 1)
+
+#define FRAMEDONE_IRQ_SHIFT     0
+#define EVSYNC_EVEN_IRQ_SHIFT   2
+#define EVSYNC_ODD_IRQ_SHIFT    3
+#define FRAMEDONE2_IRQ_SHIFT    22
+#define FRAMEDONETV_IRQ_SHIFT   24
+
+/*
+ * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
+ *     reset before deciding that something has gone wrong
+ */
+#define FRAMEDONE_IRQ_TIMEOUT           100
 
 static struct platform_device omap_display_device = {
         .name          = "omapdss",
@@ -172,3 +199,135 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
 
         return r;
 }
+
+static void dispc_disable_outputs(void)
+{
+        u32 v, irq_mask = 0;
+        bool lcd_en, digit_en, lcd2_en = false;
+        int i;
+        struct omap_dss_dispc_dev_attr *da;
+        struct omap_hwmod *oh;
+
+        oh = omap_hwmod_lookup("dss_dispc");
+        if (!oh) {
+                WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
+                return;
+        }
+
+        if (!oh->dev_attr) {
+                pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
+                return;
+        }
+
+        da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
+
+        /* store value of LCDENABLE and DIGITENABLE bits */
+        v = omap_hwmod_read(oh, DISPC_CONTROL);
+        lcd_en = v & LCD_EN_MASK;
+        digit_en = v & DIGIT_EN_MASK;
+
+        /* store value of LCDENABLE for LCD2 */
+        if (da->manager_count > 2) {
+                v = omap_hwmod_read(oh, DISPC_CONTROL2);
+                lcd2_en = v & LCD_EN_MASK;
+        }
+
+        if (!(lcd_en | digit_en | lcd2_en))
+                return; /* no managers currently enabled */
+
+        /*
+         * If any manager was enabled, we need to disable it before
+         * DSS clocks are disabled or DISPC module is reset
+         */
+        if (lcd_en)
+                irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT;
+
+        if (digit_en) {
+                if (da->has_framedonetv_irq) {
+                        irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT;
+                } else {
+                        irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT |
+                                1 << EVSYNC_ODD_IRQ_SHIFT;
+                }
+        }
+
+        if (lcd2_en)
+                irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
+
+        /*
+         * clear any previous FRAMEDONE, FRAMEDONETV,
+         * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts
+         */
+        omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
+
+        /* disable LCD and TV managers */
+        v = omap_hwmod_read(oh, DISPC_CONTROL);
+        v &= ~(LCD_EN_MASK | DIGIT_EN_MASK);
+        omap_hwmod_write(v, oh, DISPC_CONTROL);
+
+        /* disable LCD2 manager */
+        if (da->manager_count > 2) {
+                v = omap_hwmod_read(oh, DISPC_CONTROL2);
+                v &= ~LCD_EN_MASK;
+                omap_hwmod_write(v, oh, DISPC_CONTROL2);
+        }
+
+        i = 0;
+        while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
+               irq_mask) {
+                i++;
+                if (i > FRAMEDONE_IRQ_TIMEOUT) {
+                        pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n");
+                        break;
+                }
+                mdelay(1);
+        }
+}
+
+#define MAX_MODULE_SOFTRESET_WAIT       10000
+int omap_dss_reset(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_opt_clk *oc;
+        int c = 0;
+        int i, r;
+
+        if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
+                pr_err("dss_core: hwmod data doesn't contain reset data\n");
+                return -EINVAL;
+        }
+
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+                if (oc->_clk)
+                        clk_enable(oc->_clk);
+
+        dispc_disable_outputs();
+
+        /* clear SDI registers */
+        if (cpu_is_omap3430()) {
+                omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
+                omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
+        }
+
+        /*
+         * clear DSS_CONTROL register to switch DSS clock sources to
+         * PRCM clock, if any
+         */
+        omap_hwmod_write(0x0, oh, DSS_CONTROL);
+
+        omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
+                                & SYSS_RESETDONE_MASK),
+                        MAX_MODULE_SOFTRESET_WAIT, c);
+
+        if (c == MAX_MODULE_SOFTRESET_WAIT)
+                pr_warning("dss_core: waiting for reset to finish failed\n");
+        else
+                pr_debug("dss_core: softreset done\n");
+
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+                if (oc->_clk)
+                        clk_disable(oc->_clk);
+
+        r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+        return r;
+}
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
new file mode 100644
index 000000000000..b871b017b352
--- /dev/null
+++ b/arch/arm/mach-omap2/display.h
@@ -0,0 +1,29 @@
+/*
+ * display.h - OMAP2+ integration-specific DSS header
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_DISPLAY_H
+#define __ARCH_ARM_MACH_OMAP2_DISPLAY_H
+
+#include <linux/kernel.h>
+
+struct omap_dss_dispc_dev_attr {
+        u8      manager_count;
+        bool    has_framedonetv_irq;
+};
+
+#endif
diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-omap2/io.h
+++ /dev/null
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 292eee3be15f..28fcb27005d2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                 pdata->reg_size = 4;
                 pdata->has_ccr = true;
         }
+        pdata->set_clk_src = omap2_mcbsp_set_clk_src;
+        if (id == 1)
+                pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
 
         if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
                 if (id == 2)
@@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                                         name, oh->name);
                 return PTR_ERR(pdev);
         }
-        pdata->set_clk_src = omap2_mcbsp_set_clk_src;
-        if (id == 1)
-                pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
         omap_mcbsp_count++;
         return 0;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 00fcd2c311ea..529142aff766 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh)
                 ohii = &oh->mpu_irqs[i++];
         } while (ohii->irq != -1);
 
-        return i;
+        return i-1;
 }
 
 /**
@@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh)
                 ohdi = &oh->sdma_reqs[i++];
         } while (ohdi->dma_req != -1);
 
-        return i;
+        return i-1;
 }
 
 /**
@@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
                 mem = &os->addr[i++];
         } while (mem->pa_start != mem->pa_end);
 
-        return i;
+        return i-1;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 6d7206213525..a5409ce3f323 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -875,6 +875,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
         { .role = "tv_clk", .clk = "dss_54m_fck" },
         { .role = "sys_clk", .clk = "dss2_fck" },
 };
@@ -899,7 +903,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_slaves),
         .masters        = omap2420_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap2420_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 
 /* l4_core -> dss_dispc */
@@ -939,6 +943,7 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
         .slaves         = omap2420_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_dispc_slaves),
         .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 
 /* l4_core -> dss_rfbi */
@@ -961,6 +966,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
         &omap2420_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap2_rfbi_hwmod_class,
@@ -972,6 +981,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
                         .module_offs = CORE_MOD,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap2420_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -981,7 +992,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dss_venc_hwmod,
-        .clk            = "dss_54m_fck",
+        .clk            = "dss_ick",
         .addr           = omap2_dss_venc_addrs,
         .fw = {
                 .omap2 = {
@@ -1001,7 +1012,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
 static struct omap_hwmod omap2420_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_fck",
+        .main_clk       = "dss_54m_fck",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index a2580d01c3ff..c4f56cb60d7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -942,6 +942,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
         { .role = "tv_clk", .clk = "dss_54m_fck" },
         { .role = "sys_clk", .clk = "dss2_fck" },
 };
@@ -966,7 +970,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_slaves),
         .masters        = omap2430_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap2430_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 
 /* l4_core -> dss_dispc */
@@ -1000,6 +1004,7 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
         .slaves         = omap2430_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_dispc_slaves),
         .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 
 /* l4_core -> dss_rfbi */
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
         &omap2430_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
                         .module_offs = CORE_MOD,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap2430_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -1036,7 +1047,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dss_venc_hwmod,
-        .clk            = "dss_54m_fck",
+        .clk            = "dss_ick",
         .addr           = omap2_dss_venc_addrs,
         .flags          = OCPIF_SWSUP_IDLE,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
@@ -1050,7 +1061,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
 static struct omap_hwmod omap2430_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_fck",
+        .main_clk       = "dss_54m_fck",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c451729d289a..c11273da5dcc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,6 +11,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
 #include <plat/dma.h>
+#include <plat/common.h>
 
 #include <mach/irqs.h>
 
@@ -43,13 +44,15 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
         .rev_offs       = 0x0000,
         .sysc_offs      = 0x0010,
         .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
 struct omap_hwmod_class omap2_dss_hwmod_class = {
         .name   = "dss",
         .sysc   = &omap2_dss_sysc,
+        .reset  = omap_dss_reset,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index bc9035ec87fc..7f8915ad5099 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
-        { .role = "tv_clk", .clk = "dss_tv_fck" },
-        { .role = "video_clk", .clk = "dss_96m_fck" },
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
         { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+        { .role = "tv_clk", .clk = "dss_tv_fck" },
+        /* required only on OMAP3430 */
+        { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
 };
 
 static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3430es1_dss_slaves),
         .masters        = omap3xxx_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 
 static struct omap_hwmod omap3xxx_dss_core_hwmod = {
         .name           = "dss_core",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .class          = &omap2_dss_hwmod_class,
         .main_clk       = "dss1_alwon_fck", /* instead of dss_fck */
         .sdma_reqs      = omap3xxx_dss_sdma_chs,
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
         .slaves         = omap3xxx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
         .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 
 /*
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_dsi1_hwmod,
+        .clk            = "dss_ick",
         .addr           = omap3xxx_dss_dsi1_addrs,
         .fw = {
                 .omap2 = {
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
         &omap3xxx_l4_core__dss_dsi1,
 };
 
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+};
+
 static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
         .name           = "dss_dsi1",
         .class          = &omap3xxx_dsi_hwmod_class,
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
                         .module_offs = OMAP3430_DSS_MOD,
                 },
         },
+        .opt_clks       = dss_dsi1_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_opt_clks),
         .slaves         = omap3xxx_dss_dsi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
         &omap3xxx_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap2_rfbi_hwmod_class,
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
                         .module_offs = OMAP3430_DSS_MOD,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap3xxx_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_venc_hwmod,
-        .clk            = "dss_tv_fck",
+        .clk            = "dss_ick",
         .addr           = omap2_dss_venc_addrs,
         .fw = {
                 .omap2 = {
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
         &omap3xxx_l4_core__dss_venc,
 };
 
+static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
+        /* required only on OMAP3430 */
+        { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
+};
+
 static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_alwon_fck",
+        .main_clk       = "dss_tv_fck",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
                         .module_offs = OMAP3430_DSS_MOD,
                 },
         },
+        .opt_clks       = dss_venc_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_venc_opt_clks),
         .slaves         = omap3xxx_dss_venc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
         .flags          = HWMOD_NO_IDLEST,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7695e5d43316..daaf165af696 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,6 +30,7 @@
 #include <plat/mmc.h>
 #include <plat/i2c.h>
 #include <plat/dmtimer.h>
+#include <plat/common.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
 static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
         .name   = "dss",
         .sysc   = &omap44xx_dss_sysc,
+        .reset  = omap_dss_reset,
 };
 
 /* dss */
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
         { .role = "sys_clk", .clk = "dss_sys_clk" },
         { .role = "tv_clk", .clk = "dss_tv_clk" },
-        { .role = "dss_clk", .clk = "dss_dss_clk" },
-        { .role = "video_clk", .clk = "dss_48mhz_clk" },
+        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
 };
 
 static struct omap_hwmod omap44xx_dss_hwmod = {
         .name           = "dss_core",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .class          = &omap44xx_dss_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
         .main_clk       = "dss_dss_clk",
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
         { }
 };
 
+static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
+        .manager_count          = 3,
+        .has_framedonetv_irq    = 1
+};
+
 /* l4_per -> dss_dispc */
 static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
         .master         = &omap44xx_l4_per_hwmod,
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
         &omap44xx_l4_per__dss_dispc,
 };
 
-static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
-        { .role = "sys_clk", .clk = "dss_sys_clk" },
-        { .role = "tv_clk", .clk = "dss_tv_clk" },
-        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
-};
-
 static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
         .name           = "dss_dispc",
         .class          = &omap44xx_dispc_hwmod_class,
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
                         .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
                 },
         },
-        .opt_clks       = dss_dispc_opt_clks,
-        .opt_clks_cnt   = ARRAY_SIZE(dss_dispc_opt_clks),
         .slaves         = omap44xx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
+        .dev_attr       = &omap44xx_dss_dispc_dev_attr
 };
 
 /*
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
         .clkdm_name     = "l3_dss_clkdm",
         .mpu_irqs       = omap44xx_dss_hdmi_irqs,
         .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
-        .main_clk       = "dss_dss_clk",
+        .main_clk       = "dss_48mhz_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap44xx_venc_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
-        .main_clk       = "dss_dss_clk",
+        .main_clk       = "dss_tv_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index de832ebc93a9..51e5418899fb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
         .srst_shift     = SYSC_TYPE2_SOFTRESET_SHIFT,
 };
 
+struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
+        .manager_count          = 2,
+        .has_framedonetv_irq    = 0
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 39a7c37f4587..ad5d8f04c0b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -16,6 +16,8 @@
 
 #include <plat/omap_hwmod.h>
 
+#include "display.h"
+
 /* Common address space across OMAP2xxx */
 extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
 extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
@@ -111,4 +113,6 @@ extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
 extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
 extern struct omap_hwmod_class omap2xxx_mcspi_class;
 
+extern struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr;
+
 #endif
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 6a66aa5e2a5b..d15225ff5c49 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev)
 static const struct of_device_id l3_noc_match[] = {
         {.compatible = "ti,omap4-l3-noc", },
         {},
-}
+};
 MODULE_DEVICE_TABLE(of, l3_noc_match);
 #else
 #define l3_noc_match NULL
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index e7bee5ca407c..1881fe915149 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -24,6 +24,7 @@
 #include "powerdomain.h"
 #include "clockdomain.h"
 #include "pm.h"
+#include "twl-common.h"
 
 static struct omap_device_pm_latency *pm_lats;
 
@@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init);
 
 static int __init omap2_common_pm_late_init(void)
 {
-        /* Init the OMAP TWL parameters */
-        omap3_twl_init();
-        omap4_twl_init();
-
         /* Init the voltage layer */
+        omap_pmic_late_init();
         omap_voltage_late_init();
 
         /* Initialize the voltages */
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 919d827ed707..9dd93453e563 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
                 sr_write_reg(sr_info, ERRCONFIG_V1, status);
         } else if (sr_info->ip_type == SR_TYPE_V2) {
                 /* Read the status bits */
-                sr_read_reg(sr_info, IRQSTATUS);
+                status = sr_read_reg(sr_info, IRQSTATUS);
 
                 /* Clear them by writing back */
                 sr_write_reg(sr_info, IRQSTATUS, status);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 522435772168..10b20c652e5d 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -30,6 +30,7 @@
 #include <plat/usb.h>
 
 #include "twl-common.h"
+#include "pm.h"
 
 static struct i2c_board_info __initdata pmic_i2c_board_info = {
         .addr           = 0x48,
@@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate,
         omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
 }
 
+void __init omap_pmic_late_init(void)
+{
+        /* Init the OMAP TWL parameters (if PMIC has been registerd) */
+        if (!pmic_i2c_board_info.irq)
+                return;
+
+        omap3_twl_init();
+        omap4_twl_init();
+}
+
 #if defined(CONFIG_ARCH_OMAP3)
 static struct twl4030_usb_data omap3_usb_pdata = {
         .usb_mode       = T2_USB_MODE_ULPI,
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 5e83a5bd37fb..275dde8cb27a 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -1,6 +1,8 @@
 #ifndef __OMAP_PMIC_COMMON__
 #define __OMAP_PMIC_COMMON__
 
+#include <plat/irqs.h>
+
 #define TWL_COMMON_PDATA_USB            (1 << 0)
 #define TWL_COMMON_PDATA_BCI            (1 << 1)
 #define TWL_COMMON_PDATA_MADC           (1 << 2)
@@ -30,6 +32,7 @@ struct twl4030_platform_data;
 
 void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
                     struct twl4030_platform_data *pmic_data);
+void omap_pmic_late_init(void);
 
 static inline void omap2_pmic_init(const char *pmic_type,
                                    struct twl4030_platform_data *pmic_data)
diff --git a/arch/arm/mach-picoxcell/include/mach/debug-macro.S b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
index 8f2c234ed9d9..58d4ee3ae949 100644
--- a/arch/arm/mach-picoxcell/include/mach/debug-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
 
 #define UART_SHIFT 2
 
-                .macro  addruart, rp, rv
+                .macro  addruart, rp, rv, tmp
                 ldr     \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
                 ldr     \rp, =PICOXCELL_UART1_BASE
                 .endm
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index cb53160f6c5d..26ebb57719df 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -9,6 +9,7 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/slab.h>
+#include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index ef555c041962..a12b689a8702 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -8,6 +8,7 @@
 
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <linux/of.h>
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index fc0b8544e174..4b81f59a4cba 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -307,7 +307,7 @@ static inline void balloon3_mmc_init(void) {}
 /******************************************************************************
  * USB Gadget
  ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static void balloon3_udc_command(int cmd)
 {
         if (cmd == PXA2XX_UDC_CMD_CONNECT)
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ffc5586..d23b92b80488 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -146,7 +146,7 @@ static void __init colibri_pxa320_init_eth(void)
 static inline void __init colibri_pxa320_init_eth(void) {}
 #endif /* CONFIG_AX88796 */
 
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
         .gpio_vbus              = mfp_to_gpio(MFP_PIN_GPIO96),
         .gpio_pullup            = -1,
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 9c8208ca0415..ffdd70dad327 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -106,7 +106,7 @@ static void __init gumstix_mmc_init(void)
 }
 #endif
 
-#ifdef CONFIG_USB_GADGET_PXA25X
+#ifdef CONFIG_USB_PXA25X
 static struct gpio_vbus_mach_info gumstix_udc_info = {
         .gpio_vbus              = GPIO_GUMSTIX_USB_GPIOn,
         .gpio_pullup            = GPIO_GUMSTIX_USB_GPIOx,
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index f80bbe246afe..d4eac3d6ffb5 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -37,8 +37,8 @@ extern void __init palm27x_lcd_init(int power,
 #define palm27x_lcd_init(power, mode)   do {} while (0)
 #endif
 
-#if     defined(CONFIG_USB_GADGET_PXA27X) || \
-        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if     defined(CONFIG_USB_PXA27X) || \
+        defined(CONFIG_USB_PXA27X_MODULE)
 extern void __init palm27x_udc_init(int vbus, int pullup,
                                         int vbus_inverted);
 #else
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 325c245c0a0d..fbc10d7b95d1 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -164,8 +164,8 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
 /******************************************************************************
  * USB Gadget
  ******************************************************************************/
-#if     defined(CONFIG_USB_GADGET_PXA27X) || \
-        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if     defined(CONFIG_USB_PXA27X) || \
+        defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info palm27x_udc_info = {
         .gpio_vbus_inverted     = 1,
 };
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 6ec7caefb37c..2c24c67fd92b 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -338,7 +338,7 @@ static inline void palmtc_mkp_init(void) {}
 /******************************************************************************
  * UDC
  ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE)
+#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE)
 static struct gpio_vbus_mach_info palmtc_udc_info = {
         .gpio_vbus              = GPIO_NR_PALMTC_USB_DETECT_N,
         .gpio_vbus_inverted     = 1,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6ed1ff..ca0c6615028c 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -343,7 +343,7 @@ static inline void vpac270_uhc_init(void) {}
 /******************************************************************************
  * USB Gadget
  ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
         .gpio_vbus              = GPIO41_VPAC270_UDC_DETECT,
         .gpio_pullup            = -1,
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b42089eb4..3341fd118723 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -10,6 +10,7 @@
 
 #include <linux/kernel.h>
 #include <linux/string.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 66668565ee75..f208154b1382 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -8,7 +8,7 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/i2c.h>
 
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 33366581998f..b1e1571f2f6b 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -71,7 +71,7 @@ void __init s3c6400_init_irq(void)
         s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
 }
 
-struct sysdev_class s3c6400_sysclass = {
+static struct sysdev_class s3c6400_sysclass = {
         .name   = "s3c6400-core",
 };
 
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 83d2afb79e9f..2cf80026c58d 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -20,7 +20,7 @@
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
-extern void s3c64xx_fb_gpio_setup_24bpp(void)
+void s3c64xx_fb_gpio_setup_24bpp(void)
 {
         s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
         s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index bc35e8261e5b..194c3b0626b5 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -274,6 +274,7 @@ static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
 
 static struct platform_pwm_backlight_data smdkv210_bl_data = {
         .pwm_id = 3,
+        .pwm_period_ns = 1000,
 };
 
 static void __init smdkv210_map_io(void)
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot
index 5a616f6e5612..f7951aa04562 100644
--- a/arch/arm/mach-sa1100/Makefile.boot
+++ b/arch/arm/mach-sa1100/Makefile.boot
@@ -1,5 +1,5 @@
-ifeq ($(CONFIG_ARCH_SA1100),y)
-   zreladdr-$(CONFIG_SA1111)            += 0xc0208000
+ifeq ($(CONFIG_SA1111),y)
+   zreladdr-y   += 0xc0208000
 else
    zreladdr-y   += 0xc0008000
 endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 2aec2f732515..737bdc631b0d 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common objects
-obj-y                           := timer.o console.o clock.o pm_runtime.o
+obj-y                           := timer.o console.o clock.o
 
 # CPU objects
 obj-$(CONFIG_ARCH_SH7367)       += setup-sh7367.o clock-sh7367.o intc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 83624e26b884..7119b87cbfa0 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
         /* enable MMCIF */
         gpio_request(GPIO_FN_MMCCLK0, NULL);
         gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
-        gpio_request(GPIO_FN_MMCD0_0, NULL);
-        gpio_request(GPIO_FN_MMCD0_1, NULL);
-        gpio_request(GPIO_FN_MMCD0_2, NULL);
-        gpio_request(GPIO_FN_MMCD0_3, NULL);
-        gpio_request(GPIO_FN_MMCD0_4, NULL);
-        gpio_request(GPIO_FN_MMCD0_5, NULL);
-        gpio_request(GPIO_FN_MMCD0_6, NULL);
-        gpio_request(GPIO_FN_MMCD0_7, NULL);
+        gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
+        gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
         gpio_request(GPIO_PORT208, NULL); /* Reset */
         gpio_direction_output(GPIO_PORT208, 1);
 
@@ -607,6 +607,7 @@ struct sys_timer ag5evm_timer = {
 
 MACHINE_START(AG5EVM, "ag5evm")
         .map_io         = ag5evm_map_io,
+        .nr_irqs        = NR_IRQS_LEGACY,
         .init_irq       = sh73a0_init_irq,
         .handle_irq     = shmobile_handle_irq_gic,
         .init_machine   = ag5evm_init,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index a3aa0f6df964..4c865ece9ac4 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -201,7 +201,7 @@ static struct physmap_flash_data nor_flash_data = {
 static struct resource nor_flash_resources[] = {
         [0]     = {
                 .start  = 0x20000000, /* CS0 shadow instead of regular CS0 */
-                .end    = 0x28000000 - 1, /* needed by USB MASK ROM boot */             
+                .end    = 0x28000000 - 1, /* needed by USB MASK ROM boot */
                 .flags  = IORESOURCE_MEM,
         }
 };
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index adc73122bf20..f44150b5ae46 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -33,6 +33,7 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/gpio_keys.h>
 #include <linux/leds.h>
+#include <linux/platform_data/leds-renesas-tpu.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
 #include <linux/mfd/tmio.h>
@@ -48,6 +49,7 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/traps.h>
 
+/* SMSC 9220 */
 static struct resource smsc9220_resources[] = {
         [0] = {
                 .start          = 0x14000000, /* CS5A */
@@ -55,7 +57,7 @@ static struct resource smsc9220_resources[] = {
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
-                .start          = gic_spi(33), /* PINTA2 @ PORT144 */
+                .start          = SH73A0_PINT0_IRQ(2), /* PINTA2 */
                 .flags          = IORESOURCE_IRQ,
         },
 };
@@ -77,6 +79,7 @@ static struct platform_device eth_device = {
         .num_resources  = ARRAY_SIZE(smsc9220_resources),
 };
 
+/* KEYSC */
 static struct sh_keysc_info keysc_platdata = {
         .mode           = SH_KEYSC_MODE_6,
         .scan_timing    = 3,
@@ -120,6 +123,7 @@ static struct platform_device keysc_device = {
         },
 };
 
+/* GPIO KEY */
 #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
 
 static struct gpio_keys_button gpio_buttons[] = {
@@ -150,13 +154,10 @@ static struct platform_device gpio_keys_device = {
         },
 };
 
+/* GPIO LED */
 #define GPIO_LED(n, g) { .name = n, .gpio = g }
 
 static struct gpio_led gpio_leds[] = {
-        GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */
-        GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */
-        GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */
-        GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */
         GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */
         GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */
         GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */
@@ -175,6 +176,120 @@ static struct platform_device gpio_leds_device = {
         },
 };
 
+/* TPU LED */
+static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
+        .name           = "V2513",
+        .pin_gpio_fn    = GPIO_FN_TPU1TO2,
+        .pin_gpio       = GPIO_PORT153,
+        .channel_offset = 0x90,
+        .timer_bit = 2,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu12_resources[] = {
+        [0] = {
+                .name   = "TPU12",
+                .start  = 0xe6610090,
+                .end    = 0xe66100b5,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu12_device = {
+        .name = "leds-renesas-tpu",
+        .id = 12,
+        .dev = {
+                .platform_data  = &led_renesas_tpu12_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu12_resources),
+        .resource       = tpu12_resources,
+};
+
+static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
+        .name           = "V2514",
+        .pin_gpio_fn    = GPIO_FN_TPU4TO1,
+        .pin_gpio       = GPIO_PORT199,
+        .channel_offset = 0x50,
+        .timer_bit = 1,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu41_resources[] = {
+        [0] = {
+                .name   = "TPU41",
+                .start  = 0xe6640050,
+                .end    = 0xe6640075,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu41_device = {
+        .name = "leds-renesas-tpu",
+        .id = 41,
+        .dev = {
+                .platform_data  = &led_renesas_tpu41_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu41_resources),
+        .resource       = tpu41_resources,
+};
+
+static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
+        .name           = "V2515",
+        .pin_gpio_fn    = GPIO_FN_TPU2TO1,
+        .pin_gpio       = GPIO_PORT197,
+        .channel_offset = 0x50,
+        .timer_bit = 1,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu21_resources[] = {
+        [0] = {
+                .name   = "TPU21",
+                .start  = 0xe6620050,
+                .end    = 0xe6620075,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu21_device = {
+        .name = "leds-renesas-tpu",
+        .id = 21,
+        .dev = {
+                .platform_data  = &led_renesas_tpu21_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu21_resources),
+        .resource       = tpu21_resources,
+};
+
+static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
+        .name           = "KEYLED",
+        .pin_gpio_fn    = GPIO_FN_TPU3TO0,
+        .pin_gpio       = GPIO_PORT163,
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu30_resources[] = {
+        [0] = {
+                .name   = "TPU30",
+                .start  = 0xe6630010,
+                .end    = 0xe6630035,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu30_device = {
+        .name = "leds-renesas-tpu",
+        .id = 30,
+        .dev = {
+                .platform_data  = &led_renesas_tpu30_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu30_resources),
+        .resource       = tpu30_resources,
+};
+
+/* MMCIF */
 static struct resource mmcif_resources[] = {
         [0] = {
                 .name   = "MMCIF",
@@ -207,6 +322,7 @@ static struct platform_device mmcif_device = {
         .resource       = mmcif_resources,
 };
 
+/* SDHI0 */
 static struct sh_mobile_sdhi_info sdhi0_info = {
         .tmio_caps      = MMC_CAP_SD_HIGHSPEED,
         .tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -243,6 +359,7 @@ static struct platform_device sdhi0_device = {
         },
 };
 
+/* SDHI1 */
 static struct sh_mobile_sdhi_info sdhi1_info = {
         .tmio_caps      = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
         .tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -284,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = {
         &keysc_device,
         &gpio_keys_device,
         &gpio_leds_device,
+        &leds_tpu12_device,
+        &leds_tpu41_device,
+        &leds_tpu21_device,
+        &leds_tpu30_device,
         &mmcif_device,
         &sdhi0_device,
         &sdhi1_device,
@@ -310,18 +431,6 @@ static void __init kota2_map_io(void)
         shmobile_setup_console();
 }
 
-#define PINTER0A        0xe69000a0
-#define PINTCR0A        0xe69000b0
-
-void __init kota2_init_irq(void)
-{
-        sh73a0_init_irq();
-
-        /* setup PINT: enable PINTA2 as active low */
-        __raw_writel(1 << 29, PINTER0A);
-        __raw_writew(2 << 10, PINTCR0A);
-}
-
 static void __init kota2_init(void)
 {
         sh73a0_pinmux_init();
@@ -440,7 +549,8 @@ struct sys_timer kota2_timer = {
 
 MACHINE_START(KOTA2, "kota2")
         .map_io         = kota2_map_io,
-        .init_irq       = kota2_init_irq,
+        .nr_irqs        = NR_IRQS_LEGACY,
+        .init_irq       = sh73a0_init_irq,
         .handle_irq     = shmobile_handle_irq_gic,
         .init_machine   = kota2_init,
         .timer          = &kota2_timer,
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 66975921e646..995a9c3aec8f 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -476,7 +476,7 @@ static struct clk_ops fsidiv_clk_ops = {
         .disable        = fsidiv_disable,
 };
 
-static struct clk_mapping sh7372_fsidiva_clk_mapping = {
+static struct clk_mapping fsidiva_clk_mapping = {
         .phys   = FSIDIVA,
         .len    = 8,
 };
@@ -484,10 +484,10 @@ static struct clk_mapping sh7372_fsidiva_clk_mapping = {
 struct clk sh7372_fsidiva_clk = {
         .ops            = &fsidiv_clk_ops,
         .parent         = &div6_reparent_clks[DIV6_FSIA], /* late install */
-        .mapping        = &sh7372_fsidiva_clk_mapping,
+        .mapping        = &fsidiva_clk_mapping,
 };
 
-static struct clk_mapping sh7372_fsidivb_clk_mapping = {
+static struct clk_mapping fsidivb_clk_mapping = {
         .phys   = FSIDIVB,
         .len    = 8,
 };
@@ -495,7 +495,7 @@ static struct clk_mapping sh7372_fsidivb_clk_mapping = {
 struct clk sh7372_fsidivb_clk = {
         .ops            = &fsidiv_clk_ops,
         .parent         = &div6_reparent_clks[DIV6_FSIB],  /* late install */
-        .mapping        = &sh7372_fsidivb_clk_mapping,
+        .mapping        = &fsidivb_clk_mapping,
 };
 
 static struct clk *late_main_clks[] = {
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846bb30f2..1370a89ca358 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -113,6 +113,12 @@ static struct clk main_clk = {
         .ops            = &main_clk_ops,
 };
 
+/* Divide Main clock by two */
+static struct clk main_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &main_clk,
+};
+
 /* PLL0, PLL1, PLL2, PLL3 */
 static unsigned long pll_recalc(struct clk *clk)
 {
@@ -181,6 +187,7 @@ static struct clk *main_clks[] = {
         &extal1_div2_clk,
         &extal2_div2_clk,
         &main_clk,
+        &main_div2_clk,
         &pll0_clk,
         &pll1_clk,
         &pll2_clk,
@@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = {
         [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
         [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
         [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
-        [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0),
+        [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
         [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
         [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
         [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
@@ -268,6 +275,7 @@ enum { MSTP001,
         MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
         MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
         MSTP314, MSTP313, MSTP312, MSTP311,
+        MSTP303, MSTP302, MSTP301, MSTP300,
         MSTP411, MSTP410, MSTP403,
         MSTP_NR };
 
@@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
         [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
         [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
+        [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
+        [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
+        [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
+        [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */
         [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
         [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
         [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
@@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
         CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
         CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
         CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 2e44f11f592e..1b2334277e85 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -26,65 +26,59 @@ void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
 };
 
 static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
-                                  struct cpuidle_state *state)
+                                  struct cpuidle_driver *drv,
+                                  int index)
 {
         ktime_t before, after;
-        int requested_state = state - &dev->states[0];
 
-        dev->last_state = &dev->states[requested_state];
         before = ktime_get();
 
         local_irq_disable();
         local_fiq_disable();
 
-        shmobile_cpuidle_modes[requested_state]();
+        shmobile_cpuidle_modes[index]();
 
         local_irq_enable();
         local_fiq_enable();
 
         after = ktime_get();
-        return ktime_to_ns(ktime_sub(after, before)) >> 10;
+        dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
+
+        return index;
 }
 
 static struct cpuidle_device shmobile_cpuidle_dev;
 static struct cpuidle_driver shmobile_cpuidle_driver = {
         .name =         "shmobile_cpuidle",
         .owner =        THIS_MODULE,
+        .states[0] = {
+                .name = "C1",
+                .desc = "WFI",
+                .exit_latency = 1,
+                .target_residency = 1 * 2,
+                .flags = CPUIDLE_FLAG_TIME_VALID,
+        },
+        .safe_state_index = 0, /* C1 */
+        .state_count = 1,
 };
 
-void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev);
+void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
 
 static int shmobile_cpuidle_init(void)
 {
         struct cpuidle_device *dev = &shmobile_cpuidle_dev;
-        struct cpuidle_state *state;
+        struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
         int i;
 
-        cpuidle_register_driver(&shmobile_cpuidle_driver);
-
-        for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
-                dev->states[i].name[0] = '\0';
-                dev->states[i].desc[0] = '\0';
-                dev->states[i].enter = shmobile_cpuidle_enter;
-        }
-
-        i = CPUIDLE_DRIVER_STATE_START;
-
-        state = &dev->states[i++];
-        snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
-        strncpy(state->desc, "WFI", CPUIDLE_DESC_LEN);
-        state->exit_latency = 1;
-        state->target_residency = 1 * 2;
-        state->power_usage = 3;
-        state->flags = 0;
-        state->flags |= CPUIDLE_FLAG_TIME_VALID;
-
-        dev->safe_state = state;
-        dev->state_count = i;
+        for (i = 0; i < CPUIDLE_STATE_MAX; i++)
+                drv->states[i].enter = shmobile_cpuidle_enter;
 
         if (shmobile_cpuidle_setup)
-                shmobile_cpuidle_setup(dev);
+                shmobile_cpuidle_setup(drv);
+
+        cpuidle_register_driver(drv);
 
+        dev->state_count = drv->state_count;
         cpuidle_register_device(dev);
 
         return 0;
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c0cdbf997c91..834bd6cd508f 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -9,9 +9,9 @@ extern int clk_init(void);
 extern void shmobile_handle_irq_intc(struct pt_regs *);
 extern void shmobile_handle_irq_gic(struct pt_regs *);
 extern struct platform_suspend_ops shmobile_suspend_ops;
-struct cpuidle_device;
+struct cpuidle_driver;
 extern void (*shmobile_cpuidle_modes[])(void);
-extern void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev);
+extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
 
 extern void sh7367_init_irq(void);
 extern void sh7367_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 18ae6a990bc2..881d515a9686 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -470,6 +470,14 @@ enum {
         GPIO_FN_SDHICMD2_PU,
         GPIO_FN_MMCCMD0_PU,
         GPIO_FN_MMCCMD1_PU,
+        GPIO_FN_MMCD0_0_PU,
+        GPIO_FN_MMCD0_1_PU,
+        GPIO_FN_MMCD0_2_PU,
+        GPIO_FN_MMCD0_3_PU,
+        GPIO_FN_MMCD0_4_PU,
+        GPIO_FN_MMCD0_5_PU,
+        GPIO_FN_MMCD0_6_PU,
+        GPIO_FN_MMCD0_7_PU,
         GPIO_FN_FSIACK_PU,
         GPIO_FN_FSIAILR_PU,
         GPIO_FN_FSIAIBT_PU,
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
index 128555e76e43..e6e524654e67 100644
--- a/arch/arm/mach-shmobile/pfc-sh7367.c
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -21,68 +21,49 @@
 #include <linux/gpio.h>
 #include <mach/sh7367.h>
 
-#define _1(fn, pfx, sfx) fn(pfx, sfx)
-
-#define _10(fn, pfx, sfx)                               \
-        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
-        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
-        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
-        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
-        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
-
-#define _90(fn, pfx, sfx)                               \
-        _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx),     \
-        _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx),     \
-        _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx),     \
-        _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx),     \
-        _10(fn, pfx##9, sfx)
-
-#define _273(fn, pfx, sfx)              \
-        _10(fn, pfx, sfx), _90(fn, pfx, sfx),           \
-        _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx),    \
-        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
-        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
-        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
-        _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx),   \
-        _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
-
-#define _PORT(pfx, sfx) pfx##_##sfx
-#define PORT_273(str) _273(_PORT, PORT, str)
+#define CPU_ALL_PORT(fn, pfx, sfx)                              \
+        PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx),           \
+        PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx),    \
+        PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx),   \
+        PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx),   \
+        PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx),   \
+        PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx),   \
+        PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
 
 enum {
         PINMUX_RESERVED = 0,
 
         PINMUX_DATA_BEGIN,
-        PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */
+        PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
         PINMUX_DATA_END,
 
         PINMUX_INPUT_BEGIN,
-        PORT_273(IN), /* PORT0_IN -> PORT272_IN */
+        PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
         PINMUX_INPUT_END,
 
         PINMUX_INPUT_PULLUP_BEGIN,
-        PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
+        PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
         PINMUX_INPUT_PULLUP_END,
 
         PINMUX_INPUT_PULLDOWN_BEGIN,
-        PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
+        PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
         PINMUX_INPUT_PULLDOWN_END,
 
         PINMUX_OUTPUT_BEGIN,
-        PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */
+        PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
         PINMUX_OUTPUT_END,
 
         PINMUX_FUNCTION_BEGIN,
-        PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
-        PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
-        PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */
-        PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */
-        PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */
-        PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */
-        PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */
-        PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */
-        PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */
-        PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */
+        PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
+        PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
+        PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
+        PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
+        PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
+        PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
+        PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
+        PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
+        PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
+        PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
 
         MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
         PINMUX_FUNCTION_END,
@@ -327,41 +308,6 @@ enum {
         PINMUX_MARK_END,
 };
 
-#define PORT_DATA_I(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
-
-#define PORT_DATA_I_PD(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD)
-
-#define PORT_DATA_I_PU(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
-                    PORT##nr##_IN, PORT##nr##_IN_PU)
-
-#define PORT_DATA_I_PU_PD(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
-
-#define PORT_DATA_O(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
-
-#define PORT_DATA_IO(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN)
-
-#define PORT_DATA_IO_PD(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD)
-
-#define PORT_DATA_IO_PU(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN, PORT##nr##_IN_PU)
-
-#define PORT_DATA_IO_PU_PD(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
-
-
 static pinmux_enum_t pinmux_data[] = {
 
         /* specify valid pin states for each pin in GPIO mode */
@@ -1098,13 +1044,9 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
 };
 
-#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
-#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
-#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
-
 static struct pinmux_gpio pinmux_gpios[] = {
         /* 49-1 -> 49-6 (GPIO) */
-        GPIO_PORT_273(),
+        GPIO_PORT_ALL(),
 
         /* Special Pull-up / Pull-down Functions */
         GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
@@ -1345,22 +1287,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
         GPIO_FN(DIVLOCK),
 };
 
-/* helper for top 4 bits in PORTnCR */
-#define PCRH(in, in_pd, in_pu, out)             \
-        0, (out), (in), 0,                      \
-        0, 0, 0, 0,                             \
-        0, 0, (in_pd), 0,                       \
-        0, 0, (in_pu), 0
-
-#define PORTCR(nr, reg)                                         \
-        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {           \
-                PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,           \
-                     PORT##nr##_IN_PU, PORT##nr##_OUT),         \
-                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
-                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
-                PORT##nr##_FN6, PORT##nr##_FN7 }                \
-        }
-
 static struct pinmux_cfg_reg pinmux_config_regs[] = {
         PORTCR(0, 0xe6050000), /* PORT0CR */
         PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 9c265dae138a..1bd6585a6acf 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -25,27 +25,13 @@
 #include <linux/gpio.h>
 #include <mach/sh7372.h>
 
-#define _1(fn, pfx, sfx) fn(pfx, sfx)
-
-#define _10(fn, pfx, sfx)                               \
-        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
-        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
-        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
-        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
-        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
-
-#define _80(fn, pfx, sfx)                               \
-        _10(fn, pfx##1, sfx),   _10(fn, pfx##2, sfx),   \
-        _10(fn, pfx##3, sfx),   _10(fn, pfx##4, sfx),   \
-        _10(fn, pfx##5, sfx),   _10(fn, pfx##6, sfx),   \
-        _10(fn, pfx##7, sfx),   _10(fn, pfx##8, sfx)
-
-#define _190(fn, pfx, sfx) \
-        _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
-        _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
-
-#define _PORT(pfx, sfx) pfx##_##sfx
-#define PORT_ALL(str) _190(_PORT, PORT, str)
+#define CPU_ALL_PORT(fn, pfx, sfx) \
+        PORT_10(fn, pfx, sfx),          PORT_90(fn, pfx, sfx), \
+        PORT_10(fn, pfx##10, sfx),      PORT_10(fn, pfx##11, sfx), \
+        PORT_10(fn, pfx##12, sfx),      PORT_10(fn, pfx##13, sfx), \
+        PORT_10(fn, pfx##14, sfx),      PORT_10(fn, pfx##15, sfx), \
+        PORT_10(fn, pfx##16, sfx),      PORT_10(fn, pfx##17, sfx), \
+        PORT_10(fn, pfx##18, sfx),      PORT_1(fn, pfx##190, sfx)
 
 enum {
         PINMUX_RESERVED = 0,
@@ -381,108 +367,124 @@ enum {
         PINMUX_MARK_END,
 };
 
-/* PORT_DATA_I_PD(nr) */
-#define _I___D(nr)                           \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD)
-
-/* PORT_DATA_I_PU(nr) */
-#define _I__U_(nr)                           \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
-                    PORT##nr##_IN, PORT##nr##_IN_PU)
-
-/* PORT_DATA_I_PU_PD(nr) */
-#define _I__UD(nr)                           \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
-
-/* PORT_DATA_O(nr) */
-#define __O___(nr)                                                      \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
-
-/* PORT_DATA_IO(nr) */
-#define _IO___(nr)                                   \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN)
-
-/* PORT_DATA_IO_PD(nr) */
-#define _IO__D(nr)                                           \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD)
-
-/* PORT_DATA_IO_PU(nr) */
-#define _IO_U_(nr)                                           \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN, PORT##nr##_IN_PU)
-
-/* PORT_DATA_IO_PU_PD(nr) */
-#define _IO_UD(nr)                                           \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
-                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
-
-
 static pinmux_enum_t pinmux_data[] = {
 
         /* specify valid pin states for each pin in GPIO mode */
-
-        _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
-        _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
-
-        __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
-        __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
-
-        _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
-        _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
-
-        _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
-        _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
-
-        _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
-        _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
-
-        _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
-        _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
-
-        _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
-        _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
-
-        _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
-        _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
-
-        _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
-        _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
-
-        _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
-        _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
-
-        _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
-        _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
-
-        _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
-        _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
-
-        _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
-        _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
-
-        _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
-        _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
-
-        _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
-        _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
-
-        _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
-        _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
-
-        __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
-        _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
-
-        _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
-        _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
-
-        _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
-        __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
-
-        _IO_UD(190),
+        PORT_DATA_IO_PD(0),             PORT_DATA_IO_PD(1),
+        PORT_DATA_O(2),                 PORT_DATA_I_PD(3),
+        PORT_DATA_I_PD(4),              PORT_DATA_I_PD(5),
+        PORT_DATA_IO_PU_PD(6),          PORT_DATA_I_PD(7),
+        PORT_DATA_IO_PD(8),             PORT_DATA_O(9),
+
+        PORT_DATA_O(10),                PORT_DATA_O(11),
+        PORT_DATA_IO_PU_PD(12),         PORT_DATA_IO_PD(13),
+        PORT_DATA_IO_PD(14),            PORT_DATA_O(15),
+        PORT_DATA_IO_PD(16),            PORT_DATA_IO_PD(17),
+        PORT_DATA_I_PD(18),             PORT_DATA_IO(19),
+
+        PORT_DATA_IO(20),               PORT_DATA_IO(21),
+        PORT_DATA_IO(22),               PORT_DATA_IO(23),
+        PORT_DATA_IO(24),               PORT_DATA_IO(25),
+        PORT_DATA_IO(26),               PORT_DATA_IO(27),
+        PORT_DATA_IO(28),               PORT_DATA_IO(29),
+
+        PORT_DATA_IO(30),               PORT_DATA_IO(31),
+        PORT_DATA_IO(32),               PORT_DATA_IO(33),
+        PORT_DATA_IO(34),               PORT_DATA_IO(35),
+        PORT_DATA_IO(36),               PORT_DATA_IO(37),
+        PORT_DATA_IO(38),               PORT_DATA_IO(39),
+
+        PORT_DATA_IO(40),               PORT_DATA_IO(41),
+        PORT_DATA_IO(42),               PORT_DATA_IO(43),
+        PORT_DATA_IO(44),               PORT_DATA_IO(45),
+        PORT_DATA_IO_PU(46),            PORT_DATA_IO_PU(47),
+        PORT_DATA_IO_PU(48),            PORT_DATA_IO_PU(49),
+
+        PORT_DATA_IO_PU(50),            PORT_DATA_IO_PU(51),
+        PORT_DATA_IO_PU(52),            PORT_DATA_IO_PU(53),
+        PORT_DATA_IO_PU(54),            PORT_DATA_IO_PU(55),
+        PORT_DATA_IO_PU(56),            PORT_DATA_IO_PU(57),
+        PORT_DATA_IO_PU(58),            PORT_DATA_IO_PU(59),
+
+        PORT_DATA_IO_PU(60),            PORT_DATA_IO_PU(61),
+        PORT_DATA_IO(62),               PORT_DATA_O(63),
+        PORT_DATA_O(64),                PORT_DATA_IO_PU(65),
+        PORT_DATA_O(66),                PORT_DATA_IO_PU(67),  /*66?*/
+        PORT_DATA_O(68),                PORT_DATA_IO(69),
+
+        PORT_DATA_IO(70),               PORT_DATA_IO(71),
+        PORT_DATA_O(72),                PORT_DATA_I_PU(73),
+        PORT_DATA_I_PU_PD(74),          PORT_DATA_IO_PU_PD(75),
+        PORT_DATA_IO_PU_PD(76),         PORT_DATA_IO_PU_PD(77),
+        PORT_DATA_IO_PU_PD(78),         PORT_DATA_IO_PU_PD(79),
+
+        PORT_DATA_IO_PU_PD(80),         PORT_DATA_IO_PU_PD(81),
+        PORT_DATA_IO_PU_PD(82),         PORT_DATA_IO_PU_PD(83),
+        PORT_DATA_IO_PU_PD(84),         PORT_DATA_IO_PU_PD(85),
+        PORT_DATA_IO_PU_PD(86),         PORT_DATA_IO_PU_PD(87),
+        PORT_DATA_IO_PU_PD(88),         PORT_DATA_IO_PU_PD(89),
+
+        PORT_DATA_IO_PU_PD(90),         PORT_DATA_IO_PU_PD(91),
+        PORT_DATA_IO_PU_PD(92),         PORT_DATA_IO_PU_PD(93),
+        PORT_DATA_IO_PU_PD(94),         PORT_DATA_IO_PU_PD(95),
+        PORT_DATA_IO_PU(96),            PORT_DATA_IO_PU_PD(97),
+        PORT_DATA_IO_PU_PD(98),         PORT_DATA_O(99), /*99?*/
+
+        PORT_DATA_IO_PD(100),           PORT_DATA_IO_PD(101),
+        PORT_DATA_IO_PD(102),           PORT_DATA_IO_PD(103),
+        PORT_DATA_IO_PD(104),           PORT_DATA_IO_PD(105),
+        PORT_DATA_IO_PU(106),           PORT_DATA_IO_PU(107),
+        PORT_DATA_IO_PU(108),           PORT_DATA_IO_PU(109),
+
+        PORT_DATA_IO_PU(110),           PORT_DATA_IO_PU(111),
+        PORT_DATA_IO_PD(112),           PORT_DATA_IO_PD(113),
+        PORT_DATA_IO_PU(114),           PORT_DATA_IO_PU(115),
+        PORT_DATA_IO_PU(116),           PORT_DATA_IO_PU(117),
+        PORT_DATA_IO_PU(118),           PORT_DATA_IO_PU(119),
+
+        PORT_DATA_IO_PU(120),           PORT_DATA_IO_PD(121),
+        PORT_DATA_IO_PD(122),           PORT_DATA_IO_PD(123),
+        PORT_DATA_IO_PD(124),           PORT_DATA_IO_PD(125),
+        PORT_DATA_IO_PD(126),           PORT_DATA_IO_PD(127),
+        PORT_DATA_IO_PD(128),           PORT_DATA_IO_PU_PD(129),
+
+        PORT_DATA_IO_PU_PD(130),        PORT_DATA_IO_PU_PD(131),
+        PORT_DATA_IO_PU_PD(132),        PORT_DATA_IO_PU_PD(133),
+        PORT_DATA_IO_PU_PD(134),        PORT_DATA_IO_PU_PD(135),
+        PORT_DATA_IO_PD(136),           PORT_DATA_IO_PD(137),
+        PORT_DATA_IO_PD(138),           PORT_DATA_IO_PD(139),
+
+        PORT_DATA_IO_PD(140),           PORT_DATA_IO_PD(141),
+        PORT_DATA_IO_PD(142),           PORT_DATA_IO_PU_PD(143),
+        PORT_DATA_IO_PD(144),           PORT_DATA_IO_PD(145),
+        PORT_DATA_IO_PD(146),           PORT_DATA_IO_PD(147),
+        PORT_DATA_IO_PD(148),           PORT_DATA_IO_PD(149),
+
+        PORT_DATA_IO_PD(150),           PORT_DATA_IO_PD(151),
+        PORT_DATA_IO_PU_PD(152),        PORT_DATA_I_PD(153),
+        PORT_DATA_IO_PU_PD(154),        PORT_DATA_I_PD(155),
+        PORT_DATA_IO_PD(156),           PORT_DATA_IO_PD(157),
+        PORT_DATA_I_PD(158),            PORT_DATA_IO_PD(159),
+
+        PORT_DATA_O(160),               PORT_DATA_IO_PD(161),
+        PORT_DATA_IO_PD(162),           PORT_DATA_IO_PD(163),
+        PORT_DATA_I_PD(164),            PORT_DATA_IO_PD(165),
+        PORT_DATA_I_PD(166),            PORT_DATA_I_PD(167),
+        PORT_DATA_I_PD(168),            PORT_DATA_I_PD(169),
+
+        PORT_DATA_I_PD(170),            PORT_DATA_O(171),
+        PORT_DATA_IO_PU_PD(172),        PORT_DATA_IO_PU_PD(173),
+        PORT_DATA_IO_PU_PD(174),        PORT_DATA_IO_PU_PD(175),
+        PORT_DATA_IO_PU_PD(176),        PORT_DATA_IO_PU_PD(177),
+        PORT_DATA_IO_PU_PD(178),        PORT_DATA_O(179),
+
+        PORT_DATA_IO_PU_PD(180),        PORT_DATA_IO_PU_PD(181),
+        PORT_DATA_IO_PU_PD(182),        PORT_DATA_IO_PU_PD(183),
+        PORT_DATA_IO_PU_PD(184),        PORT_DATA_O(185),
+        PORT_DATA_IO_PU_PD(186),        PORT_DATA_IO_PU_PD(187),
+        PORT_DATA_IO_PU_PD(188),        PORT_DATA_IO_PU_PD(189),
+
+        PORT_DATA_IO_PU_PD(190),
 
         /* IRQ */
         PINMUX_DATA(IRQ0_6_MARK,        PORT6_FN0,      MSEL1CR_0_0),
@@ -926,10 +928,6 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(MFIv4_MARK,         MSEL4CR_6_1),
 };
 
-#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
-#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
-#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
-
 static struct pinmux_gpio pinmux_gpios[] = {
 
         /* PORT */
@@ -1201,22 +1199,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
         GPIO_FN(SDENC_DV_CLKI),
 };
 
-/* helper for top 4 bits in PORTnCR */
-#define PCRH(in, in_pd, in_pu, out)             \
-        0, (out), (in), 0,                      \
-        0, 0, 0, 0,                             \
-        0, 0, (in_pd), 0,                       \
-        0, 0, (in_pu), 0
-
-#define PORTCR(nr, reg)                                         \
-        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {           \
-                PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,           \
-                     PORT##nr##_IN_PU, PORT##nr##_OUT),         \
-                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
-                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
-                PORT##nr##_FN6, PORT##nr##_FN7 }                \
-        }
-
 static struct pinmux_cfg_reg pinmux_config_regs[] = {
         PORTCR(0,       0xE6051000), /* PORT0CR */
         PORTCR(1,       0xE6051001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
index 613e6842ad05..2f10511946ad 100644
--- a/arch/arm/mach-shmobile/pfc-sh7377.c
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -22,84 +22,65 @@
 #include <linux/gpio.h>
 #include <mach/sh7377.h>
 
-#define _1(fn, pfx, sfx) fn(pfx, sfx)
-
-#define _10(fn, pfx, sfx)                               \
-        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
-        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
-        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
-        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
-        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
-
-#define _90(fn, pfx, sfx)                               \
-        _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx),     \
-        _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx),     \
-        _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx),     \
-        _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx),     \
-        _10(fn, pfx##9, sfx)
-
-#define _265(fn, pfx, sfx)                              \
-        _10(fn, pfx, sfx), _90(fn, pfx, sfx),           \
-        _10(fn, pfx##10, sfx),                          \
-        _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx),   \
-        _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx),   \
-        _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx),   \
-        _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx),   \
-        _1(fn, pfx##118, sfx),                          \
-        _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx),   \
-        _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx),   \
-        _10(fn, pfx##15, sfx),                          \
-        _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx),   \
-        _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx),   \
-        _1(fn, pfx##164, sfx),                          \
-        _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx),   \
-        _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx),   \
-        _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx),   \
-        _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx),   \
-        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
-        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
-        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
-        _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx),   \
-        _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx),   \
-        _1(fn, pfx##264, sfx)
-
-#define _PORT(pfx, sfx) pfx##_##sfx
-#define PORT_265(str) _265(_PORT, PORT, str)
+#define CPU_ALL_PORT(fn, pfx, sfx)                              \
+        PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx),           \
+        PORT_10(fn, pfx##10, sfx),                              \
+        PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx),   \
+        PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx),   \
+        PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx),   \
+        PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx),   \
+        PORT_1(fn, pfx##118, sfx),                              \
+        PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx),   \
+        PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx),   \
+        PORT_10(fn, pfx##15, sfx),                              \
+        PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx),   \
+        PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx),   \
+        PORT_1(fn, pfx##164, sfx),                              \
+        PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx),   \
+        PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx),   \
+        PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx),   \
+        PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx),   \
+        PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx),   \
+        PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx),   \
+        PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx),   \
+        PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx),   \
+        PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx),   \
+        PORT_1(fn, pfx##264, sfx)
 
 enum {
         PINMUX_RESERVED = 0,
 
         PINMUX_DATA_BEGIN,
-        PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */
+        PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
         PINMUX_DATA_END,
 
         PINMUX_INPUT_BEGIN,
-        PORT_265(IN), /* PORT0_IN -> PORT264_IN */
+        PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
         PINMUX_INPUT_END,
 
         PINMUX_INPUT_PULLUP_BEGIN,
-        PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
+        PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
         PINMUX_INPUT_PULLUP_END,
 
         PINMUX_INPUT_PULLDOWN_BEGIN,
-        PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
+        PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
         PINMUX_INPUT_PULLDOWN_END,
 
         PINMUX_OUTPUT_BEGIN,
-        PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */
+        PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
         PINMUX_OUTPUT_END,
 
         PINMUX_FUNCTION_BEGIN,
-        PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
-        PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
-        PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */
-        PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */
-        PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */
-        PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */
-        PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */
-        PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */
-        PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */
-        PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */
+        PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
+        PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
+        PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
+        PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
+        PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
+        PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
+        PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
+        PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
+        PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
+        PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
 
         MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
         MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
@@ -360,45 +341,6 @@ enum {
         PINMUX_MARK_END,
 };
 
-#define PORT_DATA_I(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
-
-#define PORT_DATA_I_PD(nr)      \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_IN, PORT##nr##_IN_PD)
-
-#define PORT_DATA_I_PU(nr)      \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_IN, PORT##nr##_IN_PU)
-
-#define PORT_DATA_I_PU_PD(nr)   \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_IN, PORT##nr##_IN_PD,        \
-                                PORT##nr##_IN_PU)
-
-#define PORT_DATA_O(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT)
-
-#define PORT_DATA_IO(nr)        \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN)
-
-#define PORT_DATA_IO_PD(nr)     \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN,          \
-                                PORT##nr##_IN_PD)
-
-#define PORT_DATA_IO_PU(nr)     \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN,          \
-                                PORT##nr##_IN_PU)
-
-#define PORT_DATA_IO_PU_PD(nr)  \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN,          \
-                                PORT##nr##_IN_PD, PORT##nr##_IN_PU)
-
 static pinmux_enum_t pinmux_data[] = {
         /* specify valid pin states for each pin in GPIO mode */
         /* 55-1 (GPIO) */
@@ -1078,13 +1020,9 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
 };
 
-#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
-#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
-#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
-
 static struct pinmux_gpio pinmux_gpios[] = {
         /* 55-1 -> 55-5 (GPIO) */
-        GPIO_PORT_265(),
+        GPIO_PORT_ALL(),
 
         /* Special Pull-up / Pull-down Functions */
         GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
@@ -1362,23 +1300,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
         GPIO_FN(RESETOUTS),
 };
 
-/* helper for top 4 bits in PORTnCR */
-#define PCRH(in, in_pd, in_pu, out)     \
-        0, (out), (in), 0,      \
-                0, 0, 0, 0,     \
-                0, 0, (in_pd), 0,       \
-                0, 0, (in_pu), 0
-
-#define PORTCR(nr, reg) \
-        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {   \
-                        PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,   \
-                                 PORT##nr##_IN_PU, PORT##nr##_OUT),     \
-                                PORT##nr##_FN0, PORT##nr##_FN1, \
-                                PORT##nr##_FN2, PORT##nr##_FN3, \
-                                PORT##nr##_FN4, PORT##nr##_FN5, \
-                                PORT##nr##_FN6, PORT##nr##_FN7 }        \
-        }
-
 static struct pinmux_cfg_reg pinmux_config_regs[] = {
         PORTCR(0, 0xe6050000), /* PORT0CR */
         PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c
index 5abe02fbd6b9..e05634ce2e0d 100644
--- a/arch/arm/mach-shmobile/pfc-sh73a0.c
+++ b/arch/arm/mach-shmobile/pfc-sh73a0.c
@@ -24,83 +24,71 @@
 #include <mach/sh73a0.h>
 #include <mach/irqs.h>
 
-#define _1(fn, pfx, sfx) fn(pfx, sfx)
-
-#define _10(fn, pfx, sfx)                               \
-        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
-        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
-        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
-        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
-        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
-
-#define _310(fn, pfx, sfx)                              \
-        _10(fn, pfx,    sfx), _10(fn, pfx##1, sfx),     \
-        _10(fn, pfx##2, sfx), _10(fn, pfx##3, sfx),     \
-        _10(fn, pfx##4, sfx), _10(fn, pfx##5, sfx),     \
-        _10(fn, pfx##6, sfx), _10(fn, pfx##7, sfx),     \
-        _10(fn, pfx##8, sfx), _10(fn, pfx##9, sfx),     \
-        _10(fn, pfx##10, sfx),                          \
-        _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx),   \
-        _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx),   \
-        _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx),   \
-        _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx),   \
-        _1(fn, pfx##118, sfx),                          \
-        _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx),   \
-        _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx),   \
-        _10(fn, pfx##15, sfx),                          \
-        _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx),   \
-        _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx),   \
-        _1(fn, pfx##164, sfx),                          \
-        _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx),   \
-        _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx),   \
-        _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx),   \
-        _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx),   \
-        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
-        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
-        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
-        _10(fn, pfx##26, sfx), _10(fn, pfx##27, sfx),   \
-        _1(fn, pfx##280, sfx), _1(fn, pfx##281, sfx),   \
-        _1(fn, pfx##282, sfx),                          \
-        _1(fn, pfx##288, sfx), _1(fn, pfx##289, sfx),   \
-        _10(fn, pfx##29, sfx), _10(fn, pfx##30, sfx)
-
-#define _PORT(pfx, sfx) pfx##_##sfx
-#define PORT_310(str) _310(_PORT, PORT, str)
+#define CPU_ALL_PORT(fn, pfx, sfx)                              \
+        PORT_10(fn, pfx,    sfx), PORT_10(fn, pfx##1, sfx),     \
+        PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx),     \
+        PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx),     \
+        PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx),     \
+        PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx),     \
+        PORT_10(fn, pfx##10, sfx),                              \
+        PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx),   \
+        PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx),   \
+        PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx),   \
+        PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx),   \
+        PORT_1(fn, pfx##118, sfx),                              \
+        PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx),   \
+        PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx),   \
+        PORT_10(fn, pfx##15, sfx),                              \
+        PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx),   \
+        PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx),   \
+        PORT_1(fn, pfx##164, sfx),                              \
+        PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx),   \
+        PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx),   \
+        PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx),   \
+        PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx),   \
+        PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx),   \
+        PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx),   \
+        PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx),   \
+        PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx),   \
+        PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx),   \
+        PORT_1(fn, pfx##282, sfx),                              \
+        PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx),   \
+        PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
 
 enum {
         PINMUX_RESERVED = 0,
 
         PINMUX_DATA_BEGIN,
-        PORT_310(DATA),                 /* PORT0_DATA -> PORT309_DATA */
+        PORT_ALL(DATA),                 /* PORT0_DATA -> PORT309_DATA */
         PINMUX_DATA_END,
 
         PINMUX_INPUT_BEGIN,
-        PORT_310(IN),                   /* PORT0_IN -> PORT309_IN */
+        PORT_ALL(IN),                   /* PORT0_IN -> PORT309_IN */
         PINMUX_INPUT_END,
 
         PINMUX_INPUT_PULLUP_BEGIN,
-        PORT_310(IN_PU),                /* PORT0_IN_PU -> PORT309_IN_PU */
+        PORT_ALL(IN_PU),                /* PORT0_IN_PU -> PORT309_IN_PU */
         PINMUX_INPUT_PULLUP_END,
 
         PINMUX_INPUT_PULLDOWN_BEGIN,
-        PORT_310(IN_PD),                /* PORT0_IN_PD -> PORT309_IN_PD */
+        PORT_ALL(IN_PD),                /* PORT0_IN_PD -> PORT309_IN_PD */
         PINMUX_INPUT_PULLDOWN_END,
 
         PINMUX_OUTPUT_BEGIN,
-        PORT_310(OUT),                  /* PORT0_OUT -> PORT309_OUT */
+        PORT_ALL(OUT),                  /* PORT0_OUT -> PORT309_OUT */
         PINMUX_OUTPUT_END,
 
         PINMUX_FUNCTION_BEGIN,
-        PORT_310(FN_IN),                /* PORT0_FN_IN -> PORT309_FN_IN */
-        PORT_310(FN_OUT),               /* PORT0_FN_OUT -> PORT309_FN_OUT */
-        PORT_310(FN0),                  /* PORT0_FN0 -> PORT309_FN0 */
-        PORT_310(FN1),                  /* PORT0_FN1 -> PORT309_FN1 */
-        PORT_310(FN2),                  /* PORT0_FN2 -> PORT309_FN2 */
-        PORT_310(FN3),                  /* PORT0_FN3 -> PORT309_FN3 */
-        PORT_310(FN4),                  /* PORT0_FN4 -> PORT309_FN4 */
-        PORT_310(FN5),                  /* PORT0_FN5 -> PORT309_FN5 */
-        PORT_310(FN6),                  /* PORT0_FN6 -> PORT309_FN6 */
-        PORT_310(FN7),                  /* PORT0_FN7 -> PORT309_FN7 */
+        PORT_ALL(FN_IN),                /* PORT0_FN_IN -> PORT309_FN_IN */
+        PORT_ALL(FN_OUT),               /* PORT0_FN_OUT -> PORT309_FN_OUT */
+        PORT_ALL(FN0),                  /* PORT0_FN0 -> PORT309_FN0 */
+        PORT_ALL(FN1),                  /* PORT0_FN1 -> PORT309_FN1 */
+        PORT_ALL(FN2),                  /* PORT0_FN2 -> PORT309_FN2 */
+        PORT_ALL(FN3),                  /* PORT0_FN3 -> PORT309_FN3 */
+        PORT_ALL(FN4),                  /* PORT0_FN4 -> PORT309_FN4 */
+        PORT_ALL(FN5),                  /* PORT0_FN5 -> PORT309_FN5 */
+        PORT_ALL(FN6),                  /* PORT0_FN6 -> PORT309_FN6 */
+        PORT_ALL(FN7),                  /* PORT0_FN7 -> PORT309_FN7 */
 
         MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
         MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
@@ -508,6 +496,14 @@ enum {
         SDHICMD2_PU_MARK,
         MMCCMD0_PU_MARK,
         MMCCMD1_PU_MARK,
+        MMCD0_0_PU_MARK,
+        MMCD0_1_PU_MARK,
+        MMCD0_2_PU_MARK,
+        MMCD0_3_PU_MARK,
+        MMCD0_4_PU_MARK,
+        MMCD0_5_PU_MARK,
+        MMCD0_6_PU_MARK,
+        MMCD0_7_PU_MARK,
         FSIBISLD_PU_MARK,
         FSIACK_PU_MARK,
         FSIAILR_PU_MARK,
@@ -517,45 +513,6 @@ enum {
         PINMUX_MARK_END,
 };
 
-#define PORT_DATA_I(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
-
-#define PORT_DATA_I_PD(nr)      \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_IN, PORT##nr##_IN_PD)
-
-#define PORT_DATA_I_PU(nr)      \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_IN, PORT##nr##_IN_PU)
-
-#define PORT_DATA_I_PU_PD(nr)   \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_IN, PORT##nr##_IN_PD,        \
-                                PORT##nr##_IN_PU)
-
-#define PORT_DATA_O(nr) \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT)
-
-#define PORT_DATA_IO(nr)        \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN)
-
-#define PORT_DATA_IO_PD(nr)     \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN,          \
-                                PORT##nr##_IN_PD)
-
-#define PORT_DATA_IO_PU(nr)     \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN,          \
-                                PORT##nr##_IN_PU)
-
-#define PORT_DATA_IO_PU_PD(nr)  \
-        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
-                                PORT##nr##_OUT, PORT##nr##_IN,          \
-                                PORT##nr##_IN_PD, PORT##nr##_IN_PU)
-
 static pinmux_enum_t pinmux_data[] = {
         /* specify valid pin states for each pin in GPIO mode */
 
@@ -1561,6 +1518,24 @@ static pinmux_enum_t pinmux_data[] = {
                 MSEL4CR_MSEL15_0),
         PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
                 MSEL4CR_MSEL15_1),
+
+        PINMUX_DATA(MMCD0_0_PU_MARK,
+                    PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_1_PU_MARK,
+                    PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_2_PU_MARK,
+                    PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_3_PU_MARK,
+                    PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_4_PU_MARK,
+                    PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_5_PU_MARK,
+                    PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_6_PU_MARK,
+                    PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
+        PINMUX_DATA(MMCD0_7_PU_MARK,
+                    PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
+
         PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
         PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
         PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
@@ -1568,12 +1543,8 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
 };
 
-#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
-#define GPIO_PORT_310() _310(_GPIO_PORT, , unused)
-#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
-
 static struct pinmux_gpio pinmux_gpios[] = {
-        GPIO_PORT_310(),
+        GPIO_PORT_ALL(),
 
         /* Table 25-1 (Functions 0-7) */
         GPIO_FN(VBUS_0),
@@ -2236,24 +2207,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
         GPIO_FN(SDHICMD2_PU),
         GPIO_FN(MMCCMD0_PU),
         GPIO_FN(MMCCMD1_PU),
+        GPIO_FN(MMCD0_0_PU),
+        GPIO_FN(MMCD0_1_PU),
+        GPIO_FN(MMCD0_2_PU),
+        GPIO_FN(MMCD0_3_PU),
+        GPIO_FN(MMCD0_4_PU),
+        GPIO_FN(MMCD0_5_PU),
+        GPIO_FN(MMCD0_6_PU),
+        GPIO_FN(MMCD0_7_PU),
         GPIO_FN(FSIACK_PU),
         GPIO_FN(FSIAILR_PU),
         GPIO_FN(FSIAIBT_PU),
         GPIO_FN(FSIAISLD_PU),
 };
 
-#define PORTCR(nr, reg) \
-        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
-                0, \
-                /*0001*/ PORT##nr##_OUT , \
-                /*0010*/ PORT##nr##_IN , 0, 0, 0, 0, 0, 0, 0, \
-                /*1010*/ PORT##nr##_IN_PD, 0, 0, 0, \
-                /*1110*/ PORT##nr##_IN_PU, 0, \
-                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
-                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
-                PORT##nr##_FN6, PORT##nr##_FN7, 0, 0, 0, 0, 0, 0, 0, 0 } \
-        }
-
 static struct pinmux_cfg_reg pinmux_config_regs[] = {
         PORTCR(0, 0xe6050000), /* PORT0CR */
         PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 79612737c5b2..34bbcbfb1706 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/irq.h>
 #include <linux/bitrev.h>
+#include <linux/console.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/tlbflush.h>
@@ -106,9 +107,8 @@ static int pd_power_down(struct generic_pm_domain *genpd)
         return 0;
 }
 
-static int pd_power_up(struct generic_pm_domain *genpd)
+static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
 {
-        struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
         unsigned int mask = 1 << sh7372_pd->bit_shift;
         unsigned int retry_count;
         int ret = 0;
@@ -123,13 +123,13 @@ static int pd_power_up(struct generic_pm_domain *genpd)
 
         for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
                 if (!(__raw_readl(SWUCR) & mask))
-                        goto out;
+                        break;
                 if (retry_count > PSTR_RETRIES)
                         udelay(PSTR_DELAY_US);
                 else
                         cpu_relax();
         }
-        if (__raw_readl(SWUCR) & mask)
+        if (!retry_count)
                 ret = -EIO;
 
         if (!sh7372_pd->no_debug)
@@ -137,12 +137,17 @@ static int pd_power_up(struct generic_pm_domain *genpd)
                          mask, __raw_readl(PSTR));
 
  out:
-        if (ret == 0 && sh7372_pd->resume)
+        if (ret == 0 && sh7372_pd->resume && do_resume)
                 sh7372_pd->resume();
 
         return ret;
 }
 
+static int pd_power_up(struct generic_pm_domain *genpd)
+{
+         return __pd_power_up(to_sh7372_pd(genpd), true);
+}
+
 static void sh7372_a4r_suspend(void)
 {
         sh7372_intcs_suspend();
@@ -174,7 +179,7 @@ void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
         genpd->active_wakeup = pd_active_wakeup;
         genpd->power_off = pd_power_down;
         genpd->power_on = pd_power_up;
-        genpd->power_on(&sh7372_pd->genpd);
+        __pd_power_up(sh7372_pd, false);
 }
 
 void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
@@ -227,11 +232,23 @@ struct sh7372_pm_domain sh7372_a3sp = {
         .no_debug = true,
 };
 
+static void sh7372_a3sp_init(void)
+{
+        /* serial consoles make use of SCIF hardware located in A3SP,
+         * keep such power domain on if "no_console_suspend" is set.
+         */
+        sh7372_a3sp.stay_on = !console_suspend_enabled;
+}
+
 struct sh7372_pm_domain sh7372_a3sg = {
         .bit_shift = 13,
 };
 
-#endif /* CONFIG_PM */
+#else /* !CONFIG_PM */
+
+static inline void sh7372_a3sp_init(void) {}
+
+#endif /* !CONFIG_PM */
 
 #if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
 static int sh7372_do_idle_core_standby(unsigned long unused)
@@ -402,22 +419,18 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
 
 #ifdef CONFIG_CPU_IDLE
 
-static void sh7372_cpuidle_setup(struct cpuidle_device *dev)
+static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
 {
-        struct cpuidle_state *state;
-        int i = dev->state_count;
+        struct cpuidle_state *state = &drv->states[drv->state_count];
 
-        state = &dev->states[i];
         snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
         strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
         state->exit_latency = 10;
         state->target_residency = 20 + 10;
-        state->power_usage = 1; /* perhaps not */
-        state->flags = 0;
-        state->flags |= CPUIDLE_FLAG_TIME_VALID;
-        shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
+        state->flags = CPUIDLE_FLAG_TIME_VALID;
+        shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
 
-        dev->state_count = i + 1;
+        drv->state_count++;
 }
 
 static void sh7372_cpuidle_init(void)
@@ -469,6 +482,8 @@ void __init sh7372_pm_init(void)
         /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
         __raw_writel(0, PDNSEL);
 
+        sh7372_a3sp_init();
+
         sh7372_suspend_init();
         sh7372_cpuidle_init();
 }
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
deleted file mode 100644
index bd5c6a3b8c55..000000000000
--- a/arch/arm/mach-shmobile/pm_runtime.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * arch/arm/mach-shmobile/pm_runtime.c
- *
- * Runtime PM support code for SuperH Mobile ARM
- *
- *  Copyright (C) 2009-2010 Magnus Damm
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/pm_runtime.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_clock.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/sh_clk.h>
-#include <linux/bitmap.h>
-#include <linux/slab.h>
-
-#ifdef CONFIG_PM_RUNTIME
-
-static int default_platform_runtime_idle(struct device *dev)
-{
-        /* suspend synchronously to disable clocks immediately */
-        return pm_runtime_suspend(dev);
-}
-
-static struct dev_pm_domain default_pm_domain = {
-        .ops = {
-                .runtime_suspend = pm_clk_suspend,
-                .runtime_resume = pm_clk_resume,
-                .runtime_idle = default_platform_runtime_idle,
-                USE_PLATFORM_PM_SLEEP_OPS
-        },
-};
-
-#define DEFAULT_PM_DOMAIN_PTR   (&default_pm_domain)
-
-#else
-
-#define DEFAULT_PM_DOMAIN_PTR   NULL
-
-#endif /* CONFIG_PM_RUNTIME */
-
-static struct pm_clk_notifier_block platform_bus_notifier = {
-        .pm_domain = DEFAULT_PM_DOMAIN_PTR,
-        .con_ids = { NULL, },
-};
-
-static int __init sh_pm_runtime_init(void)
-{
-        pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
-        return 0;
-}
-core_initcall(sh_pm_runtime_init);
-
-static int __init sh_pm_runtime_late_init(void)
-{
-        pm_genpd_poweroff_unused();
-        return 0;
-}
-late_initcall(sh_pm_runtime_late_init);
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig
deleted file mode 100644
index ad86415d1577..000000000000
--- a/arch/arm/mach-tcc8k/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if ARCH_TCC8K
-
-comment "TCC8000 systems:"
-
-config MACH_TCC8000_SDK
-        bool "Telechips TCC8000-SDK development kit"
-        default y
-        help
-          Support for the Telechips TCC8000-SDK board.
-
-endif
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile
deleted file mode 100644
index 9bacf31e49ba..000000000000
--- a/arch/arm/mach-tcc8k/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for TCC8K boards and common files.
-#
-
-# Common support
-obj-y += clock.o irq.o time.o io.o devices.o
-
-# Board specific support
-obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
deleted file mode 100644
index 5e02d4156b04..000000000000
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
-   zreladdr-y           += 0x20008000
-params_phys-y           := 0x20000100
-initrd_phys-y           := 0x20800000
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
deleted file mode 100644
index 777a5bb9eed2..000000000000
--- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/time.h>
-
-#include <mach/clock.h>
-#include <mach/tcc-nand.h>
-#include <mach/tcc8k-regs.h>
-
-#include "common.h"
-
-#define XI_FREQUENCY    12000000
-#define XTI_FREQUENCY   32768
-
-#ifdef CONFIG_MTD_NAND_TCC
-/* NAND */
-static struct tcc_nand_platform_data tcc8k_sdk_nand_data = {
-        .width = 1,
-        .hw_ecc = 0,
-};
-#endif
-
-static void __init tcc8k_init(void)
-{
-#ifdef CONFIG_MTD_NAND_TCC
-        tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data;
-        platform_device_register(&tcc_nand_device);
-#endif
-}
-
-static void __init tcc8k_init_timer(void)
-{
-        tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY);
-}
-
-static struct sys_timer tcc8k_timer = {
-        .init   = tcc8k_init_timer,
-};
-
-static void __init tcc8k_map_io(void)
-{
-        tcc8k_map_common_io();
-
-        /* set PLL0 clock to 96MHz, adapt UART0 divisor */
-        __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS);
-        __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS);
-
-        /* set PLL1 clock to 192MHz */
-        __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS);
-
-        /* set PLL2 clock to 48MHz */
-        __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS);
-
-        /* with CPU freq higher than 150 MHz, need extra DTCM wait */
-        __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS);
-
-        /* PLL locking time as specified */
-        udelay(300);
-}
-
-MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
-        .atag_offset    = 0x100,
-        .map_io         = tcc8k_map_io,
-        .init_irq       = tcc8k_init_irq,
-        .init_machine   = tcc8k_init,
-        .timer          = &tcc8k_timer,
-MACHINE_END
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
deleted file mode 100644
index e7cdae5c77a4..000000000000
--- a/arch/arm/mach-tcc8k/clock.c
+++ /dev/null
@@ -1,580 +0,0 @@
-/*
- * Lowlevel clock handling for Telechips TCC8xxx SoCs
- *
- * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2
- */
-
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <linux/clkdev.h>
-
-#include <mach/clock.h>
-#include <mach/irqs.h>
-#include <mach/tcc8k-regs.h>
-
-#include "common.h"
-
-#define BCLKCTR0        (CKC_BASE + BCLKCTR0_OFFS)
-#define BCLKCTR1        (CKC_BASE + BCLKCTR1_OFFS)
-
-#define ACLKREF         (CKC_BASE + ACLKREF_OFFS)
-#define ACLKUART0       (CKC_BASE + ACLKUART0_OFFS)
-#define ACLKUART1       (CKC_BASE + ACLKUART1_OFFS)
-#define ACLKUART2       (CKC_BASE + ACLKUART2_OFFS)
-#define ACLKUART3       (CKC_BASE + ACLKUART3_OFFS)
-#define ACLKUART4       (CKC_BASE + ACLKUART4_OFFS)
-#define ACLKI2C         (CKC_BASE + ACLKI2C_OFFS)
-#define ACLKADC         (CKC_BASE + ACLKADC_OFFS)
-#define ACLKUSBH        (CKC_BASE + ACLKUSBH_OFFS)
-#define ACLKLCD         (CKC_BASE + ACLKLCD_OFFS)
-#define ACLKSDH0        (CKC_BASE + ACLKSDH0_OFFS)
-#define ACLKSDH1        (CKC_BASE + ACLKSDH1_OFFS)
-#define ACLKSPI0        (CKC_BASE + ACLKSPI0_OFFS)
-#define ACLKSPI1        (CKC_BASE + ACLKSPI1_OFFS)
-#define ACLKSPDIF       (CKC_BASE + ACLKSPDIF_OFFS)
-#define ACLKC3DEC       (CKC_BASE + ACLKC3DEC_OFFS)
-#define ACLKCAN0        (CKC_BASE + ACLKCAN0_OFFS)
-#define ACLKCAN1        (CKC_BASE + ACLKCAN1_OFFS)
-#define ACLKGSB0        (CKC_BASE + ACLKGSB0_OFFS)
-#define ACLKGSB1        (CKC_BASE + ACLKGSB1_OFFS)
-#define ACLKGSB2        (CKC_BASE + ACLKGSB2_OFFS)
-#define ACLKGSB3        (CKC_BASE + ACLKGSB3_OFFS)
-#define ACLKTCT         (CKC_BASE + ACLKTCT_OFFS)
-#define ACLKTCX         (CKC_BASE + ACLKTCX_OFFS)
-#define ACLKTCZ         (CKC_BASE + ACLKTCZ_OFFS)
-
-#define ACLK_MAX_DIV    (0xfff + 1)
-
-/* Crystal frequencies */
-static unsigned long xi_rate, xti_rate;
-
-static void __iomem *pll_cfg_addr(int pll)
-{
-        switch (pll) {
-        case 0: return (CKC_BASE + PLL0CFG_OFFS);
-        case 1: return (CKC_BASE + PLL1CFG_OFFS);
-        case 2: return (CKC_BASE + PLL2CFG_OFFS);
-        default:
-                BUG();
-        }
-}
-
-static int pll_enable(int pll, int enable)
-{
-        u32 reg;
-        void __iomem *addr = pll_cfg_addr(pll);
-
-        reg = __raw_readl(addr);
-        if (enable)
-                reg &= ~PLLxCFG_PD;
-        else
-                reg |= PLLxCFG_PD;
-
-        __raw_writel(reg, addr);
-        return 0;
-}
-
-static int xi_enable(int enable)
-{
-        u32 reg;
-
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        if (enable)
-                reg |= CLKCTRL_XE;
-        else
-                reg &= ~CLKCTRL_XE;
-
-        __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS);
-        return 0;
-}
-
-static int root_clk_enable(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return pll_enable(0, 1);
-        case CLK_SRC_PLL1: return pll_enable(1, 1);
-        case CLK_SRC_PLL2: return pll_enable(2, 1);
-        case CLK_SRC_XI: return xi_enable(1);
-        default:
-                BUG();
-        }
-        return 0;
-}
-
-static int root_clk_disable(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return pll_enable(0, 0);
-        case CLK_SRC_PLL1: return pll_enable(1, 0);
-        case CLK_SRC_PLL2: return pll_enable(2, 0);
-        case CLK_SRC_XI: return xi_enable(0);
-        default:
-                BUG();
-        }
-        return 0;
-}
-
-static int enable_clk(struct clk *clk)
-{
-        u32 reg;
-
-        if (clk->root_id != CLK_SRC_NOROOT)
-                return root_clk_enable(clk->root_id);
-
-        if (clk->aclkreg) {
-                reg = __raw_readl(clk->aclkreg);
-                reg |= ACLK_EN;
-                __raw_writel(reg, clk->aclkreg);
-        }
-        if (clk->bclkctr) {
-                reg = __raw_readl(clk->bclkctr);
-                reg |= 1 << clk->bclk_shift;
-                __raw_writel(reg, clk->bclkctr);
-        }
-        return 0;
-}
-
-static void disable_clk(struct clk *clk)
-{
-        u32 reg;
-
-        if (clk->root_id != CLK_SRC_NOROOT) {
-                root_clk_disable(clk->root_id);
-                return;
-        }
-
-        if (clk->bclkctr) {
-                reg = __raw_readl(clk->bclkctr);
-                reg &= ~(1 << clk->bclk_shift);
-                __raw_writel(reg, clk->bclkctr);
-        }
-        if (clk->aclkreg) {
-                reg = __raw_readl(clk->aclkreg);
-                reg &= ~ACLK_EN;
-                __raw_writel(reg, clk->aclkreg);
-        }
-}
-
-static unsigned long get_rate_pll(int pll)
-{
-        u32 reg;
-        unsigned long s, m, p;
-        void __iomem *addr = pll_cfg_addr(pll);
-
-        reg = __raw_readl(addr);
-        s = (reg >> 16) & 0x07;
-        m = (reg >> 8) & 0xff;
-        p = reg & 0x3f;
-
-        return (m * xi_rate) / (p * (1 << s));
-}
-
-static unsigned long get_rate_pll_div(int pll)
-{
-        u32 reg;
-        unsigned long div = 0;
-        void __iomem *addr;
-
-        switch (pll) {
-        case 0:
-                addr = CKC_BASE + CLKDIVC0_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC0_P0E)
-                        div = (reg >> 24) & 0x3f;
-                break;
-        case 1:
-                addr = CKC_BASE + CLKDIVC0_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC0_P1E)
-                        div = (reg >> 16) & 0x3f;
-                break;
-        case 2:
-                addr = CKC_BASE + CLKDIVC1_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC1_P2E)
-                        div = reg & 0x3f;
-                break;
-        }
-        return get_rate_pll(pll) / (div + 1);
-}
-
-static unsigned long get_rate_xi_div(void)
-{
-        unsigned long div = 0;
-        u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
-
-        if (reg & CLKDIVC0_XE)
-                div = (reg >> 8) & 0x3f;
-
-        return xi_rate / (div + 1);
-}
-
-static unsigned long get_rate_xti_div(void)
-{
-        unsigned long div = 0;
-        u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
-
-        if (reg & CLKDIVC0_XTE)
-                div = reg & 0x3f;
-
-        return xti_rate / (div + 1);
-}
-
-static unsigned long root_clk_get_rate(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return get_rate_pll(0);
-        case CLK_SRC_PLL1: return get_rate_pll(1);
-        case CLK_SRC_PLL2: return get_rate_pll(2);
-        case CLK_SRC_PLL0DIV: return get_rate_pll_div(0);
-        case CLK_SRC_PLL1DIV: return get_rate_pll_div(1);
-        case CLK_SRC_PLL2DIV: return get_rate_pll_div(2);
-        case CLK_SRC_XI: return xi_rate;
-        case CLK_SRC_XTI: return xti_rate;
-        case CLK_SRC_XIDIV: return get_rate_xi_div();
-        case CLK_SRC_XTIDIV: return get_rate_xti_div();
-        default: return 0;
-        }
-}
-
-static unsigned long aclk_get_rate(struct clk *clk)
-{
-        u32 reg;
-        unsigned long div;
-        unsigned int src;
-
-        reg = __raw_readl(clk->aclkreg);
-        div = reg & 0x0fff;
-        src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK;
-        return root_clk_get_rate(src) / (div + 1);
-}
-
-static unsigned long aclk_best_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long div, src, freq, r1, r2;
-
-        if (!rate)
-                return ACLK_MAX_DIV;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-        freq = root_clk_get_rate(src);
-        div = freq / rate;
-        if (!div)
-                return 1;
-        if (div >= ACLK_MAX_DIV)
-                return ACLK_MAX_DIV;
-        r1 = freq / div;
-        r2 = freq / (div + 1);
-        if ((rate - r2) < (r1 - rate))
-                return div + 1;
-
-        return div;
-}
-
-static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned int src;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-
-        return root_clk_get_rate(src) / aclk_best_div(clk, rate);
-}
-
-static int aclk_set_rate(struct clk *clk, unsigned long rate)
-{
-        u32 reg;
-
-        reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK;
-        reg |= aclk_best_div(clk, rate) - 1;
-        __raw_writel(reg, clk->aclkreg);
-        return 0;
-}
-
-static unsigned long get_rate_sys(struct clk *clk)
-{
-        unsigned int src;
-
-        src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK;
-        return root_clk_get_rate(src);
-}
-
-static unsigned long get_rate_bus(struct clk *clk)
-{
-        unsigned int reg, sdiv, bdiv, rate;
-
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        rate = get_rate_sys(clk);
-        sdiv = (reg >> 20) & 3;
-        if (sdiv)
-                rate /= sdiv + 1;
-        bdiv = (reg >> 4) & 0xff;
-        if (bdiv)
-                rate /= bdiv + 1;
-        return rate;
-}
-
-static unsigned long get_rate_cpu(struct clk *clk)
-{
-        unsigned int reg, div, fsys, fbus;
-
-        fbus = get_rate_bus(clk);
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        if (reg & (1 << 29))
-                return fbus;
-        fsys = get_rate_sys(clk);
-        div = (reg >> 16) & 0x0f;
-        return fbus + ((fsys - fbus) * (div + 1)) / 16;
-}
-
-static unsigned long get_rate_root(struct clk *clk)
-{
-        return root_clk_get_rate(clk->root_id);
-}
-
-static int aclk_set_parent(struct clk *clock, struct clk *parent)
-{
-        u32 reg;
-
-        if (clock->parent == parent)
-                return 0;
-
-        clock->parent = parent;
-
-        if (!parent)
-                return 0;
-
-        if (parent->root_id == CLK_SRC_NOROOT)
-                return 0;
-        reg = __raw_readl(clock->aclkreg);
-        reg &= ~ACLK_SEL_MASK;
-        reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK;
-        __raw_writel(reg, clock->aclkreg);
-
-        return 0;
-}
-
-#define DEFINE_ROOT_CLOCK(name, ri, p)  \
-        static struct clk name = {              \
-                .root_id = ri,                  \
-                .get_rate = get_rate_root,                      \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .parent = p,                    \
-        };
-
-#define DEFINE_SPECIAL_CLOCK(name, gr, p)       \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .get_rate = gr,                 \
-                .parent = p,                    \
-        };
-
-#define DEFINE_ACLOCK(name, bc, bs, ar)         \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .bclkctr = bc,                  \
-                .bclk_shift = bs,               \
-                .aclkreg = ar,                  \
-                .get_rate = aclk_get_rate,      \
-                .set_rate = aclk_set_rate,      \
-                .round_rate = aclk_round_rate,  \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .set_parent = aclk_set_parent,  \
-        };
-
-#define DEFINE_BCLOCK(name, bc, bs, gr, p)      \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .bclkctr = bc,                  \
-                .bclk_shift = bs,               \
-                .get_rate = gr,                 \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .parent = p,                    \
-        };
-
-DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL)
-DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL)
-DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi)
-DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti)
-DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi)
-DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi)
-DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi)
-DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
-DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1)
-DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2)
-
-/* The following 3 clocks are special and are initialized explicitly later */
-DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL)
-DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys)
-DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys)
-
-DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT)
-DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX)
-DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ)
-DEFINE_ACLOCK(ref, NULL, 0, ACLKREF)
-DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0)
-DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1)
-DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2)
-DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3)
-DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4)
-DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C)
-DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC)
-DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH)
-DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD)
-DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0)
-DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1)
-DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0)
-DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1)
-DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF)
-DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC)
-DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0)
-DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1)
-DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0)
-DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1)
-DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2)
-DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3)
-DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH)
-
-DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL)
-DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL)
-DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL)
-DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL)
-DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL)
-DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL)
-DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL)
-DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL)
-DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL)
-DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL)
-DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL)
-DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL)
-DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL)
-DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL)
-DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL)
-DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL)
-DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL)
-DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL)
-DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL)
-DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
-DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
-DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
-
-#define _REGISTER_CLOCK(d, n, c) \
-        { \
-                .dev_id = d, \
-                .con_id = n, \
-                .clk = &c, \
-        },
-
-static struct clk_lookup lookups[] = {
-        _REGISTER_CLOCK(NULL, "bus", bus)
-        _REGISTER_CLOCK(NULL, "cpu", cpu)
-        _REGISTER_CLOCK(NULL, "tct", tct)
-        _REGISTER_CLOCK(NULL, "tcx", tcx)
-        _REGISTER_CLOCK(NULL, "tcz", tcz)
-        _REGISTER_CLOCK(NULL, "ref", ref)
-        _REGISTER_CLOCK(NULL, "dai0", dai0)
-        _REGISTER_CLOCK(NULL, "pic", pic)
-        _REGISTER_CLOCK(NULL, "tc", tc)
-        _REGISTER_CLOCK(NULL, "gpio", gpio)
-        _REGISTER_CLOCK(NULL, "usbd", usbd)
-        _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
-        _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
-        _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
-        _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
-        _REGISTER_CLOCK(NULL, "ecc", ecc)
-        _REGISTER_CLOCK(NULL, "adc", adc)
-        _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
-        _REGISTER_CLOCK(NULL, "gdma0", gdma0)
-        _REGISTER_CLOCK(NULL, "lcd", lcd)
-        _REGISTER_CLOCK(NULL, "rtc", rtc)
-        _REGISTER_CLOCK(NULL, "nfc", nfc)
-        _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
-        _REGISTER_CLOCK(NULL, "g2d", g2d)
-        _REGISTER_CLOCK(NULL, "gdma1", gdma1)
-        _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
-        _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
-        _REGISTER_CLOCK(NULL, "mscl", mscl)
-        _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
-        _REGISTER_CLOCK(NULL, "bdma", bdma)
-        _REGISTER_CLOCK(NULL, "adma0", adma0)
-        _REGISTER_CLOCK(NULL, "spdif", spdif)
-        _REGISTER_CLOCK(NULL, "scfg", scfg)
-        _REGISTER_CLOCK(NULL, "cid", cid)
-        _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
-        _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
-        _REGISTER_CLOCK(NULL, "dai1", dai1)
-        _REGISTER_CLOCK(NULL, "adma1", adma1)
-        _REGISTER_CLOCK(NULL, "c3dec", c3dec)
-        _REGISTER_CLOCK("tcc-can.0", NULL, can0)
-        _REGISTER_CLOCK("tcc-can.1", NULL, can1)
-        _REGISTER_CLOCK(NULL, "gps", gps)
-        _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
-        _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
-        _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
-        _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
-        _REGISTER_CLOCK(NULL, "gdma2", gdma2)
-        _REGISTER_CLOCK(NULL, "gdma3", gdma3)
-        _REGISTER_CLOCK(NULL, "ddrc", ddrc)
-        _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
-};
-
-static struct clk *root_clk_by_index(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return &pll0;
-        case CLK_SRC_PLL1: return &pll1;
-        case CLK_SRC_PLL2: return &pll2;
-        case CLK_SRC_PLL0DIV: return &pll0div;
-        case CLK_SRC_PLL1DIV: return &pll1div;
-        case CLK_SRC_PLL2DIV: return &pll2div;
-        case CLK_SRC_XI: return &xi;
-        case CLK_SRC_XTI: return &xti;
-        case CLK_SRC_XIDIV: return &xidiv;
-        case CLK_SRC_XTIDIV: return &xtidiv;
-        default: return NULL;
-        }
-}
-
-static void find_aclk_parent(struct clk *clk)
-{
-        unsigned int src;
-        struct clk *clock;
-
-        if (!clk->aclkreg)
-                return;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-
-        clock = root_clk_by_index(src);
-        if (!clock)
-                return;
-
-        clk->parent = clock;
-        clk->set_parent = aclk_set_parent;
-}
-
-void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq)
-{
-        int i;
-
-        xi_rate = xi_freq;
-        xti_rate = xti_freq;
-
-        /* fixup parents and add the clock */
-        for (i = 0; i < ARRAY_SIZE(lookups); i++) {
-                find_aclk_parent(lookups[i].clk);
-                clkdev_add(&lookups[i]);
-        }
-        tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32);
-}
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h
deleted file mode 100644
index 705690add395..000000000000
--- a/arch/arm/mach-tcc8k/common.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef MACH_TCC8K_COMMON_H
-#define MACH_TCC8K_COMMON_H
-
-#include <linux/platform_device.h>
-
-extern struct platform_device tcc_nand_device;
-
-struct clk;
-
-extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq);
-extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq);
-extern void tcc8k_init_irq(void);
-extern void tcc8k_map_common_io(void);
-
-#endif
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c
deleted file mode 100644
index 6722ad7c2836..000000000000
--- a/arch/arm/mach-tcc8k/devices.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/*
- * linux/arch/arm/mach-tcc8k/devices.c
- *
- * Copyright (C) Telechips, Inc.
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of GPL v2.
- *
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-static u64 tcc8k_dmamask = DMA_BIT_MASK(32);
-
-#ifdef CONFIG_MTD_NAND_TCC
-/* NAND controller */
-static struct resource tcc_nand_resources[] = {
-        {
-                .start  = (resource_size_t)NFC_BASE,
-                .end    = (resource_size_t)NFC_BASE + 0x7f,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = INT_NFC,
-                .end    = INT_NFC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device tcc_nand_device = {
-        .name = "tcc_nand",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(tcc_nand_resources),
-        .resource = tcc_nand_resources,
-};
-#endif
-
-#ifdef CONFIG_MMC_TCC8K
-/* MMC controller */
-static struct resource tcc8k_mmc0_resource[] = {
-        {
-                .start = INT_SD0,
-                .end   = INT_SD0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct resource tcc8k_mmc1_resource[] = {
-        {
-                .start = INT_SD1,
-                .end   = INT_SD1,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device tcc8k_mmc0_device = {
-        .name           = "tcc-mmc",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(tcc8k_mmc0_resource),
-        .resource       = tcc8k_mmc0_resource,
-        .dev            = {
-                .dma_mask               = &tcc8k_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
-
-struct platform_device tcc8k_mmc1_device = {
-        .name           = "tcc-mmc",
-        .id             = 1,
-        .num_resources  = ARRAY_SIZE(tcc8k_mmc1_resource),
-        .resource       = tcc8k_mmc1_resource,
-        .dev            = {
-                .dma_mask               = &tcc8k_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
-
-static inline void tcc8k_init_mmc(void)
-{
-        u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS);
-
-        reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS;
-        __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS);
-
-        platform_device_register(&tcc8k_mmc0_device);
-        platform_device_register(&tcc8k_mmc1_device);
-}
-#else
-static inline void tcc8k_init_mmc(void) { }
-#endif
-
-#ifdef CONFIG_USB_OHCI_HCD
-static int tcc8k_ohci_init(struct device *dev)
-{
-        u32 reg;
-
-        /* Use GPIO PK19 as VBUS control output */
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS);
-        reg &= ~(1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS);
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS);
-        reg &= ~(1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS);
-
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS);
-        reg |= (1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS);
-        /* Turn on VBUS */
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS);
-        reg |= (1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS);
-
-        return 0;
-}
-
-static struct resource tcc8k_ohci0_resources[] = {
-        [0] = {
-                .start = (resource_size_t)USBH0_BASE,
-                .end   = (resource_size_t)USBH0_BASE + 0x5c,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = INT_USBH0,
-                .end   = INT_USBH0,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static struct resource tcc8k_ohci1_resources[] = {
-        [0] = {
-                .start = (resource_size_t)USBH1_BASE,
-                .end   = (resource_size_t)USBH1_BASE + 0x5c,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = INT_USBH1,
-                .end   = INT_USBH1,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static struct tccohci_platform_data tcc8k_ohci0_platform_data = {
-        .controller     = 0,
-        .port_mode      = PMM_PERPORT_MODE,
-        .init           = tcc8k_ohci_init,
-};
-
-static struct tccohci_platform_data tcc8k_ohci1_platform_data = {
-        .controller     = 1,
-        .port_mode      = PMM_PERPORT_MODE,
-        .init           = tcc8k_ohci_init,
-};
-
-static struct platform_device ohci0_device = {
-        .name = "tcc-ohci",
-        .id = 0,
-        .dev = {
-                .dma_mask = &tcc8k_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &tcc8k_ohci0_platform_data,
-        },
-        .num_resources  = ARRAY_SIZE(tcc8k_ohci0_resources),
-        .resource       = tcc8k_ohci0_resources,
-};
-
-static struct platform_device ohci1_device = {
-        .name = "tcc-ohci",
-        .id = 1,
-        .dev = {
-                .dma_mask = &tcc8k_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &tcc8k_ohci1_platform_data,
-        },
-        .num_resources  = ARRAY_SIZE(tcc8k_ohci1_resources),
-        .resource       = tcc8k_ohci1_resources,
-};
-
-static void __init tcc8k_init_usbhost(void)
-{
-        platform_device_register(&ohci0_device);
-        platform_device_register(&ohci1_device);
-}
-#else
-static void __init tcc8k_init_usbhost(void) { }
-#endif
-
-/* USB device controller*/
-#ifdef CONFIG_USB_GADGET_TCC8K
-static struct resource udc_resources[] = {
-        [0] = {
-                .start = INT_USBD,
-                .end   = INT_USBD,
-                .flags = IORESOURCE_IRQ,
-        },
-        [1] = {
-                .start = INT_UDMA,
-                .end   = INT_UDMA,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tcc8k_udc_device = {
-        .name = "tcc-udc",
-        .id = 0,
-        .resource = udc_resources,
-        .num_resources = ARRAY_SIZE(udc_resources),
-        .dev = {
-                 .dma_mask = &tcc8k_dmamask,
-                 .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-};
-
-static void __init tcc8k_init_usb_gadget(void)
-{
-        platform_device_register(&tcc8k_udc_device);
-}
-#else
-static void __init tcc8k_init_usb_gadget(void) { }
-#endif  /* CONFIG_USB_GADGET_TCC83X */
-
-static int __init tcc8k_init_devices(void)
-{
-        tcc8k_init_mmc();
-        tcc8k_init_usbhost();
-        tcc8k_init_usb_gadget();
-        return 0;
-}
-
-arch_initcall(tcc8k_init_devices);
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c
deleted file mode 100644
index 9b39d7fa658f..000000000000
--- a/arch/arm/mach-tcc8k/io.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * linux/arch/arm/mach-tcc8k/io.c
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * derived from TCC83xx io.c
- * Copyright (C) Telechips, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/tcc8k-regs.h>
-
-/*
- * The machine specific code may provide the extra mapping besides the
- * default mapping provided here.
- */
-static struct map_desc tcc8k_io_desc[] __initdata = {
-        {
-                .virtual        = (unsigned long)CS1_BASE_VIRT,
-                .pfn            = __phys_to_pfn(CS1_BASE),
-                .length         = CS1_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)AHB_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(AHB_PERI_BASE),
-                .length         = AHB_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)APB0_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(APB0_PERI_BASE),
-                .length         = APB0_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)APB1_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(APB1_PERI_BASE),
-                .length         = APB1_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)EXT_MEM_CTRL_BASE_VIRT,
-                .pfn            = __phys_to_pfn(EXT_MEM_CTRL_BASE),
-                .length         = EXT_MEM_CTRL_SIZE,
-                .type           = MT_DEVICE,
-        },
-};
-
-/*
- * Maps common IO regions for tcc8k.
- *
- */
-void __init tcc8k_map_common_io(void)
-{
-        iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc));
-}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
deleted file mode 100644
index 209fa5c65d4c..000000000000
--- a/arch/arm/mach-tcc8k/irq.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (C) Telechips, Inc.
- * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU GPL version 2.
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-/* Disable IRQ */
-static void tcc8000_mask_ack_irq0(struct irq_data *d)
-{
-        PIC0_IEN &= ~(1 << d->irq);
-        PIC0_CREQ |=  (1 << d->irq);
-}
-
-static void tcc8000_mask_ack_irq1(struct irq_data *d)
-{
-        PIC1_IEN &= ~(1 << (d->irq - 32));
-        PIC1_CREQ |= (1 << (d->irq - 32));
-}
-
-static void tcc8000_mask_irq0(struct irq_data *d)
-{
-        PIC0_IEN &= ~(1 << d->irq);
-}
-
-static void tcc8000_mask_irq1(struct irq_data *d)
-{
-        PIC1_IEN &= ~(1 << (d->irq - 32));
-}
-
-static void tcc8000_ack_irq0(struct irq_data *d)
-{
-        PIC0_CREQ |=  (1 << d->irq);
-}
-
-static void tcc8000_ack_irq1(struct irq_data *d)
-{
-        PIC1_CREQ |= (1 << (d->irq - 32));
-}
-
-/* Enable IRQ */
-static void tcc8000_unmask_irq0(struct irq_data *d)
-{
-        PIC0_IEN |= (1 << d->irq);
-        PIC0_INTOEN |= (1 << d->irq);
-}
-
-static void tcc8000_unmask_irq1(struct irq_data *d)
-{
-        PIC1_IEN |= (1 << (d->irq - 32));
-        PIC1_INTOEN |= (1 << (d->irq - 32));
-}
-
-static struct irq_chip tcc8000_irq_chip0 = {
-        .name           = "tcc_irq0",
-        .irq_mask       = tcc8000_mask_irq0,
-        .irq_ack        = tcc8000_ack_irq0,
-        .irq_mask_ack   = tcc8000_mask_ack_irq0,
-        .irq_unmask     = tcc8000_unmask_irq0,
-};
-
-static struct irq_chip tcc8000_irq_chip1 = {
-        .name           = "tcc_irq1",
-        .irq_mask       = tcc8000_mask_irq1,
-        .irq_ack        = tcc8000_ack_irq1,
-        .irq_mask_ack   = tcc8000_mask_ack_irq1,
-        .irq_unmask     = tcc8000_unmask_irq1,
-};
-
-void __init tcc8k_init_irq(void)
-{
-        int irqno;
-
-        /* Mask and clear all interrupts */
-        PIC0_IEN = 0x00000000;
-        PIC0_CREQ = 0xffffffff;
-        PIC1_IEN = 0x00000000;
-        PIC1_CREQ = 0xffffffff;
-
-        PIC0_MEN0 = 0x00000003;
-        PIC1_MEN1 = 0x00000003;
-        PIC1_MEN = 0x00000003;
-
-        /* let all IRQs be level triggered */
-        PIC0_TMODE = 0xffffffff;
-        PIC1_TMODE = 0xffffffff;
-        /* all IRQs are IRQs (not FIQs) */
-        PIC0_IRQSEL = 0xffffffff;
-        PIC1_IRQSEL = 0xffffffff;
-
-        for (irqno = 0; irqno < NR_IRQS; irqno++) {
-                if (irqno < 32)
-                        irq_set_chip(irqno, &tcc8000_irq_chip0);
-                else
-                        irq_set_chip(irqno, &tcc8000_irq_chip1);
-                irq_set_handler(irqno, handle_level_irq);
-                set_irq_flags(irqno, IRQF_VALID);
-        }
-}
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c
deleted file mode 100644
index a96babe83771..000000000000
--- a/arch/arm/mach-tcc8k/time.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * TCC8000 system timer setup
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL version 2.
- *
- */
-
-#include <linux/clk.h>
-#include <linux/clockchips.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-
-#include <asm/mach/time.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-static void __iomem *timer_base;
-
-static int tcc_set_next_event(unsigned long evt,
-                              struct clock_event_device *unused)
-{
-        unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS);
-
-        __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS);
-        return 0;
-}
-
-static void tcc_set_mode(enum clock_event_mode mode,
-                                struct clock_event_device *evt)
-{
-        unsigned long tc32irq;
-
-        switch (mode) {
-        case CLOCK_EVT_MODE_ONESHOT:
-                tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
-                tc32irq |= TC32IRQ_IRQEN0;
-                __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
-                break;
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_UNUSED:
-                tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
-                tc32irq &= ~TC32IRQ_IRQEN0;
-                __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
-                break;
-        case CLOCK_EVT_MODE_PERIODIC:
-        case CLOCK_EVT_MODE_RESUME:
-                break;
-        }
-}
-
-static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id)
-{
-        struct clock_event_device *evt = dev_id;
-
-        /* Acknowledge TC32 interrupt by reading TC32IRQ */
-        __raw_readl(timer_base + TC32IRQ_OFFS);
-
-        evt->event_handler(evt);
-
-        return IRQ_HANDLED;
-}
-
-static struct clock_event_device clockevent_tcc = {
-        .name           = "tcc_timer1",
-        .features       = CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
-        .set_mode       = tcc_set_mode,
-        .set_next_event = tcc_set_next_event,
-        .rating         = 200,
-};
-
-static struct irqaction tcc8k_timer_irq = {
-        .name           = "TC32_timer",
-        .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .handler        = tcc8k_timer_interrupt,
-        .dev_id         = &clockevent_tcc,
-};
-
-static int __init tcc_clockevent_init(struct clk *clock)
-{
-        unsigned int c = clk_get_rate(clock);
-
-        clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c,
-                200, 32, clocksource_mmio_readl_up);
-
-        clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC,
-                                        clockevent_tcc.shift);
-        clockevent_tcc.max_delta_ns =
-                        clockevent_delta2ns(0xfffffffe, &clockevent_tcc);
-        clockevent_tcc.min_delta_ns =
-                        clockevent_delta2ns(0xff, &clockevent_tcc);
-
-        clockevent_tcc.cpumask = cpumask_of(0);
-
-        clockevents_register_device(&clockevent_tcc);
-
-        return 0;
-}
-
-void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq)
-{
-        u32 reg;
-
-        timer_base = base;
-        tcc8k_timer_irq.irq = irq;
-
-        /* Enable clocks */
-        clk_enable(clock);
-
-        /* Initialize 32-bit timer */
-        reg = __raw_readl(timer_base + TC32EN_OFFS);
-        reg &= ~TC32EN_ENABLE; /* Disable timer */
-        __raw_writel(reg, timer_base + TC32EN_OFFS);
-        /* Free running timer, counting from 0 to 0xffffffff */
-        __raw_writel(0, timer_base + TC32EN_OFFS);
-        __raw_writel(0, timer_base + TC32LDV_OFFS);
-        reg = __raw_readl(timer_base + TC32IRQ_OFFS);
-        reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */
-        __raw_writel(reg, timer_base + TC32IRQ_OFFS);
-
-        __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS);
-
-        tcc_clockevent_init(clock);
-        setup_irq(irq, &tcc8k_timer_irq);
-}
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index d368f8dafcfd..74743ad3d2d3 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -101,6 +101,13 @@ static void __init tegra_dt_init(void)
 
         tegra_clk_init_from_table(tegra_dt_clk_init_table);
 
+        /*
+         * Finished with the static registrations now; fill in the missing
+         * devices
+         */
+        of_platform_populate(NULL, tegra_dt_match_table,
+                                tegra20_auxdata_lookup, NULL);
+
         for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
                 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
                         pinmux_configs[i].init();
@@ -110,12 +117,6 @@ static void __init tegra_dt_init(void)
 
         WARN(i == ARRAY_SIZE(pinmux_configs),
                 "Unknown platform! Pinmuxing not initialized\n");
-
-        /*
-         * Finished with the static registrations now; fill in the missing
-         * devices
-         */
-        of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
 }
 
 static const char * tegra_dt_board_compat[] = {
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index e99b45618cd0..7a4a26d5174c 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -16,6 +16,8 @@
 
 #include <linux/kernel.h>
 #include <linux/gpio.h>
+#include <linux/of.h>
+
 #include <mach/pinmux.h>
 
 #include "gpio-names.h"
@@ -161,7 +163,9 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void harmony_pinmux_init(void)
 {
-        platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+        if (!of_machine_is_compatible("nvidia,tegra20"))
+                platform_add_devices(pinmux_devices,
+                                        ARRAY_SIZE(pinmux_devices));
 
         tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
 
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index fb20894862b0..be30e215f4b7 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -16,6 +16,8 @@
 
 #include <linux/kernel.h>
 #include <linux/gpio.h>
+#include <linux/of.h>
+
 #include <mach/pinmux.h>
 
 #include "gpio-names.h"
@@ -158,7 +160,9 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void paz00_pinmux_init(void)
 {
-        platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+        if (!of_machine_is_compatible("nvidia,tegra20"))
+                platform_add_devices(pinmux_devices,
+                                        ARRAY_SIZE(pinmux_devices));
 
         tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
 
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index fbce31daa3c9..b1c2972f62fe 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -16,6 +16,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
+#include <linux/of.h>
 
 #include <mach/pinmux.h>
 #include <mach/pinmux-t2.h>
@@ -191,6 +192,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
         { .gpio = TEGRA_GPIO_SD2_POWER,         .enable = true },
         { .gpio = TEGRA_GPIO_LIDSWITCH,         .enable = true },
         { .gpio = TEGRA_GPIO_POWERKEY,          .enable = true },
+        { .gpio = TEGRA_GPIO_HP_DET,            .enable = true },
         { .gpio = TEGRA_GPIO_ISL29018_IRQ,      .enable = true },
         { .gpio = TEGRA_GPIO_CDC_IRQ,           .enable = true },
         { .gpio = TEGRA_GPIO_USB1,              .enable = true },
@@ -218,7 +220,9 @@ static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
 
 void __init seaboard_common_pinmux_init(void)
 {
-        platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+        if (!of_machine_is_compatible("nvidia,tegra20"))
+                platform_add_devices(pinmux_devices,
+                                        ARRAY_SIZE(pinmux_devices));
 
         tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
 
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 4969dd28a04c..7ab719d46da0 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -16,6 +16,7 @@
 #include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/of.h>
 
 #include <mach/pinmux.h>
 
@@ -157,7 +158,9 @@ static struct tegra_gpio_table gpio_table[] = {
 
 void __init trimslice_pinmux_init(void)
 {
-        platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices));
+        if (!of_machine_is_compatible("nvidia,tegra20"))
+                platform_add_devices(pinmux_devices,
+                                        ARRAY_SIZE(pinmux_devices));
         tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
         tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
 }
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 7a1fa6adb7c3..5b0c38abacc1 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -422,7 +422,7 @@ struct platform_device nuc900_device_kpi = {
 
 /* LCD controller*/
 
-static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
+static struct nuc900fb_display nuc900_lcd_info[] = {
         /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
         [0] = {
                 .type           = LCM_DCCS_VA_SRC_RGB565,
@@ -445,7 +445,7 @@ static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
         },
 };
 
-static struct nuc900fb_mach_info nuc900_fb_info __initdata = {
+static struct nuc900fb_mach_info nuc900_fb_info = {
 #if defined(CONFIG_GPM1040A0_320X240)
         .displays               = &nuc900_lcd_info[0],
 #else
diff --git a/arch/arm/mach-w90x900/include/mach/mfp.h b/arch/arm/mach-w90x900/include/mach/mfp.h
index 94c0e71617c6..23ef1f573abd 100644
--- a/arch/arm/mach-w90x900/include/mach/mfp.h
+++ b/arch/arm/mach-w90x900/include/mach/mfp.h
@@ -19,6 +19,7 @@
 extern void mfp_set_groupf(struct device *dev);
 extern void mfp_set_groupc(struct device *dev);
 extern void mfp_set_groupi(struct device *dev);
-extern void mfp_set_groupg(struct device *dev);
+extern void mfp_set_groupg(struct device *dev, const char *subname);
+extern void mfp_set_groupd(struct device *dev, const char *subname);
 
 #endif /* __ASM_ARCH_MFP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
index bd94819e314f..2c4e0c128501 100644
--- a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
+++ b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
@@ -14,7 +14,7 @@
 #ifndef __ASM_ARCH_SPI_H
 #define __ASM_ARCH_SPI_H
 
-extern void mfp_set_groupg(struct device *dev);
+extern void mfp_set_groupg(struct device *dev, const char *subname);
 
 struct nuc900_spi_info {
         unsigned int num_cs;
diff --git a/arch/arm/mach-w90x900/mfp.c b/arch/arm/mach-w90x900/mfp.c
index fb7fb627b1a5..9dd74612bb87 100644
--- a/arch/arm/mach-w90x900/mfp.c
+++ b/arch/arm/mach-w90x900/mfp.c
@@ -26,10 +26,8 @@
 #define REG_MFSEL       (W90X900_VA_GCR + 0xC)
 
 #define GPSELF          (0x01 << 1)
-
 #define GPSELC          (0x03 << 2)
-#define ENKPI           (0x02 << 2)
-#define ENNAND          (0x01 << 2)
+#define GPSELD          (0x0f << 4)
 
 #define GPSELEI0        (0x01 << 26)
 #define GPSELEI1        (0x01 << 27)
@@ -37,11 +35,16 @@
 #define GPIOG0TO1       (0x03 << 14)
 #define GPIOG2TO3       (0x03 << 16)
 #define GPIOG22TO23     (0x03 << 22)
+#define GPIOG18TO20     (0x07 << 18)
 
 #define ENSPI           (0x0a << 14)
 #define ENI2C0          (0x01 << 14)
 #define ENI2C1          (0x01 << 16)
 #define ENAC97          (0x02 << 22)
+#define ENSD1           (0x02 << 18)
+#define ENSD0           (0x0a << 4)
+#define ENKPI           (0x02 << 2)
+#define ENNAND          (0x01 << 2)
 
 static DEFINE_MUTEX(mfp_mutex);
 
@@ -127,16 +130,19 @@ void mfp_set_groupi(struct device *dev)
 }
 EXPORT_SYMBOL(mfp_set_groupi);
 
-void mfp_set_groupg(struct device *dev)
+void mfp_set_groupg(struct device *dev, const char *subname)
 {
         unsigned long mfpen;
         const char *dev_id;
 
-        BUG_ON(!dev);
+        BUG_ON((!dev) && (!subname));
 
         mutex_lock(&mfp_mutex);
 
-        dev_id = dev_name(dev);
+        if (subname != NULL)
+                dev_id = subname;
+        else
+                dev_id = dev_name(dev);
 
         mfpen = __raw_readl(REG_MFSEL);
 
@@ -152,6 +158,9 @@ void mfp_set_groupg(struct device *dev)
         } else if (strcmp(dev_id, "nuc900-audio") == 0) {
                 mfpen &= ~(GPIOG22TO23);
                 mfpen |= ENAC97;/*enable AC97*/
+        } else if (strcmp(dev_id, "nuc900-mmc-port1") == 0) {
+                mfpen &= ~(GPIOG18TO20);
+                mfpen |= (ENSD1 | 0x01);/*enable sd1*/
         } else {
                 mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/
         }
@@ -162,3 +171,30 @@ void mfp_set_groupg(struct device *dev)
 }
 EXPORT_SYMBOL(mfp_set_groupg);
 
+void mfp_set_groupd(struct device *dev, const char *subname)
+{
+        unsigned long mfpen;
+        const char *dev_id;
+
+        BUG_ON((!dev) && (!subname));
+
+        mutex_lock(&mfp_mutex);
+
+        if (subname != NULL)
+                dev_id = subname;
+        else
+                dev_id = dev_name(dev);
+
+        mfpen = __raw_readl(REG_MFSEL);
+
+        if (strcmp(dev_id, "nuc900-mmc-port0") == 0) {
+                mfpen &= ~GPSELD;/*enable sd0*/
+                mfpen |= ENSD0;
+        } else
+                mfpen &= (~GPSELD);
+
+        __raw_writel(mfpen, REG_MFSEL);
+
+        mutex_unlock(&mfp_mutex);
+}
+EXPORT_SYMBOL(mfp_set_groupd);
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 8ac9e9f84790..b1e192ba8c24 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -61,7 +61,7 @@ static inline void cache_sync(void)
 {
         void __iomem *base = l2x0_base;
 
-#ifdef CONFIG_ARM_ERRATA_753970
+#ifdef CONFIG_PL310_ERRATA_753970
         /* write to an unmmapped register */
         writel_relaxed(0, base + L2X0_DUMMY_REG);
 #else
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e4e7f6cba1ab..1aa664a1999f 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -168,7 +168,7 @@ static int __init consistent_init(void)
         pte_t *pte;
         int i = 0;
         unsigned long base = consistent_base;
-        unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT;
+        unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
 
         consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
         if (!consistent_pte) {
@@ -332,6 +332,15 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
         struct page *page;
         void *addr;
 
+        /*
+         * Following is a work-around (a.k.a. hack) to prevent pages
+         * with __GFP_COMP being passed to split_page() which cannot
+         * handle them.  The real problem is that this flag probably
+         * should be 0 on ARM as it is not supported on this
+         * platform; see CONFIG_HUGETLBFS.
+         */
+        gfp &= ~(__GFP_COMP);
+
         *handle = ~0;
         size = PAGE_ALIGN(size);
 
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 74be05f3e03a..44b628e4d6ea 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -9,8 +9,7 @@
 #include <linux/io.h>
 #include <linux/personality.h>
 #include <linux/random.h>
-#include <asm/cputype.h>
-#include <asm/system.h>
+#include <asm/cachetype.h>
 
 #define COLOUR_ALIGN(addr,pgoff)                \
         ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +      \
@@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
         struct mm_struct *mm = current->mm;
         struct vm_area_struct *vma;
         unsigned long start_addr;
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
-        unsigned int cache_type;
-        int do_align = 0, aliasing = 0;
+        int do_align = 0;
+        int aliasing = cache_is_vipt_aliasing();
 
         /*
          * We only need to do colour alignment if either the I or D
-         * caches alias.  This is indicated by bits 9 and 21 of the
-         * cache type register.
+         * caches alias.
          */
-        cache_type = read_cpuid_cachetype();
-        if (cache_type != read_cpuid_id()) {
-                aliasing = (cache_type | cache_type >> 12) & (1 << 11);
-                if (aliasing)
-                        do_align = filp || flags & MAP_SHARED;
-        }
-#else
-#define do_align 0
-#define aliasing 0
-#endif
+        if (aliasing)
+                do_align = filp || (flags & MAP_SHARED);
 
         /*
          * We enforce the MAP_FIXED case.
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index a08a95107a63..b3a1f2b3ada3 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -10,7 +10,7 @@ choice
 
 config ARCH_IMX_V4_V5
         bool "i.MX1, i.MX21, i.MX25, i.MX27"
-        select AUTO_ZRELADDR
+        select AUTO_ZRELADDR if !ZBOOT_ROM
         select ARM_PATCH_PHYS_VIRT
         help
           This enables support for systems based on the Freescale i.MX ARMv4
@@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
 
 config ARCH_MX5
         bool "i.MX50, i.MX51, i.MX53"
-        select AUTO_ZRELADDR
+        select AUTO_ZRELADDR if !ZBOOT_ROM
         select ARM_PATCH_PHYS_VIRT
         help
           This enables support for machines using Freescale's i.MX50 and i.MX53
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 8875fb415f68..55f15699a383 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <mach/common.h>
 #include <asm/mach/irq.h>
+#include <asm/exception.h>
 #include <mach/hardware.h>
 
 #include "irq-common.h"
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 74aac96cda20..adbff706ef6f 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -17,6 +17,7 @@
  * the CPU clock speed on the fly.
  */
 
+#include <linux/module.h>
 #include <linux/cpufreq.h>
 #include <linux/clk.h>
 #include <linux/err.h>
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
index b3b8eed263b8..12f8f8109010 100644
--- a/arch/arm/plat-mxc/gic.c
+++ b/arch/arm/plat-mxc/gic.c
@@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
                 if (irqnr == 1023)
                         break;
 
-                if (irqnr > 29 && irqnr < 1021)
+                if (irqnr > 15 && irqnr < 1021)
                         handle_IRQ(irqnr, regs);
 #ifdef CONFIG_SMP
-                else if (irqnr < 16) {
+                else {
                         writel_relaxed(irqstat, gic_cpu_base_addr +
                                                 GIC_CPU_EOI);
                         handle_IPI(irqnr, regs);
                 }
 #endif
-#ifdef CONFIG_LOCAL_TIMERS
-                else if (irqnr == 29) {
-                        writel_relaxed(irqstat, gic_cpu_base_addr +
-                                                GIC_CPU_EOI);
-                        handle_local_timer(regs);
-                }
-#endif
         } while (1);
 }
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83b745a5e1b7..c75f254abd85 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode {
 };
 
 extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
-extern void (*imx_idle)(void);
 extern void imx_print_silicon_rev(const char *cpu, int srev);
 
 void avic_handle_irq(struct pt_regs *);
@@ -133,4 +132,5 @@ extern void imx53_qsb_common_init(void);
 extern void imx53_smd_common_init(void);
 extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
 extern void imx6q_pm_init(void);
+extern void imx6q_clock_map_io(void);
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 9fe0dfcf4e7e..ca5cf26a04b1 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -25,6 +25,3 @@
 
         .macro test_for_ipi, irqnr, irqstat, base, tmp
         .endm
-
-        .macro test_for_ltirq, irqnr, irqstat, base, tmp
-        .endm
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 00a78193c681..a4d36d601d55 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -50,20 +50,6 @@
 #define IMX_CHIP_REVISION_3_3           0x33
 #define IMX_CHIP_REVISION_UNKNOWN       0xff
 
-#define IMX_CHIP_REVISION_1_0_STRING            "1.0"
-#define IMX_CHIP_REVISION_1_1_STRING            "1.1"
-#define IMX_CHIP_REVISION_1_2_STRING            "1.2"
-#define IMX_CHIP_REVISION_1_3_STRING            "1.3"
-#define IMX_CHIP_REVISION_2_0_STRING            "2.0"
-#define IMX_CHIP_REVISION_2_1_STRING            "2.1"
-#define IMX_CHIP_REVISION_2_2_STRING            "2.2"
-#define IMX_CHIP_REVISION_2_3_STRING            "2.3"
-#define IMX_CHIP_REVISION_3_0_STRING            "3.0"
-#define IMX_CHIP_REVISION_3_1_STRING            "3.1"
-#define IMX_CHIP_REVISION_3_2_STRING            "3.2"
-#define IMX_CHIP_REVISION_3_3_STRING            "3.3"
-#define IMX_CHIP_REVISION_UNKNOWN_STRING        "unknown"
-
 #ifndef __ASSEMBLY__
 extern unsigned int __mxc_cpu_type;
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index cf88b3593fba..b9895d250167 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,14 +17,9 @@
 #ifndef __ASM_ARCH_MXC_SYSTEM_H__
 #define __ASM_ARCH_MXC_SYSTEM_H__
 
-extern void (*imx_idle)(void);
-
 static inline void arch_idle(void)
 {
-        if (imx_idle != NULL)
-                (imx_idle)();
-        else
-                cpu_do_idle();
+        cpu_do_idle();
 }
 
 void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42d74ea59084..845de59f07ed 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,9 @@
 #define MX3_PWMSAR                0x0C    /* PWM Sample Register */
 #define MX3_PWMPR                 0x10    /* PWM Period Register */
 #define MX3_PWMCR_PRESCALER(x)    (((x - 1) & 0xFFF) << 4)
+#define MX3_PWMCR_DOZEEN                (1 << 24)
+#define MX3_PWMCR_WAITEN                (1 << 23)
+#define MX3_PWMCR_DBGEN                 (1 << 22)
 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
 #define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
 #define MX3_PWMCR_EN              (1 << 0)
@@ -77,7 +80,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
                 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
                 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
 
-                cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN;
+                cr = MX3_PWMCR_PRESCALER(prescale) |
+                        MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
+                        MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
 
                 if (cpu_is_mx25())
                         cr |= MX3_PWMCR_CLKSRC_IPG;
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 9dad8dcc2ea9..d65fb31a55ca 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -21,6 +21,7 @@
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/delay.h>
+#include <linux/module.h>
 
 #include <mach/hardware.h>
 #include <mach/common.h>
@@ -28,8 +29,8 @@
 #include <asm/system.h>
 #include <asm/mach-types.h>
 
-void (*imx_idle)(void) = NULL;
 void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
+EXPORT_SYMBOL_GPL(imx_ioremap);
 
 static void __iomem *wdog_base;
 
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index e993a184189a..a3c164c7ba82 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -17,6 +17,7 @@
 #include <linux/io.h>
 
 #include <asm/mach/irq.h>
+#include <asm/exception.h>
 
 #include <mach/hardware.h>
 #include <mach/common.h>
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 197ca03c3f7d..eb73ab40e955 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -165,8 +165,8 @@ struct dpll_data {
         u8                      auto_recal_bit;
         u8                      recal_en_bit;
         u8                      recal_st_bit;
-        u8                      flags;
 #  endif
+        u8                      flags;
 };
 
 #endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 346098fb9219..257f9770b2da 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -28,11 +28,14 @@
 #define __ARCH_ARM_MACH_OMAP_COMMON_H
 
 #include <plat/i2c.h>
+#include <plat/omap_hwmod.h>
 
 extern int __init omap_init_clocksource_32k(void);
 extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
+extern int omap_dss_reset(struct omap_hwmod *);
+
 void omap_sram_init(void);
 
 #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
index a9276667c2fb..c7adad0e8de0 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
@@ -12,7 +12,7 @@
 */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index e1cbc728c775..c8bec9c7655d 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -11,6 +11,7 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/export.h>
 
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index e657305644cc..a976c023b286 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -15,7 +15,6 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/pwm_backlight.h>
-#include <linux/slab.h>
 
 #include <plat/devs.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index d48245bb02b3..df8155b9d4d1 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -24,6 +24,8 @@
 #ifndef __PLAT_GPIO_CFG_H
 #define __PLAT_GPIO_CFG_H __FILE__
 
+#include<linux/types.h>
+
 typedef unsigned int __bitwise__ samsung_gpio_pull_t;
 typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
 
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c
index efe1d564473e..312b510d86b7 100644
--- a/arch/arm/plat-samsung/pd.c
+++ b/arch/arm/plat-samsung/pd.c
@@ -11,7 +11,7 @@
 */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/err.h>
 #include <linux/pm_runtime.h>
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index dc1185dcf80d..c559d8438c70 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -11,7 +11,7 @@
  * the Free Software Foundation; either version 2 of the License.
 */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig
deleted file mode 100644
index 1bf499570f42..000000000000
--- a/arch/arm/plat-tcc/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
-if ARCH_TCC_926
-
-menu "Telechips ARM926-based CPUs"
-
-choice
-        prompt "Telechips CPU type:"
-        default ARCH_TCC8K
-
-config ARCH_TCC8K
-        bool TCC8000
-        select USB_ARCH_HAS_OHCI
-        help
-          Support for Telechips TCC8000 systems
-
-endchoice
-
-source "arch/arm/mach-tcc8k/Kconfig"
-
-endmenu
-endif
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile
deleted file mode 100644
index eceabc869b8f..000000000000
--- a/arch/arm/plat-tcc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# "Telechips Platform Common Modules"
-
-obj-y := clock.o system.o
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c
deleted file mode 100644
index f3ced10d5271..000000000000
--- a/arch/arm/plat-tcc/clock.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Clock framework for Telechips SoCs
- * Based on arch/arm/plat-mxc/clock.c
- *
- * Copyright (C) 2004 - 2005 Nokia corporation
- * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- * Copyright 2010 Hans J. Koch, hjk@linutronix.de
- *
- * Licensed under the terms of the GPL v2.
- */
-
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/string.h>
-
-#include <mach/clock.h>
-#include <mach/hardware.h>
-
-static DEFINE_MUTEX(clocks_mutex);
-
-/*-------------------------------------------------------------------------
- * Standard clock functions defined in include/linux/clk.h
- *-------------------------------------------------------------------------*/
-
-static void __clk_disable(struct clk *clk)
-{
-        BUG_ON(clk->refcount == 0);
-
-        if (!(--clk->refcount) && clk->disable) {
-                /* Unconditionally disable the clock in hardware */
-                clk->disable(clk);
-                /* recursively disable parents */
-                if (clk->parent)
-                        __clk_disable(clk->parent);
-        }
-}
-
-static int __clk_enable(struct clk *clk)
-{
-        int ret = 0;
-
-        if (clk->refcount++ == 0 && clk->enable) {
-                if (clk->parent)
-                        ret = __clk_enable(clk->parent);
-                if (ret)
-                        return ret;
-                else
-                        return clk->enable(clk);
-        }
-
-        return 0;
-}
-
-/* This function increments the reference count on the clock and enables the
- * clock if not already enabled. The parent clock tree is recursively enabled
- */
-int clk_enable(struct clk *clk)
-{
-        int ret = 0;
-
-        if (!clk)
-                return -EINVAL;
-
-        mutex_lock(&clocks_mutex);
-        ret = __clk_enable(clk);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_enable);
-
-/* This function decrements the reference count on the clock and disables
- * the clock when reference count is 0. The parent clock tree is
- * recursively disabled
- */
-void clk_disable(struct clk *clk)
-{
-        if (!clk)
-                return;
-
-        mutex_lock(&clocks_mutex);
-        __clk_disable(clk);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL_GPL(clk_disable);
-
-/* Retrieve the *current* clock rate. If the clock itself
- * does not provide a special calculation routine, ask
- * its parent and so on, until one is able to return
- * a valid clock rate
- */
-unsigned long clk_get_rate(struct clk *clk)
-{
-        if (!clk)
-                return 0UL;
-
-        if (clk->get_rate)
-                return clk->get_rate(clk);
-
-        return clk_get_rate(clk->parent);
-}
-EXPORT_SYMBOL_GPL(clk_get_rate);
-
-/* Round the requested clock rate to the nearest supported
- * rate that is less than or equal to the requested rate.
- * This is dependent on the clock's current parent.
- */
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        if (!clk)
-                return 0;
-        if (!clk->round_rate)
-                return 0;
-
-        return clk->round_rate(clk, rate);
-}
-EXPORT_SYMBOL_GPL(clk_round_rate);
-
-/* Set the clock to the requested clock rate. The rate must
- * match a supported rate exactly based on what clk_round_rate returns
- */
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        int ret = -EINVAL;
-
-        if (!clk)
-                return ret;
-        if (!clk->set_rate || !rate)
-                return ret;
-
-        mutex_lock(&clocks_mutex);
-        ret = clk->set_rate(clk, rate);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_rate);
-
-/* Set the clock's parent to another clock source */
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-        struct clk *old;
-        int ret = -EINVAL;
-
-        if (!clk)
-                return ret;
-        if (!clk->set_parent || !parent)
-                return ret;
-
-        mutex_lock(&clocks_mutex);
-        old = clk->parent;
-        if (clk->refcount)
-                __clk_enable(parent);
-        ret = clk->set_parent(clk, parent);
-        if (ret)
-                old = parent;
-        if (clk->refcount)
-                __clk_disable(old);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_parent);
-
-/* Retrieve the clock's parent clock source */
-struct clk *clk_get_parent(struct clk *clk)
-{
-        if (!clk)
-                return NULL;
-
-        return clk->parent;
-}
-EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h
deleted file mode 100644
index a12f58ad71a8..000000000000
--- a/arch/arm/plat-tcc/include/mach/clock.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Low level clock header file for Telechips TCC architecture
- * (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the GPL v2.
- */
-
-#ifndef __ASM_ARCH_TCC_CLOCK_H__
-#define __ASM_ARCH_TCC_CLOCK_H__
-
-#ifndef __ASSEMBLY__
-
-struct clk {
-        struct clk *parent;
-        /* id number of a root clock, 0 for normal clocks */
-        int root_id;
-        /* Reference count of clock enable/disable */
-        int refcount;
-        /* Address of associated BCLKCTRx register. Must be set. */
-        void __iomem *bclkctr;
-        /* Bit position for BCLKCTRx. Must be set. */
-        int bclk_shift;
-        /* Address of ACLKxxx register, if any. */
-        void __iomem *aclkreg;
-        /* get the current clock rate (always a fresh value) */
-        unsigned long (*get_rate) (struct clk *);
-        /* Function ptr to set the clock to a new rate. The rate must match a
-           supported rate returned from round_rate. Leave blank if clock is not
-           programmable */
-        int (*set_rate) (struct clk *, unsigned long);
-        /* Function ptr to round the requested clock rate to the nearest
-           supported rate that is less than or equal to the requested rate. */
-        unsigned long (*round_rate) (struct clk *, unsigned long);
-        /* Function ptr to enable the clock. Leave blank if clock can not
-           be gated. */
-        int (*enable) (struct clk *);
-        /* Function ptr to disable the clock. Leave blank if clock can not
-           be gated. */
-        void (*disable) (struct clk *);
-        /* Function ptr to set the parent clock of the clock. */
-        int (*set_parent) (struct clk *, struct clk *);
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
deleted file mode 100644
index cf17d04ec30d..000000000000
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 1994-1999 Russell King
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-                .macro  addruart, rp, rv, tmp
-                moveq   \rp, #0x90000000        @ physical base address
-                movne   \rv, #0xF1000000        @ virtual base
-                orr     \rp, \rp, #0x00007000   @ UART0
-                orr     \rv, \rv, #0x00007000   @ UART0
-                .endm
-
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx, #0x44]
-                .endm
-
-                .macro  waituart,rd,rx
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:
-                ldr \rd, [\rx, #0x14]
-                tst \rd, #0x20
-
-                beq 1001b
-                .endm
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S
deleted file mode 100644
index 748f401e4b6d..000000000000
--- a/arch/arm/plat-tcc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * include/asm-arm/arch-tcc83x/entry-macro.S
- *
- * Author : <linux@telechips.com>
- * Created: June 10, 2008
- * Description: Low-level IRQ helper macros for Telechips-based platforms
- *
- * Copyright (C) 2008-2009 Telechips
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
-        .macro  disable_fiq
-        .endm
-
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-                ldr     \base, =0xF2003000 @ base address of PIC registers
-
-                @@ read MREQ register of PIC0
-
-                mov     \irqnr, #0
-                ldr     \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
-                cmp     \irqstat, #0
-                bne     1001f
-
-                @@ read MREQ register of PIC1
-
-                ldr     \irqstat, [\base, #0x00000094]  @ upper 32 interrupts
-                cmp     \irqstat, #0
-                beq     1002f
-                mov     \irqnr, #0x20
-
-1001:
-                movs    \tmp, \irqstat, lsl #16
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #16
-
-                movs    \tmp, \irqstat, lsl #8
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #8
-
-                movs    \tmp, \irqstat, lsl #4
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #4
-
-                movs    \tmp, \irqstat, lsl #2
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #2
-
-                movs    \tmp, \irqstat, lsl #1
-                addeq   \irqnr, \irqnr, #1
-                orrs    \base, \base, #1
-1002:
-                @@ exit here, Z flag unset if IRQ
-
-        .endm
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf3..000000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
- * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
- *                          and Dirk Behme <dirk.behme@de.bosch.com>
- * Rewritten by:    <linux@telechips.com>
- * Description: Hardware definitions for TCC8300 processors and boards
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Copyright (C) 2008-2009 Telechips
- *
- * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Pulic License version 2.
- */
-
-#ifndef __ASM_ARCH_TCC_HARDWARE_H
-#define __ASM_ARCH_TCC_HARDWARE_H
-
-#include <asm/sizes.h>
-#ifndef __ASSEMBLER__
-#include <asm/types.h>
-#endif
-#include <mach/io.h>
-
-/*
- * ----------------------------------------------------------------------------
- * Clocks
- * ----------------------------------------------------------------------------
- */
-#define CLKGEN_REG_BASE         0xfffece00
-#define ARM_CKCTL               (CLKGEN_REG_BASE + 0x0)
-#define ARM_IDLECT1             (CLKGEN_REG_BASE + 0x4)
-#define ARM_IDLECT2             (CLKGEN_REG_BASE + 0x8)
-#define ARM_EWUPCT              (CLKGEN_REG_BASE + 0xC)
-#define ARM_RSTCT1              (CLKGEN_REG_BASE + 0x10)
-#define ARM_RSTCT2              (CLKGEN_REG_BASE + 0x14)
-#define ARM_SYSST               (CLKGEN_REG_BASE + 0x18)
-#define ARM_IDLECT3             (CLKGEN_REG_BASE + 0x24)
-
-/* DPLL control registers */
-#define DPLL_CTL                0xfffecf00
-
-#endif  /* __ASM_ARCH_TCC_HARDWARE_H */
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h
deleted file mode 100644
index 3e911d3ea0f1..000000000000
--- a/arch/arm/plat-tcc/include/mach/io.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * IO definitions for TCC8000 processors and boards
- *
- * Copyright (C) 1997-1999 Russell King
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Public License version 2.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h
deleted file mode 100644
index da863894d498..000000000000
--- a/arch/arm/plat-tcc/include/mach/irqs.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * IRQ definitions for TCC8xxx
- *
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#ifndef __ASM_ARCH_TCC_IRQS_H
-#define __ASM_ARCH_TCC_IRQS_H
-
-#define NR_IRQS 64
-
-/* PIC0 interrupts */
-#define INT_ADMA1       0
-#define INT_BDMA        1
-#define INT_ADMA0       2
-#define INT_GDMA1       3
-#define INT_I2S0RX      4
-#define INT_I2S0TX      5
-#define INT_TC          6
-#define INT_UART0       7
-#define INT_USBD        8
-#define INT_SPI0TX      9
-#define INT_UDMA        10
-#define INT_LIRQ        11
-#define INT_GDMA2       12
-#define INT_GDMA0       13
-#define INT_TC32        14
-#define INT_LCD         15
-#define INT_ADC         16
-#define INT_I2C         17
-#define INT_RTCP        18
-#define INT_RTCA        19
-#define INT_NFC         20
-#define INT_SD0         21
-#define INT_GSB0        22
-#define INT_PK          23
-#define INT_USBH0       24
-#define INT_USBH1       25
-#define INT_G2D         26
-#define INT_ECC         27
-#define INT_SPI0RX      28
-#define INT_UART1       29
-#define INT_MSCL        30
-#define INT_GSB1        31
-/* PIC1 interrupts */
-#define INT_E0          32
-#define INT_E1          33
-#define INT_E2          34
-#define INT_E3          35
-#define INT_E4          36
-#define INT_E5          37
-#define INT_E6          38
-#define INT_E7          39
-#define INT_UART2       40
-#define INT_UART3       41
-#define INT_SPI1TX      42
-#define INT_SPI1RX      43
-#define INT_GSB2        44
-#define INT_SPDIF       45
-#define INT_CDIF        46
-#define INT_VBON        47
-#define INT_VBOFF       48
-#define INT_SD1         49
-#define INT_UART4       50
-#define INT_GDMA3       51
-#define INT_I2S1RX      52
-#define INT_I2S1TX      53
-#define INT_CAN0        54
-#define INT_CAN1        55
-#define INT_GSB3        56
-#define INT_KRST        57
-#define INT_UNUSED      58
-#define INT_SD0D3       59
-#define INT_SD1D3       60
-#define INT_GPS0        61
-#define INT_GPS1        62
-#define INT_GPS2        63
-
-#endif  /* ASM_ARCH_TCC_IRQS_H */
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h
deleted file mode 100644
index 909e6035d843..000000000000
--- a/arch/arm/plat-tcc/include/mach/system.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Author: <linux@telechips.com>
- * Created: June 10, 2008
- * Description: LINUX SYSTEM FUNCTIONS for TCC83x
- *
- * Copyright (C) 2008-2009 Telechips
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-#include <linux/clk.h>
-
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-
-extern void plat_tcc_reboot(void);
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        plat_tcc_reboot();
-}
-
-#endif
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
deleted file mode 100644
index 1d9428295332..000000000000
--- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
+++ /dev/null
@@ -1,807 +0,0 @@
-/*
- * Telechips TCC8000 register definitions
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPLv2.
- */
-
-#ifndef TCC8K_REGS_H
-#define TCC8K_REGS_H
-
-#include <linux/types.h>
-
-#define EXT_SDRAM_BASE          0x20000000
-#define INT_SRAM_BASE           0x30000000
-#define INT_SRAM_SIZE           SZ_32K
-#define CS0_BASE                0x40000000
-#define CS1_BASE                0x50000000
-#define CS1_SIZE                SZ_64K
-#define CS2_BASE                0x60000000
-#define CS3_BASE                0x70000000
-#define AHB_PERI_BASE           0x80000000
-#define AHB_PERI_SIZE           SZ_64K
-#define APB0_PERI_BASE          0x90000000
-#define APB0_PERI_SIZE          SZ_128K
-#define APB1_PERI_BASE          0x98000000
-#define APB1_PERI_SIZE          SZ_128K
-#define DATA_TCM_BASE           0xa0000000
-#define DATA_TCM_SIZE           SZ_8K
-#define EXT_MEM_CTRL_BASE       0xf0000000
-#define EXT_MEM_CTRL_SIZE       SZ_4K
-
-#define CS1_BASE_VIRT           (void __iomem *)0xf7000000
-#define AHB_PERI_BASE_VIRT      (void __iomem *)0xf4000000
-#define APB0_PERI_BASE_VIRT     (void __iomem *)0xf1000000
-#define APB1_PERI_BASE_VIRT     (void __iomem *)0xf2000000
-#define EXT_MEM_CTRL_BASE_VIRT  (void __iomem *)0xf3000000
-#define INT_SRAM_BASE_VIRT      (void __iomem *)0xf5000000
-#define DATA_TCM_BASE_VIRT      (void __iomem *)0xf6000000
-
-#define __REG(x)     (*((volatile u32 *)(x)))
-
-/* USB Device Controller Registers */
-#define UDC_BASE        (AHB_PERI_BASE_VIRT + 0x8000)
-#define UDC_BASE_PHYS   (AHB_PERI_BASE + 0x8000)
-
-#define UDC_IR_OFFS             0x00
-#define UDC_EIR_OFFS            0x04
-#define UDC_EIER_OFFS           0x08
-#define UDC_FAR_OFFS            0x0c
-#define UDC_FNR_OFFS            0x10
-#define UDC_EDR_OFFS            0x14
-#define UDC_RT_OFFS             0x18
-#define UDC_SSR_OFFS            0x1c
-#define UDC_SCR_OFFS            0x20
-#define UDC_EP0SR_OFFS          0x24
-#define UDC_EP0CR_OFFS          0x28
-
-#define UDC_ESR_OFFS            0x2c
-#define UDC_ECR_OFFS            0x30
-#define UDC_BRCR_OFFS           0x34
-#define UDC_BWCR_OFFS           0x38
-#define UDC_MPR_OFFS            0x3c
-#define UDC_DCR_OFFS            0x40
-#define UDC_DTCR_OFFS           0x44
-#define UDC_DFCR_OFFS           0x48
-#define UDC_DTTCR1_OFFS         0x4c
-#define UDC_DTTCR2_OFFS         0x50
-#define UDC_ESR2_OFFS           0x54
-
-#define UDC_SCR2_OFFS           0x58
-#define UDC_EP0BUF_OFFS         0x60
-#define UDC_EP1BUF_OFFS         0x64
-#define UDC_EP2BUF_OFFS         0x68
-#define UDC_EP3BUF_OFFS         0x6c
-#define UDC_PLICR_OFFS          0xa0
-#define UDC_PCR_OFFS            0xa4
-
-#define UDC_UPCR0_OFFS          0xc8
-#define UDC_UPCR1_OFFS          0xcc
-#define UDC_UPCR2_OFFS          0xd0
-#define UDC_UPCR3_OFFS          0xd4
-
-/* Bits in UDC_EIR */
-#define UDC_EIR_EP0I            (1 << 0)
-#define UDC_EIR_EP1I            (1 << 1)
-#define UDC_EIR_EP2I            (1 << 2)
-#define UDC_EIR_EP3I            (1 << 3)
-#define UDC_EIR_EPI_MASK        0x0f
-
-/* Bits in UDC_EIER */
-#define UDC_EIER_EP0IE          (1 << 0)
-#define UDC_EIER_EP1IE          (1 << 1)
-#define UDC_EIER_EP2IE          (1 << 2)
-#define UDC_EIER_EP3IE          (1 << 3)
-
-/* Bits in UDC_FNR */
-#define UDC_FNR_FN_MASK         0x7ff
-#define UDC_FNR_SM              (1 << 13)
-#define UDC_FNR_FTL             (1 << 14)
-
-/* Bits in UDC_SSR */
-#define UDC_SSR_HFRES           (1 << 0)
-#define UDC_SSR_HFSUSP          (1 << 1)
-#define UDC_SSR_HFRM            (1 << 2)
-#define UDC_SSR_SDE             (1 << 3)
-#define UDC_SSR_HSP             (1 << 4)
-#define UDC_SSR_DM              (1 << 5)
-#define UDC_SSR_DP              (1 << 6)
-#define UDC_SSR_TBM             (1 << 7)
-#define UDC_SSR_VBON            (1 << 8)
-#define UDC_SSR_VBOFF           (1 << 9)
-#define UDC_SSR_EOERR           (1 << 10)
-#define UDC_SSR_DCERR           (1 << 11)
-#define UDC_SSR_TCERR           (1 << 12)
-#define UDC_SSR_BSERR           (1 << 13)
-#define UDC_SSR_TMERR           (1 << 14)
-#define UDC_SSR_BAERR           (1 << 15)
-
-/* Bits in UDC_SCR */
-#define UDC_SCR_HRESE           (1 << 0)
-#define UDC_SCR_HSSPE           (1 << 1)
-#define UDC_SCR_RRDE            (1 << 5)
-#define UDC_SCR_SPDEN           (1 << 6)
-#define UDC_SCR_DIEN            (1 << 12)
-
-/* Bits in UDC_EP0SR */
-#define UDC_EP0SR_RSR           (1 << 0)
-#define UDC_EP0SR_TST           (1 << 1)
-#define UDC_EP0SR_SHT           (1 << 4)
-#define UDC_EP0SR_LWO           (1 << 6)
-
-/* Bits in UDC_EP0CR */
-#define UDC_EP0CR_ESS           (1 << 1)
-
-/* Bits in UDC_ESR */
-#define UDC_ESR_RPS             (1 << 0)
-#define UDC_ESR_TPS             (1 << 1)
-#define UDC_ESR_LWO             (1 << 4)
-#define UDC_ESR_FFS             (1 << 6)
-
-/* Bits in UDC_ECR */
-#define UDC_ECR_ESS             (1 << 1)
-#define UDC_ECR_CDP             (1 << 2)
-
-#define UDC_ECR_FLUSH           (1 << 6)
-#define UDC_ECR_DUEN            (1 << 7)
-
-/* Bits in UDC_UPCR0 */
-#define UDC_UPCR0_VBD           (1 << 1)
-#define UDC_UPCR0_VBDS          (1 << 6)
-#define UDC_UPCR0_RCD_12        (0x0 << 9)
-#define UDC_UPCR0_RCD_24        (0x1 << 9)
-#define UDC_UPCR0_RCD_48        (0x2 << 9)
-#define UDC_UPCR0_RCS_EXT       (0x1 << 11)
-#define UDC_UPCR0_RCS_XTAL      (0x0 << 11)
-
-/* Bits in UDC_UPCR1 */
-#define UDC_UPCR1_CDT(x)        ((x) << 0)
-#define UDC_UPCR1_OTGT(x)       ((x) << 3)
-#define UDC_UPCR1_SQRXT(x)      ((x) << 8)
-#define UDC_UPCR1_TXFSLST(x)    ((x) << 12)
-
-/* Bits in UDC_UPCR2 */
-#define UDC_UPCR2_TP            (1 << 0)
-#define UDC_UPCR2_TXRT(x)       ((x) << 2)
-#define UDC_UPCR2_TXVRT(x)      ((x) << 5)
-#define UDC_UPCR2_OPMODE(x)     ((x) << 9)
-#define UDC_UPCR2_XCVRSEL(x)    ((x) << 12)
-#define UDC_UPCR2_TM            (1 << 14)
-
-/* USB Host Controller registers */
-#define USBH0_BASE      (AHB_PERI_BASE_VIRT + 0xb000)
-#define USBH1_BASE      (AHB_PERI_BASE_VIRT + 0xb800)
-
-#define OHCI_INT_ENABLE_OFFS    0x10
-
-#define RH_DESCRIPTOR_A_OFFS    0x48
-#define RH_DESCRIPTOR_B_OFFS    0x4c
-
-#define USBHTCFG0_OFFS          0x100
-#define USBHHCFG0_OFFS          0x104
-#define USBHHCFG1_OFFS          0x104
-
-/* DMA controller registers */
-#define DMAC0_BASE      (AHB_PERI_BASE + 0x4000)
-#define DMAC1_BASE      (AHB_PERI_BASE + 0xa000)
-#define DMAC2_BASE      (AHB_PERI_BASE + 0x4800)
-#define DMAC3_BASE      (AHB_PERI_BASE + 0xa800)
-
-#define DMAC_CH_OFFSET(ch)      (ch * 0x30)
-
-#define ST_SADR_OFFS            0x00
-#define SPARAM_OFFS             0x04
-#define C_SADR_OFFS             0x0c
-#define ST_DADR_OFFS            0x10
-#define DPARAM_OFFS             0x14
-#define C_DADR_OFFS             0x1c
-#define HCOUNT_OFFS             0x20
-#define CHCTRL_OFFS             0x24
-#define RPTCTRL_OFFS            0x28
-#define EXTREQ_A_OFFS           0x2c
-
-/* Bits in CHCTRL register */
-#define CHCTRL_EN               (1 << 0)
-
-#define CHCTRL_IEN              (1 << 2)
-#define CHCTRL_FLAG             (1 << 3)
-#define CHCTRL_WSIZE8           (0 << 4)
-#define CHCTRL_WSIZE16          (1 << 4)
-#define CHCTRL_WSIZE32          (2 << 4)
-
-#define CHCTRL_BSIZE1           (0 << 6)
-#define CHCTRL_BSIZE2           (1 << 6)
-#define CHCTRL_BSIZE4           (2 << 6)
-#define CHCTRL_BSIZE8           (3 << 6)
-
-#define CHCTRL_TYPE_SINGLE_E    (0 << 8)
-#define CHCTRL_TYPE_HW          (1 << 8)
-#define CHCTRL_TYPE_SW          (2 << 8)
-#define CHCTRL_TYPE_SINGLE_L    (3 << 8)
-
-#define CHCTRL_BST              (1 << 10)
-
-/* Use DMA controller 0, channel 2 for USB */
-#define USB_DMA_BASE            (DMAC0_BASE + DMAC_CH_OFFSET(2))
-
-/* NAND flash controller registers */
-#define NFC_BASE        (AHB_PERI_BASE_VIRT + 0xd000)
-#define NFC_BASE_PHYS   (AHB_PERI_BASE + 0xd000)
-
-#define NFC_CMD_OFFS            0x00
-#define NFC_LADDR_OFFS          0x04
-#define NFC_BADDR_OFFS          0x08
-#define NFC_SADDR_OFFS          0x0c
-#define NFC_WDATA_OFFS          0x10
-#define NFC_LDATA_OFFS          0x20
-#define NFC_SDATA_OFFS          0x40
-#define NFC_CTRL_OFFS           0x50
-#define NFC_PSTART_OFFS         0x54
-#define NFC_RSTART_OFFS         0x58
-#define NFC_DSIZE_OFFS          0x5c
-#define NFC_IREQ_OFFS           0x60
-#define NFC_RST_OFFS            0x64
-#define NFC_CTRL1_OFFS          0x68
-#define NFC_MDATA_OFFS          0x70
-
-#define NFC_WDATA_PHYS_ADDR     (NFC_BASE_PHYS + NFC_WDATA_OFFS)
-
-/* Bits in NFC_CTRL */
-#define NFC_CTRL_BHLD_MASK      (0xf << 0)
-#define NFC_CTRL_BPW_MASK       (0xf << 4)
-#define NFC_CTRL_BSTP_MASK      (0xf << 8)
-#define NFC_CTRL_CADDR_MASK     (0x7 << 12)
-#define NFC_CTRL_CADDR_1        (0x0 << 12)
-#define NFC_CTRL_CADDR_2        (0x1 << 12)
-#define NFC_CTRL_CADDR_3        (0x2 << 12)
-#define NFC_CTRL_CADDR_4        (0x3 << 12)
-#define NFC_CTRL_CADDR_5        (0x4 << 12)
-#define NFC_CTRL_MSK            (1 << 15)
-#define NFC_CTRL_PSIZE256       (0 << 16)
-#define NFC_CTRL_PSIZE512       (1 << 16)
-#define NFC_CTRL_PSIZE1024      (2 << 16)
-#define NFC_CTRL_PSIZE2048      (3 << 16)
-#define NFC_CTRL_PSIZE4096      (4 << 16)
-#define NFC_CTRL_PSIZE_MASK     (7 << 16)
-#define NFC_CTRL_BSIZE1         (0 << 19)
-#define NFC_CTRL_BSIZE2         (1 << 19)
-#define NFC_CTRL_BSIZE4         (2 << 19)
-#define NFC_CTRL_BSIZE8         (3 << 19)
-#define NFC_CTRL_BSIZE_MASK     (3 << 19)
-#define NFC_CTRL_RDY            (1 << 21)
-#define NFC_CTRL_CS0SEL         (1 << 22)
-#define NFC_CTRL_CS1SEL         (1 << 23)
-#define NFC_CTRL_CS2SEL         (1 << 24)
-#define NFC_CTRL_CS3SEL         (1 << 25)
-#define NFC_CTRL_CSMASK         (0xf << 22)
-#define NFC_CTRL_BW             (1 << 26)
-#define NFC_CTRL_FS             (1 << 27)
-#define NFC_CTRL_DEN            (1 << 28)
-#define NFC_CTRL_READ_IEN       (1 << 29)
-#define NFC_CTRL_PROG_IEN       (1 << 30)
-#define NFC_CTRL_RDY_IEN        (1 << 31)
-
-/* Bits in NFC_IREQ */
-#define NFC_IREQ_IRQ0           (1 << 0)
-#define NFC_IREQ_IRQ1           (1 << 1)
-#define NFC_IREQ_IRQ2           (1 << 2)
-
-#define NFC_IREQ_FLAG0          (1 << 4)
-#define NFC_IREQ_FLAG1          (1 << 5)
-#define NFC_IREQ_FLAG2          (1 << 6)
-
-/* MMC controller registers */
-#define MMC0_BASE       (AHB_PERI_BASE_VIRT + 0xe000)
-#define MMC1_BASE       (AHB_PERI_BASE_VIRT + 0xe800)
-
-/* UART base addresses */
-
-#define UART0_BASE      (APB0_PERI_BASE_VIRT + 0x07000)
-#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000)
-#define UART1_BASE      (APB0_PERI_BASE_VIRT + 0x08000)
-#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000)
-#define UART2_BASE      (APB0_PERI_BASE_VIRT + 0x09000)
-#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000)
-#define UART3_BASE      (APB0_PERI_BASE_VIRT + 0x0a000)
-#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000)
-#define UART4_BASE      (APB0_PERI_BASE_VIRT + 0x15000)
-#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000)
-
-#define UART_BASE       UART0_BASE
-#define UART_BASE_PHYS  UART0_BASE_PHYS
-
-/* ECC controller */
-#define ECC_CTR_BASE    (APB0_PERI_BASE_VIRT + 0xd000)
-
-#define ECC_CTRL_OFFS           0x00
-#define ECC_BASE_OFFS           0x04
-#define ECC_MASK_OFFS           0x08
-#define ECC_CLEAR_OFFS          0x0c
-#define ECC4_0_OFFS             0x10
-#define ECC4_1_OFFS             0x14
-
-#define ECC_EADDR0_OFFS         0x50
-
-#define ECC_ERRNUM_OFFS         0x90
-#define ECC_IREQ_OFFS           0x94
-
-/* Bits in ECC_CTRL */
-#define ECC_CTRL_ECC4_DIEN      (1 << 28)
-#define ECC_CTRL_ECC8_DIEN      (1 << 29)
-#define ECC_CTRL_ECC12_DIEN     (1 << 30)
-#define ECC_CTRL_ECC_DISABLE    0x0
-#define ECC_CTRL_ECC_SLC_ENC    0x8
-#define ECC_CTRL_ECC_SLC_DEC    0x9
-#define ECC_CTRL_ECC4_ENC       0xa
-#define ECC_CTRL_ECC4_DEC       0xb
-#define ECC_CTRL_ECC8_ENC       0xc
-#define ECC_CTRL_ECC8_DEC       0xd
-#define ECC_CTRL_ECC12_ENC      0xe
-#define ECC_CTRL_ECC12_DEC      0xf
-
-/* Bits in ECC_IREQ */
-#define ECC_IREQ_E4DI           (1 << 4)
-
-#define ECC_IREQ_E4DF           (1 << 20)
-#define ECC_IREQ_E4EF           (1 << 21)
-
-/* Interrupt controller */
-
-#define PIC0_BASE       (APB1_PERI_BASE_VIRT + 0x3000)
-#define PIC0_BASE_PHYS  (APB1_PERI_BASE + 0x3000)
-
-#define PIC0_IEN_OFFS           0x00
-#define PIC0_CREQ_OFFS          0x04
-#define PIC0_IREQ_OFFS          0x08
-#define PIC0_IRQSEL_OFFS        0x0c
-#define PIC0_SRC_OFFS           0x10
-#define PIC0_MREQ_OFFS          0x14
-#define PIC0_TSTREQ_OFFS        0x18
-#define PIC0_POL_OFFS           0x1c
-#define PIC0_IRQ_OFFS           0x20
-#define PIC0_FIQ_OFFS           0x24
-#define PIC0_MIRQ_OFFS          0x28
-#define PIC0_MFIQ_OFFS          0x2c
-#define PIC0_TMODE_OFFS         0x30
-#define PIC0_SYNC_OFFS          0x34
-#define PIC0_WKUP_OFFS          0x38
-#define PIC0_TMODEA_OFFS        0x3c
-#define PIC0_INTOEN_OFFS        0x40
-#define PIC0_MEN0_OFFS          0x44
-#define PIC0_MEN_OFFS           0x48
-
-#define PIC0_IEN                __REG(PIC0_BASE + PIC0_IEN_OFFS)
-#define PIC0_IEN_PHYS           __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS)
-#define PIC0_CREQ               __REG(PIC0_BASE + PIC0_CREQ_OFFS)
-#define PIC0_CREQ_PHYS          __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS)
-#define PIC0_IREQ               __REG(PIC0_BASE + PIC0_IREQ_OFFS)
-#define PIC0_IRQSEL             __REG(PIC0_BASE + PIC0_IRQSEL_OFFS)
-#define PIC0_IRQSEL_PHYS        __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS)
-#define PIC0_SRC                __REG(PIC0_BASE + PIC0_SRC_OFFS)
-#define PIC0_MREQ               __REG(PIC0_BASE + PIC0_MREQ_OFFS)
-#define PIC0_TSTREQ             __REG(PIC0_BASE + PIC0_TSTREQ_OFFS)
-#define PIC0_POL                __REG(PIC0_BASE + PIC0_POL_OFFS)
-#define PIC0_IRQ                __REG(PIC0_BASE + PIC0_IRQ_OFFS)
-#define PIC0_FIQ                __REG(PIC0_BASE + PIC0_FIQ_OFFS)
-#define PIC0_MIRQ               __REG(PIC0_BASE + PIC0_MIRQ_OFFS)
-#define PIC0_MFIQ               __REG(PIC0_BASE + PIC0_MFIQ_OFFS)
-#define PIC0_TMODE              __REG(PIC0_BASE + PIC0_TMODE_OFFS)
-#define PIC0_TMODE_PHYS         __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS)
-#define PIC0_SYNC               __REG(PIC0_BASE + PIC0_SYNC_OFFS)
-#define PIC0_WKUP               __REG(PIC0_BASE + PIC0_WKUP_OFFS)
-#define PIC0_TMODEA             __REG(PIC0_BASE + PIC0_TMODEA_OFFS)
-#define PIC0_INTOEN             __REG(PIC0_BASE + PIC0_INTOEN_OFFS)
-#define PIC0_MEN0               __REG(PIC0_BASE + PIC0_MEN0_OFFS)
-#define PIC0_MEN                __REG(PIC0_BASE + PIC0_MEN_OFFS)
-
-#define PIC1_BASE       (APB1_PERI_BASE_VIRT + 0x3080)
-
-#define PIC1_IEN_OFFS           0x00
-#define PIC1_CREQ_OFFS          0x04
-#define PIC1_IREQ_OFFS          0x08
-#define PIC1_IRQSEL_OFFS        0x0c
-#define PIC1_SRC_OFFS           0x10
-#define PIC1_MREQ_OFFS          0x14
-#define PIC1_TSTREQ_OFFS        0x18
-#define PIC1_POL_OFFS           0x1c
-#define PIC1_IRQ_OFFS           0x20
-#define PIC1_FIQ_OFFS           0x24
-#define PIC1_MIRQ_OFFS          0x28
-#define PIC1_MFIQ_OFFS          0x2c
-#define PIC1_TMODE_OFFS         0x30
-#define PIC1_SYNC_OFFS          0x34
-#define PIC1_WKUP_OFFS          0x38
-#define PIC1_TMODEA_OFFS        0x3c
-#define PIC1_INTOEN_OFFS        0x40
-#define PIC1_MEN1_OFFS          0x44
-#define PIC1_MEN_OFFS           0x48
-
-#define PIC1_IEN        __REG(PIC1_BASE + PIC1_IEN_OFFS)
-#define PIC1_CREQ       __REG(PIC1_BASE + PIC1_CREQ_OFFS)
-#define PIC1_IREQ       __REG(PIC1_BASE + PIC1_IREQ_OFFS)
-#define PIC1_IRQSEL     __REG(PIC1_BASE + PIC1_IRQSEL_OFFS)
-#define PIC1_SRC        __REG(PIC1_BASE + PIC1_SRC_OFFS)
-#define PIC1_MREQ       __REG(PIC1_BASE + PIC1_MREQ_OFFS)
-#define PIC1_TSTREQ     __REG(PIC1_BASE + PIC1_TSTREQ_OFFS)
-#define PIC1_POL        __REG(PIC1_BASE + PIC1_POL_OFFS)
-#define PIC1_IRQ        __REG(PIC1_BASE + PIC1_IRQ_OFFS)
-#define PIC1_FIQ        __REG(PIC1_BASE + PIC1_FIQ_OFFS)
-#define PIC1_MIRQ       __REG(PIC1_BASE + PIC1_MIRQ_OFFS)
-#define PIC1_MFIQ       __REG(PIC1_BASE + PIC1_MFIQ_OFFS)
-#define PIC1_TMODE      __REG(PIC1_BASE + PIC1_TMODE_OFFS)
-#define PIC1_SYNC       __REG(PIC1_BASE + PIC1_SYNC_OFFS)
-#define PIC1_WKUP       __REG(PIC1_BASE + PIC1_WKUP_OFFS)
-#define PIC1_TMODEA     __REG(PIC1_BASE + PIC1_TMODEA_OFFS)
-#define PIC1_INTOEN     __REG(PIC1_BASE + PIC1_INTOEN_OFFS)
-#define PIC1_MEN1       __REG(PIC1_BASE + PIC1_MEN1_OFFS)
-#define PIC1_MEN        __REG(PIC1_BASE + PIC1_MEN_OFFS)
-
-/* Timer registers */
-#define TIMER_BASE              (APB1_PERI_BASE_VIRT + 0x4000)
-#define TIMER_BASE_PHYS         (APB1_PERI_BASE + 0x4000)
-
-#define TWDCFG_OFFS             0x70
-
-#define TC32EN_OFFS             0x80
-#define TC32LDV_OFFS            0x84
-#define TC32CMP0_OFFS           0x88
-#define TC32CMP1_OFFS           0x8c
-#define TC32PCNT_OFFS           0x90
-#define TC32MCNT_OFFS           0x94
-#define TC32IRQ_OFFS            0x98
-
-/* Bits in TC32EN */
-#define TC32EN_PRESCALE_MASK    0x00ffffff
-#define TC32EN_ENABLE           (1 << 24)
-#define TC32EN_LOADZERO         (1 << 25)
-#define TC32EN_STOPMODE         (1 << 26)
-#define TC32EN_LDM0             (1 << 28)
-#define TC32EN_LDM1             (1 << 29)
-
-/* Bits in TC32IRQ */
-#define TC32IRQ_MSTAT_MASK      0x0000001f
-#define TC32IRQ_RSTAT_MASK      (0x1f << 8)
-#define TC32IRQ_IRQEN0          (1 << 16)
-#define TC32IRQ_IRQEN1          (1 << 17)
-#define TC32IRQ_IRQEN2          (1 << 18)
-#define TC32IRQ_IRQEN3          (1 << 19)
-#define TC32IRQ_IRQEN4          (1 << 20)
-#define TC32IRQ_RSYNC           (1 << 30)
-#define TC32IRQ_IRQCLR          (1 << 31)
-
-/* GPIO registers */
-#define GPIOPD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPD_DAT_OFFS         0x00
-#define GPIOPD_DOE_OFFS         0x04
-#define GPIOPD_FS0_OFFS         0x08
-#define GPIOPD_FS1_OFFS         0x0c
-#define GPIOPD_FS2_OFFS         0x10
-#define GPIOPD_RPU_OFFS         0x30
-#define GPIOPD_RPD_OFFS         0x34
-#define GPIOPD_DV0_OFFS         0x38
-#define GPIOPD_DV1_OFFS         0x3c
-
-#define GPIOPS_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPS_DAT_OFFS         0x40
-#define GPIOPS_DOE_OFFS         0x44
-#define GPIOPS_FS0_OFFS         0x48
-#define GPIOPS_FS1_OFFS         0x4c
-#define GPIOPS_FS2_OFFS         0x50
-#define GPIOPS_FS3_OFFS         0x54
-#define GPIOPS_RPU_OFFS         0x70
-#define GPIOPS_RPD_OFFS         0x74
-#define GPIOPS_DV0_OFFS         0x78
-#define GPIOPS_DV1_OFFS         0x7c
-
-#define GPIOPS_FS1_SDH0_BITS    0x000000ff
-#define GPIOPS_FS1_SDH1_BITS    0x0000ff00
-
-#define GPIOPU_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPU_DAT_OFFS         0x80
-#define GPIOPU_DOE_OFFS         0x84
-#define GPIOPU_FS0_OFFS         0x88
-#define GPIOPU_FS1_OFFS         0x8c
-#define GPIOPU_FS2_OFFS         0x90
-#define GPIOPU_RPU_OFFS         0xb0
-#define GPIOPU_RPD_OFFS         0xb4
-#define GPIOPU_DV0_OFFS         0xb8
-#define GPIOPU_DV1_OFFS         0xbc
-
-#define GPIOPU_FS0_TXD0         (1 << 0)
-#define GPIOPU_FS0_RXD0         (1 << 1)
-#define GPIOPU_FS0_CTS0         (1 << 2)
-#define GPIOPU_FS0_RTS0         (1 << 3)
-#define GPIOPU_FS0_TXD1         (1 << 4)
-#define GPIOPU_FS0_RXD1         (1 << 5)
-#define GPIOPU_FS0_CTS1         (1 << 6)
-#define GPIOPU_FS0_RTS1         (1 << 7)
-#define GPIOPU_FS0_TXD2         (1 << 8)
-#define GPIOPU_FS0_RXD2         (1 << 9)
-#define GPIOPU_FS0_CTS2         (1 << 10)
-#define GPIOPU_FS0_RTS2         (1 << 11)
-#define GPIOPU_FS0_TXD3         (1 << 12)
-#define GPIOPU_FS0_RXD3         (1 << 13)
-#define GPIOPU_FS0_CTS3         (1 << 14)
-#define GPIOPU_FS0_RTS3         (1 << 15)
-#define GPIOPU_FS0_TXD4         (1 << 16)
-#define GPIOPU_FS0_RXD4         (1 << 17)
-#define GPIOPU_FS0_CTS4         (1 << 18)
-#define GPIOPU_FS0_RTS4         (1 << 19)
-
-#define GPIOFC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOFC_DAT_OFFS         0xc0
-#define GPIOFC_DOE_OFFS         0xc4
-#define GPIOFC_FS0_OFFS         0xc8
-#define GPIOFC_FS1_OFFS         0xcc
-#define GPIOFC_FS2_OFFS         0xd0
-#define GPIOFC_FS3_OFFS         0xd4
-#define GPIOFC_RPU_OFFS         0xf0
-#define GPIOFC_RPD_OFFS         0xf4
-#define GPIOFC_DV0_OFFS         0xf8
-#define GPIOFC_DV1_OFFS         0xfc
-
-#define GPIOFD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOFD_DAT_OFFS         0x100
-#define GPIOFD_DOE_OFFS         0x104
-#define GPIOFD_FS0_OFFS         0x108
-#define GPIOFD_FS1_OFFS         0x10c
-#define GPIOFD_FS2_OFFS         0x110
-#define GPIOFD_RPU_OFFS         0x130
-#define GPIOFD_RPD_OFFS         0x134
-#define GPIOFD_DV0_OFFS         0x138
-#define GPIOFD_DV1_OFFS         0x13c
-
-#define GPIOLC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOLC_DAT_OFFS         0x140
-#define GPIOLC_DOE_OFFS         0x144
-#define GPIOLC_FS0_OFFS         0x148
-#define GPIOLC_FS1_OFFS         0x14c
-#define GPIOLC_RPU_OFFS         0x170
-#define GPIOLC_RPD_OFFS         0x174
-#define GPIOLC_DV0_OFFS         0x178
-#define GPIOLC_DV1_OFFS         0x17c
-
-#define GPIOLD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOLD_DAT_OFFS         0x180
-#define GPIOLD_DOE_OFFS         0x184
-#define GPIOLD_FS0_OFFS         0x188
-#define GPIOLD_FS1_OFFS         0x18c
-#define GPIOLD_FS2_OFFS         0x190
-#define GPIOLD_RPU_OFFS         0x1b0
-#define GPIOLD_RPD_OFFS         0x1b4
-#define GPIOLD_DV0_OFFS         0x1b8
-#define GPIOLD_DV1_OFFS         0x1bc
-
-#define GPIOAD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOAD_DAT_OFFS         0x1c0
-#define GPIOAD_DOE_OFFS         0x1c4
-#define GPIOAD_FS0_OFFS         0x1c8
-#define GPIOAD_RPU_OFFS         0x1f0
-#define GPIOAD_RPD_OFFS         0x1f4
-#define GPIOAD_DV0_OFFS         0x1f8
-#define GPIOAD_DV1_OFFS         0x1fc
-
-#define GPIOXC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOXC_DAT_OFFS         0x200
-#define GPIOXC_DOE_OFFS         0x204
-#define GPIOXC_FS0_OFFS         0x208
-#define GPIOXC_RPU_OFFS         0x230
-#define GPIOXC_RPD_OFFS         0x234
-#define GPIOXC_DV0_OFFS         0x238
-#define GPIOXC_DV1_OFFS         0x23c
-
-#define GPIOXC_FS0              __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS)
-
-#define GPIOXC_FS0_CS0          (1 << 26)
-#define GPIOXC_FS0_CS1          (1 << 27)
-
-#define GPIOXD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOXD_DAT_OFFS         0x240
-#define GPIOXD_FS0_OFFS         0x248
-#define GPIOXD_RPU_OFFS         0x270
-#define GPIOXD_RPD_OFFS         0x274
-#define GPIOXD_DV0_OFFS         0x278
-#define GPIOXD_DV1_OFFS         0x27c
-
-#define GPIOPK_BASE             (APB1_PERI_BASE_VIRT + 0x1c000)
-
-#define GPIOPK_RST_OFFS         0x008
-#define GPIOPK_DAT_OFFS         0x100
-#define GPIOPK_DOE_OFFS         0x104
-#define GPIOPK_FS0_OFFS         0x108
-#define GPIOPK_FS1_OFFS         0x10c
-#define GPIOPK_FS2_OFFS         0x110
-#define GPIOPK_IRQST_OFFS       0x210
-#define GPIOPK_IRQEN_OFFS       0x214
-#define GPIOPK_IRQPOL_OFFS      0x218
-#define GPIOPK_IRQTM0_OFFS      0x21c
-#define GPIOPK_IRQTM1_OFFS      0x220
-#define GPIOPK_CTL_OFFS         0x22c
-
-#define PMGPIO_BASE             (APB1_PERI_BASE_VIRT + 0x10000)
-#define BACKUP_RAM_BASE         PMGPIO_BASE
-
-#define PMGPIO_DAT_OFFS         0x800
-#define PMGPIO_DOE_OFFS         0x804
-#define PMGPIO_FS0_OFFS         0x808
-#define PMGPIO_RPU_OFFS         0x810
-#define PMGPIO_RPD_OFFS         0x814
-#define PMGPIO_DV0_OFFS         0x818
-#define PMGPIO_DV1_OFFS         0x81c
-#define PMGPIO_EE0_OFFS         0x820
-#define PMGPIO_EE1_OFFS         0x824
-#define PMGPIO_CTL_OFFS         0x828
-#define PMGPIO_DI_OFFS          0x82c
-#define PMGPIO_STR_OFFS         0x830
-#define PMGPIO_STF_OFFS         0x834
-#define PMGPIO_POL_OFFS         0x838
-#define PMGPIO_APB_OFFS         0x800
-
-/* Clock controller registers */
-#define CKC_BASE        ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000))
-
-#define CLKCTRL_OFFS            0x00
-#define PLL0CFG_OFFS            0x04
-#define PLL1CFG_OFFS            0x08
-#define CLKDIVC0_OFFS           0x0c
-
-#define BCLKCTR0_OFFS           0x14
-#define SWRESET0_OFFS           0x18
-
-#define BCLKCTR1_OFFS           0x60
-#define SWRESET1_OFFS           0x64
-#define PWDCTL_OFFS             0x68
-#define PLL2CFG_OFFS            0x6c
-#define CLKDIVC1_OFFS           0x70
-
-#define ACLKREF_OFFS            0x80
-#define ACLKI2C_OFFS            0x84
-#define ACLKSPI0_OFFS           0x88
-#define ACLKSPI1_OFFS           0x8c
-#define ACLKUART0_OFFS          0x90
-#define ACLKUART1_OFFS          0x94
-#define ACLKUART2_OFFS          0x98
-#define ACLKUART3_OFFS          0x9c
-#define ACLKUART4_OFFS          0xa0
-#define ACLKTCT_OFFS            0xa4
-#define ACLKTCX_OFFS            0xa8
-#define ACLKTCZ_OFFS            0xac
-#define ACLKADC_OFFS            0xb0
-#define ACLKDAI0_OFFS           0xb4
-#define ACLKDAI1_OFFS           0xb8
-#define ACLKLCD_OFFS            0xbc
-#define ACLKSPDIF_OFFS          0xc0
-#define ACLKUSBH_OFFS           0xc4
-#define ACLKSDH0_OFFS           0xc8
-#define ACLKSDH1_OFFS           0xcc
-#define ACLKC3DEC_OFFS          0xd0
-#define ACLKEXT_OFFS            0xd4
-#define ACLKCAN0_OFFS           0xd8
-#define ACLKCAN1_OFFS           0xdc
-#define ACLKGSB0_OFFS           0xe0
-#define ACLKGSB1_OFFS           0xe4
-#define ACLKGSB2_OFFS           0xe8
-#define ACLKGSB3_OFFS           0xec
-
-#define PLLxCFG_PD              (1 << 31)
-
-/* CLKCTRL bits */
-#define CLKCTRL_XE              (1 << 31)
-
-/* CLKDIVCx bits */
-#define CLKDIVC0_XTE            (1 << 7)
-#define CLKDIVC0_XE             (1 << 15)
-#define CLKDIVC0_P1E            (1 << 23)
-#define CLKDIVC0_P0E            (1 << 31)
-
-#define CLKDIVC1_P2E            (1 << 7)
-
-/* BCLKCTR0 clock bits */
-#define BCLKCTR0_USBD           (1 << 4)
-#define BCLKCTR0_ECC            (1 << 9)
-#define BCLKCTR0_USBH0          (1 << 11)
-#define BCLKCTR0_NFC            (1 << 16)
-
-/* BCLKCTR1 clock bits */
-#define BCLKCTR1_USBH1          (1 << 20)
-
-/* SWRESET0 bits */
-#define SWRESET0_USBD           (1 << 4)
-#define SWRESET0_USBH0          (1 << 11)
-
-/* SWRESET1 bits */
-#define SWRESET1_USBH1          (1 << 20)
-
-/* System clock sources.
- * Note: These are the clock sources that serve as parents for
- * all other clocks. They have no parents themselves.
- *
- * These values are used for struct clk->root_id. All clocks
- * that are not system clock sources have this value set to
- * CLK_SRC_NOROOT.
- * The values for system clocks start with CLK_SRC_PLL0 == 0
- * because this gives us exactly the values needed for the lower
- * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is
- * defined as -1 to not disturb the order.
- */
-enum root_clks {
-        CLK_SRC_NOROOT = -1,
-        CLK_SRC_PLL0 = 0,
-        CLK_SRC_PLL1,
-        CLK_SRC_PLL0DIV,
-        CLK_SRC_PLL1DIV,
-        CLK_SRC_XI,
-        CLK_SRC_XIDIV,
-        CLK_SRC_XTI,
-        CLK_SRC_XTIDIV,
-        CLK_SRC_PLL2,
-        CLK_SRC_PLL2DIV,
-        CLK_SRC_PK0,
-        CLK_SRC_PK1,
-        CLK_SRC_PK2,
-        CLK_SRC_PK3,
-        CLK_SRC_PK4,
-        CLK_SRC_48MHZ
-};
-
-#define CLK_SRC_MASK            0xf
-
-/* Bits in ACLK* registers */
-#define ACLK_EN         (1 << 28)
-#define ACLK_SEL_SHIFT          24
-#define ACLK_SEL_MASK           0x0f000000
-#define ACLK_DIV_MASK           0x00000fff
-
-/* System configuration registers */
-
-#define SCFG_BASE               (APB1_PERI_BASE_VIRT + 0x13000)
-
-#define BMI_OFFS                0x00
-#define AHBCON0_OFFS            0x04
-#define APBPWE_OFFS             0x08
-#define DTCMWAIT_OFFS           0x0c
-#define ECCSEL_OFFS             0x10
-#define AHBCON1_OFFS            0x14
-#define SDHCFG_OFFS             0x18
-#define REMAP_OFFS              0x20
-#define LCDSIAE_OFFS            0x24
-#define XMCCFG_OFFS             0xe0
-#define IMCCFG_OFFS             0xe4
-
-/* Values for ECCSEL */
-#define ECCSEL_EXTMEM           0x0
-#define ECCSEL_DTCM             0x1
-#define ECCSEL_INT_SRAM         0x2
-#define ECCSEL_AHB              0x3
-
-/* Bits in XMCCFG */
-#define XMCCFG_NFCE             (1 << 1)
-#define XMCCFG_FDXD             (1 << 2)
-
-/* External memory controller registers */
-
-#define EMC_BASE                EXT_MEM_CTRL_BASE
-
-#define SDCFG_OFFS              0x00
-#define SDFSM_OFFS              0x04
-#define MCFG_OFFS               0x08
-
-#define CSCFG0_OFFS             0x10
-#define CSCFG1_OFFS             0x14
-#define CSCFG2_OFFS             0x18
-#define CSCFG3_OFFS             0x1c
-
-#define MCFG_SDEN               (1 << 4)
-
-#endif /* TCC8K_REGS_H */
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h
deleted file mode 100644
index 057acbe651d9..000000000000
--- a/arch/arm/plat-tcc/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * A definition needed by arch core code.
- *
- */
-#define CLOCK_TICK_RATE         (HZ * 100000UL)
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h
deleted file mode 100644
index 7a3e33a27a30..000000000000
--- a/arch/arm/plat-tcc/include/mach/uncompress.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This file is licensed under the terms of the GPL version 2.
- */
-
-#include <linux/serial_reg.h>
-#include <linux/types.h>
-
-#include <mach/tcc8k-regs.h>
-
-unsigned int system_rev;
-
-#define ID_MASK                 0x7fff
-
-static void putc(int c)
-{
-        u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
-        u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
-
-        while (!(*uart_lsr & UART_LSR_THRE))
-                barrier();
-        *uart_tx = c;
-}
-
-static inline void flush(void)
-{
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
-#define arch_decomp_wdog()
diff --git a/arch/arm/plat-tcc/include/mach/vmalloc.h b/arch/arm/plat-tcc/include/mach/vmalloc.h
deleted file mode 100644
index 99414d9c2b94..000000000000
--- a/arch/arm/plat-tcc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * Author: <linux@telechips.com>
- * Created: June 10, 2008
- *
- * Copyright (C) 2000 Russell King.
- * Copyright (C) 2008-2009 Telechips
- *
- * Licensed under the terms of the GPL v2.
- */
-#define VMALLOC_END     0xf0000000UL
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c
deleted file mode 100644
index cc208fae3e7a..000000000000
--- a/arch/arm/plat-tcc/system.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * System functions for Telechips TCCxxxx SoCs
- *
- * Copyright (C) Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#include <linux/io.h>
-
-#include <mach/tcc8k-regs.h>
-
-/* System reboot */
-void plat_tcc_reboot(void)
-{
-        /* Make sure clocks are on */
-        __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
-
-        /* Enable watchdog reset */
-        __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
-        /* Wait for reset */
-        while(1)
-                ;
-}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 5bdeef969847..ccbe16f47227 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1123,5 +1123,6 @@ blissc			MACH_BLISSC		BLISSC			3491
 thales_adc              MACH_THALES_ADC         THALES_ADC              3492
 ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
 atdgp318                MACH_ATDGP318           ATDGP318                3494
+m28evk                  MACH_M28EVK             M28EVK                  3613
 smdk4212                MACH_SMDK4212           SMDK4212                3638
 smdk4412                MACH_SMDK4412           SMDK4412                3765