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authorIngo Molnar <mingo@elte.hu>2012-03-13 11:26:52 -0400
committerIngo Molnar <mingo@elte.hu>2012-03-13 11:26:52 -0400
commit47258cf3c4aa5d56e678bafe0dd0d03ddd980b88 (patch)
tree4856f0fb1185ba97f320a7ed6fb63bf136708a42 /arch/arm
parentc308b56b5398779cd3da0f62ab26b0453494c3d4 (diff)
parentfde7d9049e55ab85a390be7f415d74c9f62dd0f9 (diff)
Merge tag 'v3.3-rc7' into sched/core
Merge reason: merge back final fixes, prepare for the merge window. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/.gitignore1
-rw-r--r--arch/arm/include/asm/pmu.h2
-rw-r--r--arch/arm/kernel/ecard.c1
-rw-r--r--arch/arm/kernel/perf_event.c45
-rw-r--r--arch/arm/kernel/perf_event_v6.c22
-rw-r--r--arch/arm/kernel/perf_event_v7.c11
-rw-r--r--arch/arm/kernel/perf_event_xscale.c20
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c19
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c8
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c2
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c2
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-lpc32xx/irq.c25
-rw-r--r--arch/arm/mach-lpc32xx/serial.c20
-rw-r--r--arch/arm/mach-mmp/aspenite.c1
-rw-r--r--arch/arm/mach-mmp/pxa168.c1
-rw-r--r--arch/arm/mach-mmp/tavorevb.c1
-rw-r--r--arch/arm/mach-omap1/board-innovator.c4
-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c2
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c5
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c52
-rw-r--r--arch/arm/mach-omap2/hsmmc.c6
-rw-r--r--arch/arm/mach-omap2/id.c1
-rw-r--r--arch/arm/mach-omap2/io.c1
-rw-r--r--arch/arm/mach-omap2/mailbox.c13
-rw-r--r--arch/arm/mach-omap2/mux.c2
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c3
-rw-r--r--arch/arm/mach-omap2/omap4-common.c27
-rw-r--r--arch/arm/mach-omap2/pm.c3
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mach-omap2/usb-host.c6
-rw-r--r--arch/arm/mach-pxa/generic.h1
-rw-r--r--arch/arm/mach-pxa/hx4700.c25
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c7
-rw-r--r--arch/arm/mach-pxa/pxa25x.c3
-rw-r--r--arch/arm/mach-pxa/pxa27x.c3
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa95x.c1
-rw-r--r--arch/arm/mach-pxa/saarb.c1
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c3
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c5
-rw-r--r--arch/arm/mach-s3c2440/common.h2
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c13
-rw-r--r--arch/arm/mach-s3c2440/s3c244x.c12
-rw-r--r--arch/arm/mach-ux500/Kconfig2
-rw-r--r--arch/arm/mach-vexpress/Kconfig2
-rw-r--r--arch/arm/mm/proc-v7.S4
-rw-r--r--arch/arm/plat-omap/common.c1
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h10
-rw-r--r--arch/arm/plat-omap/include/plat/omap-secure.h6
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-samsung/devs.c2
-rw-r--r--arch/arm/plat-spear/time.c6
66 files changed, 315 insertions, 135 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a48aecc17eac..dfb0312f4e73 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622
1280 depends on CPU_V7 1280 depends on CPU_V7
1281 help 1281 help
1282 This option enables the workaround for the 743622 Cortex-A9 1282 This option enables the workaround for the 743622 Cortex-A9
1283 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1283 (r2p*) erratum. Under very rare conditions, a faulty
1284 optimisation in the Cortex-A9 Store Buffer may lead to data 1284 optimisation in the Cortex-A9 Store Buffer may lead to data
1285 corruption. This workaround sets a specific bit in the diagnostic 1285 corruption. This workaround sets a specific bit in the diagnostic
1286 register of the Cortex-A9 which disables the Store Buffer 1286 register of the Cortex-A9 which disables the Store Buffer
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
index ce1c5ff746e7..3c79f85975aa 100644
--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
@@ -3,3 +3,4 @@ zImage
3xipImage 3xipImage
4bootpImage 4bootpImage
5uImage 5uImage
6*.dtb
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b5a5be2536c1..90114faa9f3c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
134 134
135u64 armpmu_event_update(struct perf_event *event, 135u64 armpmu_event_update(struct perf_event *event,
136 struct hw_perf_event *hwc, 136 struct hw_perf_event *hwc,
137 int idx, int overflow); 137 int idx);
138 138
139int armpmu_event_set_period(struct perf_event *event, 139int armpmu_event_set_period(struct perf_event *event,
140 struct hw_perf_event *hwc, 140 struct hw_perf_event *hwc,
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 4dd0edab6a65..1651d4950744 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
242 242
243 memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); 243 memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
244 244
245 vma.vm_flags = VM_EXEC;
245 vma.vm_mm = mm; 246 vma.vm_mm = mm;
246 247
247 flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE); 248 flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5bb91bf3d47f..b2abfa18f137 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
180u64 180u64
181armpmu_event_update(struct perf_event *event, 181armpmu_event_update(struct perf_event *event,
182 struct hw_perf_event *hwc, 182 struct hw_perf_event *hwc,
183 int idx, int overflow) 183 int idx)
184{ 184{
185 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); 185 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
186 u64 delta, prev_raw_count, new_raw_count; 186 u64 delta, prev_raw_count, new_raw_count;
@@ -193,13 +193,7 @@ again:
193 new_raw_count) != prev_raw_count) 193 new_raw_count) != prev_raw_count)
194 goto again; 194 goto again;
195 195
196 new_raw_count &= armpmu->max_period; 196 delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
197 prev_raw_count &= armpmu->max_period;
198
199 if (overflow)
200 delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
201 else
202 delta = new_raw_count - prev_raw_count;
203 197
204 local64_add(delta, &event->count); 198 local64_add(delta, &event->count);
205 local64_sub(delta, &hwc->period_left); 199 local64_sub(delta, &hwc->period_left);
@@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
216 if (hwc->idx < 0) 210 if (hwc->idx < 0)
217 return; 211 return;
218 212
219 armpmu_event_update(event, hwc, hwc->idx, 0); 213 armpmu_event_update(event, hwc, hwc->idx);
220} 214}
221 215
222static void 216static void
@@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
232 if (!(hwc->state & PERF_HES_STOPPED)) { 226 if (!(hwc->state & PERF_HES_STOPPED)) {
233 armpmu->disable(hwc, hwc->idx); 227 armpmu->disable(hwc, hwc->idx);
234 barrier(); /* why? */ 228 barrier(); /* why? */
235 armpmu_event_update(event, hwc, hwc->idx, 0); 229 armpmu_event_update(event, hwc, hwc->idx);
236 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; 230 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
237 } 231 }
238} 232}
@@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
518 hwc->config_base |= (unsigned long)mapping; 512 hwc->config_base |= (unsigned long)mapping;
519 513
520 if (!hwc->sample_period) { 514 if (!hwc->sample_period) {
521 hwc->sample_period = armpmu->max_period; 515 /*
516 * For non-sampling runs, limit the sample_period to half
517 * of the counter width. That way, the new counter value
518 * is far less likely to overtake the previous one unless
519 * you have some serious IRQ latency issues.
520 */
521 hwc->sample_period = armpmu->max_period >> 1;
522 hwc->last_period = hwc->sample_period; 522 hwc->last_period = hwc->sample_period;
523 local64_set(&hwc->period_left, hwc->sample_period); 523 local64_set(&hwc->period_left, hwc->sample_period);
524 } 524 }
@@ -680,6 +680,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
680} 680}
681 681
682/* 682/*
683 * PMU hardware loses all context when a CPU goes offline.
684 * When a CPU is hotplugged back in, since some hardware registers are
685 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
686 * junk values out of them.
687 */
688static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
689 unsigned long action, void *hcpu)
690{
691 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
692 return NOTIFY_DONE;
693
694 if (cpu_pmu && cpu_pmu->reset)
695 cpu_pmu->reset(NULL);
696
697 return NOTIFY_OK;
698}
699
700static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
701 .notifier_call = pmu_cpu_notify,
702};
703
704/*
683 * CPU PMU identification and registration. 705 * CPU PMU identification and registration.
684 */ 706 */
685static int __init 707static int __init
@@ -730,6 +752,7 @@ init_hw_perf_events(void)
730 pr_info("enabled with %s PMU driver, %d counters available\n", 752 pr_info("enabled with %s PMU driver, %d counters available\n",
731 cpu_pmu->name, cpu_pmu->num_events); 753 cpu_pmu->name, cpu_pmu->num_events);
732 cpu_pmu_init(cpu_pmu); 754 cpu_pmu_init(cpu_pmu);
755 register_cpu_notifier(&pmu_cpu_notifier);
733 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); 756 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
734 } else { 757 } else {
735 pr_info("no hardware support available\n"); 758 pr_info("no hardware support available\n");
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 533be9930ec2..b78af0cc6ef3 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
467 raw_spin_unlock_irqrestore(&events->pmu_lock, flags); 467 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
468} 468}
469 469
470static int counter_is_active(unsigned long pmcr, int idx)
471{
472 unsigned long mask = 0;
473 if (idx == ARMV6_CYCLE_COUNTER)
474 mask = ARMV6_PMCR_CCOUNT_IEN;
475 else if (idx == ARMV6_COUNTER0)
476 mask = ARMV6_PMCR_COUNT0_IEN;
477 else if (idx == ARMV6_COUNTER1)
478 mask = ARMV6_PMCR_COUNT1_IEN;
479
480 if (mask)
481 return pmcr & mask;
482
483 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
484 return 0;
485}
486
487static irqreturn_t 470static irqreturn_t
488armv6pmu_handle_irq(int irq_num, 471armv6pmu_handle_irq(int irq_num,
489 void *dev) 472 void *dev)
@@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
513 struct perf_event *event = cpuc->events[idx]; 496 struct perf_event *event = cpuc->events[idx];
514 struct hw_perf_event *hwc; 497 struct hw_perf_event *hwc;
515 498
516 if (!counter_is_active(pmcr, idx)) 499 /* Ignore if we don't have an event. */
500 if (!event)
517 continue; 501 continue;
518 502
519 /* 503 /*
@@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
524 continue; 508 continue;
525 509
526 hwc = &event->hw; 510 hwc = &event->hw;
527 armpmu_event_update(event, hwc, idx, 1); 511 armpmu_event_update(event, hwc, idx);
528 data.period = event->hw.last_period; 512 data.period = event->hw.last_period;
529 if (!armpmu_event_set_period(event, hwc, idx)) 513 if (!armpmu_event_set_period(event, hwc, idx))
530 continue; 514 continue;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 6933244c68f9..4d7095af2ab3 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
809 809
810 counter = ARMV7_IDX_TO_COUNTER(idx); 810 counter = ARMV7_IDX_TO_COUNTER(idx);
811 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); 811 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
812 isb();
813 /* Clear the overflow flag in case an interrupt is pending. */
814 asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
815 isb();
816
812 return idx; 817 return idx;
813} 818}
814 819
@@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
955 struct perf_event *event = cpuc->events[idx]; 960 struct perf_event *event = cpuc->events[idx];
956 struct hw_perf_event *hwc; 961 struct hw_perf_event *hwc;
957 962
963 /* Ignore if we don't have an event. */
964 if (!event)
965 continue;
966
958 /* 967 /*
959 * We have a single interrupt for all counters. Check that 968 * We have a single interrupt for all counters. Check that
960 * each counter has overflowed before we process it. 969 * each counter has overflowed before we process it.
@@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
963 continue; 972 continue;
964 973
965 hwc = &event->hw; 974 hwc = &event->hw;
966 armpmu_event_update(event, hwc, idx, 1); 975 armpmu_event_update(event, hwc, idx);
967 data.period = event->hw.last_period; 976 data.period = event->hw.last_period;
968 if (!armpmu_event_set_period(event, hwc, idx)) 977 if (!armpmu_event_set_period(event, hwc, idx))
969 continue; 978 continue;
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 3b99d8269829..71a21e6712f5 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
255 struct perf_event *event = cpuc->events[idx]; 255 struct perf_event *event = cpuc->events[idx];
256 struct hw_perf_event *hwc; 256 struct hw_perf_event *hwc;
257 257
258 if (!event)
259 continue;
260
258 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx)) 261 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
259 continue; 262 continue;
260 263
261 hwc = &event->hw; 264 hwc = &event->hw;
262 armpmu_event_update(event, hwc, idx, 1); 265 armpmu_event_update(event, hwc, idx);
263 data.period = event->hw.last_period; 266 data.period = event->hw.last_period;
264 if (!armpmu_event_set_period(event, hwc, idx)) 267 if (!armpmu_event_set_period(event, hwc, idx))
265 continue; 268 continue;
@@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
592 struct perf_event *event = cpuc->events[idx]; 595 struct perf_event *event = cpuc->events[idx];
593 struct hw_perf_event *hwc; 596 struct hw_perf_event *hwc;
594 597
595 if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx)) 598 if (!event)
599 continue;
600
601 if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
596 continue; 602 continue;
597 603
598 hwc = &event->hw; 604 hwc = &event->hw;
599 armpmu_event_update(event, hwc, idx, 1); 605 armpmu_event_update(event, hwc, idx);
600 data.period = event->hw.last_period; 606 data.period = event->hw.last_period;
601 if (!armpmu_event_set_period(event, hwc, idx)) 607 if (!armpmu_event_set_period(event, hwc, idx))
602 continue; 608 continue;
@@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
663static void 669static void
664xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) 670xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
665{ 671{
666 unsigned long flags, ien, evtsel; 672 unsigned long flags, ien, evtsel, of_flags;
667 struct pmu_hw_events *events = cpu_pmu->get_hw_events(); 673 struct pmu_hw_events *events = cpu_pmu->get_hw_events();
668 674
669 ien = xscale2pmu_read_int_enable(); 675 ien = xscale2pmu_read_int_enable();
@@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
672 switch (idx) { 678 switch (idx) {
673 case XSCALE_CYCLE_COUNTER: 679 case XSCALE_CYCLE_COUNTER:
674 ien &= ~XSCALE2_CCOUNT_INT_EN; 680 ien &= ~XSCALE2_CCOUNT_INT_EN;
681 of_flags = XSCALE2_CCOUNT_OVERFLOW;
675 break; 682 break;
676 case XSCALE_COUNTER0: 683 case XSCALE_COUNTER0:
677 ien &= ~XSCALE2_COUNT0_INT_EN; 684 ien &= ~XSCALE2_COUNT0_INT_EN;
678 evtsel &= ~XSCALE2_COUNT0_EVT_MASK; 685 evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
679 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT; 686 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
687 of_flags = XSCALE2_COUNT0_OVERFLOW;
680 break; 688 break;
681 case XSCALE_COUNTER1: 689 case XSCALE_COUNTER1:
682 ien &= ~XSCALE2_COUNT1_INT_EN; 690 ien &= ~XSCALE2_COUNT1_INT_EN;
683 evtsel &= ~XSCALE2_COUNT1_EVT_MASK; 691 evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
684 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT; 692 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
693 of_flags = XSCALE2_COUNT1_OVERFLOW;
685 break; 694 break;
686 case XSCALE_COUNTER2: 695 case XSCALE_COUNTER2:
687 ien &= ~XSCALE2_COUNT2_INT_EN; 696 ien &= ~XSCALE2_COUNT2_INT_EN;
688 evtsel &= ~XSCALE2_COUNT2_EVT_MASK; 697 evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
689 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT; 698 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
699 of_flags = XSCALE2_COUNT2_OVERFLOW;
690 break; 700 break;
691 case XSCALE_COUNTER3: 701 case XSCALE_COUNTER3:
692 ien &= ~XSCALE2_COUNT3_INT_EN; 702 ien &= ~XSCALE2_COUNT3_INT_EN;
693 evtsel &= ~XSCALE2_COUNT3_EVT_MASK; 703 evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
694 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT; 704 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
705 of_flags = XSCALE2_COUNT3_OVERFLOW;
695 break; 706 break;
696 default: 707 default:
697 WARN_ONCE(1, "invalid counter number (%d)\n", idx); 708 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
@@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
701 raw_spin_lock_irqsave(&events->pmu_lock, flags); 712 raw_spin_lock_irqsave(&events->pmu_lock, flags);
702 xscale2pmu_write_event_select(evtsel); 713 xscale2pmu_write_event_select(evtsel);
703 xscale2pmu_write_int_enable(ien); 714 xscale2pmu_write_int_enable(ien);
715 xscale2pmu_write_overflow_flags(of_flags);
704 raw_spin_unlock_irqrestore(&events->pmu_lock, flags); 716 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
705} 717}
706 718
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b7582dd10dc3..96e2adcd5a84 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -38,10 +38,6 @@
38#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) 38#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
39static u64 hdmac_dmamask = DMA_BIT_MASK(32); 39static u64 hdmac_dmamask = DMA_BIT_MASK(32);
40 40
41static struct at_dma_platform_data atdma_pdata = {
42 .nr_channels = 8,
43};
44
45static struct resource hdmac_resources[] = { 41static struct resource hdmac_resources[] = {
46 [0] = { 42 [0] = {
47 .start = AT91SAM9G45_BASE_DMA, 43 .start = AT91SAM9G45_BASE_DMA,
@@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = {
56}; 52};
57 53
58static struct platform_device at_hdmac_device = { 54static struct platform_device at_hdmac_device = {
59 .name = "at_hdmac", 55 .name = "at91sam9g45_dma",
60 .id = -1, 56 .id = -1,
61 .dev = { 57 .dev = {
62 .dma_mask = &hdmac_dmamask, 58 .dma_mask = &hdmac_dmamask,
63 .coherent_dma_mask = DMA_BIT_MASK(32), 59 .coherent_dma_mask = DMA_BIT_MASK(32),
64 .platform_data = &atdma_pdata,
65 }, 60 },
66 .resource = hdmac_resources, 61 .resource = hdmac_resources,
67 .num_resources = ARRAY_SIZE(hdmac_resources), 62 .num_resources = ARRAY_SIZE(hdmac_resources),
@@ -69,9 +64,15 @@ static struct platform_device at_hdmac_device = {
69 64
70void __init at91_add_device_hdmac(void) 65void __init at91_add_device_hdmac(void)
71{ 66{
72 dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); 67#if defined(CONFIG_OF)
73 dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask); 68 struct device_node *of_node =
74 platform_device_register(&at_hdmac_device); 69 of_find_node_by_name(NULL, "dma-controller");
70
71 if (of_node)
72 of_node_put(of_node);
73 else
74#endif
75 platform_device_register(&at_hdmac_device);
75} 76}
76#else 77#else
77void __init at91_add_device_hdmac(void) {} 78void __init at91_add_device_hdmac(void) {}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 61908dce9784..9be71c11d0f0 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -33,10 +33,6 @@
33#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) 33#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
34static u64 hdmac_dmamask = DMA_BIT_MASK(32); 34static u64 hdmac_dmamask = DMA_BIT_MASK(32);
35 35
36static struct at_dma_platform_data atdma_pdata = {
37 .nr_channels = 2,
38};
39
40static struct resource hdmac_resources[] = { 36static struct resource hdmac_resources[] = {
41 [0] = { 37 [0] = {
42 .start = AT91SAM9RL_BASE_DMA, 38 .start = AT91SAM9RL_BASE_DMA,
@@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
51}; 47};
52 48
53static struct platform_device at_hdmac_device = { 49static struct platform_device at_hdmac_device = {
54 .name = "at_hdmac", 50 .name = "at91sam9rl_dma",
55 .id = -1, 51 .id = -1,
56 .dev = { 52 .dev = {
57 .dma_mask = &hdmac_dmamask, 53 .dma_mask = &hdmac_dmamask,
58 .coherent_dma_mask = DMA_BIT_MASK(32), 54 .coherent_dma_mask = DMA_BIT_MASK(32),
59 .platform_data = &atdma_pdata,
60 }, 55 },
61 .resource = hdmac_resources, 56 .resource = hdmac_resources,
62 .num_resources = ARRAY_SIZE(hdmac_resources), 57 .num_resources = ARRAY_SIZE(hdmac_resources),
@@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
64 59
65void __init at91_add_device_hdmac(void) 60void __init at91_add_device_hdmac(void)
66{ 61{
67 dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
68 platform_device_register(&at_hdmac_device); 62 platform_device_register(&at_hdmac_device);
69} 63}
70#else 64#else
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d5fb44f16d31..d67d0b4feb6f 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -34,6 +34,7 @@
34#include <mach/ep93xx_spi.h> 34#include <mach/ep93xx_spi.h>
35#include <mach/gpio-ep93xx.h> 35#include <mach/gpio-ep93xx.h>
36 36
37#include <asm/hardware/vic.h>
37#include <asm/mach-types.h> 38#include <asm/mach-types.h>
38#include <asm/mach/map.h> 39#include <asm/mach/map.h>
39#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
@@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
361 .atag_offset = 0x100, 362 .atag_offset = 0x100,
362 .map_io = vision_map_io, 363 .map_io = vision_map_io,
363 .init_irq = ep93xx_init_irq, 364 .init_irq = ep93xx_init_irq,
365 .handle_irq = vic_handle_irq,
364 .timer = &ep93xx_timer, 366 .timer = &ep93xx_timer,
365 .init_machine = vision_init_machine, 367 .init_machine = vision_init_machine,
366 .restart = ep93xx_restart, 368 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 0fc65ffde8ff..38939956c34f 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -13,6 +13,7 @@
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/gpio_keys.h> 14#include <linux/gpio_keys.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/interrupt.h>
16#include <linux/fb.h> 17#include <linux/fb.h>
17#include <linux/mfd/max8998.h> 18#include <linux/mfd/max8998.h>
18#include <linux/regulator/machine.h> 19#include <linux/regulator/machine.h>
@@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = {
595 .threshold = 0x28, 596 .threshold = 0x28,
596 .voltage = 2800000, /* 2.8V */ 597 .voltage = 2800000, /* 2.8V */
597 .orient = MXT_DIAGONAL, 598 .orient = MXT_DIAGONAL,
599 .irqflags = IRQF_TRIGGER_FALLING,
598}; 600};
599 601
600static struct i2c_board_info i2c3_devs[] __initdata = { 602static struct i2c_board_info i2c3_devs[] __initdata = {
diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h
index 2667f52e3b04..9e3b90df32e1 100644
--- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
+++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h
@@ -61,7 +61,7 @@
61 */ 61 */
62#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1) 62#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
63#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2) 63#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
64#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4) 64#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
65#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6) 65#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
66#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7) 66#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
67#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8) 67#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 4eae566dfdc7..c74de01ab5b6 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
118 .event_group = &lpc32xx_event_pin_regs, 118 .event_group = &lpc32xx_event_pin_regs,
119 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT, 119 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
120 }, 120 },
121 [IRQ_LPC32XX_GPI_28] = {
122 .event_group = &lpc32xx_event_pin_regs,
123 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
124 },
121 [IRQ_LPC32XX_GPIO_00] = { 125 [IRQ_LPC32XX_GPIO_00] = {
122 .event_group = &lpc32xx_event_int_regs, 126 .event_group = &lpc32xx_event_int_regs,
123 .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT, 127 .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
@@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
305 309
306 if (state) 310 if (state)
307 eventreg |= lpc32xx_events[d->irq].mask; 311 eventreg |= lpc32xx_events[d->irq].mask;
308 else 312 else {
309 eventreg &= ~lpc32xx_events[d->irq].mask; 313 eventreg &= ~lpc32xx_events[d->irq].mask;
310 314
315 /*
316 * When disabling the wakeup, clear the latched
317 * event
318 */
319 __raw_writel(lpc32xx_events[d->irq].mask,
320 lpc32xx_events[d->irq].
321 event_group->rawstat_reg);
322 }
323
311 __raw_writel(eventreg, 324 __raw_writel(eventreg,
312 lpc32xx_events[d->irq].event_group->enab_reg); 325 lpc32xx_events[d->irq].event_group->enab_reg);
313 326
@@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
380 393
381 /* Setup SIC1 */ 394 /* Setup SIC1 */
382 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE)); 395 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
383 __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE)); 396 __raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
384 __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE)); 397 __raw_writel(SIC1_ATR_DEFAULT,
398 LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
385 399
386 /* Setup SIC2 */ 400 /* Setup SIC2 */
387 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); 401 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
388 __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE)); 402 __raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
389 __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE)); 403 __raw_writel(SIC2_ATR_DEFAULT,
404 LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
390 405
391 /* Configure supported IRQ's */ 406 /* Configure supported IRQ's */
392 for (i = 0; i < NR_IRQS; i++) { 407 for (i = 0; i < NR_IRQS; i++) {
diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c
index 429cfdbb2b3d..f2735281616a 100644
--- a/arch/arm/mach-lpc32xx/serial.c
+++ b/arch/arm/mach-lpc32xx/serial.c
@@ -88,6 +88,7 @@ struct uartinit {
88 char *uart_ck_name; 88 char *uart_ck_name;
89 u32 ck_mode_mask; 89 u32 ck_mode_mask;
90 void __iomem *pdiv_clk_reg; 90 void __iomem *pdiv_clk_reg;
91 resource_size_t mapbase;
91}; 92};
92 93
93static struct uartinit uartinit_data[] __initdata = { 94static struct uartinit uartinit_data[] __initdata = {
@@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
97 .ck_mode_mask = 98 .ck_mode_mask =
98 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5), 99 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
99 .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL, 100 .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
101 .mapbase = LPC32XX_UART5_BASE,
100 }, 102 },
101#endif 103#endif
102#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT 104#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
@@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
105 .ck_mode_mask = 107 .ck_mode_mask =
106 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3), 108 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
107 .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL, 109 .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
110 .mapbase = LPC32XX_UART3_BASE,
108 }, 111 },
109#endif 112#endif
110#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT 113#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
@@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
113 .ck_mode_mask = 116 .ck_mode_mask =
114 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4), 117 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
115 .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL, 118 .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
119 .mapbase = LPC32XX_UART4_BASE,
116 }, 120 },
117#endif 121#endif
118#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT 122#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
@@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
121 .ck_mode_mask = 125 .ck_mode_mask =
122 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6), 126 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
123 .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL, 127 .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
128 .mapbase = LPC32XX_UART6_BASE,
124 }, 129 },
125#endif 130#endif
126}; 131};
@@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
165 170
166 /* pre-UART clock divider set to 1 */ 171 /* pre-UART clock divider set to 1 */
167 __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg); 172 __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
173
174 /*
175 * Force a flush of the RX FIFOs to work around a
176 * HW bug
177 */
178 puart = uartinit_data[i].mapbase;
179 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
180 __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
181 j = LPC32XX_SUART_FIFO_SIZE;
182 while (j--)
183 tmp = __raw_readl(
184 LPC32XX_UART_DLL_FIFO(puart));
185 __raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
168 } 186 }
169 187
170 /* This needs to be done after all UART clocks are setup */ 188 /* This needs to be done after all UART clocks are setup */
171 __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE); 189 __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
172 for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) { 190 for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
173 /* Force a flush of the RX FIFOs to work around a HW bug */ 191 /* Force a flush of the RX FIFOs to work around a HW bug */
174 puart = serial_std_platform_data[i].mapbase; 192 puart = serial_std_platform_data[i].mapbase;
175 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); 193 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 17cb76060125..3588a5584153 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -17,7 +17,6 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/gpio.h>
21 20
22#include <asm/mach-types.h> 21#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 7bc17eaa12eb..ada1213982b4 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -24,7 +24,6 @@
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
27#include <linux/platform_device.h>
28#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
29#include <mach/pxa168.h> 28#include <mach/pxa168.h>
30 29
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 8e3b5af04a57..bc97170125bf 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -12,7 +12,6 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/smc91x.h> 14#include <linux/smc91x.h>
15#include <linux/gpio.h>
16 15
17#include <asm/mach-types.h> 16#include <asm/mach-types.h>
18#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 309369ea6978..be2002f42dea 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -416,13 +416,13 @@ static void __init innovator_init(void)
416#ifdef CONFIG_ARCH_OMAP15XX 416#ifdef CONFIG_ARCH_OMAP15XX
417 if (cpu_is_omap1510()) { 417 if (cpu_is_omap1510()) {
418 omap1_usb_init(&innovator1510_usb_config); 418 omap1_usb_init(&innovator1510_usb_config);
419 innovator_config[1].data = &innovator1510_lcd_config; 419 innovator_config[0].data = &innovator1510_lcd_config;
420 } 420 }
421#endif 421#endif
422#ifdef CONFIG_ARCH_OMAP16XX 422#ifdef CONFIG_ARCH_OMAP16XX
423 if (cpu_is_omap1610()) { 423 if (cpu_is_omap1610()) {
424 omap1_usb_init(&h2_usb_config); 424 omap1_usb_init(&h2_usb_config);
425 innovator_config[1].data = &innovator1610_lcd_config; 425 innovator_config[0].data = &innovator1610_lcd_config;
426 } 426 }
427#endif 427#endif
428 omap_board_config = innovator_config; 428 omap_board_config = innovator_config;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index d965da45160e..e20c8ab80b0e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -364,8 +364,8 @@ config OMAP3_SDRC_AC_TIMING
364 going on could result in system crashes; 364 going on could result in system crashes;
365 365
366config OMAP4_ERRATA_I688 366config OMAP4_ERRATA_I688
367 bool "OMAP4 errata: Async Bridge Corruption (BROKEN)" 367 bool "OMAP4 errata: Async Bridge Corruption"
368 depends on ARCH_OMAP4 && BROKEN 368 depends on ARCH_OMAP4
369 select ARCH_HAS_BARRIERS 369 select ARCH_HAS_BARRIERS
370 help 370 help
371 If a data is stalled inside asynchronous bridge because of back 371 If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 42a4d11fad23..672262717601 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -371,7 +371,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
371 else 371 else
372 *openp = 0; 372 *openp = 0;
373 373
374#ifdef CONFIG_MMC_OMAP
374 omap_mmc_notify_cover_event(mmc_device, index, *openp); 375 omap_mmc_notify_cover_event(mmc_device, index, *openp);
376#else
377 pr_warn("MMC: notify cover event not available\n");
378#endif
375} 379}
376 380
377static int n8x0_mmc_late_init(struct device *dev) 381static int n8x0_mmc_late_init(struct device *dev)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c775bead1497..c877236a8442 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); 381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
382 382
383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ 383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
384 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 384 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
385 385
386 platform_device_register(&leds_gpio); 386 platform_device_register(&leds_gpio);
387 387
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index febffde2ff10..7e9338e8d684 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -132,6 +132,7 @@ void omap3_map_io(void);
132void am33xx_map_io(void); 132void am33xx_map_io(void);
133void omap4_map_io(void); 133void omap4_map_io(void);
134void ti81xx_map_io(void); 134void ti81xx_map_io(void);
135void omap_barriers_init(void);
135 136
136/** 137/**
137 * omap_test_timeout - busy-loop, testing a condition 138 * omap_test_timeout - busy-loop, testing a condition
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index cfdbb86bc84e..72e018b9b260 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
65 struct timespec ts_preidle, ts_postidle, ts_idle; 65 struct timespec ts_preidle, ts_postidle, ts_idle;
66 u32 cpu1_state; 66 u32 cpu1_state;
67 int idle_time; 67 int idle_time;
68 int new_state_idx;
69 int cpu_id = smp_processor_id(); 68 int cpu_id = smp_processor_id();
70 69
71 /* Used to keep track of the total time in idle */ 70 /* Used to keep track of the total time in idle */
@@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
84 */ 83 */
85 cpu1_state = pwrdm_read_pwrst(cpu1_pd); 84 cpu1_state = pwrdm_read_pwrst(cpu1_pd);
86 if (cpu1_state != PWRDM_POWER_OFF) { 85 if (cpu1_state != PWRDM_POWER_OFF) {
87 new_state_idx = drv->safe_state_index; 86 index = drv->safe_state_index;
88 cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]); 87 cx = cpuidle_get_statedata(&dev->states_usage[index]);
89 } 88 }
90 89
91 if (index > 0) 90 if (index > 0)
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 997033129d26..bbb870c04a5e 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,6 +19,8 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
22 24
23#include <plat/board.h> 25#include <plat/board.h>
24#include <plat/gpmc.h> 26#include <plat/gpmc.h>
@@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
42 .flags = SMSC911X_USE_16BIT, 44 .flags = SMSC911X_USE_16BIT,
43}; 45};
44 46
47static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
48 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
49 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
50};
51
52/* Generic regulator definition to satisfy smsc911x */
53static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
54 .constraints = {
55 .min_uV = 3300000,
56 .max_uV = 3300000,
57 .valid_modes_mask = REGULATOR_MODE_NORMAL
58 | REGULATOR_MODE_STANDBY,
59 .valid_ops_mask = REGULATOR_CHANGE_MODE
60 | REGULATOR_CHANGE_STATUS,
61 },
62 .num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
63 .consumer_supplies = gpmc_smsc911x_supply,
64};
65
66static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
67 .supply_name = "gpmc_smsc911x",
68 .microvolts = 3300000,
69 .gpio = -EINVAL,
70 .startup_delay = 0,
71 .enable_high = 0,
72 .enabled_at_boot = 1,
73 .init_data = &gpmc_smsc911x_reg_init_data,
74};
75
76/*
77 * Platform device id of 42 is a temporary fix to avoid conflicts
78 * with other reg-fixed-voltage devices. The real fix should
79 * involve the driver core providing a way of dynamically
80 * assigning a unique id on registration for platform devices
81 * in the same name space.
82 */
83static struct platform_device gpmc_smsc911x_regulator = {
84 .name = "reg-fixed-voltage",
85 .id = 42,
86 .dev = {
87 .platform_data = &gpmc_smsc911x_fixed_reg_data,
88 },
89};
90
45/* 91/*
46 * Initialize smsc911x device connected to the GPMC. Note that we 92 * Initialize smsc911x device connected to the GPMC. Note that we
47 * assume that pin multiplexing is done in the board-*.c file, 93 * assume that pin multiplexing is done in the board-*.c file,
@@ -55,6 +101,12 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
55 101
56 gpmc_cfg = board_data; 102 gpmc_cfg = board_data;
57 103
104 ret = platform_device_register(&gpmc_smsc911x_regulator);
105 if (ret < 0) {
106 pr_err("Unable to register smsc911x regulators: %d\n", ret);
107 return;
108 }
109
58 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { 110 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
59 pr_err("Failed to request GPMC mem region\n"); 111 pr_err("Failed to request GPMC mem region\n");
60 return; 112 return;
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index b40c28895298..19dd1657245c 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -428,6 +428,7 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
428 return 0; 428 return 0;
429} 429}
430 430
431static int omap_hsmmc_done;
431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 432#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
432 433
433void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 434void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
@@ -491,6 +492,11 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
491{ 492{
492 u32 reg; 493 u32 reg;
493 494
495 if (omap_hsmmc_done)
496 return;
497
498 omap_hsmmc_done = 1;
499
494 if (!cpu_is_omap44xx()) { 500 if (!cpu_is_omap44xx()) {
495 if (cpu_is_omap2430()) { 501 if (cpu_is_omap2430()) {
496 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; 502 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..719ee423abe2 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
343 case 0xb944: 343 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0; 344 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0"; 345 *cpu_rev = "1.0";
346 break;
346 case 0xb8f2: 347 case 0xb8f2:
347 switch (rev) { 348 switch (rev) {
348 case 0: 349 case 0:
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index eb50c29fb644..fb11b44fbdec 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -307,6 +307,7 @@ void __init omapam33xx_map_common_io(void)
307void __init omap44xx_map_common_io(void) 307void __init omap44xx_map_common_io(void)
308{ 308{
309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); 309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
310 omap_barriers_init();
310} 311}
311#endif 312#endif
312 313
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index a6db1e4f7b6e..415a6f1cf419 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
281 .ops = &omap2_mbox_ops, 281 .ops = &omap2_mbox_ops,
282 .priv = &omap2_mbox_iva_priv, 282 .priv = &omap2_mbox_iva_priv,
283}; 283};
284#endif
284 285
285struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL }; 286#ifdef CONFIG_ARCH_OMAP2
287struct omap_mbox *omap2_mboxes[] = {
288 &mbox_dsp_info,
289#ifdef CONFIG_SOC_OMAP2420
290 &mbox_iva_info,
291#endif
292 NULL
293};
286#endif 294#endif
287 295
288#if defined(CONFIG_ARCH_OMAP4) 296#if defined(CONFIG_ARCH_OMAP4)
@@ -412,8 +420,7 @@ static void __exit omap2_mbox_exit(void)
412 platform_driver_unregister(&omap2_mbox_driver); 420 platform_driver_unregister(&omap2_mbox_driver);
413} 421}
414 422
415/* must be ready before omap3isp is probed */ 423module_init(omap2_mbox_init);
416subsys_initcall(omap2_mbox_init);
417module_exit(omap2_mbox_exit); 424module_exit(omap2_mbox_exit);
418 425
419MODULE_LICENSE("GPL v2"); 426MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fb8bc9fa43b1..611a0e3d54ca 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
218 return -ENODEV; 218 return -ENODEV;
219} 219}
220 220
221static int __init 221static int
222omap_mux_get_by_name(const char *muxname, 222omap_mux_get_by_name(const char *muxname,
223 struct omap_mux_partition **found_partition, 223 struct omap_mux_partition **found_partition,
224 struct omap_mux **found_mux) 224 struct omap_mux **found_mux)
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index b8822048e409..ac49384d0285 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -150,7 +150,8 @@ err_out:
150 platform_device_put(omap_iommu_pdev[i]); 150 platform_device_put(omap_iommu_pdev[i]);
151 return err; 151 return err;
152} 152}
153module_init(omap_iommu_init); 153/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init);
154 155
155static void __exit omap_iommu_exit(void) 156static void __exit omap_iommu_exit(void)
156{ 157{
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 40a8fbc07e4b..70de277f5c15 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,12 +24,14 @@
24 24
25#include <plat/irqs.h> 25#include <plat/irqs.h>
26#include <plat/sram.h> 26#include <plat/sram.h>
27#include <plat/omap-secure.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/omap-wakeupgen.h> 30#include <mach/omap-wakeupgen.h>
30 31
31#include "common.h" 32#include "common.h"
32#include "omap4-sar-layout.h" 33#include "omap4-sar-layout.h"
34#include <linux/export.h>
33 35
34#ifdef CONFIG_CACHE_L2X0 36#ifdef CONFIG_CACHE_L2X0
35static void __iomem *l2cache_base; 37static void __iomem *l2cache_base;
@@ -43,6 +45,9 @@ static void __iomem *sar_ram_base;
43 45
44void __iomem *dram_sync, *sram_sync; 46void __iomem *dram_sync, *sram_sync;
45 47
48static phys_addr_t paddr;
49static u32 size;
50
46void omap_bus_sync(void) 51void omap_bus_sync(void)
47{ 52{
48 if (dram_sync && sram_sync) { 53 if (dram_sync && sram_sync) {
@@ -51,19 +56,22 @@ void omap_bus_sync(void)
51 isb(); 56 isb();
52 } 57 }
53} 58}
59EXPORT_SYMBOL(omap_bus_sync);
54 60
55static int __init omap_barriers_init(void) 61/* Steal one page physical memory for barrier implementation */
62int __init omap_barrier_reserve_memblock(void)
56{ 63{
57 struct map_desc dram_io_desc[1];
58 phys_addr_t paddr;
59 u32 size;
60
61 if (!cpu_is_omap44xx())
62 return -ENODEV;
63 64
64 size = ALIGN(PAGE_SIZE, SZ_1M); 65 size = ALIGN(PAGE_SIZE, SZ_1M);
65 paddr = arm_memblock_steal(size, SZ_1M); 66 paddr = arm_memblock_steal(size, SZ_1M);
66 67
68 return 0;
69}
70
71void __init omap_barriers_init(void)
72{
73 struct map_desc dram_io_desc[1];
74
67 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; 75 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
68 dram_io_desc[0].pfn = __phys_to_pfn(paddr); 76 dram_io_desc[0].pfn = __phys_to_pfn(paddr);
69 dram_io_desc[0].length = size; 77 dram_io_desc[0].length = size;
@@ -75,9 +83,10 @@ static int __init omap_barriers_init(void)
75 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", 83 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
76 (long long) paddr, dram_io_desc[0].virtual); 84 (long long) paddr, dram_io_desc[0].virtual);
77 85
78 return 0;
79} 86}
80core_initcall(omap_barriers_init); 87#else
88void __init omap_barriers_init(void)
89{}
81#endif 90#endif
82 91
83void __init gic_init_irq(void) 92void __init gic_init_irq(void)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1881fe915149..5a65dd04aa38 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -174,14 +174,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
174 freq = clk->rate; 174 freq = clk->rate;
175 clk_put(clk); 175 clk_put(clk);
176 176
177 rcu_read_lock();
177 opp = opp_find_freq_ceil(dev, &freq); 178 opp = opp_find_freq_ceil(dev, &freq);
178 if (IS_ERR(opp)) { 179 if (IS_ERR(opp)) {
180 rcu_read_unlock();
179 pr_err("%s: unable to find boot up OPP for vdd_%s\n", 181 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
180 __func__, vdd_name); 182 __func__, vdd_name);
181 goto exit; 183 goto exit;
182 } 184 }
183 185
184 bootup_volt = opp_get_voltage(opp); 186 bootup_volt = opp_get_voltage(opp);
187 rcu_read_unlock();
185 if (!bootup_volt) { 188 if (!bootup_volt) {
186 pr_err("%s: unable to find voltage corresponding " 189 pr_err("%s: unable to find voltage corresponding "
187 "to the bootup OPP for vdd_%s\n", __func__, vdd_name); 190 "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 10b20c652e5d..4b57757bf9d1 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
270 .constraints = { 270 .constraints = {
271 .min_uV = 3300000, 271 .min_uV = 3300000,
272 .max_uV = 3300000, 272 .max_uV = 3300000,
273 .apply_uV = true,
274 .valid_modes_mask = REGULATOR_MODE_NORMAL 273 .valid_modes_mask = REGULATOR_MODE_NORMAL
275 | REGULATOR_MODE_STANDBY, 274 | REGULATOR_MODE_STANDBY,
276 .valid_ops_mask = REGULATOR_CHANGE_MODE 275 .valid_ops_mask = REGULATOR_CHANGE_MODE
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 771dc781b746..f51348dafafd 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
486void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 486void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
487{ 487{
488 struct omap_hwmod *oh[2]; 488 struct omap_hwmod *oh[2];
489 struct omap_device *od; 489 struct platform_device *pdev;
490 int bus_id = -1; 490 int bus_id = -1;
491 int i; 491 int i;
492 492
@@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
522 return; 522 return;
523 } 523 }
524 524
525 od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, 525 pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
526 (void *)&usbhs_data, sizeof(usbhs_data), 526 (void *)&usbhs_data, sizeof(usbhs_data),
527 omap_uhhtll_latency, 527 omap_uhhtll_latency,
528 ARRAY_SIZE(omap_uhhtll_latency), false); 528 ARRAY_SIZE(omap_uhhtll_latency), false);
529 if (IS_ERR(od)) { 529 if (IS_ERR(pdev)) {
530 pr_err("Could not build hwmod devices %s,%s\n", 530 pr_err("Could not build hwmod devices %s,%s\n",
531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); 531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532 return; 532 return;
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 0d729e6619df..42d5cca66257 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
49#endif 49#endif
50 50
51extern struct syscore_ops pxa_irq_syscore_ops; 51extern struct syscore_ops pxa_irq_syscore_ops;
52extern struct syscore_ops pxa_gpio_syscore_ops;
53extern struct syscore_ops pxa2xx_mfp_syscore_ops; 52extern struct syscore_ops pxa2xx_mfp_syscore_ops;
54extern struct syscore_ops pxa3xx_mfp_syscore_ops; 53extern struct syscore_ops pxa3xx_mfp_syscore_ops;
55 54
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index fb9b62dcf4ca..208eef1c0485 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -45,6 +45,7 @@
45#include <mach/hx4700.h> 45#include <mach/hx4700.h>
46#include <mach/irda.h> 46#include <mach/irda.h>
47 47
48#include <sound/ak4641.h>
48#include <video/platform_lcd.h> 49#include <video/platform_lcd.h>
49#include <video/w100fb.h> 50#include <video/w100fb.h>
50 51
@@ -765,6 +766,28 @@ static struct i2c_board_info __initdata pi2c_board_info[] = {
765}; 766};
766 767
767/* 768/*
769 * Asahi Kasei AK4641 on I2C
770 */
771
772static struct ak4641_platform_data ak4641_info = {
773 .gpio_power = GPIO27_HX4700_CODEC_ON,
774 .gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
775};
776
777static struct i2c_board_info i2c_board_info[] __initdata = {
778 {
779 I2C_BOARD_INFO("ak4641", 0x12),
780 .platform_data = &ak4641_info,
781 },
782};
783
784static struct platform_device audio = {
785 .name = "hx4700-audio",
786 .id = -1,
787};
788
789
790/*
768 * PCMCIA 791 * PCMCIA
769 */ 792 */
770 793
@@ -790,6 +813,7 @@ static struct platform_device *devices[] __initdata = {
790 &gpio_vbus, 813 &gpio_vbus,
791 &power_supply, 814 &power_supply,
792 &strataflash, 815 &strataflash,
816 &audio,
793 &pcmcia, 817 &pcmcia,
794}; 818};
795 819
@@ -827,6 +851,7 @@ static void __init hx4700_init(void)
827 pxa_set_ficp_info(&ficp_info); 851 pxa_set_ficp_info(&ficp_info);
828 pxa27x_set_i2c_power_info(NULL); 852 pxa27x_set_i2c_power_info(NULL);
829 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
854 i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
830 i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info)); 855 i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
831 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info); 856 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
832 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info)); 857 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index f14775536b83..29b62afc6f7c 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
226{ 226{
227 int i; 227 int i;
228 228
229 /* running before pxa_gpio_probe() */
230#ifdef CONFIG_CPU_PXA26x
231 pxa_last_gpio = 89;
232#else
233 pxa_last_gpio = 84;
234#endif
229 for (i = 0; i <= pxa_last_gpio; i++) 235 for (i = 0; i <= pxa_last_gpio; i++)
230 gpio_desc[i].valid = 1; 236 gpio_desc[i].valid = 1;
231 237
@@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
295{ 301{
296 int i, gpio; 302 int i, gpio;
297 303
304 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
298 for (i = 0; i <= pxa_last_gpio; i++) { 305 for (i = 0; i <= pxa_last_gpio; i++) {
299 /* skip GPIO2, 5, 6, 7, 8, they are not 306 /* skip GPIO2, 5, 6, 7, 8, they are not
300 * valid pins allow configuration 307 * valid pins allow configuration
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 91e4f6c03766..3352b37b60cf 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -25,7 +25,6 @@
25#include <linux/suspend.h> 25#include <linux/suspend.h>
26#include <linux/syscore_ops.h> 26#include <linux/syscore_ops.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <linux/gpio.h>
29 28
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
31#include <asm/suspend.h> 30#include <asm/suspend.h>
@@ -209,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
211 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
212}; 212};
213 213
214static struct clk_lookup pxa25x_hwuart_clkreg = 214static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -368,7 +368,6 @@ static int __init pxa25x_init(void)
368 368
369 register_syscore_ops(&pxa_irq_syscore_ops); 369 register_syscore_ops(&pxa_irq_syscore_ops);
370 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 370 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
371 register_syscore_ops(&pxa_gpio_syscore_ops);
372 register_syscore_ops(&pxa2xx_clock_syscore_ops); 371 register_syscore_ops(&pxa2xx_clock_syscore_ops);
373 372
374 ret = platform_add_devices(pxa25x_devices, 373 ret = platform_add_devices(pxa25x_devices,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index aed6cbcf3866..6bce78edce7a 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -22,7 +22,6 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/i2c/pxa-i2c.h> 24#include <linux/i2c/pxa-i2c.h>
25#include <linux/gpio.h>
26 25
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <mach/hardware.h> 27#include <mach/hardware.h>
@@ -230,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
232 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
233}; 233};
234 234
235#ifdef CONFIG_PM 235#ifdef CONFIG_PM
@@ -456,7 +456,6 @@ static int __init pxa27x_init(void)
456 456
457 register_syscore_ops(&pxa_irq_syscore_ops); 457 register_syscore_ops(&pxa_irq_syscore_ops);
458 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 458 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
459 register_syscore_ops(&pxa_gpio_syscore_ops);
460 register_syscore_ops(&pxa2xx_clock_syscore_ops); 459 register_syscore_ops(&pxa2xx_clock_syscore_ops);
461 460
462 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 461 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4f402afa6609..3918a672238e 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -462,7 +462,6 @@ static int __init pxa3xx_init(void)
462 462
463 register_syscore_ops(&pxa_irq_syscore_ops); 463 register_syscore_ops(&pxa_irq_syscore_ops);
464 register_syscore_ops(&pxa3xx_mfp_syscore_ops); 464 register_syscore_ops(&pxa3xx_mfp_syscore_ops);
465 register_syscore_ops(&pxa_gpio_syscore_ops);
466 register_syscore_ops(&pxa3xx_clock_syscore_ops); 465 register_syscore_ops(&pxa3xx_clock_syscore_ops);
467 466
468 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 467 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index d082a583df78..5ce434b95e87 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -283,7 +283,6 @@ static int __init pxa95x_init(void)
283 return ret; 283 return ret;
284 284
285 register_syscore_ops(&pxa_irq_syscore_ops); 285 register_syscore_ops(&pxa_irq_syscore_ops);
286 register_syscore_ops(&pxa_gpio_syscore_ops);
287 register_syscore_ops(&pxa3xx_clock_syscore_ops); 286 register_syscore_ops(&pxa3xx_clock_syscore_ops);
288 287
289 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 288 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index febc809ed5a6..5aded5e6148f 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -15,7 +15,6 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/i2c/pxa-i2c.h> 16#include <linux/i2c/pxa-i2c.h>
17#include <linux/mfd/88pm860x.h> 17#include <linux/mfd/88pm860x.h>
18#include <linux/gpio.h>
19 18
20#include <asm/mach-types.h> 19#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 8d5168d253a9..30989baf7f2a 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -168,6 +168,7 @@ struct battery_thresh sharpsl_battery_levels_noac[] = {
168#define MAXCTRL_SEL_SH 4 168#define MAXCTRL_SEL_SH 4
169#define MAXCTRL_STR (1u << 7) 169#define MAXCTRL_STR (1u << 7)
170 170
171extern int max1111_read_channel(int);
171/* 172/*
172 * Read MAX1111 ADC 173 * Read MAX1111 ADC
173 */ 174 */
@@ -177,8 +178,6 @@ int sharpsl_pm_pxa_read_max1111(int channel)
177 if (machine_is_tosa()) 178 if (machine_is_tosa())
178 return 0; 179 return 0;
179 180
180 extern int max1111_read_channel(int);
181
182 /* max1111 accepts channels from 0-3, however, 181 /* max1111 accepts channels from 0-3, however,
183 * it is encoded from 0-7 here in the code. 182 * it is encoded from 0-7 here in the code.
184 */ 183 */
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 34cbdac51525..438f02fe122a 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -172,10 +172,9 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
172static unsigned long spitz_charger_wakeup(void) 172static unsigned long spitz_charger_wakeup(void)
173{ 173{
174 unsigned long ret; 174 unsigned long ret;
175 ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT) 175 ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
176 << GPIO_bit(SPITZ_GPIO_KEY_INT)) 176 << GPIO_bit(SPITZ_GPIO_KEY_INT))
177 | (!gpio_get_value(SPITZ_GPIO_SYNC) 177 | gpio_get_value(SPITZ_GPIO_SYNC));
178 << GPIO_bit(SPITZ_GPIO_SYNC));
179 return ret; 178 return ret;
180} 179}
181 180
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
index db8a98ac68c5..0c1eb1dfc534 100644
--- a/arch/arm/mach-s3c2440/common.h
+++ b/arch/arm/mach-s3c2440/common.h
@@ -12,6 +12,6 @@
12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H 12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
13#define __ARCH_ARM_MACH_S3C2440_COMMON_H 13#define __ARCH_ARM_MACH_S3C2440_COMMON_H
14 14
15void s3c2440_restart(char mode, const char *cmd); 15void s3c244x_restart(char mode, const char *cmd);
16 16
17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ 17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 24569550de1a..19b577bc09b8 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
487 .init_machine = anubis_init, 487 .init_machine = anubis_init,
488 .init_irq = s3c24xx_init_irq, 488 .init_irq = s3c24xx_init_irq,
489 .timer = &s3c24xx_timer, 489 .timer = &s3c24xx_timer,
490 .restart = s3c2440_restart, 490 .restart = s3c244x_restart,
491MACHINE_END 491MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index d6a9763110cd..d7ae49c90118 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
222 .init_machine = at2440evb_init, 222 .init_machine = at2440evb_init,
223 .init_irq = s3c24xx_init_irq, 223 .init_irq = s3c24xx_init_irq,
224 .timer = &s3c24xx_timer, 224 .timer = &s3c24xx_timer,
225 .restart = s3c2440_restart, 225 .restart = s3c244x_restart,
226MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 5859e609d28c..9a4a5bc008e6 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
601 .init_irq = s3c24xx_init_irq, 601 .init_irq = s3c24xx_init_irq,
602 .init_machine = gta02_machine_init, 602 .init_machine = gta02_machine_init,
603 .timer = &s3c24xx_timer, 603 .timer = &s3c24xx_timer,
604 .restart = s3c2440_restart, 604 .restart = s3c244x_restart,
605MACHINE_END 605MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index adbbb85bc4cd..5d66fb218a41 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
701 .init_machine = mini2440_init, 701 .init_machine = mini2440_init,
702 .init_irq = s3c24xx_init_irq, 702 .init_irq = s3c24xx_init_irq,
703 .timer = &s3c24xx_timer, 703 .timer = &s3c24xx_timer,
704 .restart = s3c2440_restart, 704 .restart = s3c244x_restart,
705MACHINE_END 705MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 40eaf844bc1f..5198e3e1c5be 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
158 .init_machine = nexcoder_init, 158 .init_machine = nexcoder_init,
159 .init_irq = s3c24xx_init_irq, 159 .init_irq = s3c24xx_init_irq,
160 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2440_restart, 161 .restart = s3c244x_restart,
162MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 4c480ef734f6..c5daeb612a88 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
436 .init_irq = s3c24xx_init_irq, 436 .init_irq = s3c24xx_init_irq,
437 .init_machine = osiris_init, 437 .init_machine = osiris_init,
438 .timer = &s3c24xx_timer, 438 .timer = &s3c24xx_timer,
439 .restart = s3c2440_restart, 439 .restart = s3c244x_restart,
440MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 80077f6472ee..6f68abf44fab 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
822 .init_irq = s3c24xx_init_irq, 822 .init_irq = s3c24xx_init_irq,
823 .init_machine = rx1950_init_machine, 823 .init_machine = rx1950_init_machine,
824 .timer = &s3c24xx_timer, 824 .timer = &s3c24xx_timer,
825 .restart = s3c2440_restart, 825 .restart = s3c244x_restart,
826MACHINE_END 826MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 20103bafbd4b..56af35447598 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
213 .init_irq = rx3715_init_irq, 213 .init_irq = rx3715_init_irq,
214 .init_machine = rx3715_init_machine, 214 .init_machine = rx3715_init_machine,
215 .timer = &s3c24xx_timer, 215 .timer = &s3c24xx_timer,
216 .restart = s3c2440_restart, 216 .restart = s3c244x_restart,
217MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 1deb60d12a60..83a1036d7dcb 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
183 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
184 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
185 .timer = &s3c24xx_timer, 185 .timer = &s3c24xx_timer,
186 .restart = s3c2440_restart, 186 .restart = s3c244x_restart,
187MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 517623a09fc5..2b3dddb49af7 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,7 +35,6 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/s3c244x.h> 36#include <plat/s3c244x.h>
37#include <plat/pm.h> 37#include <plat/pm.h>
38#include <plat/watchdog-reset.h>
39 38
40#include <plat/gpio-core.h> 39#include <plat/gpio-core.h>
41#include <plat/gpio-cfg.h> 40#include <plat/gpio-cfg.h>
@@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
74 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; 73 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
75 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; 74 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
76} 75}
77
78void s3c2440_restart(char mode, const char *cmd)
79{
80 if (mode == 's') {
81 soft_restart(0);
82 }
83
84 arch_wdt_reset();
85
86 /* we'll take a jump through zero as a poor second */
87 soft_restart(0);
88}
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 36bc60f61d0a..d15852f642b7 100644
--- a/arch/arm/mach-s3c2440/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -46,6 +46,7 @@
46#include <plat/pm.h> 46#include <plat/pm.h>
47#include <plat/pll.h> 47#include <plat/pll.h>
48#include <plat/nand-core.h> 48#include <plat/nand-core.h>
49#include <plat/watchdog-reset.h>
49 50
50static struct map_desc s3c244x_iodesc[] __initdata = { 51static struct map_desc s3c244x_iodesc[] __initdata = {
51 IODESC_ENT(CLKPWR), 52 IODESC_ENT(CLKPWR),
@@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
196 .suspend = s3c244x_suspend, 197 .suspend = s3c244x_suspend,
197 .resume = s3c244x_resume, 198 .resume = s3c244x_resume,
198}; 199};
200
201void s3c244x_restart(char mode, const char *cmd)
202{
203 if (mode == 's')
204 soft_restart(0);
205
206 arch_wdt_reset();
207
208 /* we'll take a jump through zero as a poor second */
209 soft_restart(0);
210}
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 52af00446a63..c59e8b892d6b 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -5,7 +5,7 @@ config UX500_SOC_COMMON
5 default y 5 default y
6 select ARM_GIC 6 select ARM_GIC
7 select HAS_MTU 7 select HAS_MTU
8 select ARM_ERRATA_753970 8 select PL310_ERRATA_753970
9 select ARM_ERRATA_754322 9 select ARM_ERRATA_754322
10 select ARM_ERRATA_764369 10 select ARM_ERRATA_764369
11 11
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 9b3d0fbaee72..88c3ba151e87 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
7 select ARM_GIC 7 select ARM_GIC
8 select ARM_ERRATA_720789 8 select ARM_ERRATA_720789
9 select ARM_ERRATA_751472 9 select ARM_ERRATA_751472
10 select ARM_ERRATA_753970 10 select PL310_ERRATA_753970
11 select HAVE_SMP 11 select HAVE_SMP
12 select MIGHT_HAVE_CACHE_L2X0 12 select MIGHT_HAVE_CACHE_L2X0
13 13
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0404ccbb8aa3..f1c8486f7501 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -230,9 +230,7 @@ __v7_setup:
230 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 230 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
231#endif 231#endif
232#ifdef CONFIG_ARM_ERRATA_743622 232#ifdef CONFIG_ARM_ERRATA_743622
233 teq r6, #0x20 @ present in r2p0 233 teq r5, #0x00200000 @ only present in r2p*
234 teqne r6, #0x21 @ present in r2p1
235 teqne r6, #0x22 @ present in r2p2
236 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register 234 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
237 orreq r10, r10, #1 << 6 @ set bit #6 235 orreq r10, r10, #1 << 6 @ set bit #6
238 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 236 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 06383b51e655..4de7d1e79e73 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -69,6 +69,7 @@ void __init omap_reserve(void)
69 omap_vram_reserve_sdram_memblock(); 69 omap_vram_reserve_sdram_memblock();
70 omap_dsp_reserve_sdram_memblock(); 70 omap_dsp_reserve_sdram_memblock();
71 omap_secure_ram_reserve_memblock(); 71 omap_secure_ram_reserve_memblock();
72 omap_barrier_reserve_memblock();
72} 73}
73 74
74void __init omap_init_consistent_dma_size(void) 75void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 2efd6454bce0..37bbbbb981b2 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,8 +428,16 @@
428#define OMAP_GPMC_NR_IRQS 8 428#define OMAP_GPMC_NR_IRQS 8
429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) 429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
430 430
431/* PRCM IRQ handler */
432#ifdef CONFIG_ARCH_OMAP2PLUS
433#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
434#define OMAP_PRCM_NR_IRQS 64
435#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
436#else
437#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
438#endif
431 439
432#define NR_IRQS OMAP_GPMC_IRQ_END 440#define NR_IRQS OMAP_PRCM_IRQ_END
433 441
434#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) 442#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
435 443
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
index 3047ff923a63..8c7994ce9869 100644
--- a/arch/arm/plat-omap/include/plat/omap-secure.h
+++ b/arch/arm/plat-omap/include/plat/omap-secure.h
@@ -10,4 +10,10 @@ static inline void omap_secure_ram_reserve_memblock(void)
10{ } 10{ }
11#endif 11#endif
12 12
13#ifdef CONFIG_OMAP4_ERRATA_I688
14extern int omap_barrier_reserve_memblock(void);
15#else
16static inline void omap_barrier_reserve_memblock(void)
17{ }
18#endif
13#endif /* __OMAP_SECURE_H__ */ 19#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 9fe35348e03b..2bab4c99a234 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
1249 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1; 1249 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
1250 int channel; 1250 int channel;
1251 1251
1252 for (channel = dma_channels - 1; channel >= 0; cp++, channel--) 1252 for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
1253 s3c2410_dma_resume_chan(cp); 1253 s3c2410_dma_resume_chan(cp);
1254} 1254}
1255 1255
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index f10768e988d4..d21d744e4d99 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1409,7 +1409,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1409 1409
1410#ifdef CONFIG_S3C_DEV_USB_HSOTG 1410#ifdef CONFIG_S3C_DEV_USB_HSOTG
1411static struct resource s3c_usb_hsotg_resources[] = { 1411static struct resource s3c_usb_hsotg_resources[] = {
1412 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K), 1412 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1413 [1] = DEFINE_RES_IRQ(IRQ_OTG), 1413 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1414}; 1414};
1415 1415
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 0c77e4298675..abb5bdecd509 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
145static int clockevent_next_event(unsigned long cycles, 145static int clockevent_next_event(unsigned long cycles,
146 struct clock_event_device *clk_event_dev) 146 struct clock_event_device *clk_event_dev)
147{ 147{
148 u16 val; 148 u16 val = readw(gpt_base + CR(CLKEVT));
149
150 if (val & CTRL_ENABLE)
151 writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
149 152
150 writew(cycles, gpt_base + LOAD(CLKEVT)); 153 writew(cycles, gpt_base + LOAD(CLKEVT));
151 154
152 val = readw(gpt_base + CR(CLKEVT));
153 val |= CTRL_ENABLE | CTRL_INT_ENABLE; 155 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
154 writew(val, gpt_base + CR(CLKEVT)); 156 writew(val, gpt_base + CR(CLKEVT));
155 157
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 06:20:17 -0500