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authorOlof Johansson <olof@lixom.net>2012-11-21 01:21:32 -0500
committerOlof Johansson <olof@lixom.net>2012-11-21 01:21:32 -0500
commita93d620159524088d9633f60a8f746e3dd2e791e (patch)
tree09da5c10d18adc2b27ee88dcf5673e92d49b4043 /arch/arm
parent2cad6a8a4c31175578943f087e1dbef9f52e6ec3 (diff)
parent2a5528912d15a4db760c5eb7fa3e1efdd5c87371 (diff)
Merge branch 'clps711x/soc' into clps711x/soc2
Conflicts: arch/arm/Kconfig Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/configs/clps711x_defconfig78
-rw-r--r--arch/arm/configs/edb7211_defconfig27
-rw-r--r--arch/arm/configs/fortunet_defconfig28
-rw-r--r--arch/arm/mach-clps711x/Makefile2
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c15
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c4
-rw-r--r--arch/arm/mach-clps711x/common.c113
-rw-r--r--arch/arm/mach-clps711x/edb7211-mm.c82
-rw-r--r--arch/arm/mach-clps711x/edb7211.c (renamed from arch/arm/mach-clps711x/edb7211-arch.c)58
-rw-r--r--arch/arm/mach-clps711x/include/mach/autcpu12.h14
-rw-r--r--arch/arm/mach-clps711x/include/mach/clps711x.h3
-rw-r--r--arch/arm/mach-clps711x/include/mach/hardware.h56
-rw-r--r--arch/arm/mach-clps711x/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-clps711x/include/mach/syspld.h9
-rw-r--r--arch/arm/mach-clps711x/p720t.c18
16 files changed, 223 insertions, 289 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f456cf4ae3ca..e63e3eee13ce 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -369,6 +369,7 @@ config ARCH_CLPS711X
369 select CLKDEV_LOOKUP 369 select CLKDEV_LOOKUP
370 select COMMON_CLK 370 select COMMON_CLK
371 select CPU_ARM720T 371 select CPU_ARM720T
372 select GENERIC_CLOCKEVENTS
372 select NEED_MACH_MEMORY_H 373 select NEED_MACH_MEMORY_H
373 help 374 help
374 Support for Cirrus Logic 711x/721x/731x based boards. 375 Support for Cirrus Logic 711x/721x/731x based boards.
diff --git a/arch/arm/configs/clps711x_defconfig b/arch/arm/configs/clps711x_defconfig
new file mode 100644
index 000000000000..86209d175b9c
--- /dev/null
+++ b/arch/arm/configs/clps711x_defconfig
@@ -0,0 +1,78 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_BLK_DEV_INITRD=y
5CONFIG_EMBEDDED=y
6CONFIG_PARTITION_ADVANCED=y
7# CONFIG_MSDOS_PARTITION is not set
8CONFIG_ARCH_CLPS711X=y
9CONFIG_ARCH_AUTCPU12=y
10CONFIG_ARCH_CDB89712=y
11CONFIG_ARCH_CLEP7312=y
12CONFIG_ARCH_EDB7211=y
13CONFIG_ARCH_P720T=y
14CONFIG_ARCH_FORTUNET=y
15CONFIG_ZBOOT_ROM_TEXT=0x0
16CONFIG_ZBOOT_ROM_BSS=0x0
17CONFIG_NET=y
18CONFIG_PACKET=y
19CONFIG_UNIX=y
20CONFIG_INET=y
21# CONFIG_IPV6 is not set
22CONFIG_IRDA=y
23CONFIG_IRTTY_SIR=y
24CONFIG_EP7211_DONGLE=y
25CONFIG_MTD=y
26CONFIG_MTD_CMDLINE_PARTS=y
27CONFIG_MTD_CHAR=y
28CONFIG_MTD_BLOCK=y
29CONFIG_MTD_CFI=y
30CONFIG_MTD_JEDECPROBE=y
31CONFIG_MTD_CFI_INTELEXT=y
32CONFIG_MTD_CFI_AMDSTD=y
33CONFIG_MTD_CFI_STAA=y
34CONFIG_MTD_CDB89712=y
35CONFIG_MTD_AUTCPU12=y
36CONFIG_MTD_PLATRAM=y
37CONFIG_BLK_DEV_RAM=y
38CONFIG_NETDEVICES=y
39# CONFIG_NET_VENDOR_3COM is not set
40# CONFIG_NET_VENDOR_AMD is not set
41# CONFIG_NET_VENDOR_BROADCOM is not set
42# CONFIG_NET_VENDOR_CHELSIO is not set
43CONFIG_CS89x0=y
44# CONFIG_NET_VENDOR_FARADAY is not set
45# CONFIG_NET_VENDOR_FUJITSU is not set
46# CONFIG_NET_VENDOR_HP is not set
47# CONFIG_NET_VENDOR_INTEL is not set
48# CONFIG_NET_VENDOR_MARVELL is not set
49# CONFIG_NET_VENDOR_MICREL is not set
50# CONFIG_NET_VENDOR_NATSEMI is not set
51# CONFIG_NET_VENDOR_RACAL is not set
52# CONFIG_NET_VENDOR_SEEQ is not set
53# CONFIG_NET_VENDOR_SMSC is not set
54# CONFIG_NET_VENDOR_STMICRO is not set
55# CONFIG_NET_VENDOR_WIZNET is not set
56# CONFIG_WLAN is not set
57# CONFIG_INPUT is not set
58# CONFIG_SERIO is not set
59# CONFIG_VT is not set
60CONFIG_SERIAL_CLPS711X_CONSOLE=y
61# CONFIG_HW_RANDOM is not set
62# CONFIG_HWMON is not set
63CONFIG_FB=y
64CONFIG_FB_CLPS711X=y
65# CONFIG_USB_SUPPORT is not set
66CONFIG_NEW_LEDS=y
67CONFIG_LEDS_CLASS=y
68# CONFIG_IOMMU_SUPPORT is not set
69CONFIG_EXT2_FS=y
70CONFIG_MINIX_FS=y
71# CONFIG_NETWORK_FILESYSTEMS is not set
72# CONFIG_FTRACE is not set
73CONFIG_DEBUG_USER=y
74CONFIG_DEBUG_LL=y
75CONFIG_EARLY_PRINTK=y
76# CONFIG_CRYPTO_ANSI_CPRNG is not set
77# CONFIG_CRYPTO_HW is not set
78# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/edb7211_defconfig b/arch/arm/configs/edb7211_defconfig
deleted file mode 100644
index d52ded350a12..000000000000
--- a/arch/arm/configs/edb7211_defconfig
+++ /dev/null
@@ -1,27 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_BLK_DEV_INITRD=y
5CONFIG_EXPERT=y
6# CONFIG_HOTPLUG is not set
7CONFIG_ARCH_CLPS711X=y
8CONFIG_ARCH_EDB7211=y
9CONFIG_ZBOOT_ROM_TEXT=0x0
10CONFIG_ZBOOT_ROM_BSS=0x0
11CONFIG_NET=y
12CONFIG_PACKET=y
13CONFIG_UNIX=y
14CONFIG_INET=y
15# CONFIG_IPV6 is not set
16CONFIG_BLK_DEV_RAM=y
17CONFIG_NETDEVICES=y
18# CONFIG_INPUT is not set
19CONFIG_SERIO_LIBPS2=y
20# CONFIG_VT is not set
21CONFIG_SERIAL_CLPS711X=y
22CONFIG_SERIAL_CLPS711X_CONSOLE=y
23CONFIG_EXT2_FS=y
24CONFIG_MINIX_FS=y
25CONFIG_PARTITION_ADVANCED=y
26# CONFIG_MSDOS_PARTITION is not set
27CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/fortunet_defconfig b/arch/arm/configs/fortunet_defconfig
deleted file mode 100644
index 840fced7529f..000000000000
--- a/arch/arm/configs/fortunet_defconfig
+++ /dev/null
@@ -1,28 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_BLK_DEV_INITRD=y
5CONFIG_EXPERT=y
6# CONFIG_HOTPLUG is not set
7CONFIG_ARCH_CLPS711X=y
8CONFIG_ARCH_FORTUNET=y
9# CONFIG_ARM_THUMB is not set
10CONFIG_ZBOOT_ROM_TEXT=0x0
11CONFIG_ZBOOT_ROM_BSS=0x0
12CONFIG_FPE_FASTFPE=y
13CONFIG_BINFMT_AOUT=y
14CONFIG_NET=y
15CONFIG_UNIX=y
16CONFIG_MTD=y
17CONFIG_MTD_CHAR=y
18CONFIG_MTD_BLOCK=y
19CONFIG_MTD_CFI=y
20CONFIG_MTD_CFI_INTELEXT=y
21CONFIG_BLK_DEV_RAM=y
22# CONFIG_INPUT is not set
23# CONFIG_SERIO is not set
24# CONFIG_VT is not set
25CONFIG_SERIAL_CLPS711X=y
26CONFIG_SERIAL_CLPS711X_CONSOLE=y
27CONFIG_EXT2_FS=y
28CONFIG_DEBUG_USER=y
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 6da6940b3656..9cf2d1c6a548 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -12,6 +12,6 @@ obj- :=
12obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o 12obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
13obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o 13obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
14obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o 14obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
15obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o 15obj-$(CONFIG_ARCH_EDB7211) += edb7211.o
16obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o 16obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
17obj-$(CONFIG_ARCH_P720T) += p720t.o 17obj-$(CONFIG_ARCH_P720T) += p720t.o
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 32871918bb6e..214547b5c51f 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -39,19 +39,10 @@
39 39
40#include "common.h" 40#include "common.h"
41 41
42/*
43 * The on-chip registers are given a size of 1MB so that a section can
44 * be used to map them; this saves a page table. This is the place to
45 * add mappings for ROM, expansion memory, PCMCIA, etc. (if static
46 * mappings are chosen for those areas).
47 *
48*/
49
50static struct map_desc autcpu12_io_desc[] __initdata = { 42static struct map_desc autcpu12_io_desc[] __initdata = {
51 /* memory-mapped extra io and CS8900A Ethernet chip */ 43 /* Memory-mapped extra io and CS8900A Ethernet chip */
52 /* ethernet chip */ 44 {
53 { 45 .virtual = IO_ADDRESS(AUTCPU12_PHYS_CS8900A),
54 .virtual = AUTCPU12_VIRT_CS8900A,
55 .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), 46 .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
56 .length = SZ_1M, 47 .length = SZ_1M,
57 .type = MT_DEVICE 48 .type = MT_DEVICE
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index c314f49d6ef6..d90d25c67ac2 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -40,8 +40,8 @@
40 */ 40 */
41static struct map_desc cdb89712_io_desc[] __initdata = { 41static struct map_desc cdb89712_io_desc[] __initdata = {
42 { 42 {
43 .virtual = ETHER_BASE, 43 .virtual = IO_ADDRESS(ETHER_PHYS_BASE),
44 .pfn =__phys_to_pfn(ETHER_START), 44 .pfn = __phys_to_pfn(ETHER_PHYS_BASE),
45 .length = ETHER_SIZE, 45 .length = ETHER_SIZE,
46 .type = MT_DEVICE 46 .type = MT_DEVICE
47 } 47 }
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 509243d89a32..286d6e6d5f5a 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -21,13 +21,14 @@
21 */ 21 */
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/sizes.h>
24#include <linux/interrupt.h> 25#include <linux/interrupt.h>
25#include <linux/irq.h> 26#include <linux/irq.h>
26#include <linux/clk.h> 27#include <linux/clk.h>
27#include <linux/clkdev.h> 28#include <linux/clkdev.h>
29#include <linux/clockchips.h>
28#include <linux/clk-provider.h> 30#include <linux/clk-provider.h>
29 31
30#include <asm/sizes.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/mach/time.h> 33#include <asm/mach/time.h>
33#include <asm/system_misc.h> 34#include <asm/system_misc.h>
@@ -36,7 +37,6 @@
36 37
37static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh, 38static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh,
38 *clk_tint, *clk_spi; 39 *clk_tint, *clk_spi;
39static unsigned long latch;
40 40
41/* 41/*
42 * This maps the generic CLPS711x registers 42 * This maps the generic CLPS711x registers
@@ -45,7 +45,7 @@ static struct map_desc clps711x_io_desc[] __initdata = {
45 { 45 {
46 .virtual = (unsigned long)CLPS711X_VIRT_BASE, 46 .virtual = (unsigned long)CLPS711X_VIRT_BASE,
47 .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE), 47 .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE),
48 .length = SZ_1M, 48 .length = SZ_64K,
49 .type = MT_DEVICE 49 .type = MT_DEVICE
50 } 50 }
51}; 51};
@@ -66,6 +66,10 @@ static void int1_mask(struct irq_data *d)
66 66
67static void int1_ack(struct irq_data *d) 67static void int1_ack(struct irq_data *d)
68{ 68{
69}
70
71static void int1_eoi(struct irq_data *d)
72{
69 switch (d->irq) { 73 switch (d->irq) {
70 case IRQ_CSINT: clps_writel(0, COEOI); break; 74 case IRQ_CSINT: clps_writel(0, COEOI); break;
71 case IRQ_TC1OI: clps_writel(0, TC1EOI); break; 75 case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
@@ -86,7 +90,9 @@ static void int1_unmask(struct irq_data *d)
86} 90}
87 91
88static struct irq_chip int1_chip = { 92static struct irq_chip int1_chip = {
93 .name = "Interrupt Vector 1 ",
89 .irq_ack = int1_ack, 94 .irq_ack = int1_ack,
95 .irq_eoi = int1_eoi,
90 .irq_mask = int1_mask, 96 .irq_mask = int1_mask,
91 .irq_unmask = int1_unmask, 97 .irq_unmask = int1_unmask,
92}; 98};
@@ -102,6 +108,10 @@ static void int2_mask(struct irq_data *d)
102 108
103static void int2_ack(struct irq_data *d) 109static void int2_ack(struct irq_data *d)
104{ 110{
111}
112
113static void int2_eoi(struct irq_data *d)
114{
105 switch (d->irq) { 115 switch (d->irq) {
106 case IRQ_KBDINT: clps_writel(0, KBDEOI); break; 116 case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
107 } 117 }
@@ -117,73 +127,93 @@ static void int2_unmask(struct irq_data *d)
117} 127}
118 128
119static struct irq_chip int2_chip = { 129static struct irq_chip int2_chip = {
130 .name = "Interrupt Vector 2 ",
120 .irq_ack = int2_ack, 131 .irq_ack = int2_ack,
132 .irq_eoi = int2_eoi,
121 .irq_mask = int2_mask, 133 .irq_mask = int2_mask,
122 .irq_unmask = int2_unmask, 134 .irq_unmask = int2_unmask,
123}; 135};
124 136
137struct clps711x_irqdesc {
138 int nr;
139 struct irq_chip *chip;
140 irq_flow_handler_t handle;
141};
142
143static struct clps711x_irqdesc clps711x_irqdescs[] __initdata = {
144 { IRQ_CSINT, &int1_chip, handle_fasteoi_irq, },
145 { IRQ_EINT1, &int1_chip, handle_level_irq, },
146 { IRQ_EINT2, &int1_chip, handle_level_irq, },
147 { IRQ_EINT3, &int1_chip, handle_level_irq, },
148 { IRQ_TC1OI, &int1_chip, handle_fasteoi_irq, },
149 { IRQ_TC2OI, &int1_chip, handle_fasteoi_irq, },
150 { IRQ_RTCMI, &int1_chip, handle_fasteoi_irq, },
151 { IRQ_TINT, &int1_chip, handle_fasteoi_irq, },
152 { IRQ_UTXINT1, &int1_chip, handle_level_irq, },
153 { IRQ_URXINT1, &int1_chip, handle_level_irq, },
154 { IRQ_UMSINT, &int1_chip, handle_fasteoi_irq, },
155 { IRQ_SSEOTI, &int1_chip, handle_level_irq, },
156 { IRQ_KBDINT, &int2_chip, handle_fasteoi_irq, },
157 { IRQ_SS2RX, &int2_chip, handle_level_irq, },
158 { IRQ_SS2TX, &int2_chip, handle_level_irq, },
159 { IRQ_UTXINT2, &int2_chip, handle_level_irq, },
160 { IRQ_URXINT2, &int2_chip, handle_level_irq, },
161};
162
125void __init clps711x_init_irq(void) 163void __init clps711x_init_irq(void)
126{ 164{
127 unsigned int i; 165 unsigned int i;
128 166
129 for (i = 0; i < NR_IRQS; i++) { 167 /* Disable interrupts */
130 if (INT1_IRQS & (1 << i)) {
131 irq_set_chip_and_handler(i, &int1_chip,
132 handle_level_irq);
133 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
134 }
135 if (INT2_IRQS & (1 << i)) {
136 irq_set_chip_and_handler(i, &int2_chip,
137 handle_level_irq);
138 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
139 }
140 }
141
142 /*
143 * Disable interrupts
144 */
145 clps_writel(0, INTMR1); 168 clps_writel(0, INTMR1);
146 clps_writel(0, INTMR2); 169 clps_writel(0, INTMR2);
170 clps_writel(0, INTMR3);
147 171
148 /* 172 /* Clear down any pending interrupts */
149 * Clear down any pending interrupts 173 clps_writel(0, BLEOI);
150 */ 174 clps_writel(0, MCEOI);
151 clps_writel(0, COEOI); 175 clps_writel(0, COEOI);
152 clps_writel(0, TC1EOI); 176 clps_writel(0, TC1EOI);
153 clps_writel(0, TC2EOI); 177 clps_writel(0, TC2EOI);
154 clps_writel(0, RTCEOI); 178 clps_writel(0, RTCEOI);
155 clps_writel(0, TEOI); 179 clps_writel(0, TEOI);
156 clps_writel(0, UMSEOI); 180 clps_writel(0, UMSEOI);
157 clps_writel(0, SYNCIO);
158 clps_writel(0, KBDEOI); 181 clps_writel(0, KBDEOI);
182 clps_writel(0, SRXEOF);
183 clps_writel(0xffffffff, DAISR);
184
185 for (i = 0; i < ARRAY_SIZE(clps711x_irqdescs); i++) {
186 irq_set_chip_and_handler(clps711x_irqdescs[i].nr,
187 clps711x_irqdescs[i].chip,
188 clps711x_irqdescs[i].handle);
189 set_irq_flags(clps711x_irqdescs[i].nr,
190 IRQF_VALID | IRQF_PROBE);
191 }
159} 192}
160 193
161/* 194static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
162 * gettimeoffset() returns time since last timer tick, in usecs. 195 struct clock_event_device *evt)
163 *
164 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
165 * 'tick' is usecs per jiffy.
166 */
167static unsigned long clps711x_gettimeoffset(void)
168{ 196{
169 unsigned long hwticks;
170 hwticks = latch - (clps_readl(TC2D) & 0xffff);
171 return (hwticks * (tick_nsec / 1000)) / latch;
172} 197}
173 198
174/* 199static struct clock_event_device clockevent_clps711x = {
175 * IRQ handler for the timer 200 .name = "CLPS711x Clockevents",
176 */ 201 .rating = 300,
177static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id) 202 .features = CLOCK_EVT_FEAT_PERIODIC,
203 .set_mode = clps711x_clockevent_set_mode,
204};
205
206static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
178{ 207{
179 timer_tick(); 208 clockevent_clps711x.event_handler(&clockevent_clps711x);
209
180 return IRQ_HANDLED; 210 return IRQ_HANDLED;
181} 211}
182 212
183static struct irqaction clps711x_timer_irq = { 213static struct irqaction clps711x_timer_irq = {
184 .name = "CLPS711x Timer Tick", 214 .name = "CLPS711x Timer Tick",
185 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 215 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
186 .handler = p720t_timer_interrupt, 216 .handler = clps711x_timer_interrupt,
187}; 217};
188 218
189static void add_fixed_clk(struct clk *clk, const char *name, int rate) 219static void add_fixed_clk(struct clk *clk, const char *name, int rate)
@@ -244,20 +274,19 @@ static void __init clps711x_timer_init(void)
244 274
245 pr_info("CPU frequency set at %i Hz.\n", cpu); 275 pr_info("CPU frequency set at %i Hz.\n", cpu);
246 276
247 latch = (timh + HZ / 2) / HZ; 277 clps_writew(DIV_ROUND_CLOSEST(timh, HZ), TC2D);
248 278
249 tmp = clps_readl(SYSCON1); 279 tmp = clps_readl(SYSCON1);
250 tmp |= SYSCON1_TC2S | SYSCON1_TC2M; 280 tmp |= SYSCON1_TC2S | SYSCON1_TC2M;
251 clps_writel(tmp, SYSCON1); 281 clps_writel(tmp, SYSCON1);
252 282
253 clps_writel(latch - 1, TC2D); 283 clockevents_config_and_register(&clockevent_clps711x, timh, 1, 0xffff);
254 284
255 setup_irq(IRQ_TC2OI, &clps711x_timer_irq); 285 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
256} 286}
257 287
258struct sys_timer clps711x_timer = { 288struct sys_timer clps711x_timer = {
259 .init = clps711x_timer_init, 289 .init = clps711x_timer_init,
260 .offset = clps711x_gettimeoffset,
261}; 290};
262 291
263void clps711x_restart(char mode, const char *cmd) 292void clps711x_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c
deleted file mode 100644
index 4372f06c9929..000000000000
--- a/arch/arm/mach-clps711x/edb7211-mm.c
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps711x/mm.c
3 *
4 * Extra MM routines for the EDB7211 board
5 *
6 * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/bug.h>
25
26#include <mach/hardware.h>
27#include <asm/page.h>
28#include <asm/sizes.h>
29
30#include <asm/mach/map.h>
31
32extern void clps711x_map_io(void);
33
34/*
35 * The on-chip registers are given a size of 1MB so that a section can
36 * be used to map them; this saves a page table. This is the place to
37 * add mappings for ROM, expansion memory, PCMCIA, etc. (if static
38 * mappings are chosen for those areas).
39 *
40 * Here is a physical memory map (to be fleshed out later):
41 *
42 * Physical Address Size Description
43 * ----------------- ----- ---------------------------------
44 * c0000000-c001ffff 128KB reserved for video RAM [1]
45 * c0020000-c0023fff 16KB parameters (see Documentation/arm/Setup)
46 * c0024000-c0027fff 16KB swapper_pg_dir (task 0 page directory)
47 * c0028000-... kernel image (TEXTADDR)
48 *
49 * [1] Unused pages should be given back to the VM; they are not yet.
50 * The parameter block should also be released (not sure if this
51 * happens).
52 */
53static struct map_desc edb7211_io_desc[] __initdata = {
54 { /* memory-mapped extra keyboard row */
55 .virtual = EP7211_VIRT_EXTKBD,
56 .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
57 .length = SZ_1M,
58 .type = MT_DEVICE,
59 }, { /* and CS8900A Ethernet chip */
60 .virtual = EP7211_VIRT_CS8900A,
61 .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
62 .length = SZ_1M,
63 .type = MT_DEVICE,
64 }, { /* flash banks */
65 .virtual = EP7211_VIRT_FLASH1,
66 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
67 .length = SZ_8M,
68 .type = MT_DEVICE,
69 }, {
70 .virtual = EP7211_VIRT_FLASH2,
71 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
72 .length = SZ_8M,
73 .type = MT_DEVICE,
74 }
75};
76
77void __init edb7211_map_io(void)
78{
79 clps711x_map_io();
80 iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
81}
82
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211.c
index 5fad0b4f40ad..88f46908de24 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211.c
@@ -1,39 +1,61 @@
1/* 1/*
2 * linux/arch/arm/mach-clps711x/arch-edb7211.c
3 *
4 * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. 2 * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved.
5 * 3 *
6 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or 6 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version. 7 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 8 */
9
20#include <linux/init.h> 10#include <linux/init.h>
21#include <linux/memblock.h> 11#include <linux/memblock.h>
22#include <linux/types.h> 12#include <linux/types.h>
23#include <linux/string.h>
24 13
25#include <asm/setup.h> 14#include <asm/setup.h>
26#include <asm/mach-types.h> 15#include <asm/mach/map.h>
27#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
17#include <asm/mach-types.h>
18
19#include <mach/hardware.h>
28 20
29#include "common.h" 21#include "common.h"
30 22
31extern void edb7211_map_io(void); 23#define VIDEORAM_SIZE SZ_128K
24
25static struct map_desc edb7211_io_desc[] __initdata = {
26 { /* Memory-mapped extra keyboard row */
27 .virtual = IO_ADDRESS(EP7211_PHYS_EXTKBD),
28 .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
29 .length = SZ_1M,
30 .type = MT_DEVICE,
31 }, { /* CS8900A Ethernet chip */
32 .virtual = IO_ADDRESS(EP7211_PHYS_CS8900A),
33 .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
34 .length = SZ_1M,
35 .type = MT_DEVICE,
36 }, { /* Flash bank 0 */
37 .virtual = IO_ADDRESS(EP7211_PHYS_FLASH1),
38 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
39 .length = SZ_8M,
40 .type = MT_DEVICE,
41 }, { /* Flash bank 1 */
42 .virtual = IO_ADDRESS(EP7211_PHYS_FLASH2),
43 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
44 .length = SZ_8M,
45 .type = MT_DEVICE,
46 },
47};
48
49void __init edb7211_map_io(void)
50{
51 clps711x_map_io();
52 iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
53}
32 54
33/* Reserve screen memory region at the start of main system memory. */ 55/* Reserve screen memory region at the start of main system memory. */
34static void __init edb7211_reserve(void) 56static void __init edb7211_reserve(void)
35{ 57{
36 memblock_reserve(PHYS_OFFSET, 0x00020000); 58 memblock_reserve(PHYS_OFFSET, VIDEORAM_SIZE);
37} 59}
38 60
39static void __init 61static void __init
@@ -48,15 +70,15 @@ fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
48 * not using that information yet. 70 * not using that information yet.
49 */ 71 */
50 mi->bank[0].start = 0xc0000000; 72 mi->bank[0].start = 0xc0000000;
51 mi->bank[0].size = 8*1024*1024; 73 mi->bank[0].size = SZ_8M;
52 mi->bank[1].start = 0xc1000000; 74 mi->bank[1].start = 0xc1000000;
53 mi->bank[1].size = 8*1024*1024; 75 mi->bank[1].size = SZ_8M;
54 mi->nr_banks = 2; 76 mi->nr_banks = 2;
55} 77}
56 78
57MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") 79MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
58 /* Maintainer: Jon McClintock */ 80 /* Maintainer: Jon McClintock */
59 .atag_offset = 0x20100, /* 0xc0000000 - 0xc001ffff can be video RAM */ 81 .atag_offset = VIDEORAM_SIZE + 0x100,
60 .fixup = fixup_edb7211, 82 .fixup = fixup_edb7211,
61 .map_io = edb7211_map_io, 83 .map_io = edb7211_map_io,
62 .reserve = edb7211_reserve, 84 .reserve = edb7211_reserve,
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index 1588a365f610..f95ce6f29119 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -20,12 +20,8 @@
20#ifndef __ASM_ARCH_AUTCPU12_H 20#ifndef __ASM_ARCH_AUTCPU12_H
21#define __ASM_ARCH_AUTCPU12_H 21#define __ASM_ARCH_AUTCPU12_H
22 22
23/* 23/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
24 * The CS8900A ethernet chip has its I/O registers wired to chip select 2 24#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE
25 * (nCS2). This is the mapping for it.
26 */
27#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */
28#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */
29 25
30/* 26/*
31 * The flash bank is wired to chip select 0 27 * The flash bank is wired to chip select 0
@@ -34,11 +30,9 @@
34 30
35/* offset for device specific information structure */ 31/* offset for device specific information structure */
36#define AUTCPU12_LCDINFO_OFFS (0x00010000) 32#define AUTCPU12_LCDINFO_OFFS (0x00010000)
37/* 33
38* Videomemory is the internal SRAM (CS 6) 34/* Videomemory in the internal SRAM (CS 6) */
39*/
40#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE 35#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE
41#define AUTCPU12_VIRT_VIDEO (0xfd000000)
42 36
43/* 37/*
44* All special IO's are tied to CS1 38* All special IO's are tied to CS1
diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h
index c82e21ca49c7..aee352c00a1f 100644
--- a/arch/arm/mach-clps711x/include/mach/clps711x.h
+++ b/arch/arm/mach-clps711x/include/mach/clps711x.h
@@ -257,6 +257,9 @@
257#define MEMCFG_BUS_WIDTH_16 (0) 257#define MEMCFG_BUS_WIDTH_16 (0)
258#define MEMCFG_BUS_WIDTH_8 (3) 258#define MEMCFG_BUS_WIDTH_8 (3)
259 259
260#define MEMCFG_SQAEN (1 << 6)
261#define MEMCFG_CLKENB (1 << 7)
262
260#define MEMCFG_WAITSTATE_8_3 (0 << 2) 263#define MEMCFG_WAITSTATE_8_3 (0 << 2)
261#define MEMCFG_WAITSTATE_7_3 (1 << 2) 264#define MEMCFG_WAITSTATE_7_3 (1 << 2)
262#define MEMCFG_WAITSTATE_6_3 (2 << 2) 265#define MEMCFG_WAITSTATE_6_3 (2 << 2)
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 8497775d6ee5..0a3df25ffea7 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -24,7 +24,10 @@
24 24
25#include <mach/clps711x.h> 25#include <mach/clps711x.h>
26 26
27#define CLPS711X_VIRT_BASE IOMEM(0xff000000) 27#define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \
28 (((x) >> 2) & 0x3c000000)))
29
30#define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE))
28 31
29#ifndef __ASSEMBLY__ 32#ifndef __ASSEMBLY__
30#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off)) 33#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off))
@@ -61,58 +64,25 @@
61#define CS7_PHYS_BASE (0x00000000) 64#define CS7_PHYS_BASE (0x00000000)
62#endif 65#endif
63 66
64#define SYSPLD_VIRT_BASE 0xfe000000
65#define SYSPLD_BASE SYSPLD_VIRT_BASE
66
67#if defined (CONFIG_ARCH_CDB89712) 67#if defined (CONFIG_ARCH_CDB89712)
68 68
69#define ETHER_START 0x20000000 69#define ETHER_PHYS_BASE CS2_PHYS_BASE
70#define ETHER_SIZE 0x1000 70#define ETHER_SIZE 0x1000
71#define ETHER_BASE 0xfe000000
72 71
73#endif 72#endif
74 73
75 74
76#if defined (CONFIG_ARCH_EDB7211) 75#if defined (CONFIG_ARCH_EDB7211)
77 76
78/* 77/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
79 * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) 78#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE
80 * and repeat across it. This is the mapping for it.
81 *
82 * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This
83 * was cause for much consternation and headscratching. This should probably
84 * be made a compile/run time kernel option.
85 */
86#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */
87
88#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */
89
90
91/*
92 * The CS8900A ethernet chip has its I/O registers wired to chip select 2
93 * (nCS2). This is the mapping for it.
94 *
95 * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This
96 * was cause for much consternation and headscratching. This should probably
97 * be made a compile/run time kernel option.
98 */
99#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */
100
101#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */
102 79
80/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
81#define EP7211_PHYS_CS8900A CS2_PHYS_BASE
103 82
104/* 83/* The two flash banks are wired to chip selects 0 and 1 */
105 * The two flash banks are wired to chip selects 0 and 1. This is the mapping 84#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE
106 * for them. 85#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE
107 *
108 * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
109 * in jumpered boot mode.
110 */
111#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
112#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
113
114#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */
115#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */
116 86
117#endif /* CONFIG_ARCH_EDB7211 */ 87#endif /* CONFIG_ARCH_EDB7211 */
118 88
diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h
index 14d215f8ca81..1ea56db2fd5f 100644
--- a/arch/arm/mach-clps711x/include/mach/irqs.h
+++ b/arch/arm/mach-clps711x/include/mach/irqs.h
@@ -34,8 +34,6 @@
34#define IRQ_UMSINT 14 34#define IRQ_UMSINT 14
35#define IRQ_SSEOTI 15 35#define IRQ_SSEOTI 15
36 36
37#define INT1_IRQS (0x0000fff0)
38
39/* 37/*
40 * Interrupts from INTSR2 38 * Interrupts from INTSR2
41 */ 39 */
@@ -45,6 +43,4 @@
45#define IRQ_UTXINT2 (16+12) /* bit 12 */ 43#define IRQ_UTXINT2 (16+12) /* bit 12 */
46#define IRQ_URXINT2 (16+13) /* bit 13 */ 44#define IRQ_URXINT2 (16+13) /* bit 13 */
47 45
48#define INT2_IRQS (0x30070000)
49
50#define NR_IRQS 30 46#define NR_IRQS 30
diff --git a/arch/arm/mach-clps711x/include/mach/syspld.h b/arch/arm/mach-clps711x/include/mach/syspld.h
index f7f4c1201898..9a433155bf58 100644
--- a/arch/arm/mach-clps711x/include/mach/syspld.h
+++ b/arch/arm/mach-clps711x/include/mach/syspld.h
@@ -23,14 +23,9 @@
23#define __ASM_ARCH_SYSPLD_H 23#define __ASM_ARCH_SYSPLD_H
24 24
25#define SYSPLD_PHYS_BASE (0x10000000) 25#define SYSPLD_PHYS_BASE (0x10000000)
26#define SYSPLD_VIRT_BASE IO_ADDRESS(SYSPLD_PHYS_BASE)
26 27
27#ifndef __ASSEMBLY__ 28#define SYSPLD_REG(type, off) (*(volatile type *)(SYSPLD_VIRT_BASE + (off)))
28#include <asm/types.h>
29
30#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off))
31#else
32#define SYSPLD_REG(type,off) (off)
33#endif
34 29
35#define PLD_INT SYSPLD_REG(u32, 0x000000) 30#define PLD_INT SYSPLD_REG(u32, 0x000000)
36#define PLD_INT_PENIRQ (1 << 5) 31#define PLD_INT_PENIRQ (1 << 5)
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index b752b586fc2f..dd8995027dd4 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -36,27 +36,19 @@
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include <mach/syspld.h> 37#include <mach/syspld.h>
38 38
39#include <asm/hardware/clps7111.h>
40
41#include "common.h" 39#include "common.h"
42 40
43/* 41/*
44 * Map the P720T system PLD. It occupies two address spaces: 42 * Map the P720T system PLD. It occupies two address spaces:
45 * SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000 43 * 0x10000000 and 0x10400000. We map both regions as one.
46 * We map both here.
47 */ 44 */
48static struct map_desc p720t_io_desc[] __initdata = { 45static struct map_desc p720t_io_desc[] __initdata = {
49 { 46 {
50 .virtual = SYSPLD_VIRT_BASE, 47 .virtual = SYSPLD_VIRT_BASE,
51 .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE), 48 .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
52 .length = SZ_1M, 49 .length = SZ_8M,
53 .type = MT_DEVICE 50 .type = MT_DEVICE,
54 }, { 51 },
55 .virtual = 0xfe400000,
56 .pfn = __phys_to_pfn(0x10400000),
57 .length = SZ_1M,
58 .type = MT_DEVICE
59 }
60}; 52};
61 53
62static void __init 54static void __init
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-07 15:32:07 -0400