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authorAlexandre Pereira da Silva <aletes.xgr@gmail.com>2012-07-01 15:06:45 -0400
committerRoland Stigge <stigge@antcom.de>2012-07-01 15:06:45 -0400
commita408e8f423e91a50727e7e85461cf7677d25ebf6 (patch)
tree712535d9cc03f5cec8437b516069f6edfe9be666 /arch/arm
parenta0a30b6a69275c54542130a8391e0fda30a4553b (diff)
ARM: LPC32xx: Cleanup USB clock init
Move most of usb clock initialization from lpc32xx_udc and ohci-nxp to clock.c. Also adds ohci clocks and otg clocks. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-lpc32xx/clock.c68
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/platform.h14
2 files changed, 81 insertions, 1 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index b64f98537b5d..8a4e7cb74ae1 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -739,14 +739,77 @@ static struct clk clk_rtc = {
739 .get_rate = local_return_parent_rate, 739 .get_rate = local_return_parent_rate,
740}; 740};
741 741
742static int local_usb_enable(struct clk *clk, int enable)
743{
744 u32 tmp;
745
746 if (enable) {
747 /* Set up I2C pull levels */
748 tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL);
749 tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE;
750 __raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL);
751 }
752
753 return local_onoff_enable(clk, enable);
754}
755
742static struct clk clk_usbd = { 756static struct clk clk_usbd = {
743 .parent = &clk_usbpll, 757 .parent = &clk_usbpll,
744 .enable = local_onoff_enable, 758 .enable = local_usb_enable,
745 .enable_reg = LPC32XX_CLKPWR_USB_CTRL, 759 .enable_reg = LPC32XX_CLKPWR_USB_CTRL,
746 .enable_mask = LPC32XX_CLKPWR_USBCTRL_HCLK_EN, 760 .enable_mask = LPC32XX_CLKPWR_USBCTRL_HCLK_EN,
747 .get_rate = local_return_parent_rate, 761 .get_rate = local_return_parent_rate,
748}; 762};
749 763
764#define OTG_ALWAYS_MASK (LPC32XX_USB_OTG_OTG_CLOCK_ON | \
765 LPC32XX_USB_OTG_I2C_CLOCK_ON)
766
767static int local_usb_otg_enable(struct clk *clk, int enable)
768{
769 int to = 1000;
770
771 if (enable) {
772 __raw_writel(clk->enable_mask, clk->enable_reg);
773
774 while (((__raw_readl(LPC32XX_USB_OTG_CLK_STAT) &
775 clk->enable_mask) != clk->enable_mask) && (to > 0))
776 to--;
777 } else {
778 __raw_writel(OTG_ALWAYS_MASK, clk->enable_reg);
779
780 while (((__raw_readl(LPC32XX_USB_OTG_CLK_STAT) &
781 OTG_ALWAYS_MASK) != OTG_ALWAYS_MASK) && (to > 0))
782 to--;
783 }
784
785 if (to)
786 return 0;
787 else
788 return -1;
789}
790
791static struct clk clk_usb_otg_dev = {
792 .parent = &clk_usbpll,
793 .enable = local_usb_otg_enable,
794 .enable_reg = LPC32XX_USB_OTG_CLK_CTRL,
795 .enable_mask = LPC32XX_USB_OTG_AHB_M_CLOCK_ON |
796 LPC32XX_USB_OTG_OTG_CLOCK_ON |
797 LPC32XX_USB_OTG_DEV_CLOCK_ON |
798 LPC32XX_USB_OTG_I2C_CLOCK_ON,
799 .get_rate = local_return_parent_rate,
800};
801
802static struct clk clk_usb_otg_host = {
803 .parent = &clk_usbpll,
804 .enable = local_usb_otg_enable,
805 .enable_reg = LPC32XX_USB_OTG_CLK_CTRL,
806 .enable_mask = LPC32XX_USB_OTG_AHB_M_CLOCK_ON |
807 LPC32XX_USB_OTG_OTG_CLOCK_ON |
808 LPC32XX_USB_OTG_HOST_CLOCK_ON |
809 LPC32XX_USB_OTG_I2C_CLOCK_ON,
810 .get_rate = local_return_parent_rate,
811};
812
750static int tsc_onoff_enable(struct clk *clk, int enable) 813static int tsc_onoff_enable(struct clk *clk, int enable)
751{ 814{
752 u32 tmp; 815 u32 tmp;
@@ -1145,6 +1208,9 @@ static struct clk_lookup lookups[] = {
1145 CLKDEV_INIT("31060000.ethernet", NULL, &clk_net), 1208 CLKDEV_INIT("31060000.ethernet", NULL, &clk_net),
1146 CLKDEV_INIT("dev:clcd", NULL, &clk_lcd), 1209 CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),
1147 CLKDEV_INIT("31020000.usbd", "ck_usbd", &clk_usbd), 1210 CLKDEV_INIT("31020000.usbd", "ck_usbd", &clk_usbd),
1211 CLKDEV_INIT("31020000.ohci", "ck_usbd", &clk_usbd),
1212 CLKDEV_INIT("31020000.usbd", "ck_usb_otg", &clk_usb_otg_dev),
1213 CLKDEV_INIT("31020000.ohci", "ck_usb_otg", &clk_usb_otg_host),
1148 CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc), 1214 CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),
1149}; 1215};
1150 1216
diff --git a/arch/arm/mach-lpc32xx/include/mach/platform.h b/arch/arm/mach-lpc32xx/include/mach/platform.h
index c584f5bb164f..acc4aabf1c7b 100644
--- a/arch/arm/mach-lpc32xx/include/mach/platform.h
+++ b/arch/arm/mach-lpc32xx/include/mach/platform.h
@@ -694,4 +694,18 @@
694#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C) 694#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)
695#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030) 695#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)
696 696
697/*
698 * USB Otg Registers
699 */
700#define _OTGREG(x) io_p2v(LPC32XX_USB_OTG_BASE + (x))
701#define LPC32XX_USB_OTG_CLK_CTRL _OTGREG(0xFF4)
702#define LPC32XX_USB_OTG_CLK_STAT _OTGREG(0xFF8)
703
704/* USB OTG CLK CTRL bit defines */
705#define LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4)
706#define LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3)
707#define LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2)
708#define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1)
709#define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0)
710
697#endif 711#endif