diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-09-26 17:42:18 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-09-26 17:42:18 -0400 |
commit | e3ef0dc60392c0d23ea74d4a7df851089e00fd87 (patch) | |
tree | 6edf9b7f3c93ab9caa4013fa7716649e1db69f5b /arch/arm | |
parent | 6f0f9b6b3fcfe5e156f20d4f804f0d505c750b3c (diff) | |
parent | 6323fa2256baa73d6a960ee57ec086b66aeecd0b (diff) |
Merge branch 'cache-louis' of git://linux-arm.org/linux-2.6-lp into devel-stable
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/include/asm/cacheflush.h | 15 | ||||
-rw-r--r-- | arch/arm/include/asm/glue-cache.h | 1 | ||||
-rw-r--r-- | arch/arm/kernel/smp.c | 5 | ||||
-rw-r--r-- | arch/arm/kernel/suspend.c | 17 | ||||
-rw-r--r-- | arch/arm/mm/cache-fa.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/cache-v3.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/cache-v4.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/cache-v4wb.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/cache-v4wt.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/cache-v6.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/cache-v7.S | 48 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1022.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1026.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm920.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm922.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm925.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm926.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm940.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm946.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-feroceon.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-macros.S | 1 | ||||
-rw-r--r-- | arch/arm/mm/proc-mohawk.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-xsc3.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-xscale.S | 3 |
27 files changed, 140 insertions, 9 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index e4448e16046d..e1489c54cd12 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -49,6 +49,13 @@ | |||
49 | * | 49 | * |
50 | * Unconditionally clean and invalidate the entire cache. | 50 | * Unconditionally clean and invalidate the entire cache. |
51 | * | 51 | * |
52 | * flush_kern_louis() | ||
53 | * | ||
54 | * Flush data cache levels up to the level of unification | ||
55 | * inner shareable and invalidate the I-cache. | ||
56 | * Only needed from v7 onwards, falls back to flush_cache_all() | ||
57 | * for all other processor versions. | ||
58 | * | ||
52 | * flush_user_all() | 59 | * flush_user_all() |
53 | * | 60 | * |
54 | * Clean and invalidate all user space cache entries | 61 | * Clean and invalidate all user space cache entries |
@@ -97,6 +104,7 @@ | |||
97 | struct cpu_cache_fns { | 104 | struct cpu_cache_fns { |
98 | void (*flush_icache_all)(void); | 105 | void (*flush_icache_all)(void); |
99 | void (*flush_kern_all)(void); | 106 | void (*flush_kern_all)(void); |
107 | void (*flush_kern_louis)(void); | ||
100 | void (*flush_user_all)(void); | 108 | void (*flush_user_all)(void); |
101 | void (*flush_user_range)(unsigned long, unsigned long, unsigned int); | 109 | void (*flush_user_range)(unsigned long, unsigned long, unsigned int); |
102 | 110 | ||
@@ -119,6 +127,7 @@ extern struct cpu_cache_fns cpu_cache; | |||
119 | 127 | ||
120 | #define __cpuc_flush_icache_all cpu_cache.flush_icache_all | 128 | #define __cpuc_flush_icache_all cpu_cache.flush_icache_all |
121 | #define __cpuc_flush_kern_all cpu_cache.flush_kern_all | 129 | #define __cpuc_flush_kern_all cpu_cache.flush_kern_all |
130 | #define __cpuc_flush_kern_louis cpu_cache.flush_kern_louis | ||
122 | #define __cpuc_flush_user_all cpu_cache.flush_user_all | 131 | #define __cpuc_flush_user_all cpu_cache.flush_user_all |
123 | #define __cpuc_flush_user_range cpu_cache.flush_user_range | 132 | #define __cpuc_flush_user_range cpu_cache.flush_user_range |
124 | #define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range | 133 | #define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range |
@@ -139,6 +148,7 @@ extern struct cpu_cache_fns cpu_cache; | |||
139 | 148 | ||
140 | extern void __cpuc_flush_icache_all(void); | 149 | extern void __cpuc_flush_icache_all(void); |
141 | extern void __cpuc_flush_kern_all(void); | 150 | extern void __cpuc_flush_kern_all(void); |
151 | extern void __cpuc_flush_kern_louis(void); | ||
142 | extern void __cpuc_flush_user_all(void); | 152 | extern void __cpuc_flush_user_all(void); |
143 | extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); | 153 | extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); |
144 | extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); | 154 | extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); |
@@ -204,6 +214,11 @@ static inline void __flush_icache_all(void) | |||
204 | __flush_icache_preferred(); | 214 | __flush_icache_preferred(); |
205 | } | 215 | } |
206 | 216 | ||
217 | /* | ||
218 | * Flush caches up to Level of Unification Inner Shareable | ||
219 | */ | ||
220 | #define flush_cache_louis() __cpuc_flush_kern_louis() | ||
221 | |||
207 | #define flush_cache_all() __cpuc_flush_kern_all() | 222 | #define flush_cache_all() __cpuc_flush_kern_all() |
208 | 223 | ||
209 | static inline void vivt_flush_cache_mm(struct mm_struct *mm) | 224 | static inline void vivt_flush_cache_mm(struct mm_struct *mm) |
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h index 7e30874377e6..2d6a7de87a88 100644 --- a/arch/arm/include/asm/glue-cache.h +++ b/arch/arm/include/asm/glue-cache.h | |||
@@ -132,6 +132,7 @@ | |||
132 | #ifndef MULTI_CACHE | 132 | #ifndef MULTI_CACHE |
133 | #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) | 133 | #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) |
134 | #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) | 134 | #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) |
135 | #define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis) | ||
135 | #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) | 136 | #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) |
136 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) | 137 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) |
137 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) | 138 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index ebd8ad274d76..199558b9462e 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -134,8 +134,11 @@ int __cpu_disable(void) | |||
134 | /* | 134 | /* |
135 | * Flush user cache and TLB mappings, and then remove this CPU | 135 | * Flush user cache and TLB mappings, and then remove this CPU |
136 | * from the vm mask set of all processes. | 136 | * from the vm mask set of all processes. |
137 | * | ||
138 | * Caches are flushed to the Level of Unification Inner Shareable | ||
139 | * to write-back dirty lines to unified caches shared by all CPUs. | ||
137 | */ | 140 | */ |
138 | flush_cache_all(); | 141 | flush_cache_louis(); |
139 | local_flush_tlb_all(); | 142 | local_flush_tlb_all(); |
140 | 143 | ||
141 | clear_tasks_mm_cpumask(cpu); | 144 | clear_tasks_mm_cpumask(cpu); |
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c index 1794cc3b0f18..358bca3a995e 100644 --- a/arch/arm/kernel/suspend.c +++ b/arch/arm/kernel/suspend.c | |||
@@ -17,6 +17,8 @@ extern void cpu_resume_mmu(void); | |||
17 | */ | 17 | */ |
18 | void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) | 18 | void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) |
19 | { | 19 | { |
20 | u32 *ctx = ptr; | ||
21 | |||
20 | *save_ptr = virt_to_phys(ptr); | 22 | *save_ptr = virt_to_phys(ptr); |
21 | 23 | ||
22 | /* This must correspond to the LDM in cpu_resume() assembly */ | 24 | /* This must correspond to the LDM in cpu_resume() assembly */ |
@@ -26,7 +28,20 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) | |||
26 | 28 | ||
27 | cpu_do_suspend(ptr); | 29 | cpu_do_suspend(ptr); |
28 | 30 | ||
29 | flush_cache_all(); | 31 | flush_cache_louis(); |
32 | |||
33 | /* | ||
34 | * flush_cache_louis does not guarantee that | ||
35 | * save_ptr and ptr are cleaned to main memory, | ||
36 | * just up to the Level of Unification Inner Shareable. | ||
37 | * Since the context pointer and context itself | ||
38 | * are to be retrieved with the MMU off that | ||
39 | * data must be cleaned from all cache levels | ||
40 | * to main memory using "area" cache primitives. | ||
41 | */ | ||
42 | __cpuc_flush_dcache_area(ctx, ptrsz); | ||
43 | __cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr)); | ||
44 | |||
30 | outer_clean_range(*save_ptr, *save_ptr + ptrsz); | 45 | outer_clean_range(*save_ptr, *save_ptr + ptrsz); |
31 | outer_clean_range(virt_to_phys(save_ptr), | 46 | outer_clean_range(virt_to_phys(save_ptr), |
32 | virt_to_phys(save_ptr) + sizeof(*save_ptr)); | 47 | virt_to_phys(save_ptr) + sizeof(*save_ptr)); |
diff --git a/arch/arm/mm/cache-fa.S b/arch/arm/mm/cache-fa.S index 072016371093..e505befe51b5 100644 --- a/arch/arm/mm/cache-fa.S +++ b/arch/arm/mm/cache-fa.S | |||
@@ -240,6 +240,9 @@ ENTRY(fa_dma_unmap_area) | |||
240 | mov pc, lr | 240 | mov pc, lr |
241 | ENDPROC(fa_dma_unmap_area) | 241 | ENDPROC(fa_dma_unmap_area) |
242 | 242 | ||
243 | .globl fa_flush_kern_cache_louis | ||
244 | .equ fa_flush_kern_cache_louis, fa_flush_kern_cache_all | ||
245 | |||
243 | __INITDATA | 246 | __INITDATA |
244 | 247 | ||
245 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 248 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S index 52e35f32eefb..8a3fadece8d3 100644 --- a/arch/arm/mm/cache-v3.S +++ b/arch/arm/mm/cache-v3.S | |||
@@ -128,6 +128,9 @@ ENTRY(v3_dma_map_area) | |||
128 | ENDPROC(v3_dma_unmap_area) | 128 | ENDPROC(v3_dma_unmap_area) |
129 | ENDPROC(v3_dma_map_area) | 129 | ENDPROC(v3_dma_map_area) |
130 | 130 | ||
131 | .globl v3_flush_kern_cache_louis | ||
132 | .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all | ||
133 | |||
131 | __INITDATA | 134 | __INITDATA |
132 | 135 | ||
133 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 136 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S index 022135d2b7e4..43e5d77be677 100644 --- a/arch/arm/mm/cache-v4.S +++ b/arch/arm/mm/cache-v4.S | |||
@@ -140,6 +140,9 @@ ENTRY(v4_dma_map_area) | |||
140 | ENDPROC(v4_dma_unmap_area) | 140 | ENDPROC(v4_dma_unmap_area) |
141 | ENDPROC(v4_dma_map_area) | 141 | ENDPROC(v4_dma_map_area) |
142 | 142 | ||
143 | .globl v4_flush_kern_cache_louis | ||
144 | .equ v4_flush_kern_cache_louis, v4_flush_kern_cache_all | ||
145 | |||
143 | __INITDATA | 146 | __INITDATA |
144 | 147 | ||
145 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 148 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index 8f1eeae340c8..cd4945321407 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S | |||
@@ -251,6 +251,9 @@ ENTRY(v4wb_dma_unmap_area) | |||
251 | mov pc, lr | 251 | mov pc, lr |
252 | ENDPROC(v4wb_dma_unmap_area) | 252 | ENDPROC(v4wb_dma_unmap_area) |
253 | 253 | ||
254 | .globl v4wb_flush_kern_cache_louis | ||
255 | .equ v4wb_flush_kern_cache_louis, v4wb_flush_kern_cache_all | ||
256 | |||
254 | __INITDATA | 257 | __INITDATA |
255 | 258 | ||
256 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 259 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S index b34a5f908a82..11e5e5838bc5 100644 --- a/arch/arm/mm/cache-v4wt.S +++ b/arch/arm/mm/cache-v4wt.S | |||
@@ -196,6 +196,9 @@ ENTRY(v4wt_dma_map_area) | |||
196 | ENDPROC(v4wt_dma_unmap_area) | 196 | ENDPROC(v4wt_dma_unmap_area) |
197 | ENDPROC(v4wt_dma_map_area) | 197 | ENDPROC(v4wt_dma_map_area) |
198 | 198 | ||
199 | .globl v4wt_flush_kern_cache_louis | ||
200 | .equ v4wt_flush_kern_cache_louis, v4wt_flush_kern_cache_all | ||
201 | |||
199 | __INITDATA | 202 | __INITDATA |
200 | 203 | ||
201 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 204 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 4b10760c56d6..d8fd4d4bd3d4 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -326,6 +326,9 @@ ENTRY(v6_dma_unmap_area) | |||
326 | mov pc, lr | 326 | mov pc, lr |
327 | ENDPROC(v6_dma_unmap_area) | 327 | ENDPROC(v6_dma_unmap_area) |
328 | 328 | ||
329 | .globl v6_flush_kern_cache_louis | ||
330 | .equ v6_flush_kern_cache_louis, v6_flush_kern_cache_all | ||
331 | |||
329 | __INITDATA | 332 | __INITDATA |
330 | 333 | ||
331 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 334 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 39e3fb3db801..140b294bbd9b 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -33,6 +33,24 @@ ENTRY(v7_flush_icache_all) | |||
33 | mov pc, lr | 33 | mov pc, lr |
34 | ENDPROC(v7_flush_icache_all) | 34 | ENDPROC(v7_flush_icache_all) |
35 | 35 | ||
36 | /* | ||
37 | * v7_flush_dcache_louis() | ||
38 | * | ||
39 | * Flush the D-cache up to the Level of Unification Inner Shareable | ||
40 | * | ||
41 | * Corrupted registers: r0-r7, r9-r11 (r6 only in Thumb mode) | ||
42 | */ | ||
43 | |||
44 | ENTRY(v7_flush_dcache_louis) | ||
45 | dmb @ ensure ordering with previous memory accesses | ||
46 | mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr | ||
47 | ands r3, r0, #0xe00000 @ extract LoUIS from clidr | ||
48 | mov r3, r3, lsr #20 @ r3 = LoUIS * 2 | ||
49 | moveq pc, lr @ return if level == 0 | ||
50 | mov r10, #0 @ r10 (starting level) = 0 | ||
51 | b flush_levels @ start flushing cache levels | ||
52 | ENDPROC(v7_flush_dcache_louis) | ||
53 | |||
36 | /* | 54 | /* |
37 | * v7_flush_dcache_all() | 55 | * v7_flush_dcache_all() |
38 | * | 56 | * |
@@ -49,7 +67,7 @@ ENTRY(v7_flush_dcache_all) | |||
49 | mov r3, r3, lsr #23 @ left align loc bit field | 67 | mov r3, r3, lsr #23 @ left align loc bit field |
50 | beq finished @ if loc is 0, then no need to clean | 68 | beq finished @ if loc is 0, then no need to clean |
51 | mov r10, #0 @ start clean at cache level 0 | 69 | mov r10, #0 @ start clean at cache level 0 |
52 | loop1: | 70 | flush_levels: |
53 | add r2, r10, r10, lsr #1 @ work out 3x current cache level | 71 | add r2, r10, r10, lsr #1 @ work out 3x current cache level |
54 | mov r1, r0, lsr r2 @ extract cache type bits from clidr | 72 | mov r1, r0, lsr r2 @ extract cache type bits from clidr |
55 | and r1, r1, #7 @ mask of the bits for current cache only | 73 | and r1, r1, #7 @ mask of the bits for current cache only |
@@ -71,9 +89,9 @@ loop1: | |||
71 | clz r5, r4 @ find bit position of way size increment | 89 | clz r5, r4 @ find bit position of way size increment |
72 | ldr r7, =0x7fff | 90 | ldr r7, =0x7fff |
73 | ands r7, r7, r1, lsr #13 @ extract max number of the index size | 91 | ands r7, r7, r1, lsr #13 @ extract max number of the index size |
74 | loop2: | 92 | loop1: |
75 | mov r9, r4 @ create working copy of max way size | 93 | mov r9, r4 @ create working copy of max way size |
76 | loop3: | 94 | loop2: |
77 | ARM( orr r11, r10, r9, lsl r5 ) @ factor way and cache number into r11 | 95 | ARM( orr r11, r10, r9, lsl r5 ) @ factor way and cache number into r11 |
78 | THUMB( lsl r6, r9, r5 ) | 96 | THUMB( lsl r6, r9, r5 ) |
79 | THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11 | 97 | THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11 |
@@ -82,13 +100,13 @@ loop3: | |||
82 | THUMB( orr r11, r11, r6 ) @ factor index number into r11 | 100 | THUMB( orr r11, r11, r6 ) @ factor index number into r11 |
83 | mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way | 101 | mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way |
84 | subs r9, r9, #1 @ decrement the way | 102 | subs r9, r9, #1 @ decrement the way |
85 | bge loop3 | ||
86 | subs r7, r7, #1 @ decrement the index | ||
87 | bge loop2 | 103 | bge loop2 |
104 | subs r7, r7, #1 @ decrement the index | ||
105 | bge loop1 | ||
88 | skip: | 106 | skip: |
89 | add r10, r10, #2 @ increment cache number | 107 | add r10, r10, #2 @ increment cache number |
90 | cmp r3, r10 | 108 | cmp r3, r10 |
91 | bgt loop1 | 109 | bgt flush_levels |
92 | finished: | 110 | finished: |
93 | mov r10, #0 @ swith back to cache level 0 | 111 | mov r10, #0 @ swith back to cache level 0 |
94 | mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr | 112 | mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr |
@@ -120,6 +138,24 @@ ENTRY(v7_flush_kern_cache_all) | |||
120 | mov pc, lr | 138 | mov pc, lr |
121 | ENDPROC(v7_flush_kern_cache_all) | 139 | ENDPROC(v7_flush_kern_cache_all) |
122 | 140 | ||
141 | /* | ||
142 | * v7_flush_kern_cache_louis(void) | ||
143 | * | ||
144 | * Flush the data cache up to Level of Unification Inner Shareable. | ||
145 | * Invalidate the I-cache to the point of unification. | ||
146 | */ | ||
147 | ENTRY(v7_flush_kern_cache_louis) | ||
148 | ARM( stmfd sp!, {r4-r5, r7, r9-r11, lr} ) | ||
149 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) | ||
150 | bl v7_flush_dcache_louis | ||
151 | mov r0, #0 | ||
152 | ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable | ||
153 | ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate | ||
154 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) | ||
155 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) | ||
156 | mov pc, lr | ||
157 | ENDPROC(v7_flush_kern_cache_louis) | ||
158 | |||
123 | /* | 159 | /* |
124 | * v7_flush_cache_all() | 160 | * v7_flush_cache_all() |
125 | * | 161 | * |
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 0650bb87c1e3..2bb61e703d6c 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
@@ -368,6 +368,9 @@ ENTRY(arm1020_dma_unmap_area) | |||
368 | mov pc, lr | 368 | mov pc, lr |
369 | ENDPROC(arm1020_dma_unmap_area) | 369 | ENDPROC(arm1020_dma_unmap_area) |
370 | 370 | ||
371 | .globl arm1020_flush_kern_cache_louis | ||
372 | .equ arm1020_flush_kern_cache_louis, arm1020_flush_kern_cache_all | ||
373 | |||
371 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 374 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
372 | define_cache_functions arm1020 | 375 | define_cache_functions arm1020 |
373 | 376 | ||
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 4188478325a6..8f96aa40f510 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -354,6 +354,9 @@ ENTRY(arm1020e_dma_unmap_area) | |||
354 | mov pc, lr | 354 | mov pc, lr |
355 | ENDPROC(arm1020e_dma_unmap_area) | 355 | ENDPROC(arm1020e_dma_unmap_area) |
356 | 356 | ||
357 | .globl arm1020e_flush_kern_cache_louis | ||
358 | .equ arm1020e_flush_kern_cache_louis, arm1020e_flush_kern_cache_all | ||
359 | |||
357 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 360 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
358 | define_cache_functions arm1020e | 361 | define_cache_functions arm1020e |
359 | 362 | ||
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 33c68824bff0..8ebe4a469a22 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
@@ -343,6 +343,9 @@ ENTRY(arm1022_dma_unmap_area) | |||
343 | mov pc, lr | 343 | mov pc, lr |
344 | ENDPROC(arm1022_dma_unmap_area) | 344 | ENDPROC(arm1022_dma_unmap_area) |
345 | 345 | ||
346 | .globl arm1022_flush_kern_cache_louis | ||
347 | .equ arm1022_flush_kern_cache_louis, arm1022_flush_kern_cache_all | ||
348 | |||
346 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 349 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
347 | define_cache_functions arm1022 | 350 | define_cache_functions arm1022 |
348 | 351 | ||
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index fbc1d5fc24dc..093fc7e520c3 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
@@ -337,6 +337,9 @@ ENTRY(arm1026_dma_unmap_area) | |||
337 | mov pc, lr | 337 | mov pc, lr |
338 | ENDPROC(arm1026_dma_unmap_area) | 338 | ENDPROC(arm1026_dma_unmap_area) |
339 | 339 | ||
340 | .globl arm1026_flush_kern_cache_louis | ||
341 | .equ arm1026_flush_kern_cache_louis, arm1026_flush_kern_cache_all | ||
342 | |||
340 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 343 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
341 | define_cache_functions arm1026 | 344 | define_cache_functions arm1026 |
342 | 345 | ||
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 1a8c138eb897..2c3b9421ab5e 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -319,6 +319,9 @@ ENTRY(arm920_dma_unmap_area) | |||
319 | mov pc, lr | 319 | mov pc, lr |
320 | ENDPROC(arm920_dma_unmap_area) | 320 | ENDPROC(arm920_dma_unmap_area) |
321 | 321 | ||
322 | .globl arm920_flush_kern_cache_louis | ||
323 | .equ arm920_flush_kern_cache_louis, arm920_flush_kern_cache_all | ||
324 | |||
322 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 325 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
323 | define_cache_functions arm920 | 326 | define_cache_functions arm920 |
324 | #endif | 327 | #endif |
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 4c44d7e1c3ca..4464c49d7449 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
@@ -321,6 +321,9 @@ ENTRY(arm922_dma_unmap_area) | |||
321 | mov pc, lr | 321 | mov pc, lr |
322 | ENDPROC(arm922_dma_unmap_area) | 322 | ENDPROC(arm922_dma_unmap_area) |
323 | 323 | ||
324 | .globl arm922_flush_kern_cache_louis | ||
325 | .equ arm922_flush_kern_cache_louis, arm922_flush_kern_cache_all | ||
326 | |||
324 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 327 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
325 | define_cache_functions arm922 | 328 | define_cache_functions arm922 |
326 | #endif | 329 | #endif |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index ec5b1180994f..281eb9b9c1d6 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -376,6 +376,9 @@ ENTRY(arm925_dma_unmap_area) | |||
376 | mov pc, lr | 376 | mov pc, lr |
377 | ENDPROC(arm925_dma_unmap_area) | 377 | ENDPROC(arm925_dma_unmap_area) |
378 | 378 | ||
379 | .globl arm925_flush_kern_cache_louis | ||
380 | .equ arm925_flush_kern_cache_louis, arm925_flush_kern_cache_all | ||
381 | |||
379 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 382 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
380 | define_cache_functions arm925 | 383 | define_cache_functions arm925 |
381 | 384 | ||
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index c31e62c606c0..f1803f7e2972 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
@@ -339,6 +339,9 @@ ENTRY(arm926_dma_unmap_area) | |||
339 | mov pc, lr | 339 | mov pc, lr |
340 | ENDPROC(arm926_dma_unmap_area) | 340 | ENDPROC(arm926_dma_unmap_area) |
341 | 341 | ||
342 | .globl arm926_flush_kern_cache_louis | ||
343 | .equ arm926_flush_kern_cache_louis, arm926_flush_kern_cache_all | ||
344 | |||
342 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 345 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
343 | define_cache_functions arm926 | 346 | define_cache_functions arm926 |
344 | 347 | ||
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index a613a7dd7146..8da189d4a402 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S | |||
@@ -267,6 +267,9 @@ ENTRY(arm940_dma_unmap_area) | |||
267 | mov pc, lr | 267 | mov pc, lr |
268 | ENDPROC(arm940_dma_unmap_area) | 268 | ENDPROC(arm940_dma_unmap_area) |
269 | 269 | ||
270 | .globl arm940_flush_kern_cache_louis | ||
271 | .equ arm940_flush_kern_cache_louis, arm940_flush_kern_cache_all | ||
272 | |||
270 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 273 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
271 | define_cache_functions arm940 | 274 | define_cache_functions arm940 |
272 | 275 | ||
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 9f4f2999fdd0..f666cf34075a 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S | |||
@@ -310,6 +310,9 @@ ENTRY(arm946_dma_unmap_area) | |||
310 | mov pc, lr | 310 | mov pc, lr |
311 | ENDPROC(arm946_dma_unmap_area) | 311 | ENDPROC(arm946_dma_unmap_area) |
312 | 312 | ||
313 | .globl arm946_flush_kern_cache_louis | ||
314 | .equ arm946_flush_kern_cache_louis, arm946_flush_kern_cache_all | ||
315 | |||
313 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 316 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
314 | define_cache_functions arm946 | 317 | define_cache_functions arm946 |
315 | 318 | ||
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index 23a8e4c7f2bd..85e5e3baa3d4 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -415,6 +415,9 @@ ENTRY(feroceon_dma_unmap_area) | |||
415 | mov pc, lr | 415 | mov pc, lr |
416 | ENDPROC(feroceon_dma_unmap_area) | 416 | ENDPROC(feroceon_dma_unmap_area) |
417 | 417 | ||
418 | .globl feroceon_flush_kern_cache_louis | ||
419 | .equ feroceon_flush_kern_cache_louis, feroceon_flush_kern_cache_all | ||
420 | |||
418 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 421 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
419 | define_cache_functions feroceon | 422 | define_cache_functions feroceon |
420 | 423 | ||
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 2d8ff3ad86d3..b29a2265af01 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S | |||
@@ -299,6 +299,7 @@ ENTRY(\name\()_processor_functions) | |||
299 | ENTRY(\name\()_cache_fns) | 299 | ENTRY(\name\()_cache_fns) |
300 | .long \name\()_flush_icache_all | 300 | .long \name\()_flush_icache_all |
301 | .long \name\()_flush_kern_cache_all | 301 | .long \name\()_flush_kern_cache_all |
302 | .long \name\()_flush_kern_cache_louis | ||
302 | .long \name\()_flush_user_cache_all | 303 | .long \name\()_flush_user_cache_all |
303 | .long \name\()_flush_user_cache_range | 304 | .long \name\()_flush_user_cache_range |
304 | .long \name\()_coherent_kern_range | 305 | .long \name\()_coherent_kern_range |
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S index fbb2124a547d..82f9cdc751d6 100644 --- a/arch/arm/mm/proc-mohawk.S +++ b/arch/arm/mm/proc-mohawk.S | |||
@@ -303,6 +303,9 @@ ENTRY(mohawk_dma_unmap_area) | |||
303 | mov pc, lr | 303 | mov pc, lr |
304 | ENDPROC(mohawk_dma_unmap_area) | 304 | ENDPROC(mohawk_dma_unmap_area) |
305 | 305 | ||
306 | .globl mohawk_flush_kern_cache_louis | ||
307 | .equ mohawk_flush_kern_cache_louis, mohawk_flush_kern_cache_all | ||
308 | |||
306 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 309 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
307 | define_cache_functions mohawk | 310 | define_cache_functions mohawk |
308 | 311 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index c2e2b66f72b5..846d279f3176 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -172,7 +172,7 @@ __v7_ca15mp_setup: | |||
172 | __v7_setup: | 172 | __v7_setup: |
173 | adr r12, __v7_setup_stack @ the local stack | 173 | adr r12, __v7_setup_stack @ the local stack |
174 | stmia r12, {r0-r5, r7, r9, r11, lr} | 174 | stmia r12, {r0-r5, r7, r9, r11, lr} |
175 | bl v7_flush_dcache_all | 175 | bl v7_flush_dcache_louis |
176 | ldmia r12, {r0-r5, r7, r9, r11, lr} | 176 | ldmia r12, {r0-r5, r7, r9, r11, lr} |
177 | 177 | ||
178 | mrc p15, 0, r0, c0, c0, 0 @ read main ID register | 178 | mrc p15, 0, r0, c0, c0, 0 @ read main ID register |
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index b0d57869da2d..eb93d6487f35 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -337,6 +337,9 @@ ENTRY(xsc3_dma_unmap_area) | |||
337 | mov pc, lr | 337 | mov pc, lr |
338 | ENDPROC(xsc3_dma_unmap_area) | 338 | ENDPROC(xsc3_dma_unmap_area) |
339 | 339 | ||
340 | .globl xsc3_flush_kern_cache_louis | ||
341 | .equ xsc3_flush_kern_cache_louis, xsc3_flush_kern_cache_all | ||
342 | |||
340 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 343 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
341 | define_cache_functions xsc3 | 344 | define_cache_functions xsc3 |
342 | 345 | ||
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 4ffebaa595ee..b5ea31d6daac 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -410,6 +410,9 @@ ENTRY(xscale_dma_unmap_area) | |||
410 | mov pc, lr | 410 | mov pc, lr |
411 | ENDPROC(xscale_dma_unmap_area) | 411 | ENDPROC(xscale_dma_unmap_area) |
412 | 412 | ||
413 | .globl xscale_flush_kern_cache_louis | ||
414 | .equ xscale_flush_kern_cache_louis, xscale_flush_kern_cache_all | ||
415 | |||
413 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) | 416 | @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) |
414 | define_cache_functions xscale | 417 | define_cache_functions xscale |
415 | 418 | ||