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authorKukjin Kim <kgene.kim@samsung.com>2010-08-29 23:07:58 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-09-14 04:59:31 -0400
commitcbd2780fcefc370732c1f1526fb784573308177d (patch)
tree6a94bdcf020f2c7e1d29b80b06a54aaea4954805 /arch/arm
parent0770e5280efd6f0001972a2b5127dffad0e22591 (diff)
ARM: SAMSUNG: Fix on s5p_gpio_[get,set]_drvstr
This patch fixes bug on gpio drive strength helper function. The offset should be like follwoing. - off = chip->chip.base - pin; + off = pin - chip->chip.base; In the s5p_gpio_get_drvstr(), the second line is unnecessary, because overwrite drvstr. drvstr = __raw_readl(reg); - drvstr = 0xffff & (0x3 << shift); And need 2bit masking before return the drvstr value. drvstr = drvstr >> shift; + drvstr &= 0x3; In the s5p_gpio_set_drvstr(), need relevant bit clear. tmp = __raw_readl(reg); + tmp &= ~(0x3 << shift); tmp |= drvstr << shift; Reported-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-samsung/gpio-config.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 57b68a50f45e..e3d41eaed1ff 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -273,13 +273,13 @@ s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
273 if (!chip) 273 if (!chip)
274 return -EINVAL; 274 return -EINVAL;
275 275
276 off = chip->chip.base - pin; 276 off = pin - chip->chip.base;
277 shift = off * 2; 277 shift = off * 2;
278 reg = chip->base + 0x0C; 278 reg = chip->base + 0x0C;
279 279
280 drvstr = __raw_readl(reg); 280 drvstr = __raw_readl(reg);
281 drvstr = 0xffff & (0x3 << shift);
282 drvstr = drvstr >> shift; 281 drvstr = drvstr >> shift;
282 drvstr &= 0x3;
283 283
284 return (__force s5p_gpio_drvstr_t)drvstr; 284 return (__force s5p_gpio_drvstr_t)drvstr;
285} 285}
@@ -296,11 +296,12 @@ int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
296 if (!chip) 296 if (!chip)
297 return -EINVAL; 297 return -EINVAL;
298 298
299 off = chip->chip.base - pin; 299 off = pin - chip->chip.base;
300 shift = off * 2; 300 shift = off * 2;
301 reg = chip->base + 0x0C; 301 reg = chip->base + 0x0C;
302 302
303 tmp = __raw_readl(reg); 303 tmp = __raw_readl(reg);
304 tmp &= ~(0x3 << shift);
304 tmp |= drvstr << shift; 305 tmp |= drvstr << shift;
305 306
306 __raw_writel(tmp, reg); 307 __raw_writel(tmp, reg);