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authorGrant Likely <grant.likely@secretlab.ca>2012-02-28 14:48:58 -0500
committerGrant Likely <grant.likely@secretlab.ca>2012-02-28 14:48:58 -0500
commitb3950d50cfc343b3e7dc5c69c96a61b182fd1e37 (patch)
treed54affae2b1e25464493b48aa88cd8d6b4770812 /arch/arm
parentdaefd89efc279b142bbb054577c2d706da211723 (diff)
parent280ad7fda5f95211857fda38960f2b6fdf6edd3e (diff)
Merge branch 'irqdomain/next' into gpio/next
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/common/gic.c95
-rw-r--r--arch/arm/common/vic.c16
-rw-r--r--arch/arm/include/asm/hardware/gic.h4
-rw-r--r--arch/arm/include/asm/hardware/vic.h2
-rw-r--r--arch/arm/include/asm/tlb.h10
-rw-r--r--arch/arm/kernel/entry-armv.S2
-rw-r--r--arch/arm/kernel/perf_event_v7.c28
-rw-r--r--arch/arm/kernel/ptrace.c8
-rw-r--r--arch/arm/kernel/signal.c5
-rw-r--r--arch/arm/kernel/traps.c5
-rw-r--r--arch/arm/kernel/vmlinux.lds.S1
-rw-r--r--arch/arm/mach-bcmring/arch.c2
-rw-r--r--arch/arm/mach-bcmring/dma.c812
-rw-r--r--arch/arm/mach-bcmring/include/mach/dma.h196
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c2
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c2
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c2
-rw-r--r--arch/arm/mach-davinci/da850.c32
-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-imx/imx51-dt.c4
-rw-r--r--arch/arm/mach-imx/imx53-dt.c4
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c3
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c8
-rw-r--r--arch/arm/mach-omap2/Kconfig11
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c35
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c23
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c24
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c6
-rw-r--r--arch/arm/mach-omap2/devices.c1
-rw-r--r--arch/arm/mach-omap2/display.c4
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-omap2/hsmmc.c24
-rw-r--r--arch/arm/mach-omap2/io.c4
-rw-r--r--arch/arm/mach-omap2/mux.c22
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c16
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c21
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c22
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c54
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c1
-rw-r--r--arch/arm/mach-omap2/prm44xx.c1
-rw-r--r--arch/arm/mach-omap2/serial.c8
-rw-r--r--arch/arm/mach-omap2/smartreflex.c2
-rw-r--r--arch/arm/mach-omap2/timer.c2
-rw-r--r--arch/arm/mach-omap2/vc.c10
-rw-r--r--arch/arm/mach-omap2/vp.c5
-rw-r--r--arch/arm/mach-prima2/irq.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c2
-rw-r--r--arch/arm/mach-versatile/core.c7
-rw-r--r--arch/arm/mm/cache-v7.S6
-rw-r--r--arch/arm/mm/ioremap.c3
57 files changed, 332 insertions, 1248 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c47d6199b784..f0783be17352 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -51,7 +51,6 @@ union gic_base {
51}; 51};
52 52
53struct gic_chip_data { 53struct gic_chip_data {
54 unsigned int irq_offset;
55 union gic_base dist_base; 54 union gic_base dist_base;
56 union gic_base cpu_base; 55 union gic_base cpu_base;
57#ifdef CONFIG_CPU_PM 56#ifdef CONFIG_CPU_PM
@@ -61,9 +60,7 @@ struct gic_chip_data {
61 u32 __percpu *saved_ppi_enable; 60 u32 __percpu *saved_ppi_enable;
62 u32 __percpu *saved_ppi_conf; 61 u32 __percpu *saved_ppi_conf;
63#endif 62#endif
64#ifdef CONFIG_IRQ_DOMAIN 63 struct irq_domain *domain;
65 struct irq_domain domain;
66#endif
67 unsigned int gic_irqs; 64 unsigned int gic_irqs;
68#ifdef CONFIG_GIC_NON_BANKED 65#ifdef CONFIG_GIC_NON_BANKED
69 void __iomem *(*get_base)(union gic_base *); 66 void __iomem *(*get_base)(union gic_base *);
@@ -282,7 +279,7 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
282 irqnr = irqstat & ~0x1c00; 279 irqnr = irqstat & ~0x1c00;
283 280
284 if (likely(irqnr > 15 && irqnr < 1021)) { 281 if (likely(irqnr > 15 && irqnr < 1021)) {
285 irqnr = irq_domain_to_irq(&gic->domain, irqnr); 282 irqnr = irq_find_mapping(gic->domain, irqnr);
286 handle_IRQ(irqnr, regs); 283 handle_IRQ(irqnr, regs);
287 continue; 284 continue;
288 } 285 }
@@ -314,8 +311,8 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
314 if (gic_irq == 1023) 311 if (gic_irq == 1023)
315 goto out; 312 goto out;
316 313
317 cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq); 314 cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
318 if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) 315 if (unlikely(gic_irq < 32 || gic_irq > 1020))
319 do_bad_IRQ(cascade_irq, desc); 316 do_bad_IRQ(cascade_irq, desc);
320 else 317 else
321 generic_handle_irq(cascade_irq); 318 generic_handle_irq(cascade_irq);
@@ -348,10 +345,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
348 345
349static void __init gic_dist_init(struct gic_chip_data *gic) 346static void __init gic_dist_init(struct gic_chip_data *gic)
350{ 347{
351 unsigned int i, irq; 348 unsigned int i;
352 u32 cpumask; 349 u32 cpumask;
353 unsigned int gic_irqs = gic->gic_irqs; 350 unsigned int gic_irqs = gic->gic_irqs;
354 struct irq_domain *domain = &gic->domain;
355 void __iomem *base = gic_data_dist_base(gic); 351 void __iomem *base = gic_data_dist_base(gic);
356 u32 cpu = cpu_logical_map(smp_processor_id()); 352 u32 cpu = cpu_logical_map(smp_processor_id());
357 353
@@ -386,23 +382,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
386 for (i = 32; i < gic_irqs; i += 32) 382 for (i = 32; i < gic_irqs; i += 32)
387 writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); 383 writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
388 384
389 /*
390 * Setup the Linux IRQ subsystem.
391 */
392 irq_domain_for_each_irq(domain, i, irq) {
393 if (i < 32) {
394 irq_set_percpu_devid(irq);
395 irq_set_chip_and_handler(irq, &gic_chip,
396 handle_percpu_devid_irq);
397 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
398 } else {
399 irq_set_chip_and_handler(irq, &gic_chip,
400 handle_fasteoi_irq);
401 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
402 }
403 irq_set_chip_data(irq, gic);
404 }
405
406 writel_relaxed(1, base + GIC_DIST_CTRL); 385 writel_relaxed(1, base + GIC_DIST_CTRL);
407} 386}
408 387
@@ -618,11 +597,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
618} 597}
619#endif 598#endif
620 599
621#ifdef CONFIG_OF 600static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
622static int gic_irq_domain_dt_translate(struct irq_domain *d, 601 irq_hw_number_t hw)
623 struct device_node *controller, 602{
624 const u32 *intspec, unsigned int intsize, 603 if (hw < 32) {
625 unsigned long *out_hwirq, unsigned int *out_type) 604 irq_set_percpu_devid(irq);
605 irq_set_chip_and_handler(irq, &gic_chip,
606 handle_percpu_devid_irq);
607 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
608 } else {
609 irq_set_chip_and_handler(irq, &gic_chip,
610 handle_fasteoi_irq);
611 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
612 }
613 irq_set_chip_data(irq, d->host_data);
614 return 0;
615}
616
617static int gic_irq_domain_xlate(struct irq_domain *d,
618 struct device_node *controller,
619 const u32 *intspec, unsigned int intsize,
620 unsigned long *out_hwirq, unsigned int *out_type)
626{ 621{
627 if (d->of_node != controller) 622 if (d->of_node != controller)
628 return -EINVAL; 623 return -EINVAL;
@@ -639,26 +634,23 @@ static int gic_irq_domain_dt_translate(struct irq_domain *d,
639 *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; 634 *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
640 return 0; 635 return 0;
641} 636}
642#endif
643 637
644const struct irq_domain_ops gic_irq_domain_ops = { 638const struct irq_domain_ops gic_irq_domain_ops = {
645#ifdef CONFIG_OF 639 .map = gic_irq_domain_map,
646 .dt_translate = gic_irq_domain_dt_translate, 640 .xlate = gic_irq_domain_xlate,
647#endif
648}; 641};
649 642
650void __init gic_init_bases(unsigned int gic_nr, int irq_start, 643void __init gic_init_bases(unsigned int gic_nr, int irq_start,
651 void __iomem *dist_base, void __iomem *cpu_base, 644 void __iomem *dist_base, void __iomem *cpu_base,
652 u32 percpu_offset) 645 u32 percpu_offset, struct device_node *node)
653{ 646{
647 irq_hw_number_t hwirq_base;
654 struct gic_chip_data *gic; 648 struct gic_chip_data *gic;
655 struct irq_domain *domain; 649 int gic_irqs, irq_base;
656 int gic_irqs;
657 650
658 BUG_ON(gic_nr >= MAX_GIC_NR); 651 BUG_ON(gic_nr >= MAX_GIC_NR);
659 652
660 gic = &gic_data[gic_nr]; 653 gic = &gic_data[gic_nr];
661 domain = &gic->domain;
662#ifdef CONFIG_GIC_NON_BANKED 654#ifdef CONFIG_GIC_NON_BANKED
663 if (percpu_offset) { /* Frankein-GIC without banked registers... */ 655 if (percpu_offset) { /* Frankein-GIC without banked registers... */
664 unsigned int cpu; 656 unsigned int cpu;
@@ -694,10 +686,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
694 * For primary GICs, skip over SGIs. 686 * For primary GICs, skip over SGIs.
695 * For secondary GICs, skip over PPIs, too. 687 * For secondary GICs, skip over PPIs, too.
696 */ 688 */
697 domain->hwirq_base = 32; 689 hwirq_base = 32;
698 if (gic_nr == 0) { 690 if (gic_nr == 0) {
699 if ((irq_start & 31) > 0) { 691 if ((irq_start & 31) > 0) {
700 domain->hwirq_base = 16; 692 hwirq_base = 16;
701 if (irq_start != -1) 693 if (irq_start != -1)
702 irq_start = (irq_start & ~31) + 16; 694 irq_start = (irq_start & ~31) + 16;
703 } 695 }
@@ -713,17 +705,17 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
713 gic_irqs = 1020; 705 gic_irqs = 1020;
714 gic->gic_irqs = gic_irqs; 706 gic->gic_irqs = gic_irqs;
715 707
716 domain->nr_irq = gic_irqs - domain->hwirq_base; 708 gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
717 domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq, 709 irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id());
718 numa_node_id()); 710 if (IS_ERR_VALUE(irq_base)) {
719 if (IS_ERR_VALUE(domain->irq_base)) {
720 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", 711 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
721 irq_start); 712 irq_start);
722 domain->irq_base = irq_start; 713 irq_base = irq_start;
723 } 714 }
724 domain->priv = gic; 715 gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
725 domain->ops = &gic_irq_domain_ops; 716 hwirq_base, &gic_irq_domain_ops, gic);
726 irq_domain_add(domain); 717 if (WARN_ON(!gic->domain))
718 return;
727 719
728 gic_chip.flags |= gic_arch_extn.flags; 720 gic_chip.flags |= gic_arch_extn.flags;
729 gic_dist_init(gic); 721 gic_dist_init(gic);
@@ -768,7 +760,6 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
768 void __iomem *dist_base; 760 void __iomem *dist_base;
769 u32 percpu_offset; 761 u32 percpu_offset;
770 int irq; 762 int irq;
771 struct irq_domain *domain = &gic_data[gic_cnt].domain;
772 763
773 if (WARN_ON(!node)) 764 if (WARN_ON(!node))
774 return -ENODEV; 765 return -ENODEV;
@@ -782,9 +773,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
782 if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) 773 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
783 percpu_offset = 0; 774 percpu_offset = 0;
784 775
785 domain->of_node = of_node_get(node); 776 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
786
787 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
788 777
789 if (parent) { 778 if (parent) {
790 irq = irq_of_parse_and_map(node, 0); 779 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index dcb004a804c7..7a66311f3066 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -56,7 +56,7 @@ struct vic_device {
56 u32 int_enable; 56 u32 int_enable;
57 u32 soft_int; 57 u32 soft_int;
58 u32 protect; 58 u32 protect;
59 struct irq_domain domain; 59 struct irq_domain *domain;
60}; 60};
61 61
62/* we cannot allocate memory when VICs are initially registered */ 62/* we cannot allocate memory when VICs are initially registered */
@@ -192,14 +192,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
192 v->resume_sources = resume_sources; 192 v->resume_sources = resume_sources;
193 v->irq = irq; 193 v->irq = irq;
194 vic_id++; 194 vic_id++;
195 195 v->domain = irq_domain_add_legacy(node, 32, irq, 0,
196 v->domain.irq_base = irq; 196 &irq_domain_simple_ops, v);
197 v->domain.nr_irq = 32;
198#ifdef CONFIG_OF_IRQ
199 v->domain.of_node = of_node_get(node);
200#endif /* CONFIG_OF */
201 v->domain.ops = &irq_domain_simple_ops;
202 irq_domain_add(&v->domain);
203} 197}
204 198
205static void vic_ack_irq(struct irq_data *d) 199static void vic_ack_irq(struct irq_data *d)
@@ -348,7 +342,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
348 vic_register(base, irq_start, 0, node); 342 vic_register(base, irq_start, 0, node);
349} 343}
350 344
351static void __init __vic_init(void __iomem *base, unsigned int irq_start, 345void __init __vic_init(void __iomem *base, unsigned int irq_start,
352 u32 vic_sources, u32 resume_sources, 346 u32 vic_sources, u32 resume_sources,
353 struct device_node *node) 347 struct device_node *node)
354{ 348{
@@ -444,7 +438,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
444 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); 438 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
445 while (stat) { 439 while (stat) {
446 irq = ffs(stat) - 1; 440 irq = ffs(stat) - 1;
447 handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs); 441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
448 stat &= ~(1 << irq); 442 stat &= ~(1 << irq);
449 handled = 1; 443 handled = 1;
450 } 444 }
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4bdfe0018696..4b1ce6cd477f 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -39,7 +39,7 @@ struct device_node;
39extern struct irq_chip gic_arch_extn; 39extern struct irq_chip gic_arch_extn;
40 40
41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, 41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset); 42 u32 offset, struct device_node *);
43int gic_of_init(struct device_node *node, struct device_node *parent); 43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs); 45void gic_handle_irq(struct pt_regs *regs);
@@ -49,7 +49,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
49static inline void gic_init(unsigned int nr, int start, 49static inline void gic_init(unsigned int nr, int start,
50 void __iomem *dist , void __iomem *cpu) 50 void __iomem *dist , void __iomem *cpu)
51{ 51{
52 gic_init_bases(nr, start, dist, cpu, 0); 52 gic_init_bases(nr, start, dist, cpu, 0, NULL);
53} 53}
54 54
55#endif 55#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index f42ebd619590..e14af1a1a320 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -47,6 +47,8 @@
47struct device_node; 47struct device_node;
48struct pt_regs; 48struct pt_regs;
49 49
50void __vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources,
51 u32 resume_sources, struct device_node *node);
50void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 52void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
51int vic_of_init(struct device_node *node, struct device_node *parent); 53int vic_of_init(struct device_node *node, struct device_node *parent);
52void vic_handle_irq(struct pt_regs *regs); 54void vic_handle_irq(struct pt_regs *regs);
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 5d3ed7e38561..314d4664eae7 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -198,7 +198,15 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
198 unsigned long addr) 198 unsigned long addr)
199{ 199{
200 pgtable_page_dtor(pte); 200 pgtable_page_dtor(pte);
201 tlb_add_flush(tlb, addr); 201
202 /*
203 * With the classic ARM MMU, a pte page has two corresponding pmd
204 * entries, each covering 1MB.
205 */
206 addr &= PMD_MASK;
207 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
208 tlb_add_flush(tlb, addr + SZ_1M);
209
202 tlb_remove_page(tlb, pte); 210 tlb_remove_page(tlb, pte);
203} 211}
204 212
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 3a456c6c7005..be16a48007b4 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -790,7 +790,7 @@ __kuser_cmpxchg64: @ 0xffff0f60
790 smp_dmb arm 790 smp_dmb arm
791 rsbs r0, r3, #0 @ set returned val and C flag 791 rsbs r0, r3, #0 @ set returned val and C flag
792 ldmfd sp!, {r4, r5, r6, r7} 792 ldmfd sp!, {r4, r5, r6, r7}
793 bx lr 793 usr_ret lr
794 794
795#elif !defined(CONFIG_SMP) 795#elif !defined(CONFIG_SMP)
796 796
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 460bbbb6b885..6933244c68f9 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -469,6 +469,20 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
469 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 469 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
470 }, 470 },
471 }, 471 },
472 [C(NODE)] = {
473 [C(OP_READ)] = {
474 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
475 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
476 },
477 [C(OP_WRITE)] = {
478 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
479 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
480 },
481 [C(OP_PREFETCH)] = {
482 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
483 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
484 },
485 },
472}; 486};
473 487
474/* 488/*
@@ -579,6 +593,20 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
579 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 593 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
580 }, 594 },
581 }, 595 },
596 [C(NODE)] = {
597 [C(OP_READ)] = {
598 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
599 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
600 },
601 [C(OP_WRITE)] = {
602 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
603 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
604 },
605 [C(OP_PREFETCH)] = {
606 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
607 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
608 },
609 },
582}; 610};
583 611
584/* 612/*
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index e1d5e1929fbd..e33870ff0ac0 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -699,10 +699,13 @@ static int vfp_set(struct task_struct *target,
699{ 699{
700 int ret; 700 int ret;
701 struct thread_info *thread = task_thread_info(target); 701 struct thread_info *thread = task_thread_info(target);
702 struct vfp_hard_struct new_vfp = thread->vfpstate.hard; 702 struct vfp_hard_struct new_vfp;
703 const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs); 703 const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs);
704 const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr); 704 const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr);
705 705
706 vfp_sync_hwstate(thread);
707 new_vfp = thread->vfpstate.hard;
708
706 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 709 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
707 &new_vfp.fpregs, 710 &new_vfp.fpregs,
708 user_fpregs_offset, 711 user_fpregs_offset,
@@ -723,9 +726,8 @@ static int vfp_set(struct task_struct *target,
723 if (ret) 726 if (ret)
724 return ret; 727 return ret;
725 728
726 vfp_sync_hwstate(thread);
727 thread->vfpstate.hard = new_vfp;
728 vfp_flush_hwstate(thread); 729 vfp_flush_hwstate(thread);
730 thread->vfpstate.hard = new_vfp;
729 731
730 return 0; 732 return 0;
731} 733}
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 0340224cf73c..9e617bd4a146 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -227,6 +227,8 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
227 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) 227 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
228 return -EINVAL; 228 return -EINVAL;
229 229
230 vfp_flush_hwstate(thread);
231
230 /* 232 /*
231 * Copy the floating point registers. There can be unused 233 * Copy the floating point registers. There can be unused
232 * registers see asm/hwcap.h for details. 234 * registers see asm/hwcap.h for details.
@@ -251,9 +253,6 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
251 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err); 253 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
252 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err); 254 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
253 255
254 if (!err)
255 vfp_flush_hwstate(thread);
256
257 return err ? -EFAULT : 0; 256 return err ? -EFAULT : 0;
258} 257}
259 258
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 99a572702509..f84dfe67724f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err)
266{ 266{
267 struct thread_info *thread = current_thread_info(); 267 struct thread_info *thread = current_thread_info();
268 int ret; 268 int ret;
269 enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;
269 270
270 oops_enter(); 271 oops_enter();
271 272
@@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err)
273 console_verbose(); 274 console_verbose();
274 bust_spinlocks(1); 275 bust_spinlocks(1);
275 if (!user_mode(regs)) 276 if (!user_mode(regs))
276 report_bug(regs->ARM_pc, regs); 277 bug_type = report_bug(regs->ARM_pc, regs);
278 if (bug_type != BUG_TRAP_TYPE_NONE)
279 str = "Oops - BUG";
277 ret = __die(str, err, thread, regs); 280 ret = __die(str, err, thread, regs);
278 281
279 if (regs && kexec_should_crash(thread->task)) 282 if (regs && kexec_should_crash(thread->task))
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 1e19691e0406..43a31fb06318 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -10,6 +10,7 @@
10#include <asm/page.h> 10#include <asm/page.h>
11 11
12#define PROC_INFO \ 12#define PROC_INFO \
13 . = ALIGN(4); \
13 VMLINUX_SYMBOL(__proc_info_begin) = .; \ 14 VMLINUX_SYMBOL(__proc_info_begin) = .; \
14 *(.proc.info.init) \ 15 *(.proc.info.init) \
15 VMLINUX_SYMBOL(__proc_info_end) = .; 16 VMLINUX_SYMBOL(__proc_info_end) = .;
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index 9e5e7552498c..45c97b1ee9b1 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -194,6 +194,6 @@ MACHINE_START(BCMRING, "BCMRING")
194 .init_early = bcmring_init_early, 194 .init_early = bcmring_init_early,
195 .init_irq = bcmring_init_irq, 195 .init_irq = bcmring_init_irq,
196 .timer = &bcmring_timer, 196 .timer = &bcmring_timer,
197 .init_machine = bcmring_init_machine 197 .init_machine = bcmring_init_machine,
198 .restart = bcmring_restart, 198 .restart = bcmring_restart,
199MACHINE_END 199MACHINE_END
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 1a1a27dd5654..1024396797e1 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -33,17 +33,11 @@
33 33
34#include <mach/timer.h> 34#include <mach/timer.h>
35 35
36#include <linux/mm.h>
37#include <linux/pfn.h> 36#include <linux/pfn.h>
38#include <linux/atomic.h> 37#include <linux/atomic.h>
39#include <linux/sched.h> 38#include <linux/sched.h>
40#include <mach/dma.h> 39#include <mach/dma.h>
41 40
42/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
43/* especially since dc4 doesn't use kmalloc'd memory. */
44
45#define ALLOW_MAP_OF_KMALLOC_MEMORY 0
46
47/* ---- Public Variables ------------------------------------------------- */ 41/* ---- Public Variables ------------------------------------------------- */
48 42
49/* ---- Private Constants and Types -------------------------------------- */ 43/* ---- Private Constants and Types -------------------------------------- */
@@ -53,24 +47,12 @@
53#define CONTROLLER_FROM_HANDLE(handle) (((handle) >> 4) & 0x0f) 47#define CONTROLLER_FROM_HANDLE(handle) (((handle) >> 4) & 0x0f)
54#define CHANNEL_FROM_HANDLE(handle) ((handle) & 0x0f) 48#define CHANNEL_FROM_HANDLE(handle) ((handle) & 0x0f)
55 49
56#define DMA_MAP_DEBUG 0
57
58#if DMA_MAP_DEBUG
59# define DMA_MAP_PRINT(fmt, args...) printk("%s: " fmt, __func__, ## args)
60#else
61# define DMA_MAP_PRINT(fmt, args...)
62#endif
63 50
64/* ---- Private Variables ------------------------------------------------ */ 51/* ---- Private Variables ------------------------------------------------ */
65 52
66static DMA_Global_t gDMA; 53static DMA_Global_t gDMA;
67static struct proc_dir_entry *gDmaDir; 54static struct proc_dir_entry *gDmaDir;
68 55
69static atomic_t gDmaStatMemTypeKmalloc = ATOMIC_INIT(0);
70static atomic_t gDmaStatMemTypeVmalloc = ATOMIC_INIT(0);
71static atomic_t gDmaStatMemTypeUser = ATOMIC_INIT(0);
72static atomic_t gDmaStatMemTypeCoherent = ATOMIC_INIT(0);
73
74#include "dma_device.c" 56#include "dma_device.c"
75 57
76/* ---- Private Function Prototypes -------------------------------------- */ 58/* ---- Private Function Prototypes -------------------------------------- */
@@ -79,34 +61,6 @@ static atomic_t gDmaStatMemTypeCoherent = ATOMIC_INIT(0);
79 61
80/****************************************************************************/ 62/****************************************************************************/
81/** 63/**
82* Displays information for /proc/dma/mem-type
83*/
84/****************************************************************************/
85
86static int dma_proc_read_mem_type(char *buf, char **start, off_t offset,
87 int count, int *eof, void *data)
88{
89 int len = 0;
90
91 len += sprintf(buf + len, "dma_map_mem statistics\n");
92 len +=
93 sprintf(buf + len, "coherent: %d\n",
94 atomic_read(&gDmaStatMemTypeCoherent));
95 len +=
96 sprintf(buf + len, "kmalloc: %d\n",
97 atomic_read(&gDmaStatMemTypeKmalloc));
98 len +=
99 sprintf(buf + len, "vmalloc: %d\n",
100 atomic_read(&gDmaStatMemTypeVmalloc));
101 len +=
102 sprintf(buf + len, "user: %d\n",
103 atomic_read(&gDmaStatMemTypeUser));
104
105 return len;
106}
107
108/****************************************************************************/
109/**
110* Displays information for /proc/dma/channels 64* Displays information for /proc/dma/channels
111*/ 65*/
112/****************************************************************************/ 66/****************************************************************************/
@@ -846,8 +800,6 @@ int dma_init(void)
846 dma_proc_read_channels, NULL); 800 dma_proc_read_channels, NULL);
847 create_proc_read_entry("devices", 0, gDmaDir, 801 create_proc_read_entry("devices", 0, gDmaDir,
848 dma_proc_read_devices, NULL); 802 dma_proc_read_devices, NULL);
849 create_proc_read_entry("mem-type", 0, gDmaDir,
850 dma_proc_read_mem_type, NULL);
851 } 803 }
852 804
853out: 805out:
@@ -1565,767 +1517,3 @@ int dma_set_device_handler(DMA_Device_t dev, /* Device to set the callback for.
1565} 1517}
1566 1518
1567EXPORT_SYMBOL(dma_set_device_handler); 1519EXPORT_SYMBOL(dma_set_device_handler);
1568
1569/****************************************************************************/
1570/**
1571* Initializes a memory mapping structure
1572*/
1573/****************************************************************************/
1574
1575int dma_init_mem_map(DMA_MemMap_t *memMap)
1576{
1577 memset(memMap, 0, sizeof(*memMap));
1578
1579 sema_init(&memMap->lock, 1);
1580
1581 return 0;
1582}
1583
1584EXPORT_SYMBOL(dma_init_mem_map);
1585
1586/****************************************************************************/
1587/**
1588* Releases any memory currently being held by a memory mapping structure.
1589*/
1590/****************************************************************************/
1591
1592int dma_term_mem_map(DMA_MemMap_t *memMap)
1593{
1594 down(&memMap->lock); /* Just being paranoid */
1595
1596 /* Free up any allocated memory */
1597
1598 up(&memMap->lock);
1599 memset(memMap, 0, sizeof(*memMap));
1600
1601 return 0;
1602}
1603
1604EXPORT_SYMBOL(dma_term_mem_map);
1605
1606/****************************************************************************/
1607/**
1608* Looks at a memory address and categorizes it.
1609*
1610* @return One of the values from the DMA_MemType_t enumeration.
1611*/
1612/****************************************************************************/
1613
1614DMA_MemType_t dma_mem_type(void *addr)
1615{
1616 unsigned long addrVal = (unsigned long)addr;
1617
1618 if (addrVal >= CONSISTENT_BASE) {
1619 /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */
1620
1621 /* dma_alloc_xxx pages are physically and virtually contiguous */
1622
1623 return DMA_MEM_TYPE_DMA;
1624 }
1625
1626 /* Technically, we could add one more classification. Addresses between VMALLOC_END */
1627 /* and the beginning of the DMA virtual address could be considered to be I/O space. */
1628 /* Right now, nobody cares about this particular classification, so we ignore it. */
1629
1630 if (is_vmalloc_addr(addr)) {
1631 /* Address comes from the vmalloc'd region. Pages are virtually */
1632 /* contiguous but NOT physically contiguous */
1633
1634 return DMA_MEM_TYPE_VMALLOC;
1635 }
1636
1637 if (addrVal >= PAGE_OFFSET) {
1638 /* PAGE_OFFSET is typically 0xC0000000 */
1639
1640 /* kmalloc'd pages are physically contiguous */
1641
1642 return DMA_MEM_TYPE_KMALLOC;
1643 }
1644
1645 return DMA_MEM_TYPE_USER;
1646}
1647
1648EXPORT_SYMBOL(dma_mem_type);
1649
1650/****************************************************************************/
1651/**
1652* Looks at a memory address and determines if we support DMA'ing to/from
1653* that type of memory.
1654*
1655* @return boolean -
1656* return value != 0 means dma supported
1657* return value == 0 means dma not supported
1658*/
1659/****************************************************************************/
1660
1661int dma_mem_supports_dma(void *addr)
1662{
1663 DMA_MemType_t memType = dma_mem_type(addr);
1664
1665 return (memType == DMA_MEM_TYPE_DMA)
1666#if ALLOW_MAP_OF_KMALLOC_MEMORY
1667 || (memType == DMA_MEM_TYPE_KMALLOC)
1668#endif
1669 || (memType == DMA_MEM_TYPE_USER);
1670}
1671
1672EXPORT_SYMBOL(dma_mem_supports_dma);
1673
1674/****************************************************************************/
1675/**
1676* Maps in a memory region such that it can be used for performing a DMA.
1677*
1678* @return
1679*/
1680/****************************************************************************/
1681
1682int dma_map_start(DMA_MemMap_t *memMap, /* Stores state information about the map */
1683 enum dma_data_direction dir /* Direction that the mapping will be going */
1684 ) {
1685 int rc;
1686
1687 down(&memMap->lock);
1688
1689 DMA_MAP_PRINT("memMap: %p\n", memMap);
1690
1691 if (memMap->inUse) {
1692 printk(KERN_ERR "%s: memory map %p is already being used\n",
1693 __func__, memMap);
1694 rc = -EBUSY;
1695 goto out;
1696 }
1697
1698 memMap->inUse = 1;
1699 memMap->dir = dir;
1700 memMap->numRegionsUsed = 0;
1701
1702 rc = 0;
1703
1704out:
1705
1706 DMA_MAP_PRINT("returning %d", rc);
1707
1708 up(&memMap->lock);
1709
1710 return rc;
1711}
1712
1713EXPORT_SYMBOL(dma_map_start);
1714
1715/****************************************************************************/
1716/**
1717* Adds a segment of memory to a memory map. Each segment is both
1718* physically and virtually contiguous.
1719*
1720* @return 0 on success, error code otherwise.
1721*/
1722/****************************************************************************/
1723
1724static int dma_map_add_segment(DMA_MemMap_t *memMap, /* Stores state information about the map */
1725 DMA_Region_t *region, /* Region that the segment belongs to */
1726 void *virtAddr, /* Virtual address of the segment being added */
1727 dma_addr_t physAddr, /* Physical address of the segment being added */
1728 size_t numBytes /* Number of bytes of the segment being added */
1729 ) {
1730 DMA_Segment_t *segment;
1731
1732 DMA_MAP_PRINT("memMap:%p va:%p pa:0x%x #:%d\n", memMap, virtAddr,
1733 physAddr, numBytes);
1734
1735 /* Sanity check */
1736
1737 if (((unsigned long)virtAddr < (unsigned long)region->virtAddr)
1738 || (((unsigned long)virtAddr + numBytes)) >
1739 ((unsigned long)region->virtAddr + region->numBytes)) {
1740 printk(KERN_ERR
1741 "%s: virtAddr %p is outside region @ %p len: %d\n",
1742 __func__, virtAddr, region->virtAddr, region->numBytes);
1743 return -EINVAL;
1744 }
1745
1746 if (region->numSegmentsUsed > 0) {
1747 /* Check to see if this segment is physically contiguous with the previous one */
1748
1749 segment = &region->segment[region->numSegmentsUsed - 1];
1750
1751 if ((segment->physAddr + segment->numBytes) == physAddr) {
1752 /* It is - just add on to the end */
1753
1754 DMA_MAP_PRINT("appending %d bytes to last segment\n",
1755 numBytes);
1756
1757 segment->numBytes += numBytes;
1758
1759 return 0;
1760 }
1761 }
1762
1763 /* Reallocate to hold more segments, if required. */
1764
1765 if (region->numSegmentsUsed >= region->numSegmentsAllocated) {
1766 DMA_Segment_t *newSegment;
1767 size_t oldSize =
1768 region->numSegmentsAllocated * sizeof(*newSegment);
1769 int newAlloc = region->numSegmentsAllocated + 4;
1770 size_t newSize = newAlloc * sizeof(*newSegment);
1771
1772 newSegment = kmalloc(newSize, GFP_KERNEL);
1773 if (newSegment == NULL) {
1774 return -ENOMEM;
1775 }
1776 memcpy(newSegment, region->segment, oldSize);
1777 memset(&((uint8_t *) newSegment)[oldSize], 0,
1778 newSize - oldSize);
1779 kfree(region->segment);
1780
1781 region->numSegmentsAllocated = newAlloc;
1782 region->segment = newSegment;
1783 }
1784
1785 segment = &region->segment[region->numSegmentsUsed];
1786 region->numSegmentsUsed++;
1787
1788 segment->virtAddr = virtAddr;
1789 segment->physAddr = physAddr;
1790 segment->numBytes = numBytes;
1791
1792 DMA_MAP_PRINT("returning success\n");
1793
1794 return 0;
1795}
1796
1797/****************************************************************************/
1798/**
1799* Adds a region of memory to a memory map. Each region is virtually
1800* contiguous, but not necessarily physically contiguous.
1801*
1802* @return 0 on success, error code otherwise.
1803*/
1804/****************************************************************************/
1805
1806int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about the map */
1807 void *mem, /* Virtual address that we want to get a map of */
1808 size_t numBytes /* Number of bytes being mapped */
1809 ) {
1810 unsigned long addr = (unsigned long)mem;
1811 unsigned int offset;
1812 int rc = 0;
1813 DMA_Region_t *region;
1814 dma_addr_t physAddr;
1815
1816 down(&memMap->lock);
1817
1818 DMA_MAP_PRINT("memMap:%p va:%p #:%d\n", memMap, mem, numBytes);
1819
1820 if (!memMap->inUse) {
1821 printk(KERN_ERR "%s: Make sure you call dma_map_start first\n",
1822 __func__);
1823 rc = -EINVAL;
1824 goto out;
1825 }
1826
1827 /* Reallocate to hold more regions. */
1828
1829 if (memMap->numRegionsUsed >= memMap->numRegionsAllocated) {
1830 DMA_Region_t *newRegion;
1831 size_t oldSize =
1832 memMap->numRegionsAllocated * sizeof(*newRegion);
1833 int newAlloc = memMap->numRegionsAllocated + 4;
1834 size_t newSize = newAlloc * sizeof(*newRegion);
1835
1836 newRegion = kmalloc(newSize, GFP_KERNEL);
1837 if (newRegion == NULL) {
1838 rc = -ENOMEM;
1839 goto out;
1840 }
1841 memcpy(newRegion, memMap->region, oldSize);
1842 memset(&((uint8_t *) newRegion)[oldSize], 0, newSize - oldSize);
1843
1844 kfree(memMap->region);
1845
1846 memMap->numRegionsAllocated = newAlloc;
1847 memMap->region = newRegion;
1848 }
1849
1850 region = &memMap->region[memMap->numRegionsUsed];
1851 memMap->numRegionsUsed++;
1852
1853 offset = addr & ~PAGE_MASK;
1854
1855 region->memType = dma_mem_type(mem);
1856 region->virtAddr = mem;
1857 region->numBytes = numBytes;
1858 region->numSegmentsUsed = 0;
1859 region->numLockedPages = 0;
1860 region->lockedPages = NULL;
1861
1862 switch (region->memType) {
1863 case DMA_MEM_TYPE_VMALLOC:
1864 {
1865 atomic_inc(&gDmaStatMemTypeVmalloc);
1866
1867 /* printk(KERN_ERR "%s: vmalloc'd pages are not supported\n", __func__); */
1868
1869 /* vmalloc'd pages are not physically contiguous */
1870
1871 rc = -EINVAL;
1872 break;
1873 }
1874
1875 case DMA_MEM_TYPE_KMALLOC:
1876 {
1877 atomic_inc(&gDmaStatMemTypeKmalloc);
1878
1879 /* kmalloc'd pages are physically contiguous, so they'll have exactly */
1880 /* one segment */
1881
1882#if ALLOW_MAP_OF_KMALLOC_MEMORY
1883 physAddr =
1884 dma_map_single(NULL, mem, numBytes, memMap->dir);
1885 rc = dma_map_add_segment(memMap, region, mem, physAddr,
1886 numBytes);
1887#else
1888 rc = -EINVAL;
1889#endif
1890 break;
1891 }
1892
1893 case DMA_MEM_TYPE_DMA:
1894 {
1895 /* dma_alloc_xxx pages are physically contiguous */
1896
1897 atomic_inc(&gDmaStatMemTypeCoherent);
1898
1899 physAddr = (vmalloc_to_pfn(mem) << PAGE_SHIFT) + offset;
1900
1901 dma_sync_single_for_cpu(NULL, physAddr, numBytes,
1902 memMap->dir);
1903 rc = dma_map_add_segment(memMap, region, mem, physAddr,
1904 numBytes);
1905 break;
1906 }
1907
1908 case DMA_MEM_TYPE_USER:
1909 {
1910 size_t firstPageOffset;
1911 size_t firstPageSize;
1912 struct page **pages;
1913 struct task_struct *userTask;
1914
1915 atomic_inc(&gDmaStatMemTypeUser);
1916
1917#if 1
1918 /* If the pages are user pages, then the dma_mem_map_set_user_task function */
1919 /* must have been previously called. */
1920
1921 if (memMap->userTask == NULL) {
1922 printk(KERN_ERR
1923 "%s: must call dma_mem_map_set_user_task when using user-mode memory\n",
1924 __func__);
1925 return -EINVAL;
1926 }
1927
1928 /* User pages need to be locked. */
1929
1930 firstPageOffset =
1931 (unsigned long)region->virtAddr & (PAGE_SIZE - 1);
1932 firstPageSize = PAGE_SIZE - firstPageOffset;
1933
1934 region->numLockedPages = (firstPageOffset
1935 + region->numBytes +
1936 PAGE_SIZE - 1) / PAGE_SIZE;
1937 pages =
1938 kmalloc(region->numLockedPages *
1939 sizeof(struct page *), GFP_KERNEL);
1940
1941 if (pages == NULL) {
1942 region->numLockedPages = 0;
1943 return -ENOMEM;
1944 }
1945
1946 userTask = memMap->userTask;
1947
1948 down_read(&userTask->mm->mmap_sem);
1949 rc = get_user_pages(userTask, /* task */
1950 userTask->mm, /* mm */
1951 (unsigned long)region->virtAddr, /* start */
1952 region->numLockedPages, /* len */
1953 memMap->dir == DMA_FROM_DEVICE, /* write */
1954 0, /* force */
1955 pages, /* pages (array of pointers to page) */
1956 NULL); /* vmas */
1957 up_read(&userTask->mm->mmap_sem);
1958
1959 if (rc != region->numLockedPages) {
1960 kfree(pages);
1961 region->numLockedPages = 0;
1962
1963 if (rc >= 0) {
1964 rc = -EINVAL;
1965 }
1966 } else {
1967 uint8_t *virtAddr = region->virtAddr;
1968 size_t bytesRemaining;
1969 int pageIdx;
1970
1971 rc = 0; /* Since get_user_pages returns +ve number */
1972
1973 region->lockedPages = pages;
1974
1975 /* We've locked the user pages. Now we need to walk them and figure */
1976 /* out the physical addresses. */
1977
1978 /* The first page may be partial */
1979
1980 dma_map_add_segment(memMap,
1981 region,
1982 virtAddr,
1983 PFN_PHYS(page_to_pfn
1984 (pages[0])) +
1985 firstPageOffset,
1986 firstPageSize);
1987
1988 virtAddr += firstPageSize;
1989 bytesRemaining =
1990 region->numBytes - firstPageSize;
1991
1992 for (pageIdx = 1;
1993 pageIdx < region->numLockedPages;
1994 pageIdx++) {
1995 size_t bytesThisPage =
1996 (bytesRemaining >
1997 PAGE_SIZE ? PAGE_SIZE :
1998 bytesRemaining);
1999
2000 DMA_MAP_PRINT
2001 ("pageIdx:%d pages[pageIdx]=%p pfn=%u phys=%u\n",
2002 pageIdx, pages[pageIdx],
2003 page_to_pfn(pages[pageIdx]),
2004 PFN_PHYS(page_to_pfn
2005 (pages[pageIdx])));
2006
2007 dma_map_add_segment(memMap,
2008 region,
2009 virtAddr,
2010 PFN_PHYS(page_to_pfn
2011 (pages
2012 [pageIdx])),
2013 bytesThisPage);
2014
2015 virtAddr += bytesThisPage;
2016 bytesRemaining -= bytesThisPage;
2017 }
2018 }
2019#else
2020 printk(KERN_ERR
2021 "%s: User mode pages are not yet supported\n",
2022 __func__);
2023
2024 /* user pages are not physically contiguous */
2025
2026 rc = -EINVAL;
2027#endif
2028 break;
2029 }
2030
2031 default:
2032 {
2033 printk(KERN_ERR "%s: Unsupported memory type: %d\n",
2034 __func__, region->memType);
2035
2036 rc = -EINVAL;
2037 break;
2038 }
2039 }
2040
2041 if (rc != 0) {
2042 memMap->numRegionsUsed--;
2043 }
2044
2045out:
2046
2047 DMA_MAP_PRINT("returning %d\n", rc);
2048
2049 up(&memMap->lock);
2050
2051 return rc;
2052}
2053
2054EXPORT_SYMBOL(dma_map_add_segment);
2055
2056/****************************************************************************/
2057/**
2058* Maps in a memory region such that it can be used for performing a DMA.
2059*
2060* @return 0 on success, error code otherwise.
2061*/
2062/****************************************************************************/
2063
2064int dma_map_mem(DMA_MemMap_t *memMap, /* Stores state information about the map */
2065 void *mem, /* Virtual address that we want to get a map of */
2066 size_t numBytes, /* Number of bytes being mapped */
2067 enum dma_data_direction dir /* Direction that the mapping will be going */
2068 ) {
2069 int rc;
2070
2071 rc = dma_map_start(memMap, dir);
2072 if (rc == 0) {
2073 rc = dma_map_add_region(memMap, mem, numBytes);
2074 if (rc < 0) {
2075 /* Since the add fails, this function will fail, and the caller won't */
2076 /* call unmap, so we need to do it here. */
2077
2078 dma_unmap(memMap, 0);
2079 }
2080 }
2081
2082 return rc;
2083}
2084
2085EXPORT_SYMBOL(dma_map_mem);
2086
2087/****************************************************************************/
2088/**
2089* Setup a descriptor ring for a given memory map.
2090*
2091* It is assumed that the descriptor ring has already been initialized, and
2092* this routine will only reallocate a new descriptor ring if the existing
2093* one is too small.
2094*
2095* @return 0 on success, error code otherwise.
2096*/
2097/****************************************************************************/
2098
2099int dma_map_create_descriptor_ring(DMA_Device_t dev, /* DMA device (where the ring is stored) */
2100 DMA_MemMap_t *memMap, /* Memory map that will be used */
2101 dma_addr_t devPhysAddr /* Physical address of device */
2102 ) {
2103 int rc;
2104 int numDescriptors;
2105 DMA_DeviceAttribute_t *devAttr;
2106 DMA_Region_t *region;
2107 DMA_Segment_t *segment;
2108 dma_addr_t srcPhysAddr;
2109 dma_addr_t dstPhysAddr;
2110 int regionIdx;
2111 int segmentIdx;
2112
2113 devAttr = &DMA_gDeviceAttribute[dev];
2114
2115 down(&memMap->lock);
2116
2117 /* Figure out how many descriptors we need */
2118
2119 numDescriptors = 0;
2120 for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
2121 region = &memMap->region[regionIdx];
2122
2123 for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed;
2124 segmentIdx++) {
2125 segment = &region->segment[segmentIdx];
2126
2127 if (memMap->dir == DMA_TO_DEVICE) {
2128 srcPhysAddr = segment->physAddr;
2129 dstPhysAddr = devPhysAddr;
2130 } else {
2131 srcPhysAddr = devPhysAddr;
2132 dstPhysAddr = segment->physAddr;
2133 }
2134
2135 rc =
2136 dma_calculate_descriptor_count(dev, srcPhysAddr,
2137 dstPhysAddr,
2138 segment->
2139 numBytes);
2140 if (rc < 0) {
2141 printk(KERN_ERR
2142 "%s: dma_calculate_descriptor_count failed: %d\n",
2143 __func__, rc);
2144 goto out;
2145 }
2146 numDescriptors += rc;
2147 }
2148 }
2149
2150 /* Adjust the size of the ring, if it isn't big enough */
2151
2152 if (numDescriptors > devAttr->ring.descriptorsAllocated) {
2153 dma_free_descriptor_ring(&devAttr->ring);
2154 rc =
2155 dma_alloc_descriptor_ring(&devAttr->ring,
2156 numDescriptors);
2157 if (rc < 0) {
2158 printk(KERN_ERR
2159 "%s: dma_alloc_descriptor_ring failed: %d\n",
2160 __func__, rc);
2161 goto out;
2162 }
2163 } else {
2164 rc =
2165 dma_init_descriptor_ring(&devAttr->ring,
2166 numDescriptors);
2167 if (rc < 0) {
2168 printk(KERN_ERR
2169 "%s: dma_init_descriptor_ring failed: %d\n",
2170 __func__, rc);
2171 goto out;
2172 }
2173 }
2174
2175 /* Populate the descriptors */
2176
2177 for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
2178 region = &memMap->region[regionIdx];
2179
2180 for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed;
2181 segmentIdx++) {
2182 segment = &region->segment[segmentIdx];
2183
2184 if (memMap->dir == DMA_TO_DEVICE) {
2185 srcPhysAddr = segment->physAddr;
2186 dstPhysAddr = devPhysAddr;
2187 } else {
2188 srcPhysAddr = devPhysAddr;
2189 dstPhysAddr = segment->physAddr;
2190 }
2191
2192 rc =
2193 dma_add_descriptors(&devAttr->ring, dev,
2194 srcPhysAddr, dstPhysAddr,
2195 segment->numBytes);
2196 if (rc < 0) {
2197 printk(KERN_ERR
2198 "%s: dma_add_descriptors failed: %d\n",
2199 __func__, rc);
2200 goto out;
2201 }
2202 }
2203 }
2204
2205 rc = 0;
2206
2207out:
2208
2209 up(&memMap->lock);
2210 return rc;
2211}
2212
2213EXPORT_SYMBOL(dma_map_create_descriptor_ring);
2214
2215/****************************************************************************/
2216/**
2217* Maps in a memory region such that it can be used for performing a DMA.
2218*
2219* @return
2220*/
2221/****************************************************************************/
2222
2223int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
2224 int dirtied /* non-zero if any of the pages were modified */
2225 ) {
2226
2227 int rc = 0;
2228 int regionIdx;
2229 int segmentIdx;
2230 DMA_Region_t *region;
2231 DMA_Segment_t *segment;
2232
2233 down(&memMap->lock);
2234
2235 for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
2236 region = &memMap->region[regionIdx];
2237
2238 for (segmentIdx = 0; segmentIdx < region->numSegmentsUsed;
2239 segmentIdx++) {
2240 segment = &region->segment[segmentIdx];
2241
2242 switch (region->memType) {
2243 case DMA_MEM_TYPE_VMALLOC:
2244 {
2245 printk(KERN_ERR
2246 "%s: vmalloc'd pages are not yet supported\n",
2247 __func__);
2248 rc = -EINVAL;
2249 goto out;
2250 }
2251
2252 case DMA_MEM_TYPE_KMALLOC:
2253 {
2254#if ALLOW_MAP_OF_KMALLOC_MEMORY
2255 dma_unmap_single(NULL,
2256 segment->physAddr,
2257 segment->numBytes,
2258 memMap->dir);
2259#endif
2260 break;
2261 }
2262
2263 case DMA_MEM_TYPE_DMA:
2264 {
2265 dma_sync_single_for_cpu(NULL,
2266 segment->
2267 physAddr,
2268 segment->
2269 numBytes,
2270 memMap->dir);
2271 break;
2272 }
2273
2274 case DMA_MEM_TYPE_USER:
2275 {
2276 /* Nothing to do here. */
2277
2278 break;
2279 }
2280
2281 default:
2282 {
2283 printk(KERN_ERR
2284 "%s: Unsupported memory type: %d\n",
2285 __func__, region->memType);
2286 rc = -EINVAL;
2287 goto out;
2288 }
2289 }
2290
2291 segment->virtAddr = NULL;
2292 segment->physAddr = 0;
2293 segment->numBytes = 0;
2294 }
2295
2296 if (region->numLockedPages > 0) {
2297 int pageIdx;
2298
2299 /* Some user pages were locked. We need to go and unlock them now. */
2300
2301 for (pageIdx = 0; pageIdx < region->numLockedPages;
2302 pageIdx++) {
2303 struct page *page =
2304 region->lockedPages[pageIdx];
2305
2306 if (memMap->dir == DMA_FROM_DEVICE) {
2307 SetPageDirty(page);
2308 }
2309 page_cache_release(page);
2310 }
2311 kfree(region->lockedPages);
2312 region->numLockedPages = 0;
2313 region->lockedPages = NULL;
2314 }
2315
2316 region->memType = DMA_MEM_TYPE_NONE;
2317 region->virtAddr = NULL;
2318 region->numBytes = 0;
2319 region->numSegmentsUsed = 0;
2320 }
2321 memMap->userTask = NULL;
2322 memMap->numRegionsUsed = 0;
2323 memMap->inUse = 0;
2324
2325out:
2326 up(&memMap->lock);
2327
2328 return rc;
2329}
2330
2331EXPORT_SYMBOL(dma_unmap);
diff --git a/arch/arm/mach-bcmring/include/mach/dma.h b/arch/arm/mach-bcmring/include/mach/dma.h
index 1f2c5319c056..72543781207b 100644
--- a/arch/arm/mach-bcmring/include/mach/dma.h
+++ b/arch/arm/mach-bcmring/include/mach/dma.h
@@ -26,15 +26,9 @@
26/* ---- Include Files ---------------------------------------------------- */ 26/* ---- Include Files ---------------------------------------------------- */
27 27
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/wait.h>
30#include <linux/semaphore.h> 29#include <linux/semaphore.h>
31#include <csp/dmacHw.h> 30#include <csp/dmacHw.h>
32#include <mach/timer.h> 31#include <mach/timer.h>
33#include <linux/scatterlist.h>
34#include <linux/dma-mapping.h>
35#include <linux/mm.h>
36#include <linux/vmalloc.h>
37#include <linux/pagemap.h>
38 32
39/* ---- Constants and Types ---------------------------------------------- */ 33/* ---- Constants and Types ---------------------------------------------- */
40 34
@@ -113,78 +107,6 @@ typedef struct {
113 107
114/**************************************************************************** 108/****************************************************************************
115* 109*
116* The DMA_MemType_t and DMA_MemMap_t are helper structures used to setup
117* DMA chains from a variety of memory sources.
118*
119*****************************************************************************/
120
121#define DMA_MEM_MAP_MIN_SIZE 4096 /* Pages less than this size are better */
122 /* off not being DMA'd. */
123
124typedef enum {
125 DMA_MEM_TYPE_NONE, /* Not a valid setting */
126 DMA_MEM_TYPE_VMALLOC, /* Memory came from vmalloc call */
127 DMA_MEM_TYPE_KMALLOC, /* Memory came from kmalloc call */
128 DMA_MEM_TYPE_DMA, /* Memory came from dma_alloc_xxx call */
129 DMA_MEM_TYPE_USER, /* Memory came from user space. */
130
131} DMA_MemType_t;
132
133/* A segment represents a physically and virtually contiguous chunk of memory. */
134/* i.e. each segment can be DMA'd */
135/* A user of the DMA code will add memory regions. Each region may need to be */
136/* represented by one or more segments. */
137
138typedef struct {
139 void *virtAddr; /* Virtual address used for this segment */
140 dma_addr_t physAddr; /* Physical address this segment maps to */
141 size_t numBytes; /* Size of the segment, in bytes */
142
143} DMA_Segment_t;
144
145/* A region represents a virtually contiguous chunk of memory, which may be */
146/* made up of multiple segments. */
147
148typedef struct {
149 DMA_MemType_t memType;
150 void *virtAddr;
151 size_t numBytes;
152
153 /* Each region (virtually contiguous) consists of one or more segments. Each */
154 /* segment is virtually and physically contiguous. */
155
156 int numSegmentsUsed;
157 int numSegmentsAllocated;
158 DMA_Segment_t *segment;
159
160 /* When a region corresponds to user memory, we need to lock all of the pages */
161 /* down before we can figure out the physical addresses. The lockedPage array contains */
162 /* the pages that were locked, and which subsequently need to be unlocked once the */
163 /* memory is unmapped. */
164
165 unsigned numLockedPages;
166 struct page **lockedPages;
167
168} DMA_Region_t;
169
170typedef struct {
171 int inUse; /* Is this mapping currently being used? */
172 struct semaphore lock; /* Acquired when using this structure */
173 enum dma_data_direction dir; /* Direction this transfer is intended for */
174
175 /* In the event that we're mapping user memory, we need to know which task */
176 /* the memory is for, so that we can obtain the correct mm locks. */
177
178 struct task_struct *userTask;
179
180 int numRegionsUsed;
181 int numRegionsAllocated;
182 DMA_Region_t *region;
183
184} DMA_MemMap_t;
185
186/****************************************************************************
187*
188* The DMA_DeviceAttribute_t contains information which describes a 110* The DMA_DeviceAttribute_t contains information which describes a
189* particular DMA device (or peripheral). 111* particular DMA device (or peripheral).
190* 112*
@@ -570,124 +492,6 @@ int dma_alloc_double_dst_descriptors(DMA_Handle_t handle, /* DMA Handle */
570 492
571/****************************************************************************/ 493/****************************************************************************/
572/** 494/**
573* Initializes a DMA_MemMap_t data structure
574*/
575/****************************************************************************/
576
577int dma_init_mem_map(DMA_MemMap_t *memMap /* Stores state information about the map */
578 );
579
580/****************************************************************************/
581/**
582* Releases any memory currently being held by a memory mapping structure.
583*/
584/****************************************************************************/
585
586int dma_term_mem_map(DMA_MemMap_t *memMap /* Stores state information about the map */
587 );
588
589/****************************************************************************/
590/**
591* Looks at a memory address and categorizes it.
592*
593* @return One of the values from the DMA_MemType_t enumeration.
594*/
595/****************************************************************************/
596
597DMA_MemType_t dma_mem_type(void *addr);
598
599/****************************************************************************/
600/**
601* Sets the process (aka userTask) associated with a mem map. This is
602* required if user-mode segments will be added to the mapping.
603*/
604/****************************************************************************/
605
606static inline void dma_mem_map_set_user_task(DMA_MemMap_t *memMap,
607 struct task_struct *task)
608{
609 memMap->userTask = task;
610}
611
612/****************************************************************************/
613/**
614* Looks at a memory address and determines if we support DMA'ing to/from
615* that type of memory.
616*
617* @return boolean -
618* return value != 0 means dma supported
619* return value == 0 means dma not supported
620*/
621/****************************************************************************/
622
623int dma_mem_supports_dma(void *addr);
624
625/****************************************************************************/
626/**
627* Initializes a memory map for use. Since this function acquires a
628* sempaphore within the memory map, it is VERY important that dma_unmap
629* be called when you're finished using the map.
630*/
631/****************************************************************************/
632
633int dma_map_start(DMA_MemMap_t *memMap, /* Stores state information about the map */
634 enum dma_data_direction dir /* Direction that the mapping will be going */
635 );
636
637/****************************************************************************/
638/**
639* Adds a segment of memory to a memory map.
640*
641* @return 0 on success, error code otherwise.
642*/
643/****************************************************************************/
644
645int dma_map_add_region(DMA_MemMap_t *memMap, /* Stores state information about the map */
646 void *mem, /* Virtual address that we want to get a map of */
647 size_t numBytes /* Number of bytes being mapped */
648 );
649
650/****************************************************************************/
651/**
652* Creates a descriptor ring from a memory mapping.
653*
654* @return 0 on success, error code otherwise.
655*/
656/****************************************************************************/
657
658int dma_map_create_descriptor_ring(DMA_Device_t dev, /* DMA device (where the ring is stored) */
659 DMA_MemMap_t *memMap, /* Memory map that will be used */
660 dma_addr_t devPhysAddr /* Physical address of device */
661 );
662
663/****************************************************************************/
664/**
665* Maps in a memory region such that it can be used for performing a DMA.
666*
667* @return
668*/
669/****************************************************************************/
670
671int dma_map_mem(DMA_MemMap_t *memMap, /* Stores state information about the map */
672 void *addr, /* Virtual address that we want to get a map of */
673 size_t count, /* Number of bytes being mapped */
674 enum dma_data_direction dir /* Direction that the mapping will be going */
675 );
676
677/****************************************************************************/
678/**
679* Maps in a memory region such that it can be used for performing a DMA.
680*
681* @return
682*/
683/****************************************************************************/
684
685int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
686 int dirtied /* non-zero if any of the pages were modified */
687 );
688
689/****************************************************************************/
690/**
691* Initiates a transfer when the descriptors have already been setup. 495* Initiates a transfer when the descriptors have already been setup.
692* 496*
693* This is a special case, and normally, the dma_transfer_xxx functions should 497* This is a special case, and normally, the dma_transfer_xxx functions should
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 6b22b543a83f..d5088900af6c 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -44,7 +44,7 @@
44#include <mach/aemif.h> 44#include <mach/aemif.h>
45#include <mach/spi.h> 45#include <mach/spi.h>
46 46
47#define DA850_EVM_PHY_ID "0:00" 47#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
48#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) 48#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
49#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) 49#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
50 50
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 346e1de2f5a8..849311d3cb7c 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -54,7 +54,7 @@ static inline int have_tvp7002(void)
54 return 0; 54 return 0;
55} 55}
56 56
57#define DM365_EVM_PHY_ID "0:01" 57#define DM365_EVM_PHY_ID "davinci_mdio-0:01"
58/* 58/*
59 * A MAX-II CPLD is used for various board control functions. 59 * A MAX-II CPLD is used for various board control functions.
60 */ 60 */
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index a64b49cfedca..1247ecdcf752 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -40,7 +40,7 @@
40#include <mach/usb.h> 40#include <mach/usb.h>
41#include <mach/aemif.h> 41#include <mach/aemif.h>
42 42
43#define DM644X_EVM_PHY_ID "0:01" 43#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
44#define LXT971_PHY_ID (0x001378e2) 44#define LXT971_PHY_ID (0x001378e2)
45#define LXT971_PHY_MASK (0xfffffff0) 45#define LXT971_PHY_MASK (0xfffffff0)
46 46
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 64017558860b..872ac69fa049 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -736,7 +736,7 @@ static struct davinci_uart_config uart_config __initdata = {
736 .enabled_uarts = (1 << 0), 736 .enabled_uarts = (1 << 0),
737}; 737};
738 738
739#define DM646X_EVM_PHY_ID "0:01" 739#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
740/* 740/*
741 * The following EDMA channels/slots are not being used by drivers (for 741 * The following EDMA channels/slots are not being used by drivers (for
742 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being 742 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 6c4a16415d47..8d34f513d415 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -39,7 +39,7 @@
39#include <mach/mmc.h> 39#include <mach/mmc.h>
40#include <mach/usb.h> 40#include <mach/usb.h>
41 41
42#define NEUROS_OSD2_PHY_ID "0:01" 42#define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
43#define LXT971_PHY_ID 0x001378e2 43#define LXT971_PHY_ID 0x001378e2
44#define LXT971_PHY_MASK 0xfffffff0 44#define LXT971_PHY_MASK 0xfffffff0
45 45
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index e7c0c7c53493..45e815760a27 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -21,7 +21,7 @@
21#include <mach/da8xx.h> 21#include <mach/da8xx.h>
22#include <mach/mux.h> 22#include <mach/mux.h>
23 23
24#define HAWKBOARD_PHY_ID "0:07" 24#define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
25#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) 25#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
26#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) 26#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
27 27
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 0b136a831c59..31da3c5b2ba3 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -42,7 +42,7 @@
42#include <mach/mux.h> 42#include <mach/mux.h>
43#include <mach/usb.h> 43#include <mach/usb.h>
44 44
45#define SFFSDR_PHY_ID "0:01" 45#define SFFSDR_PHY_ID "davinci_mdio-0:01"
46static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { 46static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
47 /* U-Boot Environment: Block 0 47 /* U-Boot Environment: Block 0
48 * UBL: Block 1 48 * UBL: Block 1
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 0ed7fdb64efb..992c4c410185 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -153,34 +153,6 @@ static struct clk pll1_sysclk3 = {
153 .div_reg = PLLDIV3, 153 .div_reg = PLLDIV3,
154}; 154};
155 155
156static struct clk pll1_sysclk4 = {
157 .name = "pll1_sysclk4",
158 .parent = &pll1_clk,
159 .flags = CLK_PLL,
160 .div_reg = PLLDIV4,
161};
162
163static struct clk pll1_sysclk5 = {
164 .name = "pll1_sysclk5",
165 .parent = &pll1_clk,
166 .flags = CLK_PLL,
167 .div_reg = PLLDIV5,
168};
169
170static struct clk pll1_sysclk6 = {
171 .name = "pll0_sysclk6",
172 .parent = &pll0_clk,
173 .flags = CLK_PLL,
174 .div_reg = PLLDIV6,
175};
176
177static struct clk pll1_sysclk7 = {
178 .name = "pll1_sysclk7",
179 .parent = &pll1_clk,
180 .flags = CLK_PLL,
181 .div_reg = PLLDIV7,
182};
183
184static struct clk i2c0_clk = { 156static struct clk i2c0_clk = {
185 .name = "i2c0", 157 .name = "i2c0",
186 .parent = &pll0_aux_clk, 158 .parent = &pll0_aux_clk,
@@ -397,10 +369,6 @@ static struct clk_lookup da850_clks[] = {
397 CLK(NULL, "pll1_aux", &pll1_aux_clk), 369 CLK(NULL, "pll1_aux", &pll1_aux_clk),
398 CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), 370 CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
399 CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), 371 CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
400 CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
401 CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
402 CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
403 CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
404 CLK("i2c_davinci.1", NULL, &i2c0_clk), 372 CLK("i2c_davinci.1", NULL, &i2c0_clk),
405 CLK(NULL, "timer0", &timerp64_0_clk), 373 CLK(NULL, "timer0", &timerp64_0_clk),
406 CLK("watchdog", NULL, &timerp64_1_clk), 374 CLK("watchdog", NULL, &timerp64_1_clk),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index c59e18871006..6de298c5d2d3 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -402,7 +402,7 @@ void __init exynos4_init_irq(void)
402 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; 402 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
403 403
404 if (!of_have_populated_dt()) 404 if (!of_have_populated_dt())
405 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); 405 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
406#ifdef CONFIG_OF 406#ifdef CONFIG_OF
407 else 407 else
408 of_irq_init(exynos4_dt_irq_match); 408 of_irq_init(exynos4_dt_irq_match);
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index e6bad17b908c..1e03ef42faa0 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -47,7 +47,7 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
47static int __init imx51_tzic_add_irq_domain(struct device_node *np, 47static int __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent) 48 struct device_node *interrupt_parent)
49{ 49{
50 irq_domain_add_simple(np, 0); 50 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
51 return 0; 51 return 0;
52} 52}
53 53
@@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np,
57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
58 58
59 gpio_irq_base -= 32; 59 gpio_irq_base -= 32;
60 irq_domain_add_simple(np, gpio_irq_base); 60 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
61 61
62 return 0; 62 return 0;
63} 63}
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 05ebb3e68679..fd5be0f20fbb 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -51,7 +51,7 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
51static int __init imx53_tzic_add_irq_domain(struct device_node *np, 51static int __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent) 52 struct device_node *interrupt_parent)
53{ 53{
54 irq_domain_add_simple(np, 0); 54 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
55 return 0; 55 return 0;
56} 56}
57 57
@@ -61,7 +61,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np,
61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
62 62
63 gpio_irq_base -= 32; 63 gpio_irq_base -= 32;
64 irq_domain_add_simple(np, gpio_irq_base); 64 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
65 65
66 return 0; 66 return 0;
67} 67}
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index c25728106917..6075d4d62dd6 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -97,7 +97,8 @@ static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
97 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 97 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
98 98
99 gpio_irq_base -= 32; 99 gpio_irq_base -= 32;
100 irq_domain_add_simple(np, gpio_irq_base); 100 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
101 NULL);
101 102
102 return 0; 103 return 0;
103} 104}
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 0a113424632c..962e71169750 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -80,12 +80,8 @@ static struct of_device_id msm_dt_gic_match[] __initdata = {
80 80
81static void __init msm8x60_dt_init(void) 81static void __init msm8x60_dt_init(void)
82{ 82{
83 struct device_node *node; 83 irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
84 84 GIC_SPI_START);
85 node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
86 MSM8X60_QGIC_DIST_PHYS);
87 if (node)
88 irq_domain_add_simple(node, GIC_SPI_START);
89 85
90 if (of_machine_is_compatible("qcom,msm8660-surf")) { 86 if (of_machine_is_compatible("qcom,msm8660-surf")) {
91 printk(KERN_INFO "Init surf UART registers\n"); 87 printk(KERN_INFO "Init surf UART registers\n");
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 41e6612ecbaf..d965da45160e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -213,13 +213,12 @@ config MACH_OMAP3_PANDORA
213 depends on ARCH_OMAP3 213 depends on ARCH_OMAP3
214 default y 214 default y
215 select OMAP_PACKAGE_CBB 215 select OMAP_PACKAGE_CBB
216 select REGULATOR_FIXED_VOLTAGE 216 select REGULATOR_FIXED_VOLTAGE if REGULATOR
217 217
218config MACH_OMAP3_TOUCHBOOK 218config MACH_OMAP3_TOUCHBOOK
219 bool "OMAP3 Touch Book" 219 bool "OMAP3 Touch Book"
220 depends on ARCH_OMAP3 220 depends on ARCH_OMAP3
221 default y 221 default y
222 select BACKLIGHT_CLASS_DEVICE
223 222
224config MACH_OMAP_3430SDP 223config MACH_OMAP_3430SDP
225 bool "OMAP 3430 SDP board" 224 bool "OMAP 3430 SDP board"
@@ -265,7 +264,7 @@ config MACH_OMAP_ZOOM2
265 select SERIAL_8250 264 select SERIAL_8250
266 select SERIAL_CORE_CONSOLE 265 select SERIAL_CORE_CONSOLE
267 select SERIAL_8250_CONSOLE 266 select SERIAL_8250_CONSOLE
268 select REGULATOR_FIXED_VOLTAGE 267 select REGULATOR_FIXED_VOLTAGE if REGULATOR
269 268
270config MACH_OMAP_ZOOM3 269config MACH_OMAP_ZOOM3
271 bool "OMAP3630 Zoom3 board" 270 bool "OMAP3630 Zoom3 board"
@@ -275,7 +274,7 @@ config MACH_OMAP_ZOOM3
275 select SERIAL_8250 274 select SERIAL_8250
276 select SERIAL_CORE_CONSOLE 275 select SERIAL_CORE_CONSOLE
277 select SERIAL_8250_CONSOLE 276 select SERIAL_8250_CONSOLE
278 select REGULATOR_FIXED_VOLTAGE 277 select REGULATOR_FIXED_VOLTAGE if REGULATOR
279 278
280config MACH_CM_T35 279config MACH_CM_T35
281 bool "CompuLab CM-T35/CM-T3730 modules" 280 bool "CompuLab CM-T35/CM-T3730 modules"
@@ -334,7 +333,7 @@ config MACH_OMAP_4430SDP
334 depends on ARCH_OMAP4 333 depends on ARCH_OMAP4
335 select OMAP_PACKAGE_CBL 334 select OMAP_PACKAGE_CBL
336 select OMAP_PACKAGE_CBS 335 select OMAP_PACKAGE_CBS
337 select REGULATOR_FIXED_VOLTAGE 336 select REGULATOR_FIXED_VOLTAGE if REGULATOR
338 337
339config MACH_OMAP4_PANDA 338config MACH_OMAP4_PANDA
340 bool "OMAP4 Panda Board" 339 bool "OMAP4 Panda Board"
@@ -342,7 +341,7 @@ config MACH_OMAP4_PANDA
342 depends on ARCH_OMAP4 341 depends on ARCH_OMAP4
343 select OMAP_PACKAGE_CBL 342 select OMAP_PACKAGE_CBL
344 select OMAP_PACKAGE_CBS 343 select OMAP_PACKAGE_CBS
345 select REGULATOR_FIXED_VOLTAGE 344 select REGULATOR_FIXED_VOLTAGE if REGULATOR
346 345
347config OMAP3_EMU 346config OMAP3_EMU
348 bool "OMAP3 debugging peripherals" 347 bool "OMAP3 debugging peripherals"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 39fba9df17fb..4e9071589bfb 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -52,8 +52,9 @@
52#define ETH_KS8851_QUART 138 52#define ETH_KS8851_QUART 138
53#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 53#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
54#define OMAP4_SFH7741_ENABLE_GPIO 188 54#define OMAP4_SFH7741_ENABLE_GPIO 188
55#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ 55#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
56#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ 56#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
57#define HDMI_GPIO_HPD 63 /* Hotplug detect */
57#define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */ 58#define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */
58#define DLP_POWER_ON_GPIO 40 59#define DLP_POWER_ON_GPIO 40
59 60
@@ -603,8 +604,9 @@ static void __init omap_sfh7741prox_init(void)
603} 604}
604 605
605static struct gpio sdp4430_hdmi_gpios[] = { 606static struct gpio sdp4430_hdmi_gpios[] = {
606 { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, 607 { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
607 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, 608 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
609 { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
608}; 610};
609 611
610static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) 612static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
@@ -621,8 +623,7 @@ static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
621 623
622static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev) 624static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
623{ 625{
624 gpio_free(HDMI_GPIO_LS_OE); 626 gpio_free_array(sdp4430_hdmi_gpios, ARRAY_SIZE(sdp4430_hdmi_gpios));
625 gpio_free(HDMI_GPIO_HPD);
626} 627}
627 628
628static struct nokia_dsi_panel_data dsi1_panel = { 629static struct nokia_dsi_panel_data dsi1_panel = {
@@ -738,6 +739,10 @@ static void sdp4430_lcd_init(void)
738 pr_err("%s: Could not get lcd2_reset_gpio\n", __func__); 739 pr_err("%s: Could not get lcd2_reset_gpio\n", __func__);
739} 740}
740 741
742static struct omap_dss_hdmi_data sdp4430_hdmi_data = {
743 .hpd_gpio = HDMI_GPIO_HPD,
744};
745
741static struct omap_dss_device sdp4430_hdmi_device = { 746static struct omap_dss_device sdp4430_hdmi_device = {
742 .name = "hdmi", 747 .name = "hdmi",
743 .driver_name = "hdmi_panel", 748 .driver_name = "hdmi_panel",
@@ -745,6 +750,7 @@ static struct omap_dss_device sdp4430_hdmi_device = {
745 .platform_enable = sdp4430_panel_enable_hdmi, 750 .platform_enable = sdp4430_panel_enable_hdmi,
746 .platform_disable = sdp4430_panel_disable_hdmi, 751 .platform_disable = sdp4430_panel_disable_hdmi,
747 .channel = OMAP_DSS_CHANNEL_DIGIT, 752 .channel = OMAP_DSS_CHANNEL_DIGIT,
753 .data = &sdp4430_hdmi_data,
748}; 754};
749 755
750static struct picodlp_panel_data sdp4430_picodlp_pdata = { 756static struct picodlp_panel_data sdp4430_picodlp_pdata = {
@@ -808,7 +814,7 @@ static struct omap_dss_board_info sdp4430_dss_data = {
808 .default_device = &sdp4430_lcd_device, 814 .default_device = &sdp4430_lcd_device,
809}; 815};
810 816
811static void omap_4430sdp_display_init(void) 817static void __init omap_4430sdp_display_init(void)
812{ 818{
813 int r; 819 int r;
814 820
@@ -829,6 +835,10 @@ static void omap_4430sdp_display_init(void)
829 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP); 835 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP);
830 else 836 else
831 omap_hdmi_init(0); 837 omap_hdmi_init(0);
838
839 omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT);
840 omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT);
841 omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN);
832} 842}
833 843
834#ifdef CONFIG_OMAP_MUX 844#ifdef CONFIG_OMAP_MUX
@@ -841,7 +851,7 @@ static struct omap_board_mux board_mux[] __initdata = {
841#define board_mux NULL 851#define board_mux NULL
842 #endif 852 #endif
843 853
844static void omap4_sdp4430_wifi_mux_init(void) 854static void __init omap4_sdp4430_wifi_mux_init(void)
845{ 855{
846 omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT | 856 omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT |
847 OMAP_PIN_OFF_WAKEUPENABLE); 857 OMAP_PIN_OFF_WAKEUPENABLE);
@@ -868,12 +878,17 @@ static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = {
868 .board_tcxo_clock = WL12XX_TCXOCLOCK_26, 878 .board_tcxo_clock = WL12XX_TCXOCLOCK_26,
869}; 879};
870 880
871static void omap4_sdp4430_wifi_init(void) 881static void __init omap4_sdp4430_wifi_init(void)
872{ 882{
883 int ret;
884
873 omap4_sdp4430_wifi_mux_init(); 885 omap4_sdp4430_wifi_mux_init();
874 if (wl12xx_set_platform_data(&omap4_sdp4430_wlan_data)) 886 ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data);
875 pr_err("Error setting wl12xx data\n"); 887 if (ret)
876 platform_device_register(&omap_vwlan_device); 888 pr_err("Error setting wl12xx data: %d\n", ret);
889 ret = platform_device_register(&omap_vwlan_device);
890 if (ret)
891 pr_err("Error registering wl12xx device: %d\n", ret);
877} 892}
878 893
879static void __init omap_4430sdp_init(void) 894static void __init omap_4430sdp_init(void)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index d58756060483..00b1d024fa87 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -67,7 +67,7 @@ static void __init omap_generic_init(void)
67{ 67{
68 struct device_node *node = of_find_matching_node(NULL, intc_match); 68 struct device_node *node = of_find_matching_node(NULL, intc_match);
69 if (node) 69 if (node)
70 irq_domain_add_simple(node, 0); 70 irq_domain_add_legacy(node, 32, 0, 0, &irq_domain_simple_ops, NULL);
71 71
72 omap_sdrc_init(NULL, NULL); 72 omap_sdrc_init(NULL, NULL);
73 73
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 003fe34c9343..c775bead1497 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -617,6 +617,21 @@ static struct gpio omap3_evm_ehci_gpios[] __initdata = {
617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, 617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
618}; 618};
619 619
620static void __init omap3_evm_wl12xx_init(void)
621{
622#ifdef CONFIG_WL12XX_PLATFORM_DATA
623 int ret;
624
625 /* WL12xx WLAN Init */
626 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
627 if (ret)
628 pr_err("error setting wl12xx data: %d\n", ret);
629 ret = platform_device_register(&omap3evm_wlan_regulator);
630 if (ret)
631 pr_err("error registering wl12xx device: %d\n", ret);
632#endif
633}
634
620static void __init omap3_evm_init(void) 635static void __init omap3_evm_init(void)
621{ 636{
622 omap3_evm_get_revision(); 637 omap3_evm_get_revision();
@@ -665,13 +680,7 @@ static void __init omap3_evm_init(void)
665 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); 680 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
666 omap3evm_init_smsc911x(); 681 omap3evm_init_smsc911x();
667 omap3_evm_display_init(); 682 omap3_evm_display_init();
668 683 omap3_evm_wl12xx_init();
669#ifdef CONFIG_WL12XX_PLATFORM_DATA
670 /* WL12xx WLAN Init */
671 if (wl12xx_set_platform_data(&omap3evm_wlan_data))
672 pr_err("error setting wl12xx data\n");
673 platform_device_register(&omap3evm_wlan_regulator);
674#endif
675} 684}
676 685
677MACHINE_START(OMAP3EVM, "OMAP3 EVM") 686MACHINE_START(OMAP3EVM, "OMAP3 EVM")
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 30ad40db2cf3..28fc271f7031 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -51,8 +51,9 @@
51#define GPIO_HUB_NRESET 62 51#define GPIO_HUB_NRESET 62
52#define GPIO_WIFI_PMENA 43 52#define GPIO_WIFI_PMENA 43
53#define GPIO_WIFI_IRQ 53 53#define GPIO_WIFI_IRQ 53
54#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ 54#define HDMI_GPIO_CT_CP_HPD 60 /* HPD mode enable/disable */
55#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ 55#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
56#define HDMI_GPIO_HPD 63 /* Hotplug detect */
56 57
57/* wl127x BT, FM, GPS connectivity chip */ 58/* wl127x BT, FM, GPS connectivity chip */
58static int wl1271_gpios[] = {46, -1, -1}; 59static int wl1271_gpios[] = {46, -1, -1};
@@ -413,8 +414,9 @@ int __init omap4_panda_dvi_init(void)
413} 414}
414 415
415static struct gpio panda_hdmi_gpios[] = { 416static struct gpio panda_hdmi_gpios[] = {
416 { HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_hpd" }, 417 { HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
417 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" }, 418 { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
419 { HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
418}; 420};
419 421
420static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) 422static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
@@ -431,10 +433,13 @@ static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
431 433
432static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev) 434static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
433{ 435{
434 gpio_free(HDMI_GPIO_LS_OE); 436 gpio_free_array(panda_hdmi_gpios, ARRAY_SIZE(panda_hdmi_gpios));
435 gpio_free(HDMI_GPIO_HPD);
436} 437}
437 438
439static struct omap_dss_hdmi_data omap4_panda_hdmi_data = {
440 .hpd_gpio = HDMI_GPIO_HPD,
441};
442
438static struct omap_dss_device omap4_panda_hdmi_device = { 443static struct omap_dss_device omap4_panda_hdmi_device = {
439 .name = "hdmi", 444 .name = "hdmi",
440 .driver_name = "hdmi_panel", 445 .driver_name = "hdmi_panel",
@@ -442,6 +447,7 @@ static struct omap_dss_device omap4_panda_hdmi_device = {
442 .platform_enable = omap4_panda_panel_enable_hdmi, 447 .platform_enable = omap4_panda_panel_enable_hdmi,
443 .platform_disable = omap4_panda_panel_disable_hdmi, 448 .platform_disable = omap4_panda_panel_disable_hdmi,
444 .channel = OMAP_DSS_CHANNEL_DIGIT, 449 .channel = OMAP_DSS_CHANNEL_DIGIT,
450 .data = &omap4_panda_hdmi_data,
445}; 451};
446 452
447static struct omap_dss_device *omap4_panda_dss_devices[] = { 453static struct omap_dss_device *omap4_panda_dss_devices[] = {
@@ -473,18 +479,24 @@ void omap4_panda_display_init(void)
473 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP); 479 omap_hdmi_init(OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP);
474 else 480 else
475 omap_hdmi_init(0); 481 omap_hdmi_init(0);
482
483 omap_mux_init_gpio(HDMI_GPIO_LS_OE, OMAP_PIN_OUTPUT);
484 omap_mux_init_gpio(HDMI_GPIO_CT_CP_HPD, OMAP_PIN_OUTPUT);
485 omap_mux_init_gpio(HDMI_GPIO_HPD, OMAP_PIN_INPUT_PULLDOWN);
476} 486}
477 487
478static void __init omap4_panda_init(void) 488static void __init omap4_panda_init(void)
479{ 489{
480 int package = OMAP_PACKAGE_CBS; 490 int package = OMAP_PACKAGE_CBS;
491 int ret;
481 492
482 if (omap_rev() == OMAP4430_REV_ES1_0) 493 if (omap_rev() == OMAP4430_REV_ES1_0)
483 package = OMAP_PACKAGE_CBL; 494 package = OMAP_PACKAGE_CBL;
484 omap4_mux_init(board_mux, NULL, package); 495 omap4_mux_init(board_mux, NULL, package);
485 496
486 if (wl12xx_set_platform_data(&omap_panda_wlan_data)) 497 ret = wl12xx_set_platform_data(&omap_panda_wlan_data);
487 pr_err("error setting wl12xx data\n"); 498 if (ret)
499 pr_err("error setting wl12xx data: %d\n", ret);
488 500
489 omap4_panda_i2c_init(); 501 omap4_panda_i2c_init();
490 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 502 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 8d7ce11cfeaf..c126461836ac 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -296,8 +296,10 @@ static void enable_board_wakeup_source(void)
296 296
297void __init zoom_peripherals_init(void) 297void __init zoom_peripherals_init(void)
298{ 298{
299 if (wl12xx_set_platform_data(&omap_zoom_wlan_data)) 299 int ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
300 pr_err("error setting wl12xx data\n"); 300
301 if (ret)
302 pr_err("error setting wl12xx data: %d\n", ret);
301 303
302 omap_i2c_init(); 304 omap_i2c_init();
303 platform_device_register(&omap_vwlan_device); 305 platform_device_register(&omap_vwlan_device);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0b510ad01a00..283d11eae693 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -405,6 +405,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
405 break; 405 break;
406 default: 406 default:
407 pr_err("Invalid McSPI Revision value\n"); 407 pr_err("Invalid McSPI Revision value\n");
408 kfree(pdata);
408 return -EINVAL; 409 return -EINVAL;
409 } 410 }
410 411
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 3c446d1a1781..3677b1f58b85 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -103,12 +103,8 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
103 u32 reg; 103 u32 reg;
104 u16 control_i2c_1; 104 u16 control_i2c_1;
105 105
106 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
107 omap_mux_init_signal("hdmi_hpd",
108 OMAP_PIN_INPUT_PULLUP);
109 omap_mux_init_signal("hdmi_cec", 106 omap_mux_init_signal("hdmi_cec",
110 OMAP_PIN_INPUT_PULLUP); 107 OMAP_PIN_INPUT_PULLUP);
111 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
112 omap_mux_init_signal("hdmi_ddc_scl", 108 omap_mux_init_signal("hdmi_ddc_scl",
113 OMAP_PIN_INPUT_PULLUP); 109 OMAP_PIN_INPUT_PULLUP);
114 omap_mux_init_signal("hdmi_ddc_sda", 110 omap_mux_init_signal("hdmi_ddc_sda",
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 130034bf01d5..dfffbbf4c009 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -528,7 +528,13 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
528 528
529 case GPMC_CONFIG_DEV_SIZE: 529 case GPMC_CONFIG_DEV_SIZE:
530 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); 530 regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
531
532 /* clear 2 target bits */
533 regval &= ~GPMC_CONFIG1_DEVICESIZE(3);
534
535 /* set the proper value */
531 regval |= GPMC_CONFIG1_DEVICESIZE(wval); 536 regval |= GPMC_CONFIG1_DEVICESIZE(wval);
537
532 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); 538 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
533 break; 539 break;
534 540
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index bd844af13af5..b40c28895298 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -175,14 +175,15 @@ static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
175{ 175{
176 u32 reg; 176 u32 reg;
177 177
178 if (mmc->slots[0].internal_clock) { 178 reg = omap_ctrl_readl(control_devconf1_offset);
179 reg = omap_ctrl_readl(control_devconf1_offset); 179 if (mmc->slots[0].internal_clock)
180 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 180 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
181 omap_ctrl_writel(reg, control_devconf1_offset); 181 else
182 } 182 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL;
183 omap_ctrl_writel(reg, control_devconf1_offset);
183} 184}
184 185
185static void hsmmc23_before_set_reg(struct device *dev, int slot, 186static void hsmmc2_before_set_reg(struct device *dev, int slot,
186 int power_on, int vdd) 187 int power_on, int vdd)
187{ 188{
188 struct omap_mmc_platform_data *mmc = dev->platform_data; 189 struct omap_mmc_platform_data *mmc = dev->platform_data;
@@ -292,8 +293,8 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
292 } 293 }
293} 294}
294 295
295static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, 296static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
296 struct omap_mmc_platform_data *mmc) 297 struct omap_mmc_platform_data *mmc)
297{ 298{
298 char *hc_name; 299 char *hc_name;
299 300
@@ -407,14 +408,13 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
407 c->caps &= ~MMC_CAP_8_BIT_DATA; 408 c->caps &= ~MMC_CAP_8_BIT_DATA;
408 c->caps |= MMC_CAP_4_BIT_DATA; 409 c->caps |= MMC_CAP_4_BIT_DATA;
409 } 410 }
410 /* FALLTHROUGH */
411 case 3:
412 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { 411 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
413 /* off-chip level shifting, or none */ 412 /* off-chip level shifting, or none */
414 mmc->slots[0].before_set_reg = hsmmc23_before_set_reg; 413 mmc->slots[0].before_set_reg = hsmmc2_before_set_reg;
415 mmc->slots[0].after_set_reg = NULL; 414 mmc->slots[0].after_set_reg = NULL;
416 } 415 }
417 break; 416 break;
417 case 3:
418 case 4: 418 case 4:
419 case 5: 419 case 5:
420 mmc->slots[0].before_set_reg = NULL; 420 mmc->slots[0].before_set_reg = NULL;
@@ -430,7 +430,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
430 430
431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
432 432
433void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 433void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
434{ 434{
435 struct omap_hwmod *oh; 435 struct omap_hwmod *oh;
436 struct platform_device *pdev; 436 struct platform_device *pdev;
@@ -487,7 +487,7 @@ done:
487 kfree(mmc_data); 487 kfree(mmc_data);
488} 488}
489 489
490void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) 490void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
491{ 491{
492 u32 reg; 492 u32 reg;
493 493
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3f174d51f67f..eb50c29fb644 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -388,7 +388,7 @@ static void __init omap_hwmod_init_postsetup(void)
388 omap_pm_if_early_init(); 388 omap_pm_if_early_init();
389} 389}
390 390
391#ifdef CONFIG_ARCH_OMAP2 391#ifdef CONFIG_SOC_OMAP2420
392void __init omap2420_init_early(void) 392void __init omap2420_init_early(void)
393{ 393{
394 omap2_set_globals_242x(); 394 omap2_set_globals_242x();
@@ -400,7 +400,9 @@ void __init omap2420_init_early(void)
400 omap_hwmod_init_postsetup(); 400 omap_hwmod_init_postsetup();
401 omap2420_clk_init(); 401 omap2420_clk_init();
402} 402}
403#endif
403 404
405#ifdef CONFIG_SOC_OMAP2430
404void __init omap2430_init_early(void) 406void __init omap2430_init_early(void)
405{ 407{
406 omap2_set_globals_243x(); 408 omap2_set_globals_243x();
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index e1cc75d1a57a..fb8bc9fa43b1 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -100,8 +100,8 @@ void omap_mux_write_array(struct omap_mux_partition *partition,
100 100
101static char *omap_mux_options; 101static char *omap_mux_options;
102 102
103static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, 103static int _omap_mux_init_gpio(struct omap_mux_partition *partition,
104 int gpio, int val) 104 int gpio, int val)
105{ 105{
106 struct omap_mux_entry *e; 106 struct omap_mux_entry *e;
107 struct omap_mux *gpio_mux = NULL; 107 struct omap_mux *gpio_mux = NULL;
@@ -145,7 +145,7 @@ static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition,
145 return 0; 145 return 0;
146} 146}
147 147
148int __init omap_mux_init_gpio(int gpio, int val) 148int omap_mux_init_gpio(int gpio, int val)
149{ 149{
150 struct omap_mux_partition *partition; 150 struct omap_mux_partition *partition;
151 int ret; 151 int ret;
@@ -159,9 +159,9 @@ int __init omap_mux_init_gpio(int gpio, int val)
159 return -ENODEV; 159 return -ENODEV;
160} 160}
161 161
162static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, 162static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
163 const char *muxname, 163 const char *muxname,
164 struct omap_mux **found_mux) 164 struct omap_mux **found_mux)
165{ 165{
166 struct omap_mux *mux = NULL; 166 struct omap_mux *mux = NULL;
167 struct omap_mux_entry *e; 167 struct omap_mux_entry *e;
@@ -240,7 +240,7 @@ omap_mux_get_by_name(const char *muxname,
240 return -ENODEV; 240 return -ENODEV;
241} 241}
242 242
243int __init omap_mux_init_signal(const char *muxname, int val) 243int omap_mux_init_signal(const char *muxname, int val)
244{ 244{
245 struct omap_mux_partition *partition = NULL; 245 struct omap_mux_partition *partition = NULL;
246 struct omap_mux *mux = NULL; 246 struct omap_mux *mux = NULL;
@@ -1094,8 +1094,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
1094 omap_mux_package_init_balls(package_balls, superset); 1094 omap_mux_package_init_balls(package_balls, superset);
1095} 1095}
1096 1096
1097static void omap_mux_init_signals(struct omap_mux_partition *partition, 1097static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
1098 struct omap_board_mux *board_mux) 1098 struct omap_board_mux *board_mux)
1099{ 1099{
1100 omap_mux_set_cmdline_signals(); 1100 omap_mux_set_cmdline_signals();
1101 omap_mux_write_array(partition, board_mux); 1101 omap_mux_write_array(partition, board_mux);
@@ -1109,8 +1109,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
1109{ 1109{
1110} 1110}
1111 1111
1112static void omap_mux_init_signals(struct omap_mux_partition *partition, 1112static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
1113 struct omap_board_mux *board_mux) 1113 struct omap_board_mux *board_mux)
1114{ 1114{
1115} 1115}
1116 1116
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index b13ef7ef5ef4..503ac777a2ba 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -18,6 +18,7 @@
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21 __CPUINIT
21/* 22/*
22 * OMAP4 specific entry point for secondary CPU to jump from ROM 23 * OMAP4 specific entry point for secondary CPU to jump from ROM
23 * code. This routine also provides a holding flag into which 24 * code. This routine also provides a holding flag into which
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 5192cabb40ed..eba6cd3816f5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1517,8 +1517,8 @@ static int _enable(struct omap_hwmod *oh)
1517 if (oh->_state != _HWMOD_STATE_INITIALIZED && 1517 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1518 oh->_state != _HWMOD_STATE_IDLE && 1518 oh->_state != _HWMOD_STATE_IDLE &&
1519 oh->_state != _HWMOD_STATE_DISABLED) { 1519 oh->_state != _HWMOD_STATE_DISABLED) {
1520 WARN(1, "omap_hwmod: %s: enabled state can only be entered " 1520 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1521 "from initialized, idle, or disabled state\n", oh->name); 1521 oh->name);
1522 return -EINVAL; 1522 return -EINVAL;
1523 } 1523 }
1524 1524
@@ -1600,8 +1600,8 @@ static int _idle(struct omap_hwmod *oh)
1600 pr_debug("omap_hwmod: %s: idling\n", oh->name); 1600 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1601 1601
1602 if (oh->_state != _HWMOD_STATE_ENABLED) { 1602 if (oh->_state != _HWMOD_STATE_ENABLED) {
1603 WARN(1, "omap_hwmod: %s: idle state can only be entered from " 1603 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1604 "enabled state\n", oh->name); 1604 oh->name);
1605 return -EINVAL; 1605 return -EINVAL;
1606 } 1606 }
1607 1607
@@ -1682,8 +1682,8 @@ static int _shutdown(struct omap_hwmod *oh)
1682 1682
1683 if (oh->_state != _HWMOD_STATE_IDLE && 1683 if (oh->_state != _HWMOD_STATE_IDLE &&
1684 oh->_state != _HWMOD_STATE_ENABLED) { 1684 oh->_state != _HWMOD_STATE_ENABLED) {
1685 WARN(1, "omap_hwmod: %s: disabled state can only be entered " 1685 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1686 "from idle, or enabled state\n", oh->name); 1686 oh->name);
1687 return -EINVAL; 1687 return -EINVAL;
1688 } 1688 }
1689 1689
@@ -2240,8 +2240,8 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2240 BUG_ON(!oh); 2240 BUG_ON(!oh);
2241 2241
2242 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { 2242 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2243 WARN(1, "omap_device: %s: OCP barrier impossible due to " 2243 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2244 "device configuration\n", oh->name); 2244 oh->name);
2245 return; 2245 return;
2246 } 2246 }
2247 2247
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c11273da5dcc..f08e442af397 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -56,27 +56,6 @@ struct omap_hwmod_class omap2_dss_hwmod_class = {
56}; 56};
57 57
58/* 58/*
59 * 'dispc' class
60 * display controller
61 */
62
63static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
64 .rev_offs = 0x0000,
65 .sysc_offs = 0x0010,
66 .syss_offs = 0x0014,
67 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
68 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
69 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
70 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
71 .sysc_fields = &omap_hwmod_sysc_type1,
72};
73
74struct omap_hwmod_class omap2_dispc_hwmod_class = {
75 .name = "dispc",
76 .sysc = &omap2_dispc_sysc,
77};
78
79/*
80 * 'rfbi' class 59 * 'rfbi' class
81 * remote frame buffer interface 60 * remote frame buffer interface
82 */ 61 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 177dee20faef..2a6729741b06 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -28,6 +28,28 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
28 { .name = "dispc", .dma_req = 5 }, 28 { .name = "dispc", .dma_req = 5 },
29 { .dma_req = -1 } 29 { .dma_req = -1 }
30}; 30};
31
32/*
33 * 'dispc' class
34 * display controller
35 */
36
37static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
38 .rev_offs = 0x0000,
39 .sysc_offs = 0x0010,
40 .syss_offs = 0x0014,
41 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
42 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
43 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
44 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
45 .sysc_fields = &omap_hwmod_sysc_type1,
46};
47
48struct omap_hwmod_class omap2_dispc_hwmod_class = {
49 .name = "dispc",
50 .sysc = &omap2_dispc_sysc,
51};
52
31/* OMAP2xxx Timer Common */ 53/* OMAP2xxx Timer Common */
32static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { 54static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
33 .rev_offs = 0x0000, 55 .rev_offs = 0x0000,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5324e8d93bc0..3c8dd928628e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1480,6 +1480,28 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1480 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1480 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1481}; 1481};
1482 1482
1483/*
1484 * 'dispc' class
1485 * display controller
1486 */
1487
1488static struct omap_hwmod_class_sysconfig omap3_dispc_sysc = {
1489 .rev_offs = 0x0000,
1490 .sysc_offs = 0x0010,
1491 .syss_offs = 0x0014,
1492 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
1493 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1494 SYSC_HAS_ENAWAKEUP),
1495 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1496 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1497 .sysc_fields = &omap_hwmod_sysc_type1,
1498};
1499
1500static struct omap_hwmod_class omap3_dispc_hwmod_class = {
1501 .name = "dispc",
1502 .sysc = &omap3_dispc_sysc,
1503};
1504
1483/* l4_core -> dss_dispc */ 1505/* l4_core -> dss_dispc */
1484static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { 1506static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
1485 .master = &omap3xxx_l4_core_hwmod, 1507 .master = &omap3xxx_l4_core_hwmod,
@@ -1503,7 +1525,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
1503 1525
1504static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { 1526static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1505 .name = "dss_dispc", 1527 .name = "dss_dispc",
1506 .class = &omap2_dispc_hwmod_class, 1528 .class = &omap3_dispc_hwmod_class,
1507 .mpu_irqs = omap2_dispc_irqs, 1529 .mpu_irqs = omap2_dispc_irqs,
1508 .main_clk = "dss1_alwon_fck", 1530 .main_clk = "dss1_alwon_fck",
1509 .prcm = { 1531 .prcm = {
@@ -3523,12 +3545,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3523 &omap3xxx_uart2_hwmod, 3545 &omap3xxx_uart2_hwmod,
3524 &omap3xxx_uart3_hwmod, 3546 &omap3xxx_uart3_hwmod,
3525 3547
3526 /* dss class */
3527 &omap3xxx_dss_dispc_hwmod,
3528 &omap3xxx_dss_dsi1_hwmod,
3529 &omap3xxx_dss_rfbi_hwmod,
3530 &omap3xxx_dss_venc_hwmod,
3531
3532 /* i2c class */ 3548 /* i2c class */
3533 &omap3xxx_i2c1_hwmod, 3549 &omap3xxx_i2c1_hwmod,
3534 &omap3xxx_i2c2_hwmod, 3550 &omap3xxx_i2c2_hwmod,
@@ -3635,6 +3651,15 @@ static __initdata struct omap_hwmod *am35xx_hwmods[] = {
3635 NULL 3651 NULL
3636}; 3652};
3637 3653
3654static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = {
3655 /* dss class */
3656 &omap3xxx_dss_dispc_hwmod,
3657 &omap3xxx_dss_dsi1_hwmod,
3658 &omap3xxx_dss_rfbi_hwmod,
3659 &omap3xxx_dss_venc_hwmod,
3660 NULL
3661};
3662
3638int __init omap3xxx_hwmod_init(void) 3663int __init omap3xxx_hwmod_init(void)
3639{ 3664{
3640 int r; 3665 int r;
@@ -3708,6 +3733,21 @@ int __init omap3xxx_hwmod_init(void)
3708 3733
3709 if (h) 3734 if (h)
3710 r = omap_hwmod_register(h); 3735 r = omap_hwmod_register(h);
3736 if (r < 0)
3737 return r;
3738
3739 /*
3740 * DSS code presumes that dss_core hwmod is handled first,
3741 * _before_ any other DSS related hwmods so register common
3742 * DSS hwmods last to ensure that dss_core is already registered.
3743 * Otherwise some change things may happen, for ex. if dispc
3744 * is handled before dss_core and DSS is enabled in bootloader
3745 * DIPSC will be reset with outputs enabled which sometimes leads
3746 * to unrecoverable L3 error.
3747 * XXX The long-term fix to this is to ensure modules are set up
3748 * in dependency order in the hwmod core code.
3749 */
3750 r = omap_hwmod_register(omap3xxx_dss_hwmods);
3711 3751
3712 return r; 3752 return r;
3713} 3753}
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index f9f151081760..ef0524c10a84 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1031,6 +1031,7 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
1031 1031
1032static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { 1032static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
1033 { 1033 {
1034 .name = "mpu",
1034 .pa_start = 0x4012e000, 1035 .pa_start = 0x4012e000,
1035 .pa_end = 0x4012e07f, 1036 .pa_end = 0x4012e07f,
1036 .flags = ADDR_TYPE_RT 1037 .flags = ADDR_TYPE_RT
@@ -1049,6 +1050,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
1049 1050
1050static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { 1051static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {
1051 { 1052 {
1053 .name = "dma",
1052 .pa_start = 0x4902e000, 1054 .pa_start = 0x4902e000,
1053 .pa_end = 0x4902e07f, 1055 .pa_end = 0x4902e07f,
1054 .flags = ADDR_TYPE_RT 1056 .flags = ADDR_TYPE_RT
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index c1c4d86a79a8..9ce765407ad5 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -19,6 +19,7 @@
19#include "common.h" 19#include "common.h"
20#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/prcm.h> 21#include <plat/prcm.h>
22#include <plat/irqs.h>
22 23
23#include "vp.h" 24#include "vp.h"
24 25
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 33dd655e6aab..a1d6154dc120 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -19,6 +19,7 @@
19 19
20#include "common.h" 20#include "common.h"
21#include <plat/cpu.h> 21#include <plat/cpu.h>
22#include <plat/irqs.h>
22#include <plat/prcm.h> 23#include <plat/prcm.h>
23 24
24#include "vp.h" 25#include "vp.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 247d89478f24..f590afc1f673 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -107,18 +107,18 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
107 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO); 107 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
108} 108}
109 109
110static void omap_uart_set_forceidle(struct platform_device *pdev) 110static void omap_uart_set_smartidle(struct platform_device *pdev)
111{ 111{
112 struct omap_device *od = to_omap_device(pdev); 112 struct omap_device *od = to_omap_device(pdev);
113 113
114 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE); 114 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
115} 115}
116 116
117#else 117#else
118static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable) 118static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
119{} 119{}
120static void omap_uart_set_noidle(struct platform_device *pdev) {} 120static void omap_uart_set_noidle(struct platform_device *pdev) {}
121static void omap_uart_set_forceidle(struct platform_device *pdev) {} 121static void omap_uart_set_smartidle(struct platform_device *pdev) {}
122#endif /* CONFIG_PM */ 122#endif /* CONFIG_PM */
123 123
124#ifdef CONFIG_OMAP_MUX 124#ifdef CONFIG_OMAP_MUX
@@ -349,7 +349,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
349 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; 349 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
350 omap_up.flags = UPF_BOOT_AUTOCONF; 350 omap_up.flags = UPF_BOOT_AUTOCONF;
351 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; 351 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
352 omap_up.set_forceidle = omap_uart_set_forceidle; 352 omap_up.set_forceidle = omap_uart_set_smartidle;
353 omap_up.set_noidle = omap_uart_set_noidle; 353 omap_up.set_noidle = omap_uart_set_noidle;
354 omap_up.enable_wakeup = omap_uart_enable_wakeup; 354 omap_up.enable_wakeup = omap_uart_enable_wakeup;
355 omap_up.dma_rx_buf_size = info->dma_rx_buf_size; 355 omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 9dd93453e563..7e755bb0ffc4 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -897,7 +897,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
897 ret = sr_late_init(sr_info); 897 ret = sr_late_init(sr_info);
898 if (ret) { 898 if (ret) {
899 pr_warning("%s: Error in SR late init\n", __func__); 899 pr_warning("%s: Error in SR late init\n", __func__);
900 return ret; 900 goto err_iounmap;
901 } 901 }
902 } 902 }
903 903
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 6eeff0e0ae01..5c9acea95761 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -270,7 +270,7 @@ static struct clocksource clocksource_gpt = {
270static u32 notrace dmtimer_read_sched_clock(void) 270static u32 notrace dmtimer_read_sched_clock(void)
271{ 271{
272 if (clksrc.reserved) 272 if (clksrc.reserved)
273 return __omap_dm_timer_read_counter(clksrc.io_base, 1); 273 return __omap_dm_timer_read_counter(&clksrc, 1);
274 274
275 return 0; 275 return 0;
276} 276}
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 031d116fbf10..175b7d86d86a 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -247,7 +247,7 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
247 * omap_vc_i2c_init - initialize I2C interface to PMIC 247 * omap_vc_i2c_init - initialize I2C interface to PMIC
248 * @voltdm: voltage domain containing VC data 248 * @voltdm: voltage domain containing VC data
249 * 249 *
250 * Use PMIC supplied seetings for I2C high-speed mode and 250 * Use PMIC supplied settings for I2C high-speed mode and
251 * master code (if set) and program the VC I2C configuration 251 * master code (if set) and program the VC I2C configuration
252 * register. 252 * register.
253 * 253 *
@@ -265,8 +265,8 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
265 265
266 if (initialized) { 266 if (initialized) {
267 if (voltdm->pmic->i2c_high_speed != i2c_high_speed) 267 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
268 pr_warn("%s: I2C config for all channels must match.", 268 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
269 __func__); 269 __func__, voltdm->name, i2c_high_speed);
270 return; 270 return;
271 } 271 }
272 272
@@ -292,9 +292,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
292 u32 val; 292 u32 val;
293 293
294 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { 294 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
295 pr_err("%s: PMIC info requried to configure vc for" 295 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
296 "vdd_%s not populated.Hence cannot initialize vc\n",
297 __func__, voltdm->name);
298 return; 296 return;
299 } 297 }
300 298
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 807391d84a9d..0df88820978d 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -41,6 +41,11 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
41 u32 val, sys_clk_rate, timeout, waittime; 41 u32 val, sys_clk_rate, timeout, waittime;
42 u32 vddmin, vddmax, vstepmin, vstepmax; 42 u32 vddmin, vddmax, vstepmin, vstepmax;
43 43
44 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
45 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
46 return;
47 }
48
44 if (!voltdm->read || !voltdm->write) { 49 if (!voltdm->read || !voltdm->write) {
45 pr_err("%s: No read/write API for accessing vdd_%s regs\n", 50 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
46 __func__, voltdm->name); 51 __func__, voltdm->name);
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index d93ceef4a50a..37c2de9b6f26 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -68,7 +68,7 @@ void __init sirfsoc_of_irq_init(void)
68 if (!sirfsoc_intc_base) 68 if (!sirfsoc_intc_base)
69 panic("unable to map intc cpu registers\n"); 69 panic("unable to map intc cpu registers\n");
70 70
71 irq_domain_add_simple(np, 0); 71 irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL);
72 72
73 of_node_put(np); 73 of_node_put(np);
74 74
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 6fcf304d3cdf..a83cf51fc099 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -662,6 +662,7 @@ static struct sh_dmae_pdata usb_dma0_platform_data = {
662 .dmaor_is_32bit = 1, 662 .dmaor_is_32bit = 1,
663 .needs_tend_set = 1, 663 .needs_tend_set = 1,
664 .no_dmars = 1, 664 .no_dmars = 1,
665 .slave_only = 1,
665}; 666};
666 667
667static struct resource sh7372_usb_dmae0_resources[] = { 668static struct resource sh7372_usb_dmae0_resources[] = {
@@ -723,6 +724,7 @@ static struct sh_dmae_pdata usb_dma1_platform_data = {
723 .dmaor_is_32bit = 1, 724 .dmaor_is_32bit = 1,
724 .needs_tend_set = 1, 725 .needs_tend_set = 1,
725 .no_dmars = 1, 726 .no_dmars = 1,
727 .slave_only = 1,
726}; 728};
727 729
728static struct resource sh7372_usb_dmae1_resources[] = { 730static struct resource sh7372_usb_dmae1_resources[] = {
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 02b7b9303f3b..008ce22b9a06 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -98,8 +98,11 @@ static const struct of_device_id sic_of_match[] __initconst = {
98 98
99void __init versatile_init_irq(void) 99void __init versatile_init_irq(void)
100{ 100{
101 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); 101 struct device_node *np;
102 irq_domain_generate_simple(vic_of_match, VERSATILE_VIC_BASE, IRQ_VIC_START); 102
103 np = of_find_matching_node_by_address(NULL, vic_of_match,
104 VERSATILE_VIC_BASE);
105 __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np);
103 106
104 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 107 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
105 108
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 07c4bc8ea0a4..7a24d39661f0 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -54,9 +54,15 @@ loop1:
54 and r1, r1, #7 @ mask of the bits for current cache only 54 and r1, r1, #7 @ mask of the bits for current cache only
55 cmp r1, #2 @ see what cache we have at this level 55 cmp r1, #2 @ see what cache we have at this level
56 blt skip @ skip if no cache, or just i-cache 56 blt skip @ skip if no cache, or just i-cache
57#ifdef CONFIG_PREEMPT
58 save_and_disable_irqs r9 @ make cssr&csidr read atomic
59#endif
57 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 60 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
58 isb @ isb to sych the new cssr&csidr 61 isb @ isb to sych the new cssr&csidr
59 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr 62 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
63#ifdef CONFIG_PREEMPT
64 restore_irqs_notrace r9
65#endif
60 and r2, r1, #7 @ extract the length of the cache lines 66 and r2, r1, #7 @ extract the length of the cache lines
61 add r2, r2, #4 @ add 4 (line length offset) 67 add r2, r2, #4 @ add 4 (line length offset)
62 ldr r4, =0x3ff 68 ldr r4, =0x3ff
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index ba159370fa5f..80632e8d7538 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -225,8 +225,7 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
225 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype)) 225 if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
226 continue; 226 continue;
227 if (__phys_to_pfn(area->phys_addr) > pfn || 227 if (__phys_to_pfn(area->phys_addr) > pfn ||
228 __pfn_to_phys(pfn) + offset + size-1 > 228 __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
229 area->phys_addr + area->size-1)
230 continue; 229 continue;
231 /* we can drop the lock here as we know *area is static */ 230 /* we can drop the lock here as we know *area is static */
232 read_unlock(&vmlist_lock); 231 read_unlock(&vmlist_lock);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 03:07:24 -0500