diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-06-21 04:47:44 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-06-21 04:47:44 -0400 |
commit | 9dd056e9eba106ef622795b566f769a9ab0a49a8 (patch) | |
tree | 390c07ea2c3b9631c2e8fe64c1a6feba0b503e8b /arch/arm | |
parent | 08ef2e427b59393d68a65b16e97e894b662a5573 (diff) | |
parent | f2b9726105824fdeea32a339e5072a358f89a25b (diff) |
Merge branch 'sh/stable-updates' into sh-latest
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-msm/timer.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-omap1/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap1/pm_bus.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-omap3pandora.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm-debug.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/spitz_pm.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/board-ag5evm.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/board-mackerel.c | 208 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/intc-sh73a0.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-sh7367.c | 14 | ||||
-rw-r--r-- | arch/arm/plat-omap/omap_device.c | 19 |
11 files changed, 202 insertions, 83 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 38b95e949d13..63621f152c98 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | 24 | ||
25 | #include <asm/mach/time.h> | 25 | #include <asm/mach/time.h> |
26 | #include <asm/hardware/gic.h> | ||
27 | |||
26 | #include <mach/msm_iomap.h> | 28 | #include <mach/msm_iomap.h> |
27 | #include <mach/cpu.h> | 29 | #include <mach/cpu.h> |
28 | 30 | ||
@@ -55,10 +57,12 @@ enum timer_location { | |||
55 | #if defined(CONFIG_ARCH_QSD8X50) | 57 | #if defined(CONFIG_ARCH_QSD8X50) |
56 | #define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */ | 58 | #define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */ |
57 | #define MSM_DGT_SHIFT (0) | 59 | #define MSM_DGT_SHIFT (0) |
58 | #elif defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM8X60) || \ | 60 | #elif defined(CONFIG_ARCH_MSM7X30) |
59 | defined(CONFIG_ARCH_MSM8960) | ||
60 | #define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */ | 61 | #define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */ |
61 | #define MSM_DGT_SHIFT (0) | 62 | #define MSM_DGT_SHIFT (0) |
63 | #elif defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960) | ||
64 | #define DGT_HZ (27000000 / 4) /* 27 MHz (PXO) / 4 by default */ | ||
65 | #define MSM_DGT_SHIFT (0) | ||
62 | #else | 66 | #else |
63 | #define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */ | 67 | #define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */ |
64 | #define MSM_DGT_SHIFT (5) | 68 | #define MSM_DGT_SHIFT (5) |
@@ -100,7 +104,11 @@ static cycle_t msm_read_timer_count(struct clocksource *cs) | |||
100 | { | 104 | { |
101 | struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource); | 105 | struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource); |
102 | 106 | ||
103 | return readl(clk->global_counter); | 107 | /* |
108 | * Shift timer count down by a constant due to unreliable lower bits | ||
109 | * on some targets. | ||
110 | */ | ||
111 | return readl(clk->global_counter) >> clk->shift; | ||
104 | } | 112 | } |
105 | 113 | ||
106 | static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt) | 114 | static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt) |
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index af98117043d2..5b114d1558c8 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
@@ -4,14 +4,14 @@ | |||
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o | 6 | obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o |
7 | obj-y += clock.o clock_data.o opp_data.o reset.o | 7 | obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o |
8 | 8 | ||
9 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | 9 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o |
10 | 10 | ||
11 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o | 11 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o |
12 | 12 | ||
13 | # Power Management | 13 | # Power Management |
14 | obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o | 14 | obj-$(CONFIG_PM) += pm.o sleep.o |
15 | 15 | ||
16 | # DSP | 16 | # DSP |
17 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o | 17 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o |
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c index fe31d933f0ed..334fb8871bc3 100644 --- a/arch/arm/mach-omap1/pm_bus.c +++ b/arch/arm/mach-omap1/pm_bus.c | |||
@@ -56,9 +56,13 @@ static struct dev_power_domain default_power_domain = { | |||
56 | USE_PLATFORM_PM_SLEEP_OPS | 56 | USE_PLATFORM_PM_SLEEP_OPS |
57 | }, | 57 | }, |
58 | }; | 58 | }; |
59 | #define OMAP1_PWR_DOMAIN (&default_power_domain) | ||
60 | #else | ||
61 | #define OMAP1_PWR_DOMAIN NULL | ||
62 | #endif /* CONFIG_PM_RUNTIME */ | ||
59 | 63 | ||
60 | static struct pm_clk_notifier_block platform_bus_notifier = { | 64 | static struct pm_clk_notifier_block platform_bus_notifier = { |
61 | .pwr_domain = &default_power_domain, | 65 | .pwr_domain = OMAP1_PWR_DOMAIN, |
62 | .con_ids = { "ick", "fck", NULL, }, | 66 | .con_ids = { "ick", "fck", NULL, }, |
63 | }; | 67 | }; |
64 | 68 | ||
@@ -72,4 +76,4 @@ static int __init omap1_pm_runtime_init(void) | |||
72 | return 0; | 76 | return 0; |
73 | } | 77 | } |
74 | core_initcall(omap1_pm_runtime_init); | 78 | core_initcall(omap1_pm_runtime_init); |
75 | #endif /* CONFIG_PM_RUNTIME */ | 79 | |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 2a0bb4818cae..23f71d40883e 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -84,7 +84,8 @@ static struct mtd_partition omap3pandora_nand_partitions[] = { | |||
84 | 84 | ||
85 | static struct omap_nand_platform_data pandora_nand_data = { | 85 | static struct omap_nand_platform_data pandora_nand_data = { |
86 | .cs = 0, | 86 | .cs = 0, |
87 | .devsize = 1, /* '0' for 8-bit, '1' for 16-bit device */ | 87 | .devsize = NAND_BUSWIDTH_16, |
88 | .xfer_type = NAND_OMAP_PREFETCH_DMA, | ||
88 | .parts = omap3pandora_nand_partitions, | 89 | .parts = omap3pandora_nand_partitions, |
89 | .nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions), | 90 | .nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions), |
90 | }; | 91 | }; |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index a5a83b358ddd..e01da45c0537 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -189,7 +189,7 @@ static struct dentry *pm_dbg_dir; | |||
189 | 189 | ||
190 | static int pm_dbg_init_done; | 190 | static int pm_dbg_init_done; |
191 | 191 | ||
192 | static int __init pm_dbg_init(void); | 192 | static int pm_dbg_init(void); |
193 | 193 | ||
194 | enum { | 194 | enum { |
195 | DEBUG_FILE_COUNTERS = 0, | 195 | DEBUG_FILE_COUNTERS = 0, |
@@ -595,7 +595,7 @@ static int option_set(void *data, u64 val) | |||
595 | 595 | ||
596 | DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n"); | 596 | DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n"); |
597 | 597 | ||
598 | static int __init pm_dbg_init(void) | 598 | static int pm_dbg_init(void) |
599 | { | 599 | { |
600 | int i; | 600 | int i; |
601 | struct dentry *d; | 601 | struct dentry *d; |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 7fe74067d85f..094279aefe9c 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/gpio.h> | ||
17 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
18 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
19 | #include <linux/apm-emulation.h> | 20 | #include <linux/apm-emulation.h> |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index c95258c274c1..1e2aba23e0d6 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -382,10 +382,8 @@ void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) | |||
382 | } | 382 | } |
383 | 383 | ||
384 | static struct sh_mobile_sdhi_info sh_sdhi1_platdata = { | 384 | static struct sh_mobile_sdhi_info sh_sdhi1_platdata = { |
385 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, | ||
386 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | ||
387 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, | 385 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, |
388 | .tmio_caps = MMC_CAP_NONREMOVABLE, | 386 | .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, |
389 | .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 387 | .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
390 | .set_pwr = ag5evm_sdhi1_set_pwr, | 388 | .set_pwr = ag5evm_sdhi1_set_pwr, |
391 | }; | 389 | }; |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 776f20560e72..7e1d37584321 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -126,7 +126,7 @@ | |||
126 | * ------+--------------------+--------------------+------- | 126 | * ------+--------------------+--------------------+------- |
127 | * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low | 127 | * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low |
128 | * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High | 128 | * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High |
129 | * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Tuch Panel | Low | 129 | * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low |
130 | * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low | 130 | * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low |
131 | * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low | 131 | * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low |
132 | * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High | 132 | * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High |
@@ -165,10 +165,10 @@ | |||
165 | * USB1 can become Host by r8a66597, and become Function by renesas_usbhs. | 165 | * USB1 can become Host by r8a66597, and become Function by renesas_usbhs. |
166 | * But don't select both drivers in same time. | 166 | * But don't select both drivers in same time. |
167 | * These uses same IRQ number for request_irq(), and aren't supporting | 167 | * These uses same IRQ number for request_irq(), and aren't supporting |
168 | * IRQF_SHARD / IORESOURCE_IRQ_SHAREABLE. | 168 | * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE. |
169 | * | 169 | * |
170 | * Actually these are old/new version of USB driver. | 170 | * Actually these are old/new version of USB driver. |
171 | * This mean its register will be broken if it supports SHARD IRQ, | 171 | * This mean its register will be broken if it supports shared IRQ, |
172 | */ | 172 | */ |
173 | 173 | ||
174 | /* | 174 | /* |
@@ -562,7 +562,121 @@ out: | |||
562 | clk_put(hdmi_ick); | 562 | clk_put(hdmi_ick); |
563 | } | 563 | } |
564 | 564 | ||
565 | /* USB1 (Host) */ | 565 | /* USBHS0 is connected to CN22 which takes a USB Mini-B plug |
566 | * | ||
567 | * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug, | ||
568 | * but on this particular board IRQ7 is already used by | ||
569 | * the touch screen. This leaves us with software polling. | ||
570 | */ | ||
571 | #define USBHS0_POLL_INTERVAL (HZ * 5) | ||
572 | |||
573 | struct usbhs_private { | ||
574 | unsigned int usbphyaddr; | ||
575 | unsigned int usbcrcaddr; | ||
576 | struct renesas_usbhs_platform_info info; | ||
577 | struct delayed_work work; | ||
578 | struct platform_device *pdev; | ||
579 | }; | ||
580 | |||
581 | #define usbhs_get_priv(pdev) \ | ||
582 | container_of(renesas_usbhs_get_info(pdev), \ | ||
583 | struct usbhs_private, info) | ||
584 | |||
585 | #define usbhs_is_connected(priv) \ | ||
586 | (!((1 << 7) & __raw_readw(priv->usbcrcaddr))) | ||
587 | |||
588 | static int usbhs_get_vbus(struct platform_device *pdev) | ||
589 | { | ||
590 | return usbhs_is_connected(usbhs_get_priv(pdev)); | ||
591 | } | ||
592 | |||
593 | static void usbhs_phy_reset(struct platform_device *pdev) | ||
594 | { | ||
595 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
596 | |||
597 | /* init phy */ | ||
598 | __raw_writew(0x8a0a, priv->usbcrcaddr); | ||
599 | } | ||
600 | |||
601 | static int usbhs0_get_id(struct platform_device *pdev) | ||
602 | { | ||
603 | return USBHS_GADGET; | ||
604 | } | ||
605 | |||
606 | static void usbhs0_work_function(struct work_struct *work) | ||
607 | { | ||
608 | struct usbhs_private *priv = container_of(work, struct usbhs_private, | ||
609 | work.work); | ||
610 | |||
611 | renesas_usbhs_call_notify_hotplug(priv->pdev); | ||
612 | schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL); | ||
613 | } | ||
614 | |||
615 | static int usbhs0_hardware_init(struct platform_device *pdev) | ||
616 | { | ||
617 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
618 | |||
619 | priv->pdev = pdev; | ||
620 | INIT_DELAYED_WORK(&priv->work, usbhs0_work_function); | ||
621 | schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL); | ||
622 | return 0; | ||
623 | } | ||
624 | |||
625 | static void usbhs0_hardware_exit(struct platform_device *pdev) | ||
626 | { | ||
627 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
628 | |||
629 | cancel_delayed_work_sync(&priv->work); | ||
630 | } | ||
631 | |||
632 | static struct usbhs_private usbhs0_private = { | ||
633 | .usbcrcaddr = 0xe605810c, /* USBCR2 */ | ||
634 | .info = { | ||
635 | .platform_callback = { | ||
636 | .hardware_init = usbhs0_hardware_init, | ||
637 | .hardware_exit = usbhs0_hardware_exit, | ||
638 | .phy_reset = usbhs_phy_reset, | ||
639 | .get_id = usbhs0_get_id, | ||
640 | .get_vbus = usbhs_get_vbus, | ||
641 | }, | ||
642 | .driver_param = { | ||
643 | .buswait_bwait = 4, | ||
644 | }, | ||
645 | }, | ||
646 | }; | ||
647 | |||
648 | static struct resource usbhs0_resources[] = { | ||
649 | [0] = { | ||
650 | .name = "USBHS0", | ||
651 | .start = 0xe6890000, | ||
652 | .end = 0xe68900e6 - 1, | ||
653 | .flags = IORESOURCE_MEM, | ||
654 | }, | ||
655 | [1] = { | ||
656 | .start = evt2irq(0x1ca0) /* USB0_USB0I0 */, | ||
657 | .flags = IORESOURCE_IRQ, | ||
658 | }, | ||
659 | }; | ||
660 | |||
661 | static struct platform_device usbhs0_device = { | ||
662 | .name = "renesas_usbhs", | ||
663 | .id = 0, | ||
664 | .dev = { | ||
665 | .platform_data = &usbhs0_private.info, | ||
666 | }, | ||
667 | .num_resources = ARRAY_SIZE(usbhs0_resources), | ||
668 | .resource = usbhs0_resources, | ||
669 | }; | ||
670 | |||
671 | /* USBHS1 is connected to CN31 which takes a USB Mini-AB plug | ||
672 | * | ||
673 | * Use J30 to select between Host and Function. This setting | ||
674 | * can however not be detected by software. Hotplug of USBHS1 | ||
675 | * is provided via IRQ8. | ||
676 | */ | ||
677 | #define IRQ8 evt2irq(0x0300) | ||
678 | |||
679 | /* USBHS1 USB Host support via r8a66597_hcd */ | ||
566 | static void usb1_host_port_power(int port, int power) | 680 | static void usb1_host_port_power(int port, int power) |
567 | { | 681 | { |
568 | if (!power) /* only power-on is supported for now */ | 682 | if (!power) /* only power-on is supported for now */ |
@@ -579,9 +693,9 @@ static struct r8a66597_platdata usb1_host_data = { | |||
579 | 693 | ||
580 | static struct resource usb1_host_resources[] = { | 694 | static struct resource usb1_host_resources[] = { |
581 | [0] = { | 695 | [0] = { |
582 | .name = "USBHS", | 696 | .name = "USBHS1", |
583 | .start = 0xE68B0000, | 697 | .start = 0xe68b0000, |
584 | .end = 0xE68B00E6 - 1, | 698 | .end = 0xe68b00e6 - 1, |
585 | .flags = IORESOURCE_MEM, | 699 | .flags = IORESOURCE_MEM, |
586 | }, | 700 | }, |
587 | [1] = { | 701 | [1] = { |
@@ -602,37 +716,14 @@ static struct platform_device usb1_host_device = { | |||
602 | .resource = usb1_host_resources, | 716 | .resource = usb1_host_resources, |
603 | }; | 717 | }; |
604 | 718 | ||
605 | /* USB1 (Function) */ | 719 | /* USBHS1 USB Function support via renesas_usbhs */ |
720 | |||
606 | #define USB_PHY_MODE (1 << 4) | 721 | #define USB_PHY_MODE (1 << 4) |
607 | #define USB_PHY_INT_EN ((1 << 3) | (1 << 2)) | 722 | #define USB_PHY_INT_EN ((1 << 3) | (1 << 2)) |
608 | #define USB_PHY_ON (1 << 1) | 723 | #define USB_PHY_ON (1 << 1) |
609 | #define USB_PHY_OFF (1 << 0) | 724 | #define USB_PHY_OFF (1 << 0) |
610 | #define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF) | 725 | #define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF) |
611 | 726 | ||
612 | struct usbhs_private { | ||
613 | unsigned int irq; | ||
614 | unsigned int usbphyaddr; | ||
615 | unsigned int usbcrcaddr; | ||
616 | struct renesas_usbhs_platform_info info; | ||
617 | }; | ||
618 | |||
619 | #define usbhs_get_priv(pdev) \ | ||
620 | container_of(renesas_usbhs_get_info(pdev), \ | ||
621 | struct usbhs_private, info) | ||
622 | |||
623 | #define usbhs_is_connected(priv) \ | ||
624 | (!((1 << 7) & __raw_readw(priv->usbcrcaddr))) | ||
625 | |||
626 | static int usbhs1_get_id(struct platform_device *pdev) | ||
627 | { | ||
628 | return USBHS_GADGET; | ||
629 | } | ||
630 | |||
631 | static int usbhs1_get_vbus(struct platform_device *pdev) | ||
632 | { | ||
633 | return usbhs_is_connected(usbhs_get_priv(pdev)); | ||
634 | } | ||
635 | |||
636 | static irqreturn_t usbhs1_interrupt(int irq, void *data) | 727 | static irqreturn_t usbhs1_interrupt(int irq, void *data) |
637 | { | 728 | { |
638 | struct platform_device *pdev = data; | 729 | struct platform_device *pdev = data; |
@@ -654,12 +745,10 @@ static int usbhs1_hardware_init(struct platform_device *pdev) | |||
654 | struct usbhs_private *priv = usbhs_get_priv(pdev); | 745 | struct usbhs_private *priv = usbhs_get_priv(pdev); |
655 | int ret; | 746 | int ret; |
656 | 747 | ||
657 | irq_set_irq_type(priv->irq, IRQ_TYPE_LEVEL_HIGH); | ||
658 | |||
659 | /* clear interrupt status */ | 748 | /* clear interrupt status */ |
660 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr); | 749 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr); |
661 | 750 | ||
662 | ret = request_irq(priv->irq, usbhs1_interrupt, 0, | 751 | ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH, |
663 | dev_name(&pdev->dev), pdev); | 752 | dev_name(&pdev->dev), pdev); |
664 | if (ret) { | 753 | if (ret) { |
665 | dev_err(&pdev->dev, "request_irq err\n"); | 754 | dev_err(&pdev->dev, "request_irq err\n"); |
@@ -679,15 +768,12 @@ static void usbhs1_hardware_exit(struct platform_device *pdev) | |||
679 | /* clear interrupt status */ | 768 | /* clear interrupt status */ |
680 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr); | 769 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr); |
681 | 770 | ||
682 | free_irq(priv->irq, pdev); | 771 | free_irq(IRQ8, pdev); |
683 | } | 772 | } |
684 | 773 | ||
685 | static void usbhs1_phy_reset(struct platform_device *pdev) | 774 | static int usbhs1_get_id(struct platform_device *pdev) |
686 | { | 775 | { |
687 | struct usbhs_private *priv = usbhs_get_priv(pdev); | 776 | return USBHS_GADGET; |
688 | |||
689 | /* init phy */ | ||
690 | __raw_writew(0x8a0a, priv->usbcrcaddr); | ||
691 | } | 777 | } |
692 | 778 | ||
693 | static u32 usbhs1_pipe_cfg[] = { | 779 | static u32 usbhs1_pipe_cfg[] = { |
@@ -710,16 +796,15 @@ static u32 usbhs1_pipe_cfg[] = { | |||
710 | }; | 796 | }; |
711 | 797 | ||
712 | static struct usbhs_private usbhs1_private = { | 798 | static struct usbhs_private usbhs1_private = { |
713 | .irq = evt2irq(0x0300), /* IRQ8 */ | 799 | .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */ |
714 | .usbphyaddr = 0xE60581E2, /* USBPHY1INTAP */ | 800 | .usbcrcaddr = 0xe6058130, /* USBCR4 */ |
715 | .usbcrcaddr = 0xE6058130, /* USBCR4 */ | ||
716 | .info = { | 801 | .info = { |
717 | .platform_callback = { | 802 | .platform_callback = { |
718 | .hardware_init = usbhs1_hardware_init, | 803 | .hardware_init = usbhs1_hardware_init, |
719 | .hardware_exit = usbhs1_hardware_exit, | 804 | .hardware_exit = usbhs1_hardware_exit, |
720 | .phy_reset = usbhs1_phy_reset, | ||
721 | .get_id = usbhs1_get_id, | 805 | .get_id = usbhs1_get_id, |
722 | .get_vbus = usbhs1_get_vbus, | 806 | .phy_reset = usbhs_phy_reset, |
807 | .get_vbus = usbhs_get_vbus, | ||
723 | }, | 808 | }, |
724 | .driver_param = { | 809 | .driver_param = { |
725 | .buswait_bwait = 4, | 810 | .buswait_bwait = 4, |
@@ -731,9 +816,9 @@ static struct usbhs_private usbhs1_private = { | |||
731 | 816 | ||
732 | static struct resource usbhs1_resources[] = { | 817 | static struct resource usbhs1_resources[] = { |
733 | [0] = { | 818 | [0] = { |
734 | .name = "USBHS", | 819 | .name = "USBHS1", |
735 | .start = 0xE68B0000, | 820 | .start = 0xe68b0000, |
736 | .end = 0xE68B00E6 - 1, | 821 | .end = 0xe68b00e6 - 1, |
737 | .flags = IORESOURCE_MEM, | 822 | .flags = IORESOURCE_MEM, |
738 | }, | 823 | }, |
739 | [1] = { | 824 | [1] = { |
@@ -752,7 +837,6 @@ static struct platform_device usbhs1_device = { | |||
752 | .resource = usbhs1_resources, | 837 | .resource = usbhs1_resources, |
753 | }; | 838 | }; |
754 | 839 | ||
755 | |||
756 | /* LED */ | 840 | /* LED */ |
757 | static struct gpio_led mackerel_leds[] = { | 841 | static struct gpio_led mackerel_leds[] = { |
758 | { | 842 | { |
@@ -1203,6 +1287,7 @@ static struct platform_device *mackerel_devices[] __initdata = { | |||
1203 | &nor_flash_device, | 1287 | &nor_flash_device, |
1204 | &smc911x_device, | 1288 | &smc911x_device, |
1205 | &lcdc_device, | 1289 | &lcdc_device, |
1290 | &usbhs0_device, | ||
1206 | &usb1_host_device, | 1291 | &usb1_host_device, |
1207 | &usbhs1_device, | 1292 | &usbhs1_device, |
1208 | &leds_device, | 1293 | &leds_device, |
@@ -1301,6 +1386,7 @@ static void __init mackerel_map_io(void) | |||
1301 | 1386 | ||
1302 | #define GPIO_PORT9CR 0xE6051009 | 1387 | #define GPIO_PORT9CR 0xE6051009 |
1303 | #define GPIO_PORT10CR 0xE605100A | 1388 | #define GPIO_PORT10CR 0xE605100A |
1389 | #define GPIO_PORT167CR 0xE60520A7 | ||
1304 | #define GPIO_PORT168CR 0xE60520A8 | 1390 | #define GPIO_PORT168CR 0xE60520A8 |
1305 | #define SRCR4 0xe61580bc | 1391 | #define SRCR4 0xe61580bc |
1306 | #define USCCR1 0xE6058144 | 1392 | #define USCCR1 0xE6058144 |
@@ -1354,17 +1440,17 @@ static void __init mackerel_init(void) | |||
1354 | gpio_request(GPIO_PORT151, NULL); /* LCDDON */ | 1440 | gpio_request(GPIO_PORT151, NULL); /* LCDDON */ |
1355 | gpio_direction_output(GPIO_PORT151, 1); | 1441 | gpio_direction_output(GPIO_PORT151, 1); |
1356 | 1442 | ||
1357 | /* USB enable */ | 1443 | /* USBHS0 */ |
1358 | gpio_request(GPIO_FN_VBUS0_1, NULL); | 1444 | gpio_request(GPIO_FN_VBUS0_0, NULL); |
1359 | gpio_request(GPIO_FN_IDIN_1_18, NULL); | 1445 | gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */ |
1360 | gpio_request(GPIO_FN_PWEN_1_115, NULL); | 1446 | |
1361 | gpio_request(GPIO_FN_OVCN_1_114, NULL); | 1447 | /* USBHS1 */ |
1362 | gpio_request(GPIO_FN_EXTLP_1, NULL); | 1448 | gpio_request(GPIO_FN_VBUS0_1, NULL); |
1363 | gpio_request(GPIO_FN_OVCN2_1, NULL); | 1449 | gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */ |
1364 | gpio_pull_down(GPIO_PORT168CR); | 1450 | gpio_request(GPIO_FN_IDIN_1_113, NULL); |
1365 | 1451 | ||
1366 | /* setup USB phy */ | 1452 | /* USB phy tweak to make the r8a66597_hcd host driver work */ |
1367 | __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */ | 1453 | __raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */ |
1368 | 1454 | ||
1369 | /* enable FSI2 port A (ak4643) */ | 1455 | /* enable FSI2 port A (ak4643) */ |
1370 | gpio_request(GPIO_FN_FSIAIBT, NULL); | 1456 | gpio_request(GPIO_FN_FSIAIBT, NULL); |
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index 5d0e1503ece6..a911a60e7719 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c | |||
@@ -250,6 +250,11 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id) | |||
250 | return IRQ_HANDLED; | 250 | return IRQ_HANDLED; |
251 | } | 251 | } |
252 | 252 | ||
253 | static int sh73a0_set_wake(struct irq_data *data, unsigned int on) | ||
254 | { | ||
255 | return 0; /* always allow wakeup */ | ||
256 | } | ||
257 | |||
253 | void __init sh73a0_init_irq(void) | 258 | void __init sh73a0_init_irq(void) |
254 | { | 259 | { |
255 | void __iomem *gic_dist_base = __io(0xf0001000); | 260 | void __iomem *gic_dist_base = __io(0xf0001000); |
@@ -257,6 +262,7 @@ void __init sh73a0_init_irq(void) | |||
257 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); | 262 | void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); |
258 | 263 | ||
259 | gic_init(0, 29, gic_dist_base, gic_cpu_base); | 264 | gic_init(0, 29, gic_dist_base, gic_cpu_base); |
265 | gic_arch_extn.irq_set_wake = sh73a0_set_wake; | ||
260 | 266 | ||
261 | register_intc_controller(&intcs_desc); | 267 | register_intc_controller(&intcs_desc); |
262 | 268 | ||
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c index 2c10190dbb55..e546017f15de 100644 --- a/arch/arm/mach-shmobile/setup-sh7367.c +++ b/arch/arm/mach-shmobile/setup-sh7367.c | |||
@@ -38,7 +38,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
38 | .flags = UPF_BOOT_AUTOCONF, | 38 | .flags = UPF_BOOT_AUTOCONF, |
39 | .scscr = SCSCR_RE | SCSCR_TE, | 39 | .scscr = SCSCR_RE | SCSCR_TE, |
40 | .scbrr_algo_id = SCBRR_ALGO_4, | 40 | .scbrr_algo_id = SCBRR_ALGO_4, |
41 | .type = PORT_SCIF, | 41 | .type = PORT_SCIFA, |
42 | .irqs = { evt2irq(0xc00), evt2irq(0xc00), | 42 | .irqs = { evt2irq(0xc00), evt2irq(0xc00), |
43 | evt2irq(0xc00), evt2irq(0xc00) }, | 43 | evt2irq(0xc00), evt2irq(0xc00) }, |
44 | }; | 44 | }; |
@@ -57,7 +57,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
57 | .flags = UPF_BOOT_AUTOCONF, | 57 | .flags = UPF_BOOT_AUTOCONF, |
58 | .scscr = SCSCR_RE | SCSCR_TE, | 58 | .scscr = SCSCR_RE | SCSCR_TE, |
59 | .scbrr_algo_id = SCBRR_ALGO_4, | 59 | .scbrr_algo_id = SCBRR_ALGO_4, |
60 | .type = PORT_SCIF, | 60 | .type = PORT_SCIFA, |
61 | .irqs = { evt2irq(0xc20), evt2irq(0xc20), | 61 | .irqs = { evt2irq(0xc20), evt2irq(0xc20), |
62 | evt2irq(0xc20), evt2irq(0xc20) }, | 62 | evt2irq(0xc20), evt2irq(0xc20) }, |
63 | }; | 63 | }; |
@@ -76,7 +76,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
76 | .flags = UPF_BOOT_AUTOCONF, | 76 | .flags = UPF_BOOT_AUTOCONF, |
77 | .scscr = SCSCR_RE | SCSCR_TE, | 77 | .scscr = SCSCR_RE | SCSCR_TE, |
78 | .scbrr_algo_id = SCBRR_ALGO_4, | 78 | .scbrr_algo_id = SCBRR_ALGO_4, |
79 | .type = PORT_SCIF, | 79 | .type = PORT_SCIFA, |
80 | .irqs = { evt2irq(0xc40), evt2irq(0xc40), | 80 | .irqs = { evt2irq(0xc40), evt2irq(0xc40), |
81 | evt2irq(0xc40), evt2irq(0xc40) }, | 81 | evt2irq(0xc40), evt2irq(0xc40) }, |
82 | }; | 82 | }; |
@@ -95,7 +95,7 @@ static struct plat_sci_port scif3_platform_data = { | |||
95 | .flags = UPF_BOOT_AUTOCONF, | 95 | .flags = UPF_BOOT_AUTOCONF, |
96 | .scscr = SCSCR_RE | SCSCR_TE, | 96 | .scscr = SCSCR_RE | SCSCR_TE, |
97 | .scbrr_algo_id = SCBRR_ALGO_4, | 97 | .scbrr_algo_id = SCBRR_ALGO_4, |
98 | .type = PORT_SCIF, | 98 | .type = PORT_SCIFA, |
99 | .irqs = { evt2irq(0xc60), evt2irq(0xc60), | 99 | .irqs = { evt2irq(0xc60), evt2irq(0xc60), |
100 | evt2irq(0xc60), evt2irq(0xc60) }, | 100 | evt2irq(0xc60), evt2irq(0xc60) }, |
101 | }; | 101 | }; |
@@ -114,7 +114,7 @@ static struct plat_sci_port scif4_platform_data = { | |||
114 | .flags = UPF_BOOT_AUTOCONF, | 114 | .flags = UPF_BOOT_AUTOCONF, |
115 | .scscr = SCSCR_RE | SCSCR_TE, | 115 | .scscr = SCSCR_RE | SCSCR_TE, |
116 | .scbrr_algo_id = SCBRR_ALGO_4, | 116 | .scbrr_algo_id = SCBRR_ALGO_4, |
117 | .type = PORT_SCIF, | 117 | .type = PORT_SCIFA, |
118 | .irqs = { evt2irq(0xd20), evt2irq(0xd20), | 118 | .irqs = { evt2irq(0xd20), evt2irq(0xd20), |
119 | evt2irq(0xd20), evt2irq(0xd20) }, | 119 | evt2irq(0xd20), evt2irq(0xd20) }, |
120 | }; | 120 | }; |
@@ -133,7 +133,7 @@ static struct plat_sci_port scif5_platform_data = { | |||
133 | .flags = UPF_BOOT_AUTOCONF, | 133 | .flags = UPF_BOOT_AUTOCONF, |
134 | .scscr = SCSCR_RE | SCSCR_TE, | 134 | .scscr = SCSCR_RE | SCSCR_TE, |
135 | .scbrr_algo_id = SCBRR_ALGO_4, | 135 | .scbrr_algo_id = SCBRR_ALGO_4, |
136 | .type = PORT_SCIF, | 136 | .type = PORT_SCIFA, |
137 | .irqs = { evt2irq(0xd40), evt2irq(0xd40), | 137 | .irqs = { evt2irq(0xd40), evt2irq(0xd40), |
138 | evt2irq(0xd40), evt2irq(0xd40) }, | 138 | evt2irq(0xd40), evt2irq(0xd40) }, |
139 | }; | 139 | }; |
@@ -152,7 +152,7 @@ static struct plat_sci_port scif6_platform_data = { | |||
152 | .flags = UPF_BOOT_AUTOCONF, | 152 | .flags = UPF_BOOT_AUTOCONF, |
153 | .scscr = SCSCR_RE | SCSCR_TE, | 153 | .scscr = SCSCR_RE | SCSCR_TE, |
154 | .scbrr_algo_id = SCBRR_ALGO_4, | 154 | .scbrr_algo_id = SCBRR_ALGO_4, |
155 | .type = PORT_SCIF, | 155 | .type = PORT_SCIFB, |
156 | .irqs = { evt2irq(0xd60), evt2irq(0xd60), | 156 | .irqs = { evt2irq(0xd60), evt2irq(0xd60), |
157 | evt2irq(0xd60), evt2irq(0xd60) }, | 157 | evt2irq(0xd60), evt2irq(0xd60) }, |
158 | }; | 158 | }; |
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index a37b8eb65b76..49fc0df0c21f 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
@@ -84,6 +84,7 @@ | |||
84 | #include <linux/io.h> | 84 | #include <linux/io.h> |
85 | #include <linux/clk.h> | 85 | #include <linux/clk.h> |
86 | #include <linux/clkdev.h> | 86 | #include <linux/clkdev.h> |
87 | #include <linux/pm_runtime.h> | ||
87 | 88 | ||
88 | #include <plat/omap_device.h> | 89 | #include <plat/omap_device.h> |
89 | #include <plat/omap_hwmod.h> | 90 | #include <plat/omap_hwmod.h> |
@@ -539,20 +540,34 @@ int omap_early_device_register(struct omap_device *od) | |||
539 | static int _od_runtime_suspend(struct device *dev) | 540 | static int _od_runtime_suspend(struct device *dev) |
540 | { | 541 | { |
541 | struct platform_device *pdev = to_platform_device(dev); | 542 | struct platform_device *pdev = to_platform_device(dev); |
543 | int ret; | ||
544 | |||
545 | ret = pm_generic_runtime_suspend(dev); | ||
546 | |||
547 | if (!ret) | ||
548 | omap_device_idle(pdev); | ||
549 | |||
550 | return ret; | ||
551 | } | ||
542 | 552 | ||
543 | return omap_device_idle(pdev); | 553 | static int _od_runtime_idle(struct device *dev) |
554 | { | ||
555 | return pm_generic_runtime_idle(dev); | ||
544 | } | 556 | } |
545 | 557 | ||
546 | static int _od_runtime_resume(struct device *dev) | 558 | static int _od_runtime_resume(struct device *dev) |
547 | { | 559 | { |
548 | struct platform_device *pdev = to_platform_device(dev); | 560 | struct platform_device *pdev = to_platform_device(dev); |
549 | 561 | ||
550 | return omap_device_enable(pdev); | 562 | omap_device_enable(pdev); |
563 | |||
564 | return pm_generic_runtime_resume(dev); | ||
551 | } | 565 | } |
552 | 566 | ||
553 | static struct dev_power_domain omap_device_power_domain = { | 567 | static struct dev_power_domain omap_device_power_domain = { |
554 | .ops = { | 568 | .ops = { |
555 | .runtime_suspend = _od_runtime_suspend, | 569 | .runtime_suspend = _od_runtime_suspend, |
570 | .runtime_idle = _od_runtime_idle, | ||
556 | .runtime_resume = _od_runtime_resume, | 571 | .runtime_resume = _od_runtime_resume, |
557 | USE_PLATFORM_PM_SLEEP_OPS | 572 | USE_PLATFORM_PM_SLEEP_OPS |
558 | } | 573 | } |