diff options
author | Tim Kryger <tim.kryger@linaro.org> | 2013-12-05 14:20:38 -0500 |
---|---|---|
committer | Christian Daudt <bcm@fixthebug.org> | 2013-12-23 02:45:32 -0500 |
commit | 740309b6dc9faa6b3c8f7dcd1fac63eae1ee1709 (patch) | |
tree | 6fb95a5d197b3b9ed9247c728d7b5ae91a3db605 /arch/arm | |
parent | dfc4334b93a32baf7378de6c9deca2420c7f896b (diff) |
ARM: dts: Specify clocks for UARTs on bcm11351
The frequency property in "snps,dw-apb-uart" entries are no longer
required if the rate of the external clock can be determined using the
clk api (see e302cd9 serial: 8250_dw: add support for clk api).
This patch replaces the frequency property in the UART nodes of
bcm11351.dtsi with references to the relevant clocks following the
common clock binding.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/bcm11351.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index d848997990ee..7487c7ef3a3e 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi | |||
@@ -43,7 +43,7 @@ | |||
43 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 43 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
44 | status = "disabled"; | 44 | status = "disabled"; |
45 | reg = <0x3e000000 0x1000>; | 45 | reg = <0x3e000000 0x1000>; |
46 | clock-frequency = <13000000>; | 46 | clocks = <&uartb_clk>; |
47 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; | 47 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
48 | reg-shift = <2>; | 48 | reg-shift = <2>; |
49 | reg-io-width = <4>; | 49 | reg-io-width = <4>; |
@@ -53,7 +53,7 @@ | |||
53 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 53 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
54 | status = "disabled"; | 54 | status = "disabled"; |
55 | reg = <0x3e001000 0x1000>; | 55 | reg = <0x3e001000 0x1000>; |
56 | clock-frequency = <13000000>; | 56 | clocks = <&uartb2_clk>; |
57 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; | 57 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; |
58 | reg-shift = <2>; | 58 | reg-shift = <2>; |
59 | reg-io-width = <4>; | 59 | reg-io-width = <4>; |
@@ -63,7 +63,7 @@ | |||
63 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 63 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
64 | status = "disabled"; | 64 | status = "disabled"; |
65 | reg = <0x3e002000 0x1000>; | 65 | reg = <0x3e002000 0x1000>; |
66 | clock-frequency = <13000000>; | 66 | clocks = <&uartb3_clk>; |
67 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; | 67 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
68 | reg-shift = <2>; | 68 | reg-shift = <2>; |
69 | reg-io-width = <4>; | 69 | reg-io-width = <4>; |
@@ -73,7 +73,7 @@ | |||
73 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 73 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
74 | status = "disabled"; | 74 | status = "disabled"; |
75 | reg = <0x3e003000 0x1000>; | 75 | reg = <0x3e003000 0x1000>; |
76 | clock-frequency = <13000000>; | 76 | clocks = <&uartb4_clk>; |
77 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; | 77 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
78 | reg-shift = <2>; | 78 | reg-shift = <2>; |
79 | reg-io-width = <4>; | 79 | reg-io-width = <4>; |