Merge commit 'v3.16' into next

27 files changed, 144 insertions, 71 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 245058b3b0ef..290f02ee0157 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,6 +6,7 @@ config ARM
         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
         select ARCH_HAVE_CUSTOM_GPIO_H
         select ARCH_MIGHT_HAVE_PC_PARPORT
+        select ARCH_SUPPORTS_ATOMIC_RMW
         select ARCH_USE_BUILTIN_BSWAP
         select ARCH_USE_CMPXCHG_LOCKREF
         select ARCH_WANT_IPC_PARSE_VERSION
@@ -312,7 +313,7 @@ config ARCH_MULTIPLATFORM
 config ARCH_INTEGRATOR
         bool "ARM Ltd. Integrator family"
         select ARM_AMBA
-        select ARM_PATCH_PHYS_VIRT
+        select ARM_PATCH_PHYS_VIRT if MMU
         select AUTO_ZRELADDR
         select COMMON_CLK
         select COMMON_CLK_VERSATILE
@@ -658,7 +659,7 @@ config ARCH_MSM
 config ARCH_SHMOBILE_LEGACY
         bool "Renesas ARM SoCs (non-multiplatform)"
         select ARCH_SHMOBILE
-        select ARM_PATCH_PHYS_VIRT
+        select ARM_PATCH_PHYS_VIRT if MMU
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU if SMP
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 287795985e32..b84bac5bada4 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -925,7 +925,7 @@
                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
                         reg = <0x00500000 0x00100000>;
                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-                        clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
+                        clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
                                  <&uhpck>;
                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
                         status = "disabled";
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 2ebc42140ea6..2c0d6ea3ab41 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -1124,6 +1124,7 @@
                                 compatible = "atmel,at91sam9rl-pwm";
                                 reg = <0xf8034000 0x300>;
                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+                                clocks = <&pwm_clk>;
                                 #pwm-cells = <3>;
                                 status = "disabled";
                         };
@@ -1155,8 +1156,7 @@
                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
                         reg = <0x00600000 0x100000>;
                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-                        clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
-                                 <&uhpck>;
+                        clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
                         status = "disabled";
                 };
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index ab1116d086be..83a5b8685bd9 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -73,7 +73,7 @@
 
                 L2: l2-cache {
                         compatible = "arm,pl310-cache";
-                        reg = <0xfc10000 0x100000>;
+                        reg = <0x100000 0x100000>;
                         interrupts = <0 15 4>;
                         cache-unified;
                         cache-level = <2>;
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 1fe45d1f75ec..b15f1a77d684 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -353,7 +353,7 @@
         };
 
         twl_power: power {
-                compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
+                compatible = "ti,twl4030-power-n900";
                 ti,use_poweroff;
         };
 };
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8d7ffaeff6e0..79f68acfd5d4 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -540,9 +540,9 @@
                         #clock-cells = <0>;
                         clock-output-names = "sd1";
                 };
-                sd2_clk: sd3_clk@e615007c {
+                sd2_clk: sd3_clk@e615026c {
                         compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
-                        reg = <0 0xe615007c 0 4>;
+                        reg = <0 0xe615026c 0 4>;
                         clocks = <&pll1_div2_clk>;
                         #clock-cells = <0>;
                         clock-output-names = "sd2";
diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts
index f557feb997f4..90d8b6c7a205 100644
--- a/arch/arm/boot/dts/ste-nomadik-s8815.dts
+++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts
@@ -4,7 +4,7 @@
  */
 
 /dts-v1/;
-/include/ "ste-nomadik-stn8815.dtsi"
+#include "ste-nomadik-stn8815.dtsi"
 
 / {
         model = "Calao Systems USB-S8815";
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index d316c955bd5f..dbcf521b017f 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -1,7 +1,9 @@
 /*
  * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
  */
-/include/ "skeleton.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
 
 / {
         #address-cells = <1>;
@@ -842,8 +844,7 @@
                         bus-width = <4>;
                         cap-mmc-highspeed;
                         cap-sd-highspeed;
-                        cd-gpios = <&gpio3 15 0x1>;
-                        cd-inverted;
+                        cd-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
                         pinctrl-names = "default";
                         pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
                         vmmc-supply = <&vmmc_regulator>;
diff --git a/arch/arm/crypto/aesbs-glue.c b/arch/arm/crypto/aesbs-glue.c
index 4522366da759..15468fbbdea3 100644
--- a/arch/arm/crypto/aesbs-glue.c
+++ b/arch/arm/crypto/aesbs-glue.c
@@ -137,7 +137,7 @@ static int aesbs_cbc_encrypt(struct blkcipher_desc *desc,
                                 dst += AES_BLOCK_SIZE;
                         } while (--blocks);
                 }
-                err = blkcipher_walk_done(desc, &walk, 0);
+                err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
         }
         return err;
 }
@@ -158,7 +158,7 @@ static int aesbs_cbc_decrypt(struct blkcipher_desc *desc,
                 bsaes_cbc_encrypt(walk.src.virt.addr, walk.dst.virt.addr,
                                   walk.nbytes, &ctx->dec, walk.iv);
                 kernel_neon_end();
-                err = blkcipher_walk_done(desc, &walk, 0);
+                err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
         }
         while (walk.nbytes) {
                 u32 blocks = walk.nbytes / AES_BLOCK_SIZE;
@@ -182,7 +182,7 @@ static int aesbs_cbc_decrypt(struct blkcipher_desc *desc,
                         dst += AES_BLOCK_SIZE;
                         src += AES_BLOCK_SIZE;
                 } while (--blocks);
-                err = blkcipher_walk_done(desc, &walk, 0);
+                err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
         }
         return err;
 }
@@ -268,7 +268,7 @@ static int aesbs_xts_encrypt(struct blkcipher_desc *desc,
                 bsaes_xts_encrypt(walk.src.virt.addr, walk.dst.virt.addr,
                                   walk.nbytes, &ctx->enc, walk.iv);
                 kernel_neon_end();
-                err = blkcipher_walk_done(desc, &walk, 0);
+                err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
         }
         return err;
 }
@@ -292,7 +292,7 @@ static int aesbs_xts_decrypt(struct blkcipher_desc *desc,
                 bsaes_xts_decrypt(walk.src.virt.addr, walk.dst.virt.addr,
                                   walk.nbytes, &ctx->dec, walk.iv);
                 kernel_neon_end();
-                err = blkcipher_walk_done(desc, &walk, 0);
+                err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
         }
         return err;
 }
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 060a75e99263..0406cb3f1af7 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -50,6 +50,7 @@ struct machine_desc {
         struct smp_operations   *smp;           /* SMP operations       */
         bool                    (*smp_init)(void);
         void                    (*fixup)(struct tag *, char **);
+        void                    (*dt_fixup)(void);
         void                    (*init_meminfo)(void);
         void                    (*reserve)(void);/* reserve mem blocks  */
         void                    (*map_io)(void);/* IO mapping function  */
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index e94a157ddff1..11c54de9f8cf 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -212,7 +212,7 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
         mdesc_best = &__mach_desc_GENERIC_DT;
 #endif
 
-        if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys)))
+        if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys)))
                 return NULL;
 
         mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
@@ -237,6 +237,12 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
                 dump_machine_table(); /* does not return */
         }
 
+        /* We really don't want to do this, but sometimes firmware provides buggy data */
+        if (mdesc->dt_fixup)
+                mdesc->dt_fixup();
+
+        early_init_dt_scan_nodes();
+
         /* Change machine number to match the mdesc we're using */
         __machine_arch_type = mdesc->nr;
 
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index a5599cfc43cb..2b32978ae905 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -94,13 +94,19 @@ ENTRY(iwmmxt_task_enable)
 
         mrc     p15, 0, r2, c2, c0, 0
         mov     r2, r2                          @ cpwait
+        bl      concan_save
 
-        teq     r1, #0                          @ test for last ownership
-        mov     lr, r9                          @ normal exit from exception
-        beq     concan_load                     @ no owner, skip save
+#ifdef CONFIG_PREEMPT_COUNT
+        get_thread_info r10
+#endif
+4:      dec_preempt_count r10, r3
+        mov     pc, r9                          @ normal exit from exception
 
 concan_save:
 
+        teq     r1, #0                          @ test for last ownership
+        beq     concan_load                     @ no owner, skip save
+
         tmrc    r2, wCon
 
         @ CUP? wCx
@@ -138,7 +144,7 @@ concan_dump:
         wstrd   wR15, [r1, #MMX_WR15]
 
 2:      teq     r0, #0                          @ anything to load?
-        beq     3f
+        moveq   pc, lr                          @ if not, return
 
 concan_load:
 
@@ -171,14 +177,9 @@ concan_load:
         @ clear CUP/MUP (only if r1 != 0)
         teq     r1, #0
         mov     r2, #0
-        beq     3f
-        tmcr    wCon, r2
+        moveq   pc, lr
 
-3:
-#ifdef CONFIG_PREEMPT_COUNT
-        get_thread_info r10
-#endif
-4:      dec_preempt_count r10, r3
+        tmcr    wCon, r2
         mov     pc, lr
 
 /*
diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c
index 778c2f7024ff..a74b53c1b7df 100644
--- a/arch/arm/kernel/kgdb.c
+++ b/arch/arm/kernel/kgdb.c
@@ -160,12 +160,16 @@ static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int instr)
 static struct undef_hook kgdb_brkpt_hook = {
         .instr_mask             = 0xffffffff,
         .instr_val              = KGDB_BREAKINST,
+        .cpsr_mask              = MODE_MASK,
+        .cpsr_val               = SVC_MODE,
         .fn                     = kgdb_brk_fn
 };
 
 static struct undef_hook kgdb_compiled_brkpt_hook = {
         .instr_mask             = 0xffffffff,
         .instr_val              = KGDB_COMPILED_BREAK,
+        .cpsr_mask              = MODE_MASK,
+        .cpsr_val               = SVC_MODE,
         .fn                     = kgdb_compiled_brk_fn
 };
 
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 9d853189028b..e35d880f9773 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -275,7 +275,7 @@ void store_cpu_topology(unsigned int cpuid)
                 cpu_topology[cpuid].socket_id, mpidr);
 }
 
-static inline const int cpu_corepower_flags(void)
+static inline int cpu_corepower_flags(void)
 {
         return SD_SHARE_PKG_RESOURCES  | SD_SHARE_POWERDOMAIN;
 }
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 46d893fcbe85..66c9b9614f3c 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -335,6 +335,15 @@ static void __init exynos_reserve(void)
 #endif
 }
 
+static void __init exynos_dt_fixup(void)
+{
+        /*
+         * Some versions of uboot pass garbage entries in the memory node,
+         * use the old CONFIG_ARM_NR_BANKS
+         */
+        of_fdt_limit_memory(8);
+}
+
 DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
         /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
@@ -348,4 +357,5 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
         .dt_compat      = exynos_dt_compat,
         .restart        = exynos_restart,
         .reserve        = exynos_reserve,
+        .dt_fixup       = exynos_dt_fixup,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 8a134d019cb3..920a4baa53cd 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -40,15 +40,17 @@ static inline void cpu_leave_lowpower(void)
 
 static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 {
+        u32 mpidr = cpu_logical_map(cpu);
+        u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+
         for (;;) {
 
-                /* make cpu1 to be turned off at next WFI command */
-                if (cpu == 1)
-                        exynos_cpu_power_down(cpu);
+                /* Turn the CPU off on next WFI instruction. */
+                exynos_cpu_power_down(core_id);
 
                 wfi();
 
-                if (pen_release == cpu_logical_map(cpu)) {
+                if (pen_release == core_id) {
                         /*
                          * OK, proper wakeup, we're done
                          */
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 1c8d31e39520..50b9aad5e27b 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -90,7 +90,8 @@ static void exynos_secondary_init(unsigned int cpu)
 static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
-        unsigned long phys_cpu = cpu_logical_map(cpu);
+        u32 mpidr = cpu_logical_map(cpu);
+        u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
         int ret = -ENOSYS;
 
         /*
@@ -104,17 +105,18 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
          * the holding pen - release it, then wait for it to flag
          * that it has been released by resetting pen_release.
          *
-         * Note that "pen_release" is the hardware CPU ID, whereas
+         * Note that "pen_release" is the hardware CPU core ID, whereas
          * "cpu" is Linux's internal ID.
          */
-        write_pen_release(phys_cpu);
+        write_pen_release(core_id);
 
-        if (!exynos_cpu_power_state(cpu)) {
-                exynos_cpu_power_up(cpu);
+        if (!exynos_cpu_power_state(core_id)) {
+                exynos_cpu_power_up(core_id);
                 timeout = 10;
 
                 /* wait max 10 ms until cpu1 is on */
-                while (exynos_cpu_power_state(cpu) != S5P_CORE_LOCAL_PWR_EN) {
+                while (exynos_cpu_power_state(core_id)
+                       != S5P_CORE_LOCAL_PWR_EN) {
                         if (timeout-- == 0)
                                 break;
 
@@ -145,20 +147,20 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
                  * Try to set boot address using firmware first
                  * and fall back to boot register if it fails.
                  */
-                ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr);
+                ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);
                 if (ret && ret != -ENOSYS)
                         goto fail;
                 if (ret == -ENOSYS) {
-                        void __iomem *boot_reg = cpu_boot_reg(phys_cpu);
+                        void __iomem *boot_reg = cpu_boot_reg(core_id);
 
                         if (IS_ERR(boot_reg)) {
                                 ret = PTR_ERR(boot_reg);
                                 goto fail;
                         }
-                        __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+                        __raw_writel(boot_addr, cpu_boot_reg(core_id));
                 }
 
-                call_firmware_op(cpu_boot, phys_cpu);
+                call_firmware_op(cpu_boot, core_id);
 
                 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 
@@ -227,22 +229,24 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
          * boot register if it fails.
          */
         for (i = 1; i < max_cpus; ++i) {
-                unsigned long phys_cpu;
                 unsigned long boot_addr;
+                u32 mpidr;
+                u32 core_id;
                 int ret;
 
-                phys_cpu = cpu_logical_map(i);
+                mpidr = cpu_logical_map(i);
+                core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
                 boot_addr = virt_to_phys(exynos4_secondary_startup);
 
-                ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr);
+                ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);
                 if (ret && ret != -ENOSYS)
                         break;
                 if (ret == -ENOSYS) {
-                        void __iomem *boot_reg = cpu_boot_reg(phys_cpu);
+                        void __iomem *boot_reg = cpu_boot_reg(core_id);
 
                         if (IS_ERR(boot_reg))
                                 break;
-                        __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+                        __raw_writel(boot_addr, cpu_boot_reg(core_id));
                 }
         }
 }
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 8e795dea02ec..8556c787e59c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -70,7 +70,7 @@ static const char *cko_sels[] = { "cko1", "cko2", };
 static const char *lvds_sels[] = {
         "dummy", "dummy", "dummy", "dummy", "dummy", "dummy",
         "pll4_audio", "pll5_video", "pll8_mlb", "enet_ref",
-        "pcie_ref", "sata_ref",
+        "pcie_ref_125m", "sata_ref_100m",
 };
 
 enum mx6q_clks {
@@ -491,7 +491,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 
         /* All existing boards with PCIe use LVDS1 */
         if (IS_ENABLED(CONFIG_PCI_IMX6))
-                clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
+                clk_set_parent(clk[lvds1_sel], clk[sata_ref_100m]);
 
         /* Set initial power mode */
         imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 477202fd39cc..2bdc3233abe2 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -292,6 +292,10 @@ static struct notifier_block mvebu_hwcc_nb = {
         .notifier_call = mvebu_hwcc_notifier,
 };
 
+static struct notifier_block mvebu_hwcc_pci_nb = {
+        .notifier_call = mvebu_hwcc_notifier,
+};
+
 static void __init armada_370_coherency_init(struct device_node *np)
 {
         struct resource res;
@@ -427,7 +431,7 @@ static int __init coherency_pci_init(void)
 {
         if (coherency_available())
                 bus_register_notifier(&pci_bus_type,
-                                       &mvebu_hwcc_nb);
+                                       &mvebu_hwcc_pci_nb);
         return 0;
 }
 
diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S
index 5925366bc03c..da5bb292b91c 100644
--- a/arch/arm/mach-mvebu/headsmp-a9.S
+++ b/arch/arm/mach-mvebu/headsmp-a9.S
@@ -15,6 +15,8 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
+#include <asm/assembler.h>
+
         __CPUINIT
 #define CPU_RESUME_ADDR_REG 0xf10182d4
 
@@ -22,13 +24,18 @@
 .global armada_375_smp_cpu1_enable_code_end
 
 armada_375_smp_cpu1_enable_code_start:
-        ldr     r0, [pc, #4]
+ARM_BE8(setend  be)
+        adr     r0, 1f
+        ldr     r0, [r0]
         ldr     r1, [r0]
+ARM_BE8(rev     r1, r1)
         mov     pc, r1
+1:
         .word   CPU_RESUME_ADDR_REG
 armada_375_smp_cpu1_enable_code_end:
 
 ENTRY(mvebu_cortex_a9_secondary_startup)
+ARM_BE8(setend  be)
         bl      v7_invalidate_l1
         b       secondary_startup
 ENDPROC(mvebu_cortex_a9_secondary_startup)
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index a1d407c0febe..25aa8237d668 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -201,12 +201,12 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
 
         /* Test the CR_C bit and set it if it was cleared */
         asm volatile(
-        "mrc    p15, 0, %0, c1, c0, 0 \n\t"
-        "tst    %0, #(1 << 2) \n\t"
-        "orreq  %0, %0, #(1 << 2) \n\t"
-        "mcreq  p15, 0, %0, c1, c0, 0 \n\t"
+        "mrc    p15, 0, r0, c1, c0, 0 \n\t"
+        "tst    r0, #(1 << 2) \n\t"
+        "orreq  r0, r0, #(1 << 2) \n\t"
+        "mcreq  p15, 0, r0, c1, c0, 0 \n\t"
         "isb    "
-        : : "r" (0));
+        : : : "r0");
 
         pr_warn("Failed to suspend the system\n");
 
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 17cd39360afe..93914d220069 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -50,6 +50,16 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
                  soc_is_omap54xx() || soc_is_dra7xx())
                 return 1;
 
+        if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
+                 ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
+                if (cpu_is_omap24xx())
+                        return 0;
+                else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
+                        return 0;
+                else
+                        return 1;
+        }
+
         /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
          * which require H/W based ECC error detection */
         if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
@@ -57,14 +67,6 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
                  (ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
                 return 0;
 
-        /*
-         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
-         * and AM33xx derivates. Other chips may be added if confirmed to work.
-         */
-        if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
-            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
-                return 0;
-
         /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
         if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
                 return 1;
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 539e8106eb96..a0fe747634c1 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -168,6 +168,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg)
                 smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX;
                 break;
 
+        case L310_POWER_CTRL:
+                pr_info_once("OMAP L2C310: ROM does not support power control setting\n");
+                return;
+
         default:
                 WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg);
                 return;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 4c88935654ca..1f88db06b133 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -461,12 +461,21 @@ void __init dma_contiguous_remap(void)
                 map.type = MT_MEMORY_DMA_READY;
 
                 /*
-                 * Clear previous low-memory mapping
+                 * Clear previous low-memory mapping to ensure that the
+                 * TLB does not see any conflicting entries, then flush
+                 * the TLB of the old entries before creating new mappings.
+                 *
+                 * This ensures that any speculatively loaded TLB entries
+                 * (even though they may be rare) can not cause any problems,
+                 * and ensures that this code is architecturally compliant.
                  */
                 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
                      addr += PMD_SIZE)
                         pmd_clear(pmd_off_k(addr));
 
+                flush_tlb_kernel_range(__phys_to_virt(start),
+                                       __phys_to_virt(end));
+
                 iotable_init(&map, 1);
         }
 }
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 8e0e52eb76b5..c447ec70e868 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -9,6 +9,11 @@
 #include <asm/sections.h>
 #include <asm/system_info.h>
 
+/*
+ * Note: accesses outside of the kernel image and the identity map area
+ * are not supported on any CPU using the idmap tables as its current
+ * page tables.
+ */
 pgd_t *idmap_pgd;
 phys_addr_t (*arch_virt_to_idmap) (unsigned long x);
 
@@ -25,6 +30,13 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
                         pr_warning("Failed to allocate identity pmd.\n");
                         return;
                 }
+                /*
+                 * Copy the original PMD to ensure that the PMD entries for
+                 * the kernel image are preserved.
+                 */
+                if (!pud_none(*pud))
+                        memcpy(pmd, pmd_offset(pud, 0),
+                               PTRS_PER_PMD * sizeof(pmd_t));
                 pud_populate(&init_mm, pud, pmd);
                 pmd += pmd_index(addr);
         } else
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ab14b79b03f0..6e3ba8d112a2 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1406,8 +1406,8 @@ void __init early_paging_init(const struct machine_desc *mdesc,
                 return;
 
         /* remap kernel code and data */
-        map_start = init_mm.start_code;
-        map_end   = init_mm.brk;
+        map_start = init_mm.start_code & PMD_MASK;
+        map_end   = ALIGN(init_mm.brk, PMD_SIZE);
 
         /* get a handle on things... */
         pgd0 = pgd_offset_k(0);
@@ -1442,7 +1442,7 @@ void __init early_paging_init(const struct machine_desc *mdesc,
         }
 
         /* remap pmds for kernel mapping */
-        phys = __pa(map_start) & PMD_MASK;
+        phys = __pa(map_start);
         do {
                 *pmdk++ = __pmd(phys | pmdprot);
                 phys += PMD_SIZE;
diff --git a/arch/arm/xen/grant-table.c b/arch/arm/xen/grant-table.c
index 859a9bb002d5..91cf08ba1e95 100644
--- a/arch/arm/xen/grant-table.c
+++ b/arch/arm/xen/grant-table.c
@@ -51,3 +51,8 @@ int arch_gnttab_map_status(uint64_t *frames, unsigned long nr_gframes,
 {
         return -ENOSYS;
 }
+
+int arch_gnttab_init(unsigned long nr_shared, unsigned long nr_status)
+{
+        return 0;
+}