diff options
author | Alexander Shiyan <shc_work@mail.ru> | 2014-01-08 10:31:54 -0500 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-09 08:33:41 -0500 |
commit | 5f7ecd4e7bae75124d70d188dcef401249d60133 (patch) | |
tree | 5dfcbd36c3e059590a8544004bcd95709afd32e6 /arch/arm | |
parent | 2bc88b1b3ab0db1c807a3dcdbd21e68b2d9ab005 (diff) |
ARM: dts: imx53-evk: Remove board support
imx53-evk board is discontinued by Freescale. The replacement is
imx53-qsb. Additionally this board is not supported by anyone and
in their current state is non-functional, for example PMIC not have
an IRQ line defined, so it is not works. This patch removes this DTS.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-evk.dts | 189 |
2 files changed, 0 insertions, 190 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index cbdc7abf5519..82123a79cc78 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -149,7 +149,6 @@ dtb-$(CONFIG_ARCH_MXC) += \ | |||
149 | imx51-babbage.dtb \ | 149 | imx51-babbage.dtb \ |
150 | imx51-eukrea-mbimxsd51-baseboard.dtb \ | 150 | imx51-eukrea-mbimxsd51-baseboard.dtb \ |
151 | imx53-ard.dtb \ | 151 | imx53-ard.dtb \ |
152 | imx53-evk.dtb \ | ||
153 | imx53-m53evk.dtb \ | 152 | imx53-m53evk.dtb \ |
154 | imx53-mba53.dtb \ | 153 | imx53-mba53.dtb \ |
155 | imx53-qsb.dtb \ | 154 | imx53-qsb.dtb \ |
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts deleted file mode 100644 index 2727a6f593a3..000000000000 --- a/arch/arm/boot/dts/imx53-evk.dts +++ /dev/null | |||
@@ -1,189 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2011 Freescale Semiconductor, Inc. | ||
3 | * Copyright 2011 Linaro Ltd. | ||
4 | * | ||
5 | * The code contained herein is licensed under the GNU General Public | ||
6 | * License. You may obtain a copy of the GNU General Public License | ||
7 | * Version 2 or later at the following locations: | ||
8 | * | ||
9 | * http://www.opensource.org/licenses/gpl-license.html | ||
10 | * http://www.gnu.org/copyleft/gpl.html | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | #include "imx53.dtsi" | ||
15 | |||
16 | / { | ||
17 | model = "Freescale i.MX53 Evaluation Kit"; | ||
18 | compatible = "fsl,imx53-evk", "fsl,imx53"; | ||
19 | |||
20 | memory { | ||
21 | reg = <0x70000000 0x80000000>; | ||
22 | }; | ||
23 | |||
24 | leds { | ||
25 | compatible = "gpio-leds"; | ||
26 | |||
27 | green { | ||
28 | label = "Heartbeat"; | ||
29 | gpios = <&gpio7 7 0>; | ||
30 | linux,default-trigger = "heartbeat"; | ||
31 | }; | ||
32 | }; | ||
33 | }; | ||
34 | |||
35 | &esdhc1 { | ||
36 | pinctrl-names = "default"; | ||
37 | pinctrl-0 = <&pinctrl_esdhc1>; | ||
38 | cd-gpios = <&gpio3 13 0>; | ||
39 | wp-gpios = <&gpio3 14 0>; | ||
40 | status = "okay"; | ||
41 | }; | ||
42 | |||
43 | &ecspi1 { | ||
44 | pinctrl-names = "default"; | ||
45 | pinctrl-0 = <&pinctrl_ecspi1>; | ||
46 | fsl,spi-num-chipselects = <2>; | ||
47 | cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; | ||
48 | status = "okay"; | ||
49 | |||
50 | flash: at45db321d@1 { | ||
51 | #address-cells = <1>; | ||
52 | #size-cells = <1>; | ||
53 | compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash"; | ||
54 | spi-max-frequency = <25000000>; | ||
55 | reg = <1>; | ||
56 | |||
57 | partition@0 { | ||
58 | label = "U-Boot"; | ||
59 | reg = <0x0 0x40000>; | ||
60 | read-only; | ||
61 | }; | ||
62 | |||
63 | partition@40000 { | ||
64 | label = "Kernel"; | ||
65 | reg = <0x40000 0x3c0000>; | ||
66 | }; | ||
67 | }; | ||
68 | }; | ||
69 | |||
70 | &esdhc3 { | ||
71 | pinctrl-names = "default"; | ||
72 | pinctrl-0 = <&pinctrl_esdhc3>; | ||
73 | cd-gpios = <&gpio3 11 0>; | ||
74 | wp-gpios = <&gpio3 12 0>; | ||
75 | status = "okay"; | ||
76 | }; | ||
77 | |||
78 | &iomuxc { | ||
79 | pinctrl-names = "default"; | ||
80 | pinctrl-0 = <&pinctrl_hog>; | ||
81 | |||
82 | imx53-evk { | ||
83 | pinctrl_hog: hoggrp { | ||
84 | fsl,pins = < | ||
85 | MX53_PAD_EIM_EB2__GPIO2_30 0x80000000 | ||
86 | MX53_PAD_EIM_D19__GPIO3_19 0x80000000 | ||
87 | MX53_PAD_EIM_DA11__GPIO3_11 0x80000000 | ||
88 | MX53_PAD_EIM_DA12__GPIO3_12 0x80000000 | ||
89 | MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 | ||
90 | MX53_PAD_EIM_DA14__GPIO3_14 0x80000000 | ||
91 | MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 | ||
92 | MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 | ||
93 | >; | ||
94 | }; | ||
95 | |||
96 | pinctrl_ecspi1: ecspi1grp { | ||
97 | fsl,pins = < | ||
98 | MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 | ||
99 | MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 | ||
100 | MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 | ||
101 | >; | ||
102 | }; | ||
103 | |||
104 | pinctrl_esdhc1: esdhc1grp { | ||
105 | fsl,pins = < | ||
106 | MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 | ||
107 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 | ||
108 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 | ||
109 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 | ||
110 | MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 | ||
111 | MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 | ||
112 | >; | ||
113 | }; | ||
114 | |||
115 | pinctrl_esdhc3: esdhc3grp { | ||
116 | fsl,pins = < | ||
117 | MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 | ||
118 | MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 | ||
119 | MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 | ||
120 | MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 | ||
121 | MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 | ||
122 | MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 | ||
123 | MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 | ||
124 | MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 | ||
125 | MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 | ||
126 | MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 | ||
127 | >; | ||
128 | }; | ||
129 | |||
130 | pinctrl_fec: fecgrp { | ||
131 | fsl,pins = < | ||
132 | MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 | ||
133 | MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 | ||
134 | MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 | ||
135 | MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 | ||
136 | MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 | ||
137 | MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 | ||
138 | MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 | ||
139 | MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 | ||
140 | MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 | ||
141 | MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 | ||
142 | >; | ||
143 | }; | ||
144 | |||
145 | pinctrl_i2c2: i2c2grp { | ||
146 | fsl,pins = < | ||
147 | MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 | ||
148 | MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 | ||
149 | >; | ||
150 | }; | ||
151 | |||
152 | pinctrl_uart1: uart1grp { | ||
153 | fsl,pins = < | ||
154 | MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4 | ||
155 | MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4 | ||
156 | >; | ||
157 | }; | ||
158 | }; | ||
159 | }; | ||
160 | |||
161 | &uart1 { | ||
162 | pinctrl-names = "default"; | ||
163 | pinctrl-0 = <&pinctrl_uart1>; | ||
164 | status = "okay"; | ||
165 | }; | ||
166 | |||
167 | &i2c2 { | ||
168 | pinctrl-names = "default"; | ||
169 | pinctrl-0 = <&pinctrl_i2c2>; | ||
170 | status = "okay"; | ||
171 | |||
172 | pmic: mc13892@08 { | ||
173 | compatible = "fsl,mc13892", "fsl,mc13xxx"; | ||
174 | reg = <0x08>; | ||
175 | }; | ||
176 | |||
177 | codec: sgtl5000@0a { | ||
178 | compatible = "fsl,sgtl5000"; | ||
179 | reg = <0x0a>; | ||
180 | }; | ||
181 | }; | ||
182 | |||
183 | &fec { | ||
184 | pinctrl-names = "default"; | ||
185 | pinctrl-0 = <&pinctrl_fec>; | ||
186 | phy-mode = "rmii"; | ||
187 | phy-reset-gpios = <&gpio7 6 0>; | ||
188 | status = "okay"; | ||
189 | }; | ||