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authorArnd Bergmann <arnd@arndb.de>2011-07-21 10:32:06 -0400
committerArnd Bergmann <arnd@arndb.de>2011-07-21 10:32:06 -0400
commit5ddac6bc1c4bfcbf645d18668a5033ca257a8ea7 (patch)
treea8a74ef15a3622ecc3ab94a424321de8b111648b /arch/arm
parentc33d4326b60a3aea5cd070a365043f488f81a3b0 (diff)
parent89e1c3d0fffa0d610fa7292bbfafb5e87dc6be34 (diff)
Merge branch 'next-samsung-board' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/board
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/common/dmabounce.c2
-rw-r--r--arch/arm/kernel/perf_event.c6
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/kernel/smp_twd.c2
-rw-r--r--arch/arm/mach-ep93xx/core.c4
-rw-r--r--arch/arm/mach-exynos4/cpu.c6
-rw-r--r--arch/arm/mach-exynos4/dev-audio.c2
-rw-r--r--arch/arm/mach-exynos4/headsmp.S2
-rw-r--r--arch/arm/mach-exynos4/mach-smdkv310.c8
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c8
-rw-r--r--arch/arm/mach-omap1/gpio15xx.c4
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c10
-rw-r--r--arch/arm/mach-omap1/gpio7xx.c14
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig23
-rw-r--r--arch/arm/mach-s3c64xx/Makefile1
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c774
-rw-r--r--arch/arm/mach-s5p64x0/dev-spi.c4
-rw-r--r--arch/arm/mach-s5pc100/dev-spi.c4
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c2
-rw-r--r--arch/arm/mach-vt8500/irq.c21
-rw-r--r--arch/arm/mm/cache-l2x0.c19
-rw-r--r--arch/arm/mm/mmu.c5
-rw-r--r--arch/arm/mm/nommu.c4
-rw-r--r--arch/arm/plat-s3c24xx/dma.c12
-rw-r--r--arch/arm/plat-s5p/s5p-time.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h2
31 files changed, 898 insertions, 63 deletions
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index e5681636626f..841df7d21c2f 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -255,7 +255,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size,
255 if (buf == 0) { 255 if (buf == 0) {
256 dev_err(dev, "%s: unable to map unsafe buffer %p!\n", 256 dev_err(dev, "%s: unable to map unsafe buffer %p!\n",
257 __func__, ptr); 257 __func__, ptr);
258 return 0; 258 return ~0;
259 } 259 }
260 260
261 dev_dbg(dev, 261 dev_dbg(dev,
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index d53c0abc4dd3..2b5b1421596c 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -583,7 +583,7 @@ static int armpmu_event_init(struct perf_event *event)
583static void armpmu_enable(struct pmu *pmu) 583static void armpmu_enable(struct pmu *pmu)
584{ 584{
585 /* Enable all of the perf events on hardware. */ 585 /* Enable all of the perf events on hardware. */
586 int idx; 586 int idx, enabled = 0;
587 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 587 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
588 588
589 if (!armpmu) 589 if (!armpmu)
@@ -596,9 +596,11 @@ static void armpmu_enable(struct pmu *pmu)
596 continue; 596 continue;
597 597
598 armpmu->enable(&event->hw, idx); 598 armpmu->enable(&event->hw, idx);
599 enabled = 1;
599 } 600 }
600 601
601 armpmu->start(); 602 if (enabled)
603 armpmu->start();
602} 604}
603 605
604static void armpmu_disable(struct pmu *pmu) 606static void armpmu_disable(struct pmu *pmu)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index ed11fb08b05a..acbb447ac6b5 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -73,6 +73,7 @@ __setup("fpe=", fpe_setup);
73#endif 73#endif
74 74
75extern void paging_init(struct machine_desc *desc); 75extern void paging_init(struct machine_desc *desc);
76extern void sanity_check_meminfo(void);
76extern void reboot_setup(char *str); 77extern void reboot_setup(char *str);
77 78
78unsigned int processor_id; 79unsigned int processor_id;
@@ -900,6 +901,7 @@ void __init setup_arch(char **cmdline_p)
900 901
901 parse_early_param(); 902 parse_early_param();
902 903
904 sanity_check_meminfo();
903 arm_memblock_init(&meminfo, mdesc); 905 arm_memblock_init(&meminfo, mdesc);
904 906
905 paging_init(mdesc); 907 paging_init(mdesc);
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 60636f499cb3..2c277d40cee6 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -115,7 +115,7 @@ static void __cpuinit twd_calibrate_rate(void)
115 twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); 115 twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
116 116
117 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, 117 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
118 (twd_timer_rate / 1000000) % 100); 118 (twd_timer_rate / 10000) % 100);
119 } 119 }
120} 120}
121 121
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 1d4b65fd673e..6659a0d137a3 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -251,9 +251,9 @@ static void ep93xx_uart_set_mctrl(struct amba_device *dev,
251 unsigned int mcr; 251 unsigned int mcr;
252 252
253 mcr = 0; 253 mcr = 0;
254 if (!(mctrl & TIOCM_RTS)) 254 if (mctrl & TIOCM_RTS)
255 mcr |= 2; 255 mcr |= 2;
256 if (!(mctrl & TIOCM_DTR)) 256 if (mctrl & TIOCM_DTR)
257 mcr |= 1; 257 mcr |= 1;
258 258
259 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 259 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 9babe4473e88..bfd621460abf 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -23,6 +23,7 @@
23#include <plat/sdhci.h> 23#include <plat/sdhci.h>
24#include <plat/devs.h> 24#include <plat/devs.h>
25#include <plat/fimc-core.h> 25#include <plat/fimc-core.h>
26#include <plat/iic-core.h>
26 27
27#include <mach/regs-irq.h> 28#include <mach/regs-irq.h>
28 29
@@ -132,6 +133,11 @@ void __init exynos4_map_io(void)
132 s3c_fimc_setname(1, "exynos4-fimc"); 133 s3c_fimc_setname(1, "exynos4-fimc");
133 s3c_fimc_setname(2, "exynos4-fimc"); 134 s3c_fimc_setname(2, "exynos4-fimc");
134 s3c_fimc_setname(3, "exynos4-fimc"); 135 s3c_fimc_setname(3, "exynos4-fimc");
136
137 /* The I2C bus controllers are directly compatible with s3c2440 */
138 s3c_i2c0_setname("s3c2440-i2c");
139 s3c_i2c1_setname("s3c2440-i2c");
140 s3c_i2c2_setname("s3c2440-i2c");
135} 141}
136 142
137void __init exynos4_init_clocks(int xtal) 143void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos4/dev-audio.c
index 1eed5f9f7bd3..983069a53239 100644
--- a/arch/arm/mach-exynos4/dev-audio.c
+++ b/arch/arm/mach-exynos4/dev-audio.c
@@ -330,7 +330,7 @@ struct platform_device exynos4_device_ac97 = {
330 330
331static int exynos4_spdif_cfg_gpio(struct platform_device *pdev) 331static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
332{ 332{
333 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(3)); 333 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
334 334
335 return 0; 335 return 0;
336} 336}
diff --git a/arch/arm/mach-exynos4/headsmp.S b/arch/arm/mach-exynos4/headsmp.S
index 6c6cfc50c46b..3cdeb3647542 100644
--- a/arch/arm/mach-exynos4/headsmp.S
+++ b/arch/arm/mach-exynos4/headsmp.S
@@ -13,7 +13,7 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15 15
16 __INIT 16 __CPUINIT
17 17
18/* 18/*
19 * exynos4 specific entry point for secondary CPUs. This provides 19 * exynos4 specific entry point for secondary CPUs. This provides
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index 152676471b67..edd814110da8 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -78,9 +78,7 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
78}; 78};
79 79
80static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { 80static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
81 .cd_type = S3C_SDHCI_CD_GPIO, 81 .cd_type = S3C_SDHCI_CD_INTERNAL,
82 .ext_cd_gpio = EXYNOS4_GPK0(2),
83 .ext_cd_gpio_invert = 1,
84 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 82 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
85#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT 83#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
86 .max_width = 8, 84 .max_width = 8,
@@ -96,9 +94,7 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
96}; 94};
97 95
98static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { 96static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
99 .cd_type = S3C_SDHCI_CD_GPIO, 97 .cd_type = S3C_SDHCI_CD_INTERNAL,
100 .ext_cd_gpio = EXYNOS4_GPK2(2),
101 .ext_cd_gpio_invert = 1,
102 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 98 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
103#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT 99#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
104 .max_width = 8, 100 .max_width = 8,
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index f1ac7fbf54a9..312ea6b0409d 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -215,7 +215,7 @@ static struct omap_kp_platform_data ams_delta_kp_data __initdata = {
215 .delay = 9, 215 .delay = 9,
216}; 216};
217 217
218static struct platform_device ams_delta_kp_device __initdata = { 218static struct platform_device ams_delta_kp_device = {
219 .name = "omap-keypad", 219 .name = "omap-keypad",
220 .id = -1, 220 .id = -1,
221 .dev = { 221 .dev = {
@@ -225,12 +225,12 @@ static struct platform_device ams_delta_kp_device __initdata = {
225 .resource = ams_delta_kp_resources, 225 .resource = ams_delta_kp_resources,
226}; 226};
227 227
228static struct platform_device ams_delta_lcd_device __initdata = { 228static struct platform_device ams_delta_lcd_device = {
229 .name = "lcd_ams_delta", 229 .name = "lcd_ams_delta",
230 .id = -1, 230 .id = -1,
231}; 231};
232 232
233static struct platform_device ams_delta_led_device __initdata = { 233static struct platform_device ams_delta_led_device = {
234 .name = "ams-delta-led", 234 .name = "ams-delta-led",
235 .id = -1 235 .id = -1
236}; 236};
@@ -267,7 +267,7 @@ static struct soc_camera_link ams_delta_iclink = {
267 .power = ams_delta_camera_power, 267 .power = ams_delta_camera_power,
268}; 268};
269 269
270static struct platform_device ams_delta_camera_device __initdata = { 270static struct platform_device ams_delta_camera_device = {
271 .name = "soc-camera-pdrv", 271 .name = "soc-camera-pdrv",
272 .id = 0, 272 .id = 0,
273 .dev = { 273 .dev = {
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 04c4b04cf54e..364137c2042c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -41,7 +41,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
41 .bank_stride = 1, 41 .bank_stride = 1,
42}; 42};
43 43
44static struct __initdata platform_device omap15xx_mpu_gpio = { 44static struct platform_device omap15xx_mpu_gpio = {
45 .name = "omap_gpio", 45 .name = "omap_gpio",
46 .id = 0, 46 .id = 0,
47 .dev = { 47 .dev = {
@@ -70,7 +70,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
70 .bank_width = 16, 70 .bank_width = 16,
71}; 71};
72 72
73static struct __initdata platform_device omap15xx_gpio = { 73static struct platform_device omap15xx_gpio = {
74 .name = "omap_gpio", 74 .name = "omap_gpio",
75 .id = 1, 75 .id = 1,
76 .dev = { 76 .dev = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 5dd0d4c82b24..293a246e2824 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -44,7 +44,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
44 .bank_stride = 1, 44 .bank_stride = 1,
45}; 45};
46 46
47static struct __initdata platform_device omap16xx_mpu_gpio = { 47static struct platform_device omap16xx_mpu_gpio = {
48 .name = "omap_gpio", 48 .name = "omap_gpio",
49 .id = 0, 49 .id = 0,
50 .dev = { 50 .dev = {
@@ -73,7 +73,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
73 .bank_width = 16, 73 .bank_width = 16,
74}; 74};
75 75
76static struct __initdata platform_device omap16xx_gpio1 = { 76static struct platform_device omap16xx_gpio1 = {
77 .name = "omap_gpio", 77 .name = "omap_gpio",
78 .id = 1, 78 .id = 1,
79 .dev = { 79 .dev = {
@@ -102,7 +102,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
102 .bank_width = 16, 102 .bank_width = 16,
103}; 103};
104 104
105static struct __initdata platform_device omap16xx_gpio2 = { 105static struct platform_device omap16xx_gpio2 = {
106 .name = "omap_gpio", 106 .name = "omap_gpio",
107 .id = 2, 107 .id = 2,
108 .dev = { 108 .dev = {
@@ -131,7 +131,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
131 .bank_width = 16, 131 .bank_width = 16,
132}; 132};
133 133
134static struct __initdata platform_device omap16xx_gpio3 = { 134static struct platform_device omap16xx_gpio3 = {
135 .name = "omap_gpio", 135 .name = "omap_gpio",
136 .id = 3, 136 .id = 3,
137 .dev = { 137 .dev = {
@@ -160,7 +160,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
160 .bank_width = 16, 160 .bank_width = 16,
161}; 161};
162 162
163static struct __initdata platform_device omap16xx_gpio4 = { 163static struct platform_device omap16xx_gpio4 = {
164 .name = "omap_gpio", 164 .name = "omap_gpio",
165 .id = 4, 165 .id = 4,
166 .dev = { 166 .dev = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 1204c8b871af..c6ad248d63a6 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -46,7 +46,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
46 .bank_stride = 2, 46 .bank_stride = 2,
47}; 47};
48 48
49static struct __initdata platform_device omap7xx_mpu_gpio = { 49static struct platform_device omap7xx_mpu_gpio = {
50 .name = "omap_gpio", 50 .name = "omap_gpio",
51 .id = 0, 51 .id = 0,
52 .dev = { 52 .dev = {
@@ -75,7 +75,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
75 .bank_width = 32, 75 .bank_width = 32,
76}; 76};
77 77
78static struct __initdata platform_device omap7xx_gpio1 = { 78static struct platform_device omap7xx_gpio1 = {
79 .name = "omap_gpio", 79 .name = "omap_gpio",
80 .id = 1, 80 .id = 1,
81 .dev = { 81 .dev = {
@@ -104,7 +104,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
104 .bank_width = 32, 104 .bank_width = 32,
105}; 105};
106 106
107static struct __initdata platform_device omap7xx_gpio2 = { 107static struct platform_device omap7xx_gpio2 = {
108 .name = "omap_gpio", 108 .name = "omap_gpio",
109 .id = 2, 109 .id = 2,
110 .dev = { 110 .dev = {
@@ -133,7 +133,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
133 .bank_width = 32, 133 .bank_width = 32,
134}; 134};
135 135
136static struct __initdata platform_device omap7xx_gpio3 = { 136static struct platform_device omap7xx_gpio3 = {
137 .name = "omap_gpio", 137 .name = "omap_gpio",
138 .id = 3, 138 .id = 3,
139 .dev = { 139 .dev = {
@@ -162,7 +162,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
162 .bank_width = 32, 162 .bank_width = 32,
163}; 163};
164 164
165static struct __initdata platform_device omap7xx_gpio4 = { 165static struct platform_device omap7xx_gpio4 = {
166 .name = "omap_gpio", 166 .name = "omap_gpio",
167 .id = 4, 167 .id = 4,
168 .dev = { 168 .dev = {
@@ -191,7 +191,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
191 .bank_width = 32, 191 .bank_width = 32,
192}; 192};
193 193
194static struct __initdata platform_device omap7xx_gpio5 = { 194static struct platform_device omap7xx_gpio5 = {
195 .name = "omap_gpio", 195 .name = "omap_gpio",
196 .id = 5, 196 .id = 5,
197 .dev = { 197 .dev = {
@@ -220,7 +220,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
220 .bank_width = 32, 220 .bank_width = 32,
221}; 221};
222 222
223static struct __initdata platform_device omap7xx_gpio6 = { 223static struct platform_device omap7xx_gpio6 = {
224 .name = "omap_gpio", 224 .name = "omap_gpio",
225 .id = 6, 225 .id = 6,
226 .dev = { 226 .dev = {
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 8946d7232f3c..0c9e0f28ed07 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -661,7 +661,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module =
661 .subdev_board_info = &rx51_si4713_board_info, 661 .subdev_board_info = &rx51_si4713_board_info,
662}; 662};
663 663
664static struct platform_device rx51_si4713_dev __initdata_or_module = { 664static struct platform_device rx51_si4713_dev = {
665 .name = "radio-si4713", 665 .name = "radio-si4713",
666 .id = -1, 666 .id = -1,
667 .dev = { 667 .dev = {
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index dd3120df09fe..fc2dc0b3d4fe 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -552,7 +552,7 @@ struct mini2440_features_t {
552 struct platform_device *optional[8]; 552 struct platform_device *optional[8];
553}; 553};
554 554
555static void mini2440_parse_features( 555static void __init mini2440_parse_features(
556 struct mini2440_features_t * features, 556 struct mini2440_features_t * features,
557 const char * features_str ) 557 const char * features_str )
558{ 558{
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index e4177e22557b..4e2c371ff3d7 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -266,3 +266,26 @@ config MACH_SMARTQ7
266 select MACH_SMARTQ 266 select MACH_SMARTQ
267 help 267 help
268 Machine support for the SmartQ 7 268 Machine support for the SmartQ 7
269
270config MACH_WLF_CRAGG_6410
271 bool "Wolfson Cragganmore 6410"
272 select CPU_S3C6410
273 select S3C64XX_SETUP_SDHCI
274 select S3C64XX_SETUP_I2C1
275 select S3C64XX_SETUP_IDE
276 select S3C64XX_SETUP_FB_24BPP
277 select S3C64XX_SETUP_KEYPAD
278 select SAMSUNG_DEV_ADC
279 select SAMSUNG_DEV_KEYPAD
280 select S3C_DEV_USB_HOST
281 select S3C_DEV_USB_HSOTG
282 select S3C_DEV_HSMMC
283 select S3C_DEV_HSMMC1
284 select S3C_DEV_HSMMC2
285 select S3C_DEV_I2C1
286 select S3C_DEV_WDT
287 select S3C_DEV_RTC
288 select S3C64XX_DEV_SPI
289 select S3C24XX_GPIO_EXTRA128
290 help
291 Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 4657363f0674..88d7fd22ef18 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_MACH_HMT) += mach-hmt.o
59obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o 59obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o
60obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o 60obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o
61obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o 61obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o
62obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o
62 63
63# device support 64# device support
64 65
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 82db072cb836..5e6b42089eb4 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -88,6 +88,7 @@ static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
88 .cfg_gpio = s3c64xx_spi_cfg_gpio, 88 .cfg_gpio = s3c64xx_spi_cfg_gpio,
89 .fifo_lvl_mask = 0x7f, 89 .fifo_lvl_mask = 0x7f,
90 .rx_lvl_offset = 13, 90 .rx_lvl_offset = 13,
91 .tx_st_done = 21,
91}; 92};
92 93
93static u64 spi_dmamask = DMA_BIT_MASK(32); 94static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -132,6 +133,7 @@ static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
132 .cfg_gpio = s3c64xx_spi_cfg_gpio, 133 .cfg_gpio = s3c64xx_spi_cfg_gpio,
133 .fifo_lvl_mask = 0x7f, 134 .fifo_lvl_mask = 0x7f,
134 .rx_lvl_offset = 13, 135 .rx_lvl_offset = 13,
136 .tx_st_done = 21,
135}; 137};
136 138
137struct platform_device s3c64xx_device_spi1 = { 139struct platform_device s3c64xx_device_spi1 = {
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 8e2df26cf14a..ddb63a1863ab 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -198,7 +198,9 @@
198 * interrupt controllers). */ 198 * interrupt controllers). */
199#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) 199#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
200 200
201#ifdef CONFIG_SMDK6410_WM1190_EV1 201#ifdef CONFIG_MACH_WLF_CRAGG_6410
202#define IRQ_BOARD_NR 128
203#elif defined(CONFIG_SMDK6410_WM1190_EV1)
202#define IRQ_BOARD_NR 64 204#define IRQ_BOARD_NR 64
203#elif defined(CONFIG_SMDK6410_WM1192_EV1) 205#elif defined(CONFIG_SMDK6410_WM1192_EV1)
204#define IRQ_BOARD_NR 64 206#define IRQ_BOARD_NR 64
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
new file mode 100644
index 000000000000..9026249233ad
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -0,0 +1,774 @@
1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/regulator/fixed.h>
25#include <linux/pwm_backlight.h>
26#include <linux/dm9000.h>
27#include <linux/gpio_keys.h>
28#include <linux/basic_mmio_gpio.h>
29#include <linux/spi/spi.h>
30
31#include <linux/i2c/pca953x.h>
32
33#include <video/platform_lcd.h>
34
35#include <linux/mfd/wm831x/core.h>
36#include <linux/mfd/wm831x/pdata.h>
37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h>
39
40#include <asm/mach/arch.h>
41#include <asm/mach-types.h>
42
43#include <mach/hardware.h>
44#include <mach/map.h>
45
46#include <mach/s3c6410.h>
47#include <mach/regs-sys.h>
48#include <mach/regs-gpio.h>
49#include <mach/regs-modem.h>
50
51#include <mach/regs-gpio-memport.h>
52
53#include <plat/regs-serial.h>
54#include <plat/regs-fb-v4.h>
55#include <plat/fb.h>
56#include <plat/sdhci.h>
57#include <plat/gpio-cfg.h>
58#include <plat/s3c64xx-spi.h>
59
60#include <plat/keypad.h>
61#include <plat/clock.h>
62#include <plat/devs.h>
63#include <plat/cpu.h>
64#include <plat/adc.h>
65#include <plat/iic.h>
66#include <plat/pm.h>
67
68#include <sound/wm8915.h>
69#include <sound/wm8962.h>
70#include <sound/wm9081.h>
71
72#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
73#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
74
75#define PCA935X_GPIO_BASE GPIO_BOARD_START
76#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
77#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
78
79/* serial port setup */
80
81#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
82#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
83#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
84
85static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
86 [0] = {
87 .hwport = 0,
88 .flags = 0,
89 .ucon = UCON,
90 .ulcon = ULCON,
91 .ufcon = UFCON,
92 },
93 [1] = {
94 .hwport = 1,
95 .flags = 0,
96 .ucon = UCON,
97 .ulcon = ULCON,
98 .ufcon = UFCON,
99 },
100 [2] = {
101 .hwport = 2,
102 .flags = 0,
103 .ucon = UCON,
104 .ulcon = ULCON,
105 .ufcon = UFCON,
106 },
107 [3] = {
108 .hwport = 3,
109 .flags = 0,
110 .ucon = UCON,
111 .ulcon = ULCON,
112 .ufcon = UFCON,
113 },
114};
115
116static struct platform_pwm_backlight_data crag6410_backlight_data = {
117 .pwm_id = 0,
118 .max_brightness = 1000,
119 .dft_brightness = 600,
120 .pwm_period_ns = 100000, /* about 1kHz */
121};
122
123static struct platform_device crag6410_backlight_device = {
124 .name = "pwm-backlight",
125 .id = -1,
126 .dev = {
127 .parent = &s3c_device_timer[0].dev,
128 .platform_data = &crag6410_backlight_data,
129 },
130};
131
132static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
133{
134 pr_debug("%s: setting power %d\n", __func__, power);
135
136 if (power) {
137 gpio_set_value(S3C64XX_GPB(0), 1);
138 msleep(1);
139 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
140 } else {
141 gpio_direction_output(S3C64XX_GPF(14), 0);
142 gpio_set_value(S3C64XX_GPB(0), 0);
143 }
144}
145
146static struct platform_device crag6410_lcd_powerdev = {
147 .name = "platform-lcd",
148 .id = -1,
149 .dev.parent = &s3c_device_fb.dev,
150 .dev.platform_data = &(struct plat_lcd_data) {
151 .set_power = crag6410_lcd_power_set,
152 },
153};
154
155/* 640x480 URT */
156static struct s3c_fb_pd_win crag6410_fb_win0 = {
157 /* this is to ensure we use win0 */
158 .win_mode = {
159 .left_margin = 150,
160 .right_margin = 80,
161 .upper_margin = 40,
162 .lower_margin = 5,
163 .hsync_len = 40,
164 .vsync_len = 5,
165 .xres = 640,
166 .yres = 480,
167 },
168 .max_bpp = 32,
169 .default_bpp = 16,
170 .virtual_y = 480 * 2,
171 .virtual_x = 640,
172};
173
174/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
175static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
176 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
177 .win[0] = &crag6410_fb_win0,
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180};
181
182/* 2x6 keypad */
183
184static uint32_t crag6410_keymap[] __initdata = {
185 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME),
188 KEY(0, 2, KEY_VOLUMEDOWN),
189 KEY(0, 3, KEY_HELP),
190 KEY(0, 4, KEY_MENU),
191 KEY(0, 5, KEY_MEDIA),
192 KEY(1, 0, 232),
193 KEY(1, 1, KEY_DOWN),
194 KEY(1, 2, KEY_LEFT),
195 KEY(1, 3, KEY_UP),
196 KEY(1, 4, KEY_RIGHT),
197 KEY(1, 5, KEY_CAMERA),
198};
199
200static struct matrix_keymap_data crag6410_keymap_data __initdata = {
201 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203};
204
205static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
206 .keymap_data = &crag6410_keymap_data,
207 .rows = 2,
208 .cols = 6,
209};
210
211static struct gpio_keys_button crag6410_gpio_keys[] = {
212 [0] = {
213 .code = KEY_SUSPEND,
214 .gpio = S3C64XX_GPL(10), /* EINT 18 */
215 .type = EV_KEY,
216 .wakeup = 1,
217 .active_low = 1,
218 },
219 [1] = {
220 .code = SW_FRONT_PROXIMITY,
221 .gpio = S3C64XX_GPN(11), /* EINT 11 */
222 .type = EV_SW,
223 },
224};
225
226static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227 .buttons = crag6410_gpio_keys,
228 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
229};
230
231static struct platform_device crag6410_gpio_keydev = {
232 .name = "gpio-keys",
233 .id = 0,
234 .dev.platform_data = &crag6410_gpio_keydata,
235};
236
237static struct resource crag6410_dm9k_resource[] = {
238 [0] = {
239 .start = S3C64XX_PA_XM0CSN5,
240 .end = S3C64XX_PA_XM0CSN5 + 1,
241 .flags = IORESOURCE_MEM,
242 },
243 [1] = {
244 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
245 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
246 .flags = IORESOURCE_MEM,
247 },
248 [2] = {
249 .start = S3C_EINT(17),
250 .end = S3C_EINT(17),
251 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
252 },
253};
254
255static struct dm9000_plat_data mini6410_dm9k_pdata = {
256 .flags = DM9000_PLATF_16BITONLY,
257};
258
259static struct platform_device crag6410_dm9k_device = {
260 .name = "dm9000",
261 .id = -1,
262 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
263 .resource = crag6410_dm9k_resource,
264 .dev.platform_data = &mini6410_dm9k_pdata,
265};
266
267static struct resource crag6410_mmgpio_resource[] = {
268 [0] = {
269 .start = S3C64XX_PA_XM0CSN4 + 1,
270 .end = S3C64XX_PA_XM0CSN4 + 1,
271 .flags = IORESOURCE_MEM,
272 },
273};
274
275static struct platform_device crag6410_mmgpio = {
276 .name = "basic-mmio-gpio",
277 .id = -1,
278 .resource = crag6410_mmgpio_resource,
279 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
280 .dev.platform_data = &(struct bgpio_pdata) {
281 .base = -1,
282 },
283};
284
285static struct platform_device speyside_device = {
286 .name = "speyside",
287 .id = -1,
288};
289
290static struct platform_device speyside_wm8962_device = {
291 .name = "speyside-wm8962",
292 .id = -1,
293};
294
295static struct regulator_consumer_supply wallvdd_consumers[] = {
296 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
297 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
298};
299
300static struct regulator_init_data wallvdd_data = {
301 .constraints = {
302 .always_on = 1,
303 },
304 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
305 .consumer_supplies = wallvdd_consumers,
306};
307
308static struct fixed_voltage_config wallvdd_pdata = {
309 .supply_name = "WALLVDD",
310 .microvolts = 5000000,
311 .init_data = &wallvdd_data,
312 .gpio = -EINVAL,
313};
314
315static struct platform_device wallvdd_device = {
316 .name = "reg-fixed-voltage",
317 .id = -1,
318 .dev = {
319 .platform_data = &wallvdd_pdata,
320 },
321};
322
323static struct platform_device *crag6410_devices[] __initdata = {
324 &s3c_device_hsmmc0,
325 &s3c_device_hsmmc1,
326 &s3c_device_hsmmc2,
327 &s3c_device_i2c0,
328 &s3c_device_i2c1,
329 &s3c_device_fb,
330 &s3c_device_ohci,
331 &s3c_device_usb_hsotg,
332 &s3c_device_adc,
333 &s3c_device_rtc,
334 &s3c_device_ts,
335 &s3c_device_timer[0],
336 &s3c64xx_device_iis0,
337 &s3c64xx_device_iis1,
338 &samsung_asoc_dma,
339 &samsung_device_keypad,
340 &crag6410_gpio_keydev,
341 &crag6410_dm9k_device,
342 &s3c64xx_device_spi0,
343 &crag6410_mmgpio,
344 &crag6410_lcd_powerdev,
345 &crag6410_backlight_device,
346 &speyside_device,
347 &speyside_wm8962_device,
348 &wallvdd_device,
349};
350
351static struct pca953x_platform_data crag6410_pca_data = {
352 .gpio_base = PCA935X_GPIO_BASE,
353 .irq_base = 0,
354};
355
356static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
357 REGULATOR_SUPPLY("vddarm", NULL),
358};
359
360static struct regulator_init_data vddarm __initdata = {
361 .constraints = {
362 .name = "VDDARM",
363 .min_uV = 1000000,
364 .max_uV = 1300000,
365 .always_on = 1,
366 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
367 },
368 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
369 .consumer_supplies = vddarm_consumers,
370 .supply_regulator = "WALLVDD",
371};
372
373static struct regulator_init_data vddint __initdata = {
374 .constraints = {
375 .name = "VDDINT",
376 .min_uV = 1000000,
377 .max_uV = 1200000,
378 .always_on = 1,
379 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
380 },
381};
382
383static struct regulator_init_data vddmem __initdata = {
384 .constraints = {
385 .name = "VDDMEM",
386 .always_on = 1,
387 },
388};
389
390static struct regulator_init_data vddsys __initdata = {
391 .constraints = {
392 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
393 .always_on = 1,
394 },
395};
396
397static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
398 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
399 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
400 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
401};
402
403static struct regulator_init_data vddmmc __initdata = {
404 .constraints = {
405 .name = "VDDMMC,UH",
406 .always_on = 1,
407 },
408 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
409 .consumer_supplies = vddmmc_consumers,
410 .supply_regulator = "WALLVDD",
411};
412
413static struct regulator_init_data vddotgi __initdata = {
414 .constraints = {
415 .name = "VDDOTGi",
416 .always_on = 1,
417 },
418 .supply_regulator = "WALLVDD",
419};
420
421static struct regulator_init_data vddotg __initdata = {
422 .constraints = {
423 .name = "VDDOTG",
424 .always_on = 1,
425 },
426 .supply_regulator = "WALLVDD",
427};
428
429static struct regulator_init_data vddhi __initdata = {
430 .constraints = {
431 .name = "VDDHI",
432 .always_on = 1,
433 },
434 .supply_regulator = "WALLVDD",
435};
436
437static struct regulator_init_data vddadc __initdata = {
438 .constraints = {
439 .name = "VDDADC,VDDDAC",
440 .always_on = 1,
441 },
442 .supply_regulator = "WALLVDD",
443};
444
445static struct regulator_init_data vddmem0 __initdata = {
446 .constraints = {
447 .name = "VDDMEM0",
448 .always_on = 1,
449 },
450 .supply_regulator = "WALLVDD",
451};
452
453static struct regulator_init_data vddpll __initdata = {
454 .constraints = {
455 .name = "VDDPLL",
456 .always_on = 1,
457 },
458 .supply_regulator = "WALLVDD",
459};
460
461static struct regulator_init_data vddlcd __initdata = {
462 .constraints = {
463 .name = "VDDLCD",
464 .always_on = 1,
465 },
466 .supply_regulator = "WALLVDD",
467};
468
469static struct regulator_init_data vddalive __initdata = {
470 .constraints = {
471 .name = "VDDALIVE",
472 .always_on = 1,
473 },
474 .supply_regulator = "WALLVDD",
475};
476
477static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
478 .charger_enable = 1,
479 .vlim = 2500, /* mV */
480 .ilim = 200, /* uA */
481};
482
483static struct wm831x_status_pdata banff_red_led __initdata = {
484 .name = "banff:red:",
485 .default_src = WM831X_STATUS_MANUAL,
486};
487
488static struct wm831x_status_pdata banff_green_led __initdata = {
489 .name = "banff:green:",
490 .default_src = WM831X_STATUS_MANUAL,
491};
492
493static struct wm831x_touch_pdata touch_pdata __initdata = {
494 .data_irq = S3C_EINT(26),
495 .pd_irq = S3C_EINT(27),
496};
497
498static struct wm831x_pdata crag_pmic_pdata __initdata = {
499 .wm831x_num = 1,
500 .irq_base = BANFF_PMIC_IRQ_BASE,
501 .gpio_base = GPIO_BOARD_START + 8,
502
503 .backup = &banff_backup_pdata,
504
505 .gpio_defaults = {
506 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
507 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
508 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
509 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
510 },
511
512 .dcdc = {
513 &vddarm, /* DCDC1 */
514 &vddint, /* DCDC2 */
515 &vddmem, /* DCDC3 */
516 },
517
518 .ldo = {
519 &vddsys, /* LDO1 */
520 &vddmmc, /* LDO2 */
521 NULL, /* LDO3 */
522 &vddotgi, /* LDO4 */
523 &vddotg, /* LDO5 */
524 &vddhi, /* LDO6 */
525 &vddadc, /* LDO7 */
526 &vddmem0, /* LDO8 */
527 &vddpll, /* LDO9 */
528 &vddlcd, /* LDO10 */
529 &vddalive, /* LDO11 */
530 },
531
532 .status = {
533 &banff_green_led,
534 &banff_red_led,
535 },
536
537 .touch = &touch_pdata,
538};
539
540static struct i2c_board_info i2c_devs0[] __initdata = {
541 { I2C_BOARD_INFO("24c08", 0x50), },
542 { I2C_BOARD_INFO("tca6408", 0x20),
543 .platform_data = &crag6410_pca_data,
544 },
545 { I2C_BOARD_INFO("wm8312", 0x34),
546 .platform_data = &crag_pmic_pdata,
547 .irq = S3C_EINT(23),
548 },
549};
550
551static struct s3c2410_platform_i2c i2c0_pdata = {
552 .frequency = 400000,
553};
554
555static struct regulator_init_data pvdd_1v2 __initdata = {
556 .constraints = {
557 .name = "PVDD_1V2",
558 .always_on = 1,
559 },
560};
561
562static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
563 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
564 REGULATOR_SUPPLY("DBVDD", "1-001a"),
565 REGULATOR_SUPPLY("CPVDD", "1-001a"),
566 REGULATOR_SUPPLY("AVDD2", "1-001a"),
567 REGULATOR_SUPPLY("DCVDD", "1-001a"),
568 REGULATOR_SUPPLY("AVDD", "1-001a"),
569};
570
571static struct regulator_init_data pvdd_1v8 __initdata = {
572 .constraints = {
573 .name = "PVDD_1V8",
574 .always_on = 1,
575 },
576
577 .consumer_supplies = pvdd_1v8_consumers,
578 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
579};
580
581static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
582 REGULATOR_SUPPLY("MICVDD", "1-001a"),
583 REGULATOR_SUPPLY("AVDD1", "1-001a"),
584};
585
586static struct regulator_init_data pvdd_3v3 __initdata = {
587 .constraints = {
588 .name = "PVDD_3V3",
589 .always_on = 1,
590 },
591
592 .consumer_supplies = pvdd_3v3_consumers,
593 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
594};
595
596static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
597 .wm831x_num = 2,
598 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
599 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
600
601 .gpio_defaults = {
602 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
603 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
604 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
605 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
606 },
607
608 .dcdc = {
609 &pvdd_1v2, /* DCDC1 */
610 &pvdd_1v8, /* DCDC2 */
611 &pvdd_3v3, /* DCDC3 */
612 },
613
614 .disable_touch = true,
615};
616
617static struct wm8915_retune_mobile_config wm8915_retune[] = {
618 {
619 .name = "Sub LPF",
620 .rate = 48000,
621 .regs = {
622 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
623 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
624 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
625 },
626 },
627 {
628 .name = "Sub HPF",
629 .rate = 48000,
630 .regs = {
631 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
632 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
633 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
634 },
635 },
636};
637
638static struct wm8915_pdata wm8915_pdata __initdata = {
639 .ldo_ena = S3C64XX_GPN(7),
640 .gpio_base = CODEC_GPIO_BASE,
641 .micdet_def = 1,
642 .inl_mode = WM8915_DIFFERRENTIAL_1,
643 .inr_mode = WM8915_DIFFERRENTIAL_1,
644
645 .irq_flags = IRQF_TRIGGER_RISING,
646
647 .gpio_default = {
648 0x8001, /* GPIO1 == ADCLRCLK1 */
649 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
650 0x0141, /* GPIO3 == HP_SEL */
651 0x0002, /* GPIO4 == IRQ */
652 0x020e, /* GPIO5 == CLKOUT */
653 },
654
655 .retune_mobile_cfgs = wm8915_retune,
656 .num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
657};
658
659static struct wm8962_pdata wm8962_pdata __initdata = {
660 .gpio_init = {
661 0,
662 WM8962_GPIO_FN_OPCLK,
663 WM8962_GPIO_FN_DMICCLK,
664 0,
665 0x8000 | WM8962_GPIO_FN_DMICDAT,
666 WM8962_GPIO_FN_IRQ, /* Open drain mode */
667 },
668 .irq_active_low = true,
669};
670
671static struct wm9081_pdata wm9081_pdata __initdata = {
672 .irq_high = false,
673 .irq_cmos = false,
674};
675
676static struct i2c_board_info i2c_devs1[] __initdata = {
677 { I2C_BOARD_INFO("wm8311", 0x34),
678 .irq = S3C_EINT(0),
679 .platform_data = &glenfarclas_pmic_pdata },
680
681 { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
682 { I2C_BOARD_INFO("wm8915", 0x1a),
683 .platform_data = &wm8915_pdata,
684 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
685 },
686 { I2C_BOARD_INFO("wm9081", 0x6c),
687 .platform_data = &wm9081_pdata, },
688 { I2C_BOARD_INFO("wm8962", 0x1a),
689 .platform_data = &wm8962_pdata,
690 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
691 },
692};
693
694static void __init crag6410_map_io(void)
695{
696 s3c64xx_init_io(NULL, 0);
697 s3c24xx_init_clocks(12000000);
698 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
699
700 /* LCD type and Bypass set by bootloader */
701}
702
703static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
704 .max_width = 4,
705 .cd_type = S3C_SDHCI_CD_PERMANENT,
706};
707
708static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
709 .max_width = 4,
710 .cd_type = S3C_SDHCI_CD_GPIO,
711 .ext_cd_gpio = S3C64XX_GPF(11),
712};
713
714static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
715{
716 /* Set all the necessary GPG pins to special-function 2 */
717 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
718
719 /* force card-detected for prototype 0 */
720 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
721}
722
723static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
724 .max_width = 4,
725 .cd_type = S3C_SDHCI_CD_INTERNAL,
726 .cfg_gpio = crag6410_cfg_sdhci0,
727};
728
729static void __init crag6410_machine_init(void)
730{
731 /* Open drain IRQs need pullups */
732 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
733 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
734
735 gpio_request(S3C64XX_GPB(0), "LCD power");
736 gpio_direction_output(S3C64XX_GPB(0), 0);
737
738 gpio_request(S3C64XX_GPF(14), "LCD PWM");
739 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
740
741 gpio_request(S3C64XX_GPB(1), "SD power");
742 gpio_direction_output(S3C64XX_GPB(1), 0);
743
744 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
745 gpio_direction_output(S3C64XX_GPF(10), 1);
746
747 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
748 s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
749 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
750
751 s3c_i2c0_set_platdata(&i2c0_pdata);
752 s3c_i2c1_set_platdata(NULL);
753 s3c_fb_set_platdata(&crag6410_lcd_pdata);
754
755 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
756 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
757
758 samsung_keypad_set_platdata(&crag6410_keypad_data);
759
760 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
761
762 regulator_has_full_constraints();
763
764 s3c_pm_init();
765}
766
767MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
768 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
769 .boot_params = S3C64XX_PA_SDRAM + 0x100,
770 .init_irq = s3c6410_init_irq,
771 .map_io = crag6410_map_io,
772 .init_machine = crag6410_machine_init,
773 .timer = &s3c24xx_timer,
774MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
index e78ee18c76e3..ac825e826326 100644
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -112,12 +112,14 @@ static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
112 .cfg_gpio = s5p6440_spi_cfg_gpio, 112 .cfg_gpio = s5p6440_spi_cfg_gpio,
113 .fifo_lvl_mask = 0x1ff, 113 .fifo_lvl_mask = 0x1ff,
114 .rx_lvl_offset = 15, 114 .rx_lvl_offset = 15,
115 .tx_st_done = 25,
115}; 116};
116 117
117static struct s3c64xx_spi_info s5p6450_spi0_pdata = { 118static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
118 .cfg_gpio = s5p6450_spi_cfg_gpio, 119 .cfg_gpio = s5p6450_spi_cfg_gpio,
119 .fifo_lvl_mask = 0x1ff, 120 .fifo_lvl_mask = 0x1ff,
120 .rx_lvl_offset = 15, 121 .rx_lvl_offset = 15,
122 .tx_st_done = 25,
121}; 123};
122 124
123static u64 spi_dmamask = DMA_BIT_MASK(32); 125static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -160,12 +162,14 @@ static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
160 .cfg_gpio = s5p6440_spi_cfg_gpio, 162 .cfg_gpio = s5p6440_spi_cfg_gpio,
161 .fifo_lvl_mask = 0x7f, 163 .fifo_lvl_mask = 0x7f,
162 .rx_lvl_offset = 15, 164 .rx_lvl_offset = 15,
165 .tx_st_done = 25,
163}; 166};
164 167
165static struct s3c64xx_spi_info s5p6450_spi1_pdata = { 168static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
166 .cfg_gpio = s5p6450_spi_cfg_gpio, 169 .cfg_gpio = s5p6450_spi_cfg_gpio,
167 .fifo_lvl_mask = 0x7f, 170 .fifo_lvl_mask = 0x7f,
168 .rx_lvl_offset = 15, 171 .rx_lvl_offset = 15,
172 .tx_st_done = 25,
169}; 173};
170 174
171struct platform_device s5p64x0_device_spi1 = { 175struct platform_device s5p64x0_device_spi1 = {
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index 57b19794d9bb..e5d6c4dceb56 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -15,6 +15,7 @@
15#include <mach/dma.h> 15#include <mach/dma.h>
16#include <mach/map.h> 16#include <mach/map.h>
17#include <mach/spi-clocks.h> 17#include <mach/spi-clocks.h>
18#include <mach/irqs.h>
18 19
19#include <plat/s3c64xx-spi.h> 20#include <plat/s3c64xx-spi.h>
20#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
@@ -90,6 +91,7 @@ static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
90 .fifo_lvl_mask = 0x7f, 91 .fifo_lvl_mask = 0x7f,
91 .rx_lvl_offset = 13, 92 .rx_lvl_offset = 13,
92 .high_speed = 1, 93 .high_speed = 1,
94 .tx_st_done = 21,
93}; 95};
94 96
95static u64 spi_dmamask = DMA_BIT_MASK(32); 97static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -134,6 +136,7 @@ static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
134 .fifo_lvl_mask = 0x7f, 136 .fifo_lvl_mask = 0x7f,
135 .rx_lvl_offset = 13, 137 .rx_lvl_offset = 13,
136 .high_speed = 1, 138 .high_speed = 1,
139 .tx_st_done = 21,
137}; 140};
138 141
139struct platform_device s5pc100_device_spi1 = { 142struct platform_device s5pc100_device_spi1 = {
@@ -176,6 +179,7 @@ static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
176 .fifo_lvl_mask = 0x7f, 179 .fifo_lvl_mask = 0x7f,
177 .rx_lvl_offset = 13, 180 .rx_lvl_offset = 13,
178 .high_speed = 1, 181 .high_speed = 1,
182 .tx_st_done = 21,
179}; 183};
180 184
181struct platform_device s5pc100_device_spi2 = { 185struct platform_device s5pc100_device_spi2 = {
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index e3249a47e3b1..eaf9a7bff7a0 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -85,6 +85,7 @@ static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
85 .fifo_lvl_mask = 0x1ff, 85 .fifo_lvl_mask = 0x1ff,
86 .rx_lvl_offset = 15, 86 .rx_lvl_offset = 15,
87 .high_speed = 1, 87 .high_speed = 1,
88 .tx_st_done = 25,
88}; 89};
89 90
90static u64 spi_dmamask = DMA_BIT_MASK(32); 91static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -129,6 +130,7 @@ static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
129 .fifo_lvl_mask = 0x7f, 130 .fifo_lvl_mask = 0x7f,
130 .rx_lvl_offset = 15, 131 .rx_lvl_offset = 15,
131 .high_speed = 1, 132 .high_speed = 1,
133 .tx_st_done = 25,
132}; 134};
133 135
134struct platform_device s5pv210_device_spi1 = { 136struct platform_device s5pv210_device_spi1 = {
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c
index 245140c0df10..642de0408f25 100644
--- a/arch/arm/mach-vt8500/irq.c
+++ b/arch/arm/mach-vt8500/irq.c
@@ -39,9 +39,10 @@
39static void __iomem *ic_regbase; 39static void __iomem *ic_regbase;
40static void __iomem *sic_regbase; 40static void __iomem *sic_regbase;
41 41
42static void vt8500_irq_mask(unsigned int irq) 42static void vt8500_irq_mask(struct irq_data *d)
43{ 43{
44 void __iomem *base = ic_regbase; 44 void __iomem *base = ic_regbase;
45 unsigned irq = d->irq;
45 u8 edge; 46 u8 edge;
46 47
47 if (irq >= 64) { 48 if (irq >= 64) {
@@ -64,9 +65,10 @@ static void vt8500_irq_mask(unsigned int irq)
64 } 65 }
65} 66}
66 67
67static void vt8500_irq_unmask(unsigned int irq) 68static void vt8500_irq_unmask(struct irq_data *d)
68{ 69{
69 void __iomem *base = ic_regbase; 70 void __iomem *base = ic_regbase;
71 unsigned irq = d->irq;
70 u8 dctr; 72 u8 dctr;
71 73
72 if (irq >= 64) { 74 if (irq >= 64) {
@@ -78,10 +80,11 @@ static void vt8500_irq_unmask(unsigned int irq)
78 writeb(dctr, base + VT8500_IC_DCTR + irq); 80 writeb(dctr, base + VT8500_IC_DCTR + irq);
79} 81}
80 82
81static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) 83static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
82{ 84{
83 void __iomem *base = ic_regbase; 85 void __iomem *base = ic_regbase;
84 unsigned int orig_irq = irq; 86 unsigned irq = d->irq;
87 unsigned orig_irq = irq;
85 u8 dctr; 88 u8 dctr;
86 89
87 if (irq >= 64) { 90 if (irq >= 64) {
@@ -114,11 +117,11 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type)
114} 117}
115 118
116static struct irq_chip vt8500_irq_chip = { 119static struct irq_chip vt8500_irq_chip = {
117 .name = "vt8500", 120 .name = "vt8500",
118 .ack = vt8500_irq_mask, 121 .irq_ack = vt8500_irq_mask,
119 .mask = vt8500_irq_mask, 122 .irq_mask = vt8500_irq_mask,
120 .unmask = vt8500_irq_unmask, 123 .irq_unmask = vt8500_irq_unmask,
121 .set_type = vt8500_irq_set_type, 124 .irq_set_type = vt8500_irq_set_type,
122}; 125};
123 126
124void __init vt8500_init_irq(void) 127void __init vt8500_init_irq(void)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index ef59099a5463..44c086710d2b 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -120,17 +120,22 @@ static void l2x0_cache_sync(void)
120 spin_unlock_irqrestore(&l2x0_lock, flags); 120 spin_unlock_irqrestore(&l2x0_lock, flags);
121} 121}
122 122
123static void l2x0_flush_all(void) 123static void __l2x0_flush_all(void)
124{ 124{
125 unsigned long flags;
126
127 /* clean all ways */
128 spin_lock_irqsave(&l2x0_lock, flags);
129 debug_writel(0x03); 125 debug_writel(0x03);
130 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); 126 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY);
131 cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); 127 cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask);
132 cache_sync(); 128 cache_sync();
133 debug_writel(0x00); 129 debug_writel(0x00);
130}
131
132static void l2x0_flush_all(void)
133{
134 unsigned long flags;
135
136 /* clean all ways */
137 spin_lock_irqsave(&l2x0_lock, flags);
138 __l2x0_flush_all();
134 spin_unlock_irqrestore(&l2x0_lock, flags); 139 spin_unlock_irqrestore(&l2x0_lock, flags);
135} 140}
136 141
@@ -266,7 +271,9 @@ static void l2x0_disable(void)
266 unsigned long flags; 271 unsigned long flags;
267 272
268 spin_lock_irqsave(&l2x0_lock, flags); 273 spin_lock_irqsave(&l2x0_lock, flags);
269 writel(0, l2x0_base + L2X0_CTRL); 274 __l2x0_flush_all();
275 writel_relaxed(0, l2x0_base + L2X0_CTRL);
276 dsb();
270 spin_unlock_irqrestore(&l2x0_lock, flags); 277 spin_unlock_irqrestore(&l2x0_lock, flags);
271} 278}
272 279
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 9d9e736c2b4f..594d677b92c8 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -759,7 +759,7 @@ early_param("vmalloc", early_vmalloc);
759 759
760static phys_addr_t lowmem_limit __initdata = 0; 760static phys_addr_t lowmem_limit __initdata = 0;
761 761
762static void __init sanity_check_meminfo(void) 762void __init sanity_check_meminfo(void)
763{ 763{
764 int i, j, highmem = 0; 764 int i, j, highmem = 0;
765 765
@@ -1032,8 +1032,9 @@ void __init paging_init(struct machine_desc *mdesc)
1032{ 1032{
1033 void *zero_page; 1033 void *zero_page;
1034 1034
1035 memblock_set_current_limit(lowmem_limit);
1036
1035 build_mem_type_table(); 1037 build_mem_type_table();
1036 sanity_check_meminfo();
1037 prepare_page_table(); 1038 prepare_page_table();
1038 map_lowmem(); 1039 map_lowmem();
1039 devicemaps_init(mdesc); 1040 devicemaps_init(mdesc);
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 687d02319a41..941a98c9e8aa 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -27,6 +27,10 @@ void __init arm_mm_memblock_reserve(void)
27 memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE); 27 memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE);
28} 28}
29 29
30void __init sanity_check_meminfo(void)
31{
32}
33
30/* 34/*
31 * paging_init() sets up the page tables, initialises the zone memory 35 * paging_init() sets up the page tables, initialises the zone memory
32 * maps, and sets up the zero page, bad page and bad page tables. 36 * maps, and sets up the zero page, bad page and bad page tables.
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 2abf9660bc6c..a79a8ccd25f6 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1027,17 +1027,13 @@ int s3c2410_dma_config(unsigned int channel,
1027 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); 1027 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
1028 unsigned int dcon; 1028 unsigned int dcon;
1029 1029
1030 pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", 1030 pr_debug("%s: chan=%d, xfer_unit=%d\n", __func__, channel, xferunit);
1031 __func__, channel, xferunit, dcon);
1032 1031
1033 if (chan == NULL) 1032 if (chan == NULL)
1034 return -EINVAL; 1033 return -EINVAL;
1035 1034
1036 pr_debug("%s: Initial dcon is %08x\n", __func__, dcon);
1037
1038 dcon = chan->dcon & dma_sel.dcon_mask; 1035 dcon = chan->dcon & dma_sel.dcon_mask;
1039 1036 pr_debug("%s: dcon is %08x\n", __func__, dcon);
1040 pr_debug("%s: New dcon is %08x\n", __func__, dcon);
1041 1037
1042 switch (chan->req_ch) { 1038 switch (chan->req_ch) {
1043 case DMACH_I2S_IN: 1039 case DMACH_I2S_IN:
@@ -1235,7 +1231,7 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp)
1235 /* restore channel's hardware configuration */ 1231 /* restore channel's hardware configuration */
1236 1232
1237 if (!cp->in_use) 1233 if (!cp->in_use)
1238 return 0; 1234 return;
1239 1235
1240 printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); 1236 printk(KERN_INFO "dma%d: restoring configuration\n", cp->number);
1241 1237
@@ -1246,8 +1242,6 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp)
1246 1242
1247 if (cp->map != NULL) 1243 if (cp->map != NULL)
1248 dma_sel.select(cp, cp->map); 1244 dma_sel.select(cp, cp->map);
1249
1250 return 0;
1251} 1245}
1252 1246
1253static void s3c2410_dma_resume(void) 1247static void s3c2410_dma_resume(void)
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index 899a8cc011ff..612934c48b0d 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -370,11 +370,11 @@ static void __init s5p_clocksource_init(void)
370 370
371 clock_rate = clk_get_rate(tin_source); 371 clock_rate = clk_get_rate(tin_source);
372 372
373 init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
374
375 s5p_time_setup(timer_source.source_id, TCNT_MAX); 373 s5p_time_setup(timer_source.source_id, TCNT_MAX);
376 s5p_time_start(timer_source.source_id, PERIODIC); 374 s5p_time_start(timer_source.source_id, PERIODIC);
377 375
376 init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
377
378 if (clocksource_register_hz(&time_clocksource, clock_rate)) 378 if (clocksource_register_hz(&time_clocksource, clock_rate))
379 panic("%s: can't register clocksource\n", time_clocksource.name); 379 panic("%s: can't register clocksource\n", time_clocksource.name);
380} 380}
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 4af108ff4112..e3b31c26ac3e 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -12,6 +12,10 @@
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14*/ 14*/
15
16#ifndef __PLAT_DEVS_H
17#define __PLAT_DEVS_H __FILE__
18
15#include <linux/platform_device.h> 19#include <linux/platform_device.h>
16 20
17struct s3c24xx_uart_resources { 21struct s3c24xx_uart_resources {
@@ -159,3 +163,5 @@ extern struct platform_device s3c_device_ac97;
159 */ 163 */
160extern void *s3c_set_platdata(void *pd, size_t pdsize, 164extern void *s3c_set_platdata(void *pd, size_t pdsize,
161 struct platform_device *pdev); 165 struct platform_device *pdev);
166
167#endif /* __PLAT_DEVS_H */
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index 0ffe34a21554..4c16fa3621bb 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -39,6 +39,7 @@ struct s3c64xx_spi_csinfo {
39 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 39 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
40 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number 40 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
41 * @high_speed: If the controller supports HIGH_SPEED_EN bit 41 * @high_speed: If the controller supports HIGH_SPEED_EN bit
42 * @tx_st_done: Depends on tx fifo_lvl field
42 */ 43 */
43struct s3c64xx_spi_info { 44struct s3c64xx_spi_info {
44 int src_clk_nr; 45 int src_clk_nr;
@@ -53,6 +54,7 @@ struct s3c64xx_spi_info {
53 int fifo_lvl_mask; 54 int fifo_lvl_mask;
54 int rx_lvl_offset; 55 int rx_lvl_offset;
55 int high_speed; 56 int high_speed;
57 int tx_st_done;
56}; 58};
57 59
58/** 60/**
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 18:26:18 -0500