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authorArnd Bergmann <arnd@arndb.de>2014-04-24 17:46:58 -0400
committerArnd Bergmann <arnd@arndb.de>2014-04-24 17:46:58 -0400
commit1fc52762e33cc905331681364d79424d921f60f2 (patch)
treed7347407cbbdb7a0565e3b4d09aaf40f0705491a /arch/arm
parent9ef1af9ea28c23d0eaed97f7f5142788b6cf570a (diff)
parentcf2e0a73ca9ad376825c013ebaa145608abc27d7 (diff)
Merge tag 'vexpress/fixes-for-3.15' of git://git.linaro.org/people/pawel.moll/linux into fixes
ARM Versatile Express fixes for 3.15 This series contains straight-forward fixes for different Versatile Express infrastructure drivers: - NULL pointer dereference on the error path in the clk driver - out of boundary array access in the dcscb driver - broken restart/power off implementation - mis-interpreted voltage unit in the spc driver * tag 'vexpress/fixes-for-3.15' of git://git.linaro.org/people/pawel.moll/linux: ARM: vexpress/TC2: Convert OPP voltage to uV before storing power/reset: vexpress: Fix restart/power off operation arm/mach-vexpress: array accessed out of bounds clk: vexpress: NULL dereference on error path Includes an update to 3.15-rc2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/spear320-hmi.dts2
-rw-r--r--arch/arm/configs/bcm_defconfig2
-rw-r--r--arch/arm/mach-spear/headsmp.S2
-rw-r--r--arch/arm/mach-spear/platsmp.c2
-rw-r--r--arch/arm/mach-spear/time.c2
-rw-r--r--arch/arm/mach-vexpress/dcscb.c7
-rw-r--r--arch/arm/mach-vexpress/spc.c4
7 files changed, 12 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/spear320-hmi.dts b/arch/arm/boot/dts/spear320-hmi.dts
index 3075d2d3a8be..0aa6fef5ce22 100644
--- a/arch/arm/boot/dts/spear320-hmi.dts
+++ b/arch/arm/boot/dts/spear320-hmi.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr320 Evaluation Baord 2 * DTS file for SPEAr320 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Shiraz Hashim <shiraz.hashim@st.com> 4 * Copyright 2012 Shiraz Hashim <shiraz.linux.kernel@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 01004640ee4d..3df3f3a79ef4 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -132,7 +132,7 @@ CONFIG_CRC_ITU_T=y
132CONFIG_CRC7=y 132CONFIG_CRC7=y
133CONFIG_XZ_DEC=y 133CONFIG_XZ_DEC=y
134CONFIG_AVERAGE=y 134CONFIG_AVERAGE=y
135CONFIG_PINCTRL_CAPRI=y 135CONFIG_PINCTRL_BCM281XX=y
136CONFIG_WATCHDOG=y 136CONFIG_WATCHDOG=y
137CONFIG_BCM_KONA_WDT=y 137CONFIG_BCM_KONA_WDT=y
138CONFIG_BCM_KONA_WDT_DEBUG=y 138CONFIG_BCM_KONA_WDT_DEBUG=y
diff --git a/arch/arm/mach-spear/headsmp.S b/arch/arm/mach-spear/headsmp.S
index ed85473a047f..c52192dc3d9f 100644
--- a/arch/arm/mach-spear/headsmp.S
+++ b/arch/arm/mach-spear/headsmp.S
@@ -3,7 +3,7 @@
3 * 3 *
4 * Picked from realview 4 * Picked from realview
5 * Copyright (c) 2012 ST Microelectronics Limited 5 * Copyright (c) 2012 ST Microelectronics Limited
6 * Shiraz Hashim <shiraz.hashim@st.com> 6 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index 5c4a19887b2b..c19751fff2c6 100644
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -4,7 +4,7 @@
4 * based upon linux/arch/arm/mach-realview/platsmp.c 4 * based upon linux/arch/arm/mach-realview/platsmp.c
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics Ltd. 6 * Copyright (C) 2012 ST Microelectronics Ltd.
7 * Shiraz Hashim <shiraz.hashim@st.com> 7 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c
index c4d0931fc6ee..26fda4ed4d51 100644
--- a/arch/arm/mach-spear/time.c
+++ b/arch/arm/mach-spear/time.c
@@ -2,7 +2,7 @@
2 * arch/arm/plat-spear/time.c 2 * arch/arm/plat-spear/time.c
3 * 3 *
4 * Copyright (C) 2010 ST Microelectronics 4 * Copyright (C) 2010 ST Microelectronics
5 * Shiraz Hashim<shiraz.hashim@st.com> 5 * Shiraz Hashim<shiraz.linux.kernel@gmail.com>
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any 8 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
index 788495d35cf9..30b993399ed7 100644
--- a/arch/arm/mach-vexpress/dcscb.c
+++ b/arch/arm/mach-vexpress/dcscb.c
@@ -51,12 +51,14 @@ static int dcscb_allcpus_mask[2];
51static int dcscb_power_up(unsigned int cpu, unsigned int cluster) 51static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
52{ 52{
53 unsigned int rst_hold, cpumask = (1 << cpu); 53 unsigned int rst_hold, cpumask = (1 << cpu);
54 unsigned int all_mask = dcscb_allcpus_mask[cluster]; 54 unsigned int all_mask;
55 55
56 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); 56 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
57 if (cpu >= 4 || cluster >= 2) 57 if (cpu >= 4 || cluster >= 2)
58 return -EINVAL; 58 return -EINVAL;
59 59
60 all_mask = dcscb_allcpus_mask[cluster];
61
60 /* 62 /*
61 * Since this is called with IRQs enabled, and no arch_spin_lock_irq 63 * Since this is called with IRQs enabled, and no arch_spin_lock_irq
62 * variant exists, we need to disable IRQs manually here. 64 * variant exists, we need to disable IRQs manually here.
@@ -101,11 +103,12 @@ static void dcscb_power_down(void)
101 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); 103 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
102 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 104 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
103 cpumask = (1 << cpu); 105 cpumask = (1 << cpu);
104 all_mask = dcscb_allcpus_mask[cluster];
105 106
106 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); 107 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
107 BUG_ON(cpu >= 4 || cluster >= 2); 108 BUG_ON(cpu >= 4 || cluster >= 2);
108 109
110 all_mask = dcscb_allcpus_mask[cluster];
111
109 __mcpm_cpu_going_down(cpu, cluster); 112 __mcpm_cpu_going_down(cpu, cluster);
110 113
111 arch_spin_lock(&dcscb_lock); 114 arch_spin_lock(&dcscb_lock);
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index c26ef5b92ca7..2c2754e79cb3 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -392,7 +392,7 @@ static irqreturn_t ve_spc_irq_handler(int irq, void *data)
392 * +--------------------------+ 392 * +--------------------------+
393 * | 31 20 | 19 0 | 393 * | 31 20 | 19 0 |
394 * +--------------------------+ 394 * +--------------------------+
395 * | u_volt | freq(kHz) | 395 * | m_volt | freq(kHz) |
396 * +--------------------------+ 396 * +--------------------------+
397 */ 397 */
398#define MULT_FACTOR 20 398#define MULT_FACTOR 20
@@ -414,7 +414,7 @@ static int ve_spc_populate_opps(uint32_t cluster)
414 ret = ve_spc_read_sys_cfg(SYSCFG_SCC, off, &data); 414 ret = ve_spc_read_sys_cfg(SYSCFG_SCC, off, &data);
415 if (!ret) { 415 if (!ret) {
416 opps->freq = (data & FREQ_MASK) * MULT_FACTOR; 416 opps->freq = (data & FREQ_MASK) * MULT_FACTOR;
417 opps->u_volt = data >> VOLT_SHIFT; 417 opps->u_volt = (data >> VOLT_SHIFT) * 1000;
418 } else { 418 } else {
419 break; 419 break;
420 } 420 }