[ARM] 4487/1: ns9xxx: complete definition of GPIO related registers

I changed the naming to be more obvious---unfortunately the HRM
doesn't specify these.

Moreover the numbering is changed to be zero indexed as this is more
natural.

Adjust all callers.

Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 1 insertions, 2 deletions

diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 6eee8084b613..925048e7adfe 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -91,7 +91,7 @@ void __init board_a9m9750dev_init_irq(void)
          * use GPIO 11, because GPIO 32 is used for the LCD
          */
         /* XXX: proper GPIO handling */
-        BBU_GC(2) &= ~0x2000;
+        BBU_GCONFb1(1) &= ~0x2000;
 
         for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
                 set_irq_chip(i, &a9m9750dev_fpga_chip);
@@ -196,4 +196,3 @@ void __init board_a9m9750dev_init_machine(void)
         platform_add_devices(board_a9m9750dev_devices,
                         ARRAY_SIZE(board_a9m9750dev_devices));
 }
-