diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-03 17:12:41 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-03 17:12:41 -0500 |
commit | f41bf2ab998daaa2ac27348d5813e0ae21c57ded (patch) | |
tree | 0ad5ca31ec88b84c4ba1f6380bd971d9933f33e5 /arch/arm | |
parent | 2450cf51a1bdba7037e91b1bcc494b01c58aaf66 (diff) | |
parent | bdf602bd737eb07d63d6fa2da826b4751fdf9bab (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] fix lots of ARM __devexit sillyness
[ARM] 5417/1: Set the correct cacheid for ARMv6 CPUs with ARMv7 style MMU
[ARM] 5416/1: Use unused address in v6_early_abort
[ARM] 5411/1: S3C64XX: Fix EINT unmask
[ARM] at91: fix for Atmel AT91 powersaving
[ARM] RiscPC: Fix etherh oops
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/kernel/setup.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-at91/pm.c | 1 | ||||
-rw-r--r-- | arch/arm/mm/abort-ev6.S | 3 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/irq-eint.c | 2 |
4 files changed, 10 insertions, 9 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 7049815d66d5..68d6494c0389 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -233,12 +233,13 @@ static void __init cacheid_init(void) | |||
233 | unsigned int cachetype = read_cpuid_cachetype(); | 233 | unsigned int cachetype = read_cpuid_cachetype(); |
234 | unsigned int arch = cpu_architecture(); | 234 | unsigned int arch = cpu_architecture(); |
235 | 235 | ||
236 | if (arch >= CPU_ARCH_ARMv7) { | 236 | if (arch >= CPU_ARCH_ARMv6) { |
237 | cacheid = CACHEID_VIPT_NONALIASING; | 237 | if ((cachetype & (7 << 29)) == 4 << 29) { |
238 | if ((cachetype & (3 << 14)) == 1 << 14) | 238 | /* ARMv7 register format */ |
239 | cacheid |= CACHEID_ASID_TAGGED; | 239 | cacheid = CACHEID_VIPT_NONALIASING; |
240 | } else if (arch >= CPU_ARCH_ARMv6) { | 240 | if ((cachetype & (3 << 14)) == 1 << 14) |
241 | if (cachetype & (1 << 23)) | 241 | cacheid |= CACHEID_ASID_TAGGED; |
242 | } else if (cachetype & (1 << 23)) | ||
242 | cacheid = CACHEID_VIPT_ALIASING; | 243 | cacheid = CACHEID_VIPT_ALIASING; |
243 | else | 244 | else |
244 | cacheid = CACHEID_VIPT_NONALIASING; | 245 | cacheid = CACHEID_VIPT_NONALIASING; |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 9bb4f043aa22..7ac812dc055a 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -332,7 +332,6 @@ static int at91_pm_enter(suspend_state_t state) | |||
332 | at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); | 332 | at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); |
333 | 333 | ||
334 | error: | 334 | error: |
335 | sdram_selfrefresh_disable(); | ||
336 | target_state = PM_SUSPEND_ON; | 335 | target_state = PM_SUSPEND_ON; |
337 | at91_irq_resume(); | 336 | at91_irq_resume(); |
338 | at91_gpio_resume(); | 337 | at91_gpio_resume(); |
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S index 8a7f65ba14b7..94077fbd96b7 100644 --- a/arch/arm/mm/abort-ev6.S +++ b/arch/arm/mm/abort-ev6.S | |||
@@ -23,7 +23,8 @@ ENTRY(v6_early_abort) | |||
23 | #ifdef CONFIG_CPU_32v6K | 23 | #ifdef CONFIG_CPU_32v6K |
24 | clrex | 24 | clrex |
25 | #else | 25 | #else |
26 | strex r0, r1, [sp] @ Clear the exclusive monitor | 26 | sub r1, sp, #4 @ Get unused stack location |
27 | strex r0, r1, [r1] @ Clear the exclusive monitor | ||
27 | #endif | 28 | #endif |
28 | mrc p15, 0, r1, c5, c0, 0 @ get FSR | 29 | mrc p15, 0, r1, c5, c0, 0 @ get FSR |
29 | mrc p15, 0, r0, c6, c0, 0 @ get FAR | 30 | mrc p15, 0, r0, c6, c0, 0 @ get FAR |
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c index 1f7cc0067f5c..ebb305ce7689 100644 --- a/arch/arm/plat-s3c64xx/irq-eint.c +++ b/arch/arm/plat-s3c64xx/irq-eint.c | |||
@@ -55,7 +55,7 @@ static void s3c_irq_eint_unmask(unsigned int irq) | |||
55 | u32 mask; | 55 | u32 mask; |
56 | 56 | ||
57 | mask = __raw_readl(S3C64XX_EINT0MASK); | 57 | mask = __raw_readl(S3C64XX_EINT0MASK); |
58 | mask |= eint_irq_to_bit(irq); | 58 | mask &= ~eint_irq_to_bit(irq); |
59 | __raw_writel(mask, S3C64XX_EINT0MASK); | 59 | __raw_writel(mask, S3C64XX_EINT0MASK); |
60 | } | 60 | } |
61 | 61 | ||