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authorEric Bénard <eric@eukrea.com>2010-11-27 03:15:38 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-12-03 05:05:09 -0500
commit29bb6afcb077bd153c7738e73840dde808132fb5 (patch)
treef8530e4e7d36f3c0052fe0ad7e1d71703b6a1691 /arch/arm
parent4e5cf41eeb254b7e50666496ac5697188b31320b (diff)
plat-mxc/ehci.c: fix compile breakage
commits 2eb42d5c287f5e883a4b3ebe668ba880caa351e5 and 9e1dde33876ba83ad586c336647fff133d0f5472 renamed some defines but didn't fix all the places where these defines are used leading to a compile failure for USB on i.MX31, 35 and 27. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-mxc/ehci.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 4bac3d5545d3..b79c8090197c 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -115,7 +115,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
115#endif /* if defined(CONFIG_SOC_IMX25) */ 115#endif /* if defined(CONFIG_SOC_IMX25) */
116#if defined(CONFIG_ARCH_MX3) 116#if defined(CONFIG_ARCH_MX3)
117 if (cpu_is_mx31()) { 117 if (cpu_is_mx31()) {
118 v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR + 118 v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR +
119 USBCTRL_OTGBASE_OFFSET)); 119 USBCTRL_OTGBASE_OFFSET));
120 120
121 switch (port) { 121 switch (port) {
@@ -153,13 +153,13 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
153 return -EINVAL; 153 return -EINVAL;
154 } 154 }
155 155
156 writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR + 156 writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR +
157 USBCTRL_OTGBASE_OFFSET)); 157 USBCTRL_OTGBASE_OFFSET));
158 return 0; 158 return 0;
159 } 159 }
160 160
161 if (cpu_is_mx35()) { 161 if (cpu_is_mx35()) {
162 v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR + 162 v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
163 USBCTRL_OTGBASE_OFFSET)); 163 USBCTRL_OTGBASE_OFFSET));
164 164
165 switch (port) { 165 switch (port) {
@@ -196,7 +196,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
196 return -EINVAL; 196 return -EINVAL;
197 } 197 }
198 198
199 writel(v, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR + 199 writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
200 USBCTRL_OTGBASE_OFFSET)); 200 USBCTRL_OTGBASE_OFFSET));
201 return 0; 201 return 0;
202 } 202 }
@@ -206,7 +206,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
206 /* On i.MX27 we can use the i.MX31 USBCTRL bits, they 206 /* On i.MX27 we can use the i.MX31 USBCTRL bits, they
207 * are identical 207 * are identical
208 */ 208 */
209 v = readl(MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR + 209 v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR +
210 USBCTRL_OTGBASE_OFFSET)); 210 USBCTRL_OTGBASE_OFFSET));
211 switch (port) { 211 switch (port) {
212 case 0: /* OTG port */ 212 case 0: /* OTG port */
@@ -241,7 +241,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
241 default: 241 default:
242 return -EINVAL; 242 return -EINVAL;
243 } 243 }
244 writel(v, MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR + 244 writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR +
245 USBCTRL_OTGBASE_OFFSET)); 245 USBCTRL_OTGBASE_OFFSET));
246 return 0; 246 return 0;
247 } 247 }