diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 11:13:29 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 14:21:42 -0500 |
commit | ff2e27ae0b17f53a6a289c87d325f706598f3788 (patch) | |
tree | 1288f491bce11b3d8a6d48604fd00d68bea6eb98 /arch/arm | |
parent | 384895330e0f3954d9478fd0853145f9c169df12 (diff) |
ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt. Move this into the common GIC code.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/common/gic.c | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-cns3xxx/core.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-cns3xxx/core.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-msm/board-msm8x60.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/include/mach/omap4-common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-realview/core.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-realview/core.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_eb.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pb1176.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pb11mp.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pba8.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pbx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/cpu.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/include/mach/smp.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-vexpress/core.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-vexpress/ct-ca9x4.c | 6 |
18 files changed, 21 insertions, 40 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index dd0d18d560ac..9105d48c02de 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -35,6 +35,9 @@ | |||
35 | 35 | ||
36 | static DEFINE_SPINLOCK(irq_controller_lock); | 36 | static DEFINE_SPINLOCK(irq_controller_lock); |
37 | 37 | ||
38 | /* Address of GIC 0 CPU interface */ | ||
39 | void __iomem *gic_cpu_base_addr; | ||
40 | |||
38 | struct gic_chip_data { | 41 | struct gic_chip_data { |
39 | unsigned int irq_offset; | 42 | unsigned int irq_offset; |
40 | void __iomem *dist_base; | 43 | void __iomem *dist_base; |
@@ -317,6 +320,8 @@ static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) | |||
317 | void __init gic_init(unsigned int gic_nr, unsigned int irq_start, | 320 | void __init gic_init(unsigned int gic_nr, unsigned int irq_start, |
318 | void __iomem *dist_base, void __iomem *cpu_base) | 321 | void __iomem *dist_base, void __iomem *cpu_base) |
319 | { | 322 | { |
323 | if (gic_nr == 0) | ||
324 | gic_cpu_base_addr = cpu_base; | ||
320 | gic_dist_init(gic_nr, dist_base, irq_start); | 325 | gic_dist_init(gic_nr, dist_base, irq_start); |
321 | gic_cpu_init(gic_nr, cpu_base); | 326 | gic_cpu_init(gic_nr, cpu_base); |
322 | } | 327 | } |
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 48876a3fbda8..a82a77703544 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h | |||
@@ -33,6 +33,8 @@ | |||
33 | #define GIC_DIST_SOFTINT 0xf00 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
34 | 34 | ||
35 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
36 | extern void __iomem *gic_cpu_base_addr; | ||
37 | |||
36 | void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); | 38 | void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); |
37 | void gic_secondary_init(unsigned int); | 39 | void gic_secondary_init(unsigned int); |
38 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); | 40 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index e9c491552ca1..da30078a80c1 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -69,13 +69,10 @@ void __init cns3xxx_map_io(void) | |||
69 | } | 69 | } |
70 | 70 | ||
71 | /* used by entry-macro.S */ | 71 | /* used by entry-macro.S */ |
72 | void __iomem *gic_cpu_base_addr; | ||
73 | |||
74 | void __init cns3xxx_init_irq(void) | 72 | void __init cns3xxx_init_irq(void) |
75 | { | 73 | { |
76 | gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT); | ||
77 | gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), | 74 | gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), |
78 | gic_cpu_base_addr); | 75 | __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); |
79 | } | 76 | } |
80 | 77 | ||
81 | void cns3xxx_power_off(void) | 78 | void cns3xxx_power_off(void) |
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index 6b33ec11346e..ef9e5116b1a9 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h | |||
@@ -11,7 +11,6 @@ | |||
11 | #ifndef __CNS3XXX_CORE_H | 11 | #ifndef __CNS3XXX_CORE_H |
12 | #define __CNS3XXX_CORE_H | 12 | #define __CNS3XXX_CORE_H |
13 | 13 | ||
14 | extern void __iomem *gic_cpu_base_addr; | ||
15 | extern struct sys_timer cns3xxx_timer; | 14 | extern struct sys_timer cns3xxx_timer; |
16 | 15 | ||
17 | void __init cns3xxx_map_io(void); | 16 | void __init cns3xxx_map_io(void); |
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index aaf8ec8a1495..9b5eb2b4ae1b 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c | |||
@@ -28,8 +28,6 @@ | |||
28 | #include <mach/board.h> | 28 | #include <mach/board.h> |
29 | #include <mach/msm_iomap.h> | 29 | #include <mach/msm_iomap.h> |
30 | 30 | ||
31 | void __iomem *gic_cpu_base_addr; | ||
32 | |||
33 | unsigned long clk_get_max_axi_khz(void) | 31 | unsigned long clk_get_max_axi_khz(void) |
34 | { | 32 | { |
35 | return 0; | 33 | return 0; |
@@ -44,8 +42,8 @@ static void __init msm8x60_init_irq(void) | |||
44 | { | 42 | { |
45 | unsigned int i; | 43 | unsigned int i; |
46 | 44 | ||
47 | gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; | 45 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, |
48 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr); | 46 | (void *)MSM_QGIC_CPU_BASE); |
49 | 47 | ||
50 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ | 48 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ |
51 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); | 49 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); |
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h index 2744dfee1ff4..5b0270b28934 100644 --- a/arch/arm/mach-omap2/include/mach/omap4-common.h +++ b/arch/arm/mach-omap2/include/mach/omap4-common.h | |||
@@ -24,7 +24,6 @@ | |||
24 | extern void __iomem *l2cache_base; | 24 | extern void __iomem *l2cache_base; |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | extern void __iomem *gic_cpu_base_addr; | ||
28 | extern void __iomem *gic_dist_base_addr; | 27 | extern void __iomem *gic_dist_base_addr; |
29 | 28 | ||
30 | extern void __init gic_init_irq(void); | 29 | extern void __init gic_init_irq(void); |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 3fd3df7a7697..666e852988d5 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -26,21 +26,22 @@ | |||
26 | void __iomem *l2cache_base; | 26 | void __iomem *l2cache_base; |
27 | #endif | 27 | #endif |
28 | 28 | ||
29 | void __iomem *gic_cpu_base_addr; | ||
30 | void __iomem *gic_dist_base_addr; | 29 | void __iomem *gic_dist_base_addr; |
31 | 30 | ||
32 | 31 | ||
33 | void __init gic_init_irq(void) | 32 | void __init gic_init_irq(void) |
34 | { | 33 | { |
34 | void __iomem *gic_cpu_base; | ||
35 | |||
35 | /* Static mapping, never released */ | 36 | /* Static mapping, never released */ |
36 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | 37 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); |
37 | BUG_ON(!gic_dist_base_addr); | 38 | BUG_ON(!gic_dist_base_addr); |
38 | 39 | ||
39 | /* Static mapping, never released */ | 40 | /* Static mapping, never released */ |
40 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | 41 | gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); |
41 | BUG_ON(!gic_cpu_base_addr); | 42 | BUG_ON(!gic_cpu_base); |
42 | 43 | ||
43 | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr); | 44 | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); |
44 | } | 45 | } |
45 | 46 | ||
46 | #ifdef CONFIG_CACHE_L2X0 | 47 | #ifdef CONFIG_CACHE_L2X0 |
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 07c08151dfe6..e292eb8c3c4e 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c | |||
@@ -54,9 +54,6 @@ | |||
54 | 54 | ||
55 | #include "core.h" | 55 | #include "core.h" |
56 | 56 | ||
57 | /* used by entry-macro.S and platsmp.c */ | ||
58 | void __iomem *gic_cpu_base_addr; | ||
59 | |||
60 | #ifdef CONFIG_ZONE_DMA | 57 | #ifdef CONFIG_ZONE_DMA |
61 | /* | 58 | /* |
62 | * Adjust the zones if there are restrictions for DMA access. | 59 | * Adjust the zones if there are restrictions for DMA access. |
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 781bca68a9fa..693239ddc39e 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -53,7 +53,6 @@ extern struct platform_device realview_i2c_device; | |||
53 | extern struct mmci_platform_data realview_mmc0_plat_data; | 53 | extern struct mmci_platform_data realview_mmc0_plat_data; |
54 | extern struct mmci_platform_data realview_mmc1_plat_data; | 54 | extern struct mmci_platform_data realview_mmc1_plat_data; |
55 | extern struct clcd_board clcd_plat_data; | 55 | extern struct clcd_board clcd_plat_data; |
56 | extern void __iomem *gic_cpu_base_addr; | ||
57 | extern void __iomem *timer0_va_base; | 56 | extern void __iomem *timer0_va_base; |
58 | extern void __iomem *timer1_va_base; | 57 | extern void __iomem *timer1_va_base; |
59 | extern void __iomem *timer2_va_base; | 58 | extern void __iomem *timer2_va_base; |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 241bcbc73f61..6ef5c5e528b2 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -364,9 +364,8 @@ static void __init gic_init_irq(void) | |||
364 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); | 364 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); |
365 | 365 | ||
366 | /* core tile GIC, primary */ | 366 | /* core tile GIC, primary */ |
367 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); | ||
368 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), | 367 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), |
369 | gic_cpu_base_addr); | 368 | __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); |
370 | 369 | ||
371 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB | 370 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
372 | /* board GIC, secondary */ | 371 | /* board GIC, secondary */ |
@@ -376,9 +375,8 @@ static void __init gic_init_irq(void) | |||
376 | #endif | 375 | #endif |
377 | } else { | 376 | } else { |
378 | /* board GIC, primary */ | 377 | /* board GIC, primary */ |
379 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); | ||
380 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), | 378 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
381 | gic_cpu_base_addr); | 379 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
382 | } | 380 | } |
383 | } | 381 | } |
384 | 382 | ||
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 8047b198f847..cbdc97a5685f 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -304,10 +304,9 @@ static struct platform_device char_lcd_device = { | |||
304 | static void __init gic_init_irq(void) | 304 | static void __init gic_init_irq(void) |
305 | { | 305 | { |
306 | /* ARM1176 DevChip GIC, primary */ | 306 | /* ARM1176 DevChip GIC, primary */ |
307 | gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE); | ||
308 | gic_init(0, IRQ_DC1176_GIC_START, | 307 | gic_init(0, IRQ_DC1176_GIC_START, |
309 | __io_address(REALVIEW_DC1176_GIC_DIST_BASE), | 308 | __io_address(REALVIEW_DC1176_GIC_DIST_BASE), |
310 | gic_cpu_base_addr); | 309 | __io_address(REALVIEW_DC1176_GIC_CPU_BASE)); |
311 | 310 | ||
312 | /* board GIC, secondary */ | 311 | /* board GIC, secondary */ |
313 | gic_init(1, IRQ_PB1176_GIC_START, | 312 | gic_init(1, IRQ_PB1176_GIC_START, |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 61204265b4e4..8e8ab7d29a6a 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -309,9 +309,8 @@ static void __init gic_init_irq(void) | |||
309 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); | 309 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); |
310 | 310 | ||
311 | /* ARM11MPCore test chip GIC, primary */ | 311 | /* ARM11MPCore test chip GIC, primary */ |
312 | gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE); | ||
313 | gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), | 312 | gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), |
314 | gic_cpu_base_addr); | 313 | __io_address(REALVIEW_TC11MP_GIC_CPU_BASE)); |
315 | 314 | ||
316 | /* board GIC, secondary */ | 315 | /* board GIC, secondary */ |
317 | gic_init(1, IRQ_PB11MP_GIC_START, | 316 | gic_init(1, IRQ_PB11MP_GIC_START, |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 90f492a35d4f..841118e3e118 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -273,7 +273,6 @@ static struct platform_device pmu_device = { | |||
273 | static void __init gic_init_irq(void) | 273 | static void __init gic_init_irq(void) |
274 | { | 274 | { |
275 | /* ARM PB-A8 on-board GIC */ | 275 | /* ARM PB-A8 on-board GIC */ |
276 | gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE); | ||
277 | gic_init(0, IRQ_PBA8_GIC_START, | 276 | gic_init(0, IRQ_PBA8_GIC_START, |
278 | __io_address(REALVIEW_PBA8_GIC_DIST_BASE), | 277 | __io_address(REALVIEW_PBA8_GIC_DIST_BASE), |
279 | __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); | 278 | __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 86f28f725a23..02b755b009db 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -313,11 +313,9 @@ static void __init gic_init_irq(void) | |||
313 | { | 313 | { |
314 | /* ARM PBX on-board GIC */ | 314 | /* ARM PBX on-board GIC */ |
315 | if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { | 315 | if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { |
316 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE); | ||
317 | gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), | 316 | gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), |
318 | __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); | 317 | __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); |
319 | } else { | 318 | } else { |
320 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE); | ||
321 | gic_init(0, IRQ_PBX_GIC_START, | 319 | gic_init(0, IRQ_PBX_GIC_START, |
322 | __io_address(REALVIEW_PBX_GIC_DIST_BASE), | 320 | __io_address(REALVIEW_PBX_GIC_DIST_BASE), |
323 | __io_address(REALVIEW_PBX_GIC_CPU_BASE)); | 321 | __io_address(REALVIEW_PBX_GIC_CPU_BASE)); |
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index bce3e91be432..72ab289e7816 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -24,8 +24,6 @@ | |||
24 | 24 | ||
25 | #include <mach/regs-irq.h> | 25 | #include <mach/regs-irq.h> |
26 | 26 | ||
27 | void __iomem *gic_cpu_base_addr; | ||
28 | |||
29 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, | 27 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, |
30 | unsigned int irq_start); | 28 | unsigned int irq_start); |
31 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | 29 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); |
@@ -122,7 +120,6 @@ void __init s5pv310_init_irq(void) | |||
122 | { | 120 | { |
123 | int irq; | 121 | int irq; |
124 | 122 | ||
125 | gic_cpu_base_addr = S5P_VA_GIC_CPU; | ||
126 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); | 123 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); |
127 | 124 | ||
128 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | 125 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h index b7ec252384f4..e1cc6a251c6a 100644 --- a/arch/arm/mach-s5pv310/include/mach/smp.h +++ b/arch/arm/mach-s5pv310/include/mach/smp.h | |||
@@ -9,8 +9,6 @@ | |||
9 | #include <asm/hardware/gic.h> | 9 | #include <asm/hardware/gic.h> |
10 | #include <asm/smp_mpidr.h> | 10 | #include <asm/smp_mpidr.h> |
11 | 11 | ||
12 | extern void __iomem *gic_cpu_base_addr; | ||
13 | |||
14 | /* | 12 | /* |
15 | * We use IRQ1 as the IPI | 13 | * We use IRQ1 as the IPI |
16 | */ | 14 | */ |
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index 57dd95ce41f9..362780d868de 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h | |||
@@ -22,5 +22,3 @@ struct map_desc; | |||
22 | 22 | ||
23 | void v2m_map_io(struct map_desc *tile, size_t num); | 23 | void v2m_map_io(struct map_desc *tile, size_t num); |
24 | extern struct sys_timer v2m_timer; | 24 | extern struct sys_timer v2m_timer; |
25 | |||
26 | extern void __iomem *gic_cpu_base_addr; | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index 25a3ca6e5a48..8e0a3b7c8638 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -60,12 +60,10 @@ static void __init ct_ca9x4_map_io(void) | |||
60 | v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); | 60 | v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); |
61 | } | 61 | } |
62 | 62 | ||
63 | void __iomem *gic_cpu_base_addr; | ||
64 | |||
65 | static void __init ct_ca9x4_init_irq(void) | 63 | static void __init ct_ca9x4_init_irq(void) |
66 | { | 64 | { |
67 | gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU); | 65 | gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), |
68 | gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), gic_cpu_base_addr); | 66 | MMIO_P2V(A9_MPCORE_GIC_CPU)); |
69 | } | 67 | } |
70 | 68 | ||
71 | #if 0 | 69 | #if 0 |