Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (76 commits)
  [ARM] 4002/1: S3C24XX: leave parent IRQs unmasked
  [ARM] 4001/1: S3C24XX: shorten reboot time
  [ARM] 3983/2: remove unused argument to __bug()
  [ARM] 4000/1: Osiris: add third serial port in
  [ARM] 3999/1: RX3715: suspend to RAM support
  [ARM] 3998/1: VR1000: LED platform devices
  [ARM] 3995/1: iop13xx: add iop13xx support
  [ARM] 3968/1: iop13xx: add iop13xx_defconfig
  [ARM] Update mach-types
  [ARM] Allow gcc to optimise arm_add_memory a little more
  [ARM] 3991/1: i.MX/MX1 high resolution time source
  [ARM] 3990/1: i.MX/MX1 more precise PLL decode
  [ARM] 3986/1: H1940: suspend to RAM support
  [ARM] 3985/1: ixp4xx clocksource cleanup
  [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2)
  [ARM] 3994/1: ixp23xx: fix handling of pci master aborts
  [ARM] 3981/1: sched_clock for PXA2xx
  [ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to 63 bit
  [ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit period
  [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counter
  ...

197 files changed, 9782 insertions, 780 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ce00c570459d..8c05d4321ae9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -223,6 +223,12 @@ config ARCH_IOP33X
         help
           Support for Intel's IOP33X (XScale) family of processors.
 
+config ARCH_IOP13XX
+        bool "IOP13xx-based"
+        select PCI
+        help
+          Support for Intel's IOP13XX (XScale) family of processors.
+
 config ARCH_IXP4XX
         bool "IXP4xx-based"
         depends on MMU
@@ -331,6 +337,8 @@ source "arch/arm/mach-iop32x/Kconfig"
 
 source "arch/arm/mach-iop33x/Kconfig"
 
+source "arch/arm/mach-iop13xx/Kconfig"
+
 source "arch/arm/mach-ixp4xx/Kconfig"
 
 source "arch/arm/mach-ixp2000/Kconfig"
@@ -374,6 +382,14 @@ config PLAT_IOP
 
 source arch/arm/mm/Kconfig
 
+config IWMMXT
+        bool "Enable iWMMXt support"
+        depends CPU_XSCALE || CPU_XSC3
+        default y if PXA27x
+        help
+          Enable support for iWMMXt context switching at run time if
+          running on a CPU that supports it.
+
 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
 config XSCALE_PMU
         bool
@@ -583,7 +599,7 @@ config LEDS
                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
-                   ARCH_AT91RM9200 || MACH_TRIZEPS4
+                   ARCH_AT91 || MACH_TRIZEPS4
         help
           If you say Y here, the LEDs on your machine will be used
           to provide useful information about your current system status.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index d22f38b957db..40c5eb1f55c7 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -32,10 +32,6 @@ config DEBUG_USER
               8 - SIGSEGV faults
              16 - SIGBUS faults
 
-config DEBUG_WAITQ
-        bool "Wait queue debugging"
-        depends on DEBUG_KERNEL
-
 config DEBUG_ERRORS
         bool "Verbose kernel error messages"
         depends on DEBUG_KERNEL
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6f4f8bf36071..000f1100b553 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -15,6 +15,8 @@ CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
 OBJCOPYFLAGS    :=-O binary -R .note -R .comment -S
 GZFLAGS         :=-9
 #CFLAGS         +=-pipe
+# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
+CFLAGS          +=$(call cc-option,-marm,)
 
 # Do not use arch/arm/defconfig - it's always outdated.
 # Select a platform tht is kept up-to-date
@@ -108,6 +110,7 @@ endif
  machine-$(CONFIG_ARCH_CLPS711X)   := clps711x
  machine-$(CONFIG_ARCH_IOP32X)     := iop32x
  machine-$(CONFIG_ARCH_IOP33X)     := iop33x
+ machine-$(CONFIG_ARCH_IOP13XX)    := iop13xx
  machine-$(CONFIG_ARCH_IXP4XX)     := ixp4xx
  machine-$(CONFIG_ARCH_IXP2000)    := ixp2000
  machine-$(CONFIG_ARCH_IXP23XX)    := ixp23xx
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index f3e020f2227f..09b9d1b6844c 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -160,7 +160,7 @@ void __init gic_dist_init(void __iomem *base)
          */
         for (i = 29; i < max_irq; i++) {
                 set_irq_chip(i, &gic_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 80a72c75214f..cfe6f4650bc9 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -163,11 +163,11 @@ static struct locomo_dev_info locomo_devices[] = {
 #define LOCOMO_IRQ_LT_START     (IRQ_LOCOMO_LT)
 #define LOCOMO_IRQ_SPI_START    (IRQ_LOCOMO_SPI_RFR)
 
-static void locomo_handler(unsigned int irq, struct irqdesc *desc)
+static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 {
         int req, i;
-        struct irqdesc *d;
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        struct irq_desc *d;
+        void __iomem *mapbase = get_irq_chip_data(irq);
 
         /* Acknowledge the parent IRQ */
         desc->chip->ack(irq);
@@ -194,7 +194,7 @@ static void locomo_ack_irq(unsigned int irq)
 
 static void locomo_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_ICR);
         r &= ~(0x0010 << (irq - LOCOMO_IRQ_START));
@@ -203,7 +203,7 @@ static void locomo_mask_irq(unsigned int irq)
 
 static void locomo_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_ICR);
         r |= (0x0010 << (irq - LOCOMO_IRQ_START));
@@ -217,10 +217,10 @@ static struct irq_chip locomo_chip = {
         .unmask = locomo_unmask_irq,
 };
 
-static void locomo_key_handler(unsigned int irq, struct irqdesc *desc)
+static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct irqdesc *d;
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        struct irq_desc *d;
+        void __iomem *mapbase = get_irq_chip_data(irq);
 
         if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
                 d = irq_desc + LOCOMO_IRQ_KEY_START;
@@ -230,7 +230,7 @@ static void locomo_key_handler(unsigned int irq, struct irqdesc *desc)
 
 static void locomo_key_ack_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
         r &= ~(0x0100 << (irq - LOCOMO_IRQ_KEY_START));
@@ -239,7 +239,7 @@ static void locomo_key_ack_irq(unsigned int irq)
 
 static void locomo_key_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
         r &= ~(0x0010 << (irq - LOCOMO_IRQ_KEY_START));
@@ -248,7 +248,7 @@ static void locomo_key_mask_irq(unsigned int irq)
 
 static void locomo_key_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
         r |= (0x0010 << (irq - LOCOMO_IRQ_KEY_START));
@@ -262,11 +262,11 @@ static struct irq_chip locomo_key_chip = {
         .unmask = locomo_key_unmask_irq,
 };
 
-static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc)
+static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
 {
         int req, i;
-        struct irqdesc *d;
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        struct irq_desc *d;
+        void __iomem *mapbase = get_irq_chip_data(irq);
 
         req =   locomo_readl(mapbase + LOCOMO_GIR) &
                 locomo_readl(mapbase + LOCOMO_GPD) &
@@ -285,7 +285,7 @@ static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc)
 
 static void locomo_gpio_ack_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_GWE);
         r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
@@ -302,7 +302,7 @@ static void locomo_gpio_ack_irq(unsigned int irq)
 
 static void locomo_gpio_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_GIE);
         r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
@@ -311,7 +311,7 @@ static void locomo_gpio_mask_irq(unsigned int irq)
 
 static void locomo_gpio_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_GIE);
         r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
@@ -325,10 +325,10 @@ static struct irq_chip locomo_gpio_chip = {
         .unmask = locomo_gpio_unmask_irq,
 };
 
-static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc)
+static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct irqdesc *d;
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        struct irq_desc *d;
+        void __iomem *mapbase = get_irq_chip_data(irq);
 
         if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
                 d = irq_desc + LOCOMO_IRQ_LT_START;
@@ -338,7 +338,7 @@ static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc)
 
 static void locomo_lt_ack_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_LTINT);
         r &= ~(0x0100 << (irq - LOCOMO_IRQ_LT_START));
@@ -347,7 +347,7 @@ static void locomo_lt_ack_irq(unsigned int irq)
 
 static void locomo_lt_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_LTINT);
         r &= ~(0x0010 << (irq - LOCOMO_IRQ_LT_START));
@@ -356,7 +356,7 @@ static void locomo_lt_mask_irq(unsigned int irq)
 
 static void locomo_lt_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_LTINT);
         r |= (0x0010 << (irq - LOCOMO_IRQ_LT_START));
@@ -370,11 +370,11 @@ static struct irq_chip locomo_lt_chip = {
         .unmask = locomo_lt_unmask_irq,
 };
 
-static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc)
+static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
 {
         int req, i;
-        struct irqdesc *d;
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        struct irq_desc *d;
+        void __iomem *mapbase = get_irq_chip_data(irq);
 
         req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
         if (req) {
@@ -391,7 +391,7 @@ static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc)
 
 static void locomo_spi_ack_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
         r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
@@ -408,7 +408,7 @@ static void locomo_spi_ack_irq(unsigned int irq)
 
 static void locomo_spi_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
         r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
@@ -417,7 +417,7 @@ static void locomo_spi_mask_irq(unsigned int irq)
 
 static void locomo_spi_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned int r;
         r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
         r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
@@ -440,55 +440,55 @@ static void locomo_setup_irq(struct locomo *lchip)
          * Install handler for IRQ_LOCOMO_HW.
          */
         set_irq_type(lchip->irq, IRQT_FALLING);
-        set_irq_chipdata(lchip->irq, irqbase);
+        set_irq_chip_data(lchip->irq, irqbase);
         set_irq_chained_handler(lchip->irq, locomo_handler);
 
         /* Install handlers for IRQ_LOCOMO_*_BASE */
         set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip);
-        set_irq_chipdata(IRQ_LOCOMO_KEY_BASE, irqbase);
+        set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase);
         set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler);
         set_irq_flags(IRQ_LOCOMO_KEY_BASE, IRQF_VALID | IRQF_PROBE);
 
         set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
-        set_irq_chipdata(IRQ_LOCOMO_GPIO_BASE, irqbase);
+        set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
         set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
         set_irq_flags(IRQ_LOCOMO_GPIO_BASE, IRQF_VALID | IRQF_PROBE);
 
         set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
-        set_irq_chipdata(IRQ_LOCOMO_LT_BASE, irqbase);
+        set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
         set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
         set_irq_flags(IRQ_LOCOMO_LT_BASE, IRQF_VALID | IRQF_PROBE);
 
         set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
-        set_irq_chipdata(IRQ_LOCOMO_SPI_BASE, irqbase);
+        set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
         set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
         set_irq_flags(IRQ_LOCOMO_SPI_BASE, IRQF_VALID | IRQF_PROBE);
 
         /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
         set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
-        set_irq_chipdata(LOCOMO_IRQ_KEY_START, irqbase);
-        set_irq_handler(LOCOMO_IRQ_KEY_START, do_edge_IRQ);
+        set_irq_chip_data(LOCOMO_IRQ_KEY_START, irqbase);
+        set_irq_handler(LOCOMO_IRQ_KEY_START, handle_edge_irq);
         set_irq_flags(LOCOMO_IRQ_KEY_START, IRQF_VALID | IRQF_PROBE);
 
         /* install handlers for IRQ_LOCOMO_GPIO_BASE generated interrupts */
         for (irq = LOCOMO_IRQ_GPIO_START; irq < LOCOMO_IRQ_GPIO_START + 16; irq++) {
                 set_irq_chip(irq, &locomo_gpio_chip);
-                set_irq_chipdata(irq, irqbase);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_chip_data(irq, irqbase);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         /* install handlers for IRQ_LOCOMO_LT_BASE generated interrupts */
         set_irq_chip(LOCOMO_IRQ_LT_START, &locomo_lt_chip);
-        set_irq_chipdata(LOCOMO_IRQ_LT_START, irqbase);
-        set_irq_handler(LOCOMO_IRQ_LT_START, do_edge_IRQ);
+        set_irq_chip_data(LOCOMO_IRQ_LT_START, irqbase);
+        set_irq_handler(LOCOMO_IRQ_LT_START, handle_edge_irq);
         set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
 
         /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
         for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 3; irq++) {
                 set_irq_chip(irq, &locomo_spi_chip);
-                set_irq_chipdata(irq, irqbase);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_chip_data(irq, irqbase);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 }
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index d5f72010a6f3..fe3f05901a23 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -147,7 +147,7 @@ void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *ho
  * will call us again if there are more interrupts to process.
  */
 static void
-sa1111_irq_handler(unsigned int irq, struct irqdesc *desc)
+sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int stat0, stat1, i;
         void __iomem *base = get_irq_data(irq);
@@ -187,7 +187,7 @@ static void sa1111_ack_irq(unsigned int irq)
 
 static void sa1111_mask_lowirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ie0;
 
         ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -197,7 +197,7 @@ static void sa1111_mask_lowirq(unsigned int irq)
 
 static void sa1111_unmask_lowirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ie0;
 
         ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -215,7 +215,7 @@ static void sa1111_unmask_lowirq(unsigned int irq)
 static int sa1111_retrigger_lowirq(unsigned int irq)
 {
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip0;
         int i;
 
@@ -236,7 +236,7 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 {
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip0;
 
         if (flags == IRQT_PROBE)
@@ -259,7 +259,7 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
 {
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long we0;
 
         we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -284,7 +284,7 @@ static struct irq_chip sa1111_low_chip = {
 
 static void sa1111_mask_highirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ie1;
 
         ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -294,7 +294,7 @@ static void sa1111_mask_highirq(unsigned int irq)
 
 static void sa1111_unmask_highirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ie1;
 
         ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -312,7 +312,7 @@ static void sa1111_unmask_highirq(unsigned int irq)
 static int sa1111_retrigger_highirq(unsigned int irq)
 {
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip1;
         int i;
 
@@ -333,7 +333,7 @@ static int sa1111_retrigger_highirq(unsigned int irq)
 static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 {
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip1;
 
         if (flags == IRQT_PROBE)
@@ -356,7 +356,7 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
 {
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chipdata(irq);
+        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long we1;
 
         we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -410,15 +410,15 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
 
         for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
                 set_irq_chip(irq, &sa1111_low_chip);
-                set_irq_chipdata(irq, irqbase);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_chip_data(irq, irqbase);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
                 set_irq_chip(irq, &sa1111_high_chip);
-                set_irq_chipdata(irq, irqbase);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_chip_data(irq, irqbase);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 43d278134521..c026fa2214a3 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -27,14 +27,14 @@
 
 static void vic_mask_irq(unsigned int irq)
 {
-        void __iomem *base = get_irq_chipdata(irq);
+        void __iomem *base = get_irq_chip_data(irq);
         irq &= 31;
         writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 }
 
 static void vic_unmask_irq(unsigned int irq)
 {
-        void __iomem *base = get_irq_chipdata(irq);
+        void __iomem *base = get_irq_chip_data(irq);
         irq &= 31;
         writel(1 << irq, base + VIC_INT_ENABLE);
 }
@@ -88,10 +88,10 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
                 unsigned int irq = irq_start + i;
 
                 set_irq_chip(irq, &vic_chip);
-                set_irq_chipdata(irq, base);
+                set_irq_chip_data(irq, base);
 
                 if (vic_sources & (1 << i)) {
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                 }
         }
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig
index b43041476e02..e10d003566d6 100644
--- a/arch/arm/configs/at91rm9200dk_defconfig
+++ b/arch/arm/configs/at91rm9200dk_defconfig
@@ -357,9 +357,9 @@ CONFIG_MTD_CFI_UTIL=y
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x10000000
-CONFIG_MTD_PHYSMAP_LEN=0x200000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_PHYSMAP_START=0
+CONFIG_MTD_PHYSMAP_LEN=0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=0
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 # CONFIG_MTD_IMPA7 is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -585,7 +585,9 @@ CONFIG_AT91RM9200_WATCHDOG=y
 # CONFIG_USBPCWATCHDOG is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
-CONFIG_AT91_RTC=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91RM9200=y
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 
@@ -979,7 +981,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig
index d96fc8386e2f..834dddb51314 100644
--- a/arch/arm/configs/at91rm9200ek_defconfig
+++ b/arch/arm/configs/at91rm9200ek_defconfig
@@ -348,9 +348,9 @@ CONFIG_MTD_CFI_UTIL=y
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x10000000
-CONFIG_MTD_PHYSMAP_LEN=0x800000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_PHYSMAP_START=0
+CONFIG_MTD_PHYSMAP_LEN=0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=0
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 # CONFIG_MTD_IMPA7 is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -566,7 +566,9 @@ CONFIG_AT91RM9200_WATCHDOG=y
 # CONFIG_USBPCWATCHDOG is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
-CONFIG_AT91_RTC=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AT91RM9200=y
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 
@@ -968,7 +970,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig
new file mode 100644
index 000000000000..79049206dfa5
--- /dev/null
+++ b/arch/arm/configs/at91sam9260ek_defconfig
@@ -0,0 +1,950 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.19-rc6
+# Fri Nov 17 18:42:21 2006
+#
+CONFIG_ARM=y
+# CONFIG_GENERIC_TIME is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+CONFIG_ARCH_AT91SAM9260=y
+# CONFIG_ARCH_AT91SAM9261 is not set
+
+#
+# AT91SAM9260 Board Type
+#
+CONFIG_MACH_AT91SAM9260EK=y
+
+#
+# AT91 Board Options
+#
+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
+
+#
+# AT91 Feature Selections
+#
+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+
+#
+# Bus support
+#
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+# CONFIG_APM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# Network device support
+#
+# CONFIG_NETDEVICES is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+
+#
+# Misc devices
+#
+# CONFIG_TIFM_CORE is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET_MII is not set
+# CONFIG_USB_USBNET is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+CONFIG_USB_GADGET_AT91=y
+CONFIG_USB_AT91=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=m
+# CONFIG_USB_ETH is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_RWSEMS is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_WAITQ is not set
+# CONFIG_DEBUG_ERRORS is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig
new file mode 100644
index 000000000000..784ad7c0186d
--- /dev/null
+++ b/arch/arm/configs/at91sam9261ek_defconfig
@@ -0,0 +1,1106 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.19-rc6
+# Fri Nov 17 18:00:38 2006
+#
+CONFIG_ARM=y
+# CONFIG_GENERIC_TIME is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_AT91SAM9260 is not set
+CONFIG_ARCH_AT91SAM9261=y
+
+#
+# AT91SAM9261 Board Type
+#
+CONFIG_MACH_AT91SAM9261EK=y
+
+#
+# AT91 Board Options
+#
+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
+
+#
+# AT91 Feature Selections
+#
+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+
+#
+# Bus support
+#
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+# CONFIG_APM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_AT91=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_SMC91X is not set
+CONFIG_DM9000=y
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_AT91=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_PCA is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+
+#
+# Misc devices
+#
+# CONFIG_TIFM_CORE is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET_MII is not set
+# CONFIG_USB_USBNET is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+CONFIG_USB_GADGET_AT91=y
+CONFIG_USB_AT91=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=m
+# CONFIG_USB_ETH is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_AT91=m
+# CONFIG_MMC_TIFM_SD is not set
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_RWSEMS is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_WAITQ is not set
+# CONFIG_DEBUG_ERRORS is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
index cfe6bd8e81cd..821865f75605 100644
--- a/arch/arm/configs/badge4_defconfig
+++ b/arch/arm/configs/badge4_defconfig
@@ -1216,7 +1216,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig
index d24ae8777c35..d392833b31fb 100644
--- a/arch/arm/configs/carmeva_defconfig
+++ b/arch/arm/configs/carmeva_defconfig
@@ -474,7 +474,7 @@ CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_WATCHDOG is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
-# CONFIG_AT91_RTC is not set
+# CONFIG_AT91RM9200_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 
diff --git a/arch/arm/configs/cerfcube_defconfig b/arch/arm/configs/cerfcube_defconfig
index 09b7acd7f647..ee130b528bd4 100644
--- a/arch/arm/configs/cerfcube_defconfig
+++ b/arch/arm/configs/cerfcube_defconfig
@@ -851,7 +851,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig
index a3758913c0bb..970c8c772eb7 100644
--- a/arch/arm/configs/collie_defconfig
+++ b/arch/arm/configs/collie_defconfig
@@ -934,7 +934,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
index c41c04fa5020..e8980a9bb893 100644
--- a/arch/arm/configs/corgi_defconfig
+++ b/arch/arm/configs/corgi_defconfig
@@ -1513,7 +1513,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig
index 20e68250d835..2cadd51506bb 100644
--- a/arch/arm/configs/csb337_defconfig
+++ b/arch/arm/configs/csb337_defconfig
@@ -1113,7 +1113,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig
index df8595ac031f..94908c1df4cf 100644
--- a/arch/arm/configs/csb637_defconfig
+++ b/arch/arm/configs/csb637_defconfig
@@ -623,7 +623,7 @@ CONFIG_AT91RM9200_WATCHDOG=y
 # CONFIG_USBPCWATCHDOG is not set
 # CONFIG_NVRAM is not set
 CONFIG_RTC=y
-# CONFIG_AT91_RTC is not set
+# CONFIG_AT91RM9200_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 
@@ -1062,7 +1062,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig
index 3b4802a849e4..f8a66b72ad5d 100644
--- a/arch/arm/configs/ep93xx_defconfig
+++ b/arch/arm/configs/ep93xx_defconfig
@@ -125,6 +125,7 @@ CONFIG_CRUNCH=y
 #
 # EP93xx Platforms
 #
+CONFIG_MACH_ADSSPHERE=y
 CONFIG_MACH_EDB9302=y
 CONFIG_MACH_EDB9312=y
 CONFIG_MACH_EDB9315=y
@@ -1134,7 +1135,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_WAITQ=y
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/h7202_defconfig b/arch/arm/configs/h7202_defconfig
index 9d62ed16bf57..0e739af52713 100644
--- a/arch/arm/configs/h7202_defconfig
+++ b/arch/arm/configs/h7202_defconfig
@@ -702,7 +702,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/hackkit_defconfig b/arch/arm/configs/hackkit_defconfig
index a45b57582b86..1c8fb89a6730 100644
--- a/arch/arm/configs/hackkit_defconfig
+++ b/arch/arm/configs/hackkit_defconfig
@@ -740,7 +740,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_WAITQ=y
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig
index 692ab57ba1ca..3ce96e60b409 100644
--- a/arch/arm/configs/integrator_defconfig
+++ b/arch/arm/configs/integrator_defconfig
@@ -835,7 +835,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/iop13xx_defconfig b/arch/arm/configs/iop13xx_defconfig
new file mode 100644
index 000000000000..f6e46193fd26
--- /dev/null
+++ b/arch/arm/configs/iop13xx_defconfig
@@ -0,0 +1,1134 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.19
+# Fri Dec  1 10:51:01 2006
+#
+CONFIG_ARM=y
+# CONFIG_GENERIC_TIME is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+CONFIG_ARCH_IOP13XX=y
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# IOP13XX Implementation Options
+#
+
+#
+# IOP13XX Platform Support
+#
+CONFIG_MACH_IQ81340SC=y
+CONFIG_MACH_IQ81340MC=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSC3=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_IO_36=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="ip=bootp root=nfs console=ttyS0,115200 nfsroot=,tcp,v3,wsize=8192,rsize=8192"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+# CONFIG_APM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_REDBOOT_PARTS_READONLY=y
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0xfa000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=2
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+CONFIG_SCSI_ISCSI_ATTRS=y
+CONFIG_SCSI_SAS_ATTRS=y
+# CONFIG_SCSI_SAS_LIBSAS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+# CONFIG_ATA is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+# CONFIG_MD_LINEAR is not set
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+CONFIG_MD_RAID10=y
+CONFIG_MD_RAID456=y
+# CONFIG_MD_RAID5_RESHAPE is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_IOP3XX=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Misc devices
+#
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+CONFIG_FIRMWARE_EDID=y
+# CONFIG_FB is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_FS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_USER=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
diff --git a/arch/arm/configs/iop32x_defconfig b/arch/arm/configs/iop32x_defconfig
index 0d67f66e78c2..b275c53728ec 100644
--- a/arch/arm/configs/iop32x_defconfig
+++ b/arch/arm/configs/iop32x_defconfig
@@ -1204,7 +1204,6 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_FORCED_INLINING is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/iop33x_defconfig b/arch/arm/configs/iop33x_defconfig
index 2a8fc153969d..848e3ace9069 100644
--- a/arch/arm/configs/iop33x_defconfig
+++ b/arch/arm/configs/iop33x_defconfig
@@ -1051,7 +1051,6 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_FORCED_INLINING is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/ixp2000_defconfig b/arch/arm/configs/ixp2000_defconfig
index 27b3e31a8ad8..bbd2dcf91e52 100644
--- a/arch/arm/configs/ixp2000_defconfig
+++ b/arch/arm/configs/ixp2000_defconfig
@@ -1026,7 +1026,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/ixp23xx_defconfig b/arch/arm/configs/ixp23xx_defconfig
index 7b18997083ce..06deefaec1d2 100644
--- a/arch/arm/configs/ixp23xx_defconfig
+++ b/arch/arm/configs/ixp23xx_defconfig
@@ -1305,7 +1305,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig
index fac7c3b240c0..fabf74c51a88 100644
--- a/arch/arm/configs/ixp4xx_defconfig
+++ b/arch/arm/configs/ixp4xx_defconfig
@@ -1243,7 +1243,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig
index 80a6fd97eb32..0c556289a3f4 100644
--- a/arch/arm/configs/jornada720_defconfig
+++ b/arch/arm/configs/jornada720_defconfig
@@ -889,7 +889,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig
index b4cd4b414836..c16537d9d67a 100644
--- a/arch/arm/configs/kb9202_defconfig
+++ b/arch/arm/configs/kb9202_defconfig
@@ -437,7 +437,7 @@ CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_WATCHDOG is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
-# CONFIG_AT91_RTC is not set
+# CONFIG_AT91RM9200_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 
@@ -753,7 +753,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig
index 4b29e099640d..e146189ab54f 100644
--- a/arch/arm/configs/lpd270_defconfig
+++ b/arch/arm/configs/lpd270_defconfig
@@ -949,7 +949,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/lpd7a400_defconfig b/arch/arm/configs/lpd7a400_defconfig
index bf9cf9c6d2df..f8ac29d5c654 100644
--- a/arch/arm/configs/lpd7a400_defconfig
+++ b/arch/arm/configs/lpd7a400_defconfig
@@ -850,7 +850,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/lpd7a404_defconfig b/arch/arm/configs/lpd7a404_defconfig
index 3a57be32e849..46a0f7fe1fa5 100644
--- a/arch/arm/configs/lpd7a404_defconfig
+++ b/arch/arm/configs/lpd7a404_defconfig
@@ -1100,7 +1100,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/lubbock_defconfig b/arch/arm/configs/lubbock_defconfig
index 81daadcbe0ba..e544bfbbde5d 100644
--- a/arch/arm/configs/lubbock_defconfig
+++ b/arch/arm/configs/lubbock_defconfig
@@ -772,7 +772,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/mainstone_defconfig b/arch/arm/configs/mainstone_defconfig
index b112bd75bda2..cc8c95b99292 100644
--- a/arch/arm/configs/mainstone_defconfig
+++ b/arch/arm/configs/mainstone_defconfig
@@ -766,7 +766,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/mx1ads_defconfig b/arch/arm/configs/mx1ads_defconfig
index d16f6cd6e039..577d7e1b5d42 100644
--- a/arch/arm/configs/mx1ads_defconfig
+++ b/arch/arm/configs/mx1ads_defconfig
@@ -691,7 +691,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/neponset_defconfig b/arch/arm/configs/neponset_defconfig
index df8168e57b7c..e86794a10fc0 100644
--- a/arch/arm/configs/neponset_defconfig
+++ b/arch/arm/configs/neponset_defconfig
@@ -1115,7 +1115,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/netwinder_defconfig b/arch/arm/configs/netwinder_defconfig
index 2cae1ead9f9b..c1a63a35c58d 100644
--- a/arch/arm/configs/netwinder_defconfig
+++ b/arch/arm/configs/netwinder_defconfig
@@ -994,7 +994,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig
index 61115a773382..57f32f39d0ff 100644
--- a/arch/arm/configs/netx_defconfig
+++ b/arch/arm/configs/netx_defconfig
@@ -872,7 +872,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig
index 9b9f2155af35..0498ebd7d5de 100644
--- a/arch/arm/configs/onearm_defconfig
+++ b/arch/arm/configs/onearm_defconfig
@@ -1045,7 +1045,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/pleb_defconfig b/arch/arm/configs/pleb_defconfig
index 24e8bdd4cb91..a6b47ea8e465 100644
--- a/arch/arm/configs/pleb_defconfig
+++ b/arch/arm/configs/pleb_defconfig
@@ -721,7 +721,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/pnx4008_defconfig b/arch/arm/configs/pnx4008_defconfig
index a4989f44baaa..b5e11aa2e290 100644
--- a/arch/arm/configs/pnx4008_defconfig
+++ b/arch/arm/configs/pnx4008_defconfig
@@ -1604,7 +1604,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/pxa255-idp_defconfig b/arch/arm/configs/pxa255-idp_defconfig
index b71d31a4bb56..46e5089df0ae 100644
--- a/arch/arm/configs/pxa255-idp_defconfig
+++ b/arch/arm/configs/pxa255-idp_defconfig
@@ -768,7 +768,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig
index ffd905ff19f1..fc39ba1a89f3 100644
--- a/arch/arm/configs/realview-smp_defconfig
+++ b/arch/arm/configs/realview-smp_defconfig
@@ -967,7 +967,6 @@ CONFIG_FORCED_INLINING=y
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig
index 3f1ec4e304f7..accbf529ce5b 100644
--- a/arch/arm/configs/realview_defconfig
+++ b/arch/arm/configs/realview_defconfig
@@ -759,7 +759,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/rpc_defconfig b/arch/arm/configs/rpc_defconfig
index b498afdc03b6..bc091264d354 100644
--- a/arch/arm/configs/rpc_defconfig
+++ b/arch/arm/configs/rpc_defconfig
@@ -910,7 +910,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index c0152393e494..3b31a33d0080 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -1319,7 +1319,6 @@ CONFIG_FORCED_INLINING=y
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/shark_defconfig b/arch/arm/configs/shark_defconfig
index c48d17062262..9b6561d119af 100644
--- a/arch/arm/configs/shark_defconfig
+++ b/arch/arm/configs/shark_defconfig
@@ -965,7 +965,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_LL is not set
 
diff --git a/arch/arm/configs/simpad_defconfig b/arch/arm/configs/simpad_defconfig
index 140056a3507f..03f783e696b3 100644
--- a/arch/arm/configs/simpad_defconfig
+++ b/arch/arm/configs/simpad_defconfig
@@ -934,7 +934,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_FS is not set
 CONFIG_FRAME_POINTER=y
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig
index bd03238968c1..aa7a01179500 100644
--- a/arch/arm/configs/spitz_defconfig
+++ b/arch/arm/configs/spitz_defconfig
@@ -1406,7 +1406,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig
index f7bf6ef27d19..48dca69addae 100644
--- a/arch/arm/configs/versatile_defconfig
+++ b/arch/arm/configs/versatile_defconfig
@@ -972,7 +972,6 @@ CONFIG_FRAME_POINTER=y
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 1320a0efca73..ab06a86e85d5 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -24,7 +24,9 @@ obj-$(CONFIG_OABI_COMPAT)	+= sys_oabi-compat.o
 obj-$(CONFIG_CRUNCH)            += crunch.o crunch-bits.o
 AFLAGS_crunch-bits.o            := -Wa,-mcpu=ep9312
 
-obj-$(CONFIG_IWMMXT)            += iwmmxt.o iwmmxt-notifier.o
+obj-$(CONFIG_CPU_XSCALE)        += xscale-cp0.o
+obj-$(CONFIG_CPU_XSC3)          += xscale-cp0.o
+obj-$(CONFIG_IWMMXT)            += iwmmxt.o
 AFLAGS_iwmmxt.o                 := -Wa,-mcpu=iwmmxt
 
 ifneq ($(CONFIG_ARCH_EBSA110),y)
diff --git a/arch/arm/kernel/apm.c b/arch/arm/kernel/apm.c
index ecf4f9472d94..a11fb9a40c04 100644
--- a/arch/arm/kernel/apm.c
+++ b/arch/arm/kernel/apm.c
@@ -12,7 +12,6 @@
  */
 #include <linux/module.h>
 #include <linux/poll.h>
-#include <linux/timer.h>
 #include <linux/slab.h>
 #include <linux/proc_fs.h>
 #include <linux/miscdevice.h>
@@ -26,6 +25,7 @@
 #include <linux/init.h>
 #include <linux/completion.h>
 #include <linux/kthread.h>
+#include <linux/delay.h>
 
 #include <asm/apm.h> /* apm_power_info */
 #include <asm/system.h>
@@ -71,7 +71,8 @@ struct apm_user {
 #define SUSPEND_PENDING 1               /* suspend pending read */
 #define SUSPEND_READ    2               /* suspend read, pending ack */
 #define SUSPEND_ACKED   3               /* suspend acked */
-#define SUSPEND_DONE    4               /* suspend completed */
+#define SUSPEND_WAIT    4               /* waiting for suspend */
+#define SUSPEND_DONE    5               /* suspend completed */
 
         struct apm_queue        queue;
 };
@@ -101,6 +102,7 @@ static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait);
 static DEFINE_SPINLOCK(kapmd_queue_lock);
 static struct apm_queue kapmd_queue;
 
+static DEFINE_MUTEX(state_lock);
 
 static const char driver_version[] = "1.13";    /* no spaces */
 
@@ -148,38 +150,60 @@ static void queue_add_event(struct apm_queue *q, apm_event_t event)
         q->events[q->event_head] = event;
 }
 
-static void queue_event_one_user(struct apm_user *as, apm_event_t event)
+static void queue_event(apm_event_t event)
 {
-        if (as->suser && as->writer) {
-                switch (event) {
-                case APM_SYS_SUSPEND:
-                case APM_USER_SUSPEND:
-                        /*
-                         * If this user already has a suspend pending,
-                         * don't queue another one.
-                         */
-                        if (as->suspend_state != SUSPEND_NONE)
-                                return;
+        struct apm_user *as;
 
-                        as->suspend_state = SUSPEND_PENDING;
-                        suspends_pending++;
-                        break;
-                }
+        down_read(&user_list_lock);
+        list_for_each_entry(as, &apm_user_list, list) {
+                if (as->reader)
+                        queue_add_event(&as->queue, event);
         }
-        queue_add_event(&as->queue, event);
+        up_read(&user_list_lock);
+        wake_up_interruptible(&apm_waitqueue);
 }
 
-static void queue_event(apm_event_t event, struct apm_user *sender)
+/*
+ * queue_suspend_event - queue an APM suspend event.
+ *
+ * Check that we're in a state where we can suspend.  If not,
+ * return -EBUSY.  Otherwise, queue an event to all "writer"
+ * users.  If there are no "writer" users, return '1' to
+ * indicate that we can immediately suspend.
+ */
+static int queue_suspend_event(apm_event_t event, struct apm_user *sender)
 {
         struct apm_user *as;
+        int ret = 1;
 
+        mutex_lock(&state_lock);
         down_read(&user_list_lock);
+
+        /*
+         * If a thread is still processing, we can't suspend, so reject
+         * the request.
+         */
         list_for_each_entry(as, &apm_user_list, list) {
-                if (as != sender && as->reader)
-                        queue_event_one_user(as, event);
+                if (as != sender && as->reader && as->writer && as->suser &&
+                    as->suspend_state != SUSPEND_NONE) {
+                        ret = -EBUSY;
+                        goto out;
+                }
         }
+
+        list_for_each_entry(as, &apm_user_list, list) {
+                if (as != sender && as->reader && as->writer && as->suser) {
+                        as->suspend_state = SUSPEND_PENDING;
+                        suspends_pending++;
+                        queue_add_event(&as->queue, event);
+                        ret = 0;
+                }
+        }
+ out:
         up_read(&user_list_lock);
+        mutex_unlock(&state_lock);
         wake_up_interruptible(&apm_waitqueue);
+        return ret;
 }
 
 static void apm_suspend(void)
@@ -191,17 +215,22 @@ static void apm_suspend(void)
          * Anyone on the APM queues will think we're still suspended.
          * Send a message so everyone knows we're now awake again.
          */
-        queue_event(APM_NORMAL_RESUME, NULL);
+        queue_event(APM_NORMAL_RESUME);
 
         /*
          * Finally, wake up anyone who is sleeping on the suspend.
          */
+        mutex_lock(&state_lock);
         down_read(&user_list_lock);
         list_for_each_entry(as, &apm_user_list, list) {
-                as->suspend_result = err;
-                as->suspend_state = SUSPEND_DONE;
+                if (as->suspend_state == SUSPEND_WAIT ||
+                    as->suspend_state == SUSPEND_ACKED) {
+                        as->suspend_result = err;
+                        as->suspend_state = SUSPEND_DONE;
+                }
         }
         up_read(&user_list_lock);
+        mutex_unlock(&state_lock);
 
         wake_up(&apm_suspend_waitqueue);
 }
@@ -227,8 +256,11 @@ static ssize_t apm_read(struct file *fp, char __user *buf, size_t count, loff_t
                 if (copy_to_user(buf, &event, sizeof(event)))
                         break;
 
-                if (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND)
+                mutex_lock(&state_lock);
+                if (as->suspend_state == SUSPEND_PENDING &&
+                    (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND))
                         as->suspend_state = SUSPEND_READ;
+                mutex_unlock(&state_lock);
 
                 buf += sizeof(event);
                 i -= sizeof(event);
@@ -270,9 +302,13 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
 
         switch (cmd) {
         case APM_IOC_SUSPEND:
+                mutex_lock(&state_lock);
+
                 as->suspend_result = -EINTR;
 
                 if (as->suspend_state == SUSPEND_READ) {
+                        int pending;
+
                         /*
                          * If we read a suspend command from /dev/apm_bios,
                          * then the corresponding APM_IOC_SUSPEND ioctl is
@@ -280,47 +316,73 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
                          */
                         as->suspend_state = SUSPEND_ACKED;
                         suspends_pending--;
+                        pending = suspends_pending == 0;
+                        mutex_unlock(&state_lock);
+
+                        /*
+                         * If there are no further acknowledges required,
+                         * suspend the system.
+                         */
+                        if (pending)
+                                apm_suspend();
+
+                        /*
+                         * Wait for the suspend/resume to complete.  If there
+                         * are pending acknowledges, we wait here for them.
+                         *
+                         * Note: we need to ensure that the PM subsystem does
+                         * not kick us out of the wait when it suspends the
+                         * threads.
+                         */
+                        flags = current->flags;
+                        current->flags |= PF_NOFREEZE;
+
+                        wait_event(apm_suspend_waitqueue,
+                                   as->suspend_state == SUSPEND_DONE);
                 } else {
+                        as->suspend_state = SUSPEND_WAIT;
+                        mutex_unlock(&state_lock);
+
                         /*
                          * Otherwise it is a request to suspend the system.
                          * Queue an event for all readers, and expect an
                          * acknowledge from all writers who haven't already
                          * acknowledged.
                          */
-                        queue_event(APM_USER_SUSPEND, as);
-                }
-
-                /*
-                 * If there are no further acknowledges required, suspend
-                 * the system.
-                 */
-                if (suspends_pending == 0)
-                        apm_suspend();
+                        err = queue_suspend_event(APM_USER_SUSPEND, as);
+                        if (err < 0) {
+                                /*
+                                 * Avoid taking the lock here - this
+                                 * should be fine.
+                                 */
+                                as->suspend_state = SUSPEND_NONE;
+                                break;
+                        }
+
+                        if (err > 0)
+                                apm_suspend();
 
-                /*
-                 * Wait for the suspend/resume to complete.  If there are
-                 * pending acknowledges, we wait here for them.
-                 *
-                 * Note that we need to ensure that the PM subsystem does
-                 * not kick us out of the wait when it suspends the threads.
-                 */
-                flags = current->flags;
-                current->flags |= PF_NOFREEZE;
+                        /*
+                         * Wait for the suspend/resume to complete.  If there
+                         * are pending acknowledges, we wait here for them.
+                         *
+                         * Note: we need to ensure that the PM subsystem does
+                         * not kick us out of the wait when it suspends the
+                         * threads.
+                         */
+                        flags = current->flags;
+                        current->flags |= PF_NOFREEZE;
 
-                /*
-                 * Note: do not allow a thread which is acking the suspend
-                 * to escape until the resume is complete.
-                 */
-                if (as->suspend_state == SUSPEND_ACKED)
-                        wait_event(apm_suspend_waitqueue,
-                                         as->suspend_state == SUSPEND_DONE);
-                else
                         wait_event_interruptible(apm_suspend_waitqueue,
                                          as->suspend_state == SUSPEND_DONE);
+                }
 
                 current->flags = flags;
+
+                mutex_lock(&state_lock);
                 err = as->suspend_result;
                 as->suspend_state = SUSPEND_NONE;
+                mutex_unlock(&state_lock);
                 break;
         }
 
@@ -330,6 +392,8 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
 static int apm_release(struct inode * inode, struct file * filp)
 {
         struct apm_user *as = filp->private_data;
+        int pending = 0;
+
         filp->private_data = NULL;
 
         down_write(&user_list_lock);
@@ -342,11 +406,14 @@ static int apm_release(struct inode * inode, struct file * filp)
          * need to balance suspends_pending, which means the
          * possibility of sleeping.
          */
+        mutex_lock(&state_lock);
         if (as->suspend_state != SUSPEND_NONE) {
                 suspends_pending -= 1;
-                if (suspends_pending == 0)
-                        apm_suspend();
+                pending = suspends_pending == 0;
         }
+        mutex_unlock(&state_lock);
+        if (pending)
+                apm_suspend();
 
         kfree(as);
         return 0;
@@ -470,6 +537,7 @@ static int kapmd(void *arg)
 {
         do {
                 apm_event_t event;
+                int ret;
 
                 wait_event_interruptible(kapmd_wait,
                                 !queue_empty(&kapmd_queue) || kthread_should_stop());
@@ -489,13 +557,20 @@ static int kapmd(void *arg)
 
                 case APM_LOW_BATTERY:
                 case APM_POWER_STATUS_CHANGE:
-                        queue_event(event, NULL);
+                        queue_event(event);
                         break;
 
                 case APM_USER_SUSPEND:
                 case APM_SYS_SUSPEND:
-                        queue_event(event, NULL);
-                        if (suspends_pending == 0)
+                        ret = queue_suspend_event(event, NULL);
+                        if (ret < 0) {
+                                /*
+                                 * We were busy.  Try again in 50ms.
+                                 */
+                                queue_add_event(&kapmd_queue, event);
+                                msleep(50);
+                        }
+                        if (ret > 0)
                                 apm_suspend();
                         break;
 
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index cc2d58d028e1..3c078e346753 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -15,6 +15,7 @@
 #include <asm/mach/arch.h>
 #include <asm/thread_info.h>
 #include <asm/memory.h>
+#include <asm/procinfo.h>
 
 /*
  * Make sure that the compiler and target are compatible.
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index b27513a0f11e..a786f769035d 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -529,7 +529,7 @@ static void ecard_dump_irq_state(void)
         }
 }
 
-static void ecard_check_lockup(struct irqdesc *desc)
+static void ecard_check_lockup(struct irq_desc *desc)
 {
         static unsigned long last;
         static int lockup;
@@ -567,7 +567,7 @@ static void ecard_check_lockup(struct irqdesc *desc)
 }
 
 static void
-ecard_irq_handler(unsigned int irq, struct irqdesc *desc)
+ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         ecard_t *ec;
         int called = 0;
@@ -585,7 +585,7 @@ ecard_irq_handler(unsigned int irq, struct irqdesc *desc)
                         pending = ecard_default_ops.irqpending(ec);
 
                 if (pending) {
-                        struct irqdesc *d = irq_desc + ec->irq;
+                        struct irq_desc *d = irq_desc + ec->irq;
                         desc_handle_irq(ec->irq, d);
                         called ++;
                 }
@@ -609,7 +609,7 @@ static unsigned char first_set[] =
 };
 
 static void
-ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc)
+ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
 {
         const unsigned int statusmask = 15;
         unsigned int status;
@@ -1022,7 +1022,7 @@ ecard_probe(int slot, card_type_t type)
         if (slot < 8) {
                 ec->irq = 32 + slot;
                 set_irq_chip(ec->irq, &ecard_chip);
-                set_irq_handler(ec->irq, do_level_IRQ);
+                set_irq_handler(ec->irq, handle_level_irq);
                 set_irq_flags(ec->irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index bd623b73445f..2db42b18f53f 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -589,10 +589,6 @@ ENTRY(__switch_to)
         strex   r5, r4, [ip]                    @ Clear exclusive monitor
 #endif
 #endif
-#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
-        mra     r4, r5, acc0
-        stmia   ip, {r4, r5}
-#endif
 #if defined(CONFIG_HAS_TLS_REG)
         mcr     p15, 0, r3, c13, c0, 3          @ set TLS register
 #elif !defined(CONFIG_TLS_REG_EMUL)
@@ -602,11 +598,6 @@ ENTRY(__switch_to)
 #ifdef CONFIG_MMU
         mcr     p15, 0, r6, c3, c0, 0           @ Set domain register
 #endif
-#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
-        add     r4, r2, #TI_CPU_DOMAIN + 40     @ cpu_context_save->extra
-        ldmib   r4, {r4, r5}
-        mar     acc0, r4, r5
-#endif
         mov     r5, r0
         add     r4, r2, #TI_CPU_SAVE
         ldr     r0, =thread_notify_head
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index f359a189dcf2..0119c0d5f978 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -16,7 +16,6 @@
 
 #include <asm/assembler.h>
 #include <asm/mach-types.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 #include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index ebc3e74a7947..bda0748ffb00 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -16,7 +16,6 @@
 
 #include <asm/assembler.h>
 #include <asm/domain.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 #include <asm/asm-offsets.h>
 #include <asm/memory.h>
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 2c4ff1cbe334..ec01f08f5642 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -112,7 +112,7 @@ static struct irq_desc bad_irq_desc = {
 asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
 {
         struct pt_regs *old_regs = set_irq_regs(regs);
-        struct irqdesc *desc = irq_desc + irq;
+        struct irq_desc *desc = irq_desc + irq;
 
         /*
          * Some hardware gives randomly wrong interrupts.  Rather
@@ -134,7 +134,7 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
 
 void set_irq_flags(unsigned int irq, unsigned int iflags)
 {
-        struct irqdesc *desc;
+        struct irq_desc *desc;
         unsigned long flags;
 
         if (irq >= NR_IRQS) {
@@ -171,7 +171,7 @@ void __init init_IRQ(void)
 
 #ifdef CONFIG_HOTPLUG_CPU
 
-static void route_irq(struct irqdesc *desc, unsigned int irq, unsigned int cpu)
+static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
 {
         pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu);
 
@@ -190,7 +190,7 @@ void migrate_irqs(void)
         unsigned int i, cpu = smp_processor_id();
 
         for (i = 0; i < NR_IRQS; i++) {
-                struct irqdesc *desc = irq_desc + i;
+                struct irq_desc *desc = irq_desc + i;
 
                 if (desc->cpu == cpu) {
                         unsigned int newcpu = any_online_cpu(desc->affinity);
diff --git a/arch/arm/kernel/iwmmxt-notifier.c b/arch/arm/kernel/iwmmxt-notifier.c
deleted file mode 100644
index 0d1a1db40062..000000000000
--- a/arch/arm/kernel/iwmmxt-notifier.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- *  linux/arch/arm/kernel/iwmmxt-notifier.c
- *
- *  XScale iWMMXt (Concan) context switching and handling
- *
- *  Initial code:
- *  Copyright (c) 2003, Intel Corporation
- *
- *  Full lazy switching support, optimizations and more, by Nicolas Pitre
- *  Copyright (c) 2003-2004, MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <asm/thread_notify.h>
-#include <asm/io.h>
-
-static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
-{
-        struct thread_info *thread = t;
-
-        switch (cmd) {
-        case THREAD_NOTIFY_FLUSH:
-                /*
-                 * flush_thread() zeroes thread->fpstate, so no need
-                 * to do anything here.
-                 *
-                 * FALLTHROUGH: Ensure we don't try to overwrite our newly
-                 * initialised state information on the first fault.
-                 */
-
-        case THREAD_NOTIFY_RELEASE:
-                iwmmxt_task_release(thread);
-                break;
-
-        case THREAD_NOTIFY_SWITCH:
-                iwmmxt_task_switch(thread);
-                break;
-        }
-
-        return NOTIFY_DONE;
-}
-
-static struct notifier_block iwmmxt_notifier_block = {
-        .notifier_call  = iwmmxt_do,
-};
-
-static int __init iwmmxt_init(void)
-{
-        thread_register_notifier(&iwmmxt_notifier_block);
-
-        return 0;
-}
-
-late_initcall(iwmmxt_init);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index bf35c178a877..a9e8f7e55fd6 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -281,67 +281,6 @@ void show_fpregs(struct user_fp *regs)
 }
 
 /*
- * Task structure and kernel stack allocation.
- */
-struct thread_info_list {
-        unsigned long *head;
-        unsigned int nr;
-};
-
-static DEFINE_PER_CPU(struct thread_info_list, thread_info_list) = { NULL, 0 };
-
-#define EXTRA_TASK_STRUCT       4
-
-struct thread_info *alloc_thread_info(struct task_struct *task)
-{
-        struct thread_info *thread = NULL;
-
-        if (EXTRA_TASK_STRUCT) {
-                struct thread_info_list *th = &get_cpu_var(thread_info_list);
-                unsigned long *p = th->head;
-
-                if (p) {
-                        th->head = (unsigned long *)p[0];
-                        th->nr -= 1;
-                }
-                put_cpu_var(thread_info_list);
-
-                thread = (struct thread_info *)p;
-        }
-
-        if (!thread)
-                thread = (struct thread_info *)
-                           __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
-
-#ifdef CONFIG_DEBUG_STACK_USAGE
-        /*
-         * The stack must be cleared if you want SYSRQ-T to
-         * give sensible stack usage information
-         */
-        if (thread)
-                memzero(thread, THREAD_SIZE);
-#endif
-        return thread;
-}
-
-void free_thread_info(struct thread_info *thread)
-{
-        if (EXTRA_TASK_STRUCT) {
-                struct thread_info_list *th = &get_cpu_var(thread_info_list);
-                if (th->nr < EXTRA_TASK_STRUCT) {
-                        unsigned long *p = (unsigned long *)thread;
-                        p[0] = (unsigned long)th->head;
-                        th->head = p;
-                        th->nr += 1;
-                        put_cpu_var(thread_info_list);
-                        return;
-                }
-                put_cpu_var(thread_info_list);
-        }
-        free_pages((unsigned long)thread, THREAD_SIZE_ORDER);
-}
-
-/*
  * Free current thread data structures etc..
  */
 void exit_thread(void)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 29efc9f82057..238dd9b6db84 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -357,9 +357,6 @@ static void __init setup_processor(void)
 #ifndef CONFIG_VFP
         elf_hwcap &= ~HWCAP_VFP;
 #endif
-#ifndef CONFIG_IWMMXT
-        elf_hwcap &= ~HWCAP_IWMMXT;
-#endif
 
         cpu_proc_init();
 }
@@ -441,16 +438,19 @@ __early_param("initrd=", early_initrd);
 
 static void __init arm_add_memory(unsigned long start, unsigned long size)
 {
+        struct membank *bank;
+
         /*
          * Ensure that start/size are aligned to a page boundary.
          * Size is appropriately rounded down, start is rounded up.
          */
         size -= start & ~PAGE_MASK;
 
-        meminfo.bank[meminfo.nr_banks].start = PAGE_ALIGN(start);
-        meminfo.bank[meminfo.nr_banks].size  = size & PAGE_MASK;
-        meminfo.bank[meminfo.nr_banks].node  = PHYS_TO_NID(start);
-        meminfo.nr_banks += 1;
+        bank = &meminfo.bank[meminfo.nr_banks++];
+
+        bank->start = PAGE_ALIGN(start);
+        bank->size  = size & PAGE_MASK;
+        bank->node  = PHYS_TO_NID(start);
 }
 
 /*
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index f38a60a03b8c..3843d3bab2dd 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -13,6 +13,7 @@
 #include <linux/personality.h>
 #include <linux/freezer.h>
 
+#include <asm/elf.h>
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index bede380c07a9..042a12982e98 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -631,12 +631,9 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
         notify_die("unknown data abort code", regs, &info, instr, 0);
 }
 
-void __attribute__((noreturn)) __bug(const char *file, int line, void *data)
+void __attribute__((noreturn)) __bug(const char *file, int line)
 {
-        printk(KERN_CRIT"kernel BUG at %s:%d!", file, line);
-        if (data)
-                printk(" - extra data = %p", data);
-        printk("\n");
+        printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line);
         *(int *)0 = 0;
 
         /* Avoid "noreturn function does return" */
diff --git a/arch/arm/kernel/xscale-cp0.c b/arch/arm/kernel/xscale-cp0.c
new file mode 100644
index 000000000000..180000bfdc8f
--- /dev/null
+++ b/arch/arm/kernel/xscale-cp0.c
@@ -0,0 +1,179 @@
+/*
+ * linux/arch/arm/kernel/xscale-cp0.c
+ *
+ * XScale DSP and iWMMXt coprocessor context switching and handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <asm/thread_notify.h>
+#include <asm/io.h>
+
+static inline void dsp_save_state(u32 *state)
+{
+        __asm__ __volatile__ (
+                "mrrc   p0, 0, %0, %1, c0\n"
+                : "=r" (state[0]), "=r" (state[1]));
+}
+
+static inline void dsp_load_state(u32 *state)
+{
+        __asm__ __volatile__ (
+                "mcrr   p0, 0, %0, %1, c0\n"
+                : : "r" (state[0]), "r" (state[1]));
+}
+
+static int dsp_do(struct notifier_block *self, unsigned long cmd, void *t)
+{
+        struct thread_info *thread = t;
+
+        switch (cmd) {
+        case THREAD_NOTIFY_FLUSH:
+                thread->cpu_context.extra[0] = 0;
+                thread->cpu_context.extra[1] = 0;
+                break;
+
+        case THREAD_NOTIFY_SWITCH:
+                dsp_save_state(current_thread_info()->cpu_context.extra);
+                dsp_load_state(thread->cpu_context.extra);
+                break;
+        }
+
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block dsp_notifier_block = {
+        .notifier_call  = dsp_do,
+};
+
+
+#ifdef CONFIG_IWMMXT
+static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
+{
+        struct thread_info *thread = t;
+
+        switch (cmd) {
+        case THREAD_NOTIFY_FLUSH:
+                /*
+                 * flush_thread() zeroes thread->fpstate, so no need
+                 * to do anything here.
+                 *
+                 * FALLTHROUGH: Ensure we don't try to overwrite our newly
+                 * initialised state information on the first fault.
+                 */
+
+        case THREAD_NOTIFY_RELEASE:
+                iwmmxt_task_release(thread);
+                break;
+
+        case THREAD_NOTIFY_SWITCH:
+                iwmmxt_task_switch(thread);
+                break;
+        }
+
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block iwmmxt_notifier_block = {
+        .notifier_call  = iwmmxt_do,
+};
+#endif
+
+
+static u32 __init xscale_cp_access_read(void)
+{
+        u32 value;
+
+        __asm__ __volatile__ (
+                "mrc    p15, 0, %0, c15, c1, 0\n\t"
+                : "=r" (value));
+
+        return value;
+}
+
+static void __init xscale_cp_access_write(u32 value)
+{
+        u32 temp;
+
+        __asm__ __volatile__ (
+                "mcr    p15, 0, %1, c15, c1, 0\n\t"
+                "mrc    p15, 0, %0, c15, c1, 0\n\t"
+                "mov    %0, %0\n\t"
+                "sub    pc, pc, #4\n\t"
+                : "=r" (temp) : "r" (value));
+}
+
+/*
+ * Detect whether we have a MAC coprocessor (40 bit register) or an
+ * iWMMXt coprocessor (64 bit registers) by loading 00000100:00000000
+ * into a coprocessor register and reading it back, and checking
+ * whether the upper word survived intact.
+ */
+static int __init cpu_has_iwmmxt(void)
+{
+        u32 lo;
+        u32 hi;
+
+        /*
+         * This sequence is interpreted by the DSP coprocessor as:
+         *      mar     acc0, %2, %3
+         *      mra     %0, %1, acc0
+         *
+         * And by the iWMMXt coprocessor as:
+         *      tmcrr   wR0, %2, %3
+         *      tmrrc   %0, %1, wR0
+         */
+        __asm__ __volatile__ (
+                "mcrr   p0, 0, %2, %3, c0\n"
+                "mrrc   p0, 0, %0, %1, c0\n"
+                : "=r" (lo), "=r" (hi)
+                : "r" (0), "r" (0x100));
+
+        return !!hi;
+}
+
+
+/*
+ * If we detect that the CPU has iWMMXt (and CONFIG_IWMMXT=y), we
+ * disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
+ * switch code handle iWMMXt context switching.  If on the other
+ * hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
+ * all the time, and save/restore acc0 on context switch in non-lazy
+ * fashion.
+ */
+static int __init xscale_cp0_init(void)
+{
+        u32 cp_access;
+
+        cp_access = xscale_cp_access_read() & ~3;
+        xscale_cp_access_write(cp_access | 1);
+
+        if (cpu_has_iwmmxt()) {
+#ifndef CONFIG_IWMMXT
+                printk(KERN_WARNING "CAUTION: XScale iWMMXt coprocessor "
+                        "detected, but kernel support is missing.\n");
+#else
+                printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
+                elf_hwcap |= HWCAP_IWMMXT;
+                thread_register_notifier(&iwmmxt_notifier_block);
+#endif
+        } else {
+                printk(KERN_INFO "XScale DSP coprocessor detected.\n");
+                thread_register_notifier(&dsp_notifier_block);
+                cp_access |= 1;
+        }
+
+        xscale_cp_access_write(cp_access);
+
+        return 0;
+}
+
+late_initcall(xscale_cp0_init);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index fe3d297d682d..a950160fcfb6 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -82,7 +82,7 @@ static void aaec2000_int_unmask(unsigned int irq)
         IRQ_INTENS |= (1 << irq);
 }
 
-static struct irqchip aaec2000_irq_chip = {
+static struct irq_chip aaec2000_irq_chip = {
         .ack    = aaec2000_int_ack,
         .mask   = aaec2000_int_mask,
         .unmask = aaec2000_int_unmask,
@@ -93,7 +93,7 @@ void __init aaec2000_init_irq(void)
         unsigned int i;
 
         for (i = 0; i < NR_IRQS; i++) {
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_chip(i, &aaec2000_irq_chip);
                 set_irq_flags(i, IRQF_VALID);
         }
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig
index 2f85e8693b1b..9f11db8af233 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91rm9200/Kconfig
@@ -2,7 +2,8 @@ if ARCH_AT91
 
 menu "Atmel AT91 System-on-Chip"
 
-comment "Atmel AT91 Processors"
+choice
+        prompt "Atmel AT91 Processor"
 
 config ARCH_AT91RM9200
         bool "AT91RM9200"
@@ -13,6 +14,8 @@ config ARCH_AT91SAM9260
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
 
+endchoice
+
 # ----------------------------------------------------------
 
 if ARCH_AT91RM9200
@@ -33,7 +36,6 @@ config ARCH_AT91RM9200DK
           Select this if you are using Atmel's AT91RM9200-DK Development board.
           (Discontinued)
 
-
 config MACH_AT91RM9200EK
         bool "Atmel AT91RM9200-EK Evaluation Kit"
         depends on ARCH_AT91RM9200
@@ -90,6 +92,13 @@ if ARCH_AT91SAM9260
 
 comment "AT91SAM9260 Board Type"
 
+config MACH_AT91SAM9260EK
+        bool "Atmel AT91SAM9260-EK Evaluation Kit"
+        depends on ARCH_AT91SAM9260
+        help
+          Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit.
+          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
+
 endif
 
 # ----------------------------------------------------------
@@ -98,8 +107,31 @@ if ARCH_AT91SAM9261
 
 comment "AT91SAM9261 Board Type"
 
+config MACH_AT91SAM9261EK
+        bool "Atmel AT91SAM9261-EK Evaluation Kit"
+        depends on ARCH_AT91SAM9261
+        help
+          Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
+          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
+
 endif
 
+# ----------------------------------------------------------
+
+comment "AT91 Board Options"
+
+config MTD_AT91_DATAFLASH_CARD
+        bool "Enable DataFlash Card support"
+        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK)
+        help
+          Enable support for the DataFlash card.
+
+config MTD_NAND_AT91_BUSWIDTH_16
+        bool "Enable 16-bit data bus interface to NAND flash"
+        depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK)
+        help
+          On AT91SAM926x boards both types of NAND flash can be present
+          (8 and 16 bit data bus width).
 
 # ----------------------------------------------------------
 
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile
index c174805c24e5..cf777007847a 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91rm9200/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the linux kernel.
 #
 
-obj-y           := clock.o irq.o gpio.o devices.o
+obj-y           := clock.o irq.o gpio.o
 obj-m           :=
 obj-n           :=
 obj-            :=
@@ -10,11 +10,11 @@ obj-		:=
 obj-$(CONFIG_PM)                += pm.o
 
 # CPU-specific support
-obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o
-obj-$(CONFIG_ARCH_AT91SAM9260)  +=
-obj-$(CONFIG_ARCH_AT91SAM9261)  +=
+obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
+obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
+obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
 
-# AT91RM9200 Board-specific support
+# AT91RM9200 board-specific support
 obj-$(CONFIG_MACH_ONEARM)       += board-1arm.o
 obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
 obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
@@ -26,8 +26,10 @@ obj-$(CONFIG_MACH_ATEB9200)	+= board-eb9200.o
 obj-$(CONFIG_MACH_KAFA)         += board-kafa.o
 
 # AT91SAM9260 board-specific support
+obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
 
 # AT91SAM9261 board-specific support
+obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
 
 # LEDs support
 led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index dcf6136fedf9..a92e9a495b07 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -14,8 +14,10 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/arch/at91rm9200.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_st.h>
 
-#include <asm/hardware.h>
 #include "generic.h"
 #include "clock.h"
 
@@ -26,32 +28,12 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = AT91_VA_BASE_SPI,
-                .pfn            = __phys_to_pfn(AT91RM9200_BASE_SPI),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
                 .virtual        = AT91_VA_BASE_EMAC,
                 .pfn            = __phys_to_pfn(AT91RM9200_BASE_EMAC),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = AT91_VA_BASE_TWI,
-                .pfn            = __phys_to_pfn(AT91RM9200_BASE_TWI),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = AT91_VA_BASE_MCI,
-                .pfn            = __phys_to_pfn(AT91RM9200_BASE_MCI),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = AT91_VA_BASE_UDP,
-                .pfn            = __phys_to_pfn(AT91RM9200_BASE_UDP),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = AT91_SRAM_VIRT_BASE,
+                .virtual        = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
                 .pfn            = __phys_to_pfn(AT91RM9200_SRAM_BASE),
                 .length         = AT91RM9200_SRAM_SIZE,
                 .type           = MT_DEVICE,
@@ -222,6 +204,16 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
         }
 };
 
+static void at91rm9200_reset(void)
+{
+        /*
+         * Perform a hardware reset with the use of the Watchdog timer.
+         */
+        at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
+        at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+}
+
+
 /* --------------------------------------------------------------------
  *  AT91RM9200 processor initialization
  * -------------------------------------------------------------------- */
@@ -230,6 +222,12 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
         /* Map peripherals */
         iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
 
+        at91_arch_reset = at91rm9200_reset;
+        at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
+                        | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
+                        | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
+                        | (1 << AT91RM9200_ID_IRQ6);
+
         /* Init clock subsystem */
         at91_clock_init(main_clock);
 
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/at91rm9200_devices.c
index 059824376629..4641b99db0ee 100644
--- a/arch/arm/mach-at91rm9200/devices.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_devices.c
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-at91rm9200/devices.c
+ * arch/arm/mach-at91rm9200/at91rm9200_devices.c
  *
  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
  *  Copyright (C) 2005 David Brownell
@@ -15,9 +15,10 @@
 
 #include <linux/platform_device.h>
 
-#include <asm/hardware.h>
 #include <asm/arch/board.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/at91rm9200.h>
+#include <asm/arch/at91rm9200_mc.h>
 
 #include "generic.h"
 
@@ -33,7 +34,7 @@
 static u64 ohci_dmamask = 0xffffffffUL;
 static struct at91_usbh_data usbh_data;
 
-static struct resource at91_usbh_resources[] = {
+static struct resource usbh_resources[] = {
         [0] = {
                 .start  = AT91RM9200_UHP_BASE,
                 .end    = AT91RM9200_UHP_BASE + SZ_1M - 1,
@@ -54,8 +55,8 @@ static struct platform_device at91rm9200_usbh_device = {
                                 .coherent_dma_mask      = 0xffffffff,
                                 .platform_data          = &usbh_data,
         },
-        .resource       = at91_usbh_resources,
-        .num_resources  = ARRAY_SIZE(at91_usbh_resources),
+        .resource       = usbh_resources,
+        .num_resources  = ARRAY_SIZE(usbh_resources),
 };
 
 void __init at91_add_device_usbh(struct at91_usbh_data *data)
@@ -78,7 +79,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
 #ifdef CONFIG_USB_GADGET_AT91
 static struct at91_udc_data udc_data;
 
-static struct resource at91_udc_resources[] = {
+static struct resource udc_resources[] = {
         [0] = {
                 .start  = AT91RM9200_BASE_UDP,
                 .end    = AT91RM9200_BASE_UDP + SZ_16K - 1,
@@ -97,8 +98,8 @@ static struct platform_device at91rm9200_udc_device = {
         .dev            = {
                                 .platform_data          = &udc_data,
         },
-        .resource       = at91_udc_resources,
-        .num_resources  = ARRAY_SIZE(at91_udc_resources),
+        .resource       = udc_resources,
+        .num_resources  = ARRAY_SIZE(udc_resources),
 };
 
 void __init at91_add_device_udc(struct at91_udc_data *data)
@@ -129,7 +130,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 static u64 eth_dmamask = 0xffffffffUL;
 static struct at91_eth_data eth_data;
 
-static struct resource at91_eth_resources[] = {
+static struct resource eth_resources[] = {
         [0] = {
                 .start  = AT91_VA_BASE_EMAC,
                 .end    = AT91_VA_BASE_EMAC + SZ_16K - 1,
@@ -150,8 +151,8 @@ static struct platform_device at91rm9200_eth_device = {
                                 .coherent_dma_mask      = 0xffffffff,
                                 .platform_data          = &eth_data,
         },
-        .resource       = at91_eth_resources,
-        .num_resources  = ARRAY_SIZE(at91_eth_resources),
+        .resource       = eth_resources,
+        .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
 void __init at91_add_device_eth(struct at91_eth_data *data)
@@ -202,11 +203,13 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
 static struct at91_cf_data cf_data;
 
-static struct resource at91_cf_resources[] = {
+#define CF_BASE         AT91_CHIPSELECT_4
+
+static struct resource cf_resources[] = {
         [0] = {
-                .start  = AT91_CF_BASE,
+                .start  = CF_BASE,
                 /* ties up CS4, CS5 and CS6 */
-                .end    = AT91_CF_BASE + (0x30000000 - 1),
+                .end    = CF_BASE + (0x30000000 - 1),
                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
         },
 };
@@ -217,15 +220,38 @@ static struct platform_device at91rm9200_cf_device = {
         .dev            = {
                                 .platform_data          = &cf_data,
         },
-        .resource       = at91_cf_resources,
-        .num_resources  = ARRAY_SIZE(at91_cf_resources),
+        .resource       = cf_resources,
+        .num_resources  = ARRAY_SIZE(cf_resources),
 };
 
 void __init at91_add_device_cf(struct at91_cf_data *data)
 {
+        unsigned int csa;
+
         if (!data)
                 return;
 
+        data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
+
+        /* CF takes over CS4, CS5, CS6 */
+        csa = at91_sys_read(AT91_EBI_CSA);
+        at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
+
+        /*
+         * Static memory controller timing adjustments.
+         * REVISIT:  these timings are in terms of MCK cycles, so
+         * when MCK changes (cpufreq etc) so must these values...
+         */
+        at91_sys_write(AT91_SMC_CSR(4),
+                                  AT91_SMC_ACSS_STD
+                                | AT91_SMC_DBW_16
+                                | AT91_SMC_BAT
+                                | AT91_SMC_WSEN
+                                | AT91_SMC_NWS_(32)     /* wait states */
+                                | AT91_SMC_RWSETUP_(6)  /* setup time */
+                                | AT91_SMC_RWHOLD_(4)   /* hold time */
+        );
+
         /* input/irq */
         if (data->irq_pin) {
                 at91_set_gpio_input(data->irq_pin, 1);
@@ -245,6 +271,9 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         at91_set_A_periph(AT91_PIN_PC11, 0);    /* NCS5/CFCE1 */
         at91_set_A_periph(AT91_PIN_PC12, 0);    /* NCS6/CFCE2 */
 
+        /* nWAIT is _not_ a default setting */
+        at91_set_A_periph(AT91_PIN_PC6, 1);     /*  nWAIT */
+
         cf_data = *data;
         platform_device_register(&at91rm9200_cf_device);
 }
@@ -257,11 +286,11 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {}
  *  MMC / SD
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 static u64 mmc_dmamask = 0xffffffffUL;
 static struct at91_mmc_data mmc_data;
 
-static struct resource at91_mmc_resources[] = {
+static struct resource mmc_resources[] = {
         [0] = {
                 .start  = AT91RM9200_BASE_MCI,
                 .end    = AT91RM9200_BASE_MCI + SZ_16K - 1,
@@ -282,8 +311,8 @@ static struct platform_device at91rm9200_mmc_device = {
                                 .coherent_dma_mask      = 0xffffffff,
                                 .platform_data          = &mmc_data,
         },
-        .resource       = at91_mmc_resources,
-        .num_resources  = ARRAY_SIZE(at91_mmc_resources),
+        .resource       = mmc_resources,
+        .num_resources  = ARRAY_SIZE(mmc_resources),
 };
 
 void __init at91_add_device_mmc(struct at91_mmc_data *data)
@@ -298,31 +327,33 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
         }
         if (data->wp_pin)
                 at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
 
         /* CLK */
         at91_set_A_periph(AT91_PIN_PA27, 0);
 
-        if (data->is_b) {
+        if (data->slot_b) {
                 /* CMD */
-                at91_set_B_periph(AT91_PIN_PA8, 0);
+                at91_set_B_periph(AT91_PIN_PA8, 1);
 
                 /* DAT0, maybe DAT1..DAT3 */
-                at91_set_B_periph(AT91_PIN_PA9, 0);
+                at91_set_B_periph(AT91_PIN_PA9, 1);
                 if (data->wire4) {
-                        at91_set_B_periph(AT91_PIN_PA10, 0);
-                        at91_set_B_periph(AT91_PIN_PA11, 0);
-                        at91_set_B_periph(AT91_PIN_PA12, 0);
+                        at91_set_B_periph(AT91_PIN_PA10, 1);
+                        at91_set_B_periph(AT91_PIN_PA11, 1);
+                        at91_set_B_periph(AT91_PIN_PA12, 1);
                 }
         } else {
                 /* CMD */
-                at91_set_A_periph(AT91_PIN_PA28, 0);
+                at91_set_A_periph(AT91_PIN_PA28, 1);
 
                 /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA29, 0);
+                at91_set_A_periph(AT91_PIN_PA29, 1);
                 if (data->wire4) {
-                        at91_set_B_periph(AT91_PIN_PB3, 0);
-                        at91_set_B_periph(AT91_PIN_PB4, 0);
-                        at91_set_B_periph(AT91_PIN_PB5, 0);
+                        at91_set_B_periph(AT91_PIN_PB3, 1);
+                        at91_set_B_periph(AT91_PIN_PB4, 1);
+                        at91_set_B_periph(AT91_PIN_PB5, 1);
                 }
         }
 
@@ -341,29 +372,45 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 static struct at91_nand_data nand_data;
 
-static struct resource at91_nand_resources[] = {
+#define NAND_BASE       AT91_CHIPSELECT_3
+
+static struct resource nand_resources[] = {
         {
-                .start  = AT91_SMARTMEDIA_BASE,
-                .end    = AT91_SMARTMEDIA_BASE + SZ_8M - 1,
+                .start  = NAND_BASE,
+                .end    = NAND_BASE + SZ_8M - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
 
-static struct platform_device at91_nand_device = {
+static struct platform_device at91rm9200_nand_device = {
         .name           = "at91_nand",
         .id             = -1,
         .dev            = {
                                 .platform_data  = &nand_data,
         },
-        .resource       = at91_nand_resources,
-        .num_resources  = ARRAY_SIZE(at91_nand_resources),
+        .resource       = nand_resources,
+        .num_resources  = ARRAY_SIZE(nand_resources),
 };
 
 void __init at91_add_device_nand(struct at91_nand_data *data)
 {
+        unsigned int csa;
+
         if (!data)
                 return;
 
+        /* enable the address range of CS3 */
+        csa = at91_sys_read(AT91_EBI_CSA);
+        at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
+
+        /* set the bus interface characteristics */
+        at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
+                | AT91_SMC_NWS_(5)
+                | AT91_SMC_TDF_(1)
+                | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
+                | AT91_SMC_RWHOLD_(1)   /* tDH Data Hold Time 20 - ns */
+        );
+
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
@@ -380,7 +427,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
         at91_set_A_periph(AT91_PIN_PC3, 0);             /* SMWE */
 
         nand_data = *data;
-        platform_device_register(&at91_nand_device);
+        platform_device_register(&at91rm9200_nand_device);
 }
 #else
 void __init at91_add_device_nand(struct at91_nand_data *data) {}
@@ -392,10 +439,25 @@ void __init at91_add_device_nand(struct at91_nand_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
+
+static struct resource twi_resources[] = {
+        [0] = {
+                .start  = AT91RM9200_BASE_TWI,
+                .end    = AT91RM9200_BASE_TWI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91RM9200_ID_TWI,
+                .end    = AT91RM9200_ID_TWI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 static struct platform_device at91rm9200_twi_device = {
         .name           = "at91_i2c",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = twi_resources,
+        .num_resources  = ARRAY_SIZE(twi_resources),
 };
 
 void __init at91_add_device_i2c(void)
@@ -421,7 +483,7 @@ void __init at91_add_device_i2c(void) {}
 #if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
 static u64 spi_dmamask = 0xffffffffUL;
 
-static struct resource at91_spi_resources[] = {
+static struct resource spi_resources[] = {
         [0] = {
                 .start  = AT91RM9200_BASE_SPI,
                 .end    = AT91RM9200_BASE_SPI + SZ_16K - 1,
@@ -438,14 +500,14 @@ static struct platform_device at91rm9200_spi_device = {
         .name           = "at91_spi",
         .id             = 0,
         .dev            = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = 0xffffffff,
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
         },
-        .resource       = at91_spi_resources,
-        .num_resources  = ARRAY_SIZE(at91_spi_resources),
+        .resource       = spi_resources,
+        .num_resources  = ARRAY_SIZE(spi_resources),
 };
 
-static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
+static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 
 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 {
@@ -461,7 +523,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 if (devices[i].controller_data)
                         cs_pin = (unsigned long) devices[i].controller_data;
                 else
-                        cs_pin = at91_spi_standard_cs[devices[i].chip_select];
+                        cs_pin = spi_standard_cs[devices[i].chip_select];
 
 #ifdef CONFIG_SPI_AT91_MANUAL_CS
                 at91_set_gpio_output(cs_pin, 1);
@@ -474,7 +536,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
         }
 
         spi_register_board_info(devices, nr_devices);
-        at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
+        at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi");
         platform_device_register(&at91rm9200_spi_device);
 }
 #else
@@ -486,7 +548,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  *  RTC
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
+#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 static struct platform_device at91rm9200_rtc_device = {
         .name           = "at91_rtc",
         .id             = -1,
@@ -506,7 +568,7 @@ static void __init at91_add_device_rtc(void) {}
  *  Watchdog
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
+#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
 static struct platform_device at91rm9200_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_time.c b/arch/arm/mach-at91rm9200/at91rm9200_time.c
index 07c9cea8961d..b999e192a7e9 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200_time.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c
@@ -30,6 +30,8 @@
 #include <asm/io.h>
 #include <asm/mach/time.h>
 
+#include <asm/arch/at91_st.h>
+
 static unsigned long last_crtr;
 
 /*
@@ -99,6 +101,9 @@ void at91rm9200_timer_reset(void)
         /* Set Period Interval timer */
         at91_sys_write(AT91_ST_PIMR, LATCH);
 
+        /* Clear any pending interrupts */
+        (void) at91_sys_read(AT91_ST_SR);
+
         /* Enable Period Interval Timer interrupt */
         at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
 }
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91rm9200/at91sam9260.c
new file mode 100644
index 000000000000..203f073a53e6
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260.c
@@ -0,0 +1,294 @@
+/*
+ * arch/arm/mach-at91rm9200/at91sam9260.c
+ *
+ *  Copyright (C) 2006 SAN People
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/at91sam9260.h>
+#include <asm/arch/at91_pmc.h>
+
+#include "generic.h"
+#include "clock.h"
+
+static struct map_desc at91sam9260_io_desc[] __initdata = {
+        {
+                .virtual        = AT91_VA_BASE_SYS,
+                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
+                .pfn            = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
+                .length         = AT91SAM9260_SRAM0_SIZE,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
+                .pfn            = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
+                .length         = AT91SAM9260_SRAM1_SIZE,
+                .type           = MT_DEVICE,
+        },
+};
+
+/* --------------------------------------------------------------------
+ *  Clocks
+ * -------------------------------------------------------------------- */
+
+/*
+ * The peripheral clocks.
+ */
+static struct clk pioA_clk = {
+        .name           = "pioA_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_PIOA,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioB_clk = {
+        .name           = "pioB_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_PIOB,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioC_clk = {
+        .name           = "pioC_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_PIOC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk adc_clk = {
+        .name           = "adc_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_ADC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart0_clk = {
+        .name           = "usart0_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_US0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart1_clk = {
+        .name           = "usart1_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_US1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart2_clk = {
+        .name           = "usart2_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_US2,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc_clk = {
+        .name           = "mci_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_MCI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk udc_clk = {
+        .name           = "udc_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_UDP,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi_clk = {
+        .name           = "twi_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_TWI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi0_clk = {
+        .name           = "spi0_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_SPI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi1_clk = {
+        .name           = "spi1_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_SPI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ohci_clk = {
+        .name           = "ohci_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_UHP,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ether_clk = {
+        .name           = "ether_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_EMAC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk isi_clk = {
+        .name           = "isi_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_ISI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart3_clk = {
+        .name           = "usart3_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_US3,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart4_clk = {
+        .name           = "usart4_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_US4,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart5_clk = {
+        .name           = "usart5_clk",
+        .pmc_mask       = 1 << AT91SAM9260_ID_US5,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+
+static struct clk *periph_clocks[] __initdata = {
+        &pioA_clk,
+        &pioB_clk,
+        &pioC_clk,
+        &adc_clk,
+        &usart0_clk,
+        &usart1_clk,
+        &usart2_clk,
+        &mmc_clk,
+        &udc_clk,
+        &twi_clk,
+        &spi0_clk,
+        &spi1_clk,
+        // ssc
+        // tc0 .. tc2
+        &ohci_clk,
+        &ether_clk,
+        &isi_clk,
+        &usart3_clk,
+        &usart4_clk,
+        &usart5_clk,
+        // tc3 .. tc5
+        // irq0 .. irq2
+};
+
+/*
+ * The two programmable clocks.
+ * You must configure pin multiplexing to bring these signals out.
+ */
+static struct clk pck0 = {
+        .name           = "pck0",
+        .pmc_mask       = AT91_PMC_PCK0,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 0,
+};
+static struct clk pck1 = {
+        .name           = "pck1",
+        .pmc_mask       = AT91_PMC_PCK1,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 1,
+};
+
+static void __init at91sam9260_register_clocks(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
+                clk_register(periph_clocks[i]);
+
+        clk_register(&pck0);
+        clk_register(&pck1);
+}
+
+/* --------------------------------------------------------------------
+ *  GPIO
+ * -------------------------------------------------------------------- */
+
+static struct at91_gpio_bank at91sam9260_gpio[] = {
+        {
+                .id             = AT91SAM9260_ID_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
+        }, {
+                .id             = AT91SAM9260_ID_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
+        }, {
+                .id             = AT91SAM9260_ID_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
+        }
+};
+
+static void at91sam9260_reset(void)
+{
+#warning "Implement CPU reset"
+}
+
+
+/* --------------------------------------------------------------------
+ *  AT91SAM9260 processor initialization
+ * -------------------------------------------------------------------- */
+
+void __init at91sam9260_initialize(unsigned long main_clock)
+{
+        /* Map peripherals */
+        iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
+
+        at91_arch_reset = at91sam9260_reset;
+        at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
+                        | (1 << AT91SAM9260_ID_IRQ2);
+
+        /* Init clock subsystem */
+        at91_clock_init(main_clock);
+
+        /* Register the processor-specific clocks */
+        at91sam9260_register_clocks();
+
+        /* Register GPIO subsystem */
+        at91_gpio_init(at91sam9260_gpio, 3);
+}
+
+/* --------------------------------------------------------------------
+ *  Interrupt initialization
+ * -------------------------------------------------------------------- */
+
+/*
+ * The default interrupt priority levels (0 = lowest, 7 = highest).
+ */
+static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
+        7,      /* Advanced Interrupt Controller */
+        7,      /* System Peripherals */
+        0,      /* Parallel IO Controller A */
+        0,      /* Parallel IO Controller B */
+        0,      /* Parallel IO Controller C */
+        0,      /* Analog-to-Digital Converter */
+        6,      /* USART 0 */
+        6,      /* USART 1 */
+        6,      /* USART 2 */
+        0,      /* Multimedia Card Interface */
+        4,      /* USB Device Port */
+        0,      /* Two-Wire Interface */
+        6,      /* Serial Peripheral Interface 0 */
+        6,      /* Serial Peripheral Interface 1 */
+        5,      /* Serial Synchronous Controller */
+        0,
+        0,
+        0,      /* Timer Counter 0 */
+        0,      /* Timer Counter 1 */
+        0,      /* Timer Counter 2 */
+        3,      /* USB Host port */
+        3,      /* Ethernet */
+        0,      /* Image Sensor Interface */
+        6,      /* USART 3 */
+        6,      /* USART 4 */
+        6,      /* USART 5 */
+        0,      /* Timer Counter 3 */
+        0,      /* Timer Counter 4 */
+        0,      /* Timer Counter 5 */
+        0,      /* Advanced Interrupt Controller */
+        0,      /* Advanced Interrupt Controller */
+        0,      /* Advanced Interrupt Controller */
+};
+
+void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
+{
+        if (!priority)
+                priority = at91sam9260_default_irq_priority;
+
+        /* Initialize the AIC interrupt controller */
+        at91_aic_init(priority);
+
+        /* Enable GPIO interrupts */
+        at91_gpio_irq_setup();
+}
diff --git a/arch/arm/mach-at91rm9200/at91sam9260_devices.c b/arch/arm/mach-at91rm9200/at91sam9260_devices.c
new file mode 100644
index 000000000000..a6c596dc4516
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260_devices.c
@@ -0,0 +1,866 @@
+/*
+ * arch/arm/mach-at91rm9200/at91sam9260_devices.c
+ *
+ *  Copyright (C) 2006 Atmel
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <linux/platform_device.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91sam9260.h>
+#include <asm/arch/at91sam926x_mc.h>
+
+#include "generic.h"
+
+#define SZ_512  0x00000200
+#define SZ_256  0x00000100
+#define SZ_16   0x00000010
+
+/* --------------------------------------------------------------------
+ *  USB Host
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static u64 ohci_dmamask = 0xffffffffUL;
+static struct at91_usbh_data usbh_data;
+
+static struct resource usbh_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_UHP_BASE,
+                .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_UHP,
+                .end    = AT91SAM9260_ID_UHP,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91_usbh_device = {
+        .name           = "at91_ohci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &ohci_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+                                .platform_data          = &usbh_data,
+        },
+        .resource       = usbh_resources,
+        .num_resources  = ARRAY_SIZE(usbh_resources),
+};
+
+void __init at91_add_device_usbh(struct at91_usbh_data *data)
+{
+        if (!data)
+                return;
+
+        usbh_data = *data;
+        platform_device_register(&at91_usbh_device);
+}
+#else
+void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  USB Device (Gadget)
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_USB_GADGET_AT91
+static struct at91_udc_data udc_data;
+
+static struct resource udc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_UDP,
+                .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_UDP,
+                .end    = AT91SAM9260_ID_UDP,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91_udc_device = {
+        .name           = "at91_udc",
+        .id             = -1,
+        .dev            = {
+                                .platform_data          = &udc_data,
+        },
+        .resource       = udc_resources,
+        .num_resources  = ARRAY_SIZE(udc_resources),
+};
+
+void __init at91_add_device_udc(struct at91_udc_data *data)
+{
+        if (!data)
+                return;
+
+        if (data->vbus_pin) {
+                at91_set_gpio_input(data->vbus_pin, 0);
+                at91_set_deglitch(data->vbus_pin, 1);
+        }
+
+        /* Pullup pin is handled internally by USB device peripheral */
+
+        udc_data = *data;
+        platform_device_register(&at91_udc_device);
+}
+#else
+void __init at91_add_device_udc(struct at91_udc_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  Ethernet
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
+static u64 eth_dmamask = 0xffffffffUL;
+static struct eth_platform_data eth_data;
+
+static struct resource eth_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_EMAC,
+                .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_EMAC,
+                .end    = AT91SAM9260_ID_EMAC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_eth_device = {
+        .name           = "macb",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &eth_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+                                .platform_data          = &eth_data,
+        },
+        .resource       = eth_resources,
+        .num_resources  = ARRAY_SIZE(eth_resources),
+};
+
+void __init at91_add_device_eth(struct eth_platform_data *data)
+{
+        if (!data)
+                return;
+
+        if (data->phy_irq_pin) {
+                at91_set_gpio_input(data->phy_irq_pin, 0);
+                at91_set_deglitch(data->phy_irq_pin, 1);
+        }
+
+        /* Pins used for MII and RMII */
+        at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
+        at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
+        at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
+        at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
+        at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
+        at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
+        at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
+        at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
+        at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
+        at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
+
+        if (!data->is_rmii) {
+                at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
+                at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
+                at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
+                at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
+                at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
+                at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
+                at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
+                at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
+        }
+
+        eth_data = *data;
+        platform_device_register(&at91sam9260_eth_device);
+}
+#else
+void __init at91_add_device_eth(struct eth_platform_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  MMC / SD
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
+static u64 mmc_dmamask = 0xffffffffUL;
+static struct at91_mmc_data mmc_data;
+
+static struct resource mmc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_MCI,
+                .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_MCI,
+                .end    = AT91SAM9260_ID_MCI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_mmc_device = {
+        .name           = "at91_mci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &mmc_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+                                .platform_data          = &mmc_data,
+        },
+        .resource       = mmc_resources,
+        .num_resources  = ARRAY_SIZE(mmc_resources),
+};
+
+void __init at91_add_device_mmc(struct at91_mmc_data *data)
+{
+        if (!data)
+                return;
+
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        /* CLK */
+        at91_set_A_periph(AT91_PIN_PA8, 0);
+
+        if (data->slot_b) {
+                /* CMD */
+                at91_set_B_periph(AT91_PIN_PA1, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_B_periph(AT91_PIN_PA0, 1);
+                if (data->wire4) {
+                        at91_set_B_periph(AT91_PIN_PA5, 1);
+                        at91_set_B_periph(AT91_PIN_PA4, 1);
+                        at91_set_B_periph(AT91_PIN_PA3, 1);
+                }
+        } else {
+                /* CMD */
+                at91_set_A_periph(AT91_PIN_PA7, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_A_periph(AT91_PIN_PA6, 1);
+                if (data->wire4) {
+                        at91_set_A_periph(AT91_PIN_PA9, 1);
+                        at91_set_A_periph(AT91_PIN_PA10, 1);
+                        at91_set_A_periph(AT91_PIN_PA11, 1);
+                }
+        }
+
+        mmc_data = *data;
+        platform_device_register(&at91sam9260_mmc_device);
+}
+#else
+void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  NAND / SmartMedia
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
+static struct at91_nand_data nand_data;
+
+#define NAND_BASE       AT91_CHIPSELECT_3
+
+static struct resource nand_resources[] = {
+        {
+                .start  = NAND_BASE,
+                .end    = NAND_BASE + SZ_8M - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91sam9260_nand_device = {
+        .name           = "at91_nand",
+        .id             = -1,
+        .dev            = {
+                                .platform_data  = &nand_data,
+        },
+        .resource       = nand_resources,
+        .num_resources  = ARRAY_SIZE(nand_resources),
+};
+
+void __init at91_add_device_nand(struct at91_nand_data *data)
+{
+        unsigned long csa, mode;
+
+        if (!data)
+                return;
+
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
+
+        /* set the bus interface characteristics */
+        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
+                        | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+
+        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
+                        | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+
+        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+
+        if (data->bus_width_16)
+                mode = AT91_SMC_DBW_16;
+        else
+                mode = AT91_SMC_DBW_8;
+        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
+
+        /* enable pin */
+        if (data->enable_pin)
+                at91_set_gpio_output(data->enable_pin, 1);
+
+        /* ready/busy pin */
+        if (data->rdy_pin)
+                at91_set_gpio_input(data->rdy_pin, 1);
+
+        /* card detect pin */
+        if (data->det_pin)
+                at91_set_gpio_input(data->det_pin, 1);
+
+        nand_data = *data;
+        platform_device_register(&at91sam9260_nand_device);
+}
+#else
+void __init at91_add_device_nand(struct at91_nand_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  TWI (i2c)
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
+
+static struct resource twi_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_TWI,
+                .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_TWI,
+                .end    = AT91SAM9260_ID_TWI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_twi_device = {
+        .name           = "at91_i2c",
+        .id             = -1,
+        .resource       = twi_resources,
+        .num_resources  = ARRAY_SIZE(twi_resources),
+};
+
+void __init at91_add_device_i2c(void)
+{
+        /* pins used for TWI interface */
+        at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
+        at91_set_multi_drive(AT91_PIN_PA23, 1);
+
+        at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
+        at91_set_multi_drive(AT91_PIN_PA24, 1);
+
+        platform_device_register(&at91sam9260_twi_device);
+}
+#else
+void __init at91_add_device_i2c(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SPI
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
+static u64 spi_dmamask = 0xffffffffUL;
+
+static struct resource spi0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_SPI0,
+                .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_SPI0,
+                .end    = AT91SAM9260_ID_SPI0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_spi0_device = {
+        .name           = "atmel_spi",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+        },
+        .resource       = spi0_resources,
+        .num_resources  = ARRAY_SIZE(spi0_resources),
+};
+
+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
+
+static struct resource spi1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_SPI1,
+                .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_SPI1,
+                .end    = AT91SAM9260_ID_SPI1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_spi1_device = {
+        .name           = "atmel_spi",
+        .id             = 1,
+        .dev            = {
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+        },
+        .resource       = spi1_resources,
+        .num_resources  = ARRAY_SIZE(spi1_resources),
+};
+
+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
+
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
+{
+        int i;
+        unsigned long cs_pin;
+        short enable_spi0 = 0;
+        short enable_spi1 = 0;
+
+        /* Choose SPI chip-selects */
+        for (i = 0; i < nr_devices; i++) {
+                if (devices[i].controller_data)
+                        cs_pin = (unsigned long) devices[i].controller_data;
+                else if (devices[i].bus_num == 0)
+                        cs_pin = spi0_standard_cs[devices[i].chip_select];
+                else
+                        cs_pin = spi1_standard_cs[devices[i].chip_select];
+
+                if (devices[i].bus_num == 0)
+                        enable_spi0 = 1;
+                else
+                        enable_spi1 = 1;
+
+                /* enable chip-select pin */
+                at91_set_gpio_output(cs_pin, 1);
+
+                /* pass chip-select pin to driver */
+                devices[i].controller_data = (void *) cs_pin;
+        }
+
+        spi_register_board_info(devices, nr_devices);
+
+        /* Configure SPI bus(es) */
+        if (enable_spi0) {
+                at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
+                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
+                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
+
+                at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
+                platform_device_register(&at91sam9260_spi0_device);
+        }
+        if (enable_spi1) {
+                at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
+                at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
+                at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
+
+                at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
+                platform_device_register(&at91sam9260_spi1_device);
+        }
+}
+#else
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  LEDs
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_LEDS)
+u8 at91_leds_cpu;
+u8 at91_leds_timer;
+
+void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+{
+        at91_leds_cpu   = cpu_led;
+        at91_leds_timer = timer_led;
+}
+#else
+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  UART
+ * -------------------------------------------------------------------- */
+#if defined(CONFIG_SERIAL_ATMEL)
+static struct resource dbgu_resources[] = {
+        [0] = {
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data dbgu_data = {
+        .use_dma_tx     = 0,
+        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
+};
+
+static struct platform_device at91sam9260_dbgu_device = {
+        .name           = "atmel_usart",
+        .id             = 0,
+        .dev            = {
+                                .platform_data  = &dbgu_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = dbgu_resources,
+        .num_resources  = ARRAY_SIZE(dbgu_resources),
+};
+
+static inline void configure_dbgu_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
+        at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
+}
+
+static struct resource uart0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_US0,
+                .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_US0,
+                .end    = AT91SAM9260_ID_US0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart0_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9260_uart0_device = {
+        .name           = "atmel_usart",
+        .id             = 1,
+        .dev            = {
+                                .platform_data  = &uart0_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart0_resources,
+        .num_resources  = ARRAY_SIZE(uart0_resources),
+};
+
+static inline void configure_usart0_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
+        at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
+        at91_set_A_periph(AT91_PIN_PB26, 0);            /* RTS0 */
+        at91_set_A_periph(AT91_PIN_PB27, 0);            /* CTS0 */
+        at91_set_A_periph(AT91_PIN_PB24, 0);            /* DTR0 */
+        at91_set_A_periph(AT91_PIN_PB22, 0);            /* DSR0 */
+        at91_set_A_periph(AT91_PIN_PB23, 0);            /* DCD0 */
+        at91_set_A_periph(AT91_PIN_PB25, 0);            /* RI0 */
+}
+
+static struct resource uart1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_US1,
+                .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_US1,
+                .end    = AT91SAM9260_ID_US1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart1_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9260_uart1_device = {
+        .name           = "atmel_usart",
+        .id             = 2,
+        .dev            = {
+                                .platform_data  = &uart1_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart1_resources,
+        .num_resources  = ARRAY_SIZE(uart1_resources),
+};
+
+static inline void configure_usart1_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
+        at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
+        at91_set_A_periph(AT91_PIN_PB28, 0);            /* RTS1 */
+        at91_set_A_periph(AT91_PIN_PB29, 0);            /* CTS1 */
+}
+
+static struct resource uart2_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_US2,
+                .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_US2,
+                .end    = AT91SAM9260_ID_US2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart2_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9260_uart2_device = {
+        .name           = "atmel_usart",
+        .id             = 3,
+        .dev            = {
+                                .platform_data  = &uart2_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart2_resources,
+        .num_resources  = ARRAY_SIZE(uart2_resources),
+};
+
+static inline void configure_usart2_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
+        at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
+}
+
+static struct resource uart3_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_US3,
+                .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_US3,
+                .end    = AT91SAM9260_ID_US3,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart3_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9260_uart3_device = {
+        .name           = "atmel_usart",
+        .id             = 4,
+        .dev            = {
+                                .platform_data  = &uart3_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart3_resources,
+        .num_resources  = ARRAY_SIZE(uart3_resources),
+};
+
+static inline void configure_usart3_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
+        at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
+}
+
+static struct resource uart4_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_US4,
+                .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_US4,
+                .end    = AT91SAM9260_ID_US4,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart4_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9260_uart4_device = {
+        .name           = "atmel_usart",
+        .id             = 5,
+        .dev            = {
+                                .platform_data  = &uart4_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart4_resources,
+        .num_resources  = ARRAY_SIZE(uart4_resources),
+};
+
+static inline void configure_usart4_pins(void)
+{
+        at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
+        at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
+}
+
+static struct resource uart5_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_US5,
+                .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_US5,
+                .end    = AT91SAM9260_ID_US5,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart5_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9260_uart5_device = {
+        .name           = "atmel_usart",
+        .id             = 6,
+        .dev            = {
+                                .platform_data  = &uart5_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart5_resources,
+        .num_resources  = ARRAY_SIZE(uart5_resources),
+};
+
+static inline void configure_usart5_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
+        at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
+}
+
+struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
+
+void __init at91_init_serial(struct at91_uart_config *config)
+{
+        int i;
+
+        /* Fill in list of supported UARTs */
+        for (i = 0; i < config->nr_tty; i++) {
+                switch (config->tty_map[i]) {
+                        case 0:
+                                configure_usart0_pins();
+                                at91_uarts[i] = &at91sam9260_uart0_device;
+                                at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
+                                break;
+                        case 1:
+                                configure_usart1_pins();
+                                at91_uarts[i] = &at91sam9260_uart1_device;
+                                at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
+                                break;
+                        case 2:
+                                configure_usart2_pins();
+                                at91_uarts[i] = &at91sam9260_uart2_device;
+                                at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
+                                break;
+                        case 3:
+                                configure_usart3_pins();
+                                at91_uarts[i] = &at91sam9260_uart3_device;
+                                at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
+                                break;
+                        case 4:
+                                configure_usart4_pins();
+                                at91_uarts[i] = &at91sam9260_uart4_device;
+                                at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
+                                break;
+                        case 5:
+                                configure_usart5_pins();
+                                at91_uarts[i] = &at91sam9260_uart5_device;
+                                at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
+                                break;
+                        case 6:
+                                configure_dbgu_pins();
+                                at91_uarts[i] = &at91sam9260_dbgu_device;
+                                at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
+                                break;
+                        default:
+                                continue;
+                }
+                at91_uarts[i]->id = i;          /* update ID number to mapped ID */
+        }
+
+        /* Set serial console device */
+        if (config->console_tty < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[config->console_tty];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
+void __init at91_add_device_serial(void)
+{
+        int i;
+
+        for (i = 0; i < ATMEL_MAX_UART; i++) {
+                if (at91_uarts[i])
+                        platform_device_register(at91_uarts[i]);
+        }
+}
+#else
+void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_add_device_serial(void) {}
+#endif
+
+
+/* -------------------------------------------------------------------- */
+/*
+ * These devices are always present and don't need any board-specific
+ * setup.
+ */
+static int __init at91_add_standard_devices(void)
+{
+        return 0;
+}
+
+arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91rm9200/at91sam9261.c
new file mode 100644
index 000000000000..5a82f35da2e9
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261.c
@@ -0,0 +1,289 @@
+/*
+ * arch/arm/mach-at91rm9200/at91sam9261.c
+ *
+ *  Copyright (C) 2005 SAN People
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91_pmc.h>
+
+#include "generic.h"
+#include "clock.h"
+
+static struct map_desc at91sam9261_io_desc[] __initdata = {
+        {
+                .virtual        = AT91_VA_BASE_SYS,
+                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
+                .pfn            = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
+                .length         = AT91SAM9261_SRAM_SIZE,
+                .type           = MT_DEVICE,
+        },
+};
+
+/* --------------------------------------------------------------------
+ *  Clocks
+ * -------------------------------------------------------------------- */
+
+/*
+ * The peripheral clocks.
+ */
+static struct clk pioA_clk = {
+        .name           = "pioA_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_PIOA,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioB_clk = {
+        .name           = "pioB_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_PIOB,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioC_clk = {
+        .name           = "pioC_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_PIOC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart0_clk = {
+        .name           = "usart0_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_US0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart1_clk = {
+        .name           = "usart1_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_US1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart2_clk = {
+        .name           = "usart2_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_US2,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc_clk = {
+        .name           = "mci_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_MCI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk udc_clk = {
+        .name           = "udc_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_UDP,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi_clk = {
+        .name           = "twi_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_TWI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi0_clk = {
+        .name           = "spi0_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_SPI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi1_clk = {
+        .name           = "spi1_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ohci_clk = {
+        .name           = "ohci_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk lcdc_clk = {
+        .name           = "lcdc_clk",
+        .pmc_mask       = 1 << AT91SAM9261_ID_LCDC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+
+static struct clk *periph_clocks[] __initdata = {
+        &pioA_clk,
+        &pioB_clk,
+        &pioC_clk,
+        &usart0_clk,
+        &usart1_clk,
+        &usart2_clk,
+        &mmc_clk,
+        &udc_clk,
+        &twi_clk,
+        &spi0_clk,
+        &spi1_clk,
+        // ssc 0 .. ssc2
+        // tc0 .. tc2
+        &ohci_clk,
+        &lcdc_clk,
+        // irq0 .. irq2
+};
+
+/*
+ * The four programmable clocks.
+ * You must configure pin multiplexing to bring these signals out.
+ */
+static struct clk pck0 = {
+        .name           = "pck0",
+        .pmc_mask       = AT91_PMC_PCK0,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 0,
+};
+static struct clk pck1 = {
+        .name           = "pck1",
+        .pmc_mask       = AT91_PMC_PCK1,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 1,
+};
+static struct clk pck2 = {
+        .name           = "pck2",
+        .pmc_mask       = AT91_PMC_PCK2,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 2,
+};
+static struct clk pck3 = {
+        .name           = "pck3",
+        .pmc_mask       = AT91_PMC_PCK3,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 3,
+};
+
+/* HClocks */
+static struct clk hck0 = {
+        .name           = "hck0",
+        .pmc_mask       = AT91_PMC_HCK0,
+        .type           = CLK_TYPE_SYSTEM,
+        .id             = 0,
+};
+static struct clk hck1 = {
+        .name           = "hck1",
+        .pmc_mask       = AT91_PMC_HCK1,
+        .type           = CLK_TYPE_SYSTEM,
+        .id             = 1,
+};
+
+static void __init at91sam9261_register_clocks(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
+                clk_register(periph_clocks[i]);
+
+        clk_register(&pck0);
+        clk_register(&pck1);
+        clk_register(&pck2);
+        clk_register(&pck3);
+
+        clk_register(&hck0);
+        clk_register(&hck1);
+}
+
+/* --------------------------------------------------------------------
+ *  GPIO
+ * -------------------------------------------------------------------- */
+
+static struct at91_gpio_bank at91sam9261_gpio[] = {
+        {
+                .id             = AT91SAM9261_ID_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
+        }, {
+                .id             = AT91SAM9261_ID_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
+        }, {
+                .id             = AT91SAM9261_ID_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
+        }
+};
+
+static void at91sam9261_reset(void)
+{
+#warning "Implement CPU reset"
+}
+
+
+/* --------------------------------------------------------------------
+ *  AT91SAM9261 processor initialization
+ * -------------------------------------------------------------------- */
+
+void __init at91sam9261_initialize(unsigned long main_clock)
+{
+        /* Map peripherals */
+        iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
+
+        at91_arch_reset = at91sam9261_reset;
+        at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
+                        | (1 << AT91SAM9261_ID_IRQ2);
+
+        /* Init clock subsystem */
+        at91_clock_init(main_clock);
+
+        /* Register the processor-specific clocks */
+        at91sam9261_register_clocks();
+
+        /* Register GPIO subsystem */
+        at91_gpio_init(at91sam9261_gpio, 3);
+}
+
+/* --------------------------------------------------------------------
+ *  Interrupt initialization
+ * -------------------------------------------------------------------- */
+
+/*
+ * The default interrupt priority levels (0 = lowest, 7 = highest).
+ */
+static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
+        7,      /* Advanced Interrupt Controller */
+        7,      /* System Peripherals */
+        0,      /* Parallel IO Controller A */
+        0,      /* Parallel IO Controller B */
+        0,      /* Parallel IO Controller C */
+        0,
+        6,      /* USART 0 */
+        6,      /* USART 1 */
+        6,      /* USART 2 */
+        0,      /* Multimedia Card Interface */
+        4,      /* USB Device Port */
+        0,      /* Two-Wire Interface */
+        6,      /* Serial Peripheral Interface 0 */
+        6,      /* Serial Peripheral Interface 1 */
+        5,      /* Serial Synchronous Controller 0 */
+        5,      /* Serial Synchronous Controller 1 */
+        5,      /* Serial Synchronous Controller 2 */
+        0,      /* Timer Counter 0 */
+        0,      /* Timer Counter 1 */
+        0,      /* Timer Counter 2 */
+        3,      /* USB Host port */
+        3,      /* LCD Controller */
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,      /* Advanced Interrupt Controller */
+        0,      /* Advanced Interrupt Controller */
+        0,      /* Advanced Interrupt Controller */
+};
+
+void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
+{
+        if (!priority)
+                priority = at91sam9261_default_irq_priority;
+
+        /* Initialize the AIC interrupt controller */
+        at91_aic_init(priority);
+
+        /* Enable GPIO interrupts */
+        at91_gpio_irq_setup();
+}
diff --git a/arch/arm/mach-at91rm9200/at91sam9261_devices.c b/arch/arm/mach-at91rm9200/at91sam9261_devices.c
new file mode 100644
index 000000000000..ed1d79081b35
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261_devices.c
@@ -0,0 +1,741 @@
+/*
+ * arch/arm/mach-at91rm9200/at91sam9261_devices.c
+ *
+ *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
+ *  Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <linux/platform_device.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91sam9261_matrix.h>
+#include <asm/arch/at91sam926x_mc.h>
+
+#include "generic.h"
+
+#define SZ_512  0x00000200
+#define SZ_256  0x00000100
+#define SZ_16   0x00000010
+
+/* --------------------------------------------------------------------
+ *  USB Host
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static u64 ohci_dmamask = 0xffffffffUL;
+static struct at91_usbh_data usbh_data;
+
+static struct resource usbh_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_UHP_BASE,
+                .end    = AT91SAM9261_UHP_BASE + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_UHP,
+                .end    = AT91SAM9261_ID_UHP,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_usbh_device = {
+        .name           = "at91_ohci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &ohci_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+                                .platform_data          = &usbh_data,
+        },
+        .resource       = usbh_resources,
+        .num_resources  = ARRAY_SIZE(usbh_resources),
+};
+
+void __init at91_add_device_usbh(struct at91_usbh_data *data)
+{
+        if (!data)
+                return;
+
+        usbh_data = *data;
+        platform_device_register(&at91sam9261_usbh_device);
+}
+#else
+void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  USB Device (Gadget)
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_USB_GADGET_AT91
+static struct at91_udc_data udc_data;
+
+static struct resource udc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_UDP,
+                .end    = AT91SAM9261_BASE_UDP + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_UDP,
+                .end    = AT91SAM9261_ID_UDP,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_udc_device = {
+        .name           = "at91_udc",
+        .id             = -1,
+        .dev            = {
+                                .platform_data          = &udc_data,
+        },
+        .resource       = udc_resources,
+        .num_resources  = ARRAY_SIZE(udc_resources),
+};
+
+void __init at91_add_device_udc(struct at91_udc_data *data)
+{
+        unsigned long x;
+
+        if (!data)
+                return;
+
+        if (data->vbus_pin) {
+                at91_set_gpio_input(data->vbus_pin, 0);
+                at91_set_deglitch(data->vbus_pin, 1);
+        }
+
+        /* Pullup pin is handled internally */
+        x = at91_sys_read(AT91_MATRIX_USBPUCR);
+        at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
+
+        udc_data = *data;
+        platform_device_register(&at91sam9261_udc_device);
+}
+#else
+void __init at91_add_device_udc(struct at91_udc_data *data) {}
+#endif
+
+/* --------------------------------------------------------------------
+ *  MMC / SD
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
+static u64 mmc_dmamask = 0xffffffffUL;
+static struct at91_mmc_data mmc_data;
+
+static struct resource mmc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_MCI,
+                .end    = AT91SAM9261_BASE_MCI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_MCI,
+                .end    = AT91SAM9261_ID_MCI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_mmc_device = {
+        .name           = "at91_mci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &mmc_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+                                .platform_data          = &mmc_data,
+        },
+        .resource       = mmc_resources,
+        .num_resources  = ARRAY_SIZE(mmc_resources),
+};
+
+void __init at91_add_device_mmc(struct at91_mmc_data *data)
+{
+        if (!data)
+                return;
+
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        /* CLK */
+        at91_set_B_periph(AT91_PIN_PA2, 0);
+
+        /* CMD */
+        at91_set_B_periph(AT91_PIN_PA1, 1);
+
+        /* DAT0, maybe DAT1..DAT3 */
+        at91_set_B_periph(AT91_PIN_PA0, 1);
+        if (data->wire4) {
+                at91_set_B_periph(AT91_PIN_PA4, 1);
+                at91_set_B_periph(AT91_PIN_PA5, 1);
+                at91_set_B_periph(AT91_PIN_PA6, 1);
+        }
+
+        mmc_data = *data;
+        platform_device_register(&at91sam9261_mmc_device);
+}
+#else
+void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  NAND / SmartMedia
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
+static struct at91_nand_data nand_data;
+
+#define NAND_BASE       AT91_CHIPSELECT_3
+
+static struct resource nand_resources[] = {
+        {
+                .start  = NAND_BASE,
+                .end    = NAND_BASE + SZ_256M - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91_nand_device = {
+        .name           = "at91_nand",
+        .id             = -1,
+        .dev            = {
+                                .platform_data  = &nand_data,
+        },
+        .resource       = nand_resources,
+        .num_resources  = ARRAY_SIZE(nand_resources),
+};
+
+void __init at91_add_device_nand(struct at91_nand_data *data)
+{
+        unsigned long csa, mode;
+
+        if (!data)
+                return;
+
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
+
+        /* set the bus interface characteristics */
+        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
+                        | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+
+        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
+                        | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+
+        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+
+        if (data->bus_width_16)
+                mode = AT91_SMC_DBW_16;
+        else
+                mode = AT91_SMC_DBW_8;
+        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
+
+        /* enable pin */
+        if (data->enable_pin)
+                at91_set_gpio_output(data->enable_pin, 1);
+
+        /* ready/busy pin */
+        if (data->rdy_pin)
+                at91_set_gpio_input(data->rdy_pin, 1);
+
+        /* card detect pin */
+        if (data->det_pin)
+                at91_set_gpio_input(data->det_pin, 1);
+
+        at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
+        at91_set_A_periph(AT91_PIN_PC1, 0);             /* NANDWE */
+
+        nand_data = *data;
+        platform_device_register(&at91_nand_device);
+}
+
+#else
+void __init at91_add_device_nand(struct at91_nand_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  TWI (i2c)
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
+
+static struct resource twi_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_TWI,
+                .end    = AT91SAM9261_BASE_TWI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_TWI,
+                .end    = AT91SAM9261_ID_TWI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_twi_device = {
+        .name           = "at91_i2c",
+        .id             = -1,
+        .resource       = twi_resources,
+        .num_resources  = ARRAY_SIZE(twi_resources),
+};
+
+void __init at91_add_device_i2c(void)
+{
+        /* pins used for TWI interface */
+        at91_set_A_periph(AT91_PIN_PA7, 0);             /* TWD */
+        at91_set_multi_drive(AT91_PIN_PA7, 1);
+
+        at91_set_A_periph(AT91_PIN_PA8, 0);             /* TWCK */
+        at91_set_multi_drive(AT91_PIN_PA8, 1);
+
+        platform_device_register(&at91sam9261_twi_device);
+}
+#else
+void __init at91_add_device_i2c(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SPI
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
+static u64 spi_dmamask = 0xffffffffUL;
+
+static struct resource spi0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_SPI0,
+                .end    = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_SPI0,
+                .end    = AT91SAM9261_ID_SPI0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_spi0_device = {
+        .name           = "atmel_spi",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+        },
+        .resource       = spi0_resources,
+        .num_resources  = ARRAY_SIZE(spi0_resources),
+};
+
+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
+
+static struct resource spi1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_SPI1,
+                .end    = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_SPI1,
+                .end    = AT91SAM9261_ID_SPI1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_spi1_device = {
+        .name           = "atmel_spi",
+        .id             = 1,
+        .dev            = {
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+        },
+        .resource       = spi1_resources,
+        .num_resources  = ARRAY_SIZE(spi1_resources),
+};
+
+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
+
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
+{
+        int i;
+        unsigned long cs_pin;
+        short enable_spi0 = 0;
+        short enable_spi1 = 0;
+
+        /* Choose SPI chip-selects */
+        for (i = 0; i < nr_devices; i++) {
+                if (devices[i].controller_data)
+                        cs_pin = (unsigned long) devices[i].controller_data;
+                else if (devices[i].bus_num == 0)
+                        cs_pin = spi0_standard_cs[devices[i].chip_select];
+                else
+                        cs_pin = spi1_standard_cs[devices[i].chip_select];
+
+                if (devices[i].bus_num == 0)
+                        enable_spi0 = 1;
+                else
+                        enable_spi1 = 1;
+
+                /* enable chip-select pin */
+                at91_set_gpio_output(cs_pin, 1);
+
+                /* pass chip-select pin to driver */
+                devices[i].controller_data = (void *) cs_pin;
+        }
+
+        spi_register_board_info(devices, nr_devices);
+
+        /* Configure SPI bus(es) */
+        if (enable_spi0) {
+                at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
+                at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
+                at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
+
+                at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
+                platform_device_register(&at91sam9261_spi0_device);
+        }
+        if (enable_spi1) {
+                at91_set_A_periph(AT91_PIN_PB30, 0);    /* SPI1_MISO */
+                at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
+                at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
+
+                at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
+                platform_device_register(&at91sam9261_spi1_device);
+        }
+}
+#else
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  LCD Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
+static u64 lcdc_dmamask = 0xffffffffUL;
+static struct at91fb_info lcdc_data;
+
+static struct resource lcdc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_LCDC_BASE,
+                .end    = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_LCDC,
+                .end    = AT91SAM9261_ID_LCDC,
+                .flags  = IORESOURCE_IRQ,
+        },
+#if defined(CONFIG_FB_INTSRAM)
+        [2] = {
+                .start  = AT91SAM9261_SRAM_BASE,
+                .end    = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+#endif
+};
+
+static struct platform_device at91_lcdc_device = {
+        .name           = "at91-fb",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &lcdc_dmamask,
+                                .coherent_dma_mask      = 0xffffffff,
+                                .platform_data          = &lcdc_data,
+        },
+        .resource       = lcdc_resources,
+        .num_resources  = ARRAY_SIZE(lcdc_resources),
+};
+
+void __init at91_add_device_lcdc(struct at91fb_info *data)
+{
+        if (!data) {
+                return;
+        }
+
+        at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
+        at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
+        at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
+        at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
+        at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
+        at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
+        at91_set_A_periph(AT91_PIN_PB9, 0);     /* LCDD4 */
+        at91_set_A_periph(AT91_PIN_PB10, 0);    /* LCDD5 */
+        at91_set_A_periph(AT91_PIN_PB11, 0);    /* LCDD6 */
+        at91_set_A_periph(AT91_PIN_PB12, 0);    /* LCDD7 */
+        at91_set_A_periph(AT91_PIN_PB15, 0);    /* LCDD10 */
+        at91_set_A_periph(AT91_PIN_PB16, 0);    /* LCDD11 */
+        at91_set_A_periph(AT91_PIN_PB17, 0);    /* LCDD12 */
+        at91_set_A_periph(AT91_PIN_PB18, 0);    /* LCDD13 */
+        at91_set_A_periph(AT91_PIN_PB19, 0);    /* LCDD14 */
+        at91_set_A_periph(AT91_PIN_PB20, 0);    /* LCDD15 */
+        at91_set_B_periph(AT91_PIN_PB23, 0);    /* LCDD18 */
+        at91_set_B_periph(AT91_PIN_PB24, 0);    /* LCDD19 */
+        at91_set_B_periph(AT91_PIN_PB25, 0);    /* LCDD20 */
+        at91_set_B_periph(AT91_PIN_PB26, 0);    /* LCDD21 */
+        at91_set_B_periph(AT91_PIN_PB27, 0);    /* LCDD22 */
+        at91_set_B_periph(AT91_PIN_PB28, 0);    /* LCDD23 */
+
+        lcdc_data = *data;
+        platform_device_register(&at91_lcdc_device);
+}
+#else
+void __init at91_add_device_lcdc(struct at91fb_info *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  LEDs
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_LEDS)
+u8 at91_leds_cpu;
+u8 at91_leds_timer;
+
+void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+{
+        at91_leds_cpu   = cpu_led;
+        at91_leds_timer = timer_led;
+}
+#else
+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  UART
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SERIAL_ATMEL)
+static struct resource dbgu_resources[] = {
+        [0] = {
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data dbgu_data = {
+        .use_dma_tx     = 0,
+        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
+};
+
+static struct platform_device at91sam9261_dbgu_device = {
+        .name           = "atmel_usart",
+        .id             = 0,
+        .dev            = {
+                                .platform_data  = &dbgu_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = dbgu_resources,
+        .num_resources  = ARRAY_SIZE(dbgu_resources),
+};
+
+static inline void configure_dbgu_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PA9, 0);             /* DRXD */
+        at91_set_A_periph(AT91_PIN_PA10, 1);            /* DTXD */
+}
+
+static struct resource uart0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_US0,
+                .end    = AT91SAM9261_BASE_US0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_US0,
+                .end    = AT91SAM9261_ID_US0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart0_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9261_uart0_device = {
+        .name           = "atmel_usart",
+        .id             = 1,
+        .dev            = {
+                                .platform_data  = &uart0_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart0_resources,
+        .num_resources  = ARRAY_SIZE(uart0_resources),
+};
+
+static inline void configure_usart0_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
+        at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
+        at91_set_A_periph(AT91_PIN_PC10, 0);            /* RTS0 */
+        at91_set_A_periph(AT91_PIN_PC11, 0);            /* CTS0 */
+}
+
+static struct resource uart1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_US1,
+                .end    = AT91SAM9261_BASE_US1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_US1,
+                .end    = AT91SAM9261_ID_US1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart1_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9261_uart1_device = {
+        .name           = "atmel_usart",
+        .id             = 2,
+        .dev            = {
+                                .platform_data  = &uart1_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart1_resources,
+        .num_resources  = ARRAY_SIZE(uart1_resources),
+};
+
+static inline void configure_usart1_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
+        at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
+}
+
+static struct resource uart2_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_US2,
+                .end    = AT91SAM9261_BASE_US2 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_US2,
+                .end    = AT91SAM9261_ID_US2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart2_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static struct platform_device at91sam9261_uart2_device = {
+        .name           = "atmel_usart",
+        .id             = 3,
+        .dev            = {
+                                .platform_data  = &uart2_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart2_resources,
+        .num_resources  = ARRAY_SIZE(uart2_resources),
+};
+
+static inline void configure_usart2_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
+        at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
+}
+
+struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
+
+void __init at91_init_serial(struct at91_uart_config *config)
+{
+        int i;
+
+        /* Fill in list of supported UARTs */
+        for (i = 0; i < config->nr_tty; i++) {
+                switch (config->tty_map[i]) {
+                        case 0:
+                                configure_usart0_pins();
+                                at91_uarts[i] = &at91sam9261_uart0_device;
+                                at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
+                                break;
+                        case 1:
+                                configure_usart1_pins();
+                                at91_uarts[i] = &at91sam9261_uart1_device;
+                                at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
+                                break;
+                        case 2:
+                                configure_usart2_pins();
+                                at91_uarts[i] = &at91sam9261_uart2_device;
+                                at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
+                                break;
+                        case 3:
+                                configure_dbgu_pins();
+                                at91_uarts[i] = &at91sam9261_dbgu_device;
+                                at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
+                                break;
+                        default:
+                                continue;
+                }
+                at91_uarts[i]->id = i;          /* update ID number to mapped ID */
+        }
+
+        /* Set serial console device */
+        if (config->console_tty < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[config->console_tty];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
+void __init at91_add_device_serial(void)
+{
+        int i;
+
+        for (i = 0; i < ATMEL_MAX_UART; i++) {
+                if (at91_uarts[i])
+                        platform_device_register(at91_uarts[i]);
+        }
+}
+#else
+void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_add_device_serial(void) {}
+#endif
+
+
+/* -------------------------------------------------------------------- */
+
+/*
+ * These devices are always present and don't need any board-specific
+ * setup.
+ */
+static int __init at91_add_standard_devices(void)
+{
+        return 0;
+}
+
+arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam926x_time.c b/arch/arm/mach-at91rm9200/at91sam926x_time.c
new file mode 100644
index 000000000000..99df5f6ee42e
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam926x_time.c
@@ -0,0 +1,114 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c
+ *
+ * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
+ * Revision      2005 M. Nicolas Diremdjian, ATMEL Rousset, France
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/time.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/mach/time.h>
+
+#include <asm/arch/at91_pit.h>
+
+
+#define PIT_CPIV(x)     ((x) & AT91_PIT_CPIV)
+#define PIT_PICNT(x)    (((x) & AT91_PIT_PICNT) >> 20)
+
+/*
+ * Returns number of microseconds since last timer interrupt.  Note that interrupts
+ * will have been disabled by do_gettimeofday()
+ *  'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+ *  'tick' is usecs per jiffy (linux/timex.h).
+ */
+static unsigned long at91sam926x_gettimeoffset(void)
+{
+        unsigned long elapsed;
+        unsigned long t = at91_sys_read(AT91_PIT_PIIR);
+
+        elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t);         /* hardware clock cycles */
+
+        return (unsigned long)(elapsed * 1000000) / LATCH;
+}
+
+/*
+ * IRQ handler for the timer.
+ */
+static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
+{
+        volatile long nr_ticks;
+
+        if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) {       /* This is a shared interrupt */
+                write_seqlock(&xtime_lock);
+
+                /* Get number to ticks performed before interrupt and clear PIT interrupt */
+                nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
+                do {
+                        timer_tick();
+                        nr_ticks--;
+                } while (nr_ticks);
+
+                write_sequnlock(&xtime_lock);
+                return IRQ_HANDLED;
+        } else
+                return IRQ_NONE;                /* not handled */
+}
+
+static struct irqaction at91sam926x_timer_irq = {
+        .name           = "at91_tick",
+        .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,
+        .handler        = at91sam926x_timer_interrupt
+};
+
+void at91sam926x_timer_reset(void)
+{
+        /* Disable timer */
+        at91_sys_write(AT91_PIT_MR, 0);
+
+        /* Clear any pending interrupts */
+        (void) at91_sys_read(AT91_PIT_PIVR);
+
+        /* Set Period Interval timer and enable its interrupt */
+        at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
+}
+
+/*
+ * Set up timer interrupt.
+ */
+void __init at91sam926x_timer_init(void)
+{
+        /* Initialize and enable the timer */
+        at91sam926x_timer_reset();
+
+        /* Make IRQs happen for the system timer. */
+        setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
+}
+
+#ifdef CONFIG_PM
+static void at91sam926x_timer_suspend(void)
+{
+        /* Disable timer */
+        at91_sys_write(AT91_PIT_MR, 0);
+}
+#else
+#define at91sam926x_timer_suspend       NULL
+#endif
+
+struct sys_timer at91sam926x_timer = {
+        .init           = at91sam926x_timer_init,
+        .offset         = at91sam926x_gettimeoffset,
+        .suspend        = at91sam926x_timer_suspend,
+        .resume         = at91sam926x_timer_reset,
+};
+
diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c
index 98208740e7c5..654f0379550a 100644
--- a/arch/arm/mach-at91rm9200/board-carmeva.c
+++ b/arch/arm/mach-at91rm9200/board-carmeva.c
@@ -65,7 +65,6 @@ static void __init carmeva_init_irq(void)
         at91rm9200_init_interrupts(NULL);
 }
 
-
 static struct at91_eth_data __initdata carmeva_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
@@ -89,8 +88,33 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
 // };
 
 static struct at91_mmc_data __initdata carmeva_mmc_data = {
-        .is_b           = 0,
+        .slot_b         = 0,
         .wire4          = 1,
+        .det_pin        = AT91_PIN_PB10,
+        .wp_pin         = AT91_PIN_PC14,
+};
+
+static struct spi_board_info carmeva_spi_devices[] = {
+        { /* DataFlash chip */
+                .modalias = "mtd_dataflash",
+                .chip_select  = 0,
+                .max_speed_hz = 10 * 1000 * 1000,
+        },
+        { /* User accessable spi - cs1 (250KHz) */
+                .modalias = "spi-cs1",
+                .chip_select  = 1,
+                .max_speed_hz = 250 *  1000,
+        },
+        { /* User accessable spi - cs2 (1MHz) */
+                .modalias = "spi-cs2",
+                .chip_select  = 2,
+                .max_speed_hz = 1 * 1000 *  1000,
+        },
+        { /* User accessable spi - cs3 (10MHz) */
+                .modalias = "spi-cs3",
+                .chip_select  = 3,
+                .max_speed_hz = 10 * 1000 *  1000,
+        },
 };
 
 static void __init carmeva_board_init(void)
@@ -105,10 +129,10 @@ static void __init carmeva_board_init(void)
         at91_add_device_udc(&carmeva_udc_data);
         /* I2C */
         at91_add_device_i2c();
+        /* SPI */
+        at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices));
         /* Compact Flash */
 //      at91_add_device_cf(&carmeva_cf_data);
-        /* SPI */
-//      at91_add_device_spi(NULL, 0);
         /* MMC */
         at91_add_device_mmc(&carmeva_mmc_data);
 }
diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c
index 8eeae491ce71..b8bb8052607a 100644
--- a/arch/arm/mach-at91rm9200/board-csb337.c
+++ b/arch/arm/mach-at91rm9200/board-csb337.c
@@ -99,7 +99,7 @@ static struct at91_cf_data __initdata csb337_cf_data = {
 
 static struct at91_mmc_data __initdata csb337_mmc_data = {
         .det_pin        = AT91_PIN_PD5,
-        .is_b           = 0,
+        .slot_b         = 0,
         .wire4          = 1,
         .wp_pin         = AT91_PIN_PD6,
 };
diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c
index c699f3984d4b..7522bf91bce8 100644
--- a/arch/arm/mach-at91rm9200/board-dk.c
+++ b/arch/arm/mach-at91rm9200/board-dk.c
@@ -27,6 +27,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
+#include <linux/mtd/physmap.h>
 
 #include <asm/hardware.h>
 #include <asm/setup.h>
@@ -39,6 +40,7 @@
 
 #include <asm/arch/board.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/at91rm9200_mc.h>
 
 #include "generic.h"
 
@@ -93,7 +95,7 @@ static struct at91_cf_data __initdata dk_cf_data = {
 };
 
 static struct at91_mmc_data __initdata dk_mmc_data = {
-        .is_b           = 0,
+        .slot_b         = 0,
         .wire4          = 1,
 };
 
@@ -145,6 +147,30 @@ static struct at91_nand_data __initdata dk_nand_data = {
         .partition_info = nand_partitions,
 };
 
+#define DK_FLASH_BASE   AT91_CHIPSELECT_0
+#define DK_FLASH_SIZE   0x200000
+
+static struct physmap_flash_data dk_flash_data = {
+        .width  = 2,
+};
+
+static struct resource dk_flash_resource = {
+        .start          = DK_FLASH_BASE,
+        .end            = DK_FLASH_BASE + DK_FLASH_SIZE - 1,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device dk_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                                .platform_data  = &dk_flash_data,
+                        },
+        .resource       = &dk_flash_resource,
+        .num_resources  = 1,
+};
+
+
 static void __init dk_board_init(void)
 {
         /* Serial */
@@ -172,6 +198,8 @@ static void __init dk_board_init(void)
 #endif
         /* NAND */
         at91_add_device_nand(&dk_nand_data);
+        /* NOR Flash */
+        platform_device_register(&dk_flash);
         /* VGA */
 //      dk_add_device_video();
 }
diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c
index 65e867ba2df3..80b72cf7264c 100644
--- a/arch/arm/mach-at91rm9200/board-eb9200.c
+++ b/arch/arm/mach-at91rm9200/board-eb9200.c
@@ -87,7 +87,7 @@ static struct at91_cf_data __initdata eb9200_cf_data = {
 };
 
 static struct at91_mmc_data __initdata eb9200_mmc_data = {
-        .is_b           = 0,
+        .slot_b         = 0,
         .wire4          = 1,
 };
 
diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c
index 830eb7932178..c4fdb415f20e 100644
--- a/arch/arm/mach-at91rm9200/board-ek.c
+++ b/arch/arm/mach-at91rm9200/board-ek.c
@@ -27,6 +27,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
+#include <linux/mtd/physmap.h>
 
 #include <asm/hardware.h>
 #include <asm/setup.h>
@@ -39,6 +40,7 @@
 
 #include <asm/arch/board.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/at91rm9200_mc.h>
 
 #include "generic.h"
 
@@ -87,7 +89,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
 
 static struct at91_mmc_data __initdata ek_mmc_data = {
         .det_pin        = AT91_PIN_PB27,
-        .is_b           = 0,
+        .slot_b         = 0,
         .wire4          = 1,
         .wp_pin         = AT91_PIN_PA17,
 };
@@ -107,6 +109,30 @@ static struct spi_board_info ek_spi_devices[] = {
 #endif
 };
 
+#define EK_FLASH_BASE   AT91_CHIPSELECT_0
+#define EK_FLASH_SIZE   0x200000
+
+static struct physmap_flash_data ek_flash_data = {
+        .width  = 2,
+};
+
+static struct resource ek_flash_resource = {
+        .start          = EK_FLASH_BASE,
+        .end            = EK_FLASH_BASE + EK_FLASH_SIZE - 1,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device ek_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                                .platform_data  = &ek_flash_data,
+                        },
+        .resource       = &ek_flash_resource,
+        .num_resources  = 1,
+};
+
+
 static void __init ek_board_init(void)
 {
         /* Serial */
@@ -130,6 +156,8 @@ static void __init ek_board_init(void)
         at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
         at91_add_device_mmc(&ek_mmc_data);
 #endif
+        /* NOR Flash */
+        platform_device_register(&ek_flash);
         /* VGA */
 //      ek_add_device_video();
 }
diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c
index 35a954a44b1b..759d8191854f 100644
--- a/arch/arm/mach-at91rm9200/board-kb9202.c
+++ b/arch/arm/mach-at91rm9200/board-kb9202.c
@@ -84,7 +84,7 @@ static struct at91_udc_data __initdata kb9202_udc_data = {
 
 static struct at91_mmc_data __initdata kb9202_mmc_data = {
         .det_pin        = AT91_PIN_PB2,
-        .is_b           = 0,
+        .slot_b         = 0,
         .wire4          = 1,
 };
 
diff --git a/arch/arm/mach-at91rm9200/board-sam9260ek.c b/arch/arm/mach-at91rm9200/board-sam9260ek.c
new file mode 100644
index 000000000000..ffca9bdec37b
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-sam9260ek.c
@@ -0,0 +1,201 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/board-ek.c
+ *
+ *  Copyright (C) 2005 SAN People
+ *  Copyright (C) 2006 Atmel
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91sam926x_mc.h>
+
+#include "generic.h"
+
+
+/*
+ * Serial port configuration.
+ *    0 .. 5 = USART0 .. USART5
+ *    6      = DBGU
+ */
+static struct at91_uart_config __initdata ek_uart_config = {
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 3,
+        .tty_map        = { 6, 0, 1, -1, -1, -1, -1 }   /* ttyS0, ..., ttyS6 */
+};
+
+static void __init ek_map_io(void)
+{
+        /* Initialize processor: 18.432 MHz crystal */
+        at91sam9260_initialize(18432000);
+
+        /* Setup the serial ports and console */
+        at91_init_serial(&ek_uart_config);
+}
+
+static void __init ek_init_irq(void)
+{
+        at91sam9260_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata ek_usbh_data = {
+        .ports          = 2,
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata ek_udc_data = {
+        .vbus_pin       = AT91_PIN_PC5,
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
+};
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info ek_spi_devices[] = {
+#if !defined(CONFIG_MMC_AT91)
+        {       /* DataFlash chip */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 1,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#endif
+#endif
+#if defined(CONFIG_SND_AT73C213)
+        {       /* AT73C213 DAC */
+                .modalias       = "snd_at73c213",
+                .chip_select    = 0,
+                .max_speed_hz   = 10 * 1000 * 1000,
+                .bus_num        = 1,
+        },
+#endif
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct __initdata eth_platform_data ek_macb_data = {
+        .is_rmii        = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata ek_nand_partition[] = {
+        {
+                .name   = "Partition 1",
+                .offset = 0,
+                .size   = 256 * 1024,
+        },
+        {
+                .name   = "Partition 2",
+                .offset = 256 * 1024,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition *nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
+static struct at91_nand_data __initdata ek_nand_data = {
+        .ale            = 21,
+        .cle            = 22,
+//      .det_pin        = ... not connected
+        .rdy_pin        = AT91_PIN_PC13,
+        .enable_pin     = AT91_PIN_PC14,
+        .partition_info = nand_partitions,
+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
+        .bus_width_16   = 1,
+#else
+        .bus_width_16   = 0,
+#endif
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .slot_b         = 1,
+        .wire4          = 1,
+//      .det_pin        = ... not connected
+//      .wp_pin         = ... not connected
+//      .vcc_pin        = ... not connected
+};
+
+static void __init ek_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* USB Host */
+        at91_add_device_usbh(&ek_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&ek_udc_data);
+        /* SPI */
+        at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+        /* NAND */
+        at91_add_device_nand(&ek_nand_data);
+        /* Ethernet */
+        at91_add_device_eth(&ek_macb_data);
+        /* MMC */
+        at91_add_device_mmc(&ek_mmc_data);
+}
+
+MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
+        /* Maintainer: Atmel */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91sam926x_timer,
+        .map_io         = ek_map_io,
+        .init_irq       = ek_init_irq,
+        .init_machine   = ek_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/board-sam9261ek.c b/arch/arm/mach-at91rm9200/board-sam9261ek.c
new file mode 100644
index 000000000000..30b490d8886b
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-sam9261ek.c
@@ -0,0 +1,259 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/board-ek.c
+ *
+ *  Copyright (C) 2005 SAN People
+ *  Copyright (C) 2006 Atmel
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/dm9000.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91sam926x_mc.h>
+
+#include "generic.h"
+
+
+/*
+ * Serial port configuration.
+ *    0 .. 2 = USART0 .. USART2
+ *    3      = DBGU
+ */
+static struct at91_uart_config __initdata ek_uart_config = {
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 1,
+        .tty_map        = { 3, -1, -1, -1 }             /* ttyS0, ..., ttyS3 */
+};
+
+static void __init ek_map_io(void)
+{
+        /* Initialize processor: 18.432 MHz crystal */
+        at91sam9261_initialize(18432000);
+
+        /* Setup the serial ports and console */
+        at91_init_serial(&ek_uart_config);
+}
+
+static void __init ek_init_irq(void)
+{
+        at91sam9261_init_interrupts(NULL);
+}
+
+
+/*
+ * DM9000 ethernet device
+ */
+#if defined(CONFIG_DM9000)
+static struct resource at91sam9261_dm9000_resource[] = {
+        [0] = {
+                .start  = AT91_CHIPSELECT_2,
+                .end    = AT91_CHIPSELECT_2 + 3,
+                .flags  = IORESOURCE_MEM
+        },
+        [1] = {
+                .start  = AT91_CHIPSELECT_2 + 0x44,
+                .end    = AT91_CHIPSELECT_2 + 0xFF,
+                .flags  = IORESOURCE_MEM
+        },
+        [2] = {
+                .start  = AT91_PIN_PC11,
+                .end    = AT91_PIN_PC11,
+                .flags  = IORESOURCE_IRQ
+        }
+};
+
+static struct dm9000_plat_data dm9000_platdata = {
+        .flags          = DM9000_PLATF_16BITONLY,
+};
+
+static struct platform_device at91sam9261_dm9000_device = {
+        .name           = "dm9000",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(at91sam9261_dm9000_resource),
+        .resource       = at91sam9261_dm9000_resource,
+        .dev            = {
+                .platform_data  = &dm9000_platdata,
+        }
+};
+
+static void __init ek_add_device_dm9000(void)
+{
+        /*
+         * Configure Chip-Select 2 on SMC for the DM9000.
+         * Note: These timings were calculated for MASTER_CLOCK = 100000000
+         *  according to the DM9000 timings.
+         */
+        at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
+        at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
+        at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
+        at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+
+        /* Configure Reset signal as output */
+        at91_set_gpio_output(AT91_PIN_PC10, 0);
+
+        /* Configure Interrupt pin as input, no pull-up */
+        at91_set_gpio_input(AT91_PIN_PC11, 0);
+
+        platform_device_register(&at91sam9261_dm9000_device);
+}
+#else
+static void __init ek_add_device_dm9000(void) {}
+#endif /* CONFIG_DM9000 */
+
+
+/*
+ * USB Host Port
+ */
+static struct at91_usbh_data __initdata ek_usbh_data = {
+        .ports          = 2,
+};
+
+
+/*
+ * USB Device Port
+ */
+static struct at91_udc_data __initdata ek_udc_data = {
+        .vbus_pin       = AT91_PIN_PB29,
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .wire4          = 1,
+//      .det_pin        = ... not connected
+//      .wp_pin         = ... not connected
+//      .vcc_pin        = ... not connected
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata ek_nand_partition[] = {
+        {
+                .name   = "Partition 1",
+                .offset = 0,
+                .size   = 256 * 1024,
+        },
+        {
+                .name   = "Partition 2",
+                .offset = 256 * 1024 ,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition *nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
+static struct at91_nand_data __initdata ek_nand_data = {
+        .ale            = 22,
+        .cle            = 21,
+//      .det_pin        = ... not connected
+        .rdy_pin        = AT91_PIN_PC15,
+        .enable_pin     = AT91_PIN_PC14,
+        .partition_info = nand_partitions,
+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
+        .bus_width_16   = 1,
+#else
+        .bus_width_16   = 0,
+#endif
+};
+
+/*
+ * SPI devices
+ */
+static struct spi_board_info ek_spi_devices[] = {
+        {       /* DataFlash chip */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+        {       /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 3,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#elif defined(CONFIG_SND_AT73C213)
+        {       /* AT73C213 DAC */
+                .modalias       = "snd_at73c213",
+                .chip_select    = 3,
+                .max_speed_hz   = 10 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#endif
+};
+
+
+static void __init ek_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* USB Host */
+        at91_add_device_usbh(&ek_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&ek_udc_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* NAND */
+        at91_add_device_nand(&ek_nand_data);
+        /* DM9000 ethernet */
+        ek_add_device_dm9000();
+
+        /* spi0 and mmc/sd share the same PIO pins */
+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
+        /* SPI */
+        at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+#else
+        /* MMC */
+        at91_add_device_mmc(&ek_mmc_data);
+#endif
+}
+
+MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
+        /* Maintainer: Atmel */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91sam926x_timer,
+        .map_io         = ek_map_io,
+        .init_irq       = ek_init_irq,
+        .init_machine   = ek_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index a43b061a7c85..4dee21fefe5a 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -28,6 +28,8 @@
 #include <asm/mach-types.h>
 
 #include <asm/hardware.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/cpu.h>
 
 #include "clock.h"
 
@@ -41,6 +43,7 @@
 #define clk_is_primary(x)       ((x)->type & CLK_TYPE_PRIMARY)
 #define clk_is_programmable(x)  ((x)->type & CLK_TYPE_PROGRAMMABLE)
 #define clk_is_peripheral(x)    ((x)->type & CLK_TYPE_PERIPHERAL)
+#define clk_is_sys(x)           ((x)->type & CLK_TYPE_SYSTEM)
 
 
 static LIST_HEAD(clocks);
@@ -114,13 +117,11 @@ static void pmc_sys_mode(struct clk *clk, int is_on)
 static struct clk udpck = {
         .name           = "udpck",
         .parent         = &pllb,
-        .pmc_mask       = AT91_PMC_UDP,
         .mode           = pmc_sys_mode,
 };
 static struct clk uhpck = {
         .name           = "uhpck",
         .parent         = &pllb,
-        .pmc_mask       = AT91_PMC_UHP,
         .mode           = pmc_sys_mode,
 };
 
@@ -434,6 +435,12 @@ int __init clk_register(struct clk *clk)
                 clk->mode = pmc_periph_mode;
                 list_add_tail(&clk->node, &clocks);
         }
+        else if (clk_is_sys(clk)) {
+                clk->parent = &mck;
+                clk->mode = pmc_sys_mode;
+
+                list_add_tail(&clk->node, &clocks);
+        }
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
         else if (clk_is_programmable(clk)) {
                 clk->mode = pmc_sys_mode;
@@ -586,9 +593,21 @@ int __init at91_clock_init(unsigned long main_clock)
          */
         at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
         pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
-        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP);
+        if (cpu_is_at91rm9200()) {
+                uhpck.pmc_mask = AT91RM9200_PMC_UHP;
+                udpck.pmc_mask = AT91RM9200_PMC_UDP;
+                at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP);
+                at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
+        } else if (cpu_is_at91sam9260()) {
+                uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
+                udpck.pmc_mask = AT91SAM926x_PMC_UDP;
+                at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP);
+        } else if (cpu_is_at91sam9261()) {
+                uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0);
+                udpck.pmc_mask = AT91SAM926x_PMC_UDP;
+                at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP);
+        }
         at91_sys_write(AT91_CKGR_PLLBR, 0);
-        at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
 
         udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
         uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
diff --git a/arch/arm/mach-at91rm9200/clock.h b/arch/arm/mach-at91rm9200/clock.h
index 0592e662ab37..b5c7a2eb2d1d 100644
--- a/arch/arm/mach-at91rm9200/clock.h
+++ b/arch/arm/mach-at91rm9200/clock.h
@@ -10,6 +10,7 @@
 #define CLK_TYPE_PLL            0x2
 #define CLK_TYPE_PROGRAMMABLE   0x4
 #define CLK_TYPE_PERIPHERAL     0x8
+#define CLK_TYPE_SYSTEM         0x10
 
 
 struct clk {
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 694e411e285f..8c4d5a77d485 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -10,14 +10,19 @@
 
  /* Processors */
 extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
+extern void __init at91sam9260_initialize(unsigned long main_clock);
+extern void __init at91sam9261_initialize(unsigned long main_clock);
 
  /* Interrupts */
 extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
+extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
+extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
 extern void __init at91_aic_init(unsigned int priority[]);
 
  /* Timer */
 struct sys_timer;
 extern struct sys_timer at91rm9200_timer;
+extern struct sys_timer at91sam926x_timer;
 
  /* Clocks */
 extern int __init at91_clock_init(unsigned long main_clock);
@@ -39,3 +44,6 @@ struct at91_gpio_bank {
 };
 extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
 extern void __init at91_gpio_irq_setup(void);
+
+extern void (*at91_arch_reset)(void);
+extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index 7467d644f0a3..3f188508c391 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -19,6 +19,8 @@
 
 #include <asm/io.h>
 #include <asm/hardware.h>
+#include <asm/arch/at91_pio.h>
+#include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
 
 #include "generic.h"
@@ -332,10 +334,10 @@ static struct irq_chip gpio_irqchip = {
         .set_wake       = gpio_irq_set_wake,
 };
 
-static void gpio_irq_handler(unsigned irq, struct irqdesc *desc)
+static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 {
         unsigned        pin;
-        struct irqdesc  *gpio;
+        struct irq_desc *gpio;
         void __iomem    *pio;
         u32             isr;
 
@@ -396,7 +398,7 @@ void __init at91_gpio_irq_setup(void)
                 __raw_writel(~0, controller + PIO_IDR);
 
                 set_irq_data(id, (void *) pin);
-                set_irq_chipdata(id, controller);
+                set_irq_chip_data(id, controller);
 
                 for (i = 0; i < 32; i++, pin++) {
                         /*
@@ -404,7 +406,7 @@ void __init at91_gpio_irq_setup(void)
                          * shorter, and the AIC handles interupts sanely.
                          */
                         set_irq_chip(pin, &gpio_irqchip);
-                        set_irq_handler(pin, do_simple_IRQ);
+                        set_irq_handler(pin, handle_simple_irq);
                         set_irq_flags(pin, IRQF_VALID);
                 }
 
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index 3e488117ca91..2148daafd29c 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -47,6 +47,10 @@ static void at91_aic_unmask_irq(unsigned int irq)
         at91_sys_write(AT91_AIC_IECR, 1 << irq);
 }
 
+unsigned int at91_extern_irq;
+
+#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
+
 static int at91_aic_set_type(unsigned irq, unsigned type)
 {
         unsigned int smr, srctype;
@@ -59,14 +63,16 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
                 srctype = AT91_AIC_SRCTYPE_RISING;
                 break;
         case IRQT_LOW:
-                if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0))  /* only supported on external interrupts */
+                if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))         /* only supported on external interrupts */
+                        srctype = AT91_AIC_SRCTYPE_LOW;
+                else
                         return -EINVAL;
-                srctype = AT91_AIC_SRCTYPE_LOW;
                 break;
         case IRQT_FALLING:
-                if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0))  /* only supported on external interrupts */
+                if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))         /* only supported on external interrupts */
+                        srctype = AT91_AIC_SRCTYPE_FALLING;
+                else
                         return -EINVAL;
-                srctype = AT91_AIC_SRCTYPE_FALLING;
                 break;
         default:
                 return -EINVAL;
@@ -139,7 +145,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
                 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 
                 set_irq_chip(i, &at91_aic_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 
                 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
index 32c95d8eaacf..67aa5572a3ea 100644
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -26,7 +26,10 @@
 #include <asm/mach/irq.h>
 #include <asm/mach-types.h>
 
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91rm9200_mc.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/cpu.h>
 
 #include "generic.h"
 
@@ -68,9 +71,15 @@ static int at91_pm_verify_clocks(void)
         scsr = at91_sys_read(AT91_PMC_SCSR);
 
         /* USB must not be using PLLB */
-        if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) {
-                pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
-                return 0;
+        if (cpu_is_at91rm9200()) {
+                if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
+                        pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
+                        return 0;
+                }
+        } else if (cpu_is_at91sam9260()) {
+#warning "Check SAM9260 USB clocks"
+        } else if (cpu_is_at91sam9261()) {
+#warning "Check SAM9261 USB clocks"
         }
 
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@@ -112,7 +121,6 @@ EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
 static void (*slow_clock)(void);
 
 
-
 static int at91_pm_enter(suspend_state_t state)
 {
         at91_gpio_suspend();
@@ -123,13 +131,7 @@ static int at91_pm_enter(suspend_state_t state)
                         (at91_sys_read(AT91_PMC_PCSR)
                                         | (1 << AT91_ID_FIQ)
                                         | (1 << AT91_ID_SYS)
-                                        | (1 << AT91RM9200_ID_IRQ0)
-                                        | (1 << AT91RM9200_ID_IRQ1)
-                                        | (1 << AT91RM9200_ID_IRQ2)
-                                        | (1 << AT91RM9200_ID_IRQ3)
-                                        | (1 << AT91RM9200_ID_IRQ4)
-                                        | (1 << AT91RM9200_ID_IRQ5)
-                                        | (1 << AT91RM9200_ID_IRQ6))
+                                        | (at91_extern_irq))
                                 & at91_sys_read(AT91_AIC_IMR),
                         state);
 
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c
index 7ee926e5bad2..ca102960f528 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/irq.c
@@ -63,7 +63,7 @@ static void int1_unmask(unsigned int irq)
         clps_writel(intmr1, INTMR1);
 }
 
-static struct irqchip int1_chip = {
+static struct irq_chip int1_chip = {
         .ack    = int1_ack,
         .mask   = int1_mask,
         .unmask = int1_unmask,
@@ -100,7 +100,7 @@ static void int2_unmask(unsigned int irq)
         clps_writel(intmr2, INTMR2);
 }
 
-static struct irqchip int2_chip = {
+static struct irq_chip int2_chip = {
         .ack    = int2_ack,
         .mask   = int2_mask,
         .unmask = int2_unmask,
@@ -112,12 +112,12 @@ void __init clps711x_init_irq(void)
 
         for (i = 0; i < NR_IRQS; i++) {
                 if (INT1_IRQS & (1 << i)) {
-                        set_irq_handler(i, do_level_IRQ);
+                        set_irq_handler(i, handle_level_irq);
                         set_irq_chip(i, &int1_chip);
                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                 }
                 if (INT2_IRQS & (1 << i)) {
-                        set_irq_handler(i, do_level_IRQ);
+                        set_irq_handler(i, handle_level_irq);
                         set_irq_chip(i, &int2_chip);
                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                 }                       
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index fb10cf252588..231b90004736 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -57,7 +57,7 @@ static void cl7500_unmask_irq_a(unsigned int irq)
         iomd_writeb(val | mask, IOMD_IRQMASKA);
 }
 
-static struct irqchip clps7500_a_chip = {
+static struct irq_chip clps7500_a_chip = {
         .ack    = cl7500_ack_irq_a,
         .mask   = cl7500_mask_irq_a,
         .unmask = cl7500_unmask_irq_a,
@@ -81,7 +81,7 @@ static void cl7500_unmask_irq_b(unsigned int irq)
         iomd_writeb(val | mask, IOMD_IRQMASKB);
 }
 
-static struct irqchip clps7500_b_chip = {
+static struct irq_chip clps7500_b_chip = {
         .ack    = cl7500_mask_irq_b,
         .mask   = cl7500_mask_irq_b,
         .unmask = cl7500_unmask_irq_b,
@@ -105,7 +105,7 @@ static void cl7500_unmask_irq_c(unsigned int irq)
         iomd_writeb(val | mask, IOMD_IRQMASKC);
 }
 
-static struct irqchip clps7500_c_chip = {
+static struct irq_chip clps7500_c_chip = {
         .ack    = cl7500_mask_irq_c,
         .mask   = cl7500_mask_irq_c,
         .unmask = cl7500_unmask_irq_c,
@@ -129,7 +129,7 @@ static void cl7500_unmask_irq_d(unsigned int irq)
         iomd_writeb(val | mask, IOMD_IRQMASKD);
 }
 
-static struct irqchip clps7500_d_chip = {
+static struct irq_chip clps7500_d_chip = {
         .ack    = cl7500_mask_irq_d,
         .mask   = cl7500_mask_irq_d,
         .unmask = cl7500_unmask_irq_d,
@@ -153,7 +153,7 @@ static void cl7500_unmask_irq_dma(unsigned int irq)
         iomd_writeb(val | mask, IOMD_DMAMASK);
 }
 
-static struct irqchip clps7500_dma_chip = {
+static struct irq_chip clps7500_dma_chip = {
         .ack    = cl7500_mask_irq_dma,
         .mask   = cl7500_mask_irq_dma,
         .unmask = cl7500_unmask_irq_dma,
@@ -177,7 +177,7 @@ static void cl7500_unmask_irq_fiq(unsigned int irq)
         iomd_writeb(val | mask, IOMD_FIQMASK);
 }
 
-static struct irqchip clps7500_fiq_chip = {
+static struct irq_chip clps7500_fiq_chip = {
         .ack    = cl7500_mask_irq_fiq,
         .mask   = cl7500_mask_irq_fiq,
         .unmask = cl7500_unmask_irq_fiq,
@@ -187,7 +187,7 @@ static void cl7500_no_action(unsigned int irq)
 {
 }
 
-static struct irqchip clps7500_no_chip = {
+static struct irq_chip clps7500_no_chip = {
         .ack    = cl7500_no_action,
         .mask   = cl7500_no_action,
         .unmask = cl7500_no_action,
@@ -214,43 +214,43 @@ static void __init clps7500_init_irq(void)
                 switch (irq) {
                 case 0 ... 7:
                         set_irq_chip(irq, &clps7500_a_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 8 ... 15:
                         set_irq_chip(irq, &clps7500_b_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 16 ... 22:
                         set_irq_chip(irq, &clps7500_dma_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 24 ... 31:
                         set_irq_chip(irq, &clps7500_c_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 40 ... 47:
                         set_irq_chip(irq, &clps7500_d_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 48 ... 55:
                         set_irq_chip(irq, &clps7500_no_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 64 ... 72:
                         set_irq_chip(irq, &clps7500_fiq_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
                 }
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 90103ab373a6..8459431cfd71 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -45,7 +45,7 @@ static void ebsa110_unmask_irq(unsigned int irq)
         __raw_writeb(1 << irq, IRQ_MSET);
 }
 
-static struct irqchip ebsa110_irq_chip = {
+static struct irq_chip ebsa110_irq_chip = {
         .ack    = ebsa110_mask_irq,
         .mask   = ebsa110_mask_irq,
         .unmask = ebsa110_unmask_irq,
@@ -67,7 +67,7 @@ static void __init ebsa110_init_irq(void)
 
         for (irq = 0; irq < NR_IRQS; irq++) {
                 set_irq_chip(irq, &ebsa110_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 }
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index e346b03cd921..af7904b3d0a8 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -9,12 +9,24 @@ config CRUNCH
 
 comment "EP93xx Platforms"
 
+config MACH_ADSSPHERE
+        bool "Support ADS Sphere"
+        help
+          Say 'Y' here if you want your kernel to support the ADS
+          Sphere board.
+
 config MACH_EDB9302
         bool "Support Cirrus Logic EDB9302"
         help
           Say 'Y' here if you want your kernel to support the Cirrus
           Logic EDB9302 Evaluation Board.
 
+config MACH_EDB9302A
+        bool "Support Cirrus Logic EDB9302A"
+        help
+          Say 'Y' here if you want your kernel to support the Cirrus
+          Logic EDB9302A Evaluation Board.
+
 config MACH_EDB9312
         bool "Support Cirrus Logic EDB9312"
         help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index c2eb18b530c2..b06641dd450d 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -6,7 +6,9 @@ obj-m			:=
 obj-n                   :=
 obj-                    :=
 
+obj-$(CONFIG_MACH_ADSSPHERE)    += adssphere.o
 obj-$(CONFIG_MACH_EDB9302)      += edb9302.o
+obj-$(CONFIG_MACH_EDB9302A)     += edb9302a.o
 obj-$(CONFIG_MACH_EDB9312)      += edb9312.o
 obj-$(CONFIG_MACH_EDB9315)      += edb9315.o
 obj-$(CONFIG_MACH_EDB9315A)     += edb9315a.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
new file mode 100644
index 000000000000..ac5d5818eb7b
--- /dev/null
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -0,0 +1,91 @@
+/*
+ * arch/arm/mach-ep93xx/adssphere.c
+ * ADS Sphere support.
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct physmap_flash_data adssphere_flash_data = {
+        .width          = 4,
+};
+
+static struct resource adssphere_flash_resource = {
+        .start          = 0x60000000,
+        .end            = 0x61ffffff,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device adssphere_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &adssphere_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &adssphere_flash_resource,
+};
+
+static struct ep93xx_eth_data adssphere_eth_data = {
+        .phy_id         = 1,
+};
+
+static struct resource adssphere_eth_resource[] = {
+        {
+                .start  = EP93XX_ETHERNET_PHYS_BASE,
+                .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_EP93XX_ETHERNET,
+                .end    = IRQ_EP93XX_ETHERNET,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+static struct platform_device adssphere_eth_device = {
+        .name           = "ep93xx-eth",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &adssphere_eth_data,
+        },
+        .num_resources  = 2,
+        .resource       = adssphere_eth_resource,
+};
+
+static void __init adssphere_init_machine(void)
+{
+        ep93xx_init_devices();
+        platform_device_register(&adssphere_flash);
+
+        memcpy(adssphere_eth_data.dev_addr,
+                (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
+        platform_device_register(&adssphere_eth_device);
+}
+
+MACHINE_START(ADSSPHERE, "ADS Sphere board")
+        /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = adssphere_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index e3fd1ab6adcc..d649b39711d4 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -245,7 +245,7 @@ EXPORT_SYMBOL(gpio_line_set);
  * EP93xx IRQ handling
  *************************************************************************/
 static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
-                struct irqdesc *desc)
+                struct irq_desc *desc)
 {
         unsigned char status;
         int i;
@@ -335,7 +335,7 @@ static int ep93xx_gpio_ab_irq_type(unsigned int irq, unsigned int type)
         return 0;
 }
 
-static struct irqchip ep93xx_gpio_ab_irq_chip = {
+static struct irq_chip ep93xx_gpio_ab_irq_chip = {
         .ack            = ep93xx_gpio_ab_irq_mask_ack,
         .mask           = ep93xx_gpio_ab_irq_mask,
         .unmask         = ep93xx_gpio_ab_irq_unmask,
@@ -352,7 +352,7 @@ void __init ep93xx_init_irq(void)
 
         for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) {
                 set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
         set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
new file mode 100644
index 000000000000..62e064bab1d2
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -0,0 +1,91 @@
+/*
+ * arch/arm/mach-ep93xx/edb9302a.c
+ * Cirrus Logic EDB9302A support.
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct physmap_flash_data edb9302a_flash_data = {
+        .width          = 2,
+};
+
+static struct resource edb9302a_flash_resource = {
+        .start          = 0x60000000,
+        .end            = 0x60ffffff,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device edb9302a_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &edb9302a_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &edb9302a_flash_resource,
+};
+
+static struct ep93xx_eth_data edb9302a_eth_data = {
+        .phy_id                 = 1,
+};
+
+static struct resource edb9302a_eth_resource[] = {
+        {
+                .start  = EP93XX_ETHERNET_PHYS_BASE,
+                .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_EP93XX_ETHERNET,
+                .end    = IRQ_EP93XX_ETHERNET,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+static struct platform_device edb9302a_eth_device = {
+        .name           = "ep93xx-eth",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &edb9302a_eth_data,
+        },
+        .num_resources  = 2,
+        .resource       = edb9302a_eth_resource,
+};
+
+static void __init edb9302a_init_machine(void)
+{
+        ep93xx_init_devices();
+        platform_device_register(&edb9302a_flash);
+
+        memcpy(edb9302a_eth_data.dev_addr,
+                (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
+        platform_device_register(&edb9302a_eth_device);
+}
+
+MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
+        /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0xc0000100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = edb9302a_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index af900f4755a4..ef29fc34ce65 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -78,7 +78,7 @@ static void fb_unmask_irq(unsigned int irq)
         *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
 }
 
-static struct irqchip fb_chip = {
+static struct irq_chip fb_chip = {
         .ack    = fb_mask_irq,
         .mask   = fb_mask_irq,
         .unmask = fb_unmask_irq,
@@ -96,7 +96,7 @@ static void __init __fb_init_irq(void)
 
         for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
                 set_irq_chip(irq, &fb_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 }
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 888dedd501b9..79443ffc8916 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -49,7 +49,7 @@ static void isa_unmask_pic_lo_irq(unsigned int irq)
         outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO);
 }
 
-static struct irqchip isa_lo_chip = {
+static struct irq_chip isa_lo_chip = {
         .ack    = isa_ack_pic_lo_irq,
         .mask   = isa_mask_pic_lo_irq,
         .unmask = isa_unmask_pic_lo_irq,
@@ -78,14 +78,14 @@ static void isa_unmask_pic_hi_irq(unsigned int irq)
         outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
 }
 
-static struct irqchip isa_hi_chip = {
+static struct irq_chip isa_hi_chip = {
         .ack    = isa_ack_pic_hi_irq,
         .mask   = isa_mask_pic_hi_irq,
         .unmask = isa_unmask_pic_hi_irq,
 };
 
 static void
-isa_irq_handler(unsigned int irq, struct irqdesc *desc)
+isa_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE;
 
@@ -150,13 +150,13 @@ void __init isa_init_irq(unsigned int host_irq)
         if (host_irq != (unsigned int)-1) {
                 for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) {
                         set_irq_chip(irq, &isa_lo_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                 }
 
                 for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) {
                         set_irq_chip(irq, &isa_hi_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                 }
 
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 4719229a1a78..7f31816896ad 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -101,7 +101,7 @@ static void inline unmask_gpio_irq(u32 irq)
 
 static void
 h720x_gpio_handler(unsigned int mask, unsigned int irq,
-                 struct irqdesc *desc)
+                 struct irq_desc *desc)
 {
         IRQDBG("%s irq: %d\n",__FUNCTION__,irq);
         desc = irq_desc + irq;
@@ -117,7 +117,7 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
 }
 
 static void
-h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h720x_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -128,7 +128,7 @@ h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 
 static void
-h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h720x_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
         mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT);
@@ -138,7 +138,7 @@ h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 
 static void
-h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h720x_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -149,7 +149,7 @@ h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 
 static void
-h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h720x_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -161,7 +161,7 @@ h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 
 #ifdef CONFIG_CPU_H7202
 static void
-h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -172,13 +172,13 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 #endif
 
-static struct irqchip h720x_global_chip = {
+static struct irq_chip h720x_global_chip = {
         .ack = mask_global_irq,
         .mask = mask_global_irq,
         .unmask = unmask_global_irq,
 };
 
-static struct irqchip h720x_gpio_chip = {
+static struct irq_chip h720x_gpio_chip = {
         .ack = ack_gpio_irq,
         .mask = mask_gpio_irq,
         .unmask = unmask_gpio_irq,
@@ -203,14 +203,14 @@ void __init h720x_init_irq (void)
         /* Initialize global IRQ's, fast path */
         for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
                 set_irq_chip(irq, &h720x_global_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         /* Initialize multiplexed IRQ's, slow path */
         for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
                 set_irq_chip(irq, &h720x_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID );
         }
         set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
@@ -221,7 +221,7 @@ void __init h720x_init_irq (void)
 #ifdef CONFIG_CPU_H7202
         for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
                 set_irq_chip(irq, &h720x_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID );
         }
         set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index 06fecaefd8dc..703870f30adf 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -106,7 +106,7 @@ static struct platform_device *devices[] __initdata = {
  * we have to handle all timer interrupts in one place.
  */
 static void
-h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -162,7 +162,7 @@ static void inline unmask_timerx_irq (u32 irq)
         CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit;
 }
 
-static struct irqchip h7202_timerx_chip = {
+static struct irq_chip h7202_timerx_chip = {
         .ack = mask_timerx_irq,
         .mask = mask_timerx_irq,
         .unmask = unmask_timerx_irq,
@@ -202,7 +202,7 @@ void __init h7202_init_irq (void)
                           irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
                 mask_timerx_irq(irq);
                 set_irq_chip(irq, &h7202_timerx_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID );
         }
         set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);
diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c
index 12ea58a3b84f..b5aa49d00ca3 100644
--- a/arch/arm/mach-imx/generic.c
+++ b/arch/arm/mach-imx/generic.c
@@ -104,6 +104,9 @@ EXPORT_SYMBOL(imx_gpio_mode);
  */
 static unsigned int imx_decode_pll(unsigned int pll)
 {
+        unsigned long long ll;
+        unsigned long quot;
+
         u32 mfi = (pll >> 10) & 0xf;
         u32 mfn = pll & 0x3ff;
         u32 mfd = (pll >> 16) & 0x3ff;
@@ -112,7 +115,11 @@ static unsigned int imx_decode_pll(unsigned int pll)
 
         mfi = mfi <= 5 ? 5 : mfi;
 
-        return (2 * (f_ref>>10) * ( (mfi<<10) + (mfn<<10) / (mfd+1) )) / (pd+1);
+        ll = 2 * (unsigned long long)f_ref * ( (mfi<<16) + (mfn<<16) / (mfd+1) );
+        quot = (pd+1) * (1<<16);
+        ll += quot / 2;
+        do_div(ll, quot);
+        return (unsigned int) ll;
 }
 
 unsigned int imx_get_system_clk(void)
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index 368b13b058ab..0791b56caecc 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -146,7 +146,7 @@ imx_gpio_unmask_irq(unsigned int irq)
 
 static void
 imx_gpio_handler(unsigned int mask, unsigned int irq,
-                 struct irqdesc *desc)
+                 struct irq_desc *desc)
 {
         desc = irq_desc + irq;
         while (mask) {
@@ -161,7 +161,7 @@ imx_gpio_handler(unsigned int mask, unsigned int irq,
 }
 
 static void
-imx_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+imx_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -171,7 +171,7 @@ imx_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 
 static void
-imx_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+imx_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -181,7 +181,7 @@ imx_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 
 static void
-imx_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+imx_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -191,7 +191,7 @@ imx_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
 }
 
 static void
-imx_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+imx_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int mask, irq;
 
@@ -230,13 +230,13 @@ imx_init_irq(void)
 
         for (irq = 0; irq < IMX_IRQS; irq++) {
                 set_irq_chip(irq, &imx_internal_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
         for (irq = IRQ_GPIOA(0); irq < IRQ_GPIOD(32); irq++) {
                 set_irq_chip(irq, &imx_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 8ae4a2c5066f..40039b2a90b3 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -14,6 +14,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/time.h>
+#include <linux/clocksource.h>
 
 #include <asm/hardware.h>
 #include <asm/io.h>
@@ -24,33 +25,7 @@
 /* Use timer 1 as system timer */
 #define TIMER_BASE IMX_TIM1_BASE
 
-/*
- * Returns number of us since last clock interrupt.  Note that interrupts
- * will have been disabled by do_gettimeoffset()
- */
-static unsigned long imx_gettimeoffset(void)
-{
-        unsigned long ticks;
-
-        /*
-         * Get the current number of ticks.  Note that there is a race
-         * condition between us reading the timer and checking for
-         * an interrupt.  We get around this by ensuring that the
-         * counter has not reloaded between our two reads.
-         */
-        ticks = IMX_TCN(TIMER_BASE);
-
-        /*
-         * Interrupt pending?  If so, we've reloaded once already.
-         */
-        if (IMX_TSTAT(TIMER_BASE) & TSTAT_COMP)
-                ticks += LATCH;
-
-        /*
-         * Convert the ticks to usecs
-         */
-        return (1000000 / CLK32) * ticks;
-}
+static unsigned long evt_diff;
 
 /*
  * IRQ handler for the timer
@@ -58,14 +33,23 @@ static unsigned long imx_gettimeoffset(void)
 static irqreturn_t
 imx_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
+        uint32_t tstat;
 
         /* clear the interrupt */
-        if (IMX_TSTAT(TIMER_BASE))
-                IMX_TSTAT(TIMER_BASE) = 0;
+        tstat = IMX_TSTAT(TIMER_BASE);
+        IMX_TSTAT(TIMER_BASE) = 0;
+
+        if (tstat & TSTAT_COMP) {
+                do {
+
+                        write_seqlock(&xtime_lock);
+                        timer_tick();
+                        write_sequnlock(&xtime_lock);
+                        IMX_TCMP(TIMER_BASE) += evt_diff;
 
-        timer_tick();
-        write_sequnlock(&xtime_lock);
+                } while (unlikely((int32_t)(IMX_TCMP(TIMER_BASE)
+                                        - IMX_TCN(TIMER_BASE)) < 0));
+        }
 
         return IRQ_HANDLED;
 }
@@ -77,9 +61,9 @@ static struct irqaction imx_timer_irq = {
 };
 
 /*
- * Set up timer interrupt, and return the current time in seconds.
+ * Set up timer hardware into expected mode and state.
  */
-static void __init imx_timer_init(void)
+static void __init imx_timer_hardware_init(void)
 {
         /*
          * Initialise to a known state (all timers off, and timing reset)
@@ -87,7 +71,38 @@ static void __init imx_timer_init(void)
         IMX_TCTL(TIMER_BASE) = 0;
         IMX_TPRER(TIMER_BASE) = 0;
         IMX_TCMP(TIMER_BASE) = LATCH - 1;
-        IMX_TCTL(TIMER_BASE) = TCTL_CLK_32 | TCTL_IRQEN | TCTL_TEN;
+
+        IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_IRQEN | TCTL_TEN;
+        evt_diff = LATCH;
+}
+
+cycle_t imx_get_cycles(void)
+{
+        return IMX_TCN(TIMER_BASE);
+}
+
+static struct clocksource clocksource_imx = {
+        .name           = "imx_timer1",
+        .rating         = 200,
+        .read           = imx_get_cycles,
+        .mask           = 0xFFFFFFFF,
+        .shift          = 20,
+        .is_continuous  = 1,
+};
+
+static int __init imx_clocksource_init(void)
+{
+        clocksource_imx.mult =
+                clocksource_hz2mult(imx_get_perclk1(), clocksource_imx.shift);
+        clocksource_register(&clocksource_imx);
+
+        return 0;
+}
+
+static void __init imx_timer_init(void)
+{
+        imx_timer_hardware_init();
+        imx_clocksource_init();
 
         /*
          * Make irqs happen for the system timer
@@ -97,5 +112,4 @@ static void __init imx_timer_init(void)
 
 struct sys_timer imx_timer = {
         .init           = imx_timer_init,
-        .offset         = imx_gettimeoffset,
 };
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 191c57a3b997..72280754354d 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -183,7 +183,7 @@ static void __init ap_init_irq(void)
         for (i = 0; i < NR_IRQS; i++) {
                 if (((1 << i) & INTEGRATOR_SC_VALID_INT) != 0) {
                         set_irq_chip(i, &sc_chip);
-                        set_irq_handler(i, do_level_IRQ);
+                        set_irq_handler(i, handle_level_irq);
                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                 }
         }
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 771b65bffe69..913f64b22405 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -202,7 +202,7 @@ static struct irq_chip sic_chip = {
 };
 
 static void
-sic_handle_irq(unsigned int irq, struct irqdesc *desc)
+sic_handle_irq(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS);
 
@@ -238,7 +238,7 @@ static void __init intcp_init_irq(void)
                 if (i == 29)
                         break;
                 set_irq_chip(i, &pic_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
         }
 
@@ -247,7 +247,7 @@ static void __init intcp_init_irq(void)
 
         for (i = IRQ_CIC_START; i <= IRQ_CIC_END; i++) {
                 set_irq_chip(i, &cic_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID);
         }
 
@@ -256,7 +256,7 @@ static void __init intcp_init_irq(void)
 
         for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) {
                 set_irq_chip(i, &sic_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/mach-integrator/platsmp.c b/arch/arm/mach-integrator/platsmp.c
index 1bc8534ef0c6..613b841a10f3 100644
--- a/arch/arm/mach-integrator/platsmp.c
+++ b/arch/arm/mach-integrator/platsmp.c
@@ -18,7 +18,6 @@
 #include <asm/cacheflush.h>
 #include <asm/delay.h>
 #include <asm/mmu_context.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 #include <asm/smp.h>
 
diff --git a/arch/arm/mach-iop13xx/Kconfig b/arch/arm/mach-iop13xx/Kconfig
new file mode 100644
index 000000000000..40c2d689f2eb
--- /dev/null
+++ b/arch/arm/mach-iop13xx/Kconfig
@@ -0,0 +1,20 @@
+if ARCH_IOP13XX
+
+menu "IOP13XX Implementation Options"
+
+comment "IOP13XX Platform Support"
+
+config MACH_IQ81340SC
+        bool "Enable IQ81340SC Hardware Support"
+        help
+          Say Y here if you want to support running on the Intel IQ81340SC
+          evaluation kit.
+
+config MACH_IQ81340MC
+        bool "Enable IQ81340MC Hardware Support"
+        help
+          Say Y here if you want to support running on the Intel IQ81340MC
+          evaluation kit.
+
+endmenu
+endif
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
new file mode 100644
index 000000000000..c3d6c08f2d4c
--- /dev/null
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -0,0 +1,12 @@
+obj-y                   :=
+obj-m                   :=
+obj-n                   :=
+obj-                    :=
+
+obj-$(CONFIG_ARCH_IOP13XX) += setup.o
+obj-$(CONFIG_ARCH_IOP13XX) += irq.o
+obj-$(CONFIG_ARCH_IOP13XX) += time.o
+obj-$(CONFIG_ARCH_IOP13XX) += pci.o
+obj-$(CONFIG_ARCH_IOP13XX) += io.o
+obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
+obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o
diff --git a/arch/arm/mach-iop13xx/Makefile.boot b/arch/arm/mach-iop13xx/Makefile.boot
new file mode 100644
index 000000000000..0b0e19fdfe6c
--- /dev/null
+++ b/arch/arm/mach-iop13xx/Makefile.boot
@@ -0,0 +1,3 @@
+   zreladdr-y   := 0x00008000
+params_phys-y   := 0x00000100
+initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
new file mode 100644
index 000000000000..fbf9f88e46ea
--- /dev/null
+++ b/arch/arm/mach-iop13xx/io.c
@@ -0,0 +1,93 @@
+/*
+ * iop13xx custom ioremap implementation
+ * Copyright (c) 2005-2006, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+
+void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
+        unsigned long flags)
+{
+        void __iomem * retval;
+
+        switch (cookie) {
+        case IOP13XX_PCIX_LOWER_MEM_RA ... IOP13XX_PCIX_UPPER_MEM_RA:
+                if (unlikely(!iop13xx_atux_mem_base))
+                        retval = NULL;
+                else
+                        retval = (void *)(iop13xx_atux_mem_base +
+                                 (cookie - IOP13XX_PCIX_LOWER_MEM_RA));
+                break;
+        case IOP13XX_PCIE_LOWER_MEM_RA ... IOP13XX_PCIE_UPPER_MEM_RA:
+                if (unlikely(!iop13xx_atue_mem_base))
+                        retval = NULL;
+                else
+                        retval = (void *)(iop13xx_atue_mem_base +
+                                 (cookie - IOP13XX_PCIE_LOWER_MEM_RA));
+                break;
+        case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA:
+                retval = __ioremap(IOP13XX_PBI_LOWER_MEM_PA +
+                                  (cookie - IOP13XX_PBI_LOWER_MEM_RA),
+                                  size, flags);
+                break;
+        case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
+                retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie);
+                break;
+        case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
+                retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie);
+                break;
+        case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA:
+                retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
+                break;
+        default:
+                retval = __ioremap(cookie, size, flags);
+        }
+
+        return retval;
+}
+EXPORT_SYMBOL(__iop13xx_ioremap);
+
+void __iop13xx_iounmap(void __iomem *addr)
+{
+        extern void __iounmap(volatile void __iomem *addr);
+
+        if (iop13xx_atue_mem_base)
+                if (addr >= (void __iomem *) iop13xx_atue_mem_base &&
+                    addr < (void __iomem *) (iop13xx_atue_mem_base +
+                                             iop13xx_atue_mem_size))
+                    goto skip;
+
+        if (iop13xx_atux_mem_base)
+                if (addr >= (void __iomem *) iop13xx_atux_mem_base &&
+                    addr < (void __iomem *) (iop13xx_atux_mem_base +
+                                             iop13xx_atux_mem_size))
+                    goto skip;
+
+        switch ((u32) addr) {
+        case IOP13XX_PCIE_LOWER_IO_VA ... IOP13XX_PCIE_UPPER_IO_VA:
+        case IOP13XX_PCIX_LOWER_IO_VA ... IOP13XX_PCIX_UPPER_IO_VA:
+        case IOP13XX_PMMR_VIRT_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_VA:
+                goto skip;
+        }
+        __iounmap(addr);
+
+skip:
+        return;
+}
+EXPORT_SYMBOL(__iop13xx_iounmap);
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
new file mode 100644
index 000000000000..ee595786cd22
--- /dev/null
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -0,0 +1,98 @@
+/*
+ * iq81340mc board support
+ * Copyright (c) 2005-2006, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+#include <linux/pci.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/mach/pci.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/arch/pci.h>
+#include <asm/mach/time.h>
+
+extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
+
+static int __init
+iq81340mc_pcix_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+{
+        switch (idsel) {
+        case 1:
+                switch (pin) {
+                case 1: return ATUX_INTB;
+                case 2: return ATUX_INTC;
+                case 3: return ATUX_INTD;
+                case 4: return ATUX_INTA;
+                default: return -1;
+                }
+        case 2:
+                switch (pin) {
+                case 1: return ATUX_INTC;
+                case 2: return ATUX_INTD;
+                case 3: return ATUX_INTC;
+                case 4: return ATUX_INTD;
+                default: return -1;
+                }
+        default: return -1;
+        }
+}
+
+static struct hw_pci iq81340mc_pci __initdata = {
+        .swizzle        = pci_std_swizzle,
+        .nr_controllers = 0,
+        .setup          = iop13xx_pci_setup,
+        .map_irq        = iq81340mc_pcix_map_irq,
+        .scan           = iop13xx_scan_bus,
+        .preinit        = iop13xx_pci_init,
+};
+
+static int __init iq81340mc_pci_init(void)
+{
+        iop13xx_atu_select(&iq81340mc_pci);
+        pci_common_init(&iq81340mc_pci);
+        iop13xx_map_pci_memory();
+
+        return 0;
+}
+
+static void __init iq81340mc_init(void)
+{
+        iop13xx_platform_init();
+        iq81340mc_pci_init();
+}
+
+static void __init iq81340mc_timer_init(void)
+{
+        iop13xx_init_time(400000000);
+}
+
+static struct sys_timer iq81340mc_timer = {
+       .init       = iq81340mc_timer_init,
+       .offset     = iop13xx_gettimeoffset,
+};
+
+MACHINE_START(IQ81340MC, "Intel IQ81340MC")
+        /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
+        .phys_io        = PHYS_IO,
+        .io_pg_offst    = IO_PG_OFFSET,
+        .map_io         = iop13xx_map_io,
+        .init_irq       = iop13xx_init_irq,
+        .timer          = &iq81340mc_timer,
+        .boot_params    = BOOT_PARAM_OFFSET,
+        .init_machine   = iq81340mc_init,
+MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
new file mode 100644
index 000000000000..6677e14b61bf
--- /dev/null
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -0,0 +1,100 @@
+/*
+ * iq81340sc board support
+ * Copyright (c) 2005-2006, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+#include <linux/pci.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/mach/pci.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/arch/pci.h>
+#include <asm/mach/time.h>
+
+extern int init_atu;
+
+static int __init
+iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+{
+        WARN_ON(idsel < 1 || idsel > 2);
+
+        switch (idsel) {
+        case 1:
+                switch (pin) {
+                case 1: return ATUX_INTB;
+                case 2: return ATUX_INTC;
+                case 3: return ATUX_INTD;
+                case 4: return ATUX_INTA;
+                default: return -1;
+                }
+        case 2:
+                switch (pin) {
+                case 1: return ATUX_INTC;
+                case 2: return ATUX_INTC;
+                case 3: return ATUX_INTC;
+                case 4: return ATUX_INTC;
+                default: return -1;
+                }
+        default: return -1;
+        }
+}
+
+static struct hw_pci iq81340sc_pci __initdata = {
+        .swizzle        = pci_std_swizzle,
+        .nr_controllers = 0,
+        .setup          = iop13xx_pci_setup,
+        .scan           = iop13xx_scan_bus,
+        .map_irq        = iq81340sc_atux_map_irq,
+        .preinit        = iop13xx_pci_init
+};
+
+static int __init iq81340sc_pci_init(void)
+{
+        iop13xx_atu_select(&iq81340sc_pci);
+        pci_common_init(&iq81340sc_pci);
+        iop13xx_map_pci_memory();
+
+        return 0;
+}
+
+static void __init iq81340sc_init(void)
+{
+        iop13xx_platform_init();
+        iq81340sc_pci_init();
+}
+
+static void __init iq81340sc_timer_init(void)
+{
+        iop13xx_init_time(400000000);
+}
+
+static struct sys_timer iq81340sc_timer = {
+       .init       = iq81340sc_timer_init,
+       .offset     = iop13xx_gettimeoffset,
+};
+
+MACHINE_START(IQ81340SC, "Intel IQ81340SC")
+        /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
+        .phys_io        = PHYS_IO,
+        .io_pg_offst    = IO_PG_OFFSET,
+        .map_io         = iop13xx_map_io,
+        .init_irq       = iop13xx_init_irq,
+        .timer          = &iq81340sc_timer,
+        .boot_params    = BOOT_PARAM_OFFSET,
+        .init_machine   = iq81340sc_init,
+MACHINE_END
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
new file mode 100644
index 000000000000..c4d9c8c5579c
--- /dev/null
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -0,0 +1,286 @@
+/*
+ * iop13xx IRQ handling / support functions
+ * Copyright (c) 2005-2006, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/sysctl.h>
+#include <asm/uaccess.h>
+#include <asm/mach/irq.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/arch/irqs.h>
+
+/* INTCTL0 CP6 R0 Page 4
+ */
+static inline u32 read_intctl_0(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val));
+        return val;
+}
+static inline void write_intctl_0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val));
+}
+
+/* INTCTL1 CP6 R1 Page 4
+ */
+static inline u32 read_intctl_1(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val));
+        return val;
+}
+static inline void write_intctl_1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val));
+}
+
+/* INTCTL2 CP6 R2 Page 4
+ */
+static inline u32 read_intctl_2(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val));
+        return val;
+}
+static inline void write_intctl_2(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val));
+}
+
+/* INTCTL3 CP6 R3 Page 4
+ */
+static inline u32 read_intctl_3(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val));
+        return val;
+}
+static inline void write_intctl_3(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val));
+}
+
+/* INTSTR0 CP6 R0 Page 5
+ */
+static inline u32 read_intstr_0(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c0, c5, 0":"=r" (val));
+        return val;
+}
+static inline void write_intstr_0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val));
+}
+
+/* INTSTR1 CP6 R1 Page 5
+ */
+static inline u32 read_intstr_1(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c1, c5, 0":"=r" (val));
+        return val;
+}
+static void write_intstr_1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val));
+}
+
+/* INTSTR2 CP6 R2 Page 5
+ */
+static inline u32 read_intstr_2(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c5, 0":"=r" (val));
+        return val;
+}
+static void write_intstr_2(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val));
+}
+
+/* INTSTR3 CP6 R3 Page 5
+ */
+static inline u32 read_intstr_3(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c5, 0":"=r" (val));
+        return val;
+}
+static void write_intstr_3(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val));
+}
+
+/* INTBASE CP6 R0 Page 2
+ */
+static inline u32 read_intbase(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c0, c2, 0":"=r" (val));
+        return val;
+}
+static void write_intbase(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val));
+}
+
+/* INTSIZE CP6 R2 Page 2
+ */
+static inline u32 read_intsize(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c2, 0":"=r" (val));
+        return val;
+}
+static void write_intsize(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val));
+}
+
+/* 0 = Interrupt Masked and 1 = Interrupt not masked */
+static void
+iop13xx_irq_mask0 (unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_mask1 (unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_mask2 (unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_mask3 (unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_unmask0(unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_0(read_intctl_0() | (1 << (irq - 0)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_unmask1(unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_1(read_intctl_1() | (1 << (irq - 32)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_unmask2(unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_2(read_intctl_2() | (1 << (irq - 64)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static void
+iop13xx_irq_unmask3(unsigned int irq)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+        write_intctl_3(read_intctl_3() | (1 << (irq - 96)));
+        iop13xx_cp6_restore(cp_flags);
+}
+
+static struct irqchip iop13xx_irqchip0 = {
+        .ack    = iop13xx_irq_mask0,
+        .mask   = iop13xx_irq_mask0,
+        .unmask = iop13xx_irq_unmask0,
+};
+
+static struct irqchip iop13xx_irqchip1 = {
+        .ack    = iop13xx_irq_mask1,
+        .mask   = iop13xx_irq_mask1,
+        .unmask = iop13xx_irq_unmask1,
+};
+
+static struct irqchip iop13xx_irqchip2 = {
+        .ack    = iop13xx_irq_mask2,
+        .mask   = iop13xx_irq_mask2,
+        .unmask = iop13xx_irq_unmask2,
+};
+
+static struct irqchip iop13xx_irqchip3 = {
+        .ack    = iop13xx_irq_mask3,
+        .mask   = iop13xx_irq_mask3,
+        .unmask = iop13xx_irq_unmask3,
+};
+
+void __init iop13xx_init_irq(void)
+{
+        unsigned int i;
+
+        u32 cp_flags = iop13xx_cp6_save();
+
+        /* disable all interrupts */
+        write_intctl_0(0);
+        write_intctl_1(0);
+        write_intctl_2(0);
+        write_intctl_3(0);
+
+        /* treat all as IRQ */
+        write_intstr_0(0);
+        write_intstr_1(0);
+        write_intstr_2(0);
+        write_intstr_3(0);
+
+        /* initialize the interrupt vector generator */
+        write_intbase(INTBASE);
+        write_intsize(INTSIZE_4);
+
+        for(i = 0; i < NR_IOP13XX_IRQS; i++) {
+                if (i < 32)
+                        set_irq_chip(i, &iop13xx_irqchip0);
+                else if (i < 64)
+                        set_irq_chip(i, &iop13xx_irqchip1);
+                else if (i < 96)
+                        set_irq_chip(i, &iop13xx_irqchip2);
+                else
+                        set_irq_chip(i, &iop13xx_irqchip3);
+
+                set_irq_handler(i, do_level_IRQ);
+                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+        }
+
+        iop13xx_cp6_restore(cp_flags);
+}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
new file mode 100644
index 000000000000..89ec70ea3187
--- /dev/null
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -0,0 +1,1113 @@
+/*
+ * iop13xx PCI support
+ * Copyright (c) 2005-2006, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/delay.h>
+
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/sizes.h>
+#include <asm/mach/pci.h>
+#include <asm/arch/pci.h>
+
+#define IOP13XX_PCI_DEBUG 0
+#define PRINTK(x...) ((void)(IOP13XX_PCI_DEBUG && printk(x)))
+
+u32 iop13xx_atux_pmmr_offset; /* This offset can change based on strapping */
+u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */
+static struct pci_bus *pci_bus_atux = 0;
+static struct pci_bus *pci_bus_atue = 0;
+u32 iop13xx_atue_mem_base;
+u32 iop13xx_atux_mem_base;
+size_t iop13xx_atue_mem_size;
+size_t iop13xx_atux_mem_size;
+unsigned long iop13xx_pcibios_min_io = 0;
+unsigned long iop13xx_pcibios_min_mem = 0;
+
+EXPORT_SYMBOL(iop13xx_atue_mem_base);
+EXPORT_SYMBOL(iop13xx_atux_mem_base);
+EXPORT_SYMBOL(iop13xx_atue_mem_size);
+EXPORT_SYMBOL(iop13xx_atux_mem_size);
+
+int init_atu = 0; /* Flag to select which ATU(s) to initialize / disable */
+static unsigned long atux_trhfa_timeout = 0; /* Trhfa = RST# high to first
+                                                 access */
+
+/* Scan the initialized busses and ioremap the requested memory range
+ */
+void iop13xx_map_pci_memory(void)
+{
+        int atu;
+        struct pci_bus *bus;
+        struct pci_dev *dev;
+        resource_size_t end = 0;
+
+        for (atu = 0; atu < 2; atu++) {
+                bus = atu ? pci_bus_atue : pci_bus_atux;
+                if (bus) {
+                        list_for_each_entry(dev, &bus->devices, bus_list) {
+                                int i;
+                                int max = 7;
+
+                                if (dev->subordinate)
+                                        max = DEVICE_COUNT_RESOURCE;
+
+                                for (i = 0; i < max; i++) {
+                                        struct resource *res = &dev->resource[i];
+                                        if (res->flags & IORESOURCE_MEM)
+                                                end = max(res->end, end);
+                                }
+                        }
+
+                        switch(atu) {
+                        case 0:
+                                iop13xx_atux_mem_size =
+                                        (end - IOP13XX_PCIX_LOWER_MEM_RA) + 1;
+
+                                /* 16MB align the request */
+                                if (iop13xx_atux_mem_size & (SZ_16M - 1)) {
+                                        iop13xx_atux_mem_size &= ~(SZ_16M - 1);
+                                        iop13xx_atux_mem_size += SZ_16M;
+                                }
+
+                                if (end) {
+                                        iop13xx_atux_mem_base =
+                                        (u32) __ioremap_pfn(
+                                        __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA)
+                                        , 0, iop13xx_atux_mem_size, 0);
+                                        if (!iop13xx_atux_mem_base) {
+                                                printk("%s: atux allocation "
+                                                       "failed\n", __FUNCTION__);
+                                                BUG();
+                                        }
+                                } else
+                                        iop13xx_atux_mem_size = 0;
+                                PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
+                                __FUNCTION__, atu, iop13xx_atux_mem_size,
+                                iop13xx_atux_mem_base);
+                                break;
+                        case 1:
+                                iop13xx_atue_mem_size =
+                                        (end - IOP13XX_PCIE_LOWER_MEM_RA) + 1;
+
+                                /* 16MB align the request */
+                                if (iop13xx_atue_mem_size & (SZ_16M - 1)) {
+                                        iop13xx_atue_mem_size &= ~(SZ_16M - 1);
+                                        iop13xx_atue_mem_size += SZ_16M;
+                                }
+
+                                if (end) {
+                                        iop13xx_atue_mem_base =
+                                        (u32) __ioremap_pfn(
+                                        __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA)
+                                        , 0, iop13xx_atue_mem_size, 0);
+                                        if (!iop13xx_atue_mem_base) {
+                                                printk("%s: atue allocation "
+                                                       "failed\n", __FUNCTION__);
+                                                BUG();
+                                        }
+                                } else
+                                        iop13xx_atue_mem_size = 0;
+                                PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
+                                __FUNCTION__, atu, iop13xx_atue_mem_size,
+                                iop13xx_atue_mem_base);
+                                break;
+                        }
+
+                        printk("%s: Initialized (%uM @ resource/virtual: %08lx/%08x)\n",
+                        atu ? "ATUE" : "ATUX",
+                        (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) /
+                        SZ_1M,
+                        atu ? IOP13XX_PCIE_LOWER_MEM_RA :
+                        IOP13XX_PCIX_LOWER_MEM_RA,
+                        atu ? iop13xx_atue_mem_base :
+                        iop13xx_atux_mem_base);
+                        end = 0;
+                }
+
+        }
+}
+
+static inline int iop13xx_atu_function(int atu)
+{
+        int func = 0;
+        /* the function number depends on the value of the
+         * IOP13XX_INTERFACE_SEL_PCIX reset strap
+         * see C-Spec section 3.17
+         */
+        switch(atu) {
+        case IOP13XX_INIT_ATU_ATUX:
+                if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)
+                        func = 5;
+                else
+                        func = 0;
+                break;
+        case IOP13XX_INIT_ATU_ATUE:
+                if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)
+                        func = 0;
+                else
+                        func = 5;
+                break;
+        default:
+                BUG();
+        }
+
+        return func;
+}
+
+/* iop13xx_atux_cfg_address - format a configuration address for atux
+ * @bus: Target bus to access
+ * @devfn: Combined device number and function number
+ * @where: Desired register's address offset
+ *
+ * Convert the parameters to a configuration address formatted
+ * according the PCI-X 2.0 specification
+ */
+static u32 iop13xx_atux_cfg_address(struct pci_bus *bus, int devfn, int where)
+{
+        struct pci_sys_data *sys = bus->sysdata;
+        u32 addr;
+
+        if (sys->busnr == bus->number)
+                addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11);
+        else
+                addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
+
+        addr |= PCI_FUNC(devfn) << 8 | ((where & 0xff) & ~3);
+        addr |= ((where & 0xf00) >> 8) << 24; /* upper register number */
+
+        return addr;
+}
+
+/* iop13xx_atue_cfg_address - format a configuration address for atue
+ * @bus: Target bus to access
+ * @devfn: Combined device number and function number
+ * @where: Desired register's address offset
+ *
+ * Convert the parameters to an address usable by the ATUE_OCCAR
+ */
+static u32 iop13xx_atue_cfg_address(struct pci_bus *bus, int devfn, int where)
+{
+        struct pci_sys_data *sys = bus->sysdata;
+        u32 addr;
+
+        PRINTK("iop13xx_atue_cfg_address: bus: %d dev: %d func: %d",
+                bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
+        addr = ((u32) bus->number)     << IOP13XX_ATUE_OCCAR_BUS_NUM |
+                   ((u32) PCI_SLOT(devfn)) << IOP13XX_ATUE_OCCAR_DEV_NUM |
+                   ((u32) PCI_FUNC(devfn)) << IOP13XX_ATUE_OCCAR_FUNC_NUM |
+                   (where & ~0x3);
+
+        if (sys->busnr != bus->number)
+                addr |= 1; /* type 1 access */
+
+        return addr;
+}
+
+/* This routine checks the status of the last configuration cycle.  If an error
+ * was detected it returns >0, else it returns a 0.  The errors being checked
+ * are parity, master abort, target abort (master and target).  These types of
+ * errors occure during a config cycle where there is no device, like during
+ * the discovery stage.
+ */
+static int iop13xx_atux_pci_status(int clear)
+{
+        unsigned int status;
+        int err = 0;
+
+        /*
+         * Check the status registers.
+         */
+        status = __raw_readw(IOP13XX_ATUX_ATUSR);
+        if (status & IOP_PCI_STATUS_ERROR)
+        {
+                PRINTK("\t\t\tPCI error: ATUSR %#08x", status);
+                if(clear)
+                        __raw_writew(status & IOP_PCI_STATUS_ERROR,
+                                IOP13XX_ATUX_ATUSR);
+                err = 1;
+        }
+        status = __raw_readl(IOP13XX_ATUX_ATUISR);
+        if (status & IOP13XX_ATUX_ATUISR_ERROR)
+        {
+                PRINTK("\t\t\tPCI error interrupt:  ATUISR %#08x", status);
+                if(clear)
+                        __raw_writel(status & IOP13XX_ATUX_ATUISR_ERROR,
+                                IOP13XX_ATUX_ATUISR);
+                err = 1;
+        }
+        return err;
+}
+
+/* Simply write the address register and read the configuration
+ * data.  Note that the data dependency on %0 encourages an abort
+ * to be detected before we return.
+ */
+static inline u32 iop13xx_atux_read(unsigned long addr)
+{
+        u32 val;
+
+        __asm__ __volatile__(
+                "str    %1, [%2]\n\t"
+                "ldr    %0, [%3]\n\t"
+                "mov    %0, %0\n\t"
+                : "=r" (val)
+                : "r" (addr), "r" (IOP13XX_ATUX_OCCAR), "r" (IOP13XX_ATUX_OCCDR));
+
+        return val;
+}
+
+/* The read routines must check the error status of the last configuration
+ * cycle.  If there was an error, the routine returns all hex f's.
+ */
+static int
+iop13xx_atux_read_config(struct pci_bus *bus, unsigned int devfn, int where,
+                int size, u32 *value)
+{
+        unsigned long addr = iop13xx_atux_cfg_address(bus, devfn, where);
+        u32 val = iop13xx_atux_read(addr) >> ((where & 3) * 8);
+
+        if (iop13xx_atux_pci_status(1) || is_atux_occdr_error()) {
+                __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,
+                        IOP13XX_XBG_BECSR);
+                val = 0xffffffff;
+        }
+
+        *value = val;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+iop13xx_atux_write_config(struct pci_bus *bus, unsigned int devfn, int where,
+                int size, u32 value)
+{
+        unsigned long addr = iop13xx_atux_cfg_address(bus, devfn, where);
+        u32 val;
+
+        if (size != 4) {
+                val = iop13xx_atux_read(addr);
+                if (!iop13xx_atux_pci_status(1) == 0)
+                        return PCIBIOS_SUCCESSFUL;
+
+                where = (where & 3) * 8;
+
+                if (size == 1)
+                        val &= ~(0xff << where);
+                else
+                        val &= ~(0xffff << where);
+
+                __raw_writel(val | value << where, IOP13XX_ATUX_OCCDR);
+        } else {
+                __raw_writel(addr, IOP13XX_ATUX_OCCAR);
+                __raw_writel(value, IOP13XX_ATUX_OCCDR);
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops iop13xx_atux_ops = {
+        .read   = iop13xx_atux_read_config,
+        .write  = iop13xx_atux_write_config,
+};
+
+/* This routine checks the status of the last configuration cycle.  If an error
+ * was detected it returns >0, else it returns a 0.  The errors being checked
+ * are parity, master abort, target abort (master and target).  These types of
+ * errors occure during a config cycle where there is no device, like during
+ * the discovery stage.
+ */
+static int iop13xx_atue_pci_status(int clear)
+{
+        unsigned int status;
+        int err = 0;
+
+        /*
+         * Check the status registers.
+         */
+
+        /* standard pci status register */
+        status = __raw_readw(IOP13XX_ATUE_ATUSR);
+        if (status & IOP_PCI_STATUS_ERROR) {
+                PRINTK("\t\t\tPCI error: ATUSR %#08x", status);
+                if(clear)
+                        __raw_writew(status & IOP_PCI_STATUS_ERROR,
+                                IOP13XX_ATUE_ATUSR);
+                err++;
+        }
+
+        /* check the normal status bits in the ATUISR */
+        status = __raw_readl(IOP13XX_ATUE_ATUISR);
+        if (status & IOP13XX_ATUE_ATUISR_ERROR) {
+                PRINTK("\t\t\tPCI error: ATUISR %#08x", status);
+                if (clear)
+                        __raw_writew(status & IOP13XX_ATUE_ATUISR_ERROR,
+                                IOP13XX_ATUE_ATUISR);
+                err++;
+
+                /* check the PCI-E status if the ATUISR reports an interface error */
+                if (status & IOP13XX_ATUE_STAT_PCI_IFACE_ERR) {
+                        /* get the unmasked errors */
+                        status = __raw_readl(IOP13XX_ATUE_PIE_STS) &
+                                        ~(__raw_readl(IOP13XX_ATUE_PIE_MSK));
+
+                        if (status) {
+                                PRINTK("\t\t\tPCI-E error: ATUE_PIE_STS %#08x",
+                                        __raw_readl(IOP13XX_ATUE_PIE_STS));
+                                err++;
+                        } else {
+                                PRINTK("\t\t\tPCI-E error: ATUE_PIE_STS %#08x",
+                                        __raw_readl(IOP13XX_ATUE_PIE_STS));
+                                PRINTK("\t\t\tPCI-E error: ATUE_PIE_MSK %#08x",
+                                        __raw_readl(IOP13XX_ATUE_PIE_MSK));
+                                BUG();
+                        }
+
+                        if(clear)
+                                __raw_writel(status, IOP13XX_ATUE_PIE_STS);
+                }
+        }
+
+        return err;
+}
+
+static inline int __init
+iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+{
+        WARN_ON(idsel != 0);
+
+        switch (pin) {
+        case 1: return ATUE_INTA;
+        case 2: return ATUE_INTB;
+        case 3: return ATUE_INTC;
+        case 4: return ATUE_INTD;
+        default: return -1;
+        }
+}
+
+static inline u32 iop13xx_atue_read(unsigned long addr)
+{
+        u32 val;
+
+        __raw_writel(addr, IOP13XX_ATUE_OCCAR);
+        val = __raw_readl(IOP13XX_ATUE_OCCDR);
+
+        rmb();
+
+        return val;
+}
+
+/* The read routines must check the error status of the last configuration
+ * cycle.  If there was an error, the routine returns all hex f's.
+ */
+static int
+iop13xx_atue_read_config(struct pci_bus *bus, unsigned int devfn, int where,
+                int size, u32 *value)
+{
+        u32 val;
+        unsigned long addr = iop13xx_atue_cfg_address(bus, devfn, where);
+
+        /* Hide device numbers > 0 on the local PCI-E bus (Type 0 access) */
+        if (!PCI_SLOT(devfn) || (addr & 1)) {
+                val = iop13xx_atue_read(addr) >> ((where & 3) * 8);
+                if( iop13xx_atue_pci_status(1) || is_atue_occdr_error() ) {
+                        __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,
+                                IOP13XX_XBG_BECSR);
+                        val = 0xffffffff;
+                }
+
+                PRINTK("addr=%#0lx, val=%#010x", addr, val);
+        } else
+                val = 0xffffffff;
+
+        *value = val;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+iop13xx_atue_write_config(struct pci_bus *bus, unsigned int devfn, int where,
+                int size, u32 value)
+{
+        unsigned long addr = iop13xx_atue_cfg_address(bus, devfn, where);
+        u32 val;
+
+        if (size != 4) {
+                val = iop13xx_atue_read(addr);
+                if (!iop13xx_atue_pci_status(1) == 0)
+                        return PCIBIOS_SUCCESSFUL;
+
+                where = (where & 3) * 8;
+
+                if (size == 1)
+                        val &= ~(0xff << where);
+                else
+                        val &= ~(0xffff << where);
+
+                __raw_writel(val | value << where, IOP13XX_ATUE_OCCDR);
+        } else {
+                __raw_writel(addr, IOP13XX_ATUE_OCCAR);
+                __raw_writel(value, IOP13XX_ATUE_OCCDR);
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops iop13xx_atue_ops = {
+        .read   = iop13xx_atue_read_config,
+        .write  = iop13xx_atue_write_config,
+};
+
+/* When a PCI device does not exist during config cycles, the XScale gets a
+ * bus error instead of returning 0xffffffff.  We can't rely on the ATU status
+ * bits to tell us that it was indeed a configuration cycle that caused this
+ * error especially in the case when the ATUE link is down.  Instead we rely
+ * on data from the south XSI bridge to validate the abort
+ */
+int
+iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
+{
+        PRINTK("Data abort: address = 0x%08lx "
+                    "fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx",
+                addr, fsr, regs->ARM_pc, regs->ARM_lr);
+
+        PRINTK("IOP13XX_XBG_BECSR: %#10x", __raw_readl(IOP13XX_XBG_BECSR));
+        PRINTK("IOP13XX_XBG_BERAR: %#10x", __raw_readl(IOP13XX_XBG_BERAR));
+        PRINTK("IOP13XX_XBG_BERUAR: %#10x", __raw_readl(IOP13XX_XBG_BERUAR));
+
+        /*  If it was an imprecise abort, then we need to correct the
+         *  return address to be _after_ the instruction.
+         */
+        if (fsr & (1 << 10))
+                regs->ARM_pc += 4;
+
+        if (is_atue_occdr_error() || is_atux_occdr_error())
+                return 0;
+        else
+                return 1;
+}
+
+/* Scan an IOP13XX PCI bus.  nr selects which ATU we use.
+ */
+struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
+{
+        int which_atu;
+        struct pci_bus *bus = NULL;
+
+        switch (init_atu) {
+        case IOP13XX_INIT_ATU_ATUX:
+                which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUX;
+                break;
+        case IOP13XX_INIT_ATU_ATUE:
+                which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUE;
+                break;
+        case (IOP13XX_INIT_ATU_ATUX | IOP13XX_INIT_ATU_ATUE):
+                which_atu = nr ? IOP13XX_INIT_ATU_ATUE : IOP13XX_INIT_ATU_ATUX;
+                break;
+        default:
+                which_atu = 0;
+        }
+
+        if (!which_atu) {
+                BUG();
+                return NULL;
+        }
+
+        switch (which_atu) {
+        case IOP13XX_INIT_ATU_ATUX:
+                if (time_after_eq(jiffies + msecs_to_jiffies(1000),
+                                  atux_trhfa_timeout))  /* ensure not wrap */
+                        while(time_before(jiffies, atux_trhfa_timeout))
+                                udelay(100);
+
+                bus = pci_bus_atux = pci_scan_bus(sys->busnr,
+                                                  &iop13xx_atux_ops,
+                                                  sys);
+                break;
+        case IOP13XX_INIT_ATU_ATUE:
+                bus = pci_bus_atue = pci_scan_bus(sys->busnr,
+                                                  &iop13xx_atue_ops,
+                                                  sys);
+                break;
+        }
+
+        return bus;
+}
+
+/* This function is called from iop13xx_pci_init() after assigning valid
+ * values to iop13xx_atue_pmmr_offset.  This is the location for common
+ * setup of ATUE for all IOP13XX implementations.
+ */
+void __init iop13xx_atue_setup(void)
+{
+        int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE);
+        u32 reg_val;
+
+        /* BAR 1 (1:1 mapping with Physical RAM) */
+        /* Set limit and enable */
+        __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
+                        IOP13XX_ATUE_IALR1);
+        __raw_writel(0x0, IOP13XX_ATUE_IAUBAR1);
+
+        /* Set base at the top of the reserved address space */
+        __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 |
+                        PCI_BASE_ADDRESS_MEM_PREFETCH, IOP13XX_ATUE_IABAR1);
+
+        /* 1:1 mapping with physical ram
+         * (leave big endian byte swap disabled)
+         */
+         __raw_writel(0x0, IOP13XX_ATUE_IAUTVR1);
+         __raw_writel(PHYS_OFFSET, IOP13XX_ATUE_IATVR1);
+
+        /* Outbound window 1 (PCIX/PCIE memory window) */
+        /* 32 bit Address Space */
+        __raw_writel(0x0, IOP13XX_ATUE_OUMWTVR1);
+        /* PA[35:32] */
+        __raw_writel(IOP13XX_ATUE_OUMBAR_ENABLE |
+                        (IOP13XX_PCIE_MEM_PHYS_OFFSET >> 32),
+                        IOP13XX_ATUE_OUMBAR1);
+
+        /* Setup the I/O Bar
+         * A[35-16] in 31-12
+         */
+        __raw_writel(((IOP13XX_PCIE_LOWER_IO_PA >> 0x4) & 0xfffff000),
+                IOP13XX_ATUE_OIOBAR);
+        __raw_writel(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_ATUE_OIOWTVR);
+
+        /* clear startup errors */
+        iop13xx_atue_pci_status(1);
+
+        /* OIOBAR function number
+         */
+        reg_val = __raw_readl(IOP13XX_ATUE_OIOBAR);
+        reg_val &= ~0x7;
+        reg_val |= func;
+        __raw_writel(reg_val, IOP13XX_ATUE_OIOBAR);
+
+        /* OUMBAR function numbers
+         */
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0);
+
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR1);
+
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR2);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR2);
+
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR3);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR3);
+
+        /* Enable inbound and outbound cycles
+         */
+        reg_val = __raw_readw(IOP13XX_ATUE_ATUCMD);
+        reg_val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
+                        PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+        __raw_writew(reg_val, IOP13XX_ATUE_ATUCMD);
+
+        reg_val = __raw_readl(IOP13XX_ATUE_ATUCR);
+        reg_val |= IOP13XX_ATUE_ATUCR_OUT_EN |
+                        IOP13XX_ATUE_ATUCR_IVM;
+        __raw_writel(reg_val, IOP13XX_ATUE_ATUCR);
+}
+
+void __init iop13xx_atue_disable(void)
+{
+        u32 reg_val;
+
+        __raw_writew(0x0, IOP13XX_ATUE_ATUCMD);
+        __raw_writel(IOP13XX_ATUE_ATUCR_IVM, IOP13XX_ATUE_ATUCR);
+
+        /* wait for cycles to quiesce */
+        while (__raw_readl(IOP13XX_ATUE_PCSR) & (IOP13XX_ATUE_PCSR_OUT_Q_BUSY |
+                                             IOP13XX_ATUE_PCSR_IN_Q_BUSY |
+                                             IOP13XX_ATUE_PCSR_LLRB_BUSY))
+                cpu_relax();
+
+        /* BAR 0 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUE_IAUBAR0);
+        __raw_writel(0x0, IOP13XX_ATUE_IABAR0);
+        __raw_writel(0x0, IOP13XX_ATUE_IAUTVR0);
+        __raw_writel(0x0, IOP13XX_ATUE_IATVR0);
+        __raw_writel(0x0, IOP13XX_ATUE_IALR0);
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0);
+        reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0);
+
+        /* BAR 1 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUE_IAUBAR1);
+        __raw_writel(0x0, IOP13XX_ATUE_IABAR1);
+        __raw_writel(0x0, IOP13XX_ATUE_IAUTVR1);
+        __raw_writel(0x0, IOP13XX_ATUE_IATVR1);
+        __raw_writel(0x0, IOP13XX_ATUE_IALR1);
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1);
+        reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR1);
+
+        /* BAR 2 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUE_IAUBAR2);
+        __raw_writel(0x0, IOP13XX_ATUE_IABAR2);
+        __raw_writel(0x0, IOP13XX_ATUE_IAUTVR2);
+        __raw_writel(0x0, IOP13XX_ATUE_IATVR2);
+        __raw_writel(0x0, IOP13XX_ATUE_IALR2);
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR2);
+        reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR2);
+
+        /* BAR 3 ( Disabled ) */
+        reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR3);
+        reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR3);
+
+        /* Setup the I/O Bar
+         * A[35-16] in 31-12
+         */
+        __raw_writel((IOP13XX_PCIE_LOWER_IO_PA >> 0x4) & 0xfffff000,
+                        IOP13XX_ATUE_OIOBAR);
+        __raw_writel(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_ATUE_OIOWTVR);
+}
+
+/* This function is called from iop13xx_pci_init() after assigning valid
+ * values to iop13xx_atux_pmmr_offset.  This is the location for common
+ * setup of ATUX for all IOP13XX implementations.
+ */
+void __init iop13xx_atux_setup(void)
+{
+        u32 reg_val;
+        int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUX);
+
+        /* Take PCI-X bus out of reset if bootloader hasn't already.
+         * According to spec, we should wait for 2^25 PCI clocks to meet
+         * the PCI timing parameter Trhfa (RST# high to first access).
+         * This is rarely necessary and often ignored.
+         */
+        reg_val = __raw_readl(IOP13XX_ATUX_PCSR);
+        if (reg_val & IOP13XX_ATUX_PCSR_P_RSTOUT) {
+                int msec = (reg_val >> IOP13XX_ATUX_PCSR_FREQ_OFFSET) & 0x7;
+                msec = 1000 / (8-msec); /* bits 100=133MHz, 111=>33MHz */
+                __raw_writel(reg_val & ~IOP13XX_ATUX_PCSR_P_RSTOUT,
+                                IOP13XX_ATUX_PCSR);
+                atux_trhfa_timeout = jiffies + msecs_to_jiffies(msec);
+        }
+        else
+                atux_trhfa_timeout = jiffies;
+
+        /* BAR 1 (1:1 mapping with Physical RAM) */
+        /* Set limit and enable */
+        __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
+                        IOP13XX_ATUX_IALR1);
+        __raw_writel(0x0, IOP13XX_ATUX_IAUBAR1);
+
+        /* Set base at the top of the reserved address space */
+        __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 |
+                        PCI_BASE_ADDRESS_MEM_PREFETCH, IOP13XX_ATUX_IABAR1);
+
+        /* 1:1 mapping with physical ram
+         * (leave big endian byte swap disabled)
+         */
+        __raw_writel(0x0, IOP13XX_ATUX_IAUTVR1);
+        __raw_writel(PHYS_OFFSET, IOP13XX_ATUX_IATVR1);
+
+        /* Outbound window 1 (PCIX/PCIE memory window) */
+        /* 32 bit Address Space */
+        __raw_writel(0x0, IOP13XX_ATUX_OUMWTVR1);
+        /* PA[35:32] */
+        __raw_writel(IOP13XX_ATUX_OUMBAR_ENABLE |
+                        IOP13XX_PCIX_MEM_PHYS_OFFSET >> 32,
+                        IOP13XX_ATUX_OUMBAR1);
+
+        /* Setup the I/O Bar
+         * A[35-16] in 31-12
+         */
+        __raw_writel((IOP13XX_PCIX_LOWER_IO_PA >> 0x4) & 0xfffff000,
+                IOP13XX_ATUX_OIOBAR);
+        __raw_writel(IOP13XX_PCIX_LOWER_IO_BA, IOP13XX_ATUX_OIOWTVR);
+
+        /* clear startup errors */
+        iop13xx_atux_pci_status(1);
+
+        /* OIOBAR function number
+         */
+        reg_val = __raw_readl(IOP13XX_ATUX_OIOBAR);
+        reg_val &= ~0x7;
+        reg_val |= func;
+        __raw_writel(reg_val, IOP13XX_ATUX_OIOBAR);
+
+        /* OUMBAR function numbers
+         */
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR0);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR0);
+
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR1);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR1);
+
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR2);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR2);
+
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR3);
+        reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
+                        IOP13XX_ATU_OUMBAR_FUNC_NUM);
+        reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR3);
+
+        /* Enable inbound and outbound cycles
+         */
+        reg_val = __raw_readw(IOP13XX_ATUX_ATUCMD);
+        reg_val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
+                        PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+        __raw_writew(reg_val, IOP13XX_ATUX_ATUCMD);
+
+        reg_val = __raw_readl(IOP13XX_ATUX_ATUCR);
+        reg_val |= IOP13XX_ATUX_ATUCR_OUT_EN;
+        __raw_writel(reg_val, IOP13XX_ATUX_ATUCR);
+}
+
+void __init iop13xx_atux_disable(void)
+{
+        u32 reg_val;
+
+        __raw_writew(0x0, IOP13XX_ATUX_ATUCMD);
+        __raw_writel(0x0, IOP13XX_ATUX_ATUCR);
+
+        /* wait for cycles to quiesce */
+        while (__raw_readl(IOP13XX_ATUX_PCSR) & (IOP13XX_ATUX_PCSR_OUT_Q_BUSY |
+                                     IOP13XX_ATUX_PCSR_IN_Q_BUSY))
+                cpu_relax();
+
+        /* BAR 0 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUX_IAUBAR0);
+        __raw_writel(0x0, IOP13XX_ATUX_IABAR0);
+        __raw_writel(0x0, IOP13XX_ATUX_IAUTVR0);
+        __raw_writel(0x0, IOP13XX_ATUX_IATVR0);
+        __raw_writel(0x0, IOP13XX_ATUX_IALR0);
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR0);
+        reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR0);
+
+        /* BAR 1 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUX_IAUBAR1);
+        __raw_writel(0x0, IOP13XX_ATUX_IABAR1);
+        __raw_writel(0x0, IOP13XX_ATUX_IAUTVR1);
+        __raw_writel(0x0, IOP13XX_ATUX_IATVR1);
+        __raw_writel(0x0, IOP13XX_ATUX_IALR1);
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR1);
+        reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR1);
+
+        /* BAR 2 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUX_IAUBAR2);
+        __raw_writel(0x0, IOP13XX_ATUX_IABAR2);
+        __raw_writel(0x0, IOP13XX_ATUX_IAUTVR2);
+        __raw_writel(0x0, IOP13XX_ATUX_IATVR2);
+        __raw_writel(0x0, IOP13XX_ATUX_IALR2);
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR2);
+        reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR2);
+
+        /* BAR 3 ( Disabled ) */
+        __raw_writel(0x0, IOP13XX_ATUX_IAUBAR3);
+        __raw_writel(0x0, IOP13XX_ATUX_IABAR3);
+        __raw_writel(0x0, IOP13XX_ATUX_IAUTVR3);
+        __raw_writel(0x0, IOP13XX_ATUX_IATVR3);
+        __raw_writel(0x0, IOP13XX_ATUX_IALR3);
+        reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR3);
+        reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
+        __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR3);
+
+        /* Setup the I/O Bar
+        * A[35-16] in 31-12
+        */
+        __raw_writel((IOP13XX_PCIX_LOWER_IO_PA >> 0x4) & 0xfffff000,
+                        IOP13XX_ATUX_OIOBAR);
+        __raw_writel(IOP13XX_PCIX_LOWER_IO_BA, IOP13XX_ATUX_OIOWTVR);
+}
+
+void __init iop13xx_set_atu_mmr_bases(void)
+{
+        /* Based on ESSR0, determine the ATU X/E offsets */
+        switch(__raw_readl(IOP13XX_ESSR0) &
+                (IOP13XX_CONTROLLER_ONLY | IOP13XX_INTERFACE_SEL_PCIX)) {
+        /* both asserted */
+        case 0:
+                iop13xx_atux_pmmr_offset = IOP13XX_ATU1_PMMR_OFFSET;
+                iop13xx_atue_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
+                break;
+        /* IOP13XX_CONTROLLER_ONLY = deasserted
+         * IOP13XX_INTERFACE_SEL_PCIX = asserted
+         */
+        case IOP13XX_CONTROLLER_ONLY:
+                iop13xx_atux_pmmr_offset = IOP13XX_ATU0_PMMR_OFFSET;
+                iop13xx_atue_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
+                break;
+        /* IOP13XX_CONTROLLER_ONLY = asserted
+         * IOP13XX_INTERFACE_SEL_PCIX = deasserted
+         */
+        case IOP13XX_INTERFACE_SEL_PCIX:
+                iop13xx_atux_pmmr_offset = IOP13XX_ATU1_PMMR_OFFSET;
+                iop13xx_atue_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
+                break;
+        /* both deasserted */
+        case IOP13XX_CONTROLLER_ONLY | IOP13XX_INTERFACE_SEL_PCIX:
+                iop13xx_atux_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
+                iop13xx_atue_pmmr_offset = IOP13XX_ATU0_PMMR_OFFSET;
+                break;
+        default:
+                BUG();
+        }
+}
+
+void __init iop13xx_atu_select(struct hw_pci *plat_pci)
+{
+        int i;
+
+        /* set system defaults
+         * note: if "iop13xx_init_atu=" is specified this autodetect
+         * sequence will be bypassed
+         */
+        if (init_atu == IOP13XX_INIT_ATU_DEFAULT) {
+                /* check for single/dual interface */
+                if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) {
+                        /* ATUE must be present check the device id
+                         * to see if ATUX is present.
+                         */
+                        init_atu |= IOP13XX_INIT_ATU_ATUE;
+                        switch (__raw_readw(IOP13XX_ATUE_DID) & 0xf0) {
+                        case 0x70:
+                        case 0x80:
+                        case 0xc0:
+                                init_atu |= IOP13XX_INIT_ATU_ATUX;
+                                break;
+                        }
+                } else {
+                        /* ATUX must be present check the device id
+                         * to see if ATUE is present.
+                         */
+                        init_atu |= IOP13XX_INIT_ATU_ATUX;
+                        switch (__raw_readw(IOP13XX_ATUX_DID) & 0xf0) {
+                        case 0x70:
+                        case 0x80:
+                        case 0xc0:
+                                init_atu |= IOP13XX_INIT_ATU_ATUE;
+                                break;
+                        }
+                }
+
+                /* check central resource and root complex capability */
+                if (init_atu & IOP13XX_INIT_ATU_ATUX)
+                        if (!(__raw_readl(IOP13XX_ATUX_PCSR) &
+                                IOP13XX_ATUX_PCSR_CENTRAL_RES))
+                                init_atu &= ~IOP13XX_INIT_ATU_ATUX;
+
+                if (init_atu & IOP13XX_INIT_ATU_ATUE)
+                        if (__raw_readl(IOP13XX_ATUE_PCSR) &
+                                IOP13XX_ATUE_PCSR_END_POINT)
+                                init_atu &= ~IOP13XX_INIT_ATU_ATUE;
+        }
+
+        for (i = 0; i < 2; i++) {
+                if((init_atu & (1 << i)) == (1 << i))
+                        plat_pci->nr_controllers++;
+        }
+}
+
+void __init iop13xx_pci_init(void)
+{
+        /* clear pre-existing south bridge errors */
+        __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);
+
+        /* Setup the Min Address for PCI memory... */
+        iop13xx_pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA;
+
+        /* if Linux is given control of an ATU
+         * clear out its prior configuration,
+         * otherwise do not touch the registers
+         */
+        if (init_atu & IOP13XX_INIT_ATU_ATUE) {
+                iop13xx_atue_disable();
+                iop13xx_atue_setup();
+        }
+
+        if (init_atu & IOP13XX_INIT_ATU_ATUX) {
+                iop13xx_atux_disable();
+                iop13xx_atux_setup();
+        }
+
+        hook_fault_code(16+6, iop13xx_pci_abort, SIGBUS,
+                        "imprecise external abort");
+}
+
+/* intialize the pci memory space.  handle any combination of
+ * atue and atux enabled/disabled
+ */
+int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
+{
+        struct resource *res;
+        int which_atu;
+        u32 pcixsr, pcsr;
+
+        if (nr > 1)
+                return 0;
+
+        res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+        if (!res)
+                panic("PCI: unable to alloc resources");
+
+        memset(res, 0, sizeof(struct resource) * 2);
+
+        /* 'nr' assumptions:
+         * ATUX is always 0
+         * ATUE is 1 when ATUX is also enabled
+         * ATUE is 0 when ATUX is disabled
+         */
+        switch(init_atu) {
+        case IOP13XX_INIT_ATU_ATUX:
+                which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUX;
+                break;
+        case IOP13XX_INIT_ATU_ATUE:
+                which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUE;
+                break;
+        case (IOP13XX_INIT_ATU_ATUX | IOP13XX_INIT_ATU_ATUE):
+                which_atu = nr ? IOP13XX_INIT_ATU_ATUE : IOP13XX_INIT_ATU_ATUX;
+                break;
+        default:
+                which_atu = 0;
+        }
+
+        if (!which_atu)
+                return 0;
+
+        switch(which_atu) {
+        case IOP13XX_INIT_ATU_ATUX:
+                pcixsr = __raw_readl(IOP13XX_ATUX_PCIXSR);
+                pcixsr &= ~0xffff;
+                pcixsr |= sys->busnr << IOP13XX_ATUX_PCIXSR_BUS_NUM |
+                          0 << IOP13XX_ATUX_PCIXSR_DEV_NUM |
+                          iop13xx_atu_function(IOP13XX_INIT_ATU_ATUX)
+                                  << IOP13XX_ATUX_PCIXSR_FUNC_NUM;
+                __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR);
+
+                res[0].start = IOP13XX_PCIX_LOWER_IO_PA;
+                res[0].end   = IOP13XX_PCIX_UPPER_IO_PA;
+                res[0].name  = "IQ81340 ATUX PCI I/O Space";
+                res[0].flags = IORESOURCE_IO;
+
+                res[1].start = IOP13XX_PCIX_LOWER_MEM_RA;
+                res[1].end   = IOP13XX_PCIX_UPPER_MEM_RA;
+                res[1].name  = "IQ81340 ATUX PCI Memory Space";
+                res[1].flags = IORESOURCE_MEM;
+                sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET;
+                sys->io_offset = IOP13XX_PCIX_IO_OFFSET;
+                break;
+        case IOP13XX_INIT_ATU_ATUE:
+                /* Note: the function number field in the PCSR is ro */
+                pcsr = __raw_readl(IOP13XX_ATUE_PCSR);
+                pcsr &= ~(0xfff8 << 16);
+                pcsr |= sys->busnr << IOP13XX_ATUE_PCSR_BUS_NUM |
+                                0 << IOP13XX_ATUE_PCSR_DEV_NUM;
+
+                __raw_writel(pcsr, IOP13XX_ATUE_PCSR);
+
+                res[0].start = IOP13XX_PCIE_LOWER_IO_PA;
+                res[0].end   = IOP13XX_PCIE_UPPER_IO_PA;
+                res[0].name  = "IQ81340 ATUE PCI I/O Space";
+                res[0].flags = IORESOURCE_IO;
+
+                res[1].start = IOP13XX_PCIE_LOWER_MEM_RA;
+                res[1].end   = IOP13XX_PCIE_UPPER_MEM_RA;
+                res[1].name  = "IQ81340 ATUE PCI Memory Space";
+                res[1].flags = IORESOURCE_MEM;
+                sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET;
+                sys->io_offset = IOP13XX_PCIE_IO_OFFSET;
+                sys->map_irq = iop13xx_pcie_map_irq;
+                break;
+        default:
+                return 0;
+        }
+
+        request_resource(&ioport_resource, &res[0]);
+        request_resource(&iomem_resource, &res[1]);
+
+        sys->resource[0] = &res[0];
+        sys->resource[1] = &res[1];
+        sys->resource[2] = NULL;
+
+        return 1;
+}
+
+u16 iop13xx_dev_id(void)
+{
+        if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)
+                return __raw_readw(IOP13XX_ATUE_DID);
+        else
+                return __raw_readw(IOP13XX_ATUX_DID);
+}
+
+static int __init iop13xx_init_atu_setup(char *str)
+{
+        init_atu = IOP13XX_INIT_ATU_NONE;
+        if (str) {
+                while (*str != '\0') {
+                        switch (*str) {
+                        case 'x':
+                        case 'X':
+                                init_atu |= IOP13XX_INIT_ATU_ATUX;
+                                init_atu &= ~IOP13XX_INIT_ATU_NONE;
+                                break;
+                        case 'e':
+                        case 'E':
+                                init_atu |= IOP13XX_INIT_ATU_ATUE;
+                                init_atu &= ~IOP13XX_INIT_ATU_NONE;
+                                break;
+                        case ',':
+                        case '=':
+                                break;
+                        default:
+                                PRINTK("\"iop13xx_init_atu\" malformed at "
+                                            "character: \'%c\'", *str);
+                                *(str + 1) = '\0';
+                                init_atu = IOP13XX_INIT_ATU_DEFAULT;
+                        }
+                        str++;
+                }
+        }
+        return 1;
+}
+
+__setup("iop13xx_init_atu", iop13xx_init_atu_setup);
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
new file mode 100644
index 000000000000..3756d2ccb1a7
--- /dev/null
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -0,0 +1,406 @@
+/*
+ * iop13xx platform Initialization
+ * Copyright (c) 2005-2006, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place - Suite 330, Boston, MA 02111-1307 USA.
+ *
+ */
+
+#include <linux/serial_8250.h>
+#ifdef CONFIG_MTD_PHYSMAP
+#include <linux/mtd/physmap.h>
+#endif
+#include <asm/mach/map.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+
+#define IOP13XX_UART_XTAL 33334000
+#define IOP13XX_SETUP_DEBUG 0
+#define PRINTK(x...) ((void)(IOP13XX_SETUP_DEBUG && printk(x)))
+
+/* Standard IO mapping for all IOP13XX based systems
+ */
+static struct map_desc iop13xx_std_desc[] __initdata = {
+        {    /* mem mapped registers */
+                .virtual = IOP13XX_PMMR_VIRT_MEM_BASE,
+                .pfn     = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE),
+                .length  = IOP13XX_PMMR_SIZE,
+                .type    = MT_DEVICE,
+        }, { /* PCIE IO space */
+                .virtual = IOP13XX_PCIE_LOWER_IO_VA,
+                .pfn     = __phys_to_pfn(IOP13XX_PCIE_LOWER_IO_PA),
+                .length  = IOP13XX_PCIX_IO_WINDOW_SIZE,
+                .type    = MT_DEVICE,
+        }, { /* PCIX IO space */
+                .virtual = IOP13XX_PCIX_LOWER_IO_VA,
+                .pfn     = __phys_to_pfn(IOP13XX_PCIX_LOWER_IO_PA),
+                .length  = IOP13XX_PCIX_IO_WINDOW_SIZE,
+                .type    = MT_DEVICE,
+        },
+};
+
+static struct resource iop13xx_uart0_resources[] = {
+        [0] = {
+                .start = IOP13XX_UART0_PHYS,
+                .end = IOP13XX_UART0_PHYS + 0x3f,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IOP13XX_UART0,
+                .end = IRQ_IOP13XX_UART0,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+static struct resource iop13xx_uart1_resources[] = {
+        [0] = {
+                .start = IOP13XX_UART1_PHYS,
+                .end = IOP13XX_UART1_PHYS + 0x3f,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IOP13XX_UART1,
+                .end = IRQ_IOP13XX_UART1,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+static struct plat_serial8250_port iop13xx_uart0_data[] = {
+        {
+       .membase     = (char*)(IOP13XX_UART0_VIRT),
+       .mapbase     = (IOP13XX_UART0_PHYS),
+       .irq         = IRQ_IOP13XX_UART0,
+       .uartclk     = IOP13XX_UART_XTAL,
+       .regshift    = 2,
+       .iotype      = UPIO_MEM,
+       .flags       = UPF_SKIP_TEST,
+        },
+        {  },
+};
+
+static struct plat_serial8250_port iop13xx_uart1_data[] = {
+        {
+       .membase     = (char*)(IOP13XX_UART1_VIRT),
+       .mapbase     = (IOP13XX_UART1_PHYS),
+       .irq         = IRQ_IOP13XX_UART1,
+       .uartclk     = IOP13XX_UART_XTAL,
+       .regshift    = 2,
+       .iotype      = UPIO_MEM,
+       .flags       = UPF_SKIP_TEST,
+        },
+        {  },
+};
+
+/* The ids are fixed up later in iop13xx_platform_init */
+static struct platform_device iop13xx_uart0 = {
+       .name = "serial8250",
+       .id = 0,
+       .dev.platform_data = iop13xx_uart0_data,
+       .num_resources = 2,
+       .resource = iop13xx_uart0_resources,
+};
+
+static struct platform_device iop13xx_uart1 = {
+       .name = "serial8250",
+       .id = 0,
+       .dev.platform_data = iop13xx_uart1_data,
+       .num_resources = 2,
+       .resource = iop13xx_uart1_resources
+};
+
+static struct resource iop13xx_i2c_0_resources[] = {
+        [0] = {
+                .start = IOP13XX_I2C0_PHYS,
+                .end = IOP13XX_I2C0_PHYS + 0x18,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IOP13XX_I2C_0,
+                .end = IRQ_IOP13XX_I2C_0,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+static struct resource iop13xx_i2c_1_resources[] = {
+        [0] = {
+                .start = IOP13XX_I2C1_PHYS,
+                .end = IOP13XX_I2C1_PHYS + 0x18,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IOP13XX_I2C_1,
+                .end = IRQ_IOP13XX_I2C_1,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+static struct resource iop13xx_i2c_2_resources[] = {
+        [0] = {
+                .start = IOP13XX_I2C2_PHYS,
+                .end = IOP13XX_I2C2_PHYS + 0x18,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_IOP13XX_I2C_2,
+                .end = IRQ_IOP13XX_I2C_2,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+/* I2C controllers. The IOP13XX uses the same block as the IOP3xx, so
+ * we just use the same device name.
+ */
+
+/* The ids are fixed up later in iop13xx_platform_init */
+static struct platform_device iop13xx_i2c_0_controller = {
+        .name = "IOP3xx-I2C",
+        .id = 0,
+        .num_resources = 2,
+        .resource = iop13xx_i2c_0_resources
+};
+
+static struct platform_device iop13xx_i2c_1_controller = {
+        .name = "IOP3xx-I2C",
+        .id = 0,
+        .num_resources = 2,
+        .resource = iop13xx_i2c_1_resources
+};
+
+static struct platform_device iop13xx_i2c_2_controller = {
+        .name = "IOP3xx-I2C",
+        .id = 0,
+        .num_resources = 2,
+        .resource = iop13xx_i2c_2_resources
+};
+
+#ifdef CONFIG_MTD_PHYSMAP
+/* PBI Flash Device
+ */
+static struct physmap_flash_data iq8134x_flash_data = {
+        .width = 2,
+};
+
+static struct resource iq8134x_flash_resource = {
+        .start = IQ81340_FLASHBASE,
+        .end   = 0,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device iq8134x_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = { .platform_data  = &iq8134x_flash_data, },
+        .num_resources  = 1,
+        .resource       = &iq8134x_flash_resource,
+};
+
+static unsigned long iq8134x_probe_flash_size(void)
+{
+        uint8_t __iomem *flash_addr = ioremap(IQ81340_FLASHBASE, PAGE_SIZE);
+        int i;
+        char query[3];
+        unsigned long size = 0;
+        int width = iq8134x_flash_data.width;
+
+        if (flash_addr) {
+                /* send CFI 'query' command */
+                writew(0x98, flash_addr);
+
+                /* check for CFI compliance */
+                for (i = 0; i < 3 * width; i += width)
+                        query[i / width] = readb(flash_addr + (0x10 * width) + i);
+
+                /* read the size */
+                if (memcmp(query, "QRY", 3) == 0)
+                        size = 1 << readb(flash_addr + (0x27 * width));
+
+                /* send CFI 'read array' command */
+                writew(0xff, flash_addr);
+
+                iounmap(flash_addr);
+        }
+
+        return size;
+}
+#endif
+
+void __init iop13xx_map_io(void)
+{
+        /* Initialize the Static Page Table maps */
+        iotable_init(iop13xx_std_desc, ARRAY_SIZE(iop13xx_std_desc));
+}
+
+static int init_uart = 0;
+static int init_i2c = 0;
+
+void __init iop13xx_platform_init(void)
+{
+        int i;
+        u32 uart_idx, i2c_idx, plat_idx;
+        struct platform_device *iop13xx_devices[IQ81340_MAX_PLAT_DEVICES];
+
+        /* set the bases so we can read the device id */
+        iop13xx_set_atu_mmr_bases();
+
+        memset(iop13xx_devices, 0, sizeof(iop13xx_devices));
+
+        if (init_uart == IOP13XX_INIT_UART_DEFAULT) {
+                switch (iop13xx_dev_id()) {
+                /* enable both uarts on iop341 and iop342 */
+                case 0x3380:
+                case 0x3384:
+                case 0x3388:
+                case 0x338c:
+                case 0x3382:
+                case 0x3386:
+                case 0x338a:
+                case 0x338e:
+                        init_uart |= IOP13XX_INIT_UART_0;
+                        init_uart |= IOP13XX_INIT_UART_1;
+                        break;
+                /* only enable uart 1 */
+                default:
+                        init_uart |= IOP13XX_INIT_UART_1;
+                }
+        }
+
+        if (init_i2c == IOP13XX_INIT_I2C_DEFAULT) {
+                switch (iop13xx_dev_id()) {
+                /* enable all i2c units on iop341 and iop342 */
+                case 0x3380:
+                case 0x3384:
+                case 0x3388:
+                case 0x338c:
+                case 0x3382:
+                case 0x3386:
+                case 0x338a:
+                case 0x338e:
+                        init_i2c |= IOP13XX_INIT_I2C_0;
+                        init_i2c |= IOP13XX_INIT_I2C_1;
+                        init_i2c |= IOP13XX_INIT_I2C_2;
+                        break;
+                /* only enable i2c 1 and 2 */
+                default:
+                        init_i2c |= IOP13XX_INIT_I2C_1;
+                        init_i2c |= IOP13XX_INIT_I2C_2;
+                }
+        }
+
+        plat_idx = 0;
+        uart_idx = 0;
+        i2c_idx = 0;
+
+        /* uart 1 (if enabled) is ttyS0 */
+        if (init_uart & IOP13XX_INIT_UART_1) {
+                PRINTK("Adding uart1 to platform device list\n");
+                iop13xx_uart1.id = uart_idx++;
+                iop13xx_devices[plat_idx++] = &iop13xx_uart1;
+        }
+        if (init_uart & IOP13XX_INIT_UART_0) {
+                PRINTK("Adding uart0 to platform device list\n");
+                iop13xx_uart0.id = uart_idx++;
+                iop13xx_devices[plat_idx++] = &iop13xx_uart0;
+        }
+
+        for(i = 0; i < IQ81340_NUM_I2C; i++) {
+                if ((init_i2c & (1 << i)) && IOP13XX_SETUP_DEBUG)
+                        printk("Adding i2c%d to platform device list\n", i);
+                switch(init_i2c & (1 << i)) {
+                case IOP13XX_INIT_I2C_0:
+                        iop13xx_i2c_0_controller.id = i2c_idx++;
+                        iop13xx_devices[plat_idx++] =
+                                &iop13xx_i2c_0_controller;
+                        break;
+                case IOP13XX_INIT_I2C_1:
+                        iop13xx_i2c_1_controller.id = i2c_idx++;
+                        iop13xx_devices[plat_idx++] =
+                                &iop13xx_i2c_1_controller;
+                        break;
+                case IOP13XX_INIT_I2C_2:
+                        iop13xx_i2c_2_controller.id = i2c_idx++;
+                        iop13xx_devices[plat_idx++] =
+                                &iop13xx_i2c_2_controller;
+                        break;
+                }
+        }
+
+#ifdef CONFIG_MTD_PHYSMAP
+        iq8134x_flash_resource.end = iq8134x_flash_resource.start +
+                                iq8134x_probe_flash_size();
+        if (iq8134x_flash_resource.end > iq8134x_flash_resource.start)
+                iop13xx_devices[plat_idx++] = &iq8134x_flash;
+        else
+                printk(KERN_ERR "%s: Failed to probe flash size\n", __FUNCTION__);
+#endif
+
+        platform_add_devices(iop13xx_devices, plat_idx);
+}
+
+static int __init iop13xx_init_uart_setup(char *str)
+{
+        if (str) {
+                while (*str != '\0') {
+                        switch(*str) {
+                        case '0':
+                                init_uart |= IOP13XX_INIT_UART_0;
+                                break;
+                        case '1':
+                                init_uart |= IOP13XX_INIT_UART_1;
+                                break;
+                        case ',':
+                        case '=':
+                                break;
+                        default:
+                                PRINTK("\"iop13xx_init_uart\" malformed"
+                                            " at character: \'%c\'", *str);
+                                *(str + 1) = '\0';
+                                init_uart = IOP13XX_INIT_UART_DEFAULT;
+                        }
+                        str++;
+                }
+        }
+        return 1;
+}
+
+static int __init iop13xx_init_i2c_setup(char *str)
+{
+        if (str) {
+                while (*str != '\0') {
+                        switch(*str) {
+                        case '0':
+                                init_i2c |= IOP13XX_INIT_I2C_0;
+                                break;
+                        case '1':
+                                init_i2c |= IOP13XX_INIT_I2C_1;
+                                break;
+                        case '2':
+                                init_i2c |= IOP13XX_INIT_I2C_2;
+                                break;
+                        case ',':
+                        case '=':
+                                break;
+                        default:
+                                PRINTK("\"iop13xx_init_i2c\" malformed"
+                                            " at character: \'%c\'", *str);
+                                *(str + 1) = '\0';
+                                init_i2c = IOP13XX_INIT_I2C_DEFAULT;
+                        }
+                        str++;
+                }
+        }
+        return 1;
+}
+
+__setup("iop13xx_init_uart", iop13xx_init_uart_setup);
+__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c
new file mode 100644
index 000000000000..8b21365f653f
--- /dev/null
+++ b/arch/arm/mach-iop13xx/time.c
@@ -0,0 +1,102 @@
+/*
+ * arch/arm/mach-iop13xx/time.c
+ *
+ * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)
+ *
+ * Author: Deepak Saxena <dsaxena@mvista.com>
+ *
+ * Copyright 2002-2003 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/time.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/time.h>
+
+static unsigned long ticks_per_jiffy;
+static unsigned long ticks_per_usec;
+static unsigned long next_jiffy_time;
+
+static inline u32 read_tcr1(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
+        return val;
+}
+
+unsigned long iop13xx_gettimeoffset(void)
+{
+        unsigned long offset;
+        u32 cp_flags;
+
+        cp_flags = iop13xx_cp6_save();
+        offset = next_jiffy_time - read_tcr1();
+        iop13xx_cp6_restore(cp_flags);
+
+        return offset / ticks_per_usec;
+}
+
+static irqreturn_t
+iop13xx_timer_interrupt(int irq, void *dev_id)
+{
+        u32 cp_flags = iop13xx_cp6_save();
+
+        write_seqlock(&xtime_lock);
+
+        asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
+
+        while ((signed long)(next_jiffy_time - read_tcr1())
+                                                        >= ticks_per_jiffy) {
+                timer_tick();
+                next_jiffy_time -= ticks_per_jiffy;
+        }
+
+        write_sequnlock(&xtime_lock);
+
+        iop13xx_cp6_restore(cp_flags);
+
+        return IRQ_HANDLED;
+}
+
+static struct irqaction iop13xx_timer_irq = {
+        .name           = "IOP13XX Timer Tick",
+        .handler        = iop13xx_timer_interrupt,
+        .flags          = IRQF_DISABLED | IRQF_TIMER,
+};
+
+void __init iop13xx_init_time(unsigned long tick_rate)
+{
+        u32 timer_ctl;
+        u32 cp_flags;
+
+        ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
+        ticks_per_usec = tick_rate / 1000000;
+        next_jiffy_time = 0xffffffff;
+
+        timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |
+                        IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;
+
+        /*
+         * We use timer 0 for our timer interrupt, and timer 1 as
+         * monotonic counter for tracking missed jiffies.
+         */
+        cp_flags = iop13xx_cp6_save();
+        asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));
+        asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));
+        asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));
+        asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));
+        iop13xx_cp6_restore(cp_flags);
+
+        setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);
+}
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index 69d6302f40cf..3ec1cd5c4f99 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -70,7 +70,7 @@ void __init iop32x_init_irq(void)
 
         for (i = 0; i < NR_IRQS; i++) {
                 set_irq_chip(i, &ext_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
         }
 }
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index 63304b3d0d76..00b37f32d72e 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -121,7 +121,7 @@ void __init iop33x_init_irq(void)
 
         for (i = 0; i < NR_IRQS; i++) {
                 set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
         }
 }
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 22c98e9dad28..27b7480f4afe 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -308,7 +308,7 @@ EXPORT_SYMBOL(gpio_line_config);
 /*************************************************************************
  * IRQ handling IXP2000
  *************************************************************************/
-static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)
 {                               
         int i;
         unsigned long status = *IXP2000_GPIO_INST;
@@ -373,7 +373,7 @@ static void ixp2000_GPIO_irq_unmask(unsigned int irq)
         ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
 }
 
-static struct irqchip ixp2000_GPIO_irq_chip = {
+static struct irq_chip ixp2000_GPIO_irq_chip = {
         .ack            = ixp2000_GPIO_irq_mask_ack,
         .mask           = ixp2000_GPIO_irq_mask,
         .unmask         = ixp2000_GPIO_irq_unmask,
@@ -401,7 +401,7 @@ static void ixp2000_pci_irq_unmask(unsigned int irq)
 /*
  * Error interrupts. These are used extensively by the microengine drivers
  */
-static void ixp2000_err_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         int i;
         unsigned long status = *IXP2000_IRQ_ERR_STATUS;
@@ -426,13 +426,13 @@ static void ixp2000_err_irq_unmask(unsigned int irq)
                         (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
 }
 
-static struct irqchip ixp2000_err_irq_chip = {
+static struct irq_chip ixp2000_err_irq_chip = {
         .ack    = ixp2000_err_irq_mask,
         .mask   = ixp2000_err_irq_mask,
         .unmask = ixp2000_err_irq_unmask
 };
 
-static struct irqchip ixp2000_pci_irq_chip = {
+static struct irq_chip ixp2000_pci_irq_chip = {
         .ack    = ixp2000_pci_irq_mask,
         .mask   = ixp2000_pci_irq_mask,
         .unmask = ixp2000_pci_irq_unmask
@@ -448,7 +448,7 @@ static void ixp2000_irq_unmask(unsigned int irq)
         ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq));
 }
 
-static struct irqchip ixp2000_irq_chip = {
+static struct irq_chip ixp2000_irq_chip = {
         .ack    = ixp2000_irq_mask,
         .mask   = ixp2000_irq_mask,
         .unmask = ixp2000_irq_unmask
@@ -484,7 +484,7 @@ void __init ixp2000_init_irq(void)
         for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) {
                 if ((1 << irq) & IXP2000_VALID_IRQ_MASK) {
                         set_irq_chip(irq, &ixp2000_irq_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, IRQF_VALID);
                 } else set_irq_flags(irq, 0);
         }
@@ -493,7 +493,7 @@ void __init ixp2000_init_irq(void)
                 if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) &
                                 IXP2000_VALID_ERR_IRQ_MASK) {
                         set_irq_chip(irq, &ixp2000_err_irq_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, IRQF_VALID);
                 }
                 else
@@ -503,7 +503,7 @@ void __init ixp2000_init_irq(void)
 
         for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) {
                 set_irq_chip(irq, &ixp2000_GPIO_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
         set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
@@ -516,7 +516,7 @@ void __init ixp2000_init_irq(void)
         ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
         for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {
                 set_irq_chip(irq, &ixp2000_pci_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index aa2655092d2d..52b368b34346 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -106,7 +106,7 @@ static void ixdp2x00_irq_unmask(unsigned int irq)
                 ixp2000_release_slowport(&old_cfg);
 }
 
-static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         volatile u32 ex_interrupt = 0;
         static struct slowport_cfg old_cfg;
@@ -129,7 +129,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc)
 
         for(i = 0; i < board_irq_count; i++) {
                 if(ex_interrupt & (1 << i))  {
-                        struct irqdesc *cpld_desc;
+                        struct irq_desc *cpld_desc;
                         int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
                         cpld_desc = irq_desc + cpld_irq;
                         desc_handle_irq(cpld_irq, cpld_desc);
@@ -139,7 +139,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc)
         desc->chip->unmask(irq);
 }
 
-static struct irqchip ixdp2x00_cpld_irq_chip = {
+static struct irq_chip ixdp2x00_cpld_irq_chip = {
         .ack    = ixdp2x00_irq_mask,
         .mask   = ixdp2x00_irq_mask,
         .unmask = ixdp2x00_irq_unmask
@@ -162,7 +162,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long
 
         for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
                 set_irq_chip(irq, &ixdp2x00_cpld_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 9ccae9e63f70..3084a5fa751c 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -63,7 +63,7 @@ static void ixdp2x01_irq_unmask(unsigned int irq)
 
 static u32 valid_irq_mask;
 
-static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         u32 ex_interrupt;
         int i;
@@ -79,7 +79,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc)
 
         for (i = 0; i < IXP2000_BOARD_IRQS; i++) {
                 if (ex_interrupt & (1 << i)) {
-                        struct irqdesc *cpld_desc;
+                        struct irq_desc *cpld_desc;
                         int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
                         cpld_desc = irq_desc + cpld_irq;
                         desc_handle_irq(cpld_irq, cpld_desc);
@@ -89,7 +89,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc)
         desc->chip->unmask(irq);
 }
 
-static struct irqchip ixdp2x01_irq_chip = {
+static struct irq_chip ixdp2x01_irq_chip = {
         .mask   = ixdp2x01_irq_mask,
         .ack    = ixdp2x01_irq_mask,
         .unmask = ixdp2x01_irq_unmask
@@ -119,7 +119,7 @@ void __init ixdp2x01_init_irq(void)
         for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
                 if (irq & valid_irq_mask) {
                         set_irq_chip(irq, &ixdp2x01_irq_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, IRQF_VALID);
                 } else {
                         set_irq_flags(irq, 0);
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index d4bf1e1c0031..5a09a90c08fb 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -32,7 +32,7 @@
 
 #include <asm/mach/pci.h>
 
-static int pci_master_aborts = 0;
+static volatile int pci_master_aborts = 0;
 
 static int clear_master_aborts(void);
 
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index a704a1820048..ce6ad635a00c 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -224,14 +224,14 @@ static void ixp23xx_irq_edge_unmask(unsigned int irq)
         *intr_reg |= (1 << (irq % 32));
 }
 
-static struct irqchip ixp23xx_irq_level_chip = {
+static struct irq_chip ixp23xx_irq_level_chip = {
         .ack            = ixp23xx_irq_mask,
         .mask           = ixp23xx_irq_mask,
         .unmask         = ixp23xx_irq_level_unmask,
         .set_type       = ixp23xx_irq_set_type
 };
 
-static struct irqchip ixp23xx_irq_edge_chip = {
+static struct irq_chip ixp23xx_irq_edge_chip = {
         .ack            = ixp23xx_irq_ack,
         .mask           = ixp23xx_irq_mask,
         .unmask         = ixp23xx_irq_edge_unmask,
@@ -251,11 +251,11 @@ static void ixp23xx_pci_irq_unmask(unsigned int irq)
 /*
  * TODO: Should this just be done at ASM level?
  */
-static void pci_handler(unsigned int irq, struct irqdesc *desc)
+static void pci_handler(unsigned int irq, struct irq_desc *desc)
 {
         u32 pci_interrupt;
         unsigned int irqno;
-        struct irqdesc *int_desc;
+        struct irq_desc *int_desc;
 
         pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
 
@@ -276,7 +276,7 @@ static void pci_handler(unsigned int irq, struct irqdesc *desc)
         desc->chip->unmask(irq);
 }
 
-static struct irqchip ixp23xx_pci_irq_chip = {
+static struct irq_chip ixp23xx_pci_irq_chip = {
         .ack    = ixp23xx_pci_irq_mask,
         .mask   = ixp23xx_pci_irq_mask,
         .unmask = ixp23xx_pci_irq_unmask
@@ -287,11 +287,11 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
         switch (type) {
         case IXP23XX_IRQ_LEVEL:
                 set_irq_chip(irq, &ixp23xx_irq_level_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 break;
         case IXP23XX_IRQ_EDGE:
                 set_irq_chip(irq, &ixp23xx_irq_edge_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 break;
         }
         set_irq_flags(irq, IRQF_VALID);
@@ -322,7 +322,7 @@ void __init ixp23xx_init_irq(void)
 
         for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) {
                 set_irq_chip(irq, &ixp23xx_pci_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b6ab0e8bb5e8..7a86a2516eaa 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -60,7 +60,7 @@ static void ixdp2351_inta_unmask(unsigned int irq)
         *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
 }
 
-static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc)
+static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
 {
         u16 ex_interrupt =
                 *IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
@@ -70,7 +70,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc)
 
         for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
                 if (ex_interrupt & (1 << i)) {
-                        struct irqdesc *cpld_desc;
+                        struct irq_desc *cpld_desc;
                         int cpld_irq =
                                 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
                         cpld_desc = irq_desc + cpld_irq;
@@ -81,7 +81,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc)
         desc->chip->unmask(irq);
 }
 
-static struct irqchip ixdp2351_inta_chip = {
+static struct irq_chip ixdp2351_inta_chip = {
         .ack    = ixdp2351_inta_mask,
         .mask   = ixdp2351_inta_mask,
         .unmask = ixdp2351_inta_unmask
@@ -97,7 +97,7 @@ static void ixdp2351_intb_unmask(unsigned int irq)
         *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
 }
 
-static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc)
+static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
 {
         u16 ex_interrupt =
                 *IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
@@ -107,7 +107,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc)
 
         for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
                 if (ex_interrupt & (1 << i)) {
-                        struct irqdesc *cpld_desc;
+                        struct irq_desc *cpld_desc;
                         int cpld_irq =
                                 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
                         cpld_desc = irq_desc + cpld_irq;
@@ -118,7 +118,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc)
         desc->chip->unmask(irq);
 }
 
-static struct irqchip ixdp2351_intb_chip = {
+static struct irq_chip ixdp2351_intb_chip = {
         .ack    = ixdp2351_intb_mask,
         .mask   = ixdp2351_intb_mask,
         .unmask = ixdp2351_intb_unmask
@@ -142,7 +142,7 @@ void ixdp2351_init_irq(void)
              irq++) {
                 if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) {
                         set_irq_flags(irq, IRQF_VALID);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_chip(irq, &ixdp2351_inta_chip);
                 }
         }
@@ -153,7 +153,7 @@ void ixdp2351_init_irq(void)
              irq++) {
                 if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) {
                         set_irq_flags(irq, IRQF_VALID);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_chip(irq, &ixdp2351_intb_chip);
                 }
         }
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 3b34fa35e36b..ac7d43d23c28 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -36,7 +36,7 @@
 
 extern int (*external_fault) (unsigned long, struct pt_regs *);
 
-static int pci_master_aborts = 0;
+static volatile int pci_master_aborts = 0;
 
 #ifdef DEBUG
 #define DBG(x...)       printk(x)
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fbe288a8da65..2ec9a9e9a04d 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -28,6 +28,7 @@
 #include <linux/timex.h>
 #include <linux/clocksource.h>
 
+#include <asm/arch/udc.h>
 #include <asm/hardware.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
@@ -39,6 +40,8 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
+static int __init ixp4xx_clocksource_init(void);
+
 /*************************************************************************
  * IXP4xx chipset I/O mapping
  *************************************************************************/
@@ -195,7 +198,7 @@ static void ixp4xx_irq_unmask(unsigned int irq)
                 *IXP4XX_ICMR |= (1 << irq);
 }
 
-static struct irqchip ixp4xx_irq_chip = {
+static struct irq_chip ixp4xx_irq_chip = {
         .name           = "IXP4xx",
         .ack            = ixp4xx_irq_ack,
         .mask           = ixp4xx_irq_mask,
@@ -224,7 +227,7 @@ void __init ixp4xx_init_irq(void)
         /* Default to all level triggered */
         for(i = 0; i < NR_IRQS; i++) {
                 set_irq_chip(i, &ixp4xx_irq_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID);
         }
 }
@@ -280,12 +283,52 @@ static void __init ixp4xx_timer_init(void)
 
         /* Connect the interrupt handler and enable the interrupt */
         setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq);
+
+        ixp4xx_clocksource_init();
 }
 
 struct sys_timer ixp4xx_timer = {
         .init           = ixp4xx_timer_init,
 };
 
+static struct pxa2xx_udc_mach_info ixp4xx_udc_info;
+
+void __init ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info)
+{
+        memcpy(&ixp4xx_udc_info, info, sizeof *info);
+}
+
+static struct resource ixp4xx_udc_resources[] = {
+        [0] = {
+                .start  = 0xc800b000,
+                .end    = 0xc800bfff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_IXP4XX_USB,
+                .end    = IRQ_IXP4XX_USB,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+/*
+ * USB device controller. The IXP4xx uses the same controller as PXA2XX,
+ * so we just use the same device.
+ */
+static struct platform_device ixp4xx_udc_device = {
+        .name           = "pxa2xx-udc",
+        .id             = -1,
+        .num_resources  = 2,
+        .resource       = ixp4xx_udc_resources,
+        .dev            = {
+                .platform_data = &ixp4xx_udc_info,
+        },
+};
+
+static struct platform_device *ixp4xx_devices[] __initdata = {
+        &ixp4xx_udc_device,
+};
+
 static struct resource ixp46x_i2c_resources[] = {
         [0] = {
                 .start  = 0xc8011000,
@@ -321,6 +364,8 @@ void __init ixp4xx_sys_init(void)
 {
         ixp4xx_exp_bus_size = SZ_16M;
 
+        platform_add_devices(ixp4xx_devices, ARRAY_SIZE(ixp4xx_devices));
+
         if (cpu_is_ixp46x()) {
                 int region;
 
@@ -363,5 +408,3 @@ static int __init ixp4xx_clocksource_init(void)
 
         return 0;
 }
-
-device_initcall(ixp4xx_clocksource_init);
diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c
index b7af5640ea7b..561a0fe7095d 100644
--- a/arch/arm/mach-l7200/core.c
+++ b/arch/arm/mach-l7200/core.c
@@ -55,7 +55,7 @@ static void l7200_unmask_irq(unsigned int irq)
         IRQ_ENABLE = 1 << irq;
 }
 
-static struct irqchip l7200_irq_chip = {
+static struct irq_chip l7200_irq_chip = {
         .ack            = l7200_mask_irq,
         .mask           = l7200_mask_irq,
         .unmask         = l7200_unmask_irq
@@ -71,7 +71,7 @@ static void __init l7200_init_irq(void)
         for (irq = 0; irq < NR_IRQS; irq++) {
                 set_irq_chip(irq, &l7200_irq_chip);
                 set_irq_flags(irq, IRQF_VALID);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
         }
 
         init_FIQ();
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index 15fbcc911fe7..6d26661d99f6 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -71,7 +71,7 @@ static struct irq_chip kev7a400_cpld_chip = {
 };
 
 
-static void kev7a400_cpld_handler (unsigned int irq, struct irqdesc *desc)
+static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
         u32 mask = CPLD_LATCHED_INTS;
         irq = IRQ_KEV7A400_CPLD;
@@ -88,7 +88,7 @@ void __init lh7a40x_init_board_irq (void)
         for (irq = IRQ_KEV7A400_CPLD;
              irq < IRQ_KEV7A400_CPLD + NR_IRQ_BOARD; ++irq) {
                 set_irq_chip (irq, &kev7a400_cpld_chip);
-                set_irq_handler (irq, do_edge_IRQ);
+                set_irq_handler (irq, handle_edge_irq);
                 set_irq_flags (irq, IRQF_VALID);
         }
         set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler);
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 8441e0a156cb..fe64946f9e18 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -207,7 +207,7 @@ static struct irq_chip lpd7a40x_cpld_chip = {
         .unmask = lh7a40x_unmask_cpld_irq,
 };
 
-static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc)
+static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
         unsigned int mask = CPLD_INTERRUPTS;
 
@@ -279,7 +279,7 @@ void __init lh7a40x_init_board_irq (void)
         for (irq = IRQ_BOARD_START;
              irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) {
                 set_irq_chip (irq, &lpd7a40x_cpld_chip);
-                set_irq_handler (irq, do_level_IRQ);
+                set_irq_handler (irq, handle_level_irq);
                 set_irq_flags (irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-lh7a40x/irq-kev7a400.c b/arch/arm/mach-lh7a40x/irq-kev7a400.c
index 646071334b8f..c7433b3c5812 100644
--- a/arch/arm/mach-lh7a40x/irq-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-kev7a400.c
@@ -51,7 +51,7 @@ irq_chip lh7a400_cpld_chip = {
 };
 
 static void
-lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc)
+lh7a400_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
         u32 mask = CPLD_LATCHED_INTS;
         irq = IRQ_KEV_7A400_CPLD;
@@ -71,7 +71,7 @@ lh7a400_init_board_irq (void)
         for (irq = IRQ_KEV7A400_CPLD;
              irq < IRQ_KEV7A400_CPLD + NR_IRQ_KEV7A400_CPLD; ++irq) {
                 set_irq_chip (irq, &lh7a400_cpld_chip);
-                set_irq_handler (irq, do_edge_IRQ);
+                set_irq_handler (irq, handle_edge_irq);
                 set_irq_flags (irq, IRQF_VALID);
         }
         set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler);
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c
index 091b2dc58d25..0b938e8b4d98 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c
@@ -74,11 +74,11 @@ void __init lh7a400_init_irq (void)
                 case IRQ_GPIO6INTR:
                 case IRQ_GPIO7INTR:
                         set_irq_chip (irq, &lh7a400_gpio_chip);
-                        set_irq_handler (irq, do_level_IRQ); /* OK default */
+                        set_irq_handler (irq, handle_level_irq); /* OK default */
                         break;
                 default:
                         set_irq_chip (irq, &lh7a400_internal_chip);
-                        set_irq_handler (irq, do_level_IRQ);
+                        set_irq_handler (irq, handle_level_irq);
                 }
                 set_irq_flags (irq, IRQF_VALID);
         }
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c
index 7059b983724f..5760f8c53e89 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -161,13 +161,13 @@ void __init lh7a404_init_irq (void)
                         set_irq_chip (irq, irq < 32
                                       ? &lh7a404_gpio_vic1_chip
                                       : &lh7a404_gpio_vic2_chip);
-                        set_irq_handler (irq, do_level_IRQ); /* OK default */
+                        set_irq_handler (irq, handle_level_irq); /* OK default */
                         break;
                 default:
                         set_irq_chip (irq, irq < 32
                                       ? &lh7a404_vic1_chip
                                       : &lh7a404_vic2_chip);
-                        set_irq_handler (irq, do_level_IRQ);
+                        set_irq_handler (irq, handle_level_irq);
                 }
                 set_irq_flags (irq, IRQF_VALID);
         }
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
index b20376804bbb..15b9577023c9 100644
--- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -57,7 +57,7 @@ static struct irq_chip lh7a40x_cpld_chip = {
         .unmask = lh7a40x_unmask_cpld_irq,
 };
 
-static void lh7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc)
+static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
 {
         unsigned int mask = CPLD_INTERRUPTS;
 
@@ -118,7 +118,7 @@ void __init lh7a40x_init_board_irq (void)
         for (irq = IRQ_BOARD_START;
              irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) {
                 set_irq_chip (irq, &lh7a40x_cpld_chip);
-                set_irq_handler (irq, do_edge_IRQ);
+                set_irq_handler (irq, handle_edge_irq);
                 set_irq_flags (irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index edbbbdc3b06b..b9ca8f98265d 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -69,7 +69,7 @@ static struct platform_device *devices[] __initdata = {
 #endif
 
 static void
-netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc)
+netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 {
         unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
         unsigned int stat;
@@ -160,7 +160,7 @@ netx_hif_unmask_irq(unsigned int _irq)
         DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
 }
 
-static struct irqchip netx_hif_chip = {
+static struct irq_chip netx_hif_chip = {
         .ack = netx_hif_ack_irq,
         .mask = netx_hif_mask_irq,
         .unmask = netx_hif_unmask_irq,
@@ -175,7 +175,7 @@ void __init netx_init_irq(void)
 
         for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
                 set_irq_chip(irq, &netx_hif_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 8e40208b10bb..30e188109046 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -84,9 +84,9 @@ static void fpga_mask_ack_irq(unsigned int irq)
         fpga_ack_irq(irq);
 }
 
-void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc)
+void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
 {
-        struct irqdesc *d;
+        struct irq_desc *d;
         u32 stat;
         int fpga_irq;
 
@@ -168,7 +168,7 @@ void omap1510_fpga_init_irq(void)
                         set_irq_chip(i, &omap_fpga_irq);
                 }
 
-                set_irq_handler(i, do_edge_IRQ);
+                set_irq_handler(i, handle_edge_irq);
                 set_irq_flags(i, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 3ea140bb9eba..6383a12ad970 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -229,7 +229,7 @@ void __init omap_init_irq(void)
                         omap_irq_set_cfg(j, 0, 0, irq_trigger);
 
                         set_irq_chip(j, &omap_irq_chip);
-                        set_irq_handler(j, do_level_IRQ);
+                        set_irq_handler(j, handle_level_irq);
                         set_irq_flags(j, IRQF_VALID);
                 }
         }
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 11870093d7a1..a39d30680300 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -130,7 +130,7 @@ void __init omap_init_irq(void)
 
         for (i = 0; i < nr_irqs; i++) {
                 set_irq_chip(i, &omap_irq_chip);
-                set_irq_handler(i, do_level_IRQ);
+                set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID);
         }
 }
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index 3a4bcf3d91fa..968d0b027597 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -59,22 +59,22 @@ static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
         case IRQT_RISING:
                 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));        /*edge sensitive */
                 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));        /*rising edge */
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 break;
         case IRQT_FALLING:
                 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));        /*edge sensitive */
                 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));       /*falling edge */
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 break;
         case IRQT_LOW:
                 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));       /*level sensitive */
                 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));       /*low level */
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 break;
         case IRQT_HIGH:
                 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));       /*level sensitive */
                 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));        /* high level */
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 break;
 
         /* IRQT_BOTHEDGE is not supported */
@@ -85,7 +85,7 @@ static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
         return 0;
 }
 
-static struct irqchip pnx4008_irq_chip = {
+static struct irq_chip pnx4008_irq_chip = {
         .ack = pnx4008_mask_ack_irq,
         .mask = pnx4008_mask_irq,
         .unmask = pnx4008_unmask_irq,
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 03d07cae26c8..9e3d0bdcba07 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -13,12 +13,10 @@ config ARCH_LUBBOCK
 config MACH_LOGICPD_PXA270
         bool "LogicPD PXA270 Card Engine Development Platform"
         select PXA27x
-        select IWMMXT
 
 config MACH_MAINSTONE
         bool "Intel HCDDBBVA0 Development Platform"
         select PXA27x
-        select IWMMXT
 
 config ARCH_PXA_IDP
         bool "Accelent Xscale IDP"
@@ -53,7 +51,6 @@ config PXA_SHARPSL_25x
 config PXA_SHARPSL_27x
         bool "Sharp PXA270 models (SL-Cxx00)"
         select PXA27x
-        select IWMMXT
 
 endchoice
 
@@ -129,11 +126,6 @@ config PXA27x
         help
           Select code specific to PXA27x variants
 
-config IWMMXT
-        bool
-        help
-          Enable support for iWMMXt
-
 config PXA_SHARP_C7xx
         bool
         select PXA_SSP
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 45fb2c3bcf82..6ae605857ca9 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,6 +25,10 @@
 #include <linux/pm.h>
 #include <linux/string.h>
 
+#include <linux/sched.h>
+#include <asm/cnt32_to_63.h>
+#include <asm/div64.h>
+
 #include <asm/hardware.h>
 #include <asm/irq.h>
 #include <asm/system.h>
@@ -41,6 +45,62 @@
 #include "generic.h"
 
 /*
+ * This is the PXA2xx sched_clock implementation. This has a resolution
+ * of at least 308ns and a maximum value that depends on the value of
+ * CLOCK_TICK_RATE.
+ *
+ * The return value is guaranteed to be monotonic in that range as
+ * long as there is always less than 582 seconds between successive
+ * calls to this function.
+ */
+unsigned long long sched_clock(void)
+{
+        unsigned long long v = cnt32_to_63(OSCR);
+        /* Note: top bit ov v needs cleared unless multiplier is even. */
+
+#if     CLOCK_TICK_RATE == 3686400
+        /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */
+        /* The <<1 is used to get rid of tick.hi top bit */
+        v *= 78125<<1;
+        do_div(v, 288<<1);
+#elif   CLOCK_TICK_RATE == 3250000
+        /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */
+        v *= 4000;
+        do_div(v, 13);
+#elif   CLOCK_TICK_RATE == 3249600
+        /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */
+        v *= 625000;
+        do_div(v, 2031);
+#else
+#warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE"
+        /*
+         * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
+         * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
+         * years range which is nice, but with higher computation cost.
+         */
+        {
+                union {
+                        unsigned long long val;
+                        struct { unsigned long lo, hi; };
+                } x;
+                unsigned long long y;
+
+                x.val = v;
+                x.hi &= 0x7fffffff;
+                y = (unsigned long long)x.lo * NSEC_PER_SEC;
+                x.lo = y;
+                y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC;
+                x.hi = do_div(y, CLOCK_TICK_RATE);
+                do_div(x.val, CLOCK_TICK_RATE);
+                x.hi += y;
+                v = x.val;
+        }
+#endif
+
+        return v;
+}
+
+/*
  * Handy function to set GPIO alternate functions
  */
 
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index ab1a16025d51..f815678a9d63 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -143,7 +143,7 @@ static struct irq_chip pxa_low_gpio_chip = {
  * Demux handler for GPIO>=2 edge detect interrupts
  */
 
-static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc)
+static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int mask;
         int loop;
@@ -286,27 +286,27 @@ void __init pxa_init_irq(void)
 
         for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) {
                 set_irq_chip(irq, &pxa_internal_chip_low);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
 #if PXA_INTERNAL_IRQS > 32
         for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) {
                 set_irq_chip(irq, &pxa_internal_chip_high);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 #endif
 
         for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
                 set_irq_chip(irq, &pxa_low_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(PXA_LAST_GPIO); irq++) {
                 set_irq_chip(irq, &pxa_muxed_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 5749f6b72e12..8e27a64fa9f4 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -75,7 +75,7 @@ static struct irq_chip lpd270_irq_chip = {
         .unmask         = lpd270_unmask_irq,
 };
 
-static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending;
 
@@ -105,7 +105,7 @@ static void __init lpd270_init_irq(void)
         /* setup extra LogicPD PXA270 irqs */
         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
                 set_irq_chip(irq, &lpd270_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 142c33c3dff5..055de7f4f00a 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -85,7 +85,7 @@ static struct irq_chip lubbock_irq_chip = {
         .unmask         = lubbock_unmask_irq,
 };
 
-static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
         do {
@@ -108,7 +108,7 @@ static void __init lubbock_init_irq(void)
         /* setup extra lubbock irqs */
         for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
                 set_irq_chip(irq, &lubbock_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 49c34d94a9fe..56d94d88d5ca 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -71,7 +71,7 @@ static struct irq_chip mainstone_irq_chip = {
         .unmask         = mainstone_unmask_irq,
 };
 
-static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
         do {
@@ -94,7 +94,7 @@ static void __init mainstone_init_irq(void)
         /* setup extra Mainstone irqs */
         for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
                 set_irq_chip(irq, &mainstone_irq_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
                 else
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 2112c414f0e2..b4d8276d6050 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -83,7 +83,8 @@ int pxa_pm_enter(suspend_state_t state)
 
 #ifdef CONFIG_IWMMXT
         /* force any iWMMXt context to ram **/
-        iwmmxt_task_disable(NULL);
+        if (elf_hwcap & HWCAP_IWMMXT)
+                iwmmxt_task_disable(NULL);
 #endif
 
         /* preserve current time */
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 3ac268fa419b..b91466861029 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -124,6 +124,7 @@ static struct irqaction pxa_timer_irq = {
 static void __init pxa_timer_init(void)
 {
         struct timespec tv;
+        unsigned long flags;
 
         set_rtc = pxa_set_rtc;
 
@@ -132,12 +133,12 @@ static void __init pxa_timer_init(void)
         do_settimeofday(&tv);
 
         OIER = 0;               /* disable any timer interrupts */
-        OSCR = LATCH*2;         /* push OSCR out of the way */
-        OSMR0 = LATCH;          /* set initial match */
         OSSR = 0xf;             /* clear status on all timers */
         setup_irq(IRQ_OST0, &pxa_timer_irq);
+        local_irq_save(flags);
         OIER = OIER_E0;         /* enable match on timer 0 to cause interrupts */
-        OSCR = 0;               /* initialize free-running timer */
+        OSMR0 = OSCR + LATCH;   /* set initial match */
+        local_irq_restore(flags);
 }
 
 #ifdef CONFIG_NO_IDLE_HZ
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index 56b2716f8cf5..7a029621db43 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -34,7 +34,7 @@ static void iomd_unmask_irq_a(unsigned int irq)
         iomd_writeb(val | mask, IOMD_IRQMASKA);
 }
 
-static struct irqchip iomd_a_chip = {
+static struct irq_chip iomd_a_chip = {
         .ack    = iomd_ack_irq_a,
         .mask   = iomd_mask_irq_a,
         .unmask = iomd_unmask_irq_a,
@@ -58,7 +58,7 @@ static void iomd_unmask_irq_b(unsigned int irq)
         iomd_writeb(val | mask, IOMD_IRQMASKB);
 }
 
-static struct irqchip iomd_b_chip = {
+static struct irq_chip iomd_b_chip = {
         .ack    = iomd_mask_irq_b,
         .mask   = iomd_mask_irq_b,
         .unmask = iomd_unmask_irq_b,
@@ -82,7 +82,7 @@ static void iomd_unmask_irq_dma(unsigned int irq)
         iomd_writeb(val | mask, IOMD_DMAMASK);
 }
 
-static struct irqchip iomd_dma_chip = {
+static struct irq_chip iomd_dma_chip = {
         .ack    = iomd_mask_irq_dma,
         .mask   = iomd_mask_irq_dma,
         .unmask = iomd_unmask_irq_dma,
@@ -106,7 +106,7 @@ static void iomd_unmask_irq_fiq(unsigned int irq)
         iomd_writeb(val | mask, IOMD_FIQMASK);
 }
 
-static struct irqchip iomd_fiq_chip = {
+static struct irq_chip iomd_fiq_chip = {
         .ack    = iomd_mask_irq_fiq,
         .mask   = iomd_mask_irq_fiq,
         .unmask = iomd_unmask_irq_fiq,
@@ -134,19 +134,19 @@ void __init rpc_init_irq(void)
                 switch (irq) {
                 case 0 ... 7:
                         set_irq_chip(irq, &iomd_a_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 8 ... 15:
                         set_irq_chip(irq, &iomd_b_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
                 case 16 ... 21:
                         set_irq_chip(irq, &iomd_dma_chip);
-                        set_irq_handler(irq, do_level_IRQ);
+                        set_irq_handler(irq, handle_level_irq);
                         set_irq_flags(irq, flags);
                         break;
 
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 9aa26b99045d..9f46bf330bc8 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -41,9 +41,16 @@ config BAST_PC104_IRQ
           Say Y here to enable the PC104 IRQ routing on the
           Simtec BAST (EB2410ITX)
 
+config PM_H1940
+        bool
+        depends on PM
+        help
+          Internal node for H1940 and related PM
+
 config ARCH_H1940
         bool "IPAQ H1940"
         select CPU_S3C2410
+        select PM_H1940
         help
           Say Y here if you are using the HP IPAQ H1940
 
@@ -115,6 +122,7 @@ config MACH_VR1000
 config MACH_RX3715
         bool "HP iPAQ rx3715"
         select CPU_S3C2440
+        select PM_H1940
         help
           Say Y here if you are using the HP iPAQ rx3715.
 
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index d66013365b6b..27663e28cc88 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA)	+= s3c2410-dma.o
 
 obj-$(CONFIG_PM)                += pm.o sleep.o
 obj-$(CONFIG_PM_SIMTEC)         += pm-simtec.o
+obj-$(CONFIG_PM_H1940)          += pm-h1940.o
 
 # S3C2412 support
 obj-$(CONFIG_CPU_S3C2412)       += s3c2412.o
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 23d5beea5568..379efe70778c 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -88,7 +88,7 @@ bast_pc104_mask(unsigned int irqno)
 static void
 bast_pc104_maskack(unsigned int irqno)
 {
-        struct irqdesc *desc = irq_desc + IRQ_ISA;
+        struct irq_desc *desc = irq_desc + IRQ_ISA;
 
         bast_pc104_mask(irqno);
         desc->chip->ack(IRQ_ISA);
@@ -104,7 +104,7 @@ bast_pc104_unmask(unsigned int irqno)
         __raw_writeb(temp, BAST_VA_PC104_IRQMASK);
 }
 
-static struct irqchip  bast_pc104_chip = {
+static struct irq_chip  bast_pc104_chip = {
         .mask        = bast_pc104_mask,
         .unmask      = bast_pc104_unmask,
         .ack         = bast_pc104_maskack
@@ -112,7 +112,7 @@ static struct irqchip  bast_pc104_chip = {
 
 static void
 bast_irq_pc104_demux(unsigned int irq,
-                     struct irqdesc *desc)
+                     struct irq_desc *desc)
 {
         unsigned int stat;
         unsigned int irqno;
@@ -157,7 +157,7 @@ static __init int bast_irq_init(void)
                         unsigned int irqno = bast_pc104_irqs[i];
 
                         set_irq_chip(irqno, &bast_pc104_chip);
-                        set_irq_handler(irqno, do_level_IRQ);
+                        set_irq_handler(irqno, handle_level_irq);
                         set_irq_flags(irqno, IRQF_VALID);
                 }
         }
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index 683b3491ba3c..3c0ed7871c55 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -180,7 +180,7 @@ s3c_irq_unmask(unsigned int irqno)
         __raw_writel(mask, S3C2410_INTMSK);
 }
 
-struct irqchip s3c_irq_level_chip = {
+struct irq_chip s3c_irq_level_chip = {
         .name           = "s3c-level",
         .ack            = s3c_irq_maskack,
         .mask           = s3c_irq_mask,
@@ -188,7 +188,7 @@ struct irqchip s3c_irq_level_chip = {
         .set_wake       = s3c_irq_wake
 };
 
-static struct irqchip s3c_irq_chip = {
+static struct irq_chip s3c_irq_chip = {
         .name           = "s3c",
         .ack            = s3c_irq_ack,
         .mask           = s3c_irq_mask,
@@ -206,18 +206,6 @@ s3c_irqext_mask(unsigned int irqno)
         mask = __raw_readl(S3C24XX_EINTMASK);
         mask |= ( 1UL << irqno);
         __raw_writel(mask, S3C24XX_EINTMASK);
-
-        if (irqno <= (IRQ_EINT7 - EXTINT_OFF)) {
-                /* check to see if all need masking */
-
-                if ((mask & (0xf << 4)) == (0xf << 4)) {
-                        /* all masked, mask the parent */
-                        s3c_irq_mask(IRQ_EINT4t7);
-                }
-        } else {
-                /* todo: the same check as above for the rest of the irq regs...*/
-
-        }
 }
 
 static void
@@ -229,7 +217,6 @@ s3c_irqext_ack(unsigned int irqno)
 
         bit = 1UL << (irqno - EXTINT_OFF);
 
-
         mask = __raw_readl(S3C24XX_EINTMASK);
 
         __raw_writel(bit, S3C24XX_EINTPEND);
@@ -258,8 +245,6 @@ s3c_irqext_unmask(unsigned int irqno)
         mask = __raw_readl(S3C24XX_EINTMASK);
         mask &= ~( 1UL << irqno);
         __raw_writel(mask, S3C24XX_EINTMASK);
-
-        s3c_irq_unmask((irqno <= (IRQ_EINT7 - EXTINT_OFF)) ? IRQ_EINT4t7 : IRQ_EINT8t23);
 }
 
 int
@@ -344,7 +329,7 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
         return 0;
 }
 
-static struct irqchip s3c_irqext_chip = {
+static struct irq_chip s3c_irqext_chip = {
         .name           = "s3c-ext",
         .mask           = s3c_irqext_mask,
         .unmask         = s3c_irqext_unmask,
@@ -353,7 +338,7 @@ static struct irqchip s3c_irqext_chip = {
         .set_wake       = s3c_irqext_wake
 };
 
-static struct irqchip s3c_irq_eint0t4 = {
+static struct irq_chip s3c_irq_eint0t4 = {
         .name           = "s3c-ext0",
         .ack            = s3c_irq_ack,
         .mask           = s3c_irq_mask,
@@ -390,7 +375,7 @@ s3c_irq_uart0_ack(unsigned int irqno)
         s3c_irqsub_maskack(irqno, INTMSK_UART0, 7);
 }
 
-static struct irqchip s3c_irq_uart0 = {
+static struct irq_chip s3c_irq_uart0 = {
         .name           = "s3c-uart0",
         .mask           = s3c_irq_uart0_mask,
         .unmask         = s3c_irq_uart0_unmask,
@@ -417,7 +402,7 @@ s3c_irq_uart1_ack(unsigned int irqno)
         s3c_irqsub_maskack(irqno, INTMSK_UART1, 7 << 3);
 }
 
-static struct irqchip s3c_irq_uart1 = {
+static struct irq_chip s3c_irq_uart1 = {
         .name           = "s3c-uart1",
         .mask           = s3c_irq_uart1_mask,
         .unmask         = s3c_irq_uart1_unmask,
@@ -444,7 +429,7 @@ s3c_irq_uart2_ack(unsigned int irqno)
         s3c_irqsub_maskack(irqno, INTMSK_UART2, 7 << 6);
 }
 
-static struct irqchip s3c_irq_uart2 = {
+static struct irq_chip s3c_irq_uart2 = {
         .name           = "s3c-uart2",
         .mask           = s3c_irq_uart2_mask,
         .unmask         = s3c_irq_uart2_unmask,
@@ -471,7 +456,7 @@ s3c_irq_adc_ack(unsigned int irqno)
         s3c_irqsub_ack(irqno, INTMSK_ADCPARENT, 3 << 9);
 }
 
-static struct irqchip s3c_irq_adc = {
+static struct irq_chip s3c_irq_adc = {
         .name           = "s3c-adc",
         .mask           = s3c_irq_adc_mask,
         .unmask         = s3c_irq_adc_unmask,
@@ -480,11 +465,11 @@ static struct irqchip s3c_irq_adc = {
 
 /* irq demux for adc */
 static void s3c_irq_demux_adc(unsigned int irq,
-                              struct irqdesc *desc)
+                              struct irq_desc *desc)
 {
         unsigned int subsrc, submsk;
         unsigned int offset = 9;
-        struct irqdesc *mydesc;
+        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -512,7 +497,7 @@ static void s3c_irq_demux_uart(unsigned int start)
 {
         unsigned int subsrc, submsk;
         unsigned int offset = start - IRQ_S3CUART_RX0;
-        struct irqdesc *desc;
+        struct irq_desc *desc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -549,7 +534,7 @@ static void s3c_irq_demux_uart(unsigned int start)
 
 static void
 s3c_irq_demux_uart0(unsigned int irq,
-                    struct irqdesc *desc)
+                    struct irq_desc *desc)
 {
         irq = irq;
         s3c_irq_demux_uart(IRQ_S3CUART_RX0);
@@ -557,7 +542,7 @@ s3c_irq_demux_uart0(unsigned int irq,
 
 static void
 s3c_irq_demux_uart1(unsigned int irq,
-                    struct irqdesc *desc)
+                    struct irq_desc *desc)
 {
         irq = irq;
         s3c_irq_demux_uart(IRQ_S3CUART_RX1);
@@ -565,7 +550,7 @@ s3c_irq_demux_uart1(unsigned int irq,
 
 static void
 s3c_irq_demux_uart2(unsigned int irq,
-                    struct irqdesc *desc)
+                    struct irq_desc *desc)
 {
         irq = irq;
         s3c_irq_demux_uart(IRQ_S3CUART_RX2);
@@ -573,7 +558,7 @@ s3c_irq_demux_uart2(unsigned int irq,
 
 static void
 s3c_irq_demux_extint8(unsigned int irq,
-                      struct irqdesc *desc)
+                      struct irq_desc *desc)
 {
         unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND);
         unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK);
@@ -595,7 +580,7 @@ s3c_irq_demux_extint8(unsigned int irq,
 
 static void
 s3c_irq_demux_extint4t7(unsigned int irq,
-                        struct irqdesc *desc)
+                        struct irq_desc *desc)
 {
         unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND);
         unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK);
@@ -738,7 +723,7 @@ void __init s3c24xx_init_irq(void)
                 case IRQ_UART2:
                 case IRQ_ADCPARENT:
                         set_irq_chip(irqno, &s3c_irq_level_chip);
-                        set_irq_handler(irqno, do_level_IRQ);
+                        set_irq_handler(irqno, handle_level_irq);
                         break;
 
                 case IRQ_RESERVED6:
@@ -749,7 +734,7 @@ void __init s3c24xx_init_irq(void)
                 default:
                         //irqdbf("registering irq %d (s3c irq)\n", irqno);
                         set_irq_chip(irqno, &s3c_irq_chip);
-                        set_irq_handler(irqno, do_edge_IRQ);
+                        set_irq_handler(irqno, handle_edge_irq);
                         set_irq_flags(irqno, IRQF_VALID);
                 }
         }
@@ -769,14 +754,14 @@ void __init s3c24xx_init_irq(void)
         for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
                 irqdbf("registering irq %d (ext int)\n", irqno);
                 set_irq_chip(irqno, &s3c_irq_eint0t4);
-                set_irq_handler(irqno, do_edge_IRQ);
+                set_irq_handler(irqno, handle_edge_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
         for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) {
                 irqdbf("registering irq %d (extended s3c irq)\n", irqno);
                 set_irq_chip(irqno, &s3c_irqext_chip);
-                set_irq_handler(irqno, do_edge_IRQ);
+                set_irq_handler(irqno, handle_edge_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
@@ -787,28 +772,28 @@ void __init s3c24xx_init_irq(void)
         for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) {
                 irqdbf("registering irq %d (s3c uart0 irq)\n", irqno);
                 set_irq_chip(irqno, &s3c_irq_uart0);
-                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_handler(irqno, handle_level_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
         for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) {
                 irqdbf("registering irq %d (s3c uart1 irq)\n", irqno);
                 set_irq_chip(irqno, &s3c_irq_uart1);
-                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_handler(irqno, handle_level_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
         for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) {
                 irqdbf("registering irq %d (s3c uart2 irq)\n", irqno);
                 set_irq_chip(irqno, &s3c_irq_uart2);
-                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_handler(irqno, handle_level_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
         for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) {
                 irqdbf("registering irq %d (s3c adc irq)\n", irqno);
                 set_irq_chip(irqno, &s3c_irq_adc);
-                set_irq_handler(irqno, do_edge_IRQ);
+                set_irq_handler(irqno, handle_edge_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-s3c2410/irq.h b/arch/arm/mach-s3c2410/irq.h
index 842a9f42c97b..3686a0082245 100644
--- a/arch/arm/mach-s3c2410/irq.h
+++ b/arch/arm/mach-s3c2410/irq.h
@@ -17,7 +17,7 @@
 
 #define EXTINT_OFF (IRQ_EINT4 - 4)
 
-extern struct irqchip s3c_irq_level_chip;
+extern struct irq_chip s3c_irq_level_chip;
 
 static inline void
 s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 8c895c077d22..f5b98099a5d9 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -33,6 +33,7 @@
 #include <asm/arch/regs-serial.h>
 #include <asm/arch/regs-lcd.h>
 
+#include <asm/arch/h1940.h>
 #include <asm/arch/h1940-latch.h>
 #include <asm/arch/fb.h>
 
@@ -41,6 +42,7 @@
 #include "clock.h"
 #include "devs.h"
 #include "cpu.h"
+#include "pm.h"
 
 static struct map_desc h1940_iodesc[] __initdata = {
         [0] = {
@@ -164,12 +166,16 @@ static void __init h1940_map_io(void)
         s3c24xx_init_clocks(0);
         s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
         s3c24xx_set_board(&h1940_board);
+
+        /* setup PM */
+
+        memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
+        s3c2410_pm_init();
 }
 
 static void __init h1940_init_irq(void)
 {
         s3c24xx_init_irq();
-
 }
 
 static void __init h1940_init(void)
diff --git a/arch/arm/mach-s3c2410/mach-osiris.c b/arch/arm/mach-s3c2410/mach-osiris.c
index e193ba69e652..a4ab144e7292 100644
--- a/arch/arm/mach-s3c2410/mach-osiris.c
+++ b/arch/arm/mach-s3c2410/mach-osiris.c
@@ -114,6 +114,15 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .clocks      = osiris_serial_clocks,
                 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
         },
+        [2] = {
+                .hwport      = 2,
+                .flags       = 0,
+                .ucon        = UCON,
+                .ulcon       = ULCON,
+                .ufcon       = UFCON,
+                .clocks      = osiris_serial_clocks,
+                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+        }
 };
 
 /* NAND Flash on Osiris board */
diff --git a/arch/arm/mach-s3c2410/mach-rx3715.c b/arch/arm/mach-s3c2410/mach-rx3715.c
index 23d7c052013c..ecbcdf79d739 100644
--- a/arch/arm/mach-s3c2410/mach-rx3715.c
+++ b/arch/arm/mach-s3c2410/mach-rx3715.c
@@ -42,6 +42,7 @@
 #include <asm/arch/regs-gpio.h>
 #include <asm/arch/regs-lcd.h>
 
+#include <asm/arch/h1940.h>
 #include <asm/arch/nand.h>
 #include <asm/arch/fb.h>
 
@@ -224,7 +225,9 @@ static void __init rx3715_init_irq(void)
 
 static void __init rx3715_init_machine(void)
 {
+        memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
         s3c2410_pm_init();
+
         s3c24xx_fb_set_platdata(&rx3715_lcdcfg);
 }
 
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index a0d7692cdb2b..e2eda3937ab0 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -41,6 +41,7 @@
 
 #include <asm/arch/regs-serial.h>
 #include <asm/arch/regs-gpio.h>
+#include <asm/arch/leds-gpio.h>
 
 #include "clock.h"
 #include "devs.h"
@@ -313,6 +314,50 @@ static struct platform_device vr1000_dm9k1 = {
         }
 };
 
+/* LEDS */
+
+static struct s3c24xx_led_platdata vr1000_led1_pdata = {
+        .name           = "led1",
+        .gpio           = S3C2410_GPB0,
+        .def_trigger    = "",
+};
+
+static struct s3c24xx_led_platdata vr1000_led2_pdata = {
+        .name           = "led2",
+        .gpio           = S3C2410_GPB1,
+        .def_trigger    = "",
+};
+
+static struct s3c24xx_led_platdata vr1000_led3_pdata = {
+        .name           = "led3",
+        .gpio           = S3C2410_GPB2,
+        .def_trigger    = "",
+};
+
+static struct platform_device vr1000_led1 = {
+        .name           = "s3c24xx_led",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &vr1000_led1_pdata,
+        },
+};
+
+static struct platform_device vr1000_led2 = {
+        .name           = "s3c24xx_led",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &vr1000_led2_pdata,
+        },
+};
+
+static struct platform_device vr1000_led3 = {
+        .name           = "s3c24xx_led",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &vr1000_led3_pdata,
+        },
+};
+
 /* devices for this board */
 
 static struct platform_device *vr1000_devices[] __initdata = {
@@ -325,7 +370,10 @@ static struct platform_device *vr1000_devices[] __initdata = {
         &serial_device,
         &vr1000_nor,
         &vr1000_dm9k0,
-        &vr1000_dm9k1
+        &vr1000_dm9k1,
+        &vr1000_led1,
+        &vr1000_led2,
+        &vr1000_led3,
 };
 
 static struct clk *vr1000_clocks[] = {
diff --git a/arch/arm/mach-s3c2410/pm-h1940.S b/arch/arm/mach-s3c2410/pm-h1940.S
new file mode 100644
index 000000000000..7d66de7ff7db
--- /dev/null
+++ b/arch/arm/mach-s3c2410/pm-h1940.S
@@ -0,0 +1,33 @@
+/* linux/arch/arm/mach-s3c2410/pm-h1940.S
+ *
+ * Copyright (c) 2006 Ben Dooks <ben-linux@fluff.org>
+ *
+ * H1940 Suspend to RAM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+#include <asm/arch/map.h>
+
+#include <asm/arch/regs-gpio.h>
+
+        .text
+        .global h1940_pm_return
+
+h1940_pm_return:
+        mov     r0, #S3C2410_PA_GPIO
+        ldr     pc, [ r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO ]
diff --git a/arch/arm/mach-s3c2410/s3c2410-pm.c b/arch/arm/mach-s3c2410/s3c2410-pm.c
index e51d76669512..77c6814c0f05 100644
--- a/arch/arm/mach-s3c2410/s3c2410-pm.c
+++ b/arch/arm/mach-s3c2410/s3c2410-pm.c
@@ -32,6 +32,7 @@
 #include <asm/mach-types.h>
 
 #include <asm/arch/regs-gpio.h>
+#include <asm/arch/h1940.h>
 
 #include "cpu.h"
 #include "pm.h"
@@ -52,6 +53,35 @@ static void s3c2410_pm_prepare(void)
         DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
         DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
 
+        if (machine_is_h1940()) {
+                void *base = phys_to_virt(H1940_SUSPEND_CHECK);
+                unsigned long ptr;
+                unsigned long calc = 0;
+
+                /* generate check for the bootloader to check on resume */
+
+                for (ptr = 0; ptr < 0x40000; ptr += 0x400)
+                        calc += __raw_readl(base+ptr);
+
+                __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
+        }
+
+        /* the RX3715 uses similar code and the same H1940 and the
+         * same offsets for resume and checksum pointers */
+
+        if (machine_is_rx3715()) {
+                void *base = phys_to_virt(H1940_SUSPEND_CHECK);
+                unsigned long ptr;
+                unsigned long calc = 0;
+
+                /* generate check for the bootloader to check on resume */
+
+                for (ptr = 0; ptr < 0x40000; ptr += 0x4)
+                        calc += __raw_readl(base+ptr);
+
+                __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
+        }
+
         if ( machine_is_aml_m5900() )
                 s3c2410_gpio_setpin(S3C2410_GPF2, 1);
 
diff --git a/arch/arm/mach-s3c2410/s3c2412-irq.c b/arch/arm/mach-s3c2410/s3c2412-irq.c
index 7f741547658f..ffcc30b23a80 100644
--- a/arch/arm/mach-s3c2410/s3c2412-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2412-irq.c
@@ -98,7 +98,7 @@ s3c2412_irq_unmask(unsigned int irqno)
         __raw_writel(mask & ~bitval, S3C2410_INTMSK);
 }
 
-static struct irqchip s3c2412_irq_eint0t4 = {
+static struct irq_chip s3c2412_irq_eint0t4 = {
         .ack       = s3c2412_irq_ack,
         .mask      = s3c2412_irq_mask,
         .unmask    = s3c2412_irq_unmask,
@@ -112,7 +112,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
 
         for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
                 set_irq_chip(irqno, &s3c2412_irq_eint0t4);
-                set_irq_handler(irqno, do_edge_IRQ);
+                set_irq_handler(irqno, handle_edge_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 39db0752d53b..1ba19b27ab05 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -42,10 +42,10 @@
 /* WDT/AC97 */
 
 static void s3c_irq_demux_wdtac97(unsigned int irq,
-                                  struct irqdesc *desc)
+                                  struct irq_desc *desc)
 {
         unsigned int subsrc, submsk;
-        struct irqdesc *mydesc;
+        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -90,7 +90,7 @@ s3c_irq_wdtac97_ack(unsigned int irqno)
         s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
 }
 
-static struct irqchip s3c_irq_wdtac97 = {
+static struct irq_chip s3c_irq_wdtac97 = {
         .mask       = s3c_irq_wdtac97_mask,
         .unmask     = s3c_irq_wdtac97_unmask,
         .ack        = s3c_irq_wdtac97_ack,
@@ -105,12 +105,12 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
         /* add new chained handler for wdt, ac7 */
 
         set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_WDT, do_level_IRQ);
+        set_irq_handler(IRQ_WDT, handle_level_irq);
         set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
 
         for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
                 set_irq_chip(irqno, &s3c_irq_wdtac97);
-                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_handler(irqno, handle_level_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c
index 146f2109dd90..ede94636a72a 100644
--- a/arch/arm/mach-s3c2410/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2410/s3c244x-irq.c
@@ -42,10 +42,10 @@
 /* camera irq */
 
 static void s3c_irq_demux_cam(unsigned int irq,
-                              struct irqdesc *desc)
+                              struct irq_desc *desc)
 {
         unsigned int subsrc, submsk;
-        struct irqdesc *mydesc;
+        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -89,7 +89,7 @@ s3c_irq_cam_ack(unsigned int irqno)
         s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
 }
 
-static struct irqchip s3c_irq_cam = {
+static struct irq_chip s3c_irq_cam = {
         .mask       = s3c_irq_cam_mask,
         .unmask     = s3c_irq_cam_unmask,
         .ack        = s3c_irq_cam_ack,
@@ -100,18 +100,18 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
         unsigned int irqno;
 
         set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_NFCON, do_level_IRQ);
+        set_irq_handler(IRQ_NFCON, handle_level_irq);
         set_irq_flags(IRQ_NFCON, IRQF_VALID);
 
         /* add chained handler for camera */
 
         set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_CAM, do_level_IRQ);
+        set_irq_handler(IRQ_CAM, handle_level_irq);
         set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
 
         for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
                 set_irq_chip(irqno, &s3c_irq_cam);
-                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_handler(irqno, handle_level_irq);
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 4575f316e141..e510295c2580 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -20,6 +20,7 @@
 #include <linux/platform_device.h>
 
 #include <asm/div64.h>
+#include <asm/cnt32_to_63.h>
 #include <asm/hardware.h>
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -118,15 +119,21 @@ EXPORT_SYMBOL(cpufreq_get);
 
 /*
  * This is the SA11x0 sched_clock implementation.  This has
- * a resolution of 271ns, and a maximum value of 1165s.
+ * a resolution of 271ns, and a maximum value of 32025597s (370 days).
+ *
+ * The return value is guaranteed to be monotonic in that range as
+ * long as there is always less than 582 seconds between successive
+ * calls to this function.
+ *
  *  ( * 1E9 / 3686400 => * 78125 / 288)
  */
 unsigned long long sched_clock(void)
 {
-        unsigned long long v;
+        unsigned long long v = cnt32_to_63(OSCR);
 
-        v = (unsigned long long)OSCR * 78125;
-        do_div(v, 288);
+        /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
+        v *= 78125<<1;
+        do_div(v, 288<<1);
 
         return v;
 }
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index fa6dc71bd6ad..b034ad69a324 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -702,7 +702,7 @@ static u32 gpio_irq_mask[] = {
         GPIO2_SD_CON_SLT,
 };
 
-static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc)
+static void h3800_IRQ_demux(unsigned int irq, struct irq_desc *desc)
 {
         int i;
 
@@ -719,14 +719,14 @@ static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc)
                 if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq);
                 for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
                         if (irq & kpio_irq_mask[j])
-                                do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
+                                handle_edge_irq(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
 
                 /* GPIO2 */
                 irq = H3800_ASIC2_GPIINTFLAG;
                 if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq);
                 for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
                         if (irq & gpio_irq_mask[j])
-                                do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
+                                handle_edge_irq(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
         }
 
         if (i >= MAX_ASIC_ISR_LOOPS)
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index f4c6322ca33e..5642aeca079e 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -110,7 +110,7 @@ static struct irq_chip sa1100_low_gpio_chip = {
  * and call the handler.
  */
 static void
-sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc)
+sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int mask;
 
@@ -327,19 +327,19 @@ void __init sa1100_init_irq(void)
 
         for (irq = 0; irq <= 10; irq++) {
                 set_irq_chip(irq, &sa1100_low_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         for (irq = 12; irq <= 31; irq++) {
                 set_irq_chip(irq, &sa1100_normal_chip);
-                set_irq_handler(irq, do_level_IRQ);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID);
         }
 
         for (irq = 32; irq <= 48; irq++) {
                 set_irq_chip(irq, &sa1100_high_gpio_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 354d5e91da59..075d4d1d63be 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -29,12 +29,12 @@
  * is rather unfortunate.
  */
 static void
-neponset_irq_handler(unsigned int irq, struct irqdesc *desc)
+neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int irr;
 
         while (1) {
-                struct irqdesc *d;
+                struct irq_desc *d;
 
                 /*
                  * Acknowledge the parent IRQ.
@@ -168,9 +168,9 @@ static int neponset_probe(struct platform_device *dev)
          * Setup other Neponset IRQs.  SA1111 will be done by the
          * generic SA1111 code.
          */
-        set_irq_handler(IRQ_NEPONSET_SMC9196, do_simple_IRQ);
+        set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
         set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
-        set_irq_handler(IRQ_NEPONSET_USAR, do_simple_IRQ);
+        set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
         set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
 
         /*
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 4284bd6f7a1f..29c89f9eb2ce 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -118,6 +118,7 @@ static struct irqaction sa1100_timer_irq = {
 static void __init sa1100_timer_init(void)
 {
         struct timespec tv;
+        unsigned long flags;
 
         set_rtc = sa1100_set_rtc;
 
@@ -126,12 +127,12 @@ static void __init sa1100_timer_init(void)
         do_settimeofday(&tv);
 
         OIER = 0;               /* disable any timer interrupts */
-        OSCR = LATCH*2;         /* push OSCR out of the way */
-        OSMR0 = LATCH;          /* set initial match */
         OSSR = 0xf;             /* clear status on all timers */
         setup_irq(IRQ_OST0, &sa1100_timer_irq);
+        local_irq_save(flags);
         OIER = OIER_E0;         /* enable match on timer 0 to cause interrupts */
-        OSCR = 0;               /* initialize free-running timer */
+        OSMR0 = OSCR + LATCH;   /* set initial match */
+        local_irq_restore(flags);
 }
 
 #ifdef CONFIG_NO_IDLE_HZ
diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c
index 297ecf130650..00a6c1466867 100644
--- a/arch/arm/mach-shark/irq.c
+++ b/arch/arm/mach-shark/irq.c
@@ -82,7 +82,7 @@ void __init shark_init_irq(void)
 
         for (irq = 0; irq < NR_IRQS; irq++) {
                 set_irq_chip(irq, &fb_chip);
-                set_irq_handler(irq, do_edge_IRQ);
+                set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 3b8576111c16..57196947559f 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -27,6 +27,7 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
 
+#include <asm/cnt32_to_63.h>
 #include <asm/system.h>
 #include <asm/hardware.h>
 #include <asm/io.h>
@@ -77,7 +78,7 @@ static struct irq_chip sic_chip = {
 };
 
 static void
-sic_handle_irq(unsigned int irq, struct irqdesc *desc)
+sic_handle_irq(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
 
@@ -123,7 +124,7 @@ void __init versatile_init_irq(void)
         for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) {
                 if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) {
                         set_irq_chip(i, &sic_chip);
-                        set_irq_handler(i, do_level_IRQ);
+                        set_irq_handler(i, handle_level_irq);
                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                 }
         }
@@ -228,14 +229,19 @@ void __init versatile_map_io(void)
 
 /*
  * This is the Versatile sched_clock implementation.  This has
- * a resolution of 41.7ns, and a maximum value of about 179s.
+ * a resolution of 41.7ns, and a maximum value of about 35583 days.
+ *
+ * The return value is guaranteed to be monotonic in that range as
+ * long as there is always less than 89 seconds between successive
+ * calls to this function.
  */
 unsigned long long sched_clock(void)
 {
-        unsigned long long v;
+        unsigned long long v = cnt32_to_63(readl(VERSATILE_REFCOUNTER));
 
-        v = (unsigned long long)readl(VERSATILE_REFCOUNTER) * 125;
-        do_div(v, 3);
+        /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
+        v *= 125<<1;
+        do_div(v, 3<<1);
 
         return v;
 }
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 503725b166fc..be439bb9d450 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -81,22 +81,18 @@ static struct amba_device *amba_devs[] __initdata = {
         &mmc1_device,
 };
 
-static int __init versatile_pb_init(void)
+static void __init versatile_pb_init(void)
 {
         int i;
 
-        if (machine_is_versatile_pb()) {
-                for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
-                        struct amba_device *d = amba_devs[i];
-                        amba_device_register(d, &iomem_resource);
-                }
-        }
+        versatile_init();
 
-        return 0;
+        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+                struct amba_device *d = amba_devs[i];
+                amba_device_register(d, &iomem_resource);
+        }
 }
 
-arch_initcall(versatile_pb_init);
-
 MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = 0x101f1000,
@@ -105,5 +101,5 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
         .map_io         = versatile_map_io,
         .init_irq       = versatile_init_irq,
         .timer          = &versatile_timer,
-        .init_machine   = versatile_init,
+        .init_machine   = versatile_pb_init,
 MACHINE_END
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index b09a19f87d68..aade2f72c920 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -333,7 +333,7 @@ config CPU_XSCALE
 # XScale Core Version 3
 config CPU_XSC3
         bool
-        depends on ARCH_IXP23XX
+        depends on ARCH_IXP23XX || ARCH_IOP13XX
         default y
         select CPU_32v5
         select CPU_ABRT_EV5T
@@ -580,7 +580,7 @@ config CPU_CACHE_ROUND_ROBIN
 
 config CPU_BPREDICT_DISABLE
         bool "Disable branch prediction"
-        depends on CPU_ARM1020 || CPU_V6
+        depends on CPU_ARM1020 || CPU_V6 || CPU_XSC3
         help
           Say Y here to disable branch prediction.  If unsure, say N.
 
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index bb2bc9ab6bd3..a44e30970635 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -1,4 +1,7 @@
 /* the upper-most page table pointer */
+
+#ifdef CONFIG_MMU
+
 extern pmd_t *top_pmd;
 
 #define TOP_PTE(x)      pte_offset_kernel(top_pmd, x)
@@ -13,6 +16,8 @@ static inline pmd_t *pmd_off_k(unsigned long virt)
         return pmd_off(pgd_offset_k(virt), virt);
 }
 
+#endif
+
 struct map_desc;
 struct meminfo;
 struct pglist_data;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index f866bf6b97d4..b7f194af20b4 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -265,7 +265,7 @@ static void __init build_mem_type_table(void)
         if (arch_is_coherent()) {
                 if (cpu_is_xsc3()) {
                         mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
-                        mem_types[MT_MEMORY].prot_pte |= L_PTE_COHERENT;
+                        mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
                 }
         }
 
@@ -619,6 +619,13 @@ void __init reserve_node_zero(pg_data_t *pgdat)
         if (machine_is_p720t())
                 res_size = 0x00014000;
 
+        /* H1940 and RX3715 need to reserve this for suspend */
+
+        if (machine_is_h1940() || machine_is_rx3715()) {
+                reserve_bootmem_node(pgdat, 0x30003000, 0x1000);
+                reserve_bootmem_node(pgdat, 0x30081000, 0x1000);
+        }
+
 #ifdef CONFIG_SA1111
         /*
          * Because of the SA1111 DMA bug, we want to preserve our
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index d0e66424a597..05818fc0c705 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -6,10 +6,12 @@
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/pagemap.h>
+#include <linux/bootmem.h>
 
 #include <asm/cacheflush.h>
 #include <asm/io.h>
 #include <asm/page.h>
+#include <asm/mach/arch.h>
 
 #include "mm.h"
 
@@ -76,7 +78,7 @@ void __iomem *__ioremap(unsigned long phys_addr, size_t size,
 }
 EXPORT_SYMBOL(__ioremap);
 
-void __iounmap(void __iomem *addr)
+void __iounmap(volatile void __iomem *addr)
 {
 }
 EXPORT_SYMBOL(__iounmap);
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 1d8316f3cecf..289b8e6f504d 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -29,9 +29,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 89b1d6d3d7c0..bed9db6ba582 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -29,9 +29,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index a089528e6bce..d2a7c1b9cab9 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -18,9 +18,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index d6d84d92c7c7..3247ce5c0177 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -18,9 +18,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 0432e4806888..ce4f9eef763c 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -15,9 +15,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 ENTRY(cpu_arm6_dcache_clean_area)
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index c2f0705bfd49..c04c194da785 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -36,9 +36,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 40713818a87b..7069f495cf9b 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -12,9 +12,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
         .text
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 22d7e3100ea6..d091c2571823 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -12,9 +12,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
         .text
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 4adb46b3a4e0..65cbb2851bff 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -28,9 +28,9 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 571f082f0247..52761b70d735 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -29,9 +29,9 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 8d9a9f93b011..5b74339d1588 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -52,9 +52,9 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 44a7a652d625..8628ed29a955 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -28,9 +28,9 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 2397f4b6e151..786c593778f0 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -11,9 +11,9 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 /* ARM940T has a 4KB DCache comprising 256 lines of 4 words */
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index e18617564421..a60c1421d450 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -13,9 +13,9 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 /*
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 918ebf65d4f6..4848eeac86b6 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -12,9 +12,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
         .text
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index c878064e9b88..cd7d865c9d19 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -17,7 +17,7 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
-#include <asm/procinfo.h>
+#include <asm/elf.h>
 #include <asm/hardware.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index b23b66a6155a..b776653cc31c 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -22,7 +22,7 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
-#include <asm/procinfo.h>
+#include <asm/elf.h>
 #include <asm/hardware.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 6f72549f8843..b440c8a1d345 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -13,8 +13,8 @@
 #include <linux/linkage.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/hardware/arm_scu.h>
-#include <asm/procinfo.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 4ace2d8090c7..1ef564d0957f 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -27,7 +27,7 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
-#include <asm/procinfo.h>
+#include <asm/elf.h>
 #include <asm/hardware.h>
 #include <asm/pgtable.h>
 #include <asm/pgtable-hwdef.h>
@@ -57,11 +57,6 @@
 #define L2_CACHE_ENABLE 1
 
 /*
- * Enable the Branch Target Buffer (can cause crashes, see erratum #42.)
- */
-#define BTB_ENABLE      0
-
-/*
  * This macro is used to wait for a CP15 write and is needed
  * when we have to ensure that the last operation to the co-pro
  * was completed before continuing with operation.
@@ -371,8 +366,10 @@ ENTRY(cpu_xsc3_switch_mm)
 ENTRY(cpu_xsc3_set_pte)
         str     r1, [r0], #-2048                @ linux version
 
-        bic     r2, r1, #0xdf0                  @ Keep C, B, coherency bits
+        bic     r2, r1, #0xff0                  @ Keep C, B bits
         orr     r2, r2, #PTE_TYPE_EXT           @ extended page
+        tst     r1, #L_PTE_SHARED               @ Shared?
+        orrne   r2, r2, #0x200
 
         eor     r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
 
@@ -432,9 +429,7 @@ __xsc3_setup:
         mrc     p15, 0, r0, c1, c0, 0           @ get control register
         bic     r0, r0, r5                      @ .... .... .... ..A.
         orr     r0, r0, r6                      @ .... .... .... .C.M
-#if BTB_ENABLE
         orr     r0, r0, #0x00000800             @ ..VI Z..S .... ....
-#endif
 #if L2_CACHE_ENABLE
         orr     r0, r0, #0x04000000             @ L2 enable
 #endif
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 2749c1f88d7d..cc1004b3e511 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -23,7 +23,7 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
-#include <asm/procinfo.h>
+#include <asm/elf.h>
 #include <asm/pgtable.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/page.h>
@@ -491,12 +491,7 @@ __xscale_setup:
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I, D caches & BTB
         mcr     p15, 0, ip, c7, c10, 4          @ Drain Write (& Fill) Buffer
         mcr     p15, 0, ip, c8, c7, 0           @ invalidate I, D TLBs
-#ifdef CONFIG_IWMMXT
-        mov     r0, #0                          @ initially disallow access to CP0/CP1
-#else
-        mov     r0, #1                          @ Allow access to CP0
-#endif
-        orr     r0, r0, #1 << 6                 @ cp6 for IOP3xx and Bulverde
+        mov     r0, #1 << 6                     @ cp6 for IOP3xx and Bulverde
         orr     r0, r0, #1 << 13                @ Its undefined whether this
         mcr     p15, 0, r0, c15, c1, 0          @ affects USR or SVC modes
 
@@ -909,7 +904,7 @@ __pxa270_proc_info:
         b       __xscale_setup
         .long   cpu_arch_name
         .long   cpu_elf_name
-        .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_IWMMXT
+        .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
         .long   cpu_pxa270_name
         .long   xscale_processor_functions
         .long   v4wbi_tlb_fns
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8162eed8b500..4f2fd5591337 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -410,7 +410,7 @@ static inline void set_24xx_gpio_triggering(void __iomem *base, int gpio, int tr
                 trigger & __IRQT_RISEDGE);
         MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
                 trigger & __IRQT_FALEDGE);
-        /* FIXME: Possibly do 'set_irq_handler(j, do_level_IRQ)' if only level
+        /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level
          * triggering requested. */
 }
 
@@ -783,7 +783,7 @@ void omap_free_gpio(int gpio)
  * line's interrupt handler has been run, we may miss some nested
  * interrupts.
  */
-static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc)
+static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         void __iomem *isr_reg = NULL;
         u32 isr;
@@ -853,7 +853,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc)
 
                 gpio_irq = bank->virtual_irq_start;
                 for (; isr != 0; isr >>= 1, gpio_irq++) {
-                        struct irqdesc *d;
+                        struct irq_desc *d;
                         int irq_mask;
                         if (!(isr & 1))
                                 continue;
@@ -1092,7 +1092,7 @@ static int __init _omap_gpio_init(void)
                                 set_irq_chip(j, &mpuio_irq_chip);
                         else
                                 set_irq_chip(j, &gpio_irq_chip);
-                        set_irq_handler(j, do_simple_IRQ);
+                        set_irq_handler(j, handle_simple_irq);
                         set_irq_flags(j, IRQF_VALID);
                 }
                 set_irq_chained_handler(bank->irq, gpio_irq_handler);
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 579c69ae9ff7..8bcb838e5444 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Mon Oct 16 21:13:36 2006
+# Last update: Thu Dec 7 17:19:20 2006
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -79,7 +79,7 @@ psionw			ARCH_PSIONW		PSIONW			60
 aln                     SA1100_ALN              ALN                     61
 epxa                    ARCH_CAMELOT            CAMELOT                 62
 gds2200                 SA1100_GDS2200          GDS2200                 63
-psion_series7           SA1100_PSION_SERIES7    PSION_SERIES7           64
+netbook                 SA1100_PSION_SERIES7    PSION_SERIES7           64
 xfile                   SA1100_XFILE            XFILE                   65
 accelent_ep9312         ARCH_ACCELENT_EP9312    ACCELENT_EP9312         66
 ic200                   ARCH_IC200              IC200                   67
@@ -810,9 +810,9 @@ sb3010			MACH_SB3010		SB3010			795
 rm9200                  MACH_RM9200             RM9200                  796
 dma03                   MACH_DMA03              DMA03                   797
 road_s101               MACH_ROAD_S101          ROAD_S101               798
-iq_nextgen_a            MACH_IQ_NEXTGEN_A       IQ_NEXTGEN_A            799
+iq81340sc               MACH_IQ81340SC          IQ81340SC               799
 iq_nextgen_b            MACH_IQ_NEXTGEN_B       IQ_NEXTGEN_B            800
-iq_nextgen_c            MACH_IQ_NEXTGEN_C       IQ_NEXTGEN_C            801
+iq81340mc               MACH_IQ81340MC          IQ81340MC               801
 iq_nextgen_d            MACH_IQ_NEXTGEN_D       IQ_NEXTGEN_D            802
 iq_nextgen_e            MACH_IQ_NEXTGEN_E       IQ_NEXTGEN_E            803
 mallow_at91             MACH_MALLOW_AT91        MALLOW_AT91             804
@@ -1165,9 +1165,57 @@ pnx4010			MACH_PNX4010		PNX4010			1151
 oxnas                   MACH_OXNAS              OXNAS                   1152
 fiori                   MACH_FIORI              FIORI                   1153
 ml1200                  MACH_ML1200             ML1200                  1154
-cactus                  MACH_CACTUS             CACTUS                  1155
+pecos                   MACH_PECOS              PECOS                   1155
 nb2xxx                  MACH_NB2XXX             NB2XXX                  1156
 hw6900                  MACH_HW6900             HW6900                  1157
 cdcs_quoll              MACH_CDCS_QUOLL         CDCS_QUOLL              1158
 quicksilver             MACH_QUICKSILVER        QUICKSILVER             1159
 uplat926                MACH_UPLAT926           UPLAT926                1160
+dep2410_dep2410         MACH_DEP2410_THOMAS     DEP2410_THOMAS          1161
+dtk2410                 MACH_DTK2410            DTK2410                 1162
+chili                   MACH_CHILI              CHILI                   1163
+demeter                 MACH_DEMETER            DEMETER                 1164
+dionysus                MACH_DIONYSUS           DIONYSUS                1165
+as352x                  MACH_AS352X             AS352X                  1166
+service                 MACH_SERVICE            SERVICE                 1167
+cs_e9301                MACH_CS_E9301           CS_E9301                1168
+micro9m                 MACH_MICRO9M            MICRO9M                 1169
+ia_mospck               MACH_IA_MOSPCK          IA_MOSPCK               1170
+ql201b                  MACH_QL201B             QL201B                  1171
+bbm                     MACH_BBM                BBM                     1174
+exxx                    MACH_EXXX               EXXX                    1175
+wma11b                  MACH_WMA11B             WMA11B                  1176
+pelco_atlas             MACH_PELCO_ATLAS        PELCO_ATLAS             1177
+g500                    MACH_G500               G500                    1178
+bug                     MACH_BUG                BUG                     1179
+mx33ads                 MACH_MX33ADS            MX33ADS                 1180
+chub                    MACH_CHUB               CHUB                    1181
+gta01                   MACH_GTA01              GTA01                   1182
+w90n740                 MACH_W90N740            W90N740                 1183
+medallion_sa2410        MACH_MEDALLION_SA2410   MEDALLION_SA2410        1184
+ia_cpu_9200_2           MACH_IA_CPU_9200_2      IA_CPU_9200_2           1185
+dimmrm9200              MACH_DIMMRM9200         DIMMRM9200              1186
+pm9261                  MACH_PM9261             PM9261                  1187
+mx21                    MACH_MX21               MX21                    1188
+ml7304                  MACH_ML7304             ML7304                  1189
+ucp250                  MACH_UCP250             UCP250                  1190
+intboard                MACH_INTBOARD           INTBOARD                1191
+gulfstream              MACH_GULFSTREAM         GULFSTREAM              1192
+labquest                MACH_LABQUEST           LABQUEST                1193
+vcmx313                 MACH_VCMX313            VCMX313                 1194
+urg200                  MACH_URG200             URG200                  1195
+cpux255lcdnet           MACH_CPUX255LCDNET      CPUX255LCDNET           1196
+netdcu9                 MACH_NETDCU9            NETDCU9                 1197
+netdcu10                MACH_NETDCU10           NETDCU10                1198
+dspg_dga                MACH_DSPG_DGA           DSPG_DGA                1199
+dspg_dvw                MACH_DSPG_DVW           DSPG_DVW                1200
+solos                   MACH_SOLOS              SOLOS                   1201
+at91sam9263ek           MACH_AT91SAM9263EK      AT91SAM9263EK           1202
+osstbox                 MACH_OSSTBOX            OSSTBOX                 1203
+kbat9261                MACH_KBAT9261           KBAT9261                1204
+ct1100                  MACH_CT1100             CT1100                  1205
+akcppxa                 MACH_AKCPPXA            AKCPPXA                 1206
+zevio_1020              MACH_ZEVIO_1020         ZEVIO_1020              1207
+hitrack                 MACH_HITRACK            HITRACK                 1208
+syme1                   MACH_SYME1              SYME1                   1209
+syhl1                   MACH_SYHL1              SYHL1                   1210