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authorAndrew Victor <linux@maxim.org.za>2008-10-07 15:20:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-09 05:16:00 -0400
commit8d163b3fa52bb532a4d431c195352fcf356b4977 (patch)
treefa7fdef54b8ddda69fc81321a3f0b72d9b412884 /arch/arm
parent457cd4f5e3011da47f2f76e2bdc545ffcc1189db (diff)
[ARM] 5296/1: [KS8695] Replace macro's with trailing underscores.
Replace Macro names that have trailing underscores. Also use the IOPD() macro instead of a hard-coded bit-shift (for better readability). Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-ks8695/gpio.c20
-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-gpio.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-lan.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-wan.h4
4 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
index 3624e65cd89b..55cee776ff55 100644
--- a/arch/arm/mach-ks8695/gpio.c
+++ b/arch/arm/mach-ks8695/gpio.c
@@ -72,7 +72,7 @@ int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
72 72
73 /* set pin as input */ 73 /* set pin as input */
74 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); 74 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
75 x &= ~IOPM_(pin); 75 x &= ~IOPM(pin);
76 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); 76 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
77 77
78 local_irq_restore(flags); 78 local_irq_restore(flags);
@@ -108,7 +108,7 @@ int __init_or_module gpio_direction_input(unsigned int pin)
108 108
109 /* set pin as input */ 109 /* set pin as input */
110 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); 110 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
111 x &= ~IOPM_(pin); 111 x &= ~IOPM(pin);
112 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); 112 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
113 113
114 local_irq_restore(flags); 114 local_irq_restore(flags);
@@ -136,14 +136,14 @@ int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state)
136 /* set line state */ 136 /* set line state */
137 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); 137 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
138 if (state) 138 if (state)
139 x |= (1 << pin); 139 x |= IOPD(pin);
140 else 140 else
141 x &= ~(1 << pin); 141 x &= ~IOPD(pin);
142 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); 142 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
143 143
144 /* set pin as output */ 144 /* set pin as output */
145 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); 145 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
146 x |= IOPM_(pin); 146 x |= IOPM(pin);
147 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); 147 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
148 148
149 local_irq_restore(flags); 149 local_irq_restore(flags);
@@ -168,9 +168,9 @@ void gpio_set_value(unsigned int pin, unsigned int state)
168 /* set output line state */ 168 /* set output line state */
169 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); 169 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
170 if (state) 170 if (state)
171 x |= (1 << pin); 171 x |= IOPD(pin);
172 else 172 else
173 x &= ~(1 << pin); 173 x &= ~IOPD(pin);
174 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); 174 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
175 175
176 local_irq_restore(flags); 176 local_irq_restore(flags);
@@ -189,7 +189,7 @@ int gpio_get_value(unsigned int pin)
189 return -EINVAL; 189 return -EINVAL;
190 190
191 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); 191 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
192 return (x & (1 << pin)) != 0; 192 return (x & IOPD(pin)) != 0;
193} 193}
194EXPORT_SYMBOL(gpio_get_value); 194EXPORT_SYMBOL(gpio_get_value);
195 195
@@ -240,7 +240,7 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused)
240 for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) { 240 for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
241 seq_printf(s, "%i:\t", i); 241 seq_printf(s, "%i:\t", i);
242 242
243 seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input"); 243 seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input");
244 244
245 if (i <= KS8695_GPIO_3) { 245 if (i <= KS8695_GPIO_3) {
246 if (ctrl & enable[i]) { 246 if (ctrl & enable[i]) {
@@ -273,7 +273,7 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused)
273 273
274 seq_printf(s, "\t"); 274 seq_printf(s, "\t");
275 275
276 seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0); 276 seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0);
277 } 277 }
278 return 0; 278 return 0;
279} 279}
diff --git a/arch/arm/mach-ks8695/include/mach/regs-gpio.h b/arch/arm/mach-ks8695/include/mach/regs-gpio.h
index 0df6fe61d1ce..90614a7d0548 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-gpio.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-gpio.h
@@ -24,7 +24,7 @@
24 24
25 25
26/* Port Mode Register */ 26/* Port Mode Register */
27#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */ 27#define IOPM(x) (1 << (x)) /* Mode for GPIO Pin x */
28 28
29/* Port Control Register */ 29/* Port Control Register */
30#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */ 30#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */
@@ -50,6 +50,6 @@
50#define IOPC_TM_EDGE (6) /* Both Edge Detection */ 50#define IOPC_TM_EDGE (6) /* Both Edge Detection */
51 51
52/* Port Data Register */ 52/* Port Data Register */
53#define IOPD_(x) (1 << (x)) /* Signal Level of GPIO Pin x */ 53#define IOPD(x) (1 << (x)) /* Signal Level of GPIO Pin x */
54 54
55#endif 55#endif
diff --git a/arch/arm/mach-ks8695/include/mach/regs-lan.h b/arch/arm/mach-ks8695/include/mach/regs-lan.h
index 9ef409901e76..82c5f3791afb 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-lan.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-lan.h
@@ -29,8 +29,8 @@
29#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */ 29#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */
30#define KS8695_LMAL (0x18) /* MAC Station Address Low */ 30#define KS8695_LMAL (0x18) /* MAC Station Address Low */
31#define KS8695_LMAH (0x1c) /* MAC Station Address High */ 31#define KS8695_LMAH (0x1c) /* MAC Station Address High */
32#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ 32#define KS8695_LMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
33#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ 33#define KS8695_LMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
34 34
35 35
36/* DMA Transmit Control Register */ 36/* DMA Transmit Control Register */
diff --git a/arch/arm/mach-ks8695/include/mach/regs-wan.h b/arch/arm/mach-ks8695/include/mach/regs-wan.h
index eb494ec6e956..c475bed22b8e 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-wan.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-wan.h
@@ -29,8 +29,8 @@
29#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */ 29#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */
30#define KS8695_WMAL (0x18) /* MAC Station Address Low */ 30#define KS8695_WMAL (0x18) /* MAC Station Address Low */
31#define KS8695_WMAH (0x1c) /* MAC Station Address High */ 31#define KS8695_WMAH (0x1c) /* MAC Station Address High */
32#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ 32#define KS8695_WMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
33#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ 33#define KS8695_WMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
34 34
35 35
36/* DMA Transmit Control Register */ 36/* DMA Transmit Control Register */