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authorJaecheol Lee <jc.lee@samsung.com>2010-12-23 00:25:31 -0500
committerKukjin Kim <kgene.kim@samsung.com>2010-12-23 00:53:41 -0500
commit877d1b571d7763dbf57e38de2827177ad5369e64 (patch)
tree19bfef4f41d2f3dd3e4984158770e954db788306 /arch/arm
parentbf5ce054f5ffdb9a2f5556edab07e86acec916ed (diff)
ARM: S5PV310: Add FOUT APLL get rate function
FOUT APLL clock is used as a source of ARM core clock. So we need that the clock source can be changed dynamically by using CPUFREQ driver. This patch can give correct frequency when calling clk_get_rate() function. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Sangwook Ju <sw.ju@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-s5pv310/clock.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c
index fdce2b48efc6..752a07ed7c19 100644
--- a/arch/arm/mach-s5pv310/clock.c
+++ b/arch/arm/mach-s5pv310/clock.c
@@ -990,6 +990,17 @@ static struct clksrc_clk *sysclks[] = {
990 &clk_dout_mmc4, 990 &clk_dout_mmc4,
991}; 991};
992 992
993static int xtal_rate;
994
995static unsigned long s5pv310_fout_apll_get_rate(struct clk *clk)
996{
997 return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), pll_4508);
998}
999
1000static struct clk_ops s5pv310_fout_apll_ops = {
1001 .get_rate = s5pv310_fout_apll_get_rate,
1002};
1003
993void __init_or_cpufreq s5pv310_setup_clocks(void) 1004void __init_or_cpufreq s5pv310_setup_clocks(void)
994{ 1005{
995 struct clk *xtal_clk; 1006 struct clk *xtal_clk;
@@ -1013,6 +1024,9 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
1013 BUG_ON(IS_ERR(xtal_clk)); 1024 BUG_ON(IS_ERR(xtal_clk));
1014 1025
1015 xtal = clk_get_rate(xtal_clk); 1026 xtal = clk_get_rate(xtal_clk);
1027
1028 xtal_rate = xtal;
1029
1016 clk_put(xtal_clk); 1030 clk_put(xtal_clk);
1017 1031
1018 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); 1032 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
@@ -1026,7 +1040,7 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
1026 vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), 1040 vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
1027 __raw_readl(S5P_VPLL_CON1), pll_4650); 1041 __raw_readl(S5P_VPLL_CON1), pll_4650);
1028 1042
1029 clk_fout_apll.rate = apll; 1043 clk_fout_apll.ops = &s5pv310_fout_apll_ops;
1030 clk_fout_mpll.rate = mpll; 1044 clk_fout_mpll.rate = mpll;
1031 clk_fout_epll.rate = epll; 1045 clk_fout_epll.rate = epll;
1032 clk_fout_vpll.rate = vpll; 1046 clk_fout_vpll.rate = vpll;