diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-01 02:44:31 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-16 22:52:52 -0500 |
commit | ece3410efc4286b512af77934860436992127bde (patch) | |
tree | 53287bd4b520f9ad1a31b9fa06bc3d235324cbce /arch/arm | |
parent | df3ca747ebea6168059cd7ca7e1b3f65aae3bcc1 (diff) |
ARM: S5PV210: Cleanup map.h file
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/map.h | 168 |
1 files changed, 83 insertions, 85 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 3611492ad681..1dd58836fd4f 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5PV210 - Memory map definitions | 6 | * S5PV210 - Memory map definitions |
@@ -16,122 +16,120 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5PV210_PA_SROM_BANK5 (0xA8000000) | 19 | #define S5PV210_PA_SDRAM 0x20000000 |
20 | 20 | ||
21 | #define S5PC110_PA_ONENAND (0xB0000000) | 21 | #define S5PV210_PA_SROM_BANK5 0xA8000000 |
22 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
23 | 22 | ||
24 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) | 23 | #define S5PC110_PA_ONENAND 0xB0000000 |
25 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | 24 | #define S5PC110_PA_ONENAND_DMA 0xB0600000 |
26 | 25 | ||
27 | #define S5PV210_PA_CHIPID (0xE0000000) | 26 | #define S5PV210_PA_CHIPID 0xE0000000 |
28 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | ||
29 | 27 | ||
30 | #define S5PV210_PA_SYSCON (0xE0100000) | 28 | #define S5PV210_PA_SYSCON 0xE0100000 |
31 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | ||
32 | 29 | ||
33 | #define S5PV210_PA_GPIO (0xE0200000) | 30 | #define S5PV210_PA_GPIO 0xE0200000 |
34 | 31 | ||
35 | /* SPI */ | 32 | #define S5PV210_PA_SPDIF 0xE1100000 |
36 | #define S5PV210_PA_SPI0 0xE1300000 | ||
37 | #define S5PV210_PA_SPI1 0xE1400000 | ||
38 | 33 | ||
39 | #define S5PV210_PA_KEYPAD (0xE1600000) | 34 | #define S5PV210_PA_SPI0 0xE1300000 |
35 | #define S5PV210_PA_SPI1 0xE1400000 | ||
40 | 36 | ||
41 | #define S5PV210_PA_IIC0 (0xE1800000) | 37 | #define S5PV210_PA_KEYPAD 0xE1600000 |
42 | #define S5PV210_PA_IIC1 (0xFAB00000) | ||
43 | #define S5PV210_PA_IIC2 (0xE1A00000) | ||
44 | 38 | ||
45 | #define S5PV210_PA_TIMER (0xE2500000) | 39 | #define S5PV210_PA_ADC 0xE1700000 |
46 | #define S5P_PA_TIMER S5PV210_PA_TIMER | ||
47 | 40 | ||
48 | #define S5PV210_PA_SYSTIMER (0xE2600000) | 41 | #define S5PV210_PA_IIC0 0xE1800000 |
42 | #define S5PV210_PA_IIC1 0xFAB00000 | ||
43 | #define S5PV210_PA_IIC2 0xE1A00000 | ||
49 | 44 | ||
50 | #define S5PV210_PA_WATCHDOG (0xE2700000) | 45 | #define S5PV210_PA_AC97 0xE2200000 |
51 | 46 | ||
52 | #define S5PV210_PA_RTC (0xE2800000) | 47 | #define S5PV210_PA_PCM0 0xE2300000 |
53 | #define S5PV210_PA_UART (0xE2900000) | 48 | #define S5PV210_PA_PCM1 0xE1200000 |
49 | #define S5PV210_PA_PCM2 0xE2B00000 | ||
54 | 50 | ||
55 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | 51 | #define S5PV210_PA_TIMER 0xE2500000 |
56 | #define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) | 52 | #define S5PV210_PA_SYSTIMER 0xE2600000 |
57 | #define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) | 53 | #define S5PV210_PA_WATCHDOG 0xE2700000 |
58 | #define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) | 54 | #define S5PV210_PA_RTC 0xE2800000 |
59 | 55 | ||
60 | #define S5P_SZ_UART SZ_256 | 56 | #define S5PV210_PA_UART 0xE2900000 |
61 | 57 | ||
62 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | 58 | #define S5PV210_PA_SROMC 0xE8000000 |
63 | 59 | ||
64 | #define S5PV210_PA_SROMC (0xE8000000) | 60 | #define S5PV210_PA_CFCON 0xE8200000 |
65 | #define S5P_PA_SROMC S5PV210_PA_SROMC | ||
66 | 61 | ||
67 | #define S5PV210_PA_CFCON (0xE8200000) | 62 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) |
68 | 63 | ||
69 | #define S5PV210_PA_MDMA 0xFA200000 | 64 | #define S5PV210_PA_HSOTG 0xEC000000 |
70 | #define S5PV210_PA_PDMA0 0xE0900000 | 65 | #define S5PV210_PA_HSPHY 0xEC100000 |
71 | #define S5PV210_PA_PDMA1 0xE0A00000 | ||
72 | 66 | ||
73 | #define S5PV210_PA_FB (0xF8000000) | 67 | #define S5PV210_PA_IIS0 0xEEE30000 |
68 | #define S5PV210_PA_IIS1 0xE2100000 | ||
69 | #define S5PV210_PA_IIS2 0xE2A00000 | ||
74 | 70 | ||
75 | #define S5PV210_PA_FIMC0 (0xFB200000) | 71 | #define S5PV210_PA_DMC0 0xF0000000 |
76 | #define S5PV210_PA_FIMC1 (0xFB300000) | 72 | #define S5PV210_PA_DMC1 0xF1400000 |
77 | #define S5PV210_PA_FIMC2 (0xFB400000) | ||
78 | 73 | ||
79 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | 74 | #define S5PV210_PA_VIC0 0xF2000000 |
75 | #define S5PV210_PA_VIC1 0xF2100000 | ||
76 | #define S5PV210_PA_VIC2 0xF2200000 | ||
77 | #define S5PV210_PA_VIC3 0xF2300000 | ||
80 | 78 | ||
81 | #define S5PV210_PA_HSOTG (0xEC000000) | 79 | #define S5PV210_PA_FB 0xF8000000 |
82 | #define S5PV210_PA_HSPHY (0xEC100000) | ||
83 | 80 | ||
84 | #define S5PV210_PA_VIC0 (0xF2000000) | 81 | #define S5PV210_PA_MDMA 0xFA200000 |
85 | #define S5PV210_PA_VIC1 (0xF2100000) | 82 | #define S5PV210_PA_PDMA0 0xE0900000 |
86 | #define S5PV210_PA_VIC2 (0xF2200000) | 83 | #define S5PV210_PA_PDMA1 0xE0A00000 |
87 | #define S5PV210_PA_VIC3 (0xF2300000) | ||
88 | 84 | ||
89 | #define S5PV210_PA_SDRAM (0x20000000) | 85 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 |
90 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | ||
91 | 86 | ||
92 | /* S/PDIF */ | 87 | #define S5PV210_PA_FIMC0 0xFB200000 |
93 | #define S5PV210_PA_SPDIF 0xE1100000 | 88 | #define S5PV210_PA_FIMC1 0xFB300000 |
89 | #define S5PV210_PA_FIMC2 0xFB400000 | ||
94 | 90 | ||
95 | /* I2S */ | 91 | /* Compatibiltiy Defines */ |
96 | #define S5PV210_PA_IIS0 0xEEE30000 | ||
97 | #define S5PV210_PA_IIS1 0xE2100000 | ||
98 | #define S5PV210_PA_IIS2 0xE2A00000 | ||
99 | 92 | ||
100 | /* PCM */ | 93 | #define S3C_PA_FB S5PV210_PA_FB |
101 | #define S5PV210_PA_PCM0 0xE2300000 | 94 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) |
102 | #define S5PV210_PA_PCM1 0xE1200000 | 95 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) |
103 | #define S5PV210_PA_PCM2 0xE2B00000 | 96 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) |
97 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
98 | #define S3C_PA_IIC S5PV210_PA_IIC0 | ||
99 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
100 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
101 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
102 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | ||
103 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
104 | 104 | ||
105 | /* AC97 */ | 105 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
106 | #define S5PV210_PA_AC97 0xE2200000 | 106 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 |
107 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
108 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
109 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
110 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND | ||
111 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA | ||
112 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | ||
113 | #define S5P_PA_SROMC S5PV210_PA_SROMC | ||
114 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | ||
115 | #define S5P_PA_TIMER S5PV210_PA_TIMER | ||
107 | 116 | ||
108 | #define S5PV210_PA_ADC (0xE1700000) | 117 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC |
118 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | ||
119 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | ||
109 | 120 | ||
110 | #define S5PV210_PA_DMC0 (0xF0000000) | 121 | /* UART */ |
111 | #define S5PV210_PA_DMC1 (0xF1400000) | ||
112 | 122 | ||
113 | #define S5PV210_PA_MIPI_CSIS 0xFA600000 | 123 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) |
114 | 124 | ||
115 | /* compatibiltiy defines. */ | 125 | #define S3C_PA_UART S5PV210_PA_UART |
116 | #define S3C_PA_UART S5PV210_PA_UART | ||
117 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | ||
118 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | ||
119 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | ||
120 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | ||
121 | #define S3C_PA_IIC S5PV210_PA_IIC0 | ||
122 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
123 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
124 | #define S3C_PA_FB S5PV210_PA_FB | ||
125 | #define S3C_PA_RTC S5PV210_PA_RTC | ||
126 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
127 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG | ||
128 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | ||
129 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | ||
130 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | ||
131 | #define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS | ||
132 | 126 | ||
133 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | 127 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) |
134 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON | 128 | #define S5P_PA_UART0 S5P_PA_UART(0) |
135 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD | 129 | #define S5P_PA_UART1 S5P_PA_UART(1) |
130 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
131 | #define S5P_PA_UART3 S5P_PA_UART(3) | ||
132 | |||
133 | #define S5P_SZ_UART SZ_256 | ||
136 | 134 | ||
137 | #endif /* __ASM_ARCH_MAP_H */ | 135 | #endif /* __ASM_ARCH_MAP_H */ |