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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-12-08 10:58:50 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-12-08 10:58:50 -0500
commit1df8130278c4543555fea697e5714fbac300b899 (patch)
treecf9ed1b4b76fcdaa9d61ff3dea2e9cbd6396a9e1 /arch/arm
parentf40b121d983dfc53bde882aadec7f2f0bbcbd1c2 (diff)
[ARM] dma: remove dmach_t typedef
Remove a pointless integer typedef. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/dma.h32
-rw-r--r--arch/arm/include/asm/mach/dma.h12
-rw-r--r--arch/arm/kernel/dma-isa.c42
-rw-r--r--arch/arm/kernel/dma.c86
-rw-r--r--arch/arm/mach-footbridge/dma.c6
-rw-r--r--arch/arm/mach-rpc/dma.c20
6 files changed, 98 insertions, 100 deletions
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index df5638f3643a..c5557a650d1d 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -19,8 +19,6 @@
19#include <asm/system.h> 19#include <asm/system.h>
20#include <asm/scatterlist.h> 20#include <asm/scatterlist.h>
21 21
22typedef unsigned int dmach_t;
23
24#include <mach/isa-dma.h> 22#include <mach/isa-dma.h>
25 23
26/* 24/*
@@ -52,44 +50,44 @@ static inline void release_dma_lock(unsigned long flags)
52/* Clear the 'DMA Pointer Flip Flop'. 50/* Clear the 'DMA Pointer Flip Flop'.
53 * Write 0 for LSB/MSB, 1 for MSB/LSB access. 51 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
54 */ 52 */
55#define clear_dma_ff(channel) 53#define clear_dma_ff(chan)
56 54
57/* Set only the page register bits of the transfer address. 55/* Set only the page register bits of the transfer address.
58 * 56 *
59 * NOTE: This is an architecture specific function, and should 57 * NOTE: This is an architecture specific function, and should
60 * be hidden from the drivers 58 * be hidden from the drivers
61 */ 59 */
62extern void set_dma_page(dmach_t channel, char pagenr); 60extern void set_dma_page(unsigned int chan, char pagenr);
63 61
64/* Request a DMA channel 62/* Request a DMA channel
65 * 63 *
66 * Some architectures may need to do allocate an interrupt 64 * Some architectures may need to do allocate an interrupt
67 */ 65 */
68extern int request_dma(dmach_t channel, const char * device_id); 66extern int request_dma(unsigned int chan, const char * device_id);
69 67
70/* Free a DMA channel 68/* Free a DMA channel
71 * 69 *
72 * Some architectures may need to do free an interrupt 70 * Some architectures may need to do free an interrupt
73 */ 71 */
74extern void free_dma(dmach_t channel); 72extern void free_dma(unsigned int chan);
75 73
76/* Enable DMA for this channel 74/* Enable DMA for this channel
77 * 75 *
78 * On some architectures, this may have other side effects like 76 * On some architectures, this may have other side effects like
79 * enabling an interrupt and setting the DMA registers. 77 * enabling an interrupt and setting the DMA registers.
80 */ 78 */
81extern void enable_dma(dmach_t channel); 79extern void enable_dma(unsigned int chan);
82 80
83/* Disable DMA for this channel 81/* Disable DMA for this channel
84 * 82 *
85 * On some architectures, this may have other side effects like 83 * On some architectures, this may have other side effects like
86 * disabling an interrupt or whatever. 84 * disabling an interrupt or whatever.
87 */ 85 */
88extern void disable_dma(dmach_t channel); 86extern void disable_dma(unsigned int chan);
89 87
90/* Test whether the specified channel has an active DMA transfer 88/* Test whether the specified channel has an active DMA transfer
91 */ 89 */
92extern int dma_channel_active(dmach_t channel); 90extern int dma_channel_active(unsigned int chan);
93 91
94/* Set the DMA scatter gather list for this channel 92/* Set the DMA scatter gather list for this channel
95 * 93 *
@@ -97,7 +95,7 @@ extern int dma_channel_active(dmach_t channel);
97 * especially since some DMA architectures don't update the 95 * especially since some DMA architectures don't update the
98 * DMA address immediately, but defer it to the enable_dma(). 96 * DMA address immediately, but defer it to the enable_dma().
99 */ 97 */
100extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); 98extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg);
101 99
102/* Set the DMA address for this channel 100/* Set the DMA address for this channel
103 * 101 *
@@ -105,9 +103,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
105 * especially since some DMA architectures don't update the 103 * especially since some DMA architectures don't update the
106 * DMA address immediately, but defer it to the enable_dma(). 104 * DMA address immediately, but defer it to the enable_dma().
107 */ 105 */
108extern void __set_dma_addr(dmach_t channel, void *addr); 106extern void __set_dma_addr(unsigned int chan, void *addr);
109#define set_dma_addr(channel, addr) \ 107#define set_dma_addr(chan, addr) \
110 __set_dma_addr(channel, bus_to_virt(addr)) 108 __set_dma_addr(chan, bus_to_virt(addr))
111 109
112/* Set the DMA byte count for this channel 110/* Set the DMA byte count for this channel
113 * 111 *
@@ -115,7 +113,7 @@ extern void __set_dma_addr(dmach_t channel, void *addr);
115 * especially since some DMA architectures don't update the 113 * especially since some DMA architectures don't update the
116 * DMA count immediately, but defer it to the enable_dma(). 114 * DMA count immediately, but defer it to the enable_dma().
117 */ 115 */
118extern void set_dma_count(dmach_t channel, unsigned long count); 116extern void set_dma_count(unsigned int chan, unsigned long count);
119 117
120/* Set the transfer direction for this channel 118/* Set the transfer direction for this channel
121 * 119 *
@@ -124,11 +122,11 @@ extern void set_dma_count(dmach_t channel, unsigned long count);
124 * DMA transfer direction immediately, but defer it to the 122 * DMA transfer direction immediately, but defer it to the
125 * enable_dma(). 123 * enable_dma().
126 */ 124 */
127extern void set_dma_mode(dmach_t channel, dmamode_t mode); 125extern void set_dma_mode(unsigned int chan, dmamode_t mode);
128 126
129/* Set the transfer speed for this channel 127/* Set the transfer speed for this channel
130 */ 128 */
131extern void set_dma_speed(dmach_t channel, int cycle_ns); 129extern void set_dma_speed(unsigned int chan, int cycle_ns);
132 130
133/* Get DMA residue count. After a DMA transfer, this 131/* Get DMA residue count. After a DMA transfer, this
134 * should return zero. Reading this while a DMA transfer is 132 * should return zero. Reading this while a DMA transfer is
@@ -136,7 +134,7 @@ extern void set_dma_speed(dmach_t channel, int cycle_ns);
136 * If called before the channel has been used, it may return 1. 134 * If called before the channel has been used, it may return 1.
137 * Otherwise, it returns the number of _bytes_ left to transfer. 135 * Otherwise, it returns the number of _bytes_ left to transfer.
138 */ 136 */
139extern int get_dma_residue(dmach_t channel); 137extern int get_dma_residue(unsigned int chan);
140 138
141#ifndef NO_DMA 139#ifndef NO_DMA
142#define NO_DMA 255 140#define NO_DMA 255
diff --git a/arch/arm/include/asm/mach/dma.h b/arch/arm/include/asm/mach/dma.h
index fc7278ea7146..281ae7e40a90 100644
--- a/arch/arm/include/asm/mach/dma.h
+++ b/arch/arm/include/asm/mach/dma.h
@@ -15,12 +15,12 @@ struct dma_struct;
15typedef struct dma_struct dma_t; 15typedef struct dma_struct dma_t;
16 16
17struct dma_ops { 17struct dma_ops {
18 int (*request)(dmach_t, dma_t *); /* optional */ 18 int (*request)(unsigned int, dma_t *); /* optional */
19 void (*free)(dmach_t, dma_t *); /* optional */ 19 void (*free)(unsigned int, dma_t *); /* optional */
20 void (*enable)(dmach_t, dma_t *); /* mandatory */ 20 void (*enable)(unsigned int, dma_t *); /* mandatory */
21 void (*disable)(dmach_t, dma_t *); /* mandatory */ 21 void (*disable)(unsigned int, dma_t *); /* mandatory */
22 int (*residue)(dmach_t, dma_t *); /* optional */ 22 int (*residue)(unsigned int, dma_t *); /* optional */
23 int (*setspeed)(dmach_t, dma_t *, int); /* optional */ 23 int (*setspeed)(unsigned int, dma_t *, int); /* optional */
24 char *type; 24 char *type;
25}; 25};
26 26
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c
index 4a3a50495c60..29eca48925d8 100644
--- a/arch/arm/kernel/dma-isa.c
+++ b/arch/arm/kernel/dma-isa.c
@@ -49,25 +49,25 @@ static unsigned int isa_dma_port[8][7] = {
49 { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce } 49 { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce }
50}; 50};
51 51
52static int isa_get_dma_residue(dmach_t channel, dma_t *dma) 52static int isa_get_dma_residue(unsigned int chan, dma_t *dma)
53{ 53{
54 unsigned int io_port = isa_dma_port[channel][ISA_DMA_COUNT]; 54 unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT];
55 int count; 55 int count;
56 56
57 count = 1 + inb(io_port); 57 count = 1 + inb(io_port);
58 count |= inb(io_port) << 8; 58 count |= inb(io_port) << 8;
59 59
60 return channel < 4 ? count : (count << 1); 60 return chan < 4 ? count : (count << 1);
61} 61}
62 62
63static void isa_enable_dma(dmach_t channel, dma_t *dma) 63static void isa_enable_dma(unsigned int chan, dma_t *dma)
64{ 64{
65 if (dma->invalid) { 65 if (dma->invalid) {
66 unsigned long address, length; 66 unsigned long address, length;
67 unsigned int mode; 67 unsigned int mode;
68 enum dma_data_direction direction; 68 enum dma_data_direction direction;
69 69
70 mode = channel & 3; 70 mode = chan & 3;
71 switch (dma->dma_mode & DMA_MODE_MASK) { 71 switch (dma->dma_mode & DMA_MODE_MASK) {
72 case DMA_MODE_READ: 72 case DMA_MODE_READ:
73 mode |= ISA_DMA_MODE_READ; 73 mode |= ISA_DMA_MODE_READ;
@@ -105,34 +105,34 @@ static void isa_enable_dma(dmach_t channel, dma_t *dma)
105 address = dma->buf.dma_address; 105 address = dma->buf.dma_address;
106 length = dma->buf.length - 1; 106 length = dma->buf.length - 1;
107 107
108 outb(address >> 16, isa_dma_port[channel][ISA_DMA_PGLO]); 108 outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]);
109 outb(address >> 24, isa_dma_port[channel][ISA_DMA_PGHI]); 109 outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]);
110 110
111 if (channel >= 4) { 111 if (chan >= 4) {
112 address >>= 1; 112 address >>= 1;
113 length >>= 1; 113 length >>= 1;
114 } 114 }
115 115
116 outb(0, isa_dma_port[channel][ISA_DMA_CLRFF]); 116 outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]);
117 117
118 outb(address, isa_dma_port[channel][ISA_DMA_ADDR]); 118 outb(address, isa_dma_port[chan][ISA_DMA_ADDR]);
119 outb(address >> 8, isa_dma_port[channel][ISA_DMA_ADDR]); 119 outb(address >> 8, isa_dma_port[chan][ISA_DMA_ADDR]);
120 120
121 outb(length, isa_dma_port[channel][ISA_DMA_COUNT]); 121 outb(length, isa_dma_port[chan][ISA_DMA_COUNT]);
122 outb(length >> 8, isa_dma_port[channel][ISA_DMA_COUNT]); 122 outb(length >> 8, isa_dma_port[chan][ISA_DMA_COUNT]);
123 123
124 if (dma->dma_mode & DMA_AUTOINIT) 124 if (dma->dma_mode & DMA_AUTOINIT)
125 mode |= ISA_DMA_AUTOINIT; 125 mode |= ISA_DMA_AUTOINIT;
126 126
127 outb(mode, isa_dma_port[channel][ISA_DMA_MODE]); 127 outb(mode, isa_dma_port[chan][ISA_DMA_MODE]);
128 dma->invalid = 0; 128 dma->invalid = 0;
129 } 129 }
130 outb(channel & 3, isa_dma_port[channel][ISA_DMA_MASK]); 130 outb(chan & 3, isa_dma_port[chan][ISA_DMA_MASK]);
131} 131}
132 132
133static void isa_disable_dma(dmach_t channel, dma_t *dma) 133static void isa_disable_dma(unsigned int chan, dma_t *dma)
134{ 134{
135 outb(channel | 4, isa_dma_port[channel][ISA_DMA_MASK]); 135 outb(chan | 4, isa_dma_port[chan][ISA_DMA_MASK]);
136} 136}
137 137
138static struct dma_ops isa_dma_ops = { 138static struct dma_ops isa_dma_ops = {
@@ -178,11 +178,11 @@ void __init isa_init_dma(dma_t *dma)
178 outb(0xaa, 0x00); 178 outb(0xaa, 0x00);
179 179
180 if (inb(0) == 0x55 && inb(0) == 0xaa) { 180 if (inb(0) == 0x55 && inb(0) == 0xaa) {
181 int channel, i; 181 int chan, i;
182 182
183 for (channel = 0; channel < 8; channel++) { 183 for (chan = 0; chan < 8; chan++) {
184 dma[channel].d_ops = &isa_dma_ops; 184 dma[chan].d_ops = &isa_dma_ops;
185 isa_disable_dma(channel, NULL); 185 isa_disable_dma(chan, NULL);
186 } 186 }
187 187
188 outb(0x40, 0x0b); 188 outb(0x40, 0x0b);
diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c
index d006085ed7e7..c31bf00e5bae 100644
--- a/arch/arm/kernel/dma.c
+++ b/arch/arm/kernel/dma.c
@@ -30,12 +30,12 @@ static dma_t dma_chan[MAX_DMA_CHANNELS];
30 * 30 *
31 * On certain platforms, we have to allocate an interrupt as well... 31 * On certain platforms, we have to allocate an interrupt as well...
32 */ 32 */
33int request_dma(dmach_t channel, const char *device_id) 33int request_dma(unsigned int chan, const char *device_id)
34{ 34{
35 dma_t *dma = dma_chan + channel; 35 dma_t *dma = dma_chan + chan;
36 int ret; 36 int ret;
37 37
38 if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) 38 if (chan >= MAX_DMA_CHANNELS || !dma->d_ops)
39 goto bad_dma; 39 goto bad_dma;
40 40
41 if (xchg(&dma->lock, 1) != 0) 41 if (xchg(&dma->lock, 1) != 0)
@@ -47,7 +47,7 @@ int request_dma(dmach_t channel, const char *device_id)
47 47
48 ret = 0; 48 ret = 0;
49 if (dma->d_ops->request) 49 if (dma->d_ops->request)
50 ret = dma->d_ops->request(channel, dma); 50 ret = dma->d_ops->request(chan, dma);
51 51
52 if (ret) 52 if (ret)
53 xchg(&dma->lock, 0); 53 xchg(&dma->lock, 0);
@@ -55,7 +55,7 @@ int request_dma(dmach_t channel, const char *device_id)
55 return ret; 55 return ret;
56 56
57bad_dma: 57bad_dma:
58 printk(KERN_ERR "dma: trying to allocate DMA%d\n", channel); 58 printk(KERN_ERR "dma: trying to allocate DMA%d\n", chan);
59 return -EINVAL; 59 return -EINVAL;
60 60
61busy: 61busy:
@@ -68,42 +68,42 @@ EXPORT_SYMBOL(request_dma);
68 * 68 *
69 * On certain platforms, we have to free interrupt as well... 69 * On certain platforms, we have to free interrupt as well...
70 */ 70 */
71void free_dma(dmach_t channel) 71void free_dma(unsigned int chan)
72{ 72{
73 dma_t *dma = dma_chan + channel; 73 dma_t *dma = dma_chan + chan;
74 74
75 if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) 75 if (chan >= MAX_DMA_CHANNELS || !dma->d_ops)
76 goto bad_dma; 76 goto bad_dma;
77 77
78 if (dma->active) { 78 if (dma->active) {
79 printk(KERN_ERR "dma%d: freeing active DMA\n", channel); 79 printk(KERN_ERR "dma%d: freeing active DMA\n", chan);
80 dma->d_ops->disable(channel, dma); 80 dma->d_ops->disable(chan, dma);
81 dma->active = 0; 81 dma->active = 0;
82 } 82 }
83 83
84 if (xchg(&dma->lock, 0) != 0) { 84 if (xchg(&dma->lock, 0) != 0) {
85 if (dma->d_ops->free) 85 if (dma->d_ops->free)
86 dma->d_ops->free(channel, dma); 86 dma->d_ops->free(chan, dma);
87 return; 87 return;
88 } 88 }
89 89
90 printk(KERN_ERR "dma%d: trying to free free DMA\n", channel); 90 printk(KERN_ERR "dma%d: trying to free free DMA\n", chan);
91 return; 91 return;
92 92
93bad_dma: 93bad_dma:
94 printk(KERN_ERR "dma: trying to free DMA%d\n", channel); 94 printk(KERN_ERR "dma: trying to free DMA%d\n", chan);
95} 95}
96EXPORT_SYMBOL(free_dma); 96EXPORT_SYMBOL(free_dma);
97 97
98/* Set DMA Scatter-Gather list 98/* Set DMA Scatter-Gather list
99 */ 99 */
100void set_dma_sg (dmach_t channel, struct scatterlist *sg, int nr_sg) 100void set_dma_sg (unsigned int chan, struct scatterlist *sg, int nr_sg)
101{ 101{
102 dma_t *dma = dma_chan + channel; 102 dma_t *dma = dma_chan + chan;
103 103
104 if (dma->active) 104 if (dma->active)
105 printk(KERN_ERR "dma%d: altering DMA SG while " 105 printk(KERN_ERR "dma%d: altering DMA SG while "
106 "DMA active\n", channel); 106 "DMA active\n", chan);
107 107
108 dma->sg = sg; 108 dma->sg = sg;
109 dma->sgcount = nr_sg; 109 dma->sgcount = nr_sg;
@@ -115,13 +115,13 @@ EXPORT_SYMBOL(set_dma_sg);
115 * 115 *
116 * Copy address to the structure, and set the invalid bit 116 * Copy address to the structure, and set the invalid bit
117 */ 117 */
118void __set_dma_addr (dmach_t channel, void *addr) 118void __set_dma_addr (unsigned int chan, void *addr)
119{ 119{
120 dma_t *dma = dma_chan + channel; 120 dma_t *dma = dma_chan + chan;
121 121
122 if (dma->active) 122 if (dma->active)
123 printk(KERN_ERR "dma%d: altering DMA address while " 123 printk(KERN_ERR "dma%d: altering DMA address while "
124 "DMA active\n", channel); 124 "DMA active\n", chan);
125 125
126 dma->sg = NULL; 126 dma->sg = NULL;
127 dma->addr = addr; 127 dma->addr = addr;
@@ -133,13 +133,13 @@ EXPORT_SYMBOL(__set_dma_addr);
133 * 133 *
134 * Copy address to the structure, and set the invalid bit 134 * Copy address to the structure, and set the invalid bit
135 */ 135 */
136void set_dma_count (dmach_t channel, unsigned long count) 136void set_dma_count (unsigned int chan, unsigned long count)
137{ 137{
138 dma_t *dma = dma_chan + channel; 138 dma_t *dma = dma_chan + chan;
139 139
140 if (dma->active) 140 if (dma->active)
141 printk(KERN_ERR "dma%d: altering DMA count while " 141 printk(KERN_ERR "dma%d: altering DMA count while "
142 "DMA active\n", channel); 142 "DMA active\n", chan);
143 143
144 dma->sg = NULL; 144 dma->sg = NULL;
145 dma->count = count; 145 dma->count = count;
@@ -149,13 +149,13 @@ EXPORT_SYMBOL(set_dma_count);
149 149
150/* Set DMA direction mode 150/* Set DMA direction mode
151 */ 151 */
152void set_dma_mode (dmach_t channel, dmamode_t mode) 152void set_dma_mode (unsigned int chan, dmamode_t mode)
153{ 153{
154 dma_t *dma = dma_chan + channel; 154 dma_t *dma = dma_chan + chan;
155 155
156 if (dma->active) 156 if (dma->active)
157 printk(KERN_ERR "dma%d: altering DMA mode while " 157 printk(KERN_ERR "dma%d: altering DMA mode while "
158 "DMA active\n", channel); 158 "DMA active\n", chan);
159 159
160 dma->dma_mode = mode; 160 dma->dma_mode = mode;
161 dma->invalid = 1; 161 dma->invalid = 1;
@@ -164,42 +164,42 @@ EXPORT_SYMBOL(set_dma_mode);
164 164
165/* Enable DMA channel 165/* Enable DMA channel
166 */ 166 */
167void enable_dma (dmach_t channel) 167void enable_dma (unsigned int chan)
168{ 168{
169 dma_t *dma = dma_chan + channel; 169 dma_t *dma = dma_chan + chan;
170 170
171 if (!dma->lock) 171 if (!dma->lock)
172 goto free_dma; 172 goto free_dma;
173 173
174 if (dma->active == 0) { 174 if (dma->active == 0) {
175 dma->active = 1; 175 dma->active = 1;
176 dma->d_ops->enable(channel, dma); 176 dma->d_ops->enable(chan, dma);
177 } 177 }
178 return; 178 return;
179 179
180free_dma: 180free_dma:
181 printk(KERN_ERR "dma%d: trying to enable free DMA\n", channel); 181 printk(KERN_ERR "dma%d: trying to enable free DMA\n", chan);
182 BUG(); 182 BUG();
183} 183}
184EXPORT_SYMBOL(enable_dma); 184EXPORT_SYMBOL(enable_dma);
185 185
186/* Disable DMA channel 186/* Disable DMA channel
187 */ 187 */
188void disable_dma (dmach_t channel) 188void disable_dma (unsigned int chan)
189{ 189{
190 dma_t *dma = dma_chan + channel; 190 dma_t *dma = dma_chan + chan;
191 191
192 if (!dma->lock) 192 if (!dma->lock)
193 goto free_dma; 193 goto free_dma;
194 194
195 if (dma->active == 1) { 195 if (dma->active == 1) {
196 dma->active = 0; 196 dma->active = 0;
197 dma->d_ops->disable(channel, dma); 197 dma->d_ops->disable(chan, dma);
198 } 198 }
199 return; 199 return;
200 200
201free_dma: 201free_dma:
202 printk(KERN_ERR "dma%d: trying to disable free DMA\n", channel); 202 printk(KERN_ERR "dma%d: trying to disable free DMA\n", chan);
203 BUG(); 203 BUG();
204} 204}
205EXPORT_SYMBOL(disable_dma); 205EXPORT_SYMBOL(disable_dma);
@@ -207,36 +207,36 @@ EXPORT_SYMBOL(disable_dma);
207/* 207/*
208 * Is the specified DMA channel active? 208 * Is the specified DMA channel active?
209 */ 209 */
210int dma_channel_active(dmach_t channel) 210int dma_channel_active(unsigned int chan)
211{ 211{
212 return dma_chan[channel].active; 212 return dma_chan[chan].active;
213} 213}
214EXPORT_SYMBOL(dma_channel_active); 214EXPORT_SYMBOL(dma_channel_active);
215 215
216void set_dma_page(dmach_t channel, char pagenr) 216void set_dma_page(unsigned int chan, char pagenr)
217{ 217{
218 printk(KERN_ERR "dma%d: trying to set_dma_page\n", channel); 218 printk(KERN_ERR "dma%d: trying to set_dma_page\n", chan);
219} 219}
220EXPORT_SYMBOL(set_dma_page); 220EXPORT_SYMBOL(set_dma_page);
221 221
222void set_dma_speed(dmach_t channel, int cycle_ns) 222void set_dma_speed(unsigned int chan, int cycle_ns)
223{ 223{
224 dma_t *dma = dma_chan + channel; 224 dma_t *dma = dma_chan + chan;
225 int ret = 0; 225 int ret = 0;
226 226
227 if (dma->d_ops->setspeed) 227 if (dma->d_ops->setspeed)
228 ret = dma->d_ops->setspeed(channel, dma, cycle_ns); 228 ret = dma->d_ops->setspeed(chan, dma, cycle_ns);
229 dma->speed = ret; 229 dma->speed = ret;
230} 230}
231EXPORT_SYMBOL(set_dma_speed); 231EXPORT_SYMBOL(set_dma_speed);
232 232
233int get_dma_residue(dmach_t channel) 233int get_dma_residue(unsigned int chan)
234{ 234{
235 dma_t *dma = dma_chan + channel; 235 dma_t *dma = dma_chan + chan;
236 int ret = 0; 236 int ret = 0;
237 237
238 if (dma->d_ops->residue) 238 if (dma->d_ops->residue)
239 ret = dma->d_ops->residue(channel, dma); 239 ret = dma->d_ops->residue(chan, dma);
240 240
241 return ret; 241 return ret;
242} 242}
diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c
index b653e9cfa3f7..e7b8a6adaf7a 100644
--- a/arch/arm/mach-footbridge/dma.c
+++ b/arch/arm/mach-footbridge/dma.c
@@ -20,16 +20,16 @@
20#include <asm/hardware/dec21285.h> 20#include <asm/hardware/dec21285.h>
21 21
22#if 0 22#if 0
23static int fb_dma_request(dmach_t channel, dma_t *dma) 23static int fb_dma_request(unsigned int chan, dma_t *dma)
24{ 24{
25 return -EINVAL; 25 return -EINVAL;
26} 26}
27 27
28static void fb_dma_enable(dmach_t channel, dma_t *dma) 28static void fb_dma_enable(unsigned int chan, dma_t *dma)
29{ 29{
30} 30}
31 31
32static void fb_dma_disable(dmach_t channel, dma_t *dma) 32static void fb_dma_disable(unsigned int chan, dma_t *dma)
33{ 33{
34} 34}
35 35
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c
index 7958a30f8932..a86d3ed859a7 100644
--- a/arch/arm/mach-rpc/dma.c
+++ b/arch/arm/mach-rpc/dma.c
@@ -125,18 +125,18 @@ static irqreturn_t iomd_dma_handle(int irq, void *dev_id)
125 return IRQ_HANDLED; 125 return IRQ_HANDLED;
126} 126}
127 127
128static int iomd_request_dma(dmach_t channel, dma_t *dma) 128static int iomd_request_dma(unsigned int chan, dma_t *dma)
129{ 129{
130 return request_irq(dma->dma_irq, iomd_dma_handle, 130 return request_irq(dma->dma_irq, iomd_dma_handle,
131 IRQF_DISABLED, dma->device_id, dma); 131 IRQF_DISABLED, dma->device_id, dma);
132} 132}
133 133
134static void iomd_free_dma(dmach_t channel, dma_t *dma) 134static void iomd_free_dma(unsigned int chan, dma_t *dma)
135{ 135{
136 free_irq(dma->dma_irq, dma); 136 free_irq(dma->dma_irq, dma);
137} 137}
138 138
139static void iomd_enable_dma(dmach_t channel, dma_t *dma) 139static void iomd_enable_dma(unsigned int chan, dma_t *dma)
140{ 140{
141 unsigned long dma_base = dma->dma_base; 141 unsigned long dma_base = dma->dma_base;
142 unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E; 142 unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E;
@@ -169,7 +169,7 @@ static void iomd_enable_dma(dmach_t channel, dma_t *dma)
169 enable_irq(dma->dma_irq); 169 enable_irq(dma->dma_irq);
170} 170}
171 171
172static void iomd_disable_dma(dmach_t channel, dma_t *dma) 172static void iomd_disable_dma(unsigned int chan, dma_t *dma)
173{ 173{
174 unsigned long dma_base = dma->dma_base; 174 unsigned long dma_base = dma->dma_base;
175 unsigned long flags; 175 unsigned long flags;
@@ -181,7 +181,7 @@ static void iomd_disable_dma(dmach_t channel, dma_t *dma)
181 local_irq_restore(flags); 181 local_irq_restore(flags);
182} 182}
183 183
184static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle) 184static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle)
185{ 185{
186 int tcr, speed; 186 int tcr, speed;
187 187
@@ -197,7 +197,7 @@ static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle)
197 tcr = iomd_readb(IOMD_DMATCR); 197 tcr = iomd_readb(IOMD_DMATCR);
198 speed &= 3; 198 speed &= 3;
199 199
200 switch (channel) { 200 switch (chan) {
201 case DMA_0: 201 case DMA_0:
202 tcr = (tcr & ~0x03) | speed; 202 tcr = (tcr & ~0x03) | speed;
203 break; 203 break;
@@ -236,7 +236,7 @@ static struct fiq_handler fh = {
236 .name = "floppydma" 236 .name = "floppydma"
237}; 237};
238 238
239static void floppy_enable_dma(dmach_t channel, dma_t *dma) 239static void floppy_enable_dma(unsigned int chan, dma_t *dma)
240{ 240{
241 void *fiqhandler_start; 241 void *fiqhandler_start;
242 unsigned int fiqhandler_length; 242 unsigned int fiqhandler_length;
@@ -269,13 +269,13 @@ static void floppy_enable_dma(dmach_t channel, dma_t *dma)
269 enable_fiq(dma->dma_irq); 269 enable_fiq(dma->dma_irq);
270} 270}
271 271
272static void floppy_disable_dma(dmach_t channel, dma_t *dma) 272static void floppy_disable_dma(unsigned int chan, dma_t *dma)
273{ 273{
274 disable_fiq(dma->dma_irq); 274 disable_fiq(dma->dma_irq);
275 release_fiq(&fh); 275 release_fiq(&fh);
276} 276}
277 277
278static int floppy_get_residue(dmach_t channel, dma_t *dma) 278static int floppy_get_residue(unsigned int chan, dma_t *dma)
279{ 279{
280 struct pt_regs regs; 280 struct pt_regs regs;
281 get_fiq_regs(&regs); 281 get_fiq_regs(&regs);
@@ -292,7 +292,7 @@ static struct dma_ops floppy_dma_ops = {
292/* 292/*
293 * This is virtual DMA - we don't need anything here. 293 * This is virtual DMA - we don't need anything here.
294 */ 294 */
295static void sound_enable_disable_dma(dmach_t channel, dma_t *dma) 295static void sound_enable_disable_dma(unsigned int chan, dma_t *dma)
296{ 296{
297} 297}
298 298