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authormanjugk manjugk <manjugk@ti.com>2010-03-04 02:11:56 -0500
committerTony Lindgren <tony@atomide.com>2010-04-22 20:34:27 -0400
commit519e61666f4030426fc539d4e7102dc2bad41113 (patch)
tree5553802fccc286236dd0a4c6ba9f5c8a3e90e4e9 /arch/arm
parent29501577a7f3c925d5273064752ce3dc356ccfad (diff)
omap: DMA: Init CDAC to zero
The register DMA4_CDAC needs to be initialized to zero before starting DMA transfer. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Govindraj R <govindraj.raja@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Reported-by:S, Venkatraman <svenkatr@ti.com> Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-omap/dma.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 2ab224c8e16c..f6c9bdc95bce 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -936,6 +936,15 @@ void omap_start_dma(int lch)
936{ 936{
937 u32 l; 937 u32 l;
938 938
939 /*
940 * The CPC/CDAC register needs to be initialized to zero
941 * before starting dma transfer.
942 */
943 if (cpu_is_omap15xx())
944 dma_write(0, CPC(lch));
945 else
946 dma_write(0, CDAC(lch));
947
939 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 948 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
940 int next_lch, cur_lch; 949 int next_lch, cur_lch;
941 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 950 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];