diff options
author | Olof Johansson <olof@lixom.net> | 2012-11-30 01:47:30 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-11-30 01:47:30 -0500 |
commit | 77f9db89c928773e5fb1df0df4d13d5cc8abd178 (patch) | |
tree | 40be55deab65bf593b9831dc10318272283d8500 /arch/arm | |
parent | 68fb31706d50dd5d337cd7928aeb780358b910a5 (diff) | |
parent | 64507dd7028e3e0145077e73b8374bd75aea117c (diff) |
Merge branch 'next/dt' into next/pm2
By Lee Jones (42) and others
via Olof Johansson (13) and others
* next/dt: (249 commits)
ARM: ux500: Rename dbx500 cpufreq code to be more generic
ARM: dts: add missing ux500 device trees
ARM: ux500: Stop registering the PCM driver from platform code
ARM: ux500: Move board specific GPIO info out to subordinate DTS files
ARM: ux500: Disable the MMCI gpio-regulator by default
ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
ARM: Kirkwood: Add support LED of OpenBlocks A6
ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
ARM: kirkwood: Add support DT of second I2C bus
ARM: kirkwood: Convert mplcec4 board to pinctrl
ARM: Kirkwood: Convert km_kirkwood to pinctrl
ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
ARM: Kirkwood: Convert IX2-200 to pinctrl.
ARM: Kirkwood: Convert lsxl boards to pinctrl.
ARM: Kirkwood: Convert ib62x0 to pinctrl.
ARM: Kirkwood: Convert GoFlex Net to pinctrl.
ARM: Kirkwood: Convert dreamplug to pinctrl.
ARM: Kirkwood: Convert dockstar to pinctrl.
...
Diffstat (limited to 'arch/arm')
206 files changed, 9519 insertions, 1572 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d45ca1bf1de0..a920f2c422e9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -523,6 +523,8 @@ config ARCH_DOVE | |||
523 | select CPU_V7 | 523 | select CPU_V7 |
524 | select GENERIC_CLOCKEVENTS | 524 | select GENERIC_CLOCKEVENTS |
525 | select MIGHT_HAVE_PCI | 525 | select MIGHT_HAVE_PCI |
526 | select PINCTRL | ||
527 | select PINCTRL_DOVE | ||
526 | select PLAT_ORION_LEGACY | 528 | select PLAT_ORION_LEGACY |
527 | select USB_ARCH_HAS_EHCI | 529 | select USB_ARCH_HAS_EHCI |
528 | help | 530 | help |
@@ -534,6 +536,8 @@ config ARCH_KIRKWOOD | |||
534 | select CPU_FEROCEON | 536 | select CPU_FEROCEON |
535 | select GENERIC_CLOCKEVENTS | 537 | select GENERIC_CLOCKEVENTS |
536 | select PCI | 538 | select PCI |
539 | select PINCTRL | ||
540 | select PINCTRL_KIRKWOOD | ||
537 | select PLAT_ORION_LEGACY | 541 | select PLAT_ORION_LEGACY |
538 | help | 542 | help |
539 | Support for the following Marvell Kirkwood series SoCs: | 543 | Support for the following Marvell Kirkwood series SoCs: |
@@ -911,6 +915,7 @@ config ARCH_DAVINCI | |||
911 | select GENERIC_IRQ_CHIP | 915 | select GENERIC_IRQ_CHIP |
912 | select HAVE_IDE | 916 | select HAVE_IDE |
913 | select NEED_MACH_GPIO_H | 917 | select NEED_MACH_GPIO_H |
918 | select USE_OF | ||
914 | select ZONE_DMA | 919 | select ZONE_DMA |
915 | help | 920 | help |
916 | Support for TI's DaVinci platform. | 921 | Support for TI's DaVinci platform. |
@@ -945,6 +950,7 @@ config ARCH_ZYNQ | |||
945 | bool "Xilinx Zynq ARM Cortex A9 Platform" | 950 | bool "Xilinx Zynq ARM Cortex A9 Platform" |
946 | select ARM_AMBA | 951 | select ARM_AMBA |
947 | select ARM_GIC | 952 | select ARM_GIC |
953 | select COMMON_CLK | ||
948 | select CPU_V7 | 954 | select CPU_V7 |
949 | select GENERIC_CLOCKEVENTS | 955 | select GENERIC_CLOCKEVENTS |
950 | select ICST | 956 | select ICST |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5566520686a5..00e9a53888ba 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -132,6 +132,23 @@ choice | |||
132 | their output to UART1 serial port on DaVinci TNETV107X | 132 | their output to UART1 serial port on DaVinci TNETV107X |
133 | devices. | 133 | devices. |
134 | 134 | ||
135 | config DEBUG_ZYNQ_UART0 | ||
136 | bool "Kernel low-level debugging on Xilinx Zynq using UART0" | ||
137 | depends on ARCH_ZYNQ | ||
138 | help | ||
139 | Say Y here if you want the debug print routines to direct | ||
140 | their output to UART0 on the Zynq platform. | ||
141 | |||
142 | config DEBUG_ZYNQ_UART1 | ||
143 | bool "Kernel low-level debugging on Xilinx Zynq using UART1" | ||
144 | depends on ARCH_ZYNQ | ||
145 | help | ||
146 | Say Y here if you want the debug print routines to direct | ||
147 | their output to UART1 on the Zynq platform. | ||
148 | |||
149 | If you have a ZC702 board and want early boot messages to | ||
150 | appear on the USB serial adaptor, select this option. | ||
151 | |||
135 | config DEBUG_DC21285_PORT | 152 | config DEBUG_DC21285_PORT |
136 | bool "Kernel low-level debugging messages via footbridge serial port" | 153 | bool "Kernel low-level debugging messages via footbridge serial port" |
137 | depends on FOOTBRIDGE | 154 | depends on FOOTBRIDGE |
@@ -209,20 +226,12 @@ choice | |||
209 | Say Y here if you want kernel low-level debugging support | 226 | Say Y here if you want kernel low-level debugging support |
210 | on i.MX50 or i.MX53. | 227 | on i.MX50 or i.MX53. |
211 | 228 | ||
212 | config DEBUG_IMX6Q_UART2 | 229 | config DEBUG_IMX6Q_UART |
213 | bool "i.MX6Q Debug UART2" | 230 | bool "i.MX6Q Debug UART" |
214 | depends on SOC_IMX6Q | 231 | depends on SOC_IMX6Q |
215 | help | 232 | help |
216 | Say Y here if you want kernel low-level debugging support | 233 | Say Y here if you want kernel low-level debugging support |
217 | on i.MX6Q UART2. This is correct for e.g. the SabreLite | 234 | on i.MX6Q. |
218 | board. | ||
219 | |||
220 | config DEBUG_IMX6Q_UART4 | ||
221 | bool "i.MX6Q Debug UART4" | ||
222 | depends on SOC_IMX6Q | ||
223 | help | ||
224 | Say Y here if you want kernel low-level debugging support | ||
225 | on i.MX6Q UART4. | ||
226 | 235 | ||
227 | config DEBUG_MMP_UART2 | 236 | config DEBUG_MMP_UART2 |
228 | bool "Kernel low-level debugging message via MMP UART2" | 237 | bool "Kernel low-level debugging message via MMP UART2" |
@@ -409,6 +418,15 @@ choice | |||
409 | 418 | ||
410 | endchoice | 419 | endchoice |
411 | 420 | ||
421 | config DEBUG_IMX6Q_UART_PORT | ||
422 | int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART | ||
423 | range 1 5 | ||
424 | default 1 | ||
425 | depends on SOC_IMX6Q | ||
426 | help | ||
427 | Choose UART port on which kernel low-level debug messages | ||
428 | should be output. | ||
429 | |||
412 | config DEBUG_LL_INCLUDE | 430 | config DEBUG_LL_INCLUDE |
413 | string | 431 | string |
414 | default "debug/icedcc.S" if DEBUG_ICEDCC | 432 | default "debug/icedcc.S" if DEBUG_ICEDCC |
@@ -418,8 +436,7 @@ config DEBUG_LL_INCLUDE | |||
418 | DEBUG_IMX31_IMX35_UART || \ | 436 | DEBUG_IMX31_IMX35_UART || \ |
419 | DEBUG_IMX51_UART || \ | 437 | DEBUG_IMX51_UART || \ |
420 | DEBUG_IMX50_IMX53_UART ||\ | 438 | DEBUG_IMX50_IMX53_UART ||\ |
421 | DEBUG_IMX6Q_UART2 || \ | 439 | DEBUG_IMX6Q_UART |
422 | DEBUG_IMX6Q_UART4 | ||
423 | default "debug/highbank.S" if DEBUG_HIGHBANK_UART | 440 | default "debug/highbank.S" if DEBUG_HIGHBANK_UART |
424 | default "debug/mvebu.S" if DEBUG_MVEBU_UART | 441 | default "debug/mvebu.S" if DEBUG_MVEBU_UART |
425 | default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART | 442 | default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART |
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 2458b69e2be6..89dcc14f1931 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -17,13 +17,17 @@ dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ | |||
17 | usb_a9263.dtb \ | 17 | usb_a9263.dtb \ |
18 | usb_a9g20.dtb | 18 | usb_a9g20.dtb |
19 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb | 19 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb |
20 | dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ | ||
21 | da850-evm.dtb | ||
20 | dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ | 22 | dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ |
21 | dove-cubox.dtb \ | 23 | dove-cubox.dtb \ |
22 | dove-dove-db.dtb | 24 | dove-dove-db.dtb |
23 | dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ | 25 | dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ |
24 | exynos4210-smdkv310.dtb \ | 26 | exynos4210-smdkv310.dtb \ |
25 | exynos4210-trats.dtb \ | 27 | exynos4210-trats.dtb \ |
26 | exynos5250-smdk5250.dtb | 28 | exynos4412-smdk4412.dtb \ |
29 | exynos5250-smdk5250.dtb \ | ||
30 | exynos5250-snow.dtb | ||
27 | dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb | 31 | dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb |
28 | dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ | 32 | dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ |
29 | integratorcp.dtb | 33 | integratorcp.dtb |
@@ -36,11 +40,20 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ | |||
36 | kirkwood-ib62x0.dtb \ | 40 | kirkwood-ib62x0.dtb \ |
37 | kirkwood-iconnect.dtb \ | 41 | kirkwood-iconnect.dtb \ |
38 | kirkwood-iomega_ix2_200.dtb \ | 42 | kirkwood-iomega_ix2_200.dtb \ |
43 | kirkwood-is2.dtb \ | ||
39 | kirkwood-km_kirkwood.dtb \ | 44 | kirkwood-km_kirkwood.dtb \ |
40 | kirkwood-lschlv2.dtb \ | 45 | kirkwood-lschlv2.dtb \ |
41 | kirkwood-lsxhl.dtb \ | 46 | kirkwood-lsxhl.dtb \ |
47 | kirkwood-mplcec4.dtb \ | ||
48 | kirkwood-ns2.dtb \ | ||
49 | kirkwood-ns2lite.dtb \ | ||
50 | kirkwood-ns2max.dtb \ | ||
51 | kirkwood-ns2mini.dtb \ | ||
52 | kirkwood-nsa310.dtb \ | ||
53 | kirkwood-topkick.dtb \ | ||
42 | kirkwood-ts219-6281.dtb \ | 54 | kirkwood-ts219-6281.dtb \ |
43 | kirkwood-ts219-6282.dtb | 55 | kirkwood-ts219-6282.dtb \ |
56 | kirkwood-openblocks_a6.dtb | ||
44 | dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ | 57 | dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ |
45 | msm8960-cdp.dtb | 58 | msm8960-cdp.dtb |
46 | dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ | 59 | dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ |
@@ -51,16 +64,20 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ | |||
51 | imx53-qsb.dtb \ | 64 | imx53-qsb.dtb \ |
52 | imx53-smd.dtb \ | 65 | imx53-smd.dtb \ |
53 | imx6q-arm2.dtb \ | 66 | imx6q-arm2.dtb \ |
67 | imx6q-sabreauto.dtb \ | ||
54 | imx6q-sabrelite.dtb \ | 68 | imx6q-sabrelite.dtb \ |
55 | imx6q-sabresd.dtb | 69 | imx6q-sabresd.dtb |
56 | dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ | 70 | dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ |
57 | imx23-olinuxino.dtb \ | 71 | imx23-olinuxino.dtb \ |
58 | imx23-stmp378x_devb.dtb \ | 72 | imx23-stmp378x_devb.dtb \ |
73 | imx28-apf28.dtb \ | ||
74 | imx28-apf28dev.dtb \ | ||
59 | imx28-apx4devkit.dtb \ | 75 | imx28-apx4devkit.dtb \ |
60 | imx28-cfa10036.dtb \ | 76 | imx28-cfa10036.dtb \ |
61 | imx28-cfa10049.dtb \ | 77 | imx28-cfa10049.dtb \ |
62 | imx28-evk.dtb \ | 78 | imx28-evk.dtb \ |
63 | imx28-m28evk.dtb \ | 79 | imx28-m28evk.dtb \ |
80 | imx28-sps1.dtb \ | ||
64 | imx28-tx28.dtb | 81 | imx28-tx28.dtb |
65 | dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ | 82 | dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ |
66 | omap3-beagle.dtb \ | 83 | omap3-beagle.dtb \ |
@@ -75,8 +92,12 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ | |||
75 | am335x-evm.dtb \ | 92 | am335x-evm.dtb \ |
76 | am335x-evmsk.dtb \ | 93 | am335x-evmsk.dtb \ |
77 | am335x-bone.dtb | 94 | am335x-bone.dtb |
95 | dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb | ||
78 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb | 96 | dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb |
79 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb | 97 | dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ |
98 | hrefprev60.dtb \ | ||
99 | hrefv60plus.dtb \ | ||
100 | ccu9540.dtb | ||
80 | dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ | 101 | dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ |
81 | r8a7740-armadillo800eva.dtb \ | 102 | r8a7740-armadillo800eva.dtb \ |
82 | sh73a0-kzm9g.dtb | 103 | sh73a0-kzm9g.dtb |
@@ -105,5 +126,6 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ | |||
105 | dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ | 126 | dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ |
106 | wm8505-ref.dtb \ | 127 | wm8505-ref.dtb \ |
107 | wm8650-mid.dtb | 128 | wm8650-mid.dtb |
129 | dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb | ||
108 | 130 | ||
109 | endif | 131 | endif |
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index d410581a5a85..bfb5bb6528b5 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi | |||
@@ -246,6 +246,12 @@ | |||
246 | trigger-external; | 246 | trigger-external; |
247 | }; | 247 | }; |
248 | }; | 248 | }; |
249 | |||
250 | watchdog@fffffd40 { | ||
251 | compatible = "atmel,at91sam9260-wdt"; | ||
252 | reg = <0xfffffd40 0x10>; | ||
253 | status = "disabled"; | ||
254 | }; | ||
249 | }; | 255 | }; |
250 | 256 | ||
251 | nand0: nand@40000000 { | 257 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 3e6e5c1abbf3..ff5461278c03 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi | |||
@@ -195,6 +195,12 @@ | |||
195 | #size-cells = <0>; | 195 | #size-cells = <0>; |
196 | status = "disabled"; | 196 | status = "disabled"; |
197 | }; | 197 | }; |
198 | |||
199 | watchdog@fffffd40 { | ||
200 | compatible = "atmel,at91sam9260-wdt"; | ||
201 | reg = <0xfffffd40 0x10>; | ||
202 | status = "disabled"; | ||
203 | }; | ||
198 | }; | 204 | }; |
199 | 205 | ||
200 | nand0: nand@40000000 { | 206 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 3add030d61f8..a98c00a234eb 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi | |||
@@ -262,6 +262,12 @@ | |||
262 | trigger-value = <0x6>; | 262 | trigger-value = <0x6>; |
263 | }; | 263 | }; |
264 | }; | 264 | }; |
265 | |||
266 | watchdog@fffffd40 { | ||
267 | compatible = "atmel,at91sam9260-wdt"; | ||
268 | reg = <0xfffffd40 0x10>; | ||
269 | status = "disabled"; | ||
270 | }; | ||
265 | }; | 271 | }; |
266 | 272 | ||
267 | nand0: nand@40000000 { | 273 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/ccu9540.dts b/arch/arm/boot/dts/ccu9540.dts new file mode 100644 index 000000000000..04305463f00d --- /dev/null +++ b/arch/arm/boot/dts/ccu9540.dts | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * Copyright 2012 ST-Ericsson AB | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "dbx5x0.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "ST-Ericsson CCU9540 platform with Device Tree"; | ||
17 | compatible = "st-ericsson,ccu9540", "st-ericsson,u9540"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x00000000 0x20000000>; | ||
21 | }; | ||
22 | |||
23 | soc-u9500 { | ||
24 | uart@80120000 { | ||
25 | status = "okay"; | ||
26 | }; | ||
27 | |||
28 | uart@80121000 { | ||
29 | status = "okay"; | ||
30 | }; | ||
31 | |||
32 | uart@80007000 { | ||
33 | status = "okay"; | ||
34 | }; | ||
35 | |||
36 | // External Micro SD slot | ||
37 | sdi0_per1@80126000 { | ||
38 | arm,primecell-periphid = <0x10480180>; | ||
39 | max-frequency = <100000000>; | ||
40 | bus-width = <4>; | ||
41 | mmc-cap-sd-highspeed; | ||
42 | mmc-cap-mmc-highspeed; | ||
43 | vmmc-supply = <&ab8500_ldo_aux3_reg>; | ||
44 | |||
45 | cd-gpios = <&gpio7 6 0x4>; // 230 | ||
46 | cd-inverted; | ||
47 | |||
48 | status = "okay"; | ||
49 | }; | ||
50 | |||
51 | |||
52 | // WLAN SDIO channel | ||
53 | sdi1_per2@80118000 { | ||
54 | arm,primecell-periphid = <0x10480180>; | ||
55 | max-frequency = <50000000>; | ||
56 | bus-width = <4>; | ||
57 | |||
58 | status = "okay"; | ||
59 | }; | ||
60 | |||
61 | // On-board eMMC | ||
62 | sdi4_per2@80114000 { | ||
63 | arm,primecell-periphid = <0x10480180>; | ||
64 | max-frequency = <100000000>; | ||
65 | bus-width = <8>; | ||
66 | mmc-cap-mmc-highspeed; | ||
67 | vmmc-supply = <&ab8500_ldo_aux2_reg>; | ||
68 | |||
69 | status = "okay"; | ||
70 | }; | ||
71 | }; | ||
72 | }; | ||
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi new file mode 100644 index 000000000000..fddd17417433 --- /dev/null +++ b/arch/arm/boot/dts/cros5250-common.dtsi | |||
@@ -0,0 +1,184 @@ | |||
1 | /* | ||
2 | * Common device tree include for all Exynos 5250 boards based off of Daisy. | ||
3 | * | ||
4 | * Copyright (c) 2012 Google, Inc | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | / { | ||
12 | aliases { | ||
13 | }; | ||
14 | |||
15 | memory { | ||
16 | reg = <0x40000000 0x80000000>; | ||
17 | }; | ||
18 | |||
19 | chosen { | ||
20 | }; | ||
21 | |||
22 | i2c@12C60000 { | ||
23 | samsung,i2c-sda-delay = <100>; | ||
24 | samsung,i2c-max-bus-freq = <378000>; | ||
25 | gpios = <&gpb3 0 2 3 0>, | ||
26 | <&gpb3 1 2 3 0>; | ||
27 | }; | ||
28 | |||
29 | i2c@12C70000 { | ||
30 | samsung,i2c-sda-delay = <100>; | ||
31 | samsung,i2c-max-bus-freq = <378000>; | ||
32 | gpios = <&gpb3 2 2 3 0>, | ||
33 | <&gpb3 3 2 3 0>; | ||
34 | }; | ||
35 | |||
36 | i2c@12C80000 { | ||
37 | samsung,i2c-sda-delay = <100>; | ||
38 | samsung,i2c-max-bus-freq = <66000>; | ||
39 | |||
40 | /* | ||
41 | * Disabled pullups since external part has its own pullups and | ||
42 | * double-pulling gets us out of spec in some cases. | ||
43 | */ | ||
44 | gpios = <&gpa0 6 3 0 0>, | ||
45 | <&gpa0 7 3 0 0>; | ||
46 | |||
47 | hdmiddc@50 { | ||
48 | compatible = "samsung,exynos5-hdmiddc"; | ||
49 | reg = <0x50>; | ||
50 | }; | ||
51 | }; | ||
52 | |||
53 | i2c@12C90000 { | ||
54 | samsung,i2c-sda-delay = <100>; | ||
55 | samsung,i2c-max-bus-freq = <66000>; | ||
56 | gpios = <&gpa1 2 3 3 0>, | ||
57 | <&gpa1 3 3 3 0>; | ||
58 | }; | ||
59 | |||
60 | i2c@12CA0000 { | ||
61 | status = "disabled"; | ||
62 | }; | ||
63 | |||
64 | i2c@12CB0000 { | ||
65 | samsung,i2c-sda-delay = <100>; | ||
66 | samsung,i2c-max-bus-freq = <66000>; | ||
67 | gpios = <&gpa2 2 3 3 0>, | ||
68 | <&gpa2 3 3 3 0>; | ||
69 | }; | ||
70 | |||
71 | i2c@12CC0000 { | ||
72 | status = "disabled"; | ||
73 | }; | ||
74 | |||
75 | i2c@12CD0000 { | ||
76 | samsung,i2c-sda-delay = <100>; | ||
77 | samsung,i2c-max-bus-freq = <66000>; | ||
78 | gpios = <&gpb2 2 3 3 0>, | ||
79 | <&gpb2 3 3 3 0>; | ||
80 | }; | ||
81 | |||
82 | i2c@12CE0000 { | ||
83 | samsung,i2c-sda-delay = <100>; | ||
84 | samsung,i2c-max-bus-freq = <378000>; | ||
85 | |||
86 | hdmiphy@38 { | ||
87 | compatible = "samsung,exynos5-hdmiphy"; | ||
88 | reg = <0x38>; | ||
89 | }; | ||
90 | }; | ||
91 | |||
92 | dwmmc0@12200000 { | ||
93 | num-slots = <1>; | ||
94 | supports-highspeed; | ||
95 | broken-cd; | ||
96 | fifo-depth = <0x80>; | ||
97 | card-detect-delay = <200>; | ||
98 | samsung,dw-mshc-ciu-div = <3>; | ||
99 | samsung,dw-mshc-sdr-timing = <2 3 3>; | ||
100 | samsung,dw-mshc-ddr-timing = <1 2 3>; | ||
101 | |||
102 | slot@0 { | ||
103 | reg = <0>; | ||
104 | bus-width = <8>; | ||
105 | gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>, | ||
106 | <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>, | ||
107 | <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>, | ||
108 | <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>, | ||
109 | <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>; | ||
110 | }; | ||
111 | }; | ||
112 | |||
113 | dwmmc1@12210000 { | ||
114 | status = "disabled"; | ||
115 | }; | ||
116 | |||
117 | dwmmc2@12220000 { | ||
118 | num-slots = <1>; | ||
119 | supports-highspeed; | ||
120 | fifo-depth = <0x80>; | ||
121 | card-detect-delay = <200>; | ||
122 | samsung,dw-mshc-ciu-div = <3>; | ||
123 | samsung,dw-mshc-sdr-timing = <2 3 3>; | ||
124 | samsung,dw-mshc-ddr-timing = <1 2 3>; | ||
125 | |||
126 | slot@0 { | ||
127 | reg = <0>; | ||
128 | bus-width = <4>; | ||
129 | samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>; | ||
130 | wp-gpios = <&gpc2 1 0 0 3>; | ||
131 | gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>, | ||
132 | <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>, | ||
133 | <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>; | ||
134 | }; | ||
135 | }; | ||
136 | |||
137 | dwmmc3@12230000 { | ||
138 | num-slots = <1>; | ||
139 | supports-highspeed; | ||
140 | broken-cd; | ||
141 | fifo-depth = <0x80>; | ||
142 | card-detect-delay = <200>; | ||
143 | samsung,dw-mshc-ciu-div = <3>; | ||
144 | samsung,dw-mshc-sdr-timing = <2 3 3>; | ||
145 | samsung,dw-mshc-ddr-timing = <1 2 3>; | ||
146 | |||
147 | slot@0 { | ||
148 | reg = <0>; | ||
149 | bus-width = <4>; | ||
150 | /* See board-specific dts files for GPIOs */ | ||
151 | }; | ||
152 | }; | ||
153 | |||
154 | spi_0: spi@12d20000 { | ||
155 | status = "disabled"; | ||
156 | }; | ||
157 | |||
158 | spi_1: spi@12d30000 { | ||
159 | gpios = <&gpa2 4 2 3 0>, | ||
160 | <&gpa2 6 2 3 0>, | ||
161 | <&gpa2 7 2 3 0>; | ||
162 | samsung,spi-src-clk = <0>; | ||
163 | num-cs = <1>; | ||
164 | }; | ||
165 | |||
166 | spi_2: spi@12d40000 { | ||
167 | status = "disabled"; | ||
168 | }; | ||
169 | |||
170 | hdmi { | ||
171 | hpd-gpio = <&gpx3 7 0xf 1 3>; | ||
172 | }; | ||
173 | |||
174 | gpio-keys { | ||
175 | compatible = "gpio-keys"; | ||
176 | |||
177 | power { | ||
178 | label = "Power"; | ||
179 | gpios = <&gpx1 3 0 0x10000 0>; | ||
180 | linux,code = <116>; /* KEY_POWER */ | ||
181 | gpio-key,wakeup; | ||
182 | }; | ||
183 | }; | ||
184 | }; | ||
diff --git a/arch/arm/boot/dts/da850-enbw-cmc.dts b/arch/arm/boot/dts/da850-enbw-cmc.dts new file mode 100644 index 000000000000..422fdb3fcfc1 --- /dev/null +++ b/arch/arm/boot/dts/da850-enbw-cmc.dts | |||
@@ -0,0 +1,30 @@ | |||
1 | /* | ||
2 | * Device Tree for AM1808 EnBW CMC board | ||
3 | * | ||
4 | * Copyright 2012 DENX Software Engineering GmbH | ||
5 | * Heiko Schocher <hs@denx.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | /dts-v1/; | ||
13 | /include/ "da850.dtsi" | ||
14 | |||
15 | / { | ||
16 | compatible = "enbw,cmc", "ti,da850"; | ||
17 | model = "EnBW CMC"; | ||
18 | |||
19 | soc { | ||
20 | serial0: serial@1c42000 { | ||
21 | status = "okay"; | ||
22 | }; | ||
23 | serial1: serial@1d0c000 { | ||
24 | status = "okay"; | ||
25 | }; | ||
26 | serial2: serial@1d0d000 { | ||
27 | status = "okay"; | ||
28 | }; | ||
29 | }; | ||
30 | }; | ||
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts new file mode 100644 index 000000000000..37dc5a3243b8 --- /dev/null +++ b/arch/arm/boot/dts/da850-evm.dts | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Device Tree for DA850 EVM board | ||
3 | * | ||
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation, version 2. | ||
9 | */ | ||
10 | /dts-v1/; | ||
11 | /include/ "da850.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "ti,da850-evm", "ti,da850"; | ||
15 | model = "DA850/AM1808/OMAP-L138 EVM"; | ||
16 | |||
17 | soc { | ||
18 | serial0: serial@1c42000 { | ||
19 | status = "okay"; | ||
20 | }; | ||
21 | serial1: serial@1d0c000 { | ||
22 | status = "okay"; | ||
23 | }; | ||
24 | serial2: serial@1d0d000 { | ||
25 | status = "okay"; | ||
26 | }; | ||
27 | }; | ||
28 | }; | ||
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi new file mode 100644 index 000000000000..640ab75c20db --- /dev/null +++ b/arch/arm/boot/dts/da850.dtsi | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * Copyright 2012 DENX Software Engineering GmbH | ||
3 | * Heiko Schocher <hs@denx.de> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | */ | ||
10 | /include/ "skeleton.dtsi" | ||
11 | |||
12 | / { | ||
13 | arm { | ||
14 | #address-cells = <1>; | ||
15 | #size-cells = <1>; | ||
16 | ranges; | ||
17 | intc: interrupt-controller { | ||
18 | compatible = "ti,cp-intc"; | ||
19 | interrupt-controller; | ||
20 | #interrupt-cells = <1>; | ||
21 | ti,intc-size = <100>; | ||
22 | reg = <0xfffee000 0x2000>; | ||
23 | }; | ||
24 | }; | ||
25 | soc { | ||
26 | compatible = "simple-bus"; | ||
27 | model = "da850"; | ||
28 | #address-cells = <1>; | ||
29 | #size-cells = <1>; | ||
30 | ranges = <0x0 0x01c00000 0x400000>; | ||
31 | |||
32 | serial0: serial@1c42000 { | ||
33 | compatible = "ns16550a"; | ||
34 | reg = <0x42000 0x100>; | ||
35 | clock-frequency = <150000000>; | ||
36 | reg-shift = <2>; | ||
37 | interrupts = <25>; | ||
38 | interrupt-parent = <&intc>; | ||
39 | status = "disabled"; | ||
40 | }; | ||
41 | serial1: serial@1d0c000 { | ||
42 | compatible = "ns16550a"; | ||
43 | reg = <0x10c000 0x100>; | ||
44 | clock-frequency = <150000000>; | ||
45 | reg-shift = <2>; | ||
46 | interrupts = <53>; | ||
47 | interrupt-parent = <&intc>; | ||
48 | status = "disabled"; | ||
49 | }; | ||
50 | serial2: serial@1d0d000 { | ||
51 | compatible = "ns16550a"; | ||
52 | reg = <0x10d000 0x100>; | ||
53 | clock-frequency = <150000000>; | ||
54 | reg-shift = <2>; | ||
55 | interrupts = <61>; | ||
56 | interrupt-parent = <&intc>; | ||
57 | status = "disabled"; | ||
58 | }; | ||
59 | }; | ||
60 | }; | ||
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 4b0e0ca08f40..9f553630242a 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi | |||
@@ -209,123 +209,103 @@ | |||
209 | // DB8500_REGULATOR_VAPE | 209 | // DB8500_REGULATOR_VAPE |
210 | db8500_vape_reg: db8500_vape { | 210 | db8500_vape_reg: db8500_vape { |
211 | regulator-compatible = "db8500_vape"; | 211 | regulator-compatible = "db8500_vape"; |
212 | regulator-name = "db8500-vape"; | ||
213 | regulator-always-on; | 212 | regulator-always-on; |
214 | }; | 213 | }; |
215 | 214 | ||
216 | // DB8500_REGULATOR_VARM | 215 | // DB8500_REGULATOR_VARM |
217 | db8500_varm_reg: db8500_varm { | 216 | db8500_varm_reg: db8500_varm { |
218 | regulator-compatible = "db8500_varm"; | 217 | regulator-compatible = "db8500_varm"; |
219 | regulator-name = "db8500-varm"; | ||
220 | }; | 218 | }; |
221 | 219 | ||
222 | // DB8500_REGULATOR_VMODEM | 220 | // DB8500_REGULATOR_VMODEM |
223 | db8500_vmodem_reg: db8500_vmodem { | 221 | db8500_vmodem_reg: db8500_vmodem { |
224 | regulator-compatible = "db8500_vmodem"; | 222 | regulator-compatible = "db8500_vmodem"; |
225 | regulator-name = "db8500-vmodem"; | ||
226 | }; | 223 | }; |
227 | 224 | ||
228 | // DB8500_REGULATOR_VPLL | 225 | // DB8500_REGULATOR_VPLL |
229 | db8500_vpll_reg: db8500_vpll { | 226 | db8500_vpll_reg: db8500_vpll { |
230 | regulator-compatible = "db8500_vpll"; | 227 | regulator-compatible = "db8500_vpll"; |
231 | regulator-name = "db8500-vpll"; | ||
232 | }; | 228 | }; |
233 | 229 | ||
234 | // DB8500_REGULATOR_VSMPS1 | 230 | // DB8500_REGULATOR_VSMPS1 |
235 | db8500_vsmps1_reg: db8500_vsmps1 { | 231 | db8500_vsmps1_reg: db8500_vsmps1 { |
236 | regulator-compatible = "db8500_vsmps1"; | 232 | regulator-compatible = "db8500_vsmps1"; |
237 | regulator-name = "db8500-vsmps1"; | ||
238 | }; | 233 | }; |
239 | 234 | ||
240 | // DB8500_REGULATOR_VSMPS2 | 235 | // DB8500_REGULATOR_VSMPS2 |
241 | db8500_vsmps2_reg: db8500_vsmps2 { | 236 | db8500_vsmps2_reg: db8500_vsmps2 { |
242 | regulator-compatible = "db8500_vsmps2"; | 237 | regulator-compatible = "db8500_vsmps2"; |
243 | regulator-name = "db8500-vsmps2"; | ||
244 | }; | 238 | }; |
245 | 239 | ||
246 | // DB8500_REGULATOR_VSMPS3 | 240 | // DB8500_REGULATOR_VSMPS3 |
247 | db8500_vsmps3_reg: db8500_vsmps3 { | 241 | db8500_vsmps3_reg: db8500_vsmps3 { |
248 | regulator-compatible = "db8500_vsmps3"; | 242 | regulator-compatible = "db8500_vsmps3"; |
249 | regulator-name = "db8500-vsmps3"; | ||
250 | }; | 243 | }; |
251 | 244 | ||
252 | // DB8500_REGULATOR_VRF1 | 245 | // DB8500_REGULATOR_VRF1 |
253 | db8500_vrf1_reg: db8500_vrf1 { | 246 | db8500_vrf1_reg: db8500_vrf1 { |
254 | regulator-compatible = "db8500_vrf1"; | 247 | regulator-compatible = "db8500_vrf1"; |
255 | regulator-name = "db8500-vrf1"; | ||
256 | }; | 248 | }; |
257 | 249 | ||
258 | // DB8500_REGULATOR_SWITCH_SVAMMDSP | 250 | // DB8500_REGULATOR_SWITCH_SVAMMDSP |
259 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { | 251 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { |
260 | regulator-compatible = "db8500_sva_mmdsp"; | 252 | regulator-compatible = "db8500_sva_mmdsp"; |
261 | regulator-name = "db8500-sva-mmdsp"; | ||
262 | }; | 253 | }; |
263 | 254 | ||
264 | // DB8500_REGULATOR_SWITCH_SVAMMDSPRET | 255 | // DB8500_REGULATOR_SWITCH_SVAMMDSPRET |
265 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { | 256 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { |
266 | regulator-compatible = "db8500_sva_mmdsp_ret"; | 257 | regulator-compatible = "db8500_sva_mmdsp_ret"; |
267 | regulator-name = "db8500-sva-mmdsp-ret"; | ||
268 | }; | 258 | }; |
269 | 259 | ||
270 | // DB8500_REGULATOR_SWITCH_SVAPIPE | 260 | // DB8500_REGULATOR_SWITCH_SVAPIPE |
271 | db8500_sva_pipe_reg: db8500_sva_pipe { | 261 | db8500_sva_pipe_reg: db8500_sva_pipe { |
272 | regulator-compatible = "db8500_sva_pipe"; | 262 | regulator-compatible = "db8500_sva_pipe"; |
273 | regulator-name = "db8500_sva_pipe"; | ||
274 | }; | 263 | }; |
275 | 264 | ||
276 | // DB8500_REGULATOR_SWITCH_SIAMMDSP | 265 | // DB8500_REGULATOR_SWITCH_SIAMMDSP |
277 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { | 266 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { |
278 | regulator-compatible = "db8500_sia_mmdsp"; | 267 | regulator-compatible = "db8500_sia_mmdsp"; |
279 | regulator-name = "db8500_sia_mmdsp"; | ||
280 | }; | 268 | }; |
281 | 269 | ||
282 | // DB8500_REGULATOR_SWITCH_SIAMMDSPRET | 270 | // DB8500_REGULATOR_SWITCH_SIAMMDSPRET |
283 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { | 271 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { |
284 | regulator-name = "db8500-sia-mmdsp-ret"; | ||
285 | }; | 272 | }; |
286 | 273 | ||
287 | // DB8500_REGULATOR_SWITCH_SIAPIPE | 274 | // DB8500_REGULATOR_SWITCH_SIAPIPE |
288 | db8500_sia_pipe_reg: db8500_sia_pipe { | 275 | db8500_sia_pipe_reg: db8500_sia_pipe { |
289 | regulator-compatible = "db8500_sia_pipe"; | 276 | regulator-compatible = "db8500_sia_pipe"; |
290 | regulator-name = "db8500-sia-pipe"; | ||
291 | }; | 277 | }; |
292 | 278 | ||
293 | // DB8500_REGULATOR_SWITCH_SGA | 279 | // DB8500_REGULATOR_SWITCH_SGA |
294 | db8500_sga_reg: db8500_sga { | 280 | db8500_sga_reg: db8500_sga { |
295 | regulator-compatible = "db8500_sga"; | 281 | regulator-compatible = "db8500_sga"; |
296 | regulator-name = "db8500-sga"; | ||
297 | vin-supply = <&db8500_vape_reg>; | 282 | vin-supply = <&db8500_vape_reg>; |
298 | }; | 283 | }; |
299 | 284 | ||
300 | // DB8500_REGULATOR_SWITCH_B2R2_MCDE | 285 | // DB8500_REGULATOR_SWITCH_B2R2_MCDE |
301 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { | 286 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { |
302 | regulator-compatible = "db8500_b2r2_mcde"; | 287 | regulator-compatible = "db8500_b2r2_mcde"; |
303 | regulator-name = "db8500-b2r2-mcde"; | ||
304 | vin-supply = <&db8500_vape_reg>; | 288 | vin-supply = <&db8500_vape_reg>; |
305 | }; | 289 | }; |
306 | 290 | ||
307 | // DB8500_REGULATOR_SWITCH_ESRAM12 | 291 | // DB8500_REGULATOR_SWITCH_ESRAM12 |
308 | db8500_esram12_reg: db8500_esram12 { | 292 | db8500_esram12_reg: db8500_esram12 { |
309 | regulator-compatible = "db8500_esram12"; | 293 | regulator-compatible = "db8500_esram12"; |
310 | regulator-name = "db8500-esram12"; | ||
311 | }; | 294 | }; |
312 | 295 | ||
313 | // DB8500_REGULATOR_SWITCH_ESRAM12RET | 296 | // DB8500_REGULATOR_SWITCH_ESRAM12RET |
314 | db8500_esram12_ret_reg: db8500_esram12_ret { | 297 | db8500_esram12_ret_reg: db8500_esram12_ret { |
315 | regulator-compatible = "db8500_esram12_ret"; | 298 | regulator-compatible = "db8500_esram12_ret"; |
316 | regulator-name = "db8500-esram12-ret"; | ||
317 | }; | 299 | }; |
318 | 300 | ||
319 | // DB8500_REGULATOR_SWITCH_ESRAM34 | 301 | // DB8500_REGULATOR_SWITCH_ESRAM34 |
320 | db8500_esram34_reg: db8500_esram34 { | 302 | db8500_esram34_reg: db8500_esram34 { |
321 | regulator-compatible = "db8500_esram34"; | 303 | regulator-compatible = "db8500_esram34"; |
322 | regulator-name = "db8500-esram34"; | ||
323 | }; | 304 | }; |
324 | 305 | ||
325 | // DB8500_REGULATOR_SWITCH_ESRAM34RET | 306 | // DB8500_REGULATOR_SWITCH_ESRAM34RET |
326 | db8500_esram34_ret_reg: db8500_esram34_ret { | 307 | db8500_esram34_ret_reg: db8500_esram34_ret { |
327 | regulator-compatible = "db8500_esram34_ret"; | 308 | regulator-compatible = "db8500_esram34_ret"; |
328 | regulator-name = "db8500-esram34-ret"; | ||
329 | }; | 309 | }; |
330 | }; | 310 | }; |
331 | 311 | ||
@@ -404,7 +384,6 @@ | |||
404 | // supplies to the display/camera | 384 | // supplies to the display/camera |
405 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | 385 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { |
406 | regulator-compatible = "ab8500_ldo_aux1"; | 386 | regulator-compatible = "ab8500_ldo_aux1"; |
407 | regulator-name = "V-DISPLAY"; | ||
408 | regulator-min-microvolt = <2500000>; | 387 | regulator-min-microvolt = <2500000>; |
409 | regulator-max-microvolt = <2900000>; | 388 | regulator-max-microvolt = <2900000>; |
410 | regulator-boot-on; | 389 | regulator-boot-on; |
@@ -415,7 +394,6 @@ | |||
415 | // supplies to the on-board eMMC | 394 | // supplies to the on-board eMMC |
416 | ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { | 395 | ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { |
417 | regulator-compatible = "ab8500_ldo_aux2"; | 396 | regulator-compatible = "ab8500_ldo_aux2"; |
418 | regulator-name = "V-eMMC1"; | ||
419 | regulator-min-microvolt = <1100000>; | 397 | regulator-min-microvolt = <1100000>; |
420 | regulator-max-microvolt = <3300000>; | 398 | regulator-max-microvolt = <3300000>; |
421 | }; | 399 | }; |
@@ -423,7 +401,6 @@ | |||
423 | // supply for VAUX3; SDcard slots | 401 | // supply for VAUX3; SDcard slots |
424 | ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { | 402 | ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { |
425 | regulator-compatible = "ab8500_ldo_aux3"; | 403 | regulator-compatible = "ab8500_ldo_aux3"; |
426 | regulator-name = "V-MMC-SD"; | ||
427 | regulator-min-microvolt = <1100000>; | 404 | regulator-min-microvolt = <1100000>; |
428 | regulator-max-microvolt = <3300000>; | 405 | regulator-max-microvolt = <3300000>; |
429 | }; | 406 | }; |
@@ -431,49 +408,41 @@ | |||
431 | // supply for v-intcore12; VINTCORE12 LDO | 408 | // supply for v-intcore12; VINTCORE12 LDO |
432 | ab8500_ldo_initcore_reg: ab8500_ldo_initcore { | 409 | ab8500_ldo_initcore_reg: ab8500_ldo_initcore { |
433 | regulator-compatible = "ab8500_ldo_initcore"; | 410 | regulator-compatible = "ab8500_ldo_initcore"; |
434 | regulator-name = "V-INTCORE"; | ||
435 | }; | 411 | }; |
436 | 412 | ||
437 | // supply for tvout; gpadc; TVOUT LDO | 413 | // supply for tvout; gpadc; TVOUT LDO |
438 | ab8500_ldo_tvout_reg: ab8500_ldo_tvout { | 414 | ab8500_ldo_tvout_reg: ab8500_ldo_tvout { |
439 | regulator-compatible = "ab8500_ldo_tvout"; | 415 | regulator-compatible = "ab8500_ldo_tvout"; |
440 | regulator-name = "V-TVOUT"; | ||
441 | }; | 416 | }; |
442 | 417 | ||
443 | // supply for ab8500-usb; USB LDO | 418 | // supply for ab8500-usb; USB LDO |
444 | ab8500_ldo_usb_reg: ab8500_ldo_usb { | 419 | ab8500_ldo_usb_reg: ab8500_ldo_usb { |
445 | regulator-compatible = "ab8500_ldo_usb"; | 420 | regulator-compatible = "ab8500_ldo_usb"; |
446 | regulator-name = "dummy"; | ||
447 | }; | 421 | }; |
448 | 422 | ||
449 | // supply for ab8500-vaudio; VAUDIO LDO | 423 | // supply for ab8500-vaudio; VAUDIO LDO |
450 | ab8500_ldo_audio_reg: ab8500_ldo_audio { | 424 | ab8500_ldo_audio_reg: ab8500_ldo_audio { |
451 | regulator-compatible = "ab8500_ldo_audio"; | 425 | regulator-compatible = "ab8500_ldo_audio"; |
452 | regulator-name = "V-AUD"; | ||
453 | }; | 426 | }; |
454 | 427 | ||
455 | // supply for v-anamic1 VAMic1-LDO | 428 | // supply for v-anamic1 VAMic1-LDO |
456 | ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { | 429 | ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { |
457 | regulator-compatible = "ab8500_ldo_anamic1"; | 430 | regulator-compatible = "ab8500_ldo_anamic1"; |
458 | regulator-name = "V-AMIC1"; | ||
459 | }; | 431 | }; |
460 | 432 | ||
461 | // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 | 433 | // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 |
462 | ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { | 434 | ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { |
463 | regulator-compatible = "ab8500_ldo_amamic2"; | 435 | regulator-compatible = "ab8500_ldo_amamic2"; |
464 | regulator-name = "V-AMIC2"; | ||
465 | }; | 436 | }; |
466 | 437 | ||
467 | // supply for v-dmic; VDMIC LDO | 438 | // supply for v-dmic; VDMIC LDO |
468 | ab8500_ldo_dmic_reg: ab8500_ldo_dmic { | 439 | ab8500_ldo_dmic_reg: ab8500_ldo_dmic { |
469 | regulator-compatible = "ab8500_ldo_dmic"; | 440 | regulator-compatible = "ab8500_ldo_dmic"; |
470 | regulator-name = "V-DMIC"; | ||
471 | }; | 441 | }; |
472 | 442 | ||
473 | // supply for U8500 CSI/DSI; VANA LDO | 443 | // supply for U8500 CSI/DSI; VANA LDO |
474 | ab8500_ldo_ana_reg: ab8500_ldo_ana { | 444 | ab8500_ldo_ana_reg: ab8500_ldo_ana { |
475 | regulator-compatible = "ab8500_ldo_ana"; | 445 | regulator-compatible = "ab8500_ldo_ana"; |
476 | regulator-name = "V-CSI/DSI"; | ||
477 | }; | 446 | }; |
478 | }; | 447 | }; |
479 | }; | 448 | }; |
@@ -577,42 +546,42 @@ | |||
577 | status = "disabled"; | 546 | status = "disabled"; |
578 | }; | 547 | }; |
579 | 548 | ||
580 | sdi@80126000 { | 549 | sdi0_per1@80126000 { |
581 | compatible = "arm,pl18x", "arm,primecell"; | 550 | compatible = "arm,pl18x", "arm,primecell"; |
582 | reg = <0x80126000 0x1000>; | 551 | reg = <0x80126000 0x1000>; |
583 | interrupts = <0 60 0x4>; | 552 | interrupts = <0 60 0x4>; |
584 | status = "disabled"; | 553 | status = "disabled"; |
585 | }; | 554 | }; |
586 | 555 | ||
587 | sdi@80118000 { | 556 | sdi1_per2@80118000 { |
588 | compatible = "arm,pl18x", "arm,primecell"; | 557 | compatible = "arm,pl18x", "arm,primecell"; |
589 | reg = <0x80118000 0x1000>; | 558 | reg = <0x80118000 0x1000>; |
590 | interrupts = <0 50 0x4>; | 559 | interrupts = <0 50 0x4>; |
591 | status = "disabled"; | 560 | status = "disabled"; |
592 | }; | 561 | }; |
593 | 562 | ||
594 | sdi@80005000 { | 563 | sdi2_per3@80005000 { |
595 | compatible = "arm,pl18x", "arm,primecell"; | 564 | compatible = "arm,pl18x", "arm,primecell"; |
596 | reg = <0x80005000 0x1000>; | 565 | reg = <0x80005000 0x1000>; |
597 | interrupts = <0 41 0x4>; | 566 | interrupts = <0 41 0x4>; |
598 | status = "disabled"; | 567 | status = "disabled"; |
599 | }; | 568 | }; |
600 | 569 | ||
601 | sdi@80119000 { | 570 | sdi3_per2@80119000 { |
602 | compatible = "arm,pl18x", "arm,primecell"; | 571 | compatible = "arm,pl18x", "arm,primecell"; |
603 | reg = <0x80119000 0x1000>; | 572 | reg = <0x80119000 0x1000>; |
604 | interrupts = <0 59 0x4>; | 573 | interrupts = <0 59 0x4>; |
605 | status = "disabled"; | 574 | status = "disabled"; |
606 | }; | 575 | }; |
607 | 576 | ||
608 | sdi@80114000 { | 577 | sdi4_per2@80114000 { |
609 | compatible = "arm,pl18x", "arm,primecell"; | 578 | compatible = "arm,pl18x", "arm,primecell"; |
610 | reg = <0x80114000 0x1000>; | 579 | reg = <0x80114000 0x1000>; |
611 | interrupts = <0 99 0x4>; | 580 | interrupts = <0 99 0x4>; |
612 | status = "disabled"; | 581 | status = "disabled"; |
613 | }; | 582 | }; |
614 | 583 | ||
615 | sdi@80008000 { | 584 | sdi5_per3@80008000 { |
616 | compatible = "arm,pl18x", "arm,primecell"; | 585 | compatible = "arm,pl18x", "arm,primecell"; |
617 | reg = <0x80008000 0x1000>; | 586 | reg = <0x80008000 0x1000>; |
618 | interrupts = <0 100 0x4>; | 587 | interrupts = <0 100 0x4>; |
@@ -660,5 +629,19 @@ | |||
660 | ranges = <0 0x50000000 0x4000000>; | 629 | ranges = <0 0x50000000 0x4000000>; |
661 | status = "disabled"; | 630 | status = "disabled"; |
662 | }; | 631 | }; |
632 | |||
633 | vmmci: regulator-gpio { | ||
634 | compatible = "regulator-gpio"; | ||
635 | |||
636 | regulator-min-microvolt = <1800000>; | ||
637 | regulator-max-microvolt = <2600000>; | ||
638 | regulator-name = "mmci-reg"; | ||
639 | regulator-type = "voltage"; | ||
640 | |||
641 | states = <1800000 0x1 | ||
642 | 2900000 0x0>; | ||
643 | |||
644 | status = "disabled"; | ||
645 | }; | ||
663 | }; | 646 | }; |
664 | }; | 647 | }; |
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts index 0adbd5a38095..fed7d3f9f431 100644 --- a/arch/arm/boot/dts/dove-cubox.dts +++ b/arch/arm/boot/dts/dove-cubox.dts | |||
@@ -40,3 +40,13 @@ | |||
40 | reg = <0>; | 40 | reg = <0>; |
41 | }; | 41 | }; |
42 | }; | 42 | }; |
43 | |||
44 | &pinctrl { | ||
45 | pinctrl-0 = <&pmx_gpio_18>; | ||
46 | pinctrl-names = "default"; | ||
47 | |||
48 | pmx_gpio_18: pmx-gpio-18 { | ||
49 | marvell,pins = "mpp18"; | ||
50 | marvell,function = "gpio"; | ||
51 | }; | ||
52 | }; | ||
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 5a00022383e7..61f391412a5a 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi | |||
@@ -4,6 +4,12 @@ | |||
4 | compatible = "marvell,dove"; | 4 | compatible = "marvell,dove"; |
5 | model = "Marvell Armada 88AP510 SoC"; | 5 | model = "Marvell Armada 88AP510 SoC"; |
6 | 6 | ||
7 | aliases { | ||
8 | gpio0 = &gpio0; | ||
9 | gpio1 = &gpio1; | ||
10 | gpio2 = &gpio2; | ||
11 | }; | ||
12 | |||
7 | soc@f1000000 { | 13 | soc@f1000000 { |
8 | compatible = "simple-bus"; | 14 | compatible = "simple-bus"; |
9 | #address-cells = <1>; | 15 | #address-cells = <1>; |
@@ -72,7 +78,8 @@ | |||
72 | #gpio-cells = <2>; | 78 | #gpio-cells = <2>; |
73 | gpio-controller; | 79 | gpio-controller; |
74 | reg = <0xd0400 0x20>; | 80 | reg = <0xd0400 0x20>; |
75 | ngpio = <32>; | 81 | ngpios = <32>; |
82 | interrupt-controller; | ||
76 | interrupts = <12>, <13>, <14>, <60>; | 83 | interrupts = <12>, <13>, <14>, <60>; |
77 | }; | 84 | }; |
78 | 85 | ||
@@ -81,7 +88,8 @@ | |||
81 | #gpio-cells = <2>; | 88 | #gpio-cells = <2>; |
82 | gpio-controller; | 89 | gpio-controller; |
83 | reg = <0xd0420 0x20>; | 90 | reg = <0xd0420 0x20>; |
84 | ngpio = <32>; | 91 | ngpios = <32>; |
92 | interrupt-controller; | ||
85 | interrupts = <61>; | 93 | interrupts = <61>; |
86 | }; | 94 | }; |
87 | 95 | ||
@@ -90,7 +98,12 @@ | |||
90 | #gpio-cells = <2>; | 98 | #gpio-cells = <2>; |
91 | gpio-controller; | 99 | gpio-controller; |
92 | reg = <0xe8400 0x0c>; | 100 | reg = <0xe8400 0x0c>; |
93 | ngpio = <8>; | 101 | ngpios = <8>; |
102 | }; | ||
103 | |||
104 | pinctrl: pinctrl@d0200 { | ||
105 | compatible = "marvell,dove-pinctrl"; | ||
106 | reg = <0xd0200 0x10>; | ||
94 | }; | 107 | }; |
95 | 108 | ||
96 | spi0: spi@10600 { | 109 | spi0: spi@10600 { |
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts index b7354e6506de..96e50f569433 100644 --- a/arch/arm/boot/dts/evk-pro3.dts +++ b/arch/arm/boot/dts/evk-pro3.dts | |||
@@ -22,10 +22,22 @@ | |||
22 | status = "okay"; | 22 | status = "okay"; |
23 | }; | 23 | }; |
24 | 24 | ||
25 | usart0: serial@fffb0000 { | ||
26 | status = "okay"; | ||
27 | }; | ||
28 | |||
29 | usart2: serial@fffb8000 { | ||
30 | status = "okay"; | ||
31 | }; | ||
32 | |||
25 | usb1: gadget@fffa4000 { | 33 | usb1: gadget@fffa4000 { |
26 | atmel,vbus-gpio = <&pioC 5 0>; | 34 | atmel,vbus-gpio = <&pioC 5 0>; |
27 | status = "okay"; | 35 | status = "okay"; |
28 | }; | 36 | }; |
37 | |||
38 | watchdog@fffffd40 { | ||
39 | status = "okay"; | ||
40 | }; | ||
29 | }; | 41 | }; |
30 | 42 | ||
31 | usb0: ohci@00500000 { | 43 | usb0: ohci@00500000 { |
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index a26c3dd58269..3428f1a94dcc 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi | |||
@@ -28,6 +28,44 @@ | |||
28 | spi0 = &spi_0; | 28 | spi0 = &spi_0; |
29 | spi1 = &spi_1; | 29 | spi1 = &spi_1; |
30 | spi2 = &spi_2; | 30 | spi2 = &spi_2; |
31 | i2c0 = &i2c_0; | ||
32 | i2c1 = &i2c_1; | ||
33 | i2c2 = &i2c_2; | ||
34 | i2c3 = &i2c_3; | ||
35 | i2c4 = &i2c_4; | ||
36 | i2c5 = &i2c_5; | ||
37 | i2c6 = &i2c_6; | ||
38 | i2c7 = &i2c_7; | ||
39 | }; | ||
40 | |||
41 | pd_mfc: mfc-power-domain@10023C40 { | ||
42 | compatible = "samsung,exynos4210-pd"; | ||
43 | reg = <0x10023C40 0x20>; | ||
44 | }; | ||
45 | |||
46 | pd_g3d: g3d-power-domain@10023C60 { | ||
47 | compatible = "samsung,exynos4210-pd"; | ||
48 | reg = <0x10023C60 0x20>; | ||
49 | }; | ||
50 | |||
51 | pd_lcd0: lcd0-power-domain@10023C80 { | ||
52 | compatible = "samsung,exynos4210-pd"; | ||
53 | reg = <0x10023C80 0x20>; | ||
54 | }; | ||
55 | |||
56 | pd_tv: tv-power-domain@10023C20 { | ||
57 | compatible = "samsung,exynos4210-pd"; | ||
58 | reg = <0x10023C20 0x20>; | ||
59 | }; | ||
60 | |||
61 | pd_cam: cam-power-domain@10023C00 { | ||
62 | compatible = "samsung,exynos4210-pd"; | ||
63 | reg = <0x10023C00 0x20>; | ||
64 | }; | ||
65 | |||
66 | pd_gps: gps-power-domain@10023CE0 { | ||
67 | compatible = "samsung,exynos4210-pd"; | ||
68 | reg = <0x10023CE0 0x20>; | ||
31 | }; | 69 | }; |
32 | 70 | ||
33 | gic:interrupt-controller@10490000 { | 71 | gic:interrupt-controller@10490000 { |
@@ -121,7 +159,7 @@ | |||
121 | status = "disabled"; | 159 | status = "disabled"; |
122 | }; | 160 | }; |
123 | 161 | ||
124 | i2c@13860000 { | 162 | i2c_0: i2c@13860000 { |
125 | #address-cells = <1>; | 163 | #address-cells = <1>; |
126 | #size-cells = <0>; | 164 | #size-cells = <0>; |
127 | compatible = "samsung,s3c2440-i2c"; | 165 | compatible = "samsung,s3c2440-i2c"; |
@@ -130,7 +168,7 @@ | |||
130 | status = "disabled"; | 168 | status = "disabled"; |
131 | }; | 169 | }; |
132 | 170 | ||
133 | i2c@13870000 { | 171 | i2c_1: i2c@13870000 { |
134 | #address-cells = <1>; | 172 | #address-cells = <1>; |
135 | #size-cells = <0>; | 173 | #size-cells = <0>; |
136 | compatible = "samsung,s3c2440-i2c"; | 174 | compatible = "samsung,s3c2440-i2c"; |
@@ -139,7 +177,7 @@ | |||
139 | status = "disabled"; | 177 | status = "disabled"; |
140 | }; | 178 | }; |
141 | 179 | ||
142 | i2c@13880000 { | 180 | i2c_2: i2c@13880000 { |
143 | #address-cells = <1>; | 181 | #address-cells = <1>; |
144 | #size-cells = <0>; | 182 | #size-cells = <0>; |
145 | compatible = "samsung,s3c2440-i2c"; | 183 | compatible = "samsung,s3c2440-i2c"; |
@@ -148,7 +186,7 @@ | |||
148 | status = "disabled"; | 186 | status = "disabled"; |
149 | }; | 187 | }; |
150 | 188 | ||
151 | i2c@13890000 { | 189 | i2c_3: i2c@13890000 { |
152 | #address-cells = <1>; | 190 | #address-cells = <1>; |
153 | #size-cells = <0>; | 191 | #size-cells = <0>; |
154 | compatible = "samsung,s3c2440-i2c"; | 192 | compatible = "samsung,s3c2440-i2c"; |
@@ -157,7 +195,7 @@ | |||
157 | status = "disabled"; | 195 | status = "disabled"; |
158 | }; | 196 | }; |
159 | 197 | ||
160 | i2c@138A0000 { | 198 | i2c_4: i2c@138A0000 { |
161 | #address-cells = <1>; | 199 | #address-cells = <1>; |
162 | #size-cells = <0>; | 200 | #size-cells = <0>; |
163 | compatible = "samsung,s3c2440-i2c"; | 201 | compatible = "samsung,s3c2440-i2c"; |
@@ -166,7 +204,7 @@ | |||
166 | status = "disabled"; | 204 | status = "disabled"; |
167 | }; | 205 | }; |
168 | 206 | ||
169 | i2c@138B0000 { | 207 | i2c_5: i2c@138B0000 { |
170 | #address-cells = <1>; | 208 | #address-cells = <1>; |
171 | #size-cells = <0>; | 209 | #size-cells = <0>; |
172 | compatible = "samsung,s3c2440-i2c"; | 210 | compatible = "samsung,s3c2440-i2c"; |
@@ -175,7 +213,7 @@ | |||
175 | status = "disabled"; | 213 | status = "disabled"; |
176 | }; | 214 | }; |
177 | 215 | ||
178 | i2c@138C0000 { | 216 | i2c_6: i2c@138C0000 { |
179 | #address-cells = <1>; | 217 | #address-cells = <1>; |
180 | #size-cells = <0>; | 218 | #size-cells = <0>; |
181 | compatible = "samsung,s3c2440-i2c"; | 219 | compatible = "samsung,s3c2440-i2c"; |
@@ -184,7 +222,7 @@ | |||
184 | status = "disabled"; | 222 | status = "disabled"; |
185 | }; | 223 | }; |
186 | 224 | ||
187 | i2c@138D0000 { | 225 | i2c_7: i2c@138D0000 { |
188 | #address-cells = <1>; | 226 | #address-cells = <1>; |
189 | #size-cells = <0>; | 227 | #size-cells = <0>; |
190 | compatible = "samsung,s3c2440-i2c"; | 228 | compatible = "samsung,s3c2440-i2c"; |
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 3e68f52e8454..f2710018e84e 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts | |||
@@ -22,38 +22,54 @@ | |||
22 | compatible = "insignal,origen", "samsung,exynos4210"; | 22 | compatible = "insignal,origen", "samsung,exynos4210"; |
23 | 23 | ||
24 | memory { | 24 | memory { |
25 | reg = <0x40000000 0x40000000>; | 25 | reg = <0x40000000 0x10000000 |
26 | 0x50000000 0x10000000 | ||
27 | 0x60000000 0x10000000 | ||
28 | 0x70000000 0x10000000>; | ||
26 | }; | 29 | }; |
27 | 30 | ||
28 | chosen { | 31 | chosen { |
29 | bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; | 32 | bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; |
30 | }; | 33 | }; |
31 | 34 | ||
35 | mmc_reg: voltage-regulator { | ||
36 | compatible = "regulator-fixed"; | ||
37 | regulator-name = "VMEM_VDD_2.8V"; | ||
38 | regulator-min-microvolt = <2800000>; | ||
39 | regulator-max-microvolt = <2800000>; | ||
40 | gpio = <&gpx1 1 0>; | ||
41 | enable-active-high; | ||
42 | }; | ||
43 | |||
32 | sdhci@12530000 { | 44 | sdhci@12530000 { |
33 | samsung,sdhci-bus-width = <4>; | 45 | bus-width = <4>; |
34 | linux,mmc_cap_4_bit_data; | 46 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; |
35 | samsung,sdhci-cd-internal; | 47 | pinctrl-names = "default"; |
36 | gpio-cd = <&gpk2 2 2 3 3>; | 48 | vmmc-supply = <&mmc_reg>; |
37 | gpios = <&gpk2 0 2 0 3>, | ||
38 | <&gpk2 1 2 0 3>, | ||
39 | <&gpk2 3 2 3 3>, | ||
40 | <&gpk2 4 2 3 3>, | ||
41 | <&gpk2 5 2 3 3>, | ||
42 | <&gpk2 6 2 3 3>; | ||
43 | status = "okay"; | 49 | status = "okay"; |
44 | }; | 50 | }; |
45 | 51 | ||
46 | sdhci@12510000 { | 52 | sdhci@12510000 { |
47 | samsung,sdhci-bus-width = <4>; | 53 | bus-width = <4>; |
48 | linux,mmc_cap_4_bit_data; | 54 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>; |
49 | samsung,sdhci-cd-internal; | 55 | pinctrl-names = "default"; |
50 | gpio-cd = <&gpk0 2 2 3 3>; | 56 | vmmc-supply = <&mmc_reg>; |
51 | gpios = <&gpk0 0 2 0 3>, | 57 | status = "okay"; |
52 | <&gpk0 1 2 0 3>, | 58 | }; |
53 | <&gpk0 3 2 3 3>, | 59 | |
54 | <&gpk0 4 2 3 3>, | 60 | serial@13800000 { |
55 | <&gpk0 5 2 3 3>, | 61 | status = "okay"; |
56 | <&gpk0 6 2 3 3>; | 62 | }; |
63 | |||
64 | serial@13810000 { | ||
65 | status = "okay"; | ||
66 | }; | ||
67 | |||
68 | serial@13820000 { | ||
69 | status = "okay"; | ||
70 | }; | ||
71 | |||
72 | serial@13830000 { | ||
57 | status = "okay"; | 73 | status = "okay"; |
58 | }; | 74 | }; |
59 | 75 | ||
@@ -64,35 +80,35 @@ | |||
64 | 80 | ||
65 | up { | 81 | up { |
66 | label = "Up"; | 82 | label = "Up"; |
67 | gpios = <&gpx2 0 0 0x10000 2>; | 83 | gpios = <&gpx2 0 1>; |
68 | linux,code = <103>; | 84 | linux,code = <103>; |
69 | gpio-key,wakeup; | 85 | gpio-key,wakeup; |
70 | }; | 86 | }; |
71 | 87 | ||
72 | down { | 88 | down { |
73 | label = "Down"; | 89 | label = "Down"; |
74 | gpios = <&gpx2 1 0 0x10000 2>; | 90 | gpios = <&gpx2 1 1>; |
75 | linux,code = <108>; | 91 | linux,code = <108>; |
76 | gpio-key,wakeup; | 92 | gpio-key,wakeup; |
77 | }; | 93 | }; |
78 | 94 | ||
79 | back { | 95 | back { |
80 | label = "Back"; | 96 | label = "Back"; |
81 | gpios = <&gpx1 7 0 0x10000 2>; | 97 | gpios = <&gpx1 7 1>; |
82 | linux,code = <158>; | 98 | linux,code = <158>; |
83 | gpio-key,wakeup; | 99 | gpio-key,wakeup; |
84 | }; | 100 | }; |
85 | 101 | ||
86 | home { | 102 | home { |
87 | label = "Home"; | 103 | label = "Home"; |
88 | gpios = <&gpx1 6 0 0x10000 2>; | 104 | gpios = <&gpx1 6 1>; |
89 | linux,code = <102>; | 105 | linux,code = <102>; |
90 | gpio-key,wakeup; | 106 | gpio-key,wakeup; |
91 | }; | 107 | }; |
92 | 108 | ||
93 | menu { | 109 | menu { |
94 | label = "Menu"; | 110 | label = "Menu"; |
95 | gpios = <&gpx1 5 0 0x10000 2>; | 111 | gpios = <&gpx1 5 1>; |
96 | linux,code = <139>; | 112 | linux,code = <139>; |
97 | gpio-key,wakeup; | 113 | gpio-key,wakeup; |
98 | }; | 114 | }; |
@@ -101,7 +117,7 @@ | |||
101 | leds { | 117 | leds { |
102 | compatible = "gpio-leds"; | 118 | compatible = "gpio-leds"; |
103 | status { | 119 | status { |
104 | gpios = <&gpx1 3 0 0x10000 2>; | 120 | gpios = <&gpx1 3 1>; |
105 | linux,default-trigger = "heartbeat"; | 121 | linux,default-trigger = "heartbeat"; |
106 | }; | 122 | }; |
107 | }; | 123 | }; |
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index b12cf272ad0d..55a2efb763d1 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi | |||
@@ -16,6 +16,134 @@ | |||
16 | 16 | ||
17 | / { | 17 | / { |
18 | pinctrl@11400000 { | 18 | pinctrl@11400000 { |
19 | gpa0: gpa0 { | ||
20 | gpio-controller; | ||
21 | #gpio-cells = <2>; | ||
22 | |||
23 | interrupt-controller; | ||
24 | #interrupt-cells = <2>; | ||
25 | }; | ||
26 | |||
27 | gpa1: gpa1 { | ||
28 | gpio-controller; | ||
29 | #gpio-cells = <2>; | ||
30 | |||
31 | interrupt-controller; | ||
32 | #interrupt-cells = <2>; | ||
33 | }; | ||
34 | |||
35 | gpb: gpb { | ||
36 | gpio-controller; | ||
37 | #gpio-cells = <2>; | ||
38 | |||
39 | interrupt-controller; | ||
40 | #interrupt-cells = <2>; | ||
41 | }; | ||
42 | |||
43 | gpc0: gpc0 { | ||
44 | gpio-controller; | ||
45 | #gpio-cells = <2>; | ||
46 | |||
47 | interrupt-controller; | ||
48 | #interrupt-cells = <2>; | ||
49 | }; | ||
50 | |||
51 | gpc1: gpc1 { | ||
52 | gpio-controller; | ||
53 | #gpio-cells = <2>; | ||
54 | |||
55 | interrupt-controller; | ||
56 | #interrupt-cells = <2>; | ||
57 | }; | ||
58 | |||
59 | gpd0: gpd0 { | ||
60 | gpio-controller; | ||
61 | #gpio-cells = <2>; | ||
62 | |||
63 | interrupt-controller; | ||
64 | #interrupt-cells = <2>; | ||
65 | }; | ||
66 | |||
67 | gpd1: gpd1 { | ||
68 | gpio-controller; | ||
69 | #gpio-cells = <2>; | ||
70 | |||
71 | interrupt-controller; | ||
72 | #interrupt-cells = <2>; | ||
73 | }; | ||
74 | |||
75 | gpe0: gpe0 { | ||
76 | gpio-controller; | ||
77 | #gpio-cells = <2>; | ||
78 | |||
79 | interrupt-controller; | ||
80 | #interrupt-cells = <2>; | ||
81 | }; | ||
82 | |||
83 | gpe1: gpe1 { | ||
84 | gpio-controller; | ||
85 | #gpio-cells = <2>; | ||
86 | |||
87 | interrupt-controller; | ||
88 | #interrupt-cells = <2>; | ||
89 | }; | ||
90 | |||
91 | gpe2: gpe2 { | ||
92 | gpio-controller; | ||
93 | #gpio-cells = <2>; | ||
94 | |||
95 | interrupt-controller; | ||
96 | #interrupt-cells = <2>; | ||
97 | }; | ||
98 | |||
99 | gpe3: gpe3 { | ||
100 | gpio-controller; | ||
101 | #gpio-cells = <2>; | ||
102 | |||
103 | interrupt-controller; | ||
104 | #interrupt-cells = <2>; | ||
105 | }; | ||
106 | |||
107 | gpe4: gpe4 { | ||
108 | gpio-controller; | ||
109 | #gpio-cells = <2>; | ||
110 | |||
111 | interrupt-controller; | ||
112 | #interrupt-cells = <2>; | ||
113 | }; | ||
114 | |||
115 | gpf0: gpf0 { | ||
116 | gpio-controller; | ||
117 | #gpio-cells = <2>; | ||
118 | |||
119 | interrupt-controller; | ||
120 | #interrupt-cells = <2>; | ||
121 | }; | ||
122 | |||
123 | gpf1: gpf1 { | ||
124 | gpio-controller; | ||
125 | #gpio-cells = <2>; | ||
126 | |||
127 | interrupt-controller; | ||
128 | #interrupt-cells = <2>; | ||
129 | }; | ||
130 | |||
131 | gpf2: gpf2 { | ||
132 | gpio-controller; | ||
133 | #gpio-cells = <2>; | ||
134 | |||
135 | interrupt-controller; | ||
136 | #interrupt-cells = <2>; | ||
137 | }; | ||
138 | |||
139 | gpf3: gpf3 { | ||
140 | gpio-controller; | ||
141 | #gpio-cells = <2>; | ||
142 | |||
143 | interrupt-controller; | ||
144 | #interrupt-cells = <2>; | ||
145 | }; | ||
146 | |||
19 | uart0_data: uart0-data { | 147 | uart0_data: uart0-data { |
20 | samsung,pins = "gpa0-0", "gpa0-1"; | 148 | samsung,pins = "gpa0-0", "gpa0-1"; |
21 | samsung,pin-function = <0x2>; | 149 | samsung,pin-function = <0x2>; |
@@ -205,200 +333,345 @@ | |||
205 | }; | 333 | }; |
206 | 334 | ||
207 | pinctrl@11000000 { | 335 | pinctrl@11000000 { |
336 | gpj0: gpj0 { | ||
337 | gpio-controller; | ||
338 | #gpio-cells = <2>; | ||
339 | |||
340 | interrupt-controller; | ||
341 | #interrupt-cells = <2>; | ||
342 | }; | ||
343 | |||
344 | gpj1: gpj1 { | ||
345 | gpio-controller; | ||
346 | #gpio-cells = <2>; | ||
347 | |||
348 | interrupt-controller; | ||
349 | #interrupt-cells = <2>; | ||
350 | }; | ||
351 | |||
352 | gpk0: gpk0 { | ||
353 | gpio-controller; | ||
354 | #gpio-cells = <2>; | ||
355 | |||
356 | interrupt-controller; | ||
357 | #interrupt-cells = <2>; | ||
358 | }; | ||
359 | |||
360 | gpk1: gpk1 { | ||
361 | gpio-controller; | ||
362 | #gpio-cells = <2>; | ||
363 | |||
364 | interrupt-controller; | ||
365 | #interrupt-cells = <2>; | ||
366 | }; | ||
367 | |||
368 | gpk2: gpk2 { | ||
369 | gpio-controller; | ||
370 | #gpio-cells = <2>; | ||
371 | |||
372 | interrupt-controller; | ||
373 | #interrupt-cells = <2>; | ||
374 | }; | ||
375 | |||
376 | gpk3: gpk3 { | ||
377 | gpio-controller; | ||
378 | #gpio-cells = <2>; | ||
379 | |||
380 | interrupt-controller; | ||
381 | #interrupt-cells = <2>; | ||
382 | }; | ||
383 | |||
384 | gpl0: gpl0 { | ||
385 | gpio-controller; | ||
386 | #gpio-cells = <2>; | ||
387 | |||
388 | interrupt-controller; | ||
389 | #interrupt-cells = <2>; | ||
390 | }; | ||
391 | |||
392 | gpl1: gpl1 { | ||
393 | gpio-controller; | ||
394 | #gpio-cells = <2>; | ||
395 | |||
396 | interrupt-controller; | ||
397 | #interrupt-cells = <2>; | ||
398 | }; | ||
399 | |||
400 | gpl2: gpl2 { | ||
401 | gpio-controller; | ||
402 | #gpio-cells = <2>; | ||
403 | |||
404 | interrupt-controller; | ||
405 | #interrupt-cells = <2>; | ||
406 | }; | ||
407 | |||
408 | gpy0: gpy0 { | ||
409 | gpio-controller; | ||
410 | #gpio-cells = <2>; | ||
411 | }; | ||
412 | |||
413 | gpy1: gpy1 { | ||
414 | gpio-controller; | ||
415 | #gpio-cells = <2>; | ||
416 | }; | ||
417 | |||
418 | gpy2: gpy2 { | ||
419 | gpio-controller; | ||
420 | #gpio-cells = <2>; | ||
421 | }; | ||
422 | |||
423 | gpy3: gpy3 { | ||
424 | gpio-controller; | ||
425 | #gpio-cells = <2>; | ||
426 | }; | ||
427 | |||
428 | gpy4: gpy4 { | ||
429 | gpio-controller; | ||
430 | #gpio-cells = <2>; | ||
431 | }; | ||
432 | |||
433 | gpy5: gpy5 { | ||
434 | gpio-controller; | ||
435 | #gpio-cells = <2>; | ||
436 | }; | ||
437 | |||
438 | gpy6: gpy6 { | ||
439 | gpio-controller; | ||
440 | #gpio-cells = <2>; | ||
441 | }; | ||
442 | |||
443 | gpx0: gpx0 { | ||
444 | gpio-controller; | ||
445 | #gpio-cells = <2>; | ||
446 | |||
447 | interrupt-controller; | ||
448 | interrupt-parent = <&gic>; | ||
449 | interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | ||
450 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; | ||
451 | #interrupt-cells = <2>; | ||
452 | }; | ||
453 | |||
454 | gpx1: gpx1 { | ||
455 | gpio-controller; | ||
456 | #gpio-cells = <2>; | ||
457 | |||
458 | interrupt-controller; | ||
459 | interrupt-parent = <&gic>; | ||
460 | interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | ||
461 | <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; | ||
462 | #interrupt-cells = <2>; | ||
463 | }; | ||
464 | |||
465 | gpx2: gpx2 { | ||
466 | gpio-controller; | ||
467 | #gpio-cells = <2>; | ||
468 | |||
469 | interrupt-controller; | ||
470 | #interrupt-cells = <2>; | ||
471 | }; | ||
472 | |||
473 | gpx3: gpx3 { | ||
474 | gpio-controller; | ||
475 | #gpio-cells = <2>; | ||
476 | |||
477 | interrupt-controller; | ||
478 | #interrupt-cells = <2>; | ||
479 | }; | ||
480 | |||
208 | sd0_clk: sd0-clk { | 481 | sd0_clk: sd0-clk { |
209 | samsung,pins = "gpk0-0"; | 482 | samsung,pins = "gpk0-0"; |
210 | samsung,pin-function = <2>; | 483 | samsung,pin-function = <2>; |
211 | samsung,pin-pud = <0>; | 484 | samsung,pin-pud = <0>; |
212 | samsung,pin-drv = <0>; | 485 | samsung,pin-drv = <3>; |
213 | }; | 486 | }; |
214 | 487 | ||
215 | sd0_cmd: sd0-cmd { | 488 | sd0_cmd: sd0-cmd { |
216 | samsung,pins = "gpk0-1"; | 489 | samsung,pins = "gpk0-1"; |
217 | samsung,pin-function = <2>; | 490 | samsung,pin-function = <2>; |
218 | samsung,pin-pud = <0>; | 491 | samsung,pin-pud = <0>; |
219 | samsung,pin-drv = <0>; | 492 | samsung,pin-drv = <3>; |
220 | }; | 493 | }; |
221 | 494 | ||
222 | sd0_cd: sd0-cd { | 495 | sd0_cd: sd0-cd { |
223 | samsung,pins = "gpk0-2"; | 496 | samsung,pins = "gpk0-2"; |
224 | samsung,pin-function = <2>; | 497 | samsung,pin-function = <2>; |
225 | samsung,pin-pud = <3>; | 498 | samsung,pin-pud = <3>; |
226 | samsung,pin-drv = <0>; | 499 | samsung,pin-drv = <3>; |
227 | }; | 500 | }; |
228 | 501 | ||
229 | sd0_bus1: sd0-bus-width1 { | 502 | sd0_bus1: sd0-bus-width1 { |
230 | samsung,pins = "gpk0-3"; | 503 | samsung,pins = "gpk0-3"; |
231 | samsung,pin-function = <2>; | 504 | samsung,pin-function = <2>; |
232 | samsung,pin-pud = <3>; | 505 | samsung,pin-pud = <3>; |
233 | samsung,pin-drv = <0>; | 506 | samsung,pin-drv = <3>; |
234 | }; | 507 | }; |
235 | 508 | ||
236 | sd0_bus4: sd0-bus-width4 { | 509 | sd0_bus4: sd0-bus-width4 { |
237 | samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; | 510 | samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; |
238 | samsung,pin-function = <2>; | 511 | samsung,pin-function = <2>; |
239 | samsung,pin-pud = <3>; | 512 | samsung,pin-pud = <3>; |
240 | samsung,pin-drv = <0>; | 513 | samsung,pin-drv = <3>; |
241 | }; | 514 | }; |
242 | 515 | ||
243 | sd0_bus8: sd0-bus-width8 { | 516 | sd0_bus8: sd0-bus-width8 { |
244 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; | 517 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; |
245 | samsung,pin-function = <3>; | 518 | samsung,pin-function = <3>; |
246 | samsung,pin-pud = <3>; | 519 | samsung,pin-pud = <3>; |
247 | samsung,pin-drv = <0>; | 520 | samsung,pin-drv = <3>; |
248 | }; | 521 | }; |
249 | 522 | ||
250 | sd4_clk: sd4-clk { | 523 | sd4_clk: sd4-clk { |
251 | samsung,pins = "gpk0-0"; | 524 | samsung,pins = "gpk0-0"; |
252 | samsung,pin-function = <3>; | 525 | samsung,pin-function = <3>; |
253 | samsung,pin-pud = <0>; | 526 | samsung,pin-pud = <0>; |
254 | samsung,pin-drv = <0>; | 527 | samsung,pin-drv = <3>; |
255 | }; | 528 | }; |
256 | 529 | ||
257 | sd4_cmd: sd4-cmd { | 530 | sd4_cmd: sd4-cmd { |
258 | samsung,pins = "gpk0-1"; | 531 | samsung,pins = "gpk0-1"; |
259 | samsung,pin-function = <3>; | 532 | samsung,pin-function = <3>; |
260 | samsung,pin-pud = <0>; | 533 | samsung,pin-pud = <0>; |
261 | samsung,pin-drv = <0>; | 534 | samsung,pin-drv = <3>; |
262 | }; | 535 | }; |
263 | 536 | ||
264 | sd4_cd: sd4-cd { | 537 | sd4_cd: sd4-cd { |
265 | samsung,pins = "gpk0-2"; | 538 | samsung,pins = "gpk0-2"; |
266 | samsung,pin-function = <3>; | 539 | samsung,pin-function = <3>; |
267 | samsung,pin-pud = <3>; | 540 | samsung,pin-pud = <3>; |
268 | samsung,pin-drv = <0>; | 541 | samsung,pin-drv = <3>; |
269 | }; | 542 | }; |
270 | 543 | ||
271 | sd4_bus1: sd4-bus-width1 { | 544 | sd4_bus1: sd4-bus-width1 { |
272 | samsung,pins = "gpk0-3"; | 545 | samsung,pins = "gpk0-3"; |
273 | samsung,pin-function = <3>; | 546 | samsung,pin-function = <3>; |
274 | samsung,pin-pud = <3>; | 547 | samsung,pin-pud = <3>; |
275 | samsung,pin-drv = <0>; | 548 | samsung,pin-drv = <3>; |
276 | }; | 549 | }; |
277 | 550 | ||
278 | sd4_bus4: sd4-bus-width4 { | 551 | sd4_bus4: sd4-bus-width4 { |
279 | samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; | 552 | samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; |
280 | samsung,pin-function = <3>; | 553 | samsung,pin-function = <3>; |
281 | samsung,pin-pud = <3>; | 554 | samsung,pin-pud = <3>; |
282 | samsung,pin-drv = <0>; | 555 | samsung,pin-drv = <3>; |
283 | }; | 556 | }; |
284 | 557 | ||
285 | sd4_bus8: sd4-bus-width8 { | 558 | sd4_bus8: sd4-bus-width8 { |
286 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; | 559 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; |
287 | samsung,pin-function = <3>; | 560 | samsung,pin-function = <3>; |
288 | samsung,pin-pud = <4>; | 561 | samsung,pin-pud = <4>; |
289 | samsung,pin-drv = <0>; | 562 | samsung,pin-drv = <3>; |
290 | }; | 563 | }; |
291 | 564 | ||
292 | sd1_clk: sd1-clk { | 565 | sd1_clk: sd1-clk { |
293 | samsung,pins = "gpk1-0"; | 566 | samsung,pins = "gpk1-0"; |
294 | samsung,pin-function = <2>; | 567 | samsung,pin-function = <2>; |
295 | samsung,pin-pud = <0>; | 568 | samsung,pin-pud = <0>; |
296 | samsung,pin-drv = <0>; | 569 | samsung,pin-drv = <3>; |
297 | }; | 570 | }; |
298 | 571 | ||
299 | sd1_cmd: sd1-cmd { | 572 | sd1_cmd: sd1-cmd { |
300 | samsung,pins = "gpk1-1"; | 573 | samsung,pins = "gpk1-1"; |
301 | samsung,pin-function = <2>; | 574 | samsung,pin-function = <2>; |
302 | samsung,pin-pud = <0>; | 575 | samsung,pin-pud = <0>; |
303 | samsung,pin-drv = <0>; | 576 | samsung,pin-drv = <3>; |
304 | }; | 577 | }; |
305 | 578 | ||
306 | sd1_cd: sd1-cd { | 579 | sd1_cd: sd1-cd { |
307 | samsung,pins = "gpk1-2"; | 580 | samsung,pins = "gpk1-2"; |
308 | samsung,pin-function = <2>; | 581 | samsung,pin-function = <2>; |
309 | samsung,pin-pud = <3>; | 582 | samsung,pin-pud = <3>; |
310 | samsung,pin-drv = <0>; | 583 | samsung,pin-drv = <3>; |
311 | }; | 584 | }; |
312 | 585 | ||
313 | sd1_bus1: sd1-bus-width1 { | 586 | sd1_bus1: sd1-bus-width1 { |
314 | samsung,pins = "gpk1-3"; | 587 | samsung,pins = "gpk1-3"; |
315 | samsung,pin-function = <2>; | 588 | samsung,pin-function = <2>; |
316 | samsung,pin-pud = <3>; | 589 | samsung,pin-pud = <3>; |
317 | samsung,pin-drv = <0>; | 590 | samsung,pin-drv = <3>; |
318 | }; | 591 | }; |
319 | 592 | ||
320 | sd1_bus4: sd1-bus-width4 { | 593 | sd1_bus4: sd1-bus-width4 { |
321 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; | 594 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; |
322 | samsung,pin-function = <2>; | 595 | samsung,pin-function = <2>; |
323 | samsung,pin-pud = <3>; | 596 | samsung,pin-pud = <3>; |
324 | samsung,pin-drv = <0>; | 597 | samsung,pin-drv = <3>; |
325 | }; | 598 | }; |
326 | 599 | ||
327 | sd2_clk: sd2-clk { | 600 | sd2_clk: sd2-clk { |
328 | samsung,pins = "gpk2-0"; | 601 | samsung,pins = "gpk2-0"; |
329 | samsung,pin-function = <2>; | 602 | samsung,pin-function = <2>; |
330 | samsung,pin-pud = <0>; | 603 | samsung,pin-pud = <0>; |
331 | samsung,pin-drv = <0>; | 604 | samsung,pin-drv = <3>; |
332 | }; | 605 | }; |
333 | 606 | ||
334 | sd2_cmd: sd2-cmd { | 607 | sd2_cmd: sd2-cmd { |
335 | samsung,pins = "gpk2-1"; | 608 | samsung,pins = "gpk2-1"; |
336 | samsung,pin-function = <2>; | 609 | samsung,pin-function = <2>; |
337 | samsung,pin-pud = <0>; | 610 | samsung,pin-pud = <0>; |
338 | samsung,pin-drv = <0>; | 611 | samsung,pin-drv = <3>; |
339 | }; | 612 | }; |
340 | 613 | ||
341 | sd2_cd: sd2-cd { | 614 | sd2_cd: sd2-cd { |
342 | samsung,pins = "gpk2-2"; | 615 | samsung,pins = "gpk2-2"; |
343 | samsung,pin-function = <2>; | 616 | samsung,pin-function = <2>; |
344 | samsung,pin-pud = <3>; | 617 | samsung,pin-pud = <3>; |
345 | samsung,pin-drv = <0>; | 618 | samsung,pin-drv = <3>; |
346 | }; | 619 | }; |
347 | 620 | ||
348 | sd2_bus1: sd2-bus-width1 { | 621 | sd2_bus1: sd2-bus-width1 { |
349 | samsung,pins = "gpk2-3"; | 622 | samsung,pins = "gpk2-3"; |
350 | samsung,pin-function = <2>; | 623 | samsung,pin-function = <2>; |
351 | samsung,pin-pud = <3>; | 624 | samsung,pin-pud = <3>; |
352 | samsung,pin-drv = <0>; | 625 | samsung,pin-drv = <3>; |
353 | }; | 626 | }; |
354 | 627 | ||
355 | sd2_bus4: sd2-bus-width4 { | 628 | sd2_bus4: sd2-bus-width4 { |
356 | samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; | 629 | samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; |
357 | samsung,pin-function = <2>; | 630 | samsung,pin-function = <2>; |
358 | samsung,pin-pud = <3>; | 631 | samsung,pin-pud = <3>; |
359 | samsung,pin-drv = <0>; | 632 | samsung,pin-drv = <3>; |
360 | }; | 633 | }; |
361 | 634 | ||
362 | sd2_bus8: sd2-bus-width8 { | 635 | sd2_bus8: sd2-bus-width8 { |
363 | samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; | 636 | samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; |
364 | samsung,pin-function = <3>; | 637 | samsung,pin-function = <3>; |
365 | samsung,pin-pud = <3>; | 638 | samsung,pin-pud = <3>; |
366 | samsung,pin-drv = <0>; | 639 | samsung,pin-drv = <3>; |
367 | }; | 640 | }; |
368 | 641 | ||
369 | sd3_clk: sd3-clk { | 642 | sd3_clk: sd3-clk { |
370 | samsung,pins = "gpk3-0"; | 643 | samsung,pins = "gpk3-0"; |
371 | samsung,pin-function = <2>; | 644 | samsung,pin-function = <2>; |
372 | samsung,pin-pud = <0>; | 645 | samsung,pin-pud = <0>; |
373 | samsung,pin-drv = <0>; | 646 | samsung,pin-drv = <3>; |
374 | }; | 647 | }; |
375 | 648 | ||
376 | sd3_cmd: sd3-cmd { | 649 | sd3_cmd: sd3-cmd { |
377 | samsung,pins = "gpk3-1"; | 650 | samsung,pins = "gpk3-1"; |
378 | samsung,pin-function = <2>; | 651 | samsung,pin-function = <2>; |
379 | samsung,pin-pud = <0>; | 652 | samsung,pin-pud = <0>; |
380 | samsung,pin-drv = <0>; | 653 | samsung,pin-drv = <3>; |
381 | }; | 654 | }; |
382 | 655 | ||
383 | sd3_cd: sd3-cd { | 656 | sd3_cd: sd3-cd { |
384 | samsung,pins = "gpk3-2"; | 657 | samsung,pins = "gpk3-2"; |
385 | samsung,pin-function = <2>; | 658 | samsung,pin-function = <2>; |
386 | samsung,pin-pud = <3>; | 659 | samsung,pin-pud = <3>; |
387 | samsung,pin-drv = <0>; | 660 | samsung,pin-drv = <3>; |
388 | }; | 661 | }; |
389 | 662 | ||
390 | sd3_bus1: sd3-bus-width1 { | 663 | sd3_bus1: sd3-bus-width1 { |
391 | samsung,pins = "gpk3-3"; | 664 | samsung,pins = "gpk3-3"; |
392 | samsung,pin-function = <2>; | 665 | samsung,pin-function = <2>; |
393 | samsung,pin-pud = <3>; | 666 | samsung,pin-pud = <3>; |
394 | samsung,pin-drv = <0>; | 667 | samsung,pin-drv = <3>; |
395 | }; | 668 | }; |
396 | 669 | ||
397 | sd3_bus4: sd3-bus-width4 { | 670 | sd3_bus4: sd3-bus-width4 { |
398 | samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; | 671 | samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; |
399 | samsung,pin-function = <2>; | 672 | samsung,pin-function = <2>; |
400 | samsung,pin-pud = <3>; | 673 | samsung,pin-pud = <3>; |
401 | samsung,pin-drv = <0>; | 674 | samsung,pin-drv = <3>; |
402 | }; | 675 | }; |
403 | 676 | ||
404 | eint0: ext-int0 { | 677 | eint0: ext-int0 { |
@@ -438,6 +711,11 @@ | |||
438 | }; | 711 | }; |
439 | 712 | ||
440 | pinctrl@03860000 { | 713 | pinctrl@03860000 { |
714 | gpz: gpz { | ||
715 | gpio-controller; | ||
716 | #gpio-cells = <2>; | ||
717 | }; | ||
718 | |||
441 | i2s0_bus: i2s0-bus { | 719 | i2s0_bus: i2s0-bus { |
442 | samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", | 720 | samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", |
443 | "gpz-4", "gpz-5", "gpz-6"; | 721 | "gpz-4", "gpz-5", "gpz-6"; |
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 63610c3ba3af..9b23a8255e39 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts | |||
@@ -43,6 +43,22 @@ | |||
43 | status = "okay"; | 43 | status = "okay"; |
44 | }; | 44 | }; |
45 | 45 | ||
46 | serial@13800000 { | ||
47 | status = "okay"; | ||
48 | }; | ||
49 | |||
50 | serial@13810000 { | ||
51 | status = "okay"; | ||
52 | }; | ||
53 | |||
54 | serial@13820000 { | ||
55 | status = "okay"; | ||
56 | }; | ||
57 | |||
58 | serial@13830000 { | ||
59 | status = "okay"; | ||
60 | }; | ||
61 | |||
46 | keypad@100A0000 { | 62 | keypad@100A0000 { |
47 | samsung,keypad-num-rows = <2>; | 63 | samsung,keypad-num-rows = <2>; |
48 | samsung,keypad-num-columns = <8>; | 64 | samsung,keypad-num-columns = <8>; |
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index a21511c14071..c346b64dff55 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts | |||
@@ -35,24 +35,15 @@ | |||
35 | regulator-name = "VMEM_VDD_2.8V"; | 35 | regulator-name = "VMEM_VDD_2.8V"; |
36 | regulator-min-microvolt = <2800000>; | 36 | regulator-min-microvolt = <2800000>; |
37 | regulator-max-microvolt = <2800000>; | 37 | regulator-max-microvolt = <2800000>; |
38 | gpio = <&gpk0 2 1 0 0>; | 38 | gpio = <&gpk0 2 0>; |
39 | enable-active-high; | 39 | enable-active-high; |
40 | }; | 40 | }; |
41 | 41 | ||
42 | sdhci_emmc: sdhci@12510000 { | 42 | sdhci_emmc: sdhci@12510000 { |
43 | bus-width = <8>; | 43 | bus-width = <8>; |
44 | non-removable; | 44 | non-removable; |
45 | broken-voltage; | 45 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; |
46 | gpios = <&gpk0 0 2 0 3>, | 46 | pinctrl-names = "default"; |
47 | <&gpk0 1 2 0 3>, | ||
48 | <&gpk0 3 2 2 3>, | ||
49 | <&gpk0 4 2 2 3>, | ||
50 | <&gpk0 5 2 2 3>, | ||
51 | <&gpk0 6 2 2 3>, | ||
52 | <&gpk1 3 3 3 3>, | ||
53 | <&gpk1 4 3 3 3>, | ||
54 | <&gpk1 5 3 3 3>, | ||
55 | <&gpk1 6 3 3 3>; | ||
56 | vmmc-supply = <&vemmc_reg>; | 47 | vmmc-supply = <&vemmc_reg>; |
57 | status = "okay"; | 48 | status = "okay"; |
58 | }; | 49 | }; |
@@ -73,12 +64,74 @@ | |||
73 | status = "okay"; | 64 | status = "okay"; |
74 | }; | 65 | }; |
75 | 66 | ||
67 | gpio-keys { | ||
68 | compatible = "gpio-keys"; | ||
69 | |||
70 | vol-down-key { | ||
71 | gpios = <&gpx2 1 1>; | ||
72 | linux,code = <114>; | ||
73 | label = "volume down"; | ||
74 | debounce-interval = <10>; | ||
75 | }; | ||
76 | |||
77 | vol-up-key { | ||
78 | gpios = <&gpx2 0 1>; | ||
79 | linux,code = <115>; | ||
80 | label = "volume up"; | ||
81 | debounce-interval = <10>; | ||
82 | }; | ||
83 | |||
84 | power-key { | ||
85 | gpios = <&gpx2 7 1>; | ||
86 | linux,code = <116>; | ||
87 | label = "power"; | ||
88 | debounce-interval = <10>; | ||
89 | gpio-key,wakeup; | ||
90 | }; | ||
91 | |||
92 | ok-key { | ||
93 | gpios = <&gpx3 5 1>; | ||
94 | linux,code = <352>; | ||
95 | label = "ok"; | ||
96 | debounce-interval = <10>; | ||
97 | }; | ||
98 | }; | ||
99 | |||
100 | tsp_reg: voltage-regulator { | ||
101 | compatible = "regulator-fixed"; | ||
102 | regulator-name = "TSP_FIXED_VOLTAGES"; | ||
103 | regulator-min-microvolt = <2800000>; | ||
104 | regulator-max-microvolt = <2800000>; | ||
105 | gpio = <&gpl0 3 0>; | ||
106 | enable-active-high; | ||
107 | }; | ||
108 | |||
109 | i2c@13890000 { | ||
110 | samsung,i2c-sda-delay = <100>; | ||
111 | samsung,i2c-slave-addr = <0x10>; | ||
112 | samsung,i2c-max-bus-freq = <400000>; | ||
113 | pinctrl-0 = <&i2c3_bus>; | ||
114 | pinctrl-names = "default"; | ||
115 | status = "okay"; | ||
116 | |||
117 | mms114-touchscreen@48 { | ||
118 | compatible = "melfas,mms114"; | ||
119 | reg = <0x48>; | ||
120 | interrupt-parent = <&gpx0>; | ||
121 | interrupts = <4 2>; | ||
122 | x-size = <720>; | ||
123 | y-size = <1280>; | ||
124 | avdd-supply = <&tsp_reg>; | ||
125 | vdd-supply = <&tsp_reg>; | ||
126 | }; | ||
127 | }; | ||
128 | |||
76 | i2c@138B0000 { | 129 | i2c@138B0000 { |
77 | samsung,i2c-sda-delay = <100>; | 130 | samsung,i2c-sda-delay = <100>; |
78 | samsung,i2c-slave-addr = <0x10>; | 131 | samsung,i2c-slave-addr = <0x10>; |
79 | samsung,i2c-max-bus-freq = <100000>; | 132 | samsung,i2c-max-bus-freq = <100000>; |
80 | gpios = <&gpb 6 3 3 0>, | 133 | pinctrl-0 = <&i2c5_bus>; |
81 | <&gpb 7 3 3 0>; | 134 | pinctrl-names = "default"; |
82 | status = "okay"; | 135 | status = "okay"; |
83 | 136 | ||
84 | max8997_pmic@66 { | 137 | max8997_pmic@66 { |
@@ -93,9 +146,9 @@ | |||
93 | max8997,pmic-ignore-gpiodvs-side-effect; | 146 | max8997,pmic-ignore-gpiodvs-side-effect; |
94 | max8997,pmic-buck125-default-dvs-idx = <0>; | 147 | max8997,pmic-buck125-default-dvs-idx = <0>; |
95 | 148 | ||
96 | max8997,pmic-buck125-dvs-gpios = <&gpx0 5 1 0 0>, | 149 | max8997,pmic-buck125-dvs-gpios = <&gpx0 5 0>, |
97 | <&gpx0 6 1 0 0>, | 150 | <&gpx0 6 0>, |
98 | <&gpl0 0 1 0 0>; | 151 | <&gpl0 0 0>; |
99 | 152 | ||
100 | max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>, | 153 | max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>, |
101 | <1250000>, <1200000>, | 154 | <1250000>, <1200000>, |
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 214c557eda7f..e31bfc4a6f09 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi | |||
@@ -31,6 +31,11 @@ | |||
31 | pinctrl2 = &pinctrl_2; | 31 | pinctrl2 = &pinctrl_2; |
32 | }; | 32 | }; |
33 | 33 | ||
34 | pd_lcd1: lcd1-power-domain@10023CA0 { | ||
35 | compatible = "samsung,exynos4210-pd"; | ||
36 | reg = <0x10023CA0 0x20>; | ||
37 | }; | ||
38 | |||
34 | gic:interrupt-controller@10490000 { | 39 | gic:interrupt-controller@10490000 { |
35 | cpu-offset = <0x8000>; | 40 | cpu-offset = <0x8000>; |
36 | }; | 41 | }; |
@@ -46,27 +51,17 @@ | |||
46 | compatible = "samsung,pinctrl-exynos4210"; | 51 | compatible = "samsung,pinctrl-exynos4210"; |
47 | reg = <0x11400000 0x1000>; | 52 | reg = <0x11400000 0x1000>; |
48 | interrupts = <0 47 0>; | 53 | interrupts = <0 47 0>; |
49 | interrupt-controller; | ||
50 | #interrupt-cells = <2>; | ||
51 | }; | 54 | }; |
52 | 55 | ||
53 | pinctrl_1: pinctrl@11000000 { | 56 | pinctrl_1: pinctrl@11000000 { |
54 | compatible = "samsung,pinctrl-exynos4210"; | 57 | compatible = "samsung,pinctrl-exynos4210"; |
55 | reg = <0x11000000 0x1000>; | 58 | reg = <0x11000000 0x1000>; |
56 | interrupts = <0 46 0>; | 59 | interrupts = <0 46 0>; |
57 | interrupt-controller; | ||
58 | #interrupt-cells = <2>; | ||
59 | 60 | ||
60 | wakup_eint: wakeup-interrupt-controller { | 61 | wakup_eint: wakeup-interrupt-controller { |
61 | compatible = "samsung,exynos4210-wakeup-eint"; | 62 | compatible = "samsung,exynos4210-wakeup-eint"; |
62 | interrupt-parent = <&gic>; | 63 | interrupt-parent = <&gic>; |
63 | interrupt-controller; | 64 | interrupts = <0 32 0>; |
64 | #interrupt-cells = <2>; | ||
65 | interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | ||
66 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, | ||
67 | <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | ||
68 | <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, | ||
69 | <0 32 0>; | ||
70 | }; | 65 | }; |
71 | }; | 66 | }; |
72 | 67 | ||
@@ -75,232 +70,10 @@ | |||
75 | reg = <0x03860000 0x1000>; | 70 | reg = <0x03860000 0x1000>; |
76 | }; | 71 | }; |
77 | 72 | ||
78 | gpio-controllers { | 73 | tmu@100C0000 { |
79 | #address-cells = <1>; | 74 | compatible = "samsung,exynos4210-tmu"; |
80 | #size-cells = <1>; | 75 | interrupt-parent = <&combiner>; |
81 | gpio-controller; | 76 | reg = <0x100C0000 0x100>; |
82 | ranges; | 77 | interrupts = <2 4>; |
83 | |||
84 | gpa0: gpio-controller@11400000 { | ||
85 | compatible = "samsung,exynos4-gpio"; | ||
86 | reg = <0x11400000 0x20>; | ||
87 | #gpio-cells = <4>; | ||
88 | }; | ||
89 | |||
90 | gpa1: gpio-controller@11400020 { | ||
91 | compatible = "samsung,exynos4-gpio"; | ||
92 | reg = <0x11400020 0x20>; | ||
93 | #gpio-cells = <4>; | ||
94 | }; | ||
95 | |||
96 | gpb: gpio-controller@11400040 { | ||
97 | compatible = "samsung,exynos4-gpio"; | ||
98 | reg = <0x11400040 0x20>; | ||
99 | #gpio-cells = <4>; | ||
100 | }; | ||
101 | |||
102 | gpc0: gpio-controller@11400060 { | ||
103 | compatible = "samsung,exynos4-gpio"; | ||
104 | reg = <0x11400060 0x20>; | ||
105 | #gpio-cells = <4>; | ||
106 | }; | ||
107 | |||
108 | gpc1: gpio-controller@11400080 { | ||
109 | compatible = "samsung,exynos4-gpio"; | ||
110 | reg = <0x11400080 0x20>; | ||
111 | #gpio-cells = <4>; | ||
112 | }; | ||
113 | |||
114 | gpd0: gpio-controller@114000A0 { | ||
115 | compatible = "samsung,exynos4-gpio"; | ||
116 | reg = <0x114000A0 0x20>; | ||
117 | #gpio-cells = <4>; | ||
118 | }; | ||
119 | |||
120 | gpd1: gpio-controller@114000C0 { | ||
121 | compatible = "samsung,exynos4-gpio"; | ||
122 | reg = <0x114000C0 0x20>; | ||
123 | #gpio-cells = <4>; | ||
124 | }; | ||
125 | |||
126 | gpe0: gpio-controller@114000E0 { | ||
127 | compatible = "samsung,exynos4-gpio"; | ||
128 | reg = <0x114000E0 0x20>; | ||
129 | #gpio-cells = <4>; | ||
130 | }; | ||
131 | |||
132 | gpe1: gpio-controller@11400100 { | ||
133 | compatible = "samsung,exynos4-gpio"; | ||
134 | reg = <0x11400100 0x20>; | ||
135 | #gpio-cells = <4>; | ||
136 | }; | ||
137 | |||
138 | gpe2: gpio-controller@11400120 { | ||
139 | compatible = "samsung,exynos4-gpio"; | ||
140 | reg = <0x11400120 0x20>; | ||
141 | #gpio-cells = <4>; | ||
142 | }; | ||
143 | |||
144 | gpe3: gpio-controller@11400140 { | ||
145 | compatible = "samsung,exynos4-gpio"; | ||
146 | reg = <0x11400140 0x20>; | ||
147 | #gpio-cells = <4>; | ||
148 | }; | ||
149 | |||
150 | gpe4: gpio-controller@11400160 { | ||
151 | compatible = "samsung,exynos4-gpio"; | ||
152 | reg = <0x11400160 0x20>; | ||
153 | #gpio-cells = <4>; | ||
154 | }; | ||
155 | |||
156 | gpf0: gpio-controller@11400180 { | ||
157 | compatible = "samsung,exynos4-gpio"; | ||
158 | reg = <0x11400180 0x20>; | ||
159 | #gpio-cells = <4>; | ||
160 | }; | ||
161 | |||
162 | gpf1: gpio-controller@114001A0 { | ||
163 | compatible = "samsung,exynos4-gpio"; | ||
164 | reg = <0x114001A0 0x20>; | ||
165 | #gpio-cells = <4>; | ||
166 | }; | ||
167 | |||
168 | gpf2: gpio-controller@114001C0 { | ||
169 | compatible = "samsung,exynos4-gpio"; | ||
170 | reg = <0x114001C0 0x20>; | ||
171 | #gpio-cells = <4>; | ||
172 | }; | ||
173 | |||
174 | gpf3: gpio-controller@114001E0 { | ||
175 | compatible = "samsung,exynos4-gpio"; | ||
176 | reg = <0x114001E0 0x20>; | ||
177 | #gpio-cells = <4>; | ||
178 | }; | ||
179 | |||
180 | gpj0: gpio-controller@11000000 { | ||
181 | compatible = "samsung,exynos4-gpio"; | ||
182 | reg = <0x11000000 0x20>; | ||
183 | #gpio-cells = <4>; | ||
184 | }; | ||
185 | |||
186 | gpj1: gpio-controller@11000020 { | ||
187 | compatible = "samsung,exynos4-gpio"; | ||
188 | reg = <0x11000020 0x20>; | ||
189 | #gpio-cells = <4>; | ||
190 | }; | ||
191 | |||
192 | gpk0: gpio-controller@11000040 { | ||
193 | compatible = "samsung,exynos4-gpio"; | ||
194 | reg = <0x11000040 0x20>; | ||
195 | #gpio-cells = <4>; | ||
196 | }; | ||
197 | |||
198 | gpk1: gpio-controller@11000060 { | ||
199 | compatible = "samsung,exynos4-gpio"; | ||
200 | reg = <0x11000060 0x20>; | ||
201 | #gpio-cells = <4>; | ||
202 | }; | ||
203 | |||
204 | gpk2: gpio-controller@11000080 { | ||
205 | compatible = "samsung,exynos4-gpio"; | ||
206 | reg = <0x11000080 0x20>; | ||
207 | #gpio-cells = <4>; | ||
208 | }; | ||
209 | |||
210 | gpk3: gpio-controller@110000A0 { | ||
211 | compatible = "samsung,exynos4-gpio"; | ||
212 | reg = <0x110000A0 0x20>; | ||
213 | #gpio-cells = <4>; | ||
214 | }; | ||
215 | |||
216 | gpl0: gpio-controller@110000C0 { | ||
217 | compatible = "samsung,exynos4-gpio"; | ||
218 | reg = <0x110000C0 0x20>; | ||
219 | #gpio-cells = <4>; | ||
220 | }; | ||
221 | |||
222 | gpl1: gpio-controller@110000E0 { | ||
223 | compatible = "samsung,exynos4-gpio"; | ||
224 | reg = <0x110000E0 0x20>; | ||
225 | #gpio-cells = <4>; | ||
226 | }; | ||
227 | |||
228 | gpl2: gpio-controller@11000100 { | ||
229 | compatible = "samsung,exynos4-gpio"; | ||
230 | reg = <0x11000100 0x20>; | ||
231 | #gpio-cells = <4>; | ||
232 | }; | ||
233 | |||
234 | gpy0: gpio-controller@11000120 { | ||
235 | compatible = "samsung,exynos4-gpio"; | ||
236 | reg = <0x11000120 0x20>; | ||
237 | #gpio-cells = <4>; | ||
238 | }; | ||
239 | |||
240 | gpy1: gpio-controller@11000140 { | ||
241 | compatible = "samsung,exynos4-gpio"; | ||
242 | reg = <0x11000140 0x20>; | ||
243 | #gpio-cells = <4>; | ||
244 | }; | ||
245 | |||
246 | gpy2: gpio-controller@11000160 { | ||
247 | compatible = "samsung,exynos4-gpio"; | ||
248 | reg = <0x11000160 0x20>; | ||
249 | #gpio-cells = <4>; | ||
250 | }; | ||
251 | |||
252 | gpy3: gpio-controller@11000180 { | ||
253 | compatible = "samsung,exynos4-gpio"; | ||
254 | reg = <0x11000180 0x20>; | ||
255 | #gpio-cells = <4>; | ||
256 | }; | ||
257 | |||
258 | gpy4: gpio-controller@110001A0 { | ||
259 | compatible = "samsung,exynos4-gpio"; | ||
260 | reg = <0x110001A0 0x20>; | ||
261 | #gpio-cells = <4>; | ||
262 | }; | ||
263 | |||
264 | gpy5: gpio-controller@110001C0 { | ||
265 | compatible = "samsung,exynos4-gpio"; | ||
266 | reg = <0x110001C0 0x20>; | ||
267 | #gpio-cells = <4>; | ||
268 | }; | ||
269 | |||
270 | gpy6: gpio-controller@110001E0 { | ||
271 | compatible = "samsung,exynos4-gpio"; | ||
272 | reg = <0x110001E0 0x20>; | ||
273 | #gpio-cells = <4>; | ||
274 | }; | ||
275 | |||
276 | gpx0: gpio-controller@11000C00 { | ||
277 | compatible = "samsung,exynos4-gpio"; | ||
278 | reg = <0x11000C00 0x20>; | ||
279 | #gpio-cells = <4>; | ||
280 | }; | ||
281 | |||
282 | gpx1: gpio-controller@11000C20 { | ||
283 | compatible = "samsung,exynos4-gpio"; | ||
284 | reg = <0x11000C20 0x20>; | ||
285 | #gpio-cells = <4>; | ||
286 | }; | ||
287 | |||
288 | gpx2: gpio-controller@11000C40 { | ||
289 | compatible = "samsung,exynos4-gpio"; | ||
290 | reg = <0x11000C40 0x20>; | ||
291 | #gpio-cells = <4>; | ||
292 | }; | ||
293 | |||
294 | gpx3: gpio-controller@11000C60 { | ||
295 | compatible = "samsung,exynos4-gpio"; | ||
296 | reg = <0x11000C60 0x20>; | ||
297 | #gpio-cells = <4>; | ||
298 | }; | ||
299 | |||
300 | gpz: gpio-controller@03860000 { | ||
301 | compatible = "samsung,exynos4-gpio"; | ||
302 | reg = <0x03860000 0x20>; | ||
303 | #gpio-cells = <4>; | ||
304 | }; | ||
305 | }; | 78 | }; |
306 | }; | 79 | }; |
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi new file mode 100644 index 000000000000..c6ae2005961f --- /dev/null +++ b/arch/arm/boot/dts/exynos4212.dtsi | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4212 SoC device tree source | ||
3 | * | ||
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212 | ||
8 | * based board files can include this file and provide values for board specfic | ||
9 | * bindings. | ||
10 | * | ||
11 | * Note: This file does not include device nodes for all the controllers in | ||
12 | * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional | ||
13 | * nodes can be added to this file. | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | /include/ "exynos4x12.dtsi" | ||
21 | |||
22 | / { | ||
23 | compatible = "samsung,exynos4212"; | ||
24 | |||
25 | gic:interrupt-controller@10490000 { | ||
26 | cpu-offset = <0x8000>; | ||
27 | }; | ||
28 | }; | ||
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts new file mode 100644 index 000000000000..f05bf575cc45 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4412 based SMDK board device tree source | ||
3 | * | ||
4 | * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Device tree source file for Samsung's SMDK4412 board which is based on | ||
8 | * Samsung's Exynos4412 SoC. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /dts-v1/; | ||
16 | /include/ "exynos4412.dtsi" | ||
17 | |||
18 | / { | ||
19 | model = "Samsung SMDK evaluation board based on Exynos4412"; | ||
20 | compatible = "samsung,smdk4412", "samsung,exynos4412"; | ||
21 | |||
22 | memory { | ||
23 | reg = <0x40000000 0x40000000>; | ||
24 | }; | ||
25 | |||
26 | chosen { | ||
27 | bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; | ||
28 | }; | ||
29 | |||
30 | serial@13800000 { | ||
31 | status = "okay"; | ||
32 | }; | ||
33 | |||
34 | serial@13810000 { | ||
35 | status = "okay"; | ||
36 | }; | ||
37 | |||
38 | serial@13820000 { | ||
39 | status = "okay"; | ||
40 | }; | ||
41 | |||
42 | serial@13830000 { | ||
43 | status = "okay"; | ||
44 | }; | ||
45 | }; | ||
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi new file mode 100644 index 000000000000..d7dfe312772a --- /dev/null +++ b/arch/arm/boot/dts/exynos4412.dtsi | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4412 SoC device tree source | ||
3 | * | ||
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412 | ||
8 | * based board files can include this file and provide values for board specfic | ||
9 | * bindings. | ||
10 | * | ||
11 | * Note: This file does not include device nodes for all the controllers in | ||
12 | * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional | ||
13 | * nodes can be added to this file. | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | /include/ "exynos4x12.dtsi" | ||
21 | |||
22 | / { | ||
23 | compatible = "samsung,exynos4412"; | ||
24 | |||
25 | gic:interrupt-controller@10490000 { | ||
26 | cpu-offset = <0x4000>; | ||
27 | }; | ||
28 | }; | ||
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi new file mode 100644 index 000000000000..8e6115adcd97 --- /dev/null +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | |||
@@ -0,0 +1,965 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source | ||
3 | * | ||
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device | ||
8 | * tree nodes are listed in this file. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | / { | ||
16 | pinctrl@11400000 { | ||
17 | gpa0: gpa0 { | ||
18 | gpio-controller; | ||
19 | #gpio-cells = <2>; | ||
20 | |||
21 | interrupt-controller; | ||
22 | #interrupt-cells = <2>; | ||
23 | }; | ||
24 | |||
25 | gpa1: gpa1 { | ||
26 | gpio-controller; | ||
27 | #gpio-cells = <2>; | ||
28 | |||
29 | interrupt-controller; | ||
30 | #interrupt-cells = <2>; | ||
31 | }; | ||
32 | |||
33 | gpb: gpb { | ||
34 | gpio-controller; | ||
35 | #gpio-cells = <2>; | ||
36 | |||
37 | interrupt-controller; | ||
38 | #interrupt-cells = <2>; | ||
39 | }; | ||
40 | |||
41 | gpc0: gpc0 { | ||
42 | gpio-controller; | ||
43 | #gpio-cells = <2>; | ||
44 | |||
45 | interrupt-controller; | ||
46 | #interrupt-cells = <2>; | ||
47 | }; | ||
48 | |||
49 | gpc1: gpc1 { | ||
50 | gpio-controller; | ||
51 | #gpio-cells = <2>; | ||
52 | |||
53 | interrupt-controller; | ||
54 | #interrupt-cells = <2>; | ||
55 | }; | ||
56 | |||
57 | gpd0: gpd0 { | ||
58 | gpio-controller; | ||
59 | #gpio-cells = <2>; | ||
60 | |||
61 | interrupt-controller; | ||
62 | #interrupt-cells = <2>; | ||
63 | }; | ||
64 | |||
65 | gpd1: gpd1 { | ||
66 | gpio-controller; | ||
67 | #gpio-cells = <2>; | ||
68 | |||
69 | interrupt-controller; | ||
70 | #interrupt-cells = <2>; | ||
71 | }; | ||
72 | |||
73 | gpf0: gpf0 { | ||
74 | gpio-controller; | ||
75 | #gpio-cells = <2>; | ||
76 | |||
77 | interrupt-controller; | ||
78 | #interrupt-cells = <2>; | ||
79 | }; | ||
80 | |||
81 | gpf1: gpf1 { | ||
82 | gpio-controller; | ||
83 | #gpio-cells = <2>; | ||
84 | |||
85 | interrupt-controller; | ||
86 | #interrupt-cells = <2>; | ||
87 | }; | ||
88 | |||
89 | gpf2: gpf2 { | ||
90 | gpio-controller; | ||
91 | #gpio-cells = <2>; | ||
92 | |||
93 | interrupt-controller; | ||
94 | #interrupt-cells = <2>; | ||
95 | }; | ||
96 | |||
97 | gpf3: gpf3 { | ||
98 | gpio-controller; | ||
99 | #gpio-cells = <2>; | ||
100 | |||
101 | interrupt-controller; | ||
102 | #interrupt-cells = <2>; | ||
103 | }; | ||
104 | |||
105 | gpj0: gpj0 { | ||
106 | gpio-controller; | ||
107 | #gpio-cells = <2>; | ||
108 | |||
109 | interrupt-controller; | ||
110 | #interrupt-cells = <2>; | ||
111 | }; | ||
112 | |||
113 | gpj1: gpj1 { | ||
114 | gpio-controller; | ||
115 | #gpio-cells = <2>; | ||
116 | |||
117 | interrupt-controller; | ||
118 | #interrupt-cells = <2>; | ||
119 | }; | ||
120 | |||
121 | uart0_data: uart0-data { | ||
122 | samsung,pins = "gpa0-0", "gpa0-1"; | ||
123 | samsung,pin-function = <0x2>; | ||
124 | samsung,pin-pud = <0>; | ||
125 | samsung,pin-drv = <0>; | ||
126 | }; | ||
127 | |||
128 | uart0_fctl: uart0-fctl { | ||
129 | samsung,pins = "gpa0-2", "gpa0-3"; | ||
130 | samsung,pin-function = <2>; | ||
131 | samsung,pin-pud = <0>; | ||
132 | samsung,pin-drv = <0>; | ||
133 | }; | ||
134 | |||
135 | uart1_data: uart1-data { | ||
136 | samsung,pins = "gpa0-4", "gpa0-5"; | ||
137 | samsung,pin-function = <2>; | ||
138 | samsung,pin-pud = <0>; | ||
139 | samsung,pin-drv = <0>; | ||
140 | }; | ||
141 | |||
142 | uart1_fctl: uart1-fctl { | ||
143 | samsung,pins = "gpa0-6", "gpa0-7"; | ||
144 | samsung,pin-function = <2>; | ||
145 | samsung,pin-pud = <0>; | ||
146 | samsung,pin-drv = <0>; | ||
147 | }; | ||
148 | |||
149 | i2c2_bus: i2c2-bus { | ||
150 | samsung,pins = "gpa0-6", "gpa0-7"; | ||
151 | samsung,pin-function = <3>; | ||
152 | samsung,pin-pud = <3>; | ||
153 | samsung,pin-drv = <0>; | ||
154 | }; | ||
155 | |||
156 | uart2_data: uart2-data { | ||
157 | samsung,pins = "gpa1-0", "gpa1-1"; | ||
158 | samsung,pin-function = <2>; | ||
159 | samsung,pin-pud = <0>; | ||
160 | samsung,pin-drv = <0>; | ||
161 | }; | ||
162 | |||
163 | uart2_fctl: uart2-fctl { | ||
164 | samsung,pins = "gpa1-2", "gpa1-3"; | ||
165 | samsung,pin-function = <2>; | ||
166 | samsung,pin-pud = <0>; | ||
167 | samsung,pin-drv = <0>; | ||
168 | }; | ||
169 | |||
170 | uart_audio_a: uart-audio-a { | ||
171 | samsung,pins = "gpa1-0", "gpa1-1"; | ||
172 | samsung,pin-function = <4>; | ||
173 | samsung,pin-pud = <0>; | ||
174 | samsung,pin-drv = <0>; | ||
175 | }; | ||
176 | |||
177 | i2c3_bus: i2c3-bus { | ||
178 | samsung,pins = "gpa1-2", "gpa1-3"; | ||
179 | samsung,pin-function = <3>; | ||
180 | samsung,pin-pud = <3>; | ||
181 | samsung,pin-drv = <0>; | ||
182 | }; | ||
183 | |||
184 | uart3_data: uart3-data { | ||
185 | samsung,pins = "gpa1-4", "gpa1-5"; | ||
186 | samsung,pin-function = <2>; | ||
187 | samsung,pin-pud = <0>; | ||
188 | samsung,pin-drv = <0>; | ||
189 | }; | ||
190 | |||
191 | uart_audio_b: uart-audio-b { | ||
192 | samsung,pins = "gpa1-4", "gpa1-5"; | ||
193 | samsung,pin-function = <4>; | ||
194 | samsung,pin-pud = <0>; | ||
195 | samsung,pin-drv = <0>; | ||
196 | }; | ||
197 | |||
198 | spi0_bus: spi0-bus { | ||
199 | samsung,pins = "gpb-0", "gpb-2", "gpb-3"; | ||
200 | samsung,pin-function = <2>; | ||
201 | samsung,pin-pud = <3>; | ||
202 | samsung,pin-drv = <0>; | ||
203 | }; | ||
204 | |||
205 | i2c4_bus: i2c4-bus { | ||
206 | samsung,pins = "gpb-0", "gpb-1"; | ||
207 | samsung,pin-function = <3>; | ||
208 | samsung,pin-pud = <3>; | ||
209 | samsung,pin-drv = <0>; | ||
210 | }; | ||
211 | |||
212 | spi1_bus: spi1-bus { | ||
213 | samsung,pins = "gpb-4", "gpb-6", "gpb-7"; | ||
214 | samsung,pin-function = <2>; | ||
215 | samsung,pin-pud = <3>; | ||
216 | samsung,pin-drv = <0>; | ||
217 | }; | ||
218 | |||
219 | i2c5_bus: i2c5-bus { | ||
220 | samsung,pins = "gpb-2", "gpb-3"; | ||
221 | samsung,pin-function = <3>; | ||
222 | samsung,pin-pud = <3>; | ||
223 | samsung,pin-drv = <0>; | ||
224 | }; | ||
225 | |||
226 | i2s1_bus: i2s1-bus { | ||
227 | samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", | ||
228 | "gpc0-4"; | ||
229 | samsung,pin-function = <2>; | ||
230 | samsung,pin-pud = <0>; | ||
231 | samsung,pin-drv = <0>; | ||
232 | }; | ||
233 | |||
234 | pcm1_bus: pcm1-bus { | ||
235 | samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", | ||
236 | "gpc0-4"; | ||
237 | samsung,pin-function = <3>; | ||
238 | samsung,pin-pud = <0>; | ||
239 | samsung,pin-drv = <0>; | ||
240 | }; | ||
241 | |||
242 | ac97_bus: ac97-bus { | ||
243 | samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", | ||
244 | "gpc0-4"; | ||
245 | samsung,pin-function = <4>; | ||
246 | samsung,pin-pud = <0>; | ||
247 | samsung,pin-drv = <0>; | ||
248 | }; | ||
249 | |||
250 | i2s2_bus: i2s2-bus { | ||
251 | samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", | ||
252 | "gpc1-4"; | ||
253 | samsung,pin-function = <2>; | ||
254 | samsung,pin-pud = <0>; | ||
255 | samsung,pin-drv = <0>; | ||
256 | }; | ||
257 | |||
258 | pcm2_bus: pcm2-bus { | ||
259 | samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", | ||
260 | "gpc1-4"; | ||
261 | samsung,pin-function = <3>; | ||
262 | samsung,pin-pud = <0>; | ||
263 | samsung,pin-drv = <0>; | ||
264 | }; | ||
265 | |||
266 | spdif_bus: spdif-bus { | ||
267 | samsung,pins = "gpc1-0", "gpc1-1"; | ||
268 | samsung,pin-function = <4>; | ||
269 | samsung,pin-pud = <0>; | ||
270 | samsung,pin-drv = <0>; | ||
271 | }; | ||
272 | |||
273 | i2c6_bus: i2c6-bus { | ||
274 | samsung,pins = "gpc1-3", "gpc1-4"; | ||
275 | samsung,pin-function = <4>; | ||
276 | samsung,pin-pud = <3>; | ||
277 | samsung,pin-drv = <0>; | ||
278 | }; | ||
279 | |||
280 | spi2_bus: spi2-bus { | ||
281 | samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4"; | ||
282 | samsung,pin-function = <5>; | ||
283 | samsung,pin-pud = <3>; | ||
284 | samsung,pin-drv = <0>; | ||
285 | }; | ||
286 | |||
287 | pwm0_out: pwm0-out { | ||
288 | samsung,pins = "gpd0-0"; | ||
289 | samsung,pin-function = <2>; | ||
290 | samsung,pin-pud = <0>; | ||
291 | samsung,pin-drv = <0>; | ||
292 | }; | ||
293 | |||
294 | pwm1_out: pwm1-out { | ||
295 | samsung,pins = "gpd0-1"; | ||
296 | samsung,pin-function = <2>; | ||
297 | samsung,pin-pud = <0>; | ||
298 | samsung,pin-drv = <0>; | ||
299 | }; | ||
300 | |||
301 | lcd_ctrl: lcd-ctrl { | ||
302 | samsung,pins = "gpd0-0", "gpd0-1"; | ||
303 | samsung,pin-function = <3>; | ||
304 | samsung,pin-pud = <0>; | ||
305 | samsung,pin-drv = <0>; | ||
306 | }; | ||
307 | |||
308 | i2c7_bus: i2c7-bus { | ||
309 | samsung,pins = "gpd0-2", "gpd0-3"; | ||
310 | samsung,pin-function = <3>; | ||
311 | samsung,pin-pud = <3>; | ||
312 | samsung,pin-drv = <0>; | ||
313 | }; | ||
314 | |||
315 | pwm2_out: pwm2-out { | ||
316 | samsung,pins = "gpd0-2"; | ||
317 | samsung,pin-function = <2>; | ||
318 | samsung,pin-pud = <0>; | ||
319 | samsung,pin-drv = <0>; | ||
320 | }; | ||
321 | |||
322 | pwm3_out: pwm3-out { | ||
323 | samsung,pins = "gpd0-3"; | ||
324 | samsung,pin-function = <2>; | ||
325 | samsung,pin-pud = <0>; | ||
326 | samsung,pin-drv = <0>; | ||
327 | }; | ||
328 | |||
329 | i2c0_bus: i2c0-bus { | ||
330 | samsung,pins = "gpd1-0", "gpd1-1"; | ||
331 | samsung,pin-function = <2>; | ||
332 | samsung,pin-pud = <3>; | ||
333 | samsung,pin-drv = <0>; | ||
334 | }; | ||
335 | |||
336 | mipi0_clk: mipi0-clk { | ||
337 | samsung,pins = "gpd1-0", "gpd1-1"; | ||
338 | samsung,pin-function = <3>; | ||
339 | samsung,pin-pud = <0>; | ||
340 | samsung,pin-drv = <0>; | ||
341 | }; | ||
342 | |||
343 | i2c1_bus: i2c1-bus { | ||
344 | samsung,pins = "gpd1-2", "gpd1-3"; | ||
345 | samsung,pin-function = <2>; | ||
346 | samsung,pin-pud = <3>; | ||
347 | samsung,pin-drv = <0>; | ||
348 | }; | ||
349 | |||
350 | mipi1_clk: mipi1-clk { | ||
351 | samsung,pins = "gpd1-2", "gpd1-3"; | ||
352 | samsung,pin-function = <3>; | ||
353 | samsung,pin-pud = <0>; | ||
354 | samsung,pin-drv = <0>; | ||
355 | }; | ||
356 | |||
357 | lcd_clk: lcd-clk { | ||
358 | samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; | ||
359 | samsung,pin-function = <2>; | ||
360 | samsung,pin-pud = <0>; | ||
361 | samsung,pin-drv = <0>; | ||
362 | }; | ||
363 | |||
364 | lcd_data16: lcd-data-width16 { | ||
365 | samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", | ||
366 | "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", | ||
367 | "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", | ||
368 | "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; | ||
369 | samsung,pin-function = <2>; | ||
370 | samsung,pin-pud = <0>; | ||
371 | samsung,pin-drv = <0>; | ||
372 | }; | ||
373 | |||
374 | lcd_data18: lcd-data-width18 { | ||
375 | samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", | ||
376 | "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", | ||
377 | "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", | ||
378 | "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1", | ||
379 | "gpf3-2", "gpf3-3"; | ||
380 | samsung,pin-function = <2>; | ||
381 | samsung,pin-pud = <0>; | ||
382 | samsung,pin-drv = <0>; | ||
383 | }; | ||
384 | |||
385 | lcd_data24: lcd-data-width24 { | ||
386 | samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", | ||
387 | "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", | ||
388 | "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", | ||
389 | "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", | ||
390 | "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", | ||
391 | "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; | ||
392 | samsung,pin-function = <2>; | ||
393 | samsung,pin-pud = <0>; | ||
394 | samsung,pin-drv = <0>; | ||
395 | }; | ||
396 | |||
397 | lcd_ldi: lcd-ldi { | ||
398 | samsung,pins = "gpf3-4"; | ||
399 | samsung,pin-function = <2>; | ||
400 | samsung,pin-pud = <0>; | ||
401 | samsung,pin-drv = <0>; | ||
402 | }; | ||
403 | |||
404 | cam_port_a: cam-port-a { | ||
405 | samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", | ||
406 | "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", | ||
407 | "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3", | ||
408 | "gpj1-4"; | ||
409 | samsung,pin-function = <2>; | ||
410 | samsung,pin-pud = <3>; | ||
411 | samsung,pin-drv = <0>; | ||
412 | }; | ||
413 | }; | ||
414 | |||
415 | pinctrl@11000000 { | ||
416 | gpk0: gpk0 { | ||
417 | gpio-controller; | ||
418 | #gpio-cells = <2>; | ||
419 | |||
420 | interrupt-controller; | ||
421 | #interrupt-cells = <2>; | ||
422 | }; | ||
423 | |||
424 | gpk1: gpk1 { | ||
425 | gpio-controller; | ||
426 | #gpio-cells = <2>; | ||
427 | |||
428 | interrupt-controller; | ||
429 | #interrupt-cells = <2>; | ||
430 | }; | ||
431 | |||
432 | gpk2: gpk2 { | ||
433 | gpio-controller; | ||
434 | #gpio-cells = <2>; | ||
435 | |||
436 | interrupt-controller; | ||
437 | #interrupt-cells = <2>; | ||
438 | }; | ||
439 | |||
440 | gpk3: gpk3 { | ||
441 | gpio-controller; | ||
442 | #gpio-cells = <2>; | ||
443 | |||
444 | interrupt-controller; | ||
445 | #interrupt-cells = <2>; | ||
446 | }; | ||
447 | |||
448 | gpl0: gpl0 { | ||
449 | gpio-controller; | ||
450 | #gpio-cells = <2>; | ||
451 | |||
452 | interrupt-controller; | ||
453 | #interrupt-cells = <2>; | ||
454 | }; | ||
455 | |||
456 | gpl1: gpl1 { | ||
457 | gpio-controller; | ||
458 | #gpio-cells = <2>; | ||
459 | |||
460 | interrupt-controller; | ||
461 | #interrupt-cells = <2>; | ||
462 | }; | ||
463 | |||
464 | gpl2: gpl2 { | ||
465 | gpio-controller; | ||
466 | #gpio-cells = <2>; | ||
467 | |||
468 | interrupt-controller; | ||
469 | #interrupt-cells = <2>; | ||
470 | }; | ||
471 | |||
472 | gpm0: gpm0 { | ||
473 | gpio-controller; | ||
474 | #gpio-cells = <2>; | ||
475 | |||
476 | interrupt-controller; | ||
477 | #interrupt-cells = <2>; | ||
478 | }; | ||
479 | |||
480 | gpm1: gpm1 { | ||
481 | gpio-controller; | ||
482 | #gpio-cells = <2>; | ||
483 | |||
484 | interrupt-controller; | ||
485 | #interrupt-cells = <2>; | ||
486 | }; | ||
487 | |||
488 | gpm2: gpm2 { | ||
489 | gpio-controller; | ||
490 | #gpio-cells = <2>; | ||
491 | |||
492 | interrupt-controller; | ||
493 | #interrupt-cells = <2>; | ||
494 | }; | ||
495 | |||
496 | gpm3: gpm3 { | ||
497 | gpio-controller; | ||
498 | #gpio-cells = <2>; | ||
499 | |||
500 | interrupt-controller; | ||
501 | #interrupt-cells = <2>; | ||
502 | }; | ||
503 | |||
504 | gpm4: gpm4 { | ||
505 | gpio-controller; | ||
506 | #gpio-cells = <2>; | ||
507 | |||
508 | interrupt-controller; | ||
509 | #interrupt-cells = <2>; | ||
510 | }; | ||
511 | |||
512 | gpy0: gpy0 { | ||
513 | gpio-controller; | ||
514 | #gpio-cells = <2>; | ||
515 | }; | ||
516 | |||
517 | gpy1: gpy1 { | ||
518 | gpio-controller; | ||
519 | #gpio-cells = <2>; | ||
520 | }; | ||
521 | |||
522 | gpy2: gpy2 { | ||
523 | gpio-controller; | ||
524 | #gpio-cells = <2>; | ||
525 | }; | ||
526 | |||
527 | gpy3: gpy3 { | ||
528 | gpio-controller; | ||
529 | #gpio-cells = <2>; | ||
530 | }; | ||
531 | |||
532 | gpy4: gpy4 { | ||
533 | gpio-controller; | ||
534 | #gpio-cells = <2>; | ||
535 | }; | ||
536 | |||
537 | gpy5: gpy5 { | ||
538 | gpio-controller; | ||
539 | #gpio-cells = <2>; | ||
540 | }; | ||
541 | |||
542 | gpy6: gpy6 { | ||
543 | gpio-controller; | ||
544 | #gpio-cells = <2>; | ||
545 | }; | ||
546 | |||
547 | gpx0: gpx0 { | ||
548 | gpio-controller; | ||
549 | #gpio-cells = <2>; | ||
550 | |||
551 | interrupt-controller; | ||
552 | interrupt-parent = <&gic>; | ||
553 | interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | ||
554 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; | ||
555 | #interrupt-cells = <2>; | ||
556 | }; | ||
557 | |||
558 | gpx1: gpx1 { | ||
559 | gpio-controller; | ||
560 | #gpio-cells = <2>; | ||
561 | |||
562 | interrupt-controller; | ||
563 | interrupt-parent = <&gic>; | ||
564 | interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | ||
565 | <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; | ||
566 | #interrupt-cells = <2>; | ||
567 | }; | ||
568 | |||
569 | gpx2: gpx2 { | ||
570 | gpio-controller; | ||
571 | #gpio-cells = <2>; | ||
572 | |||
573 | interrupt-controller; | ||
574 | #interrupt-cells = <2>; | ||
575 | }; | ||
576 | |||
577 | gpx3: gpx3 { | ||
578 | gpio-controller; | ||
579 | #gpio-cells = <2>; | ||
580 | |||
581 | interrupt-controller; | ||
582 | #interrupt-cells = <2>; | ||
583 | }; | ||
584 | |||
585 | sd0_clk: sd0-clk { | ||
586 | samsung,pins = "gpk0-0"; | ||
587 | samsung,pin-function = <2>; | ||
588 | samsung,pin-pud = <0>; | ||
589 | samsung,pin-drv = <3>; | ||
590 | }; | ||
591 | |||
592 | sd0_cmd: sd0-cmd { | ||
593 | samsung,pins = "gpk0-1"; | ||
594 | samsung,pin-function = <2>; | ||
595 | samsung,pin-pud = <0>; | ||
596 | samsung,pin-drv = <3>; | ||
597 | }; | ||
598 | |||
599 | sd0_cd: sd0-cd { | ||
600 | samsung,pins = "gpk0-2"; | ||
601 | samsung,pin-function = <2>; | ||
602 | samsung,pin-pud = <3>; | ||
603 | samsung,pin-drv = <3>; | ||
604 | }; | ||
605 | |||
606 | sd0_bus1: sd0-bus-width1 { | ||
607 | samsung,pins = "gpk0-3"; | ||
608 | samsung,pin-function = <2>; | ||
609 | samsung,pin-pud = <3>; | ||
610 | samsung,pin-drv = <3>; | ||
611 | }; | ||
612 | |||
613 | sd0_bus4: sd0-bus-width4 { | ||
614 | samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; | ||
615 | samsung,pin-function = <2>; | ||
616 | samsung,pin-pud = <3>; | ||
617 | samsung,pin-drv = <3>; | ||
618 | }; | ||
619 | |||
620 | sd0_bus8: sd0-bus-width8 { | ||
621 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; | ||
622 | samsung,pin-function = <3>; | ||
623 | samsung,pin-pud = <3>; | ||
624 | samsung,pin-drv = <3>; | ||
625 | }; | ||
626 | |||
627 | sd4_clk: sd4-clk { | ||
628 | samsung,pins = "gpk0-0"; | ||
629 | samsung,pin-function = <3>; | ||
630 | samsung,pin-pud = <0>; | ||
631 | samsung,pin-drv = <3>; | ||
632 | }; | ||
633 | |||
634 | sd4_cmd: sd4-cmd { | ||
635 | samsung,pins = "gpk0-1"; | ||
636 | samsung,pin-function = <3>; | ||
637 | samsung,pin-pud = <0>; | ||
638 | samsung,pin-drv = <3>; | ||
639 | }; | ||
640 | |||
641 | sd4_cd: sd4-cd { | ||
642 | samsung,pins = "gpk0-2"; | ||
643 | samsung,pin-function = <3>; | ||
644 | samsung,pin-pud = <3>; | ||
645 | samsung,pin-drv = <3>; | ||
646 | }; | ||
647 | |||
648 | sd4_bus1: sd4-bus-width1 { | ||
649 | samsung,pins = "gpk0-3"; | ||
650 | samsung,pin-function = <3>; | ||
651 | samsung,pin-pud = <3>; | ||
652 | samsung,pin-drv = <3>; | ||
653 | }; | ||
654 | |||
655 | sd4_bus4: sd4-bus-width4 { | ||
656 | samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; | ||
657 | samsung,pin-function = <3>; | ||
658 | samsung,pin-pud = <3>; | ||
659 | samsung,pin-drv = <3>; | ||
660 | }; | ||
661 | |||
662 | sd4_bus8: sd4-bus-width8 { | ||
663 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; | ||
664 | samsung,pin-function = <3>; | ||
665 | samsung,pin-pud = <4>; | ||
666 | samsung,pin-drv = <3>; | ||
667 | }; | ||
668 | |||
669 | sd1_clk: sd1-clk { | ||
670 | samsung,pins = "gpk1-0"; | ||
671 | samsung,pin-function = <2>; | ||
672 | samsung,pin-pud = <0>; | ||
673 | samsung,pin-drv = <3>; | ||
674 | }; | ||
675 | |||
676 | sd1_cmd: sd1-cmd { | ||
677 | samsung,pins = "gpk1-1"; | ||
678 | samsung,pin-function = <2>; | ||
679 | samsung,pin-pud = <0>; | ||
680 | samsung,pin-drv = <3>; | ||
681 | }; | ||
682 | |||
683 | sd1_cd: sd1-cd { | ||
684 | samsung,pins = "gpk1-2"; | ||
685 | samsung,pin-function = <2>; | ||
686 | samsung,pin-pud = <3>; | ||
687 | samsung,pin-drv = <3>; | ||
688 | }; | ||
689 | |||
690 | sd1_bus1: sd1-bus-width1 { | ||
691 | samsung,pins = "gpk1-3"; | ||
692 | samsung,pin-function = <2>; | ||
693 | samsung,pin-pud = <3>; | ||
694 | samsung,pin-drv = <3>; | ||
695 | }; | ||
696 | |||
697 | sd1_bus4: sd1-bus-width4 { | ||
698 | samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; | ||
699 | samsung,pin-function = <2>; | ||
700 | samsung,pin-pud = <3>; | ||
701 | samsung,pin-drv = <3>; | ||
702 | }; | ||
703 | |||
704 | sd2_clk: sd2-clk { | ||
705 | samsung,pins = "gpk2-0"; | ||
706 | samsung,pin-function = <2>; | ||
707 | samsung,pin-pud = <0>; | ||
708 | samsung,pin-drv = <3>; | ||
709 | }; | ||
710 | |||
711 | sd2_cmd: sd2-cmd { | ||
712 | samsung,pins = "gpk2-1"; | ||
713 | samsung,pin-function = <2>; | ||
714 | samsung,pin-pud = <0>; | ||
715 | samsung,pin-drv = <3>; | ||
716 | }; | ||
717 | |||
718 | sd2_cd: sd2-cd { | ||
719 | samsung,pins = "gpk2-2"; | ||
720 | samsung,pin-function = <2>; | ||
721 | samsung,pin-pud = <3>; | ||
722 | samsung,pin-drv = <3>; | ||
723 | }; | ||
724 | |||
725 | sd2_bus1: sd2-bus-width1 { | ||
726 | samsung,pins = "gpk2-3"; | ||
727 | samsung,pin-function = <2>; | ||
728 | samsung,pin-pud = <3>; | ||
729 | samsung,pin-drv = <3>; | ||
730 | }; | ||
731 | |||
732 | sd2_bus4: sd2-bus-width4 { | ||
733 | samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; | ||
734 | samsung,pin-function = <2>; | ||
735 | samsung,pin-pud = <3>; | ||
736 | samsung,pin-drv = <3>; | ||
737 | }; | ||
738 | |||
739 | sd2_bus8: sd2-bus-width8 { | ||
740 | samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; | ||
741 | samsung,pin-function = <3>; | ||
742 | samsung,pin-pud = <3>; | ||
743 | samsung,pin-drv = <3>; | ||
744 | }; | ||
745 | |||
746 | sd3_clk: sd3-clk { | ||
747 | samsung,pins = "gpk3-0"; | ||
748 | samsung,pin-function = <2>; | ||
749 | samsung,pin-pud = <0>; | ||
750 | samsung,pin-drv = <3>; | ||
751 | }; | ||
752 | |||
753 | sd3_cmd: sd3-cmd { | ||
754 | samsung,pins = "gpk3-1"; | ||
755 | samsung,pin-function = <2>; | ||
756 | samsung,pin-pud = <0>; | ||
757 | samsung,pin-drv = <3>; | ||
758 | }; | ||
759 | |||
760 | sd3_cd: sd3-cd { | ||
761 | samsung,pins = "gpk3-2"; | ||
762 | samsung,pin-function = <2>; | ||
763 | samsung,pin-pud = <3>; | ||
764 | samsung,pin-drv = <3>; | ||
765 | }; | ||
766 | |||
767 | sd3_bus1: sd3-bus-width1 { | ||
768 | samsung,pins = "gpk3-3"; | ||
769 | samsung,pin-function = <2>; | ||
770 | samsung,pin-pud = <3>; | ||
771 | samsung,pin-drv = <3>; | ||
772 | }; | ||
773 | |||
774 | sd3_bus4: sd3-bus-width4 { | ||
775 | samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; | ||
776 | samsung,pin-function = <2>; | ||
777 | samsung,pin-pud = <3>; | ||
778 | samsung,pin-drv = <3>; | ||
779 | }; | ||
780 | |||
781 | keypad_col0: keypad-col0 { | ||
782 | samsung,pins = "gpl2-0"; | ||
783 | samsung,pin-function = <3>; | ||
784 | samsung,pin-pud = <0>; | ||
785 | samsung,pin-drv = <0>; | ||
786 | }; | ||
787 | |||
788 | keypad_col1: keypad-col1 { | ||
789 | samsung,pins = "gpl2-1"; | ||
790 | samsung,pin-function = <3>; | ||
791 | samsung,pin-pud = <0>; | ||
792 | samsung,pin-drv = <0>; | ||
793 | }; | ||
794 | |||
795 | keypad_col2: keypad-col2 { | ||
796 | samsung,pins = "gpl2-2"; | ||
797 | samsung,pin-function = <3>; | ||
798 | samsung,pin-pud = <0>; | ||
799 | samsung,pin-drv = <0>; | ||
800 | }; | ||
801 | |||
802 | keypad_col3: keypad-col3 { | ||
803 | samsung,pins = "gpl2-3"; | ||
804 | samsung,pin-function = <3>; | ||
805 | samsung,pin-pud = <0>; | ||
806 | samsung,pin-drv = <0>; | ||
807 | }; | ||
808 | |||
809 | keypad_col4: keypad-col4 { | ||
810 | samsung,pins = "gpl2-4"; | ||
811 | samsung,pin-function = <3>; | ||
812 | samsung,pin-pud = <0>; | ||
813 | samsung,pin-drv = <0>; | ||
814 | }; | ||
815 | |||
816 | keypad_col5: keypad-col5 { | ||
817 | samsung,pins = "gpl2-5"; | ||
818 | samsung,pin-function = <3>; | ||
819 | samsung,pin-pud = <0>; | ||
820 | samsung,pin-drv = <0>; | ||
821 | }; | ||
822 | |||
823 | keypad_col6: keypad-col6 { | ||
824 | samsung,pins = "gpl2-6"; | ||
825 | samsung,pin-function = <3>; | ||
826 | samsung,pin-pud = <0>; | ||
827 | samsung,pin-drv = <0>; | ||
828 | }; | ||
829 | |||
830 | keypad_col7: keypad-col7 { | ||
831 | samsung,pins = "gpl2-7"; | ||
832 | samsung,pin-function = <3>; | ||
833 | samsung,pin-pud = <0>; | ||
834 | samsung,pin-drv = <0>; | ||
835 | }; | ||
836 | |||
837 | cam_port_b: cam-port-b { | ||
838 | samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", | ||
839 | "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", | ||
840 | "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1", | ||
841 | "gpm2-2"; | ||
842 | samsung,pin-function = <3>; | ||
843 | samsung,pin-pud = <3>; | ||
844 | samsung,pin-drv = <0>; | ||
845 | }; | ||
846 | |||
847 | eint0: ext-int0 { | ||
848 | samsung,pins = "gpx0-0"; | ||
849 | samsung,pin-function = <0xf>; | ||
850 | samsung,pin-pud = <0>; | ||
851 | samsung,pin-drv = <0>; | ||
852 | }; | ||
853 | |||
854 | eint8: ext-int8 { | ||
855 | samsung,pins = "gpx1-0"; | ||
856 | samsung,pin-function = <0xf>; | ||
857 | samsung,pin-pud = <0>; | ||
858 | samsung,pin-drv = <0>; | ||
859 | }; | ||
860 | |||
861 | eint15: ext-int15 { | ||
862 | samsung,pins = "gpx1-7"; | ||
863 | samsung,pin-function = <0xf>; | ||
864 | samsung,pin-pud = <0>; | ||
865 | samsung,pin-drv = <0>; | ||
866 | }; | ||
867 | |||
868 | eint16: ext-int16 { | ||
869 | samsung,pins = "gpx2-0"; | ||
870 | samsung,pin-function = <0xf>; | ||
871 | samsung,pin-pud = <0>; | ||
872 | samsung,pin-drv = <0>; | ||
873 | }; | ||
874 | |||
875 | eint31: ext-int31 { | ||
876 | samsung,pins = "gpx3-7"; | ||
877 | samsung,pin-function = <0xf>; | ||
878 | samsung,pin-pud = <0>; | ||
879 | samsung,pin-drv = <0>; | ||
880 | }; | ||
881 | }; | ||
882 | |||
883 | pinctrl@03860000 { | ||
884 | gpz: gpz { | ||
885 | gpio-controller; | ||
886 | #gpio-cells = <2>; | ||
887 | |||
888 | interrupt-controller; | ||
889 | #interrupt-cells = <2>; | ||
890 | }; | ||
891 | |||
892 | i2s0_bus: i2s0-bus { | ||
893 | samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", | ||
894 | "gpz-4", "gpz-5", "gpz-6"; | ||
895 | samsung,pin-function = <0x2>; | ||
896 | samsung,pin-pud = <0>; | ||
897 | samsung,pin-drv = <0>; | ||
898 | }; | ||
899 | |||
900 | pcm0_bus: pcm0-bus { | ||
901 | samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", | ||
902 | "gpz-4"; | ||
903 | samsung,pin-function = <0x3>; | ||
904 | samsung,pin-pud = <0>; | ||
905 | samsung,pin-drv = <0>; | ||
906 | }; | ||
907 | }; | ||
908 | |||
909 | pinctrl@106E0000 { | ||
910 | gpv0: gpv0 { | ||
911 | gpio-controller; | ||
912 | #gpio-cells = <2>; | ||
913 | |||
914 | interrupt-controller; | ||
915 | #interrupt-cells = <2>; | ||
916 | }; | ||
917 | |||
918 | gpv1: gpv1 { | ||
919 | gpio-controller; | ||
920 | #gpio-cells = <2>; | ||
921 | |||
922 | interrupt-controller; | ||
923 | #interrupt-cells = <2>; | ||
924 | }; | ||
925 | |||
926 | gpv2: gpv2 { | ||
927 | gpio-controller; | ||
928 | #gpio-cells = <2>; | ||
929 | |||
930 | interrupt-controller; | ||
931 | #interrupt-cells = <2>; | ||
932 | }; | ||
933 | |||
934 | gpv3: gpv3 { | ||
935 | gpio-controller; | ||
936 | #gpio-cells = <2>; | ||
937 | |||
938 | interrupt-controller; | ||
939 | #interrupt-cells = <2>; | ||
940 | }; | ||
941 | |||
942 | gpv4: gpv4 { | ||
943 | gpio-controller; | ||
944 | #gpio-cells = <2>; | ||
945 | |||
946 | interrupt-controller; | ||
947 | #interrupt-cells = <2>; | ||
948 | }; | ||
949 | |||
950 | c2c_bus: c2c-bus { | ||
951 | samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3", | ||
952 | "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7", | ||
953 | "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3", | ||
954 | "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7", | ||
955 | "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3", | ||
956 | "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7", | ||
957 | "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3", | ||
958 | "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7", | ||
959 | "gpv4-0", "gpv4-1"; | ||
960 | samsung,pin-function = <0x2>; | ||
961 | samsung,pin-pud = <0>; | ||
962 | samsung,pin-drv = <0>; | ||
963 | }; | ||
964 | }; | ||
965 | }; | ||
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi new file mode 100644 index 000000000000..179a62e46c9d --- /dev/null +++ b/arch/arm/boot/dts/exynos4x12.dtsi | |||
@@ -0,0 +1,69 @@ | |||
1 | /* | ||
2 | * Samsung's Exynos4x12 SoCs device tree source | ||
3 | * | ||
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12 | ||
8 | * based board files can include this file and provide values for board specfic | ||
9 | * bindings. | ||
10 | * | ||
11 | * Note: This file does not include device nodes for all the controllers in | ||
12 | * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional | ||
13 | * nodes can be added to this file. | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | /include/ "exynos4.dtsi" | ||
21 | /include/ "exynos4x12-pinctrl.dtsi" | ||
22 | |||
23 | / { | ||
24 | aliases { | ||
25 | pinctrl0 = &pinctrl_0; | ||
26 | pinctrl1 = &pinctrl_1; | ||
27 | pinctrl2 = &pinctrl_2; | ||
28 | pinctrl3 = &pinctrl_3; | ||
29 | }; | ||
30 | |||
31 | combiner:interrupt-controller@10440000 { | ||
32 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | ||
33 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | ||
34 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | ||
35 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, | ||
36 | <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; | ||
37 | }; | ||
38 | |||
39 | pinctrl_0: pinctrl@11400000 { | ||
40 | compatible = "samsung,pinctrl-exynos4x12"; | ||
41 | reg = <0x11400000 0x1000>; | ||
42 | interrupts = <0 47 0>; | ||
43 | }; | ||
44 | |||
45 | pinctrl_1: pinctrl@11000000 { | ||
46 | compatible = "samsung,pinctrl-exynos4x12"; | ||
47 | reg = <0x11000000 0x1000>; | ||
48 | interrupts = <0 46 0>; | ||
49 | |||
50 | wakup_eint: wakeup-interrupt-controller { | ||
51 | compatible = "samsung,exynos4210-wakeup-eint"; | ||
52 | interrupt-parent = <&gic>; | ||
53 | interrupts = <0 32 0>; | ||
54 | }; | ||
55 | }; | ||
56 | |||
57 | pinctrl_2: pinctrl@03860000 { | ||
58 | compatible = "samsung,pinctrl-exynos4x12"; | ||
59 | reg = <0x03860000 0x1000>; | ||
60 | interrupt-parent = <&combiner>; | ||
61 | interrupts = <10 0>; | ||
62 | }; | ||
63 | |||
64 | pinctrl_3: pinctrl@106E0000 { | ||
65 | compatible = "samsung,pinctrl-exynos4x12"; | ||
66 | reg = <0x106E0000 0x1000>; | ||
67 | interrupts = <0 72 0>; | ||
68 | }; | ||
69 | }; | ||
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index a352df403b7a..942d5761ca97 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts | |||
@@ -17,10 +17,6 @@ | |||
17 | compatible = "samsung,smdk5250", "samsung,exynos5250"; | 17 | compatible = "samsung,smdk5250", "samsung,exynos5250"; |
18 | 18 | ||
19 | aliases { | 19 | aliases { |
20 | mshc0 = &dwmmc_0; | ||
21 | mshc1 = &dwmmc_1; | ||
22 | mshc2 = &dwmmc_2; | ||
23 | mshc3 = &dwmmc_3; | ||
24 | }; | 20 | }; |
25 | 21 | ||
26 | memory { | 22 | memory { |
@@ -55,8 +51,31 @@ | |||
55 | }; | 51 | }; |
56 | }; | 52 | }; |
57 | 53 | ||
54 | i2c@121D0000 { | ||
55 | samsung,i2c-sda-delay = <100>; | ||
56 | samsung,i2c-max-bus-freq = <40000>; | ||
57 | samsung,i2c-slave-addr = <0x38>; | ||
58 | |||
59 | sata-phy { | ||
60 | compatible = "samsung,sata-phy"; | ||
61 | reg = <0x38>; | ||
62 | }; | ||
63 | }; | ||
64 | |||
65 | sata@122F0000 { | ||
66 | samsung,sata-freq = <66>; | ||
67 | }; | ||
68 | |||
58 | i2c@12C80000 { | 69 | i2c@12C80000 { |
59 | status = "disabled"; | 70 | samsung,i2c-sda-delay = <100>; |
71 | samsung,i2c-max-bus-freq = <66000>; | ||
72 | gpios = <&gpa0 6 3 3 0>, | ||
73 | <&gpa0 7 3 3 0>; | ||
74 | |||
75 | hdmiddc@50 { | ||
76 | compatible = "samsung,exynos5-hdmiddc"; | ||
77 | reg = <0x50>; | ||
78 | }; | ||
60 | }; | 79 | }; |
61 | 80 | ||
62 | i2c@12C90000 { | 81 | i2c@12C90000 { |
@@ -79,7 +98,17 @@ | |||
79 | status = "disabled"; | 98 | status = "disabled"; |
80 | }; | 99 | }; |
81 | 100 | ||
82 | dwmmc_0: dwmmc0@12200000 { | 101 | i2c@12CE0000 { |
102 | samsung,i2c-sda-delay = <100>; | ||
103 | samsung,i2c-max-bus-freq = <66000>; | ||
104 | |||
105 | hdmiphy@38 { | ||
106 | compatible = "samsung,exynos5-hdmiphy"; | ||
107 | reg = <0x38>; | ||
108 | }; | ||
109 | }; | ||
110 | |||
111 | dwmmc0@12200000 { | ||
83 | num-slots = <1>; | 112 | num-slots = <1>; |
84 | supports-highspeed; | 113 | supports-highspeed; |
85 | broken-cd; | 114 | broken-cd; |
@@ -100,11 +129,11 @@ | |||
100 | }; | 129 | }; |
101 | }; | 130 | }; |
102 | 131 | ||
103 | dwmmc_1: dwmmc1@12210000 { | 132 | dwmmc1@12210000 { |
104 | status = "disabled"; | 133 | status = "disabled"; |
105 | }; | 134 | }; |
106 | 135 | ||
107 | dwmmc_2: dwmmc2@12220000 { | 136 | dwmmc2@12220000 { |
108 | num-slots = <1>; | 137 | num-slots = <1>; |
109 | supports-highspeed; | 138 | supports-highspeed; |
110 | fifo-depth = <0x80>; | 139 | fifo-depth = <0x80>; |
@@ -125,7 +154,7 @@ | |||
125 | }; | 154 | }; |
126 | }; | 155 | }; |
127 | 156 | ||
128 | dwmmc_3: dwmmc3@12230000 { | 157 | dwmmc3@12230000 { |
129 | status = "disabled"; | 158 | status = "disabled"; |
130 | }; | 159 | }; |
131 | 160 | ||
@@ -166,4 +195,13 @@ | |||
166 | spi_2: spi@12d40000 { | 195 | spi_2: spi@12d40000 { |
167 | status = "disabled"; | 196 | status = "disabled"; |
168 | }; | 197 | }; |
198 | |||
199 | hdmi { | ||
200 | hpd-gpio = <&gpx3 7 0xf 1 3>; | ||
201 | }; | ||
202 | |||
203 | codec@11000000 { | ||
204 | samsung,mfc-r = <0x43000000 0x800000>; | ||
205 | samsung,mfc-l = <0x51000000 0x800000>; | ||
206 | }; | ||
169 | }; | 207 | }; |
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts new file mode 100644 index 000000000000..17dd951c1cd2 --- /dev/null +++ b/arch/arm/boot/dts/exynos5250-snow.dts | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * Google Snow board device tree source | ||
3 | * | ||
4 | * Copyright (c) 2012 Google, Inc | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | /dts-v1/; | ||
12 | /include/ "exynos5250.dtsi" | ||
13 | /include/ "cros5250-common.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "Google Snow"; | ||
17 | compatible = "google,snow", "samsung,exynos5250"; | ||
18 | |||
19 | gpio-keys { | ||
20 | compatible = "gpio-keys"; | ||
21 | |||
22 | lid-switch { | ||
23 | label = "Lid"; | ||
24 | gpios = <&gpx3 5 0 0x10000 0>; | ||
25 | linux,input-type = <5>; /* EV_SW */ | ||
26 | linux,code = <0>; /* SW_LID */ | ||
27 | debounce-interval = <1>; | ||
28 | gpio-key,wakeup; | ||
29 | }; | ||
30 | }; | ||
31 | |||
32 | /* | ||
33 | * On Snow we've got SIP WiFi and so can keep drive strengths low to | ||
34 | * reduce EMI. | ||
35 | */ | ||
36 | dwmmc3@12230000 { | ||
37 | slot@0 { | ||
38 | gpios = <&gpc4 0 2 0 0>, <&gpc4 1 2 3 0>, | ||
39 | <&gpc4 3 2 3 0>, <&gpc4 4 2 3 0>, | ||
40 | <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>; | ||
41 | }; | ||
42 | }; | ||
43 | }; | ||
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index dddfd6e444dc..36d8246ea50e 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi | |||
@@ -31,6 +31,10 @@ | |||
31 | gsc1 = &gsc_1; | 31 | gsc1 = &gsc_1; |
32 | gsc2 = &gsc_2; | 32 | gsc2 = &gsc_2; |
33 | gsc3 = &gsc_3; | 33 | gsc3 = &gsc_3; |
34 | mshc0 = &dwmmc_0; | ||
35 | mshc1 = &dwmmc_1; | ||
36 | mshc2 = &dwmmc_2; | ||
37 | mshc3 = &dwmmc_3; | ||
34 | }; | 38 | }; |
35 | 39 | ||
36 | gic:interrupt-controller@10481000 { | 40 | gic:interrupt-controller@10481000 { |
@@ -62,12 +66,24 @@ | |||
62 | interrupts = <0 42 0>; | 66 | interrupts = <0 42 0>; |
63 | }; | 67 | }; |
64 | 68 | ||
69 | codec@11000000 { | ||
70 | compatible = "samsung,mfc-v6"; | ||
71 | reg = <0x11000000 0x10000>; | ||
72 | interrupts = <0 96 0>; | ||
73 | }; | ||
74 | |||
65 | rtc { | 75 | rtc { |
66 | compatible = "samsung,s3c6410-rtc"; | 76 | compatible = "samsung,s3c6410-rtc"; |
67 | reg = <0x101E0000 0x100>; | 77 | reg = <0x101E0000 0x100>; |
68 | interrupts = <0 43 0>, <0 44 0>; | 78 | interrupts = <0 43 0>, <0 44 0>; |
69 | }; | 79 | }; |
70 | 80 | ||
81 | tmu@10060000 { | ||
82 | compatible = "samsung,exynos5250-tmu"; | ||
83 | reg = <0x10060000 0x100>; | ||
84 | interrupts = <0 65 0>; | ||
85 | }; | ||
86 | |||
71 | serial@12C00000 { | 87 | serial@12C00000 { |
72 | compatible = "samsung,exynos4210-uart"; | 88 | compatible = "samsung,exynos4210-uart"; |
73 | reg = <0x12C00000 0x100>; | 89 | reg = <0x12C00000 0x100>; |
@@ -92,6 +108,17 @@ | |||
92 | interrupts = <0 54 0>; | 108 | interrupts = <0 54 0>; |
93 | }; | 109 | }; |
94 | 110 | ||
111 | sata@122F0000 { | ||
112 | compatible = "samsung,exynos5-sata-ahci"; | ||
113 | reg = <0x122F0000 0x1ff>; | ||
114 | interrupts = <0 115 0>; | ||
115 | }; | ||
116 | |||
117 | sata-phy@12170000 { | ||
118 | compatible = "samsung,exynos5-sata-phy"; | ||
119 | reg = <0x12170000 0x1ff>; | ||
120 | }; | ||
121 | |||
95 | i2c@12C60000 { | 122 | i2c@12C60000 { |
96 | compatible = "samsung,s3c2440-i2c"; | 123 | compatible = "samsung,s3c2440-i2c"; |
97 | reg = <0x12C60000 0x100>; | 124 | reg = <0x12C60000 0x100>; |
@@ -156,6 +183,21 @@ | |||
156 | #size-cells = <0>; | 183 | #size-cells = <0>; |
157 | }; | 184 | }; |
158 | 185 | ||
186 | i2c@12CE0000 { | ||
187 | compatible = "samsung,s3c2440-hdmiphy-i2c"; | ||
188 | reg = <0x12CE0000 0x1000>; | ||
189 | interrupts = <0 64 0>; | ||
190 | #address-cells = <1>; | ||
191 | #size-cells = <0>; | ||
192 | }; | ||
193 | |||
194 | i2c@121D0000 { | ||
195 | compatible = "samsung,exynos5-sata-phy-i2c"; | ||
196 | reg = <0x121D0000 0x100>; | ||
197 | #address-cells = <1>; | ||
198 | #size-cells = <0>; | ||
199 | }; | ||
200 | |||
159 | spi_0: spi@12d20000 { | 201 | spi_0: spi@12d20000 { |
160 | compatible = "samsung,exynos4210-spi"; | 202 | compatible = "samsung,exynos4210-spi"; |
161 | reg = <0x12d20000 0x100>; | 203 | reg = <0x12d20000 0x100>; |
@@ -186,7 +228,7 @@ | |||
186 | #size-cells = <0>; | 228 | #size-cells = <0>; |
187 | }; | 229 | }; |
188 | 230 | ||
189 | dwmmc0@12200000 { | 231 | dwmmc_0: dwmmc0@12200000 { |
190 | compatible = "samsung,exynos5250-dw-mshc"; | 232 | compatible = "samsung,exynos5250-dw-mshc"; |
191 | reg = <0x12200000 0x1000>; | 233 | reg = <0x12200000 0x1000>; |
192 | interrupts = <0 75 0>; | 234 | interrupts = <0 75 0>; |
@@ -194,7 +236,7 @@ | |||
194 | #size-cells = <0>; | 236 | #size-cells = <0>; |
195 | }; | 237 | }; |
196 | 238 | ||
197 | dwmmc1@12210000 { | 239 | dwmmc_1: dwmmc1@12210000 { |
198 | compatible = "samsung,exynos5250-dw-mshc"; | 240 | compatible = "samsung,exynos5250-dw-mshc"; |
199 | reg = <0x12210000 0x1000>; | 241 | reg = <0x12210000 0x1000>; |
200 | interrupts = <0 76 0>; | 242 | interrupts = <0 76 0>; |
@@ -202,7 +244,7 @@ | |||
202 | #size-cells = <0>; | 244 | #size-cells = <0>; |
203 | }; | 245 | }; |
204 | 246 | ||
205 | dwmmc2@12220000 { | 247 | dwmmc_2: dwmmc2@12220000 { |
206 | compatible = "samsung,exynos5250-dw-mshc"; | 248 | compatible = "samsung,exynos5250-dw-mshc"; |
207 | reg = <0x12220000 0x1000>; | 249 | reg = <0x12220000 0x1000>; |
208 | interrupts = <0 77 0>; | 250 | interrupts = <0 77 0>; |
@@ -210,7 +252,7 @@ | |||
210 | #size-cells = <0>; | 252 | #size-cells = <0>; |
211 | }; | 253 | }; |
212 | 254 | ||
213 | dwmmc3@12230000 { | 255 | dwmmc_3: dwmmc3@12230000 { |
214 | compatible = "samsung,exynos5250-dw-mshc"; | 256 | compatible = "samsung,exynos5250-dw-mshc"; |
215 | reg = <0x12230000 0x1000>; | 257 | reg = <0x12230000 0x1000>; |
216 | interrupts = <0 78 0>; | 258 | interrupts = <0 78 0>; |
@@ -520,4 +562,16 @@ | |||
520 | reg = <0x13e30000 0x1000>; | 562 | reg = <0x13e30000 0x1000>; |
521 | interrupts = <0 88 0>; | 563 | interrupts = <0 88 0>; |
522 | }; | 564 | }; |
565 | |||
566 | hdmi { | ||
567 | compatible = "samsung,exynos5-hdmi"; | ||
568 | reg = <0x14530000 0x100000>; | ||
569 | interrupts = <0 95 0>; | ||
570 | }; | ||
571 | |||
572 | mixer { | ||
573 | compatible = "samsung,exynos5-mixer"; | ||
574 | reg = <0x14450000 0x10000>; | ||
575 | interrupts = <0 94 0>; | ||
576 | }; | ||
523 | }; | 577 | }; |
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi new file mode 100644 index 000000000000..592fb9dc35bd --- /dev/null +++ b/arch/arm/boot/dts/href.dtsi | |||
@@ -0,0 +1,273 @@ | |||
1 | /* | ||
2 | * Copyright 2012 ST-Ericsson AB | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /include/ "dbx5x0.dtsi" | ||
13 | |||
14 | / { | ||
15 | memory { | ||
16 | reg = <0x00000000 0x20000000>; | ||
17 | }; | ||
18 | |||
19 | gpio_keys { | ||
20 | compatible = "gpio-keys"; | ||
21 | #address-cells = <1>; | ||
22 | #size-cells = <0>; | ||
23 | |||
24 | button@1 { | ||
25 | linux,code = <11>; | ||
26 | label = "SFH7741 Proximity Sensor"; | ||
27 | }; | ||
28 | }; | ||
29 | |||
30 | soc-u9500 { | ||
31 | uart@80120000 { | ||
32 | status = "okay"; | ||
33 | }; | ||
34 | |||
35 | uart@80121000 { | ||
36 | status = "okay"; | ||
37 | }; | ||
38 | |||
39 | uart@80007000 { | ||
40 | status = "okay"; | ||
41 | }; | ||
42 | |||
43 | i2c@80004000 { | ||
44 | tc3589x@42 { | ||
45 | compatible = "tc3589x"; | ||
46 | reg = <0x42>; | ||
47 | interrupt-parent = <&gpio6>; | ||
48 | interrupts = <25 0x1>; | ||
49 | |||
50 | interrupt-controller; | ||
51 | #interrupt-cells = <2>; | ||
52 | |||
53 | tc3589x_gpio: tc3589x_gpio { | ||
54 | compatible = "tc3589x-gpio"; | ||
55 | interrupts = <0 0x1>; | ||
56 | |||
57 | interrupt-controller; | ||
58 | #interrupt-cells = <2>; | ||
59 | gpio-controller; | ||
60 | #gpio-cells = <2>; | ||
61 | }; | ||
62 | }; | ||
63 | }; | ||
64 | |||
65 | i2c@80128000 { | ||
66 | lp5521@0x33 { | ||
67 | compatible = "lp5521"; | ||
68 | reg = <0x33>; | ||
69 | }; | ||
70 | |||
71 | lp5521@0x34 { | ||
72 | compatible = "lp5521"; | ||
73 | reg = <0x34>; | ||
74 | }; | ||
75 | |||
76 | bh1780@0x29 { | ||
77 | compatible = "rohm,bh1780gli"; | ||
78 | reg = <0x33>; | ||
79 | }; | ||
80 | }; | ||
81 | |||
82 | // External Micro SD slot | ||
83 | sdi0_per1@80126000 { | ||
84 | arm,primecell-periphid = <0x10480180>; | ||
85 | max-frequency = <50000000>; | ||
86 | bus-width = <4>; | ||
87 | mmc-cap-sd-highspeed; | ||
88 | mmc-cap-mmc-highspeed; | ||
89 | vmmc-supply = <&ab8500_ldo_aux3_reg>; | ||
90 | |||
91 | cd-gpios = <&tc3589x_gpio 3 0x4>; | ||
92 | |||
93 | status = "okay"; | ||
94 | }; | ||
95 | |||
96 | // WLAN SDIO channel | ||
97 | sdi1_per2@80118000 { | ||
98 | arm,primecell-periphid = <0x10480180>; | ||
99 | max-frequency = <50000000>; | ||
100 | bus-width = <4>; | ||
101 | |||
102 | status = "okay"; | ||
103 | }; | ||
104 | |||
105 | // PoP:ed eMMC | ||
106 | sdi2_per3@80005000 { | ||
107 | arm,primecell-periphid = <0x10480180>; | ||
108 | max-frequency = <50000000>; | ||
109 | bus-width = <8>; | ||
110 | mmc-cap-mmc-highspeed; | ||
111 | |||
112 | status = "okay"; | ||
113 | }; | ||
114 | |||
115 | // On-board eMMC | ||
116 | sdi4_per2@80114000 { | ||
117 | arm,primecell-periphid = <0x10480180>; | ||
118 | max-frequency = <50000000>; | ||
119 | bus-width = <8>; | ||
120 | mmc-cap-mmc-highspeed; | ||
121 | vmmc-supply = <&ab8500_ldo_aux2_reg>; | ||
122 | |||
123 | status = "okay"; | ||
124 | }; | ||
125 | |||
126 | sound { | ||
127 | compatible = "stericsson,snd-soc-mop500"; | ||
128 | |||
129 | stericsson,cpu-dai = <&msp1 &msp3>; | ||
130 | stericsson,audio-codec = <&codec>; | ||
131 | }; | ||
132 | |||
133 | msp1: msp@80124000 { | ||
134 | status = "okay"; | ||
135 | }; | ||
136 | |||
137 | msp3: msp@80125000 { | ||
138 | status = "okay"; | ||
139 | }; | ||
140 | |||
141 | prcmu@80157000 { | ||
142 | db8500-prcmu-regulators { | ||
143 | db8500_vape_reg: db8500_vape { | ||
144 | regulator-name = "db8500-vape"; | ||
145 | }; | ||
146 | |||
147 | db8500_varm_reg: db8500_varm { | ||
148 | regulator-name = "db8500-varm"; | ||
149 | }; | ||
150 | |||
151 | db8500_vmodem_reg: db8500_vmodem { | ||
152 | regulator-name = "db8500-vmodem"; | ||
153 | }; | ||
154 | |||
155 | db8500_vpll_reg: db8500_vpll { | ||
156 | regulator-name = "db8500-vpll"; | ||
157 | }; | ||
158 | |||
159 | db8500_vsmps1_reg: db8500_vsmps1 { | ||
160 | regulator-name = "db8500-vsmps1"; | ||
161 | }; | ||
162 | |||
163 | db8500_vsmps2_reg: db8500_vsmps2 { | ||
164 | regulator-name = "db8500-vsmps2"; | ||
165 | }; | ||
166 | |||
167 | db8500_vsmps3_reg: db8500_vsmps3 { | ||
168 | regulator-name = "db8500-vsmps3"; | ||
169 | }; | ||
170 | |||
171 | db8500_vrf1_reg: db8500_vrf1 { | ||
172 | regulator-name = "db8500-vrf1"; | ||
173 | }; | ||
174 | |||
175 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { | ||
176 | regulator-name = "db8500-sva-mmdsp"; | ||
177 | }; | ||
178 | |||
179 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { | ||
180 | regulator-name = "db8500-sva-mmdsp-ret"; | ||
181 | }; | ||
182 | |||
183 | db8500_sva_pipe_reg: db8500_sva_pipe { | ||
184 | regulator-name = "db8500_sva_pipe"; | ||
185 | }; | ||
186 | |||
187 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { | ||
188 | regulator-name = "db8500_sia_mmdsp"; | ||
189 | }; | ||
190 | |||
191 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { | ||
192 | regulator-name = "db8500-sia-mmdsp-ret"; | ||
193 | }; | ||
194 | |||
195 | db8500_sia_pipe_reg: db8500_sia_pipe { | ||
196 | regulator-name = "db8500-sia-pipe"; | ||
197 | }; | ||
198 | |||
199 | db8500_sga_reg: db8500_sga { | ||
200 | regulator-name = "db8500-sga"; | ||
201 | }; | ||
202 | |||
203 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { | ||
204 | regulator-name = "db8500-b2r2-mcde"; | ||
205 | }; | ||
206 | |||
207 | db8500_esram12_reg: db8500_esram12 { | ||
208 | regulator-name = "db8500-esram12"; | ||
209 | }; | ||
210 | |||
211 | db8500_esram12_ret_reg: db8500_esram12_ret { | ||
212 | regulator-name = "db8500-esram12-ret"; | ||
213 | }; | ||
214 | |||
215 | db8500_esram34_reg: db8500_esram34 { | ||
216 | regulator-name = "db8500-esram34"; | ||
217 | }; | ||
218 | |||
219 | db8500_esram34_ret_reg: db8500_esram34_ret { | ||
220 | regulator-name = "db8500-esram34-ret"; | ||
221 | }; | ||
222 | }; | ||
223 | |||
224 | ab8500@5 { | ||
225 | ab8500-regulators { | ||
226 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | ||
227 | regulator-name = "V-DISPLAY"; | ||
228 | }; | ||
229 | |||
230 | ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { | ||
231 | regulator-name = "V-eMMC1"; | ||
232 | }; | ||
233 | |||
234 | ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { | ||
235 | regulator-name = "V-MMC-SD"; | ||
236 | }; | ||
237 | |||
238 | ab8500_ldo_initcore_reg: ab8500_ldo_initcore { | ||
239 | regulator-name = "V-INTCORE"; | ||
240 | }; | ||
241 | |||
242 | ab8500_ldo_tvout_reg: ab8500_ldo_tvout { | ||
243 | regulator-name = "V-TVOUT"; | ||
244 | }; | ||
245 | |||
246 | ab8500_ldo_usb_reg: ab8500_ldo_usb { | ||
247 | regulator-name = "dummy"; | ||
248 | }; | ||
249 | |||
250 | ab8500_ldo_audio_reg: ab8500_ldo_audio { | ||
251 | regulator-name = "V-AUD"; | ||
252 | }; | ||
253 | |||
254 | ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { | ||
255 | regulator-name = "V-AMIC1"; | ||
256 | }; | ||
257 | |||
258 | ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { | ||
259 | regulator-name = "V-AMIC2"; | ||
260 | }; | ||
261 | |||
262 | ab8500_ldo_dmic_reg: ab8500_ldo_dmic { | ||
263 | regulator-name = "V-DMIC"; | ||
264 | }; | ||
265 | |||
266 | ab8500_ldo_ana_reg: ab8500_ldo_ana { | ||
267 | regulator-name = "V-CSI/DSI"; | ||
268 | }; | ||
269 | }; | ||
270 | }; | ||
271 | }; | ||
272 | }; | ||
273 | }; | ||
diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts new file mode 100644 index 000000000000..eec29c4a86dc --- /dev/null +++ b/arch/arm/boot/dts/hrefprev60.dts | |||
@@ -0,0 +1,48 @@ | |||
1 | /* | ||
2 | * Copyright 2012 ST-Ericsson AB | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "dbx5x0.dtsi" | ||
14 | /include/ "href.dtsi" | ||
15 | /include/ "stuib.dtsi" | ||
16 | |||
17 | / { | ||
18 | model = "ST-Ericsson HREF (pre-v60) platform with Device Tree"; | ||
19 | compatible = "st-ericsson,mop500", "st-ericsson,u8500"; | ||
20 | |||
21 | gpio_keys { | ||
22 | button@1 { | ||
23 | gpios = <&tc3589x_gpio 7 0x4>; | ||
24 | }; | ||
25 | }; | ||
26 | |||
27 | soc-u9500 { | ||
28 | i2c@80004000 { | ||
29 | tps61052@33 { | ||
30 | compatible = "tps61052"; | ||
31 | reg = <0x33>; | ||
32 | }; | ||
33 | }; | ||
34 | |||
35 | i2c@80110000 { | ||
36 | bu21013_tp@0x5c { | ||
37 | reset-gpio = <&tc3589x_gpio 13 0x4>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | vmmci: regulator-gpio { | ||
42 | gpios = <&tc3589x_gpio 18 0x4>; | ||
43 | gpio-enable = <&tc3589x_gpio 17 0x4>; | ||
44 | |||
45 | status = "okay"; | ||
46 | }; | ||
47 | }; | ||
48 | }; | ||
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts index 2131d77dc9c9..55f4191a626e 100644 --- a/arch/arm/boot/dts/hrefv60plus.dts +++ b/arch/arm/boot/dts/hrefv60plus.dts | |||
@@ -11,85 +11,200 @@ | |||
11 | 11 | ||
12 | /dts-v1/; | 12 | /dts-v1/; |
13 | /include/ "dbx5x0.dtsi" | 13 | /include/ "dbx5x0.dtsi" |
14 | /include/ "href.dtsi" | ||
15 | /include/ "stuib.dtsi" | ||
14 | 16 | ||
15 | / { | 17 | / { |
16 | model = "ST-Ericsson HREF platform with Device Tree"; | 18 | model = "ST-Ericsson HREF (v60+) platform with Device Tree"; |
17 | compatible = "st-ericsson,hrefv60+"; | 19 | compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; |
18 | 20 | ||
19 | memory { | 21 | gpio_keys { |
20 | reg = <0x00000000 0x20000000>; | 22 | button@1 { |
23 | gpios = <&gpio6 25 0x4>; | ||
24 | }; | ||
21 | }; | 25 | }; |
22 | 26 | ||
23 | soc-u9500 { | 27 | soc-u9500 { |
24 | uart@80120000 { | 28 | i2c@80110000 { |
29 | bu21013_tp@0x5c { | ||
30 | reset-gpio = <&gpio4 15 0x4>; | ||
31 | }; | ||
32 | }; | ||
33 | |||
34 | // External Micro SD slot | ||
35 | sdi0_per1@80126000 { | ||
36 | arm,primecell-periphid = <0x10480180>; | ||
37 | max-frequency = <50000000>; | ||
38 | bus-width = <4>; | ||
39 | mmc-cap-sd-highspeed; | ||
40 | mmc-cap-mmc-highspeed; | ||
41 | vmmc-supply = <&ab8500_ldo_aux3_reg>; | ||
42 | |||
43 | cd-gpios = <&tc3589x_gpio 3 0x4>; | ||
44 | |||
25 | status = "okay"; | 45 | status = "okay"; |
26 | }; | 46 | }; |
27 | 47 | ||
28 | uart@80121000 { | 48 | // WLAN SDIO channel |
49 | sdi1_per2@80118000 { | ||
50 | arm,primecell-periphid = <0x10480180>; | ||
51 | max-frequency = <50000000>; | ||
52 | bus-width = <4>; | ||
53 | |||
29 | status = "okay"; | 54 | status = "okay"; |
30 | }; | 55 | }; |
31 | 56 | ||
32 | uart@80007000 { | 57 | // PoP:ed eMMC |
58 | sdi2_per3@80005000 { | ||
59 | arm,primecell-periphid = <0x10480180>; | ||
60 | max-frequency = <50000000>; | ||
61 | bus-width = <8>; | ||
62 | mmc-cap-mmc-highspeed; | ||
63 | |||
33 | status = "okay"; | 64 | status = "okay"; |
34 | }; | 65 | }; |
35 | 66 | ||
36 | i2c@80004000 { | 67 | // On-board eMMC |
37 | tc3589x@42 { | 68 | sdi4_per2@80114000 { |
38 | compatible = "tc3589x"; | 69 | arm,primecell-periphid = <0x10480180>; |
39 | reg = <0x42>; | 70 | max-frequency = <50000000>; |
40 | interrupt-parent = <&gpio6>; | 71 | bus-width = <8>; |
41 | interrupts = <25 0x1>; | 72 | mmc-cap-mmc-highspeed; |
73 | vmmc-supply = <&ab8500_ldo_aux2_reg>; | ||
42 | 74 | ||
43 | interrupt-controller; | 75 | status = "okay"; |
44 | #interrupt-cells = <2>; | 76 | }; |
45 | 77 | ||
46 | tc3589x_gpio: tc3589x_gpio { | 78 | prcmu@80157000 { |
47 | compatible = "tc3589x-gpio"; | 79 | db8500-prcmu-regulators { |
48 | interrupts = <0 0x1>; | 80 | db8500_vape_reg: db8500_vape { |
81 | regulator-name = "db8500-vape"; | ||
82 | }; | ||
49 | 83 | ||
50 | interrupt-controller; | 84 | db8500_varm_reg: db8500_varm { |
51 | #interrupt-cells = <2>; | 85 | regulator-name = "db8500-varm"; |
52 | gpio-controller; | ||
53 | #gpio-cells = <2>; | ||
54 | }; | 86 | }; |
55 | }; | ||
56 | 87 | ||
57 | tps61052@33 { | 88 | db8500_vmodem_reg: db8500_vmodem { |
58 | compatible = "tps61052"; | 89 | regulator-name = "db8500-vmodem"; |
59 | reg = <0x33>; | 90 | }; |
60 | }; | ||
61 | }; | ||
62 | 91 | ||
63 | i2c@80128000 { | 92 | db8500_vpll_reg: db8500_vpll { |
64 | lp5521@0x33 { | 93 | regulator-name = "db8500-vpll"; |
65 | compatible = "lp5521"; | 94 | }; |
66 | reg = <0x33>; | ||
67 | }; | ||
68 | 95 | ||
69 | lp5521@0x34 { | 96 | db8500_vsmps1_reg: db8500_vsmps1 { |
70 | compatible = "lp5521"; | 97 | regulator-name = "db8500-vsmps1"; |
71 | reg = <0x34>; | 98 | }; |
72 | }; | 99 | |
100 | db8500_vsmps2_reg: db8500_vsmps2 { | ||
101 | regulator-name = "db8500-vsmps2"; | ||
102 | }; | ||
103 | |||
104 | db8500_vsmps3_reg: db8500_vsmps3 { | ||
105 | regulator-name = "db8500-vsmps3"; | ||
106 | }; | ||
107 | |||
108 | db8500_vrf1_reg: db8500_vrf1 { | ||
109 | regulator-name = "db8500-vrf1"; | ||
110 | }; | ||
111 | |||
112 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { | ||
113 | regulator-name = "db8500-sva-mmdsp"; | ||
114 | }; | ||
115 | |||
116 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { | ||
117 | regulator-name = "db8500-sva-mmdsp-ret"; | ||
118 | }; | ||
119 | |||
120 | db8500_sva_pipe_reg: db8500_sva_pipe { | ||
121 | regulator-name = "db8500_sva_pipe"; | ||
122 | }; | ||
73 | 123 | ||
74 | bh1780@0x29 { | 124 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { |
75 | compatible = "rohm,bh1780gli"; | 125 | regulator-name = "db8500_sia_mmdsp"; |
76 | reg = <0x33>; | 126 | }; |
127 | |||
128 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { | ||
129 | regulator-name = "db8500-sia-mmdsp-ret"; | ||
130 | }; | ||
131 | |||
132 | db8500_sia_pipe_reg: db8500_sia_pipe { | ||
133 | regulator-name = "db8500-sia-pipe"; | ||
134 | }; | ||
135 | |||
136 | db8500_sga_reg: db8500_sga { | ||
137 | regulator-name = "db8500-sga"; | ||
138 | }; | ||
139 | |||
140 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { | ||
141 | regulator-name = "db8500-b2r2-mcde"; | ||
142 | }; | ||
143 | |||
144 | db8500_esram12_reg: db8500_esram12 { | ||
145 | regulator-name = "db8500-esram12"; | ||
146 | }; | ||
147 | |||
148 | db8500_esram12_ret_reg: db8500_esram12_ret { | ||
149 | regulator-name = "db8500-esram12-ret"; | ||
150 | }; | ||
151 | |||
152 | db8500_esram34_reg: db8500_esram34 { | ||
153 | regulator-name = "db8500-esram34"; | ||
154 | }; | ||
155 | |||
156 | db8500_esram34_ret_reg: db8500_esram34_ret { | ||
157 | regulator-name = "db8500-esram34-ret"; | ||
158 | }; | ||
77 | }; | 159 | }; |
78 | }; | ||
79 | 160 | ||
80 | sound { | 161 | ab8500@5 { |
81 | compatible = "stericsson,snd-soc-mop500"; | 162 | ab8500-regulators { |
163 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | ||
164 | regulator-name = "V-DISPLAY"; | ||
165 | }; | ||
82 | 166 | ||
83 | stericsson,cpu-dai = <&msp1 &msp3>; | 167 | ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { |
84 | stericsson,audio-codec = <&codec>; | 168 | regulator-name = "V-eMMC1"; |
85 | }; | 169 | }; |
86 | 170 | ||
87 | msp1: msp@80124000 { | 171 | ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { |
88 | status = "okay"; | 172 | regulator-name = "V-MMC-SD"; |
89 | }; | 173 | }; |
90 | 174 | ||
91 | msp3: msp@80125000 { | 175 | ab8500_ldo_initcore_reg: ab8500_ldo_initcore { |
92 | status = "okay"; | 176 | regulator-name = "V-INTCORE"; |
177 | }; | ||
178 | |||
179 | ab8500_ldo_tvout_reg: ab8500_ldo_tvout { | ||
180 | regulator-name = "V-TVOUT"; | ||
181 | }; | ||
182 | |||
183 | ab8500_ldo_usb_reg: ab8500_ldo_usb { | ||
184 | regulator-name = "dummy"; | ||
185 | }; | ||
186 | |||
187 | ab8500_ldo_audio_reg: ab8500_ldo_audio { | ||
188 | regulator-name = "V-AUD"; | ||
189 | }; | ||
190 | |||
191 | ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { | ||
192 | regulator-name = "V-AMIC1"; | ||
193 | }; | ||
194 | |||
195 | ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { | ||
196 | regulator-name = "V-AMIC2"; | ||
197 | }; | ||
198 | |||
199 | ab8500_ldo_dmic_reg: ab8500_ldo_dmic { | ||
200 | regulator-name = "V-DMIC"; | ||
201 | }; | ||
202 | |||
203 | ab8500_ldo_ana_reg: ab8500_ldo_ana { | ||
204 | regulator-name = "V-CSI/DSI"; | ||
205 | }; | ||
206 | }; | ||
207 | }; | ||
93 | }; | 208 | }; |
94 | }; | 209 | }; |
95 | }; | 210 | }; |
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 384d8b66f337..7c43b8e70b9f 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts | |||
@@ -40,6 +40,15 @@ | |||
40 | reg = <0>; | 40 | reg = <0>; |
41 | fsl,pinmux-ids = < | 41 | fsl,pinmux-ids = < |
42 | 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ | 42 | 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ |
43 | >; | ||
44 | fsl,drive-strength = <0>; | ||
45 | fsl,voltage = <1>; | ||
46 | fsl,pull-up = <0>; | ||
47 | }; | ||
48 | |||
49 | led_pin_gpio0_17: led_gpio0_17@0 { | ||
50 | reg = <0>; | ||
51 | fsl,pinmux-ids = < | ||
43 | 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ | 52 | 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ |
44 | >; | 53 | >; |
45 | fsl,drive-strength = <0>; | 54 | fsl,drive-strength = <0>; |
@@ -47,6 +56,15 @@ | |||
47 | fsl,pull-up = <0>; | 56 | fsl,pull-up = <0>; |
48 | }; | 57 | }; |
49 | }; | 58 | }; |
59 | |||
60 | ssp1: ssp@80034000 { | ||
61 | #address-cells = <1>; | ||
62 | #size-cells = <0>; | ||
63 | compatible = "fsl,imx23-spi"; | ||
64 | pinctrl-names = "default"; | ||
65 | pinctrl-0 = <&spi2_pins_a>; | ||
66 | status = "okay"; | ||
67 | }; | ||
50 | }; | 68 | }; |
51 | 69 | ||
52 | apbx@80040000 { | 70 | apbx@80040000 { |
@@ -91,11 +109,12 @@ | |||
91 | 109 | ||
92 | leds { | 110 | leds { |
93 | compatible = "gpio-leds"; | 111 | compatible = "gpio-leds"; |
112 | pinctrl-names = "default"; | ||
113 | pinctrl-0 = <&led_pin_gpio0_17>; | ||
94 | 114 | ||
95 | user { | 115 | user { |
96 | label = "green"; | 116 | label = "green"; |
97 | gpios = <&gpio2 1 0>; | 117 | gpios = <&gpio2 1 1>; |
98 | linux,default-trigger = "default-on"; | ||
99 | }; | 118 | }; |
100 | }; | 119 | }; |
101 | }; | 120 | }; |
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 6d31aa383460..65415c598a5e 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi | |||
@@ -279,6 +279,19 @@ | |||
279 | fsl,voltage = <1>; | 279 | fsl,voltage = <1>; |
280 | fsl,pull-up = <0>; | 280 | fsl,pull-up = <0>; |
281 | }; | 281 | }; |
282 | |||
283 | spi2_pins_a: spi2@0 { | ||
284 | reg = <0>; | ||
285 | fsl,pinmux-ids = < | ||
286 | 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */ | ||
287 | 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */ | ||
288 | 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */ | ||
289 | 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */ | ||
290 | >; | ||
291 | fsl,drive-strength = <1>; | ||
292 | fsl,voltage = <1>; | ||
293 | fsl,pull-up = <1>; | ||
294 | }; | ||
282 | }; | 295 | }; |
283 | 296 | ||
284 | digctl@8001c000 { | 297 | digctl@8001c000 { |
diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts new file mode 100644 index 000000000000..d81f8a0b9794 --- /dev/null +++ b/arch/arm/boot/dts/imx25-karo-tx25.dts | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Sascha Hauer, Pengutronix | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "imx25.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "Ka-Ro TX25"; | ||
17 | compatible = "karo,imx25-tx25", "fsl,imx25"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x80000000 0x02000000 0x90000000 0x02000000>; | ||
21 | }; | ||
22 | |||
23 | soc { | ||
24 | aips@43f00000 { | ||
25 | uart1: serial@43f90000 { | ||
26 | status = "okay"; | ||
27 | }; | ||
28 | }; | ||
29 | |||
30 | spba@50000000 { | ||
31 | fec: ethernet@50038000 { | ||
32 | status = "okay"; | ||
33 | phy-mode = "rmii"; | ||
34 | }; | ||
35 | }; | ||
36 | |||
37 | emi@80000000 { | ||
38 | nand@bb000000 { | ||
39 | nand-on-flash-bbt; | ||
40 | status = "okay"; | ||
41 | }; | ||
42 | }; | ||
43 | }; | ||
44 | }; | ||
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi new file mode 100644 index 000000000000..e1b13ebc96d6 --- /dev/null +++ b/arch/arm/boot/dts/imx25.dtsi | |||
@@ -0,0 +1,515 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /include/ "skeleton.dtsi" | ||
13 | |||
14 | / { | ||
15 | aliases { | ||
16 | serial0 = &uart1; | ||
17 | serial1 = &uart2; | ||
18 | serial2 = &uart3; | ||
19 | serial3 = &uart4; | ||
20 | serial4 = &uart5; | ||
21 | gpio0 = &gpio1; | ||
22 | gpio1 = &gpio2; | ||
23 | gpio2 = &gpio3; | ||
24 | gpio3 = &gpio4; | ||
25 | usb0 = &usbotg; | ||
26 | usb1 = &usbhost1; | ||
27 | }; | ||
28 | |||
29 | asic: asic-interrupt-controller@68000000 { | ||
30 | compatible = "fsl,imx25-asic", "fsl,avic"; | ||
31 | interrupt-controller; | ||
32 | #interrupt-cells = <1>; | ||
33 | reg = <0x68000000 0x8000000>; | ||
34 | }; | ||
35 | |||
36 | clocks { | ||
37 | #address-cells = <1>; | ||
38 | #size-cells = <0>; | ||
39 | |||
40 | osc { | ||
41 | compatible = "fsl,imx-osc", "fixed-clock"; | ||
42 | clock-frequency = <24000000>; | ||
43 | }; | ||
44 | }; | ||
45 | |||
46 | soc { | ||
47 | #address-cells = <1>; | ||
48 | #size-cells = <1>; | ||
49 | compatible = "simple-bus"; | ||
50 | interrupt-parent = <&asic>; | ||
51 | ranges; | ||
52 | |||
53 | aips@43f00000 { /* AIPS1 */ | ||
54 | compatible = "fsl,aips-bus", "simple-bus"; | ||
55 | #address-cells = <1>; | ||
56 | #size-cells = <1>; | ||
57 | reg = <0x43f00000 0x100000>; | ||
58 | ranges; | ||
59 | |||
60 | i2c1: i2c@43f80000 { | ||
61 | #address-cells = <1>; | ||
62 | #size-cells = <0>; | ||
63 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | ||
64 | reg = <0x43f80000 0x4000>; | ||
65 | clocks = <&clks 48>; | ||
66 | clock-names = ""; | ||
67 | interrupts = <3>; | ||
68 | status = "disabled"; | ||
69 | }; | ||
70 | |||
71 | i2c3: i2c@43f84000 { | ||
72 | #address-cells = <1>; | ||
73 | #size-cells = <0>; | ||
74 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | ||
75 | reg = <0x43f84000 0x4000>; | ||
76 | clocks = <&clks 48>; | ||
77 | clock-names = ""; | ||
78 | interrupts = <10>; | ||
79 | status = "disabled"; | ||
80 | }; | ||
81 | |||
82 | can1: can@43f88000 { | ||
83 | compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; | ||
84 | reg = <0x43f88000 0x4000>; | ||
85 | interrupts = <43>; | ||
86 | clocks = <&clks 75>, <&clks 75>; | ||
87 | clock-names = "ipg", "per"; | ||
88 | status = "disabled"; | ||
89 | }; | ||
90 | |||
91 | can2: can@43f8c000 { | ||
92 | compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; | ||
93 | reg = <0x43f8c000 0x4000>; | ||
94 | interrupts = <44>; | ||
95 | clocks = <&clks 76>, <&clks 76>; | ||
96 | clock-names = "ipg", "per"; | ||
97 | status = "disabled"; | ||
98 | }; | ||
99 | |||
100 | uart1: serial@43f90000 { | ||
101 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | ||
102 | reg = <0x43f90000 0x4000>; | ||
103 | interrupts = <45>; | ||
104 | clocks = <&clks 120>, <&clks 57>; | ||
105 | clock-names = "ipg", "per"; | ||
106 | status = "disabled"; | ||
107 | }; | ||
108 | |||
109 | uart2: serial@43f94000 { | ||
110 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | ||
111 | reg = <0x43f94000 0x4000>; | ||
112 | interrupts = <32>; | ||
113 | clocks = <&clks 121>, <&clks 57>; | ||
114 | clock-names = "ipg", "per"; | ||
115 | status = "disabled"; | ||
116 | }; | ||
117 | |||
118 | i2c2: i2c@43f98000 { | ||
119 | #address-cells = <1>; | ||
120 | #size-cells = <0>; | ||
121 | compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; | ||
122 | reg = <0x43f98000 0x4000>; | ||
123 | clocks = <&clks 48>; | ||
124 | clock-names = ""; | ||
125 | interrupts = <4>; | ||
126 | status = "disabled"; | ||
127 | }; | ||
128 | |||
129 | owire@43f9c000 { | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <0>; | ||
132 | reg = <0x43f9c000 0x4000>; | ||
133 | clocks = <&clks 51>; | ||
134 | clock-names = ""; | ||
135 | interrupts = <2>; | ||
136 | status = "disabled"; | ||
137 | }; | ||
138 | |||
139 | spi1: cspi@43fa4000 { | ||
140 | #address-cells = <1>; | ||
141 | #size-cells = <0>; | ||
142 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | ||
143 | reg = <0x43fa4000 0x4000>; | ||
144 | clocks = <&clks 62>; | ||
145 | clock-names = "ipg"; | ||
146 | interrupts = <14>; | ||
147 | status = "disabled"; | ||
148 | }; | ||
149 | |||
150 | kpp@43fa8000 { | ||
151 | #address-cells = <1>; | ||
152 | #size-cells = <0>; | ||
153 | reg = <0x43fa8000 0x4000>; | ||
154 | clocks = <&clks 102>; | ||
155 | clock-names = ""; | ||
156 | interrupts = <24>; | ||
157 | status = "disabled"; | ||
158 | }; | ||
159 | |||
160 | iomuxc@43fac000{ | ||
161 | compatible = "fsl,imx25-iomuxc"; | ||
162 | reg = <0x43fac000 0x4000>; | ||
163 | }; | ||
164 | |||
165 | audmux@43fb0000 { | ||
166 | compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; | ||
167 | reg = <0x43fb0000 0x4000>; | ||
168 | status = "disabled"; | ||
169 | }; | ||
170 | }; | ||
171 | |||
172 | spba@50000000 { | ||
173 | compatible = "fsl,spba-bus", "simple-bus"; | ||
174 | #address-cells = <1>; | ||
175 | #size-cells = <1>; | ||
176 | reg = <0x50000000 0x40000>; | ||
177 | ranges; | ||
178 | |||
179 | spi3: cspi@50004000 { | ||
180 | #address-cells = <1>; | ||
181 | #size-cells = <0>; | ||
182 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | ||
183 | reg = <0x50004000 0x4000>; | ||
184 | interrupts = <0>; | ||
185 | clocks = <&clks 80>; | ||
186 | clock-names = "ipg"; | ||
187 | status = "disabled"; | ||
188 | }; | ||
189 | |||
190 | uart4: serial@50008000 { | ||
191 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | ||
192 | reg = <0x50008000 0x4000>; | ||
193 | interrupts = <5>; | ||
194 | clocks = <&clks 123>, <&clks 57>; | ||
195 | clock-names = "ipg", "per"; | ||
196 | status = "disabled"; | ||
197 | }; | ||
198 | |||
199 | uart3: serial@5000c000 { | ||
200 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | ||
201 | reg = <0x5000c000 0x4000>; | ||
202 | interrupts = <18>; | ||
203 | clocks = <&clks 122>, <&clks 57>; | ||
204 | clock-names = "ipg", "per"; | ||
205 | status = "disabled"; | ||
206 | }; | ||
207 | |||
208 | spi2: cspi@50010000 { | ||
209 | #address-cells = <1>; | ||
210 | #size-cells = <0>; | ||
211 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; | ||
212 | reg = <0x50010000 0x4000>; | ||
213 | clocks = <&clks 79>; | ||
214 | clock-names = "ipg"; | ||
215 | interrupts = <13>; | ||
216 | status = "disabled"; | ||
217 | }; | ||
218 | |||
219 | ssi2: ssi@50014000 { | ||
220 | compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; | ||
221 | reg = <0x50014000 0x4000>; | ||
222 | interrupts = <11>; | ||
223 | status = "disabled"; | ||
224 | }; | ||
225 | |||
226 | esai@50018000 { | ||
227 | reg = <0x50018000 0x4000>; | ||
228 | interrupts = <7>; | ||
229 | }; | ||
230 | |||
231 | uart5: serial@5002c000 { | ||
232 | compatible = "fsl,imx25-uart", "fsl,imx21-uart"; | ||
233 | reg = <0x5002c000 0x4000>; | ||
234 | interrupts = <40>; | ||
235 | clocks = <&clks 124>, <&clks 57>; | ||
236 | clock-names = "ipg", "per"; | ||
237 | status = "disabled"; | ||
238 | }; | ||
239 | |||
240 | tsc: tsc@50030000 { | ||
241 | compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; | ||
242 | reg = <0x50030000 0x4000>; | ||
243 | interrupts = <46>; | ||
244 | clocks = <&clks 119>; | ||
245 | clock-names = "ipg"; | ||
246 | status = "disabled"; | ||
247 | }; | ||
248 | |||
249 | ssi1: ssi@50034000 { | ||
250 | compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; | ||
251 | reg = <0x50034000 0x4000>; | ||
252 | interrupts = <12>; | ||
253 | status = "disabled"; | ||
254 | }; | ||
255 | |||
256 | fec: ethernet@50038000 { | ||
257 | compatible = "fsl,imx25-fec"; | ||
258 | reg = <0x50038000 0x4000>; | ||
259 | interrupts = <57>; | ||
260 | clocks = <&clks 88>, <&clks 65>; | ||
261 | clock-names = "ipg", "ahb"; | ||
262 | status = "disabled"; | ||
263 | }; | ||
264 | }; | ||
265 | |||
266 | aips@53f00000 { /* AIPS2 */ | ||
267 | compatible = "fsl,aips-bus", "simple-bus"; | ||
268 | #address-cells = <1>; | ||
269 | #size-cells = <1>; | ||
270 | reg = <0x53f00000 0x100000>; | ||
271 | ranges; | ||
272 | |||
273 | clks: ccm@53f80000 { | ||
274 | compatible = "fsl,imx25-ccm"; | ||
275 | reg = <0x53f80000 0x4000>; | ||
276 | interrupts = <31>; | ||
277 | #clock-cells = <1>; | ||
278 | }; | ||
279 | |||
280 | gpt4: timer@53f84000 { | ||
281 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | ||
282 | reg = <0x53f84000 0x4000>; | ||
283 | clocks = <&clks 9>, <&clks 45>; | ||
284 | clock-names = "ipg", "per"; | ||
285 | interrupts = <1>; | ||
286 | }; | ||
287 | |||
288 | gpt3: timer@53f88000 { | ||
289 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | ||
290 | reg = <0x53f88000 0x4000>; | ||
291 | clocks = <&clks 9>, <&clks 47>; | ||
292 | clock-names = "ipg", "per"; | ||
293 | interrupts = <29>; | ||
294 | }; | ||
295 | |||
296 | gpt2: timer@53f8c000 { | ||
297 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | ||
298 | reg = <0x53f8c000 0x4000>; | ||
299 | clocks = <&clks 9>, <&clks 47>; | ||
300 | clock-names = "ipg", "per"; | ||
301 | interrupts = <53>; | ||
302 | }; | ||
303 | |||
304 | gpt1: timer@53f90000 { | ||
305 | compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; | ||
306 | reg = <0x53f90000 0x4000>; | ||
307 | clocks = <&clks 9>, <&clks 47>; | ||
308 | clock-names = "ipg", "per"; | ||
309 | interrupts = <54>; | ||
310 | }; | ||
311 | |||
312 | epit1: timer@53f94000 { | ||
313 | compatible = "fsl,imx25-epit"; | ||
314 | reg = <0x53f94000 0x4000>; | ||
315 | interrupts = <28>; | ||
316 | }; | ||
317 | |||
318 | epit2: timer@53f98000 { | ||
319 | compatible = "fsl,imx25-epit"; | ||
320 | reg = <0x53f98000 0x4000>; | ||
321 | interrupts = <27>; | ||
322 | }; | ||
323 | |||
324 | gpio4: gpio@53f9c000 { | ||
325 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | ||
326 | reg = <0x53f9c000 0x4000>; | ||
327 | interrupts = <23>; | ||
328 | gpio-controller; | ||
329 | #gpio-cells = <2>; | ||
330 | interrupt-controller; | ||
331 | #interrupt-cells = <2>; | ||
332 | }; | ||
333 | |||
334 | pwm2: pwm@53fa0000 { | ||
335 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | ||
336 | #pwm-cells = <2>; | ||
337 | reg = <0x53fa0000 0x4000>; | ||
338 | clocks = <&clks 106>, <&clks 36>; | ||
339 | clock-names = "ipg", "per"; | ||
340 | interrupts = <36>; | ||
341 | }; | ||
342 | |||
343 | gpio3: gpio@53fa4000 { | ||
344 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | ||
345 | reg = <0x53fa4000 0x4000>; | ||
346 | interrupts = <16>; | ||
347 | gpio-controller; | ||
348 | #gpio-cells = <2>; | ||
349 | interrupt-controller; | ||
350 | #interrupt-cells = <2>; | ||
351 | }; | ||
352 | |||
353 | pwm3: pwm@53fa8000 { | ||
354 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | ||
355 | #pwm-cells = <2>; | ||
356 | reg = <0x53fa8000 0x4000>; | ||
357 | clocks = <&clks 107>, <&clks 36>; | ||
358 | clock-names = "ipg", "per"; | ||
359 | interrupts = <41>; | ||
360 | }; | ||
361 | |||
362 | esdhc1: esdhc@53fb4000 { | ||
363 | compatible = "fsl,imx25-esdhc"; | ||
364 | reg = <0x53fb4000 0x4000>; | ||
365 | interrupts = <9>; | ||
366 | clocks = <&clks 86>, <&clks 63>, <&clks 45>; | ||
367 | clock-names = "ipg", "ahb", "per"; | ||
368 | status = "disabled"; | ||
369 | }; | ||
370 | |||
371 | esdhc2: esdhc@53fb8000 { | ||
372 | compatible = "fsl,imx25-esdhc"; | ||
373 | reg = <0x53fb8000 0x4000>; | ||
374 | interrupts = <8>; | ||
375 | clocks = <&clks 87>, <&clks 64>, <&clks 46>; | ||
376 | clock-names = "ipg", "ahb", "per"; | ||
377 | status = "disabled"; | ||
378 | }; | ||
379 | |||
380 | lcdc@53fbc000 { | ||
381 | reg = <0x53fbc000 0x4000>; | ||
382 | interrupts = <39>; | ||
383 | clocks = <&clks 103>, <&clks 66>, <&clks 49>; | ||
384 | clock-names = "ipg", "ahb", "per"; | ||
385 | status = "disabled"; | ||
386 | }; | ||
387 | |||
388 | slcdc@53fc0000 { | ||
389 | reg = <0x53fc0000 0x4000>; | ||
390 | interrupts = <38>; | ||
391 | status = "disabled"; | ||
392 | }; | ||
393 | |||
394 | pwm4: pwm@53fc8000 { | ||
395 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | ||
396 | reg = <0x53fc8000 0x4000>; | ||
397 | clocks = <&clks 108>, <&clks 36>; | ||
398 | clock-names = "ipg", "per"; | ||
399 | interrupts = <42>; | ||
400 | }; | ||
401 | |||
402 | gpio1: gpio@53fcc000 { | ||
403 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | ||
404 | reg = <0x53fcc000 0x4000>; | ||
405 | interrupts = <52>; | ||
406 | gpio-controller; | ||
407 | #gpio-cells = <2>; | ||
408 | interrupt-controller; | ||
409 | #interrupt-cells = <2>; | ||
410 | }; | ||
411 | |||
412 | gpio2: gpio@53fd0000 { | ||
413 | compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; | ||
414 | reg = <0x53fd0000 0x4000>; | ||
415 | interrupts = <51>; | ||
416 | gpio-controller; | ||
417 | #gpio-cells = <2>; | ||
418 | interrupt-controller; | ||
419 | #interrupt-cells = <2>; | ||
420 | }; | ||
421 | |||
422 | sdma@53fd4000 { | ||
423 | compatible = "fsl,imx25-sdma", "fsl,imx35-sdma"; | ||
424 | reg = <0x53fd4000 0x4000>; | ||
425 | clocks = <&clks 112>, <&clks 68>; | ||
426 | clock-names = "ipg", "ahb"; | ||
427 | interrupts = <34>; | ||
428 | }; | ||
429 | |||
430 | wdog@53fdc000 { | ||
431 | compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; | ||
432 | reg = <0x53fdc000 0x4000>; | ||
433 | clocks = <&clks 126>; | ||
434 | clock-names = ""; | ||
435 | interrupts = <55>; | ||
436 | }; | ||
437 | |||
438 | pwm1: pwm@53fe0000 { | ||
439 | compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; | ||
440 | #pwm-cells = <2>; | ||
441 | reg = <0x53fe0000 0x4000>; | ||
442 | clocks = <&clks 105>, <&clks 36>; | ||
443 | clock-names = "ipg", "per"; | ||
444 | interrupts = <26>; | ||
445 | }; | ||
446 | |||
447 | usbphy1: usbphy@1 { | ||
448 | compatible = "nop-usbphy"; | ||
449 | status = "disabled"; | ||
450 | }; | ||
451 | |||
452 | usbphy2: usbphy@2 { | ||
453 | compatible = "nop-usbphy"; | ||
454 | status = "disabled"; | ||
455 | }; | ||
456 | |||
457 | usbotg: usb@53ff4000 { | ||
458 | compatible = "fsl,imx25-usb", "fsl,imx27-usb"; | ||
459 | reg = <0x53ff4000 0x0200>; | ||
460 | interrupts = <37>; | ||
461 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | ||
462 | clock-names = "ipg", "ahb", "per"; | ||
463 | fsl,usbmisc = <&usbmisc 0>; | ||
464 | status = "disabled"; | ||
465 | }; | ||
466 | |||
467 | usbhost1: usb@53ff4400 { | ||
468 | compatible = "fsl,imx25-usb", "fsl,imx27-usb"; | ||
469 | reg = <0x53ff4400 0x0200>; | ||
470 | interrupts = <35>; | ||
471 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | ||
472 | clock-names = "ipg", "ahb", "per"; | ||
473 | fsl,usbmisc = <&usbmisc 1>; | ||
474 | status = "disabled"; | ||
475 | }; | ||
476 | |||
477 | usbmisc: usbmisc@53ff4600 { | ||
478 | #index-cells = <1>; | ||
479 | compatible = "fsl,imx25-usbmisc"; | ||
480 | clocks = <&clks 9>, <&clks 70>, <&clks 8>; | ||
481 | clock-names = "ipg", "ahb", "per"; | ||
482 | reg = <0x53ff4600 0x00f>; | ||
483 | status = "disabled"; | ||
484 | }; | ||
485 | |||
486 | dryice@53ffc000 { | ||
487 | compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; | ||
488 | reg = <0x53ffc000 0x4000>; | ||
489 | clocks = <&clks 81>; | ||
490 | clock-names = "ipg"; | ||
491 | interrupts = <25>; | ||
492 | }; | ||
493 | }; | ||
494 | |||
495 | emi@80000000 { | ||
496 | compatible = "fsl,emi-bus", "simple-bus"; | ||
497 | #address-cells = <1>; | ||
498 | #size-cells = <1>; | ||
499 | reg = <0x80000000 0x3b002000>; | ||
500 | ranges; | ||
501 | |||
502 | nand@bb000000 { | ||
503 | #address-cells = <1>; | ||
504 | #size-cells = <1>; | ||
505 | |||
506 | compatible = "fsl,imx25-nand"; | ||
507 | reg = <0xbb000000 0x2000>; | ||
508 | clocks = <&clks 50>; | ||
509 | clock-names = ""; | ||
510 | interrupts = <33>; | ||
511 | status = "disabled"; | ||
512 | }; | ||
513 | }; | ||
514 | }; | ||
515 | }; | ||
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts new file mode 100644 index 000000000000..c0327c054de2 --- /dev/null +++ b/arch/arm/boot/dts/imx27-apf27.dts | |||
@@ -0,0 +1,89 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr> | ||
3 | * Copyright 2012 Armadeus Systems <support@armadeus.com> | ||
4 | * | ||
5 | * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix | ||
6 | * | ||
7 | * The code contained herein is licensed under the GNU General Public | ||
8 | * License. You may obtain a copy of the GNU General Public License | ||
9 | * Version 2 or later at the following locations: | ||
10 | * | ||
11 | * http://www.opensource.org/licenses/gpl-license.html | ||
12 | * http://www.gnu.org/copyleft/gpl.html | ||
13 | */ | ||
14 | |||
15 | /dts-v1/; | ||
16 | /include/ "imx27.dtsi" | ||
17 | |||
18 | / { | ||
19 | model = "Armadeus Systems APF27 module"; | ||
20 | compatible = "armadeus,imx27-apf27", "fsl,imx27"; | ||
21 | |||
22 | memory { | ||
23 | reg = <0xa0000000 0x04000000>; | ||
24 | }; | ||
25 | |||
26 | clocks { | ||
27 | #address-cells = <1>; | ||
28 | #size-cells = <0>; | ||
29 | |||
30 | osc26m { | ||
31 | compatible = "fsl,imx-osc26m", "fixed-clock"; | ||
32 | clock-frequency = <0>; | ||
33 | }; | ||
34 | }; | ||
35 | |||
36 | soc { | ||
37 | aipi@10000000 { | ||
38 | serial@1000a000 { | ||
39 | status = "okay"; | ||
40 | }; | ||
41 | |||
42 | ethernet@1002b000 { | ||
43 | status = "okay"; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | nand@d8000000 { | ||
48 | status = "okay"; | ||
49 | nand-bus-width = <16>; | ||
50 | nand-ecc-mode = "hw"; | ||
51 | nand-on-flash-bbt; | ||
52 | |||
53 | partition@0 { | ||
54 | label = "u-boot"; | ||
55 | reg = <0x0 0x100000>; | ||
56 | }; | ||
57 | |||
58 | partition@100000 { | ||
59 | label = "env"; | ||
60 | reg = <0x100000 0x80000>; | ||
61 | }; | ||
62 | |||
63 | partition@180000 { | ||
64 | label = "env2"; | ||
65 | reg = <0x180000 0x80000>; | ||
66 | }; | ||
67 | |||
68 | partition@200000 { | ||
69 | label = "firmware"; | ||
70 | reg = <0x200000 0x80000>; | ||
71 | }; | ||
72 | |||
73 | partition@280000 { | ||
74 | label = "dtb"; | ||
75 | reg = <0x280000 0x80000>; | ||
76 | }; | ||
77 | |||
78 | partition@300000 { | ||
79 | label = "kernel"; | ||
80 | reg = <0x300000 0x500000>; | ||
81 | }; | ||
82 | |||
83 | partition@800000 { | ||
84 | label = "rootfs"; | ||
85 | reg = <0x800000 0xf800000>; | ||
86 | }; | ||
87 | }; | ||
88 | }; | ||
89 | }; | ||
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 67d672792b0d..b8d3905915ac 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -58,7 +58,7 @@ | |||
58 | reg = <0x10000000 0x10000000>; | 58 | reg = <0x10000000 0x10000000>; |
59 | ranges; | 59 | ranges; |
60 | 60 | ||
61 | wdog@10002000 { | 61 | wdog: wdog@10002000 { |
62 | compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; | 62 | compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; |
63 | reg = <0x10002000 0x4000>; | 63 | reg = <0x10002000 0x4000>; |
64 | interrupts = <27>; | 64 | interrupts = <27>; |
@@ -218,7 +218,8 @@ | |||
218 | status = "disabled"; | 218 | status = "disabled"; |
219 | }; | 219 | }; |
220 | }; | 220 | }; |
221 | nand@d8000000 { | 221 | |
222 | nfc: nand@d8000000 { | ||
222 | #address-cells = <1>; | 223 | #address-cells = <1>; |
223 | #size-cells = <1>; | 224 | #size-cells = <1>; |
224 | 225 | ||
diff --git a/arch/arm/boot/dts/imx28-apf28.dts b/arch/arm/boot/dts/imx28-apf28.dts new file mode 100644 index 000000000000..7eb075876c4c --- /dev/null +++ b/arch/arm/boot/dts/imx28-apf28.dts | |||
@@ -0,0 +1,85 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Armadeus Systems - <support@armadeus.com> | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "imx28.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "Armadeus Systems APF28 module"; | ||
17 | compatible = "armadeus,imx28-apf28", "fsl,imx28"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x40000000 0x08000000>; | ||
21 | }; | ||
22 | |||
23 | apb@80000000 { | ||
24 | apbh@80000000 { | ||
25 | gpmi-nand@8000c000 { | ||
26 | pinctrl-names = "default"; | ||
27 | pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; | ||
28 | status = "okay"; | ||
29 | |||
30 | partition@0 { | ||
31 | label = "u-boot"; | ||
32 | reg = <0x0 0x300000>; | ||
33 | }; | ||
34 | |||
35 | partition@300000 { | ||
36 | label = "env"; | ||
37 | reg = <0x300000 0x80000>; | ||
38 | }; | ||
39 | |||
40 | partition@380000 { | ||
41 | label = "env2"; | ||
42 | reg = <0x380000 0x80000>; | ||
43 | }; | ||
44 | |||
45 | partition@400000 { | ||
46 | label = "dtb"; | ||
47 | reg = <0x400000 0x80000>; | ||
48 | }; | ||
49 | |||
50 | partition@480000 { | ||
51 | label = "splash"; | ||
52 | reg = <0x480000 0x80000>; | ||
53 | }; | ||
54 | |||
55 | partition@500000 { | ||
56 | label = "kernel"; | ||
57 | reg = <0x500000 0x800000>; | ||
58 | }; | ||
59 | |||
60 | partition@d00000 { | ||
61 | label = "rootfs"; | ||
62 | reg = <0xd00000 0xf300000>; | ||
63 | }; | ||
64 | }; | ||
65 | }; | ||
66 | |||
67 | apbx@80040000 { | ||
68 | duart: serial@80074000 { | ||
69 | pinctrl-names = "default"; | ||
70 | pinctrl-0 = <&duart_pins_a>; | ||
71 | status = "okay"; | ||
72 | }; | ||
73 | }; | ||
74 | }; | ||
75 | |||
76 | ahb@80080000 { | ||
77 | mac0: ethernet@800f0000 { | ||
78 | phy-mode = "rmii"; | ||
79 | pinctrl-names = "default"; | ||
80 | pinctrl-0 = <&mac0_pins_a>; | ||
81 | phy-reset-gpios = <&gpio4 13 0>; | ||
82 | status = "okay"; | ||
83 | }; | ||
84 | }; | ||
85 | }; | ||
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts new file mode 100644 index 000000000000..6d8865bfb4b7 --- /dev/null +++ b/arch/arm/boot/dts/imx28-apf28dev.dts | |||
@@ -0,0 +1,154 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Armadeus Systems - <support@armadeus.com> | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /* APF28Dev is a docking board for the APF28 SOM */ | ||
13 | /include/ "imx28-apf28.dts" | ||
14 | |||
15 | / { | ||
16 | model = "Armadeus Systems APF28Dev docking/development board"; | ||
17 | compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28"; | ||
18 | |||
19 | apb@80000000 { | ||
20 | apbh@80000000 { | ||
21 | ssp0: ssp@80010000 { | ||
22 | compatible = "fsl,imx28-mmc"; | ||
23 | pinctrl-names = "default"; | ||
24 | pinctrl-0 = <&mmc0_4bit_pins_a | ||
25 | &mmc0_cd_cfg &mmc0_sck_cfg>; | ||
26 | bus-width = <4>; | ||
27 | status = "okay"; | ||
28 | }; | ||
29 | |||
30 | ssp2: ssp@80014000 { | ||
31 | compatible = "fsl,imx28-spi"; | ||
32 | pinctrl-names = "default"; | ||
33 | pinctrl-0 = <&spi2_pins_a>; | ||
34 | status = "okay"; | ||
35 | }; | ||
36 | |||
37 | pinctrl@80018000 { | ||
38 | pinctrl-names = "default"; | ||
39 | pinctrl-0 = <&hog_pins_apf28dev>; | ||
40 | |||
41 | hog_pins_apf28dev: hog@0 { | ||
42 | reg = <0>; | ||
43 | fsl,pinmux-ids = < | ||
44 | 0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */ | ||
45 | 0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */ | ||
46 | 0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */ | ||
47 | 0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */ | ||
48 | 0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */ | ||
49 | 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ | ||
50 | 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ | ||
51 | >; | ||
52 | fsl,drive-strength = <0>; | ||
53 | fsl,voltage = <1>; | ||
54 | fsl,pull-up = <0>; | ||
55 | }; | ||
56 | |||
57 | lcdif_pins_apf28dev: lcdif-apf28dev@0 { | ||
58 | reg = <0>; | ||
59 | fsl,pinmux-ids = < | ||
60 | 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ | ||
61 | 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ | ||
62 | 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ | ||
63 | 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ | ||
64 | >; | ||
65 | fsl,drive-strength = <0>; | ||
66 | fsl,voltage = <1>; | ||
67 | fsl,pull-up = <0>; | ||
68 | }; | ||
69 | }; | ||
70 | |||
71 | lcdif@80030000 { | ||
72 | pinctrl-names = "default"; | ||
73 | pinctrl-0 = <&lcdif_16bit_pins_a | ||
74 | &lcdif_pins_apf28dev>; | ||
75 | status = "okay"; | ||
76 | }; | ||
77 | }; | ||
78 | |||
79 | apbx@80040000 { | ||
80 | lradc@80050000 { | ||
81 | status = "okay"; | ||
82 | }; | ||
83 | |||
84 | i2c0: i2c@80058000 { | ||
85 | pinctrl-names = "default"; | ||
86 | pinctrl-0 = <&i2c0_pins_a>; | ||
87 | status = "okay"; | ||
88 | }; | ||
89 | |||
90 | pwm: pwm@80064000 { | ||
91 | pinctrl-names = "default"; | ||
92 | pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>; | ||
93 | status = "okay"; | ||
94 | }; | ||
95 | |||
96 | usbphy0: usbphy@8007c000 { | ||
97 | status = "okay"; | ||
98 | }; | ||
99 | |||
100 | usbphy1: usbphy@8007e000 { | ||
101 | status = "okay"; | ||
102 | }; | ||
103 | }; | ||
104 | }; | ||
105 | |||
106 | ahb@80080000 { | ||
107 | usb0: usb@80080000 { | ||
108 | vbus-supply = <®_usb0_vbus>; | ||
109 | status = "okay"; | ||
110 | }; | ||
111 | |||
112 | usb1: usb@80090000 { | ||
113 | status = "okay"; | ||
114 | }; | ||
115 | |||
116 | mac1: ethernet@800f4000 { | ||
117 | phy-mode = "rmii"; | ||
118 | pinctrl-names = "default"; | ||
119 | pinctrl-0 = <&mac1_pins_a>; | ||
120 | phy-reset-gpios = <&gpio0 23 0>; | ||
121 | status = "okay"; | ||
122 | }; | ||
123 | }; | ||
124 | |||
125 | regulators { | ||
126 | compatible = "simple-bus"; | ||
127 | |||
128 | reg_usb0_vbus: usb0_vbus { | ||
129 | compatible = "regulator-fixed"; | ||
130 | regulator-name = "usb0_vbus"; | ||
131 | regulator-min-microvolt = <5000000>; | ||
132 | regulator-max-microvolt = <5000000>; | ||
133 | gpio = <&gpio1 23 1>; | ||
134 | }; | ||
135 | }; | ||
136 | |||
137 | leds { | ||
138 | compatible = "gpio-leds"; | ||
139 | |||
140 | user { | ||
141 | label = "Heartbeat"; | ||
142 | gpios = <&gpio0 21 0>; | ||
143 | linux,default-trigger = "heartbeat"; | ||
144 | }; | ||
145 | }; | ||
146 | |||
147 | backlight { | ||
148 | compatible = "pwm-backlight"; | ||
149 | |||
150 | pwms = <&pwm 3 191000>; | ||
151 | brightness-levels = <0 4 8 16 32 64 128 255>; | ||
152 | default-brightness-level = <6>; | ||
153 | }; | ||
154 | }; | ||
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts index c03a577beca3..1594694532b9 100644 --- a/arch/arm/boot/dts/imx28-cfa10036.dts +++ b/arch/arm/boot/dts/imx28-cfa10036.dts | |||
@@ -22,6 +22,31 @@ | |||
22 | 22 | ||
23 | apb@80000000 { | 23 | apb@80000000 { |
24 | apbh@80000000 { | 24 | apbh@80000000 { |
25 | pinctrl@80018000 { | ||
26 | pinctrl-names = "default"; | ||
27 | pinctrl-0 = <&hog_pins_cfa10036>; | ||
28 | |||
29 | hog_pins_cfa10036: hog-10036@0 { | ||
30 | reg = <0>; | ||
31 | fsl,pinmux-ids = < | ||
32 | 0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */ | ||
33 | >; | ||
34 | fsl,drive-strength = <0>; | ||
35 | fsl,voltage = <1>; | ||
36 | fsl,pull-up = <0>; | ||
37 | }; | ||
38 | |||
39 | led_pins_cfa10036: leds-10036@0 { | ||
40 | reg = <0>; | ||
41 | fsl,pinmux-ids = < | ||
42 | 0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */ | ||
43 | >; | ||
44 | fsl,drive-strength = <0>; | ||
45 | fsl,voltage = <1>; | ||
46 | fsl,pull-up = <0>; | ||
47 | }; | ||
48 | }; | ||
49 | |||
25 | ssp0: ssp@80010000 { | 50 | ssp0: ssp@80010000 { |
26 | compatible = "fsl,imx28-mmc"; | 51 | compatible = "fsl,imx28-mmc"; |
27 | pinctrl-names = "default"; | 52 | pinctrl-names = "default"; |
@@ -33,16 +58,37 @@ | |||
33 | }; | 58 | }; |
34 | 59 | ||
35 | apbx@80040000 { | 60 | apbx@80040000 { |
61 | pwm: pwm@80064000 { | ||
62 | pinctrl-names = "default"; | ||
63 | pinctrl-0 = <&pwm4_pins_a>; | ||
64 | status = "okay"; | ||
65 | }; | ||
66 | |||
36 | duart: serial@80074000 { | 67 | duart: serial@80074000 { |
37 | pinctrl-names = "default"; | 68 | pinctrl-names = "default"; |
38 | pinctrl-0 = <&duart_pins_b>; | 69 | pinctrl-0 = <&duart_pins_b>; |
39 | status = "okay"; | 70 | status = "okay"; |
40 | }; | 71 | }; |
72 | |||
73 | i2c0: i2c@80058000 { | ||
74 | pinctrl-names = "default"; | ||
75 | pinctrl-0 = <&i2c0_pins_b>; | ||
76 | status = "okay"; | ||
77 | |||
78 | ssd1307: oled@3c { | ||
79 | compatible = "solomon,ssd1307fb-i2c"; | ||
80 | reg = <0x3c>; | ||
81 | pwms = <&pwm 4 3000>; | ||
82 | reset-gpios = <&gpio2 7 0>; | ||
83 | }; | ||
84 | }; | ||
41 | }; | 85 | }; |
42 | }; | 86 | }; |
43 | 87 | ||
44 | leds { | 88 | leds { |
45 | compatible = "gpio-leds"; | 89 | compatible = "gpio-leds"; |
90 | pinctrl-names = "default"; | ||
91 | pinctrl-0 = <&led_pins_cfa10036>; | ||
46 | 92 | ||
47 | power { | 93 | power { |
48 | gpios = <&gpio3 4 1>; | 94 | gpios = <&gpio3 4 1>; |
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts index 05c892e931e3..b222614ac9e0 100644 --- a/arch/arm/boot/dts/imx28-cfa10049.dts +++ b/arch/arm/boot/dts/imx28-cfa10049.dts | |||
@@ -22,6 +22,22 @@ | |||
22 | apb@80000000 { | 22 | apb@80000000 { |
23 | apbh@80000000 { | 23 | apbh@80000000 { |
24 | pinctrl@80018000 { | 24 | pinctrl@80018000 { |
25 | pinctrl-names = "default", "default"; | ||
26 | pinctrl-1 = <&hog_pins_cfa10049>; | ||
27 | |||
28 | hog_pins_cfa10049: hog-10049@0 { | ||
29 | reg = <0>; | ||
30 | fsl,pinmux-ids = < | ||
31 | 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ | ||
32 | 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ | ||
33 | 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ | ||
34 | 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ | ||
35 | >; | ||
36 | fsl,drive-strength = <0>; | ||
37 | fsl,voltage = <1>; | ||
38 | fsl,pull-up = <0>; | ||
39 | }; | ||
40 | |||
25 | spi3_pins_cfa10049: spi3-cfa10049@0 { | 41 | spi3_pins_cfa10049: spi3-cfa10049@0 { |
26 | reg = <0>; | 42 | reg = <0>; |
27 | fsl,pinmux-ids = < | 43 | fsl,pinmux-ids = < |
@@ -29,6 +45,7 @@ | |||
29 | 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ | 45 | 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ |
30 | 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ | 46 | 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ |
31 | 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ | 47 | 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ |
48 | 0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */ | ||
32 | >; | 49 | >; |
33 | fsl,drive-strength = <1>; | 50 | fsl,drive-strength = <1>; |
34 | fsl,voltage = <1>; | 51 | fsl,voltage = <1>; |
@@ -60,6 +77,11 @@ | |||
60 | spi-max-frequency = <100000>; | 77 | spi-max-frequency = <100000>; |
61 | }; | 78 | }; |
62 | 79 | ||
80 | dac0: dh2228@2 { | ||
81 | compatible = "rohm,dh2228fv"; | ||
82 | reg = <2>; | ||
83 | spi-max-frequency = <100000>; | ||
84 | }; | ||
63 | }; | 85 | }; |
64 | }; | 86 | }; |
65 | 87 | ||
@@ -96,4 +118,15 @@ | |||
96 | gpio = <&gpio0 7 1>; | 118 | gpio = <&gpio0 7 1>; |
97 | }; | 119 | }; |
98 | }; | 120 | }; |
121 | |||
122 | ahb@80080000 { | ||
123 | mac0: ethernet@800f0000 { | ||
124 | phy-mode = "rmii"; | ||
125 | pinctrl-names = "default"; | ||
126 | pinctrl-0 = <&mac0_pins_a>; | ||
127 | phy-reset-gpios = <&gpio2 21 0>; | ||
128 | phy-reset-duration = <100>; | ||
129 | status = "okay"; | ||
130 | }; | ||
131 | }; | ||
99 | }; | 132 | }; |
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index a0ad71ca3a44..2da316e04409 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts | |||
@@ -76,7 +76,6 @@ | |||
76 | 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ | 76 | 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ |
77 | 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ | 77 | 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ |
78 | 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ | 78 | 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ |
79 | 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ | ||
80 | 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */ | 79 | 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */ |
81 | 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */ | 80 | 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */ |
82 | >; | 81 | >; |
@@ -85,6 +84,16 @@ | |||
85 | fsl,pull-up = <0>; | 84 | fsl,pull-up = <0>; |
86 | }; | 85 | }; |
87 | 86 | ||
87 | led_pin_gpio3_5: led_gpio3_5@0 { | ||
88 | reg = <0>; | ||
89 | fsl,pinmux-ids = < | ||
90 | 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ | ||
91 | >; | ||
92 | fsl,drive-strength = <0>; | ||
93 | fsl,voltage = <1>; | ||
94 | fsl,pull-up = <0>; | ||
95 | }; | ||
96 | |||
88 | gpmi_pins_evk: gpmi-nand-evk@0 { | 97 | gpmi_pins_evk: gpmi-nand-evk@0 { |
89 | reg = <0>; | 98 | reg = <0>; |
90 | fsl,pinmux-ids = < | 99 | fsl,pinmux-ids = < |
@@ -288,6 +297,8 @@ | |||
288 | 297 | ||
289 | leds { | 298 | leds { |
290 | compatible = "gpio-leds"; | 299 | compatible = "gpio-leds"; |
300 | pinctrl-names = "default"; | ||
301 | pinctrl-0 = <&led_pin_gpio3_5>; | ||
291 | 302 | ||
292 | user { | 303 | user { |
293 | label = "Heartbeat"; | 304 | label = "Heartbeat"; |
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts new file mode 100644 index 000000000000..e6cde8aa7fff --- /dev/null +++ b/arch/arm/boot/dts/imx28-sps1.dts | |||
@@ -0,0 +1,169 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Marek Vasut <marex@denx.de> | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "imx28.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "SchulerControl GmbH, SC SPS 1"; | ||
17 | compatible = "schulercontrol,imx28-sps1", "fsl,imx28"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x40000000 0x08000000>; | ||
21 | }; | ||
22 | |||
23 | apb@80000000 { | ||
24 | apbh@80000000 { | ||
25 | pinctrl@80018000 { | ||
26 | pinctrl-names = "default"; | ||
27 | pinctrl-0 = <&hog_pins_a>; | ||
28 | |||
29 | hog_pins_a: hog-gpios@0 { | ||
30 | reg = <0>; | ||
31 | fsl,pinmux-ids = < | ||
32 | 0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */ | ||
33 | 0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */ | ||
34 | 0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */ | ||
35 | >; | ||
36 | fsl,drive-strength = <0>; | ||
37 | fsl,voltage = <1>; | ||
38 | fsl,pull-up = <0>; | ||
39 | }; | ||
40 | |||
41 | }; | ||
42 | |||
43 | ssp0: ssp@80010000 { | ||
44 | compatible = "fsl,imx28-mmc"; | ||
45 | pinctrl-names = "default"; | ||
46 | pinctrl-0 = <&mmc0_4bit_pins_a>; | ||
47 | bus-width = <4>; | ||
48 | status = "okay"; | ||
49 | }; | ||
50 | |||
51 | ssp2: ssp@80014000 { | ||
52 | #address-cells = <1>; | ||
53 | #size-cells = <0>; | ||
54 | compatible = "fsl,imx28-spi"; | ||
55 | pinctrl-names = "default"; | ||
56 | pinctrl-0 = <&spi2_pins_a>; | ||
57 | status = "okay"; | ||
58 | |||
59 | flash: m25p80@0 { | ||
60 | #address-cells = <1>; | ||
61 | #size-cells = <1>; | ||
62 | compatible = "everspin,mr25h256", "mr25h256"; | ||
63 | spi-max-frequency = <40000000>; | ||
64 | reg = <0>; | ||
65 | }; | ||
66 | }; | ||
67 | }; | ||
68 | |||
69 | apbx@80040000 { | ||
70 | i2c0: i2c@80058000 { | ||
71 | pinctrl-names = "default"; | ||
72 | pinctrl-0 = <&i2c0_pins_a>; | ||
73 | clock-frequency = <400000>; | ||
74 | status = "okay"; | ||
75 | |||
76 | rtc: rtc@51 { | ||
77 | compatible = "nxp,pcf8563"; | ||
78 | reg = <0x51>; | ||
79 | }; | ||
80 | |||
81 | eeprom: eeprom@52 { | ||
82 | compatible = "atmel,24c64"; | ||
83 | reg = <0x52>; | ||
84 | pagesize = <32>; | ||
85 | }; | ||
86 | }; | ||
87 | |||
88 | duart: serial@80074000 { | ||
89 | pinctrl-names = "default"; | ||
90 | pinctrl-0 = <&duart_pins_a>; | ||
91 | status = "okay"; | ||
92 | }; | ||
93 | |||
94 | usbphy0: usbphy@8007c000 { | ||
95 | status = "okay"; | ||
96 | }; | ||
97 | |||
98 | auart0: serial@8006a000 { | ||
99 | pinctrl-names = "default"; | ||
100 | pinctrl-0 = <&auart0_pins_a>; | ||
101 | status = "okay"; | ||
102 | }; | ||
103 | }; | ||
104 | }; | ||
105 | |||
106 | ahb@80080000 { | ||
107 | usb0: usb@80080000 { | ||
108 | vbus-supply = <®_usb0_vbus>; | ||
109 | pinctrl-names = "default"; | ||
110 | pinctrl-0 = <&usbphy0_pins_b>; | ||
111 | status = "okay"; | ||
112 | }; | ||
113 | |||
114 | mac0: ethernet@800f0000 { | ||
115 | phy-mode = "rmii"; | ||
116 | pinctrl-names = "default"; | ||
117 | pinctrl-0 = <&mac0_pins_a>; | ||
118 | status = "okay"; | ||
119 | }; | ||
120 | |||
121 | mac1: ethernet@800f4000 { | ||
122 | phy-mode = "rmii"; | ||
123 | pinctrl-names = "default"; | ||
124 | pinctrl-0 = <&mac1_pins_a>; | ||
125 | status = "okay"; | ||
126 | }; | ||
127 | }; | ||
128 | |||
129 | regulators { | ||
130 | compatible = "simple-bus"; | ||
131 | |||
132 | reg_usb0_vbus: usb0_vbus { | ||
133 | compatible = "regulator-fixed"; | ||
134 | regulator-name = "usb0_vbus"; | ||
135 | regulator-min-microvolt = <5000000>; | ||
136 | regulator-max-microvolt = <5000000>; | ||
137 | gpio = <&gpio3 9 0>; | ||
138 | }; | ||
139 | }; | ||
140 | |||
141 | leds { | ||
142 | #address-cells = <1>; | ||
143 | #size-cells = <0>; | ||
144 | compatible = "gpio-leds"; | ||
145 | status = "okay"; | ||
146 | |||
147 | led@1 { | ||
148 | label = "sps1-1:yellow:user"; | ||
149 | gpios = <&gpio0 6 0>; | ||
150 | linux,default-trigger = "heartbeat"; | ||
151 | reg = <0>; | ||
152 | }; | ||
153 | |||
154 | led@2 { | ||
155 | label = "sps1-2:red:user"; | ||
156 | gpios = <&gpio0 3 0>; | ||
157 | linux,default-trigger = "heartbeat"; | ||
158 | reg = <1>; | ||
159 | }; | ||
160 | |||
161 | led@3 { | ||
162 | label = "sps1-3:red:user"; | ||
163 | gpios = <&gpio0 0 0>; | ||
164 | default-trigger = "heartbeat"; | ||
165 | reg = <2>; | ||
166 | }; | ||
167 | |||
168 | }; | ||
169 | }; | ||
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 55c57ea6169e..d7013f73f2e9 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi | |||
@@ -492,6 +492,16 @@ | |||
492 | fsl,pull-up = <0>; | 492 | fsl,pull-up = <0>; |
493 | }; | 493 | }; |
494 | 494 | ||
495 | pwm3_pins_a: pwm3@0 { | ||
496 | reg = <0>; | ||
497 | fsl,pinmux-ids = < | ||
498 | 0x31c0 /* MX28_PAD_PWM3__PWM_3 */ | ||
499 | >; | ||
500 | fsl,drive-strength = <0>; | ||
501 | fsl,voltage = <1>; | ||
502 | fsl,pull-up = <0>; | ||
503 | }; | ||
504 | |||
495 | pwm4_pins_a: pwm4@0 { | 505 | pwm4_pins_a: pwm4@0 { |
496 | reg = <0>; | 506 | reg = <0>; |
497 | fsl,pinmux-ids = < | 507 | fsl,pinmux-ids = < |
@@ -535,6 +545,31 @@ | |||
535 | fsl,pull-up = <0>; | 545 | fsl,pull-up = <0>; |
536 | }; | 546 | }; |
537 | 547 | ||
548 | lcdif_16bit_pins_a: lcdif-16bit@0 { | ||
549 | reg = <0>; | ||
550 | fsl,pinmux-ids = < | ||
551 | 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ | ||
552 | 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ | ||
553 | 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ | ||
554 | 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ | ||
555 | 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ | ||
556 | 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ | ||
557 | 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ | ||
558 | 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ | ||
559 | 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ | ||
560 | 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ | ||
561 | 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ | ||
562 | 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ | ||
563 | 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ | ||
564 | 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ | ||
565 | 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ | ||
566 | 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ | ||
567 | >; | ||
568 | fsl,drive-strength = <0>; | ||
569 | fsl,voltage = <1>; | ||
570 | fsl,pull-up = <0>; | ||
571 | }; | ||
572 | |||
538 | can0_pins_a: can0@0 { | 573 | can0_pins_a: can0@0 { |
539 | reg = <0>; | 574 | reg = <0>; |
540 | fsl,pinmux-ids = < | 575 | fsl,pinmux-ids = < |
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 54aea74769a1..1fdee31b4909 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -76,17 +76,18 @@ | |||
76 | reg = <0x70000000 0x40000>; | 76 | reg = <0x70000000 0x40000>; |
77 | ranges; | 77 | ranges; |
78 | 78 | ||
79 | esdhc@70004000 { /* ESDHC1 */ | 79 | esdhc1: esdhc@70004000 { |
80 | compatible = "fsl,imx51-esdhc"; | 80 | compatible = "fsl,imx51-esdhc"; |
81 | reg = <0x70004000 0x4000>; | 81 | reg = <0x70004000 0x4000>; |
82 | interrupts = <1>; | 82 | interrupts = <1>; |
83 | status = "disabled"; | 83 | status = "disabled"; |
84 | }; | 84 | }; |
85 | 85 | ||
86 | esdhc@70008000 { /* ESDHC2 */ | 86 | esdhc2: esdhc@70008000 { |
87 | compatible = "fsl,imx51-esdhc"; | 87 | compatible = "fsl,imx51-esdhc"; |
88 | reg = <0x70008000 0x4000>; | 88 | reg = <0x70008000 0x4000>; |
89 | interrupts = <2>; | 89 | interrupts = <2>; |
90 | bus-width = <4>; | ||
90 | status = "disabled"; | 91 | status = "disabled"; |
91 | }; | 92 | }; |
92 | 93 | ||
@@ -97,7 +98,7 @@ | |||
97 | status = "disabled"; | 98 | status = "disabled"; |
98 | }; | 99 | }; |
99 | 100 | ||
100 | ecspi@70010000 { /* ECSPI1 */ | 101 | ecspi1: ecspi@70010000 { |
101 | #address-cells = <1>; | 102 | #address-cells = <1>; |
102 | #size-cells = <0>; | 103 | #size-cells = <0>; |
103 | compatible = "fsl,imx51-ecspi"; | 104 | compatible = "fsl,imx51-ecspi"; |
@@ -115,43 +116,45 @@ | |||
115 | status = "disabled"; | 116 | status = "disabled"; |
116 | }; | 117 | }; |
117 | 118 | ||
118 | esdhc@70020000 { /* ESDHC3 */ | 119 | esdhc3: esdhc@70020000 { |
119 | compatible = "fsl,imx51-esdhc"; | 120 | compatible = "fsl,imx51-esdhc"; |
120 | reg = <0x70020000 0x4000>; | 121 | reg = <0x70020000 0x4000>; |
121 | interrupts = <3>; | 122 | interrupts = <3>; |
123 | bus-width = <4>; | ||
122 | status = "disabled"; | 124 | status = "disabled"; |
123 | }; | 125 | }; |
124 | 126 | ||
125 | esdhc@70024000 { /* ESDHC4 */ | 127 | esdhc4: esdhc@70024000 { |
126 | compatible = "fsl,imx51-esdhc"; | 128 | compatible = "fsl,imx51-esdhc"; |
127 | reg = <0x70024000 0x4000>; | 129 | reg = <0x70024000 0x4000>; |
128 | interrupts = <4>; | 130 | interrupts = <4>; |
131 | bus-width = <4>; | ||
129 | status = "disabled"; | 132 | status = "disabled"; |
130 | }; | 133 | }; |
131 | }; | 134 | }; |
132 | 135 | ||
133 | usb@73f80000 { | 136 | usbotg: usb@73f80000 { |
134 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; | 137 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
135 | reg = <0x73f80000 0x0200>; | 138 | reg = <0x73f80000 0x0200>; |
136 | interrupts = <18>; | 139 | interrupts = <18>; |
137 | status = "disabled"; | 140 | status = "disabled"; |
138 | }; | 141 | }; |
139 | 142 | ||
140 | usb@73f80200 { | 143 | usbh1: usb@73f80200 { |
141 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; | 144 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
142 | reg = <0x73f80200 0x0200>; | 145 | reg = <0x73f80200 0x0200>; |
143 | interrupts = <14>; | 146 | interrupts = <14>; |
144 | status = "disabled"; | 147 | status = "disabled"; |
145 | }; | 148 | }; |
146 | 149 | ||
147 | usb@73f80400 { | 150 | usbh2: usb@73f80400 { |
148 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; | 151 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
149 | reg = <0x73f80400 0x0200>; | 152 | reg = <0x73f80400 0x0200>; |
150 | interrupts = <16>; | 153 | interrupts = <16>; |
151 | status = "disabled"; | 154 | status = "disabled"; |
152 | }; | 155 | }; |
153 | 156 | ||
154 | usb@73f80600 { | 157 | usbh3: usb@73f80600 { |
155 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; | 158 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
156 | reg = <0x73f80600 0x0200>; | 159 | reg = <0x73f80600 0x0200>; |
157 | interrupts = <17>; | 160 | interrupts = <17>; |
@@ -198,20 +201,20 @@ | |||
198 | #interrupt-cells = <2>; | 201 | #interrupt-cells = <2>; |
199 | }; | 202 | }; |
200 | 203 | ||
201 | wdog@73f98000 { /* WDOG1 */ | 204 | wdog1: wdog@73f98000 { |
202 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; | 205 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; |
203 | reg = <0x73f98000 0x4000>; | 206 | reg = <0x73f98000 0x4000>; |
204 | interrupts = <58>; | 207 | interrupts = <58>; |
205 | }; | 208 | }; |
206 | 209 | ||
207 | wdog@73f9c000 { /* WDOG2 */ | 210 | wdog2: wdog@73f9c000 { |
208 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; | 211 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; |
209 | reg = <0x73f9c000 0x4000>; | 212 | reg = <0x73f9c000 0x4000>; |
210 | interrupts = <59>; | 213 | interrupts = <59>; |
211 | status = "disabled"; | 214 | status = "disabled"; |
212 | }; | 215 | }; |
213 | 216 | ||
214 | iomuxc@73fa8000 { | 217 | iomuxc: iomuxc@73fa8000 { |
215 | compatible = "fsl,imx51-iomuxc"; | 218 | compatible = "fsl,imx51-iomuxc"; |
216 | reg = <0x73fa8000 0x4000>; | 219 | reg = <0x73fa8000 0x4000>; |
217 | 220 | ||
@@ -349,7 +352,7 @@ | |||
349 | reg = <0x80000000 0x10000000>; | 352 | reg = <0x80000000 0x10000000>; |
350 | ranges; | 353 | ranges; |
351 | 354 | ||
352 | ecspi@83fac000 { /* ECSPI2 */ | 355 | ecspi2: ecspi@83fac000 { |
353 | #address-cells = <1>; | 356 | #address-cells = <1>; |
354 | #size-cells = <0>; | 357 | #size-cells = <0>; |
355 | compatible = "fsl,imx51-ecspi"; | 358 | compatible = "fsl,imx51-ecspi"; |
@@ -358,14 +361,14 @@ | |||
358 | status = "disabled"; | 361 | status = "disabled"; |
359 | }; | 362 | }; |
360 | 363 | ||
361 | sdma@83fb0000 { | 364 | sdma: sdma@83fb0000 { |
362 | compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; | 365 | compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; |
363 | reg = <0x83fb0000 0x4000>; | 366 | reg = <0x83fb0000 0x4000>; |
364 | interrupts = <6>; | 367 | interrupts = <6>; |
365 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; | 368 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; |
366 | }; | 369 | }; |
367 | 370 | ||
368 | cspi@83fc0000 { | 371 | cspi: cspi@83fc0000 { |
369 | #address-cells = <1>; | 372 | #address-cells = <1>; |
370 | #size-cells = <0>; | 373 | #size-cells = <0>; |
371 | compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; | 374 | compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; |
@@ -374,7 +377,7 @@ | |||
374 | status = "disabled"; | 377 | status = "disabled"; |
375 | }; | 378 | }; |
376 | 379 | ||
377 | i2c@83fc4000 { /* I2C2 */ | 380 | i2c2: i2c@83fc4000 { |
378 | #address-cells = <1>; | 381 | #address-cells = <1>; |
379 | #size-cells = <0>; | 382 | #size-cells = <0>; |
380 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; | 383 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
@@ -383,7 +386,7 @@ | |||
383 | status = "disabled"; | 386 | status = "disabled"; |
384 | }; | 387 | }; |
385 | 388 | ||
386 | i2c@83fc8000 { /* I2C1 */ | 389 | i2c1: i2c@83fc8000 { |
387 | #address-cells = <1>; | 390 | #address-cells = <1>; |
388 | #size-cells = <0>; | 391 | #size-cells = <0>; |
389 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; | 392 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
@@ -401,13 +404,13 @@ | |||
401 | status = "disabled"; | 404 | status = "disabled"; |
402 | }; | 405 | }; |
403 | 406 | ||
404 | audmux@83fd0000 { | 407 | audmux: audmux@83fd0000 { |
405 | compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; | 408 | compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; |
406 | reg = <0x83fd0000 0x4000>; | 409 | reg = <0x83fd0000 0x4000>; |
407 | status = "disabled"; | 410 | status = "disabled"; |
408 | }; | 411 | }; |
409 | 412 | ||
410 | nand@83fdb000 { | 413 | nfc: nand@83fdb000 { |
411 | compatible = "fsl,imx51-nand"; | 414 | compatible = "fsl,imx51-nand"; |
412 | reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; | 415 | reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; |
413 | interrupts = <8>; | 416 | interrupts = <8>; |
@@ -423,7 +426,7 @@ | |||
423 | status = "disabled"; | 426 | status = "disabled"; |
424 | }; | 427 | }; |
425 | 428 | ||
426 | ethernet@83fec000 { | 429 | fec: ethernet@83fec000 { |
427 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; | 430 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; |
428 | reg = <0x83fec000 0x4000>; | 431 | reg = <0x83fec000 0x4000>; |
429 | interrupts = <87>; | 432 | interrupts = <87>; |
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 08948af86d1a..b0075537195b 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts | |||
@@ -60,10 +60,17 @@ | |||
60 | 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ | 60 | 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ |
61 | 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ | 61 | 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ |
62 | 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ | 62 | 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ |
63 | 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */ | ||
64 | >; | ||
65 | }; | ||
66 | |||
67 | led_pin_gpio7_7: led_gpio7_7@0 { | ||
68 | fsl,pins = < | ||
63 | 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ | 69 | 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ |
64 | >; | 70 | >; |
65 | }; | 71 | }; |
66 | }; | 72 | }; |
73 | |||
67 | }; | 74 | }; |
68 | 75 | ||
69 | uart1: serial@53fbc000 { | 76 | uart1: serial@53fbc000 { |
@@ -100,76 +107,93 @@ | |||
100 | pmic: dialog@48 { | 107 | pmic: dialog@48 { |
101 | compatible = "dlg,da9053-aa", "dlg,da9052"; | 108 | compatible = "dlg,da9053-aa", "dlg,da9052"; |
102 | reg = <0x48>; | 109 | reg = <0x48>; |
110 | interrupt-parent = <&gpio7>; | ||
111 | interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */ | ||
103 | 112 | ||
104 | regulators { | 113 | regulators { |
105 | buck0 { | 114 | buck1_reg: buck1 { |
106 | regulator-min-microvolt = <500000>; | 115 | regulator-min-microvolt = <500000>; |
107 | regulator-max-microvolt = <2075000>; | 116 | regulator-max-microvolt = <2075000>; |
117 | regulator-always-on; | ||
108 | }; | 118 | }; |
109 | 119 | ||
110 | buck1 { | 120 | buck2_reg: buck2 { |
111 | regulator-min-microvolt = <500000>; | 121 | regulator-min-microvolt = <500000>; |
112 | regulator-max-microvolt = <2075000>; | 122 | regulator-max-microvolt = <2075000>; |
123 | regulator-always-on; | ||
113 | }; | 124 | }; |
114 | 125 | ||
115 | buck2 { | 126 | buck3_reg: buck3 { |
116 | regulator-min-microvolt = <925000>; | 127 | regulator-min-microvolt = <925000>; |
117 | regulator-max-microvolt = <2500000>; | 128 | regulator-max-microvolt = <2500000>; |
129 | regulator-always-on; | ||
118 | }; | 130 | }; |
119 | 131 | ||
120 | buck3 { | 132 | buck4_reg: buck4 { |
121 | regulator-min-microvolt = <925000>; | 133 | regulator-min-microvolt = <925000>; |
122 | regulator-max-microvolt = <2500000>; | 134 | regulator-max-microvolt = <2500000>; |
135 | regulator-always-on; | ||
123 | }; | 136 | }; |
124 | 137 | ||
125 | ldo4 { | 138 | ldo1_reg: ldo1 { |
126 | regulator-min-microvolt = <600000>; | 139 | regulator-min-microvolt = <600000>; |
127 | regulator-max-microvolt = <1800000>; | 140 | regulator-max-microvolt = <1800000>; |
141 | regulator-boot-on; | ||
142 | regulator-always-on; | ||
128 | }; | 143 | }; |
129 | 144 | ||
130 | ldo5 { | 145 | ldo2_reg: ldo2 { |
146 | regulator-min-microvolt = <600000>; | ||
147 | regulator-max-microvolt = <1800000>; | ||
148 | regulator-always-on; | ||
149 | }; | ||
150 | |||
151 | ldo3_reg: ldo3 { | ||
131 | regulator-min-microvolt = <600000>; | 152 | regulator-min-microvolt = <600000>; |
132 | regulator-max-microvolt = <1800000>; | 153 | regulator-max-microvolt = <1800000>; |
154 | regulator-always-on; | ||
133 | }; | 155 | }; |
134 | 156 | ||
135 | ldo6 { | 157 | ldo4_reg: ldo4 { |
136 | regulator-min-microvolt = <1725000>; | 158 | regulator-min-microvolt = <1725000>; |
137 | regulator-max-microvolt = <3300000>; | 159 | regulator-max-microvolt = <3300000>; |
160 | regulator-always-on; | ||
138 | }; | 161 | }; |
139 | 162 | ||
140 | ldo7 { | 163 | ldo5_reg: ldo5 { |
141 | regulator-min-microvolt = <1725000>; | 164 | regulator-min-microvolt = <1725000>; |
142 | regulator-max-microvolt = <3300000>; | 165 | regulator-max-microvolt = <3300000>; |
166 | regulator-always-on; | ||
143 | }; | 167 | }; |
144 | 168 | ||
145 | ldo8 { | 169 | ldo6_reg: ldo6 { |
146 | regulator-min-microvolt = <1200000>; | 170 | regulator-min-microvolt = <1200000>; |
147 | regulator-max-microvolt = <3600000>; | 171 | regulator-max-microvolt = <3600000>; |
172 | regulator-always-on; | ||
148 | }; | 173 | }; |
149 | 174 | ||
150 | ldo9 { | 175 | ldo7_reg: ldo7 { |
151 | regulator-min-microvolt = <1200000>; | 176 | regulator-min-microvolt = <1200000>; |
152 | regulator-max-microvolt = <3600000>; | 177 | regulator-max-microvolt = <3600000>; |
178 | regulator-always-on; | ||
153 | }; | 179 | }; |
154 | 180 | ||
155 | ldo10 { | 181 | ldo8_reg: ldo8 { |
156 | regulator-min-microvolt = <1200000>; | 182 | regulator-min-microvolt = <1200000>; |
157 | regulator-max-microvolt = <3600000>; | 183 | regulator-max-microvolt = <3600000>; |
184 | regulator-always-on; | ||
158 | }; | 185 | }; |
159 | 186 | ||
160 | ldo11 { | 187 | ldo9_reg: ldo9 { |
161 | regulator-min-microvolt = <1200000>; | 188 | regulator-min-microvolt = <1200000>; |
162 | regulator-max-microvolt = <3600000>; | 189 | regulator-max-microvolt = <3600000>; |
190 | regulator-always-on; | ||
163 | }; | 191 | }; |
164 | 192 | ||
165 | ldo12 { | 193 | ldo10_reg: ldo10 { |
166 | regulator-min-microvolt = <1250000>; | 194 | regulator-min-microvolt = <1250000>; |
167 | regulator-max-microvolt = <3650000>; | 195 | regulator-max-microvolt = <3650000>; |
168 | }; | 196 | regulator-always-on; |
169 | |||
170 | ldo13 { | ||
171 | regulator-min-microvolt = <1200000>; | ||
172 | regulator-max-microvolt = <3600000>; | ||
173 | }; | 197 | }; |
174 | }; | 198 | }; |
175 | }; | 199 | }; |
@@ -216,6 +240,8 @@ | |||
216 | 240 | ||
217 | leds { | 241 | leds { |
218 | compatible = "gpio-leds"; | 242 | compatible = "gpio-leds"; |
243 | pinctrl-names = "default"; | ||
244 | pinctrl-0 = <&led_pin_gpio7_7>; | ||
219 | 245 | ||
220 | user { | 246 | user { |
221 | label = "Heartbeat"; | 247 | label = "Heartbeat"; |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index caf09ff73f10..f45d4b1e21b5 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -81,17 +81,19 @@ | |||
81 | reg = <0x50000000 0x40000>; | 81 | reg = <0x50000000 0x40000>; |
82 | ranges; | 82 | ranges; |
83 | 83 | ||
84 | esdhc@50004000 { /* ESDHC1 */ | 84 | esdhc1: esdhc@50004000 { |
85 | compatible = "fsl,imx53-esdhc"; | 85 | compatible = "fsl,imx53-esdhc"; |
86 | reg = <0x50004000 0x4000>; | 86 | reg = <0x50004000 0x4000>; |
87 | interrupts = <1>; | 87 | interrupts = <1>; |
88 | bus-width = <4>; | ||
88 | status = "disabled"; | 89 | status = "disabled"; |
89 | }; | 90 | }; |
90 | 91 | ||
91 | esdhc@50008000 { /* ESDHC2 */ | 92 | esdhc2: esdhc@50008000 { |
92 | compatible = "fsl,imx53-esdhc"; | 93 | compatible = "fsl,imx53-esdhc"; |
93 | reg = <0x50008000 0x4000>; | 94 | reg = <0x50008000 0x4000>; |
94 | interrupts = <2>; | 95 | interrupts = <2>; |
96 | bus-width = <4>; | ||
95 | status = "disabled"; | 97 | status = "disabled"; |
96 | }; | 98 | }; |
97 | 99 | ||
@@ -102,7 +104,7 @@ | |||
102 | status = "disabled"; | 104 | status = "disabled"; |
103 | }; | 105 | }; |
104 | 106 | ||
105 | ecspi@50010000 { /* ECSPI1 */ | 107 | ecspi1: ecspi@50010000 { |
106 | #address-cells = <1>; | 108 | #address-cells = <1>; |
107 | #size-cells = <0>; | 109 | #size-cells = <0>; |
108 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; | 110 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; |
@@ -120,43 +122,45 @@ | |||
120 | status = "disabled"; | 122 | status = "disabled"; |
121 | }; | 123 | }; |
122 | 124 | ||
123 | esdhc@50020000 { /* ESDHC3 */ | 125 | esdhc3: esdhc@50020000 { |
124 | compatible = "fsl,imx53-esdhc"; | 126 | compatible = "fsl,imx53-esdhc"; |
125 | reg = <0x50020000 0x4000>; | 127 | reg = <0x50020000 0x4000>; |
126 | interrupts = <3>; | 128 | interrupts = <3>; |
129 | bus-width = <4>; | ||
127 | status = "disabled"; | 130 | status = "disabled"; |
128 | }; | 131 | }; |
129 | 132 | ||
130 | esdhc@50024000 { /* ESDHC4 */ | 133 | esdhc4: esdhc@50024000 { |
131 | compatible = "fsl,imx53-esdhc"; | 134 | compatible = "fsl,imx53-esdhc"; |
132 | reg = <0x50024000 0x4000>; | 135 | reg = <0x50024000 0x4000>; |
133 | interrupts = <4>; | 136 | interrupts = <4>; |
137 | bus-width = <4>; | ||
134 | status = "disabled"; | 138 | status = "disabled"; |
135 | }; | 139 | }; |
136 | }; | 140 | }; |
137 | 141 | ||
138 | usb@53f80000 { | 142 | usbotg: usb@53f80000 { |
139 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; | 143 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
140 | reg = <0x53f80000 0x0200>; | 144 | reg = <0x53f80000 0x0200>; |
141 | interrupts = <18>; | 145 | interrupts = <18>; |
142 | status = "disabled"; | 146 | status = "disabled"; |
143 | }; | 147 | }; |
144 | 148 | ||
145 | usb@53f80200 { | 149 | usbh1: usb@53f80200 { |
146 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; | 150 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
147 | reg = <0x53f80200 0x0200>; | 151 | reg = <0x53f80200 0x0200>; |
148 | interrupts = <14>; | 152 | interrupts = <14>; |
149 | status = "disabled"; | 153 | status = "disabled"; |
150 | }; | 154 | }; |
151 | 155 | ||
152 | usb@53f80400 { | 156 | usbh2: usb@53f80400 { |
153 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; | 157 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
154 | reg = <0x53f80400 0x0200>; | 158 | reg = <0x53f80400 0x0200>; |
155 | interrupts = <16>; | 159 | interrupts = <16>; |
156 | status = "disabled"; | 160 | status = "disabled"; |
157 | }; | 161 | }; |
158 | 162 | ||
159 | usb@53f80600 { | 163 | usbh3: usb@53f80600 { |
160 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; | 164 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
161 | reg = <0x53f80600 0x0200>; | 165 | reg = <0x53f80600 0x0200>; |
162 | interrupts = <17>; | 166 | interrupts = <17>; |
@@ -203,20 +207,20 @@ | |||
203 | #interrupt-cells = <2>; | 207 | #interrupt-cells = <2>; |
204 | }; | 208 | }; |
205 | 209 | ||
206 | wdog@53f98000 { /* WDOG1 */ | 210 | wdog1: wdog@53f98000 { |
207 | compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; | 211 | compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; |
208 | reg = <0x53f98000 0x4000>; | 212 | reg = <0x53f98000 0x4000>; |
209 | interrupts = <58>; | 213 | interrupts = <58>; |
210 | }; | 214 | }; |
211 | 215 | ||
212 | wdog@53f9c000 { /* WDOG2 */ | 216 | wdog2: wdog@53f9c000 { |
213 | compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; | 217 | compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; |
214 | reg = <0x53f9c000 0x4000>; | 218 | reg = <0x53f9c000 0x4000>; |
215 | interrupts = <59>; | 219 | interrupts = <59>; |
216 | status = "disabled"; | 220 | status = "disabled"; |
217 | }; | 221 | }; |
218 | 222 | ||
219 | iomuxc@53fa8000 { | 223 | iomuxc: iomuxc@53fa8000 { |
220 | compatible = "fsl,imx53-iomuxc"; | 224 | compatible = "fsl,imx53-iomuxc"; |
221 | reg = <0x53fa8000 0x4000>; | 225 | reg = <0x53fa8000 0x4000>; |
222 | 226 | ||
@@ -316,6 +320,24 @@ | |||
316 | }; | 320 | }; |
317 | }; | 321 | }; |
318 | 322 | ||
323 | can1 { | ||
324 | pinctrl_can1_1: can1grp-1 { | ||
325 | fsl,pins = < | ||
326 | 847 0x80000000 /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */ | ||
327 | 853 0x80000000 /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */ | ||
328 | >; | ||
329 | }; | ||
330 | }; | ||
331 | |||
332 | can2 { | ||
333 | pinctrl_can2_1: can2grp-1 { | ||
334 | fsl,pins = < | ||
335 | 67 0x80000000 /* MX53_PAD_KEY_COL4__CAN2_TXCAN */ | ||
336 | 74 0x80000000 /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */ | ||
337 | >; | ||
338 | }; | ||
339 | }; | ||
340 | |||
319 | i2c1 { | 341 | i2c1 { |
320 | pinctrl_i2c1_1: i2c1grp-1 { | 342 | pinctrl_i2c1_1: i2c1grp-1 { |
321 | fsl,pins = < | 343 | fsl,pins = < |
@@ -334,6 +356,15 @@ | |||
334 | }; | 356 | }; |
335 | }; | 357 | }; |
336 | 358 | ||
359 | i2c3 { | ||
360 | pinctrl_i2c3_1: i2c3grp-1 { | ||
361 | fsl,pins = < | ||
362 | 1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */ | ||
363 | 1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */ | ||
364 | >; | ||
365 | }; | ||
366 | }; | ||
367 | |||
337 | uart1 { | 368 | uart1 { |
338 | pinctrl_uart1_1: uart1grp-1 { | 369 | pinctrl_uart1_1: uart1grp-1 { |
339 | fsl,pins = < | 370 | fsl,pins = < |
@@ -369,6 +400,25 @@ | |||
369 | >; | 400 | >; |
370 | }; | 401 | }; |
371 | }; | 402 | }; |
403 | |||
404 | uart4 { | ||
405 | pinctrl_uart4_1: uart4grp-1 { | ||
406 | fsl,pins = < | ||
407 | 11 0x1c5 /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */ | ||
408 | 18 0x1c5 /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */ | ||
409 | >; | ||
410 | }; | ||
411 | }; | ||
412 | |||
413 | uart5 { | ||
414 | pinctrl_uart5_1: uart5grp-1 { | ||
415 | fsl,pins = < | ||
416 | 24 0x1c5 /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */ | ||
417 | 31 0x1c5 /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */ | ||
418 | >; | ||
419 | }; | ||
420 | }; | ||
421 | |||
372 | }; | 422 | }; |
373 | 423 | ||
374 | uart1: serial@53fbc000 { | 424 | uart1: serial@53fbc000 { |
@@ -429,7 +479,7 @@ | |||
429 | #interrupt-cells = <2>; | 479 | #interrupt-cells = <2>; |
430 | }; | 480 | }; |
431 | 481 | ||
432 | i2c@53fec000 { /* I2C3 */ | 482 | i2c3: i2c@53fec000 { |
433 | #address-cells = <1>; | 483 | #address-cells = <1>; |
434 | #size-cells = <0>; | 484 | #size-cells = <0>; |
435 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; | 485 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
@@ -460,7 +510,7 @@ | |||
460 | status = "disabled"; | 510 | status = "disabled"; |
461 | }; | 511 | }; |
462 | 512 | ||
463 | ecspi@63fac000 { /* ECSPI2 */ | 513 | ecspi2: ecspi@63fac000 { |
464 | #address-cells = <1>; | 514 | #address-cells = <1>; |
465 | #size-cells = <0>; | 515 | #size-cells = <0>; |
466 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; | 516 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; |
@@ -469,14 +519,14 @@ | |||
469 | status = "disabled"; | 519 | status = "disabled"; |
470 | }; | 520 | }; |
471 | 521 | ||
472 | sdma@63fb0000 { | 522 | sdma: sdma@63fb0000 { |
473 | compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; | 523 | compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; |
474 | reg = <0x63fb0000 0x4000>; | 524 | reg = <0x63fb0000 0x4000>; |
475 | interrupts = <6>; | 525 | interrupts = <6>; |
476 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; | 526 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; |
477 | }; | 527 | }; |
478 | 528 | ||
479 | cspi@63fc0000 { | 529 | cspi: cspi@63fc0000 { |
480 | #address-cells = <1>; | 530 | #address-cells = <1>; |
481 | #size-cells = <0>; | 531 | #size-cells = <0>; |
482 | compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; | 532 | compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; |
@@ -485,7 +535,7 @@ | |||
485 | status = "disabled"; | 535 | status = "disabled"; |
486 | }; | 536 | }; |
487 | 537 | ||
488 | i2c@63fc4000 { /* I2C2 */ | 538 | i2c2: i2c@63fc4000 { |
489 | #address-cells = <1>; | 539 | #address-cells = <1>; |
490 | #size-cells = <0>; | 540 | #size-cells = <0>; |
491 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; | 541 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
@@ -494,7 +544,7 @@ | |||
494 | status = "disabled"; | 544 | status = "disabled"; |
495 | }; | 545 | }; |
496 | 546 | ||
497 | i2c@63fc8000 { /* I2C1 */ | 547 | i2c1: i2c@63fc8000 { |
498 | #address-cells = <1>; | 548 | #address-cells = <1>; |
499 | #size-cells = <0>; | 549 | #size-cells = <0>; |
500 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; | 550 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
@@ -512,13 +562,13 @@ | |||
512 | status = "disabled"; | 562 | status = "disabled"; |
513 | }; | 563 | }; |
514 | 564 | ||
515 | audmux@63fd0000 { | 565 | audmux: audmux@63fd0000 { |
516 | compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; | 566 | compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; |
517 | reg = <0x63fd0000 0x4000>; | 567 | reg = <0x63fd0000 0x4000>; |
518 | status = "disabled"; | 568 | status = "disabled"; |
519 | }; | 569 | }; |
520 | 570 | ||
521 | nand@63fdb000 { | 571 | nfc: nand@63fdb000 { |
522 | compatible = "fsl,imx53-nand"; | 572 | compatible = "fsl,imx53-nand"; |
523 | reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; | 573 | reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; |
524 | interrupts = <8>; | 574 | interrupts = <8>; |
@@ -534,7 +584,7 @@ | |||
534 | status = "disabled"; | 584 | status = "disabled"; |
535 | }; | 585 | }; |
536 | 586 | ||
537 | ethernet@63fec000 { | 587 | fec: ethernet@63fec000 { |
538 | compatible = "fsl,imx53-fec", "fsl,imx25-fec"; | 588 | compatible = "fsl,imx53-fec", "fsl,imx25-fec"; |
539 | reg = <0x63fec000 0x4000>; | 589 | reg = <0x63fec000 0x4000>; |
540 | interrupts = <87>; | 590 | interrupts = <87>; |
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts new file mode 100644 index 000000000000..826e4ad1477e --- /dev/null +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts | |||
@@ -0,0 +1,64 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * Copyright 2011 Linaro Ltd. | ||
4 | * | ||
5 | * The code contained herein is licensed under the GNU General Public | ||
6 | * License. You may obtain a copy of the GNU General Public License | ||
7 | * Version 2 or later at the following locations: | ||
8 | * | ||
9 | * http://www.opensource.org/licenses/gpl-license.html | ||
10 | * http://www.gnu.org/copyleft/gpl.html | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | /include/ "imx6q.dtsi" | ||
15 | |||
16 | / { | ||
17 | model = "Freescale i.MX6 Quad SABRE Automotive Board"; | ||
18 | compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; | ||
19 | |||
20 | memory { | ||
21 | reg = <0x10000000 0x80000000>; | ||
22 | }; | ||
23 | |||
24 | soc { | ||
25 | aips-bus@02000000 { /* AIPS1 */ | ||
26 | iomuxc@020e0000 { | ||
27 | pinctrl-names = "default"; | ||
28 | pinctrl-0 = <&pinctrl_hog>; | ||
29 | |||
30 | hog { | ||
31 | pinctrl_hog: hoggrp { | ||
32 | fsl,pins = < | ||
33 | 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */ | ||
34 | 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */ | ||
35 | >; | ||
36 | }; | ||
37 | }; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | aips-bus@02100000 { /* AIPS2 */ | ||
42 | uart4: serial@021f0000 { | ||
43 | pinctrl-names = "default"; | ||
44 | pinctrl-0 = <&pinctrl_uart4_1>; | ||
45 | status = "okay"; | ||
46 | }; | ||
47 | |||
48 | ethernet@02188000 { | ||
49 | pinctrl-names = "default"; | ||
50 | pinctrl-0 = <&pinctrl_enet_2>; | ||
51 | phy-mode = "rgmii"; | ||
52 | status = "okay"; | ||
53 | }; | ||
54 | |||
55 | usdhc@02198000 { /* uSDHC3 */ | ||
56 | pinctrl-names = "default"; | ||
57 | pinctrl-0 = <&pinctrl_usdhc3_1>; | ||
58 | cd-gpios = <&gpio6 15 0>; | ||
59 | wp-gpios = <&gpio1 13 0>; | ||
60 | status = "okay"; | ||
61 | }; | ||
62 | }; | ||
63 | }; | ||
64 | }; | ||
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts index e596c28c214d..a42402562b7b 100644 --- a/arch/arm/boot/dts/imx6q-sabresd.dts +++ b/arch/arm/boot/dts/imx6q-sabresd.dts | |||
@@ -38,6 +38,8 @@ | |||
38 | hog { | 38 | hog { |
39 | pinctrl_hog: hoggrp { | 39 | pinctrl_hog: hoggrp { |
40 | fsl,pins = < | 40 | fsl,pins = < |
41 | 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */ | ||
42 | 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */ | ||
41 | 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ | 43 | 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ |
42 | 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ | 44 | 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ |
43 | 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ | 45 | 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ |
@@ -73,4 +75,20 @@ | |||
73 | }; | 75 | }; |
74 | }; | 76 | }; |
75 | }; | 77 | }; |
78 | |||
79 | gpio-keys { | ||
80 | compatible = "gpio-keys"; | ||
81 | |||
82 | volume-up { | ||
83 | label = "Volume Up"; | ||
84 | gpios = <&gpio1 4 0>; | ||
85 | linux,code = <115>; /* KEY_VOLUMEUP */ | ||
86 | }; | ||
87 | |||
88 | volume-down { | ||
89 | label = "Volume Down"; | ||
90 | gpios = <&gpio1 5 0>; | ||
91 | linux,code = <114>; /* KEY_VOLUMEDOWN */ | ||
92 | }; | ||
93 | }; | ||
76 | }; | 94 | }; |
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f604a44a5c66..6dfeaedef307 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -36,6 +36,14 @@ | |||
36 | compatible = "arm,cortex-a9"; | 36 | compatible = "arm,cortex-a9"; |
37 | reg = <0>; | 37 | reg = <0>; |
38 | next-level-cache = <&L2>; | 38 | next-level-cache = <&L2>; |
39 | operating-points = < | ||
40 | /* kHz uV */ | ||
41 | 792000 1100000 | ||
42 | 396000 950000 | ||
43 | 198000 850000 | ||
44 | >; | ||
45 | clock-latency = <61036>; /* two CLK32 periods */ | ||
46 | cpu0-supply = <®_cpu>; | ||
39 | }; | 47 | }; |
40 | 48 | ||
41 | cpu@1 { | 49 | cpu@1 { |
@@ -100,7 +108,7 @@ | |||
100 | clocks = <&clks 106>; | 108 | clocks = <&clks 106>; |
101 | }; | 109 | }; |
102 | 110 | ||
103 | gpmi-nand@00112000 { | 111 | nfc: gpmi-nand@00112000 { |
104 | compatible = "fsl,imx6q-gpmi-nand"; | 112 | compatible = "fsl,imx6q-gpmi-nand"; |
105 | #address-cells = <1>; | 113 | #address-cells = <1>; |
106 | #size-cells = <1>; | 114 | #size-cells = <1>; |
@@ -144,12 +152,12 @@ | |||
144 | reg = <0x02000000 0x40000>; | 152 | reg = <0x02000000 0x40000>; |
145 | ranges; | 153 | ranges; |
146 | 154 | ||
147 | spdif@02004000 { | 155 | spdif: spdif@02004000 { |
148 | reg = <0x02004000 0x4000>; | 156 | reg = <0x02004000 0x4000>; |
149 | interrupts = <0 52 0x04>; | 157 | interrupts = <0 52 0x04>; |
150 | }; | 158 | }; |
151 | 159 | ||
152 | ecspi@02008000 { /* eCSPI1 */ | 160 | ecspi1: ecspi@02008000 { |
153 | #address-cells = <1>; | 161 | #address-cells = <1>; |
154 | #size-cells = <0>; | 162 | #size-cells = <0>; |
155 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | 163 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
@@ -160,7 +168,7 @@ | |||
160 | status = "disabled"; | 168 | status = "disabled"; |
161 | }; | 169 | }; |
162 | 170 | ||
163 | ecspi@0200c000 { /* eCSPI2 */ | 171 | ecspi2: ecspi@0200c000 { |
164 | #address-cells = <1>; | 172 | #address-cells = <1>; |
165 | #size-cells = <0>; | 173 | #size-cells = <0>; |
166 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | 174 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
@@ -171,7 +179,7 @@ | |||
171 | status = "disabled"; | 179 | status = "disabled"; |
172 | }; | 180 | }; |
173 | 181 | ||
174 | ecspi@02010000 { /* eCSPI3 */ | 182 | ecspi3: ecspi@02010000 { |
175 | #address-cells = <1>; | 183 | #address-cells = <1>; |
176 | #size-cells = <0>; | 184 | #size-cells = <0>; |
177 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | 185 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
@@ -182,7 +190,7 @@ | |||
182 | status = "disabled"; | 190 | status = "disabled"; |
183 | }; | 191 | }; |
184 | 192 | ||
185 | ecspi@02014000 { /* eCSPI4 */ | 193 | ecspi4: ecspi@02014000 { |
186 | #address-cells = <1>; | 194 | #address-cells = <1>; |
187 | #size-cells = <0>; | 195 | #size-cells = <0>; |
188 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | 196 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
@@ -193,7 +201,7 @@ | |||
193 | status = "disabled"; | 201 | status = "disabled"; |
194 | }; | 202 | }; |
195 | 203 | ||
196 | ecspi@02018000 { /* eCSPI5 */ | 204 | ecspi5: ecspi@02018000 { |
197 | #address-cells = <1>; | 205 | #address-cells = <1>; |
198 | #size-cells = <0>; | 206 | #size-cells = <0>; |
199 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | 207 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
@@ -213,7 +221,7 @@ | |||
213 | status = "disabled"; | 221 | status = "disabled"; |
214 | }; | 222 | }; |
215 | 223 | ||
216 | esai@02024000 { | 224 | esai: esai@02024000 { |
217 | reg = <0x02024000 0x4000>; | 225 | reg = <0x02024000 0x4000>; |
218 | interrupts = <0 51 0x04>; | 226 | interrupts = <0 51 0x04>; |
219 | }; | 227 | }; |
@@ -248,7 +256,7 @@ | |||
248 | status = "disabled"; | 256 | status = "disabled"; |
249 | }; | 257 | }; |
250 | 258 | ||
251 | asrc@02034000 { | 259 | asrc: asrc@02034000 { |
252 | reg = <0x02034000 0x4000>; | 260 | reg = <0x02034000 0x4000>; |
253 | interrupts = <0 50 0x04>; | 261 | interrupts = <0 50 0x04>; |
254 | }; | 262 | }; |
@@ -258,7 +266,7 @@ | |||
258 | }; | 266 | }; |
259 | }; | 267 | }; |
260 | 268 | ||
261 | vpu@02040000 { | 269 | vpu: vpu@02040000 { |
262 | reg = <0x02040000 0x3c000>; | 270 | reg = <0x02040000 0x3c000>; |
263 | interrupts = <0 3 0x04 0 12 0x04>; | 271 | interrupts = <0 3 0x04 0 12 0x04>; |
264 | }; | 272 | }; |
@@ -267,37 +275,37 @@ | |||
267 | reg = <0x0207c000 0x4000>; | 275 | reg = <0x0207c000 0x4000>; |
268 | }; | 276 | }; |
269 | 277 | ||
270 | pwm@02080000 { /* PWM1 */ | 278 | pwm1: pwm@02080000 { |
271 | reg = <0x02080000 0x4000>; | 279 | reg = <0x02080000 0x4000>; |
272 | interrupts = <0 83 0x04>; | 280 | interrupts = <0 83 0x04>; |
273 | }; | 281 | }; |
274 | 282 | ||
275 | pwm@02084000 { /* PWM2 */ | 283 | pwm2: pwm@02084000 { |
276 | reg = <0x02084000 0x4000>; | 284 | reg = <0x02084000 0x4000>; |
277 | interrupts = <0 84 0x04>; | 285 | interrupts = <0 84 0x04>; |
278 | }; | 286 | }; |
279 | 287 | ||
280 | pwm@02088000 { /* PWM3 */ | 288 | pwm3: pwm@02088000 { |
281 | reg = <0x02088000 0x4000>; | 289 | reg = <0x02088000 0x4000>; |
282 | interrupts = <0 85 0x04>; | 290 | interrupts = <0 85 0x04>; |
283 | }; | 291 | }; |
284 | 292 | ||
285 | pwm@0208c000 { /* PWM4 */ | 293 | pwm4: pwm@0208c000 { |
286 | reg = <0x0208c000 0x4000>; | 294 | reg = <0x0208c000 0x4000>; |
287 | interrupts = <0 86 0x04>; | 295 | interrupts = <0 86 0x04>; |
288 | }; | 296 | }; |
289 | 297 | ||
290 | flexcan@02090000 { /* CAN1 */ | 298 | can1: flexcan@02090000 { |
291 | reg = <0x02090000 0x4000>; | 299 | reg = <0x02090000 0x4000>; |
292 | interrupts = <0 110 0x04>; | 300 | interrupts = <0 110 0x04>; |
293 | }; | 301 | }; |
294 | 302 | ||
295 | flexcan@02094000 { /* CAN2 */ | 303 | can2: flexcan@02094000 { |
296 | reg = <0x02094000 0x4000>; | 304 | reg = <0x02094000 0x4000>; |
297 | interrupts = <0 111 0x04>; | 305 | interrupts = <0 111 0x04>; |
298 | }; | 306 | }; |
299 | 307 | ||
300 | gpt@02098000 { | 308 | gpt: gpt@02098000 { |
301 | compatible = "fsl,imx6q-gpt"; | 309 | compatible = "fsl,imx6q-gpt"; |
302 | reg = <0x02098000 0x4000>; | 310 | reg = <0x02098000 0x4000>; |
303 | interrupts = <0 55 0x04>; | 311 | interrupts = <0 55 0x04>; |
@@ -373,19 +381,19 @@ | |||
373 | #interrupt-cells = <2>; | 381 | #interrupt-cells = <2>; |
374 | }; | 382 | }; |
375 | 383 | ||
376 | kpp@020b8000 { | 384 | kpp: kpp@020b8000 { |
377 | reg = <0x020b8000 0x4000>; | 385 | reg = <0x020b8000 0x4000>; |
378 | interrupts = <0 82 0x04>; | 386 | interrupts = <0 82 0x04>; |
379 | }; | 387 | }; |
380 | 388 | ||
381 | wdog@020bc000 { /* WDOG1 */ | 389 | wdog1: wdog@020bc000 { |
382 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; | 390 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
383 | reg = <0x020bc000 0x4000>; | 391 | reg = <0x020bc000 0x4000>; |
384 | interrupts = <0 80 0x04>; | 392 | interrupts = <0 80 0x04>; |
385 | clocks = <&clks 0>; | 393 | clocks = <&clks 0>; |
386 | }; | 394 | }; |
387 | 395 | ||
388 | wdog@020c0000 { /* WDOG2 */ | 396 | wdog2: wdog@020c0000 { |
389 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; | 397 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
390 | reg = <0x020c0000 0x4000>; | 398 | reg = <0x020c0000 0x4000>; |
391 | interrupts = <0 81 0x04>; | 399 | interrupts = <0 81 0x04>; |
@@ -447,7 +455,7 @@ | |||
447 | anatop-max-voltage = <2750000>; | 455 | anatop-max-voltage = <2750000>; |
448 | }; | 456 | }; |
449 | 457 | ||
450 | regulator-vddcore@140 { | 458 | reg_cpu: regulator-vddcore@140 { |
451 | compatible = "fsl,anatop-regulator"; | 459 | compatible = "fsl,anatop-regulator"; |
452 | regulator-name = "cpu"; | 460 | regulator-name = "cpu"; |
453 | regulator-min-microvolt = <725000>; | 461 | regulator-min-microvolt = <725000>; |
@@ -505,27 +513,35 @@ | |||
505 | }; | 513 | }; |
506 | 514 | ||
507 | snvs@020cc000 { | 515 | snvs@020cc000 { |
508 | reg = <0x020cc000 0x4000>; | 516 | compatible = "fsl,sec-v4.0-mon", "simple-bus"; |
509 | interrupts = <0 19 0x04 0 20 0x04>; | 517 | #address-cells = <1>; |
518 | #size-cells = <1>; | ||
519 | ranges = <0 0x020cc000 0x4000>; | ||
520 | |||
521 | snvs-rtc-lp@34 { | ||
522 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; | ||
523 | reg = <0x34 0x58>; | ||
524 | interrupts = <0 19 0x04 0 20 0x04>; | ||
525 | }; | ||
510 | }; | 526 | }; |
511 | 527 | ||
512 | epit@020d0000 { /* EPIT1 */ | 528 | epit1: epit@020d0000 { /* EPIT1 */ |
513 | reg = <0x020d0000 0x4000>; | 529 | reg = <0x020d0000 0x4000>; |
514 | interrupts = <0 56 0x04>; | 530 | interrupts = <0 56 0x04>; |
515 | }; | 531 | }; |
516 | 532 | ||
517 | epit@020d4000 { /* EPIT2 */ | 533 | epit2: epit@020d4000 { /* EPIT2 */ |
518 | reg = <0x020d4000 0x4000>; | 534 | reg = <0x020d4000 0x4000>; |
519 | interrupts = <0 57 0x04>; | 535 | interrupts = <0 57 0x04>; |
520 | }; | 536 | }; |
521 | 537 | ||
522 | src@020d8000 { | 538 | src: src@020d8000 { |
523 | compatible = "fsl,imx6q-src"; | 539 | compatible = "fsl,imx6q-src"; |
524 | reg = <0x020d8000 0x4000>; | 540 | reg = <0x020d8000 0x4000>; |
525 | interrupts = <0 91 0x04 0 96 0x04>; | 541 | interrupts = <0 91 0x04 0 96 0x04>; |
526 | }; | 542 | }; |
527 | 543 | ||
528 | gpc@020dc000 { | 544 | gpc: gpc@020dc000 { |
529 | compatible = "fsl,imx6q-gpc"; | 545 | compatible = "fsl,imx6q-gpc"; |
530 | reg = <0x020dc000 0x4000>; | 546 | reg = <0x020dc000 0x4000>; |
531 | interrupts = <0 89 0x04 0 90 0x04>; | 547 | interrupts = <0 89 0x04 0 90 0x04>; |
@@ -536,7 +552,7 @@ | |||
536 | reg = <0x020e0000 0x38>; | 552 | reg = <0x020e0000 0x38>; |
537 | }; | 553 | }; |
538 | 554 | ||
539 | iomuxc@020e0000 { | 555 | iomuxc: iomuxc@020e0000 { |
540 | compatible = "fsl,imx6q-iomuxc"; | 556 | compatible = "fsl,imx6q-iomuxc"; |
541 | reg = <0x020e0000 0x4000>; | 557 | reg = <0x020e0000 0x4000>; |
542 | 558 | ||
@@ -748,17 +764,17 @@ | |||
748 | }; | 764 | }; |
749 | }; | 765 | }; |
750 | 766 | ||
751 | dcic@020e4000 { /* DCIC1 */ | 767 | dcic1: dcic@020e4000 { |
752 | reg = <0x020e4000 0x4000>; | 768 | reg = <0x020e4000 0x4000>; |
753 | interrupts = <0 124 0x04>; | 769 | interrupts = <0 124 0x04>; |
754 | }; | 770 | }; |
755 | 771 | ||
756 | dcic@020e8000 { /* DCIC2 */ | 772 | dcic2: dcic@020e8000 { |
757 | reg = <0x020e8000 0x4000>; | 773 | reg = <0x020e8000 0x4000>; |
758 | interrupts = <0 125 0x04>; | 774 | interrupts = <0 125 0x04>; |
759 | }; | 775 | }; |
760 | 776 | ||
761 | sdma@020ec000 { | 777 | sdma: sdma@020ec000 { |
762 | compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; | 778 | compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; |
763 | reg = <0x020ec000 0x4000>; | 779 | reg = <0x020ec000 0x4000>; |
764 | interrupts = <0 2 0x04>; | 780 | interrupts = <0 2 0x04>; |
@@ -784,7 +800,7 @@ | |||
784 | reg = <0x0217c000 0x4000>; | 800 | reg = <0x0217c000 0x4000>; |
785 | }; | 801 | }; |
786 | 802 | ||
787 | usb@02184000 { /* USB OTG */ | 803 | usbotg: usb@02184000 { |
788 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; | 804 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
789 | reg = <0x02184000 0x200>; | 805 | reg = <0x02184000 0x200>; |
790 | interrupts = <0 43 0x04>; | 806 | interrupts = <0 43 0x04>; |
@@ -794,7 +810,7 @@ | |||
794 | status = "disabled"; | 810 | status = "disabled"; |
795 | }; | 811 | }; |
796 | 812 | ||
797 | usb@02184200 { /* USB1 */ | 813 | usbh1: usb@02184200 { |
798 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; | 814 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
799 | reg = <0x02184200 0x200>; | 815 | reg = <0x02184200 0x200>; |
800 | interrupts = <0 40 0x04>; | 816 | interrupts = <0 40 0x04>; |
@@ -804,7 +820,7 @@ | |||
804 | status = "disabled"; | 820 | status = "disabled"; |
805 | }; | 821 | }; |
806 | 822 | ||
807 | usb@02184400 { /* USB2 */ | 823 | usbh2: usb@02184400 { |
808 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; | 824 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
809 | reg = <0x02184400 0x200>; | 825 | reg = <0x02184400 0x200>; |
810 | interrupts = <0 41 0x04>; | 826 | interrupts = <0 41 0x04>; |
@@ -813,7 +829,7 @@ | |||
813 | status = "disabled"; | 829 | status = "disabled"; |
814 | }; | 830 | }; |
815 | 831 | ||
816 | usb@02184600 { /* USB3 */ | 832 | usbh3: usb@02184600 { |
817 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; | 833 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
818 | reg = <0x02184600 0x200>; | 834 | reg = <0x02184600 0x200>; |
819 | interrupts = <0 42 0x04>; | 835 | interrupts = <0 42 0x04>; |
@@ -822,14 +838,14 @@ | |||
822 | status = "disabled"; | 838 | status = "disabled"; |
823 | }; | 839 | }; |
824 | 840 | ||
825 | usbmisc: usbmisc@02184800 { | 841 | usbmisc: usbmisc: usbmisc@02184800 { |
826 | #index-cells = <1>; | 842 | #index-cells = <1>; |
827 | compatible = "fsl,imx6q-usbmisc"; | 843 | compatible = "fsl,imx6q-usbmisc"; |
828 | reg = <0x02184800 0x200>; | 844 | reg = <0x02184800 0x200>; |
829 | clocks = <&clks 162>; | 845 | clocks = <&clks 162>; |
830 | }; | 846 | }; |
831 | 847 | ||
832 | ethernet@02188000 { | 848 | fec: ethernet@02188000 { |
833 | compatible = "fsl,imx6q-fec"; | 849 | compatible = "fsl,imx6q-fec"; |
834 | reg = <0x02188000 0x4000>; | 850 | reg = <0x02188000 0x4000>; |
835 | interrupts = <0 118 0x04 0 119 0x04>; | 851 | interrupts = <0 118 0x04 0 119 0x04>; |
@@ -843,43 +859,47 @@ | |||
843 | interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; | 859 | interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; |
844 | }; | 860 | }; |
845 | 861 | ||
846 | usdhc@02190000 { /* uSDHC1 */ | 862 | usdhc1: usdhc@02190000 { |
847 | compatible = "fsl,imx6q-usdhc"; | 863 | compatible = "fsl,imx6q-usdhc"; |
848 | reg = <0x02190000 0x4000>; | 864 | reg = <0x02190000 0x4000>; |
849 | interrupts = <0 22 0x04>; | 865 | interrupts = <0 22 0x04>; |
850 | clocks = <&clks 163>, <&clks 163>, <&clks 163>; | 866 | clocks = <&clks 163>, <&clks 163>, <&clks 163>; |
851 | clock-names = "ipg", "ahb", "per"; | 867 | clock-names = "ipg", "ahb", "per"; |
868 | bus-width = <4>; | ||
852 | status = "disabled"; | 869 | status = "disabled"; |
853 | }; | 870 | }; |
854 | 871 | ||
855 | usdhc@02194000 { /* uSDHC2 */ | 872 | usdhc2: usdhc@02194000 { |
856 | compatible = "fsl,imx6q-usdhc"; | 873 | compatible = "fsl,imx6q-usdhc"; |
857 | reg = <0x02194000 0x4000>; | 874 | reg = <0x02194000 0x4000>; |
858 | interrupts = <0 23 0x04>; | 875 | interrupts = <0 23 0x04>; |
859 | clocks = <&clks 164>, <&clks 164>, <&clks 164>; | 876 | clocks = <&clks 164>, <&clks 164>, <&clks 164>; |
860 | clock-names = "ipg", "ahb", "per"; | 877 | clock-names = "ipg", "ahb", "per"; |
878 | bus-width = <4>; | ||
861 | status = "disabled"; | 879 | status = "disabled"; |
862 | }; | 880 | }; |
863 | 881 | ||
864 | usdhc@02198000 { /* uSDHC3 */ | 882 | usdhc3: usdhc@02198000 { |
865 | compatible = "fsl,imx6q-usdhc"; | 883 | compatible = "fsl,imx6q-usdhc"; |
866 | reg = <0x02198000 0x4000>; | 884 | reg = <0x02198000 0x4000>; |
867 | interrupts = <0 24 0x04>; | 885 | interrupts = <0 24 0x04>; |
868 | clocks = <&clks 165>, <&clks 165>, <&clks 165>; | 886 | clocks = <&clks 165>, <&clks 165>, <&clks 165>; |
869 | clock-names = "ipg", "ahb", "per"; | 887 | clock-names = "ipg", "ahb", "per"; |
888 | bus-width = <4>; | ||
870 | status = "disabled"; | 889 | status = "disabled"; |
871 | }; | 890 | }; |
872 | 891 | ||
873 | usdhc@0219c000 { /* uSDHC4 */ | 892 | usdhc4: usdhc@0219c000 { |
874 | compatible = "fsl,imx6q-usdhc"; | 893 | compatible = "fsl,imx6q-usdhc"; |
875 | reg = <0x0219c000 0x4000>; | 894 | reg = <0x0219c000 0x4000>; |
876 | interrupts = <0 25 0x04>; | 895 | interrupts = <0 25 0x04>; |
877 | clocks = <&clks 166>, <&clks 166>, <&clks 166>; | 896 | clocks = <&clks 166>, <&clks 166>, <&clks 166>; |
878 | clock-names = "ipg", "ahb", "per"; | 897 | clock-names = "ipg", "ahb", "per"; |
898 | bus-width = <4>; | ||
879 | status = "disabled"; | 899 | status = "disabled"; |
880 | }; | 900 | }; |
881 | 901 | ||
882 | i2c@021a0000 { /* I2C1 */ | 902 | i2c1: i2c@021a0000 { |
883 | #address-cells = <1>; | 903 | #address-cells = <1>; |
884 | #size-cells = <0>; | 904 | #size-cells = <0>; |
885 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; | 905 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
@@ -889,7 +909,7 @@ | |||
889 | status = "disabled"; | 909 | status = "disabled"; |
890 | }; | 910 | }; |
891 | 911 | ||
892 | i2c@021a4000 { /* I2C2 */ | 912 | i2c2: i2c@021a4000 { |
893 | #address-cells = <1>; | 913 | #address-cells = <1>; |
894 | #size-cells = <0>; | 914 | #size-cells = <0>; |
895 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; | 915 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
@@ -899,7 +919,7 @@ | |||
899 | status = "disabled"; | 919 | status = "disabled"; |
900 | }; | 920 | }; |
901 | 921 | ||
902 | i2c@021a8000 { /* I2C3 */ | 922 | i2c3: i2c@021a8000 { |
903 | #address-cells = <1>; | 923 | #address-cells = <1>; |
904 | #size-cells = <0>; | 924 | #size-cells = <0>; |
905 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; | 925 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
@@ -913,12 +933,12 @@ | |||
913 | reg = <0x021ac000 0x4000>; | 933 | reg = <0x021ac000 0x4000>; |
914 | }; | 934 | }; |
915 | 935 | ||
916 | mmdc@021b0000 { /* MMDC0 */ | 936 | mmdc0: mmdc@021b0000 { /* MMDC0 */ |
917 | compatible = "fsl,imx6q-mmdc"; | 937 | compatible = "fsl,imx6q-mmdc"; |
918 | reg = <0x021b0000 0x4000>; | 938 | reg = <0x021b0000 0x4000>; |
919 | }; | 939 | }; |
920 | 940 | ||
921 | mmdc@021b4000 { /* MMDC1 */ | 941 | mmdc1: mmdc@021b4000 { /* MMDC1 */ |
922 | reg = <0x021b4000 0x4000>; | 942 | reg = <0x021b4000 0x4000>; |
923 | }; | 943 | }; |
924 | 944 | ||
@@ -946,7 +966,7 @@ | |||
946 | interrupts = <0 109 0x04>; | 966 | interrupts = <0 109 0x04>; |
947 | }; | 967 | }; |
948 | 968 | ||
949 | audmux@021d8000 { | 969 | audmux: audmux@021d8000 { |
950 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; | 970 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; |
951 | reg = <0x021d8000 0x4000>; | 971 | reg = <0x021d8000 0x4000>; |
952 | status = "disabled"; | 972 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi new file mode 100644 index 000000000000..d6c9d65cbaeb --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi | |||
@@ -0,0 +1,44 @@ | |||
1 | / { | ||
2 | ocp@f1000000 { | ||
3 | pinctrl: pinctrl@10000 { | ||
4 | compatible = "marvell,88f6281-pinctrl"; | ||
5 | reg = <0x10000 0x20>; | ||
6 | |||
7 | pmx_nand: pmx-nand { | ||
8 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", | ||
9 | "mpp4", "mpp5", "mpp18", | ||
10 | "mpp19"; | ||
11 | marvell,function = "nand"; | ||
12 | }; | ||
13 | pmx_sata0: pmx-sata0 { | ||
14 | marvell,pins = "mpp5", "mpp21", "mpp23"; | ||
15 | marvell,function = "sata0"; | ||
16 | }; | ||
17 | pmx_sata1: pmx-sata1 { | ||
18 | marvell,pins = "mpp4", "mpp20", "mpp22"; | ||
19 | marvell,function = "sata1"; | ||
20 | }; | ||
21 | pmx_spi: pmx-spi { | ||
22 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; | ||
23 | marvell,function = "spi"; | ||
24 | }; | ||
25 | pmx_twsi0: pmx-twsi0 { | ||
26 | marvell,pins = "mpp8", "mpp9"; | ||
27 | marvell,function = "twsi0"; | ||
28 | }; | ||
29 | pmx_uart0: pmx-uart0 { | ||
30 | marvell,pins = "mpp10", "mpp11"; | ||
31 | marvell,function = "uart0"; | ||
32 | }; | ||
33 | pmx_uart1: pmx-uart1 { | ||
34 | marvell,pins = "mpp13", "mpp14"; | ||
35 | marvell,function = "uart1"; | ||
36 | }; | ||
37 | pmx_sdio: pmx-sdio { | ||
38 | marvell,pins = "mpp12", "mpp13", "mpp14", | ||
39 | "mpp15", "mpp16", "mpp17"; | ||
40 | marvell,function = "sdio"; | ||
41 | }; | ||
42 | }; | ||
43 | }; | ||
44 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi new file mode 100644 index 000000000000..9ae2004d5675 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi | |||
@@ -0,0 +1,45 @@ | |||
1 | / { | ||
2 | ocp@f1000000 { | ||
3 | |||
4 | pinctrl: pinctrl@10000 { | ||
5 | compatible = "marvell,88f6282-pinctrl"; | ||
6 | reg = <0x10000 0x20>; | ||
7 | |||
8 | pmx_sata0: pmx-sata0 { | ||
9 | marvell,pins = "mpp5", "mpp21", "mpp23"; | ||
10 | marvell,function = "sata0"; | ||
11 | }; | ||
12 | pmx_sata1: pmx-sata1 { | ||
13 | marvell,pins = "mpp4", "mpp20", "mpp22"; | ||
14 | marvell,function = "sata1"; | ||
15 | }; | ||
16 | pmx_spi: pmx-spi { | ||
17 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; | ||
18 | marvell,function = "spi"; | ||
19 | }; | ||
20 | pmx_twsi0: pmx-twsi0 { | ||
21 | marvell,pins = "mpp8", "mpp9"; | ||
22 | marvell,function = "twsi0"; | ||
23 | }; | ||
24 | pmx_uart0: pmx-uart0 { | ||
25 | marvell,pins = "mpp10", "mpp11"; | ||
26 | marvell,function = "uart0"; | ||
27 | }; | ||
28 | |||
29 | pmx_uart1: pmx-uart1 { | ||
30 | marvell,pins = "mpp13", "mpp14"; | ||
31 | marvell,function = "uart1"; | ||
32 | }; | ||
33 | }; | ||
34 | |||
35 | i2c@11100 { | ||
36 | compatible = "marvell,mv64xxx-i2c"; | ||
37 | reg = <0x11100 0x20>; | ||
38 | #address-cells = <1>; | ||
39 | #size-cells = <0>; | ||
40 | interrupts = <32>; | ||
41 | clock-frequency = <100000>; | ||
42 | status = "disabled"; | ||
43 | }; | ||
44 | }; | ||
45 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi new file mode 100644 index 000000000000..3271e4c8ea07 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi | |||
@@ -0,0 +1,31 @@ | |||
1 | / { | ||
2 | ocp@f1000000 { | ||
3 | pinctrl: pinctrl@10000 { | ||
4 | compatible = "marvell,98dx4122-pinctrl"; | ||
5 | reg = <0x10000 0x20>; | ||
6 | |||
7 | pmx_nand: pmx-nand { | ||
8 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", | ||
9 | "mpp4", "mpp5", "mpp18", | ||
10 | "mpp19"; | ||
11 | marvell,function = "nand"; | ||
12 | }; | ||
13 | pmx_spi: pmx-spi { | ||
14 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; | ||
15 | marvell,function = "spi"; | ||
16 | }; | ||
17 | pmx_twsi0: pmx-twsi0 { | ||
18 | marvell,pins = "mpp8", "mpp9"; | ||
19 | marvell,function = "twsi0"; | ||
20 | }; | ||
21 | pmx_uart0: pmx-uart0 { | ||
22 | marvell,pins = "mpp10", "mpp11"; | ||
23 | marvell,function = "uart0"; | ||
24 | }; | ||
25 | pmx_uart1: pmx-uart1 { | ||
26 | marvell,pins = "mpp13", "mpp14"; | ||
27 | marvell,function = "uart1"; | ||
28 | }; | ||
29 | }; | ||
30 | }; | ||
31 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi index 9b32d0272825..6875ac00c174 100644 --- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi +++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi | |||
@@ -1,4 +1,5 @@ | |||
1 | /include/ "kirkwood.dtsi" | 1 | /include/ "kirkwood.dtsi" |
2 | /include/ "kirkwood-6281.dtsi" | ||
2 | 3 | ||
3 | / { | 4 | / { |
4 | model = "D-Link DNS NASes (kirkwood-based)"; | 5 | model = "D-Link DNS NASes (kirkwood-based)"; |
@@ -35,7 +36,116 @@ | |||
35 | 6000 2>; | 36 | 6000 2>; |
36 | }; | 37 | }; |
37 | 38 | ||
39 | gpio_poweroff { | ||
40 | compatible = "gpio-poweroff"; | ||
41 | gpios = <&gpio1 4 0>; | ||
42 | }; | ||
43 | |||
38 | ocp@f1000000 { | 44 | ocp@f1000000 { |
45 | pinctrl: pinctrl@10000 { | ||
46 | |||
47 | pinctrl-0 = < &pmx_nand &pmx_uart1 | ||
48 | &pmx_sata0 &pmx_sata1 | ||
49 | &pmx_led_power | ||
50 | &pmx_led_red_right_hdd | ||
51 | &pmx_led_red_left_hdd | ||
52 | &pmx_led_red_usb_325 | ||
53 | &pmx_button_power | ||
54 | &pmx_led_red_usb_320 | ||
55 | &pmx_power_off &pmx_power_back_on | ||
56 | &pmx_power_sata0 &pmx_power_sata1 | ||
57 | &pmx_present_sata0 &pmx_present_sata1 | ||
58 | &pmx_led_white_usb &pmx_fan_tacho | ||
59 | &pmx_fan_high_speed &pmx_fan_low_speed | ||
60 | &pmx_button_unmount &pmx_button_reset | ||
61 | &pmx_temp_alarm >; | ||
62 | pinctrl-names = "default"; | ||
63 | |||
64 | pmx_sata0: pmx-sata0 { | ||
65 | marvell,pins = "mpp20"; | ||
66 | marvell,function = "sata1"; | ||
67 | }; | ||
68 | pmx_sata1: pmx-sata1 { | ||
69 | marvell,pins = "mpp21"; | ||
70 | marvell,function = "sata0"; | ||
71 | }; | ||
72 | pmx_led_power: pmx-led-power { | ||
73 | marvell,pins = "mpp26"; | ||
74 | marvell,function = "gpio"; | ||
75 | }; | ||
76 | pmx_led_red_right_hdd: pmx-led-red-right-hdd { | ||
77 | marvell,pins = "mpp27"; | ||
78 | marvell,function = "gpio"; | ||
79 | }; | ||
80 | pmx_led_red_left_hdd: pmx-led-red-left-hdd { | ||
81 | marvell,pins = "mpp28"; | ||
82 | marvell,function = "gpio"; | ||
83 | }; | ||
84 | pmx_led_red_usb_325: pmx-led-red-usb-325 { | ||
85 | marvell,pins = "mpp29"; | ||
86 | marvell,function = "gpio"; | ||
87 | }; | ||
88 | pmx_button_power: pmx-button-power { | ||
89 | marvell,pins = "mpp34"; | ||
90 | marvell,function = "gpio"; | ||
91 | }; | ||
92 | pmx_led_red_usb_320: pmx-led-red-usb-320 { | ||
93 | marvell,pins = "mpp35"; | ||
94 | marvell,function = "gpio"; | ||
95 | }; | ||
96 | pmx_power_off: pmx-power-off { | ||
97 | marvell,pins = "mpp36"; | ||
98 | marvell,function = "gpio"; | ||
99 | }; | ||
100 | pmx_power_back_on: pmx-power-back-on { | ||
101 | marvell,pins = "mpp37"; | ||
102 | marvell,function = "gpio"; | ||
103 | }; | ||
104 | pmx_power_sata0: pmx-power-sata0 { | ||
105 | marvell,pins = "mpp39"; | ||
106 | marvell,function = "gpio"; | ||
107 | }; | ||
108 | pmx_power_sata1: pmx-power-sata1 { | ||
109 | marvell,pins = "mpp40"; | ||
110 | marvell,function = "gpio"; | ||
111 | }; | ||
112 | pmx_present_sata0: pmx-present-sata0 { | ||
113 | marvell,pins = "mpp41"; | ||
114 | marvell,function = "gpio"; | ||
115 | }; | ||
116 | pmx_present_sata1: pmx-present-sata1 { | ||
117 | marvell,pins = "mpp42"; | ||
118 | marvell,function = "gpio"; | ||
119 | }; | ||
120 | pmx_led_white_usb: pmx-led-white-usb { | ||
121 | marvell,pins = "mpp43"; | ||
122 | marvell,function = "gpio"; | ||
123 | }; | ||
124 | pmx_fan_tacho: pmx-fan-tacho { | ||
125 | marvell,pins = "mpp44"; | ||
126 | marvell,function = "gpio"; | ||
127 | }; | ||
128 | pmx_fan_high_speed: pmx-fan-high-speed { | ||
129 | marvell,pins = "mpp45"; | ||
130 | marvell,function = "gpio"; | ||
131 | }; | ||
132 | pmx_fan_low_speed: pmx-fan-low-speed { | ||
133 | marvell,pins = "mpp46"; | ||
134 | marvell,function = "gpio"; | ||
135 | }; | ||
136 | pmx_button_unmount: pmx-button-unmount { | ||
137 | marvell,pins = "mpp47"; | ||
138 | marvell,function = "gpio"; | ||
139 | }; | ||
140 | pmx_button_reset: pmx-button-reset { | ||
141 | marvell,pins = "mpp48"; | ||
142 | marvell,function = "gpio"; | ||
143 | }; | ||
144 | pmx_temp_alarm: pmx-temp-alarm { | ||
145 | marvell,pins = "mpp49"; | ||
146 | marvell,function = "gpio"; | ||
147 | }; | ||
148 | }; | ||
39 | sata@80000 { | 149 | sata@80000 { |
40 | status = "okay"; | 150 | status = "okay"; |
41 | nr-ports = <2>; | 151 | nr-ports = <2>; |
@@ -43,6 +153,7 @@ | |||
43 | 153 | ||
44 | nand@3000000 { | 154 | nand@3000000 { |
45 | status = "okay"; | 155 | status = "okay"; |
156 | chip-delay = <35>; | ||
46 | 157 | ||
47 | partition@0 { | 158 | partition@0 { |
48 | label = "u-boot"; | 159 | label = "u-boot"; |
@@ -76,4 +187,33 @@ | |||
76 | }; | 187 | }; |
77 | }; | 188 | }; |
78 | }; | 189 | }; |
190 | |||
191 | regulators { | ||
192 | compatible = "simple-bus"; | ||
193 | #address-cells = <1>; | ||
194 | #size-cells = <0>; | ||
195 | |||
196 | sata0_power: regulator@1 { | ||
197 | compatible = "regulator-fixed"; | ||
198 | reg = <1>; | ||
199 | regulator-name = "SATA0 Power"; | ||
200 | regulator-min-microvolt = <5000000>; | ||
201 | regulator-max-microvolt = <5000000>; | ||
202 | enable-active-high; | ||
203 | regulator-always-on; | ||
204 | regulator-boot-on; | ||
205 | gpio = <&gpio1 7 0>; | ||
206 | }; | ||
207 | sata1_power: regulator@2 { | ||
208 | compatible = "regulator-fixed"; | ||
209 | reg = <2>; | ||
210 | regulator-name = "SATA1 Power"; | ||
211 | regulator-min-microvolt = <5000000>; | ||
212 | regulator-max-microvolt = <5000000>; | ||
213 | enable-active-high; | ||
214 | regulator-always-on; | ||
215 | regulator-boot-on; | ||
216 | gpio = <&gpio1 8 0>; | ||
217 | }; | ||
218 | }; | ||
79 | }; | 219 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts index 08a582414b88..2e3dd34e21a5 100644 --- a/arch/arm/boot/dts/kirkwood-dockstar.dts +++ b/arch/arm/boot/dts/kirkwood-dockstar.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "Seagate FreeAgent Dockstar"; | 7 | model = "Seagate FreeAgent Dockstar"; |
@@ -16,6 +17,25 @@ | |||
16 | }; | 17 | }; |
17 | 18 | ||
18 | ocp@f1000000 { | 19 | ocp@f1000000 { |
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_usb_power_enable | ||
23 | &pmx_led_green &pmx_led_orange >; | ||
24 | pinctrl-names = "default"; | ||
25 | |||
26 | pmx_usb_power_enable: pmx-usb-power-enable { | ||
27 | marvell,pins = "mpp29"; | ||
28 | marvell,function = "gpio"; | ||
29 | }; | ||
30 | pmx_led_green: pmx-led-green { | ||
31 | marvell,pins = "mpp46"; | ||
32 | marvell,function = "gpio"; | ||
33 | }; | ||
34 | pmx_led_orange: pmx-led-orange { | ||
35 | marvell,pins = "mpp47"; | ||
36 | marvell,function = "gpio"; | ||
37 | }; | ||
38 | }; | ||
19 | serial@12000 { | 39 | serial@12000 { |
20 | clock-frequency = <200000000>; | 40 | clock-frequency = <200000000>; |
21 | status = "ok"; | 41 | status = "ok"; |
@@ -54,4 +74,21 @@ | |||
54 | gpios = <&gpio1 15 1>; | 74 | gpios = <&gpio1 15 1>; |
55 | }; | 75 | }; |
56 | }; | 76 | }; |
77 | regulators { | ||
78 | compatible = "simple-bus"; | ||
79 | #address-cells = <1>; | ||
80 | #size-cells = <0>; | ||
81 | |||
82 | usb_power: regulator@1 { | ||
83 | compatible = "regulator-fixed"; | ||
84 | reg = <1>; | ||
85 | regulator-name = "USB Power"; | ||
86 | regulator-min-microvolt = <5000000>; | ||
87 | regulator-max-microvolt = <5000000>; | ||
88 | enable-active-high; | ||
89 | regulator-always-on; | ||
90 | regulator-boot-on; | ||
91 | gpio = <&gpio0 29 0>; | ||
92 | }; | ||
93 | }; | ||
57 | }; | 94 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts index 26e281fbf6bc..f2d386c95b07 100644 --- a/arch/arm/boot/dts/kirkwood-dreamplug.dts +++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "Globalscale Technologies Dreamplug"; | 7 | model = "Globalscale Technologies Dreamplug"; |
@@ -16,6 +17,26 @@ | |||
16 | }; | 17 | }; |
17 | 18 | ||
18 | ocp@f1000000 { | 19 | ocp@f1000000 { |
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_spi | ||
23 | &pmx_led_bluetooth &pmx_led_wifi | ||
24 | &pmx_led_wifi_ap >; | ||
25 | pinctrl-names = "default"; | ||
26 | |||
27 | pmx_led_bluetooth: pmx-led-bluetooth { | ||
28 | marvell,pins = "mpp47"; | ||
29 | marvell,function = "gpio"; | ||
30 | }; | ||
31 | pmx_led_wifi: pmx-led-wifi { | ||
32 | marvell,pins = "mpp48"; | ||
33 | marvell,function = "gpio"; | ||
34 | }; | ||
35 | pmx_led_wifi_ap: pmx-led-wifi-ap { | ||
36 | marvell,pins = "mpp49"; | ||
37 | marvell,function = "gpio"; | ||
38 | }; | ||
39 | }; | ||
19 | serial@12000 { | 40 | serial@12000 { |
20 | clock-frequency = <200000000>; | 41 | clock-frequency = <200000000>; |
21 | status = "ok"; | 42 | status = "ok"; |
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts index 7c8238fbb6f9..1b133e0c566e 100644 --- a/arch/arm/boot/dts/kirkwood-goflexnet.dts +++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "Seagate GoFlex Net"; | 7 | model = "Seagate GoFlex Net"; |
@@ -16,6 +17,61 @@ | |||
16 | }; | 17 | }; |
17 | 18 | ||
18 | ocp@f1000000 { | 19 | ocp@f1000000 { |
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange | ||
23 | &pmx_led_left_cap_0 &pmx_led_left_cap_1 | ||
24 | &pmx_led_left_cap_2 &pmx_led_left_cap_3 | ||
25 | &pmx_led_right_cap_0 &pmx_led_right_cap_1 | ||
26 | &pmx_led_right_cap_2 &pmx_led_right_cap_3 | ||
27 | >; | ||
28 | pinctrl-names = "default"; | ||
29 | |||
30 | pmx_usb_power_enable: pmx-usb-power-enable { | ||
31 | marvell,pins = "mpp29"; | ||
32 | marvell,function = "gpio"; | ||
33 | }; | ||
34 | pmx_led_right_cap_0: pmx-led_right_cap_0 { | ||
35 | marvell,pins = "mpp38"; | ||
36 | marvell,function = "gpio"; | ||
37 | }; | ||
38 | pmx_led_right_cap_1: pmx-led_right_cap_1 { | ||
39 | marvell,pins = "mpp39"; | ||
40 | marvell,function = "gpio"; | ||
41 | }; | ||
42 | pmx_led_right_cap_2: pmx-led_right_cap_2 { | ||
43 | marvell,pins = "mpp40"; | ||
44 | marvell,function = "gpio"; | ||
45 | }; | ||
46 | pmx_led_right_cap_3: pmx-led_right_cap_3 { | ||
47 | marvell,pins = "mpp41"; | ||
48 | marvell,function = "gpio"; | ||
49 | }; | ||
50 | pmx_led_left_cap_0: pmx-led_left_cap_0 { | ||
51 | marvell,pins = "mpp42"; | ||
52 | marvell,function = "gpio"; | ||
53 | }; | ||
54 | pmx_led_left_cap_1: pmx-led_left_cap_1 { | ||
55 | marvell,pins = "mpp43"; | ||
56 | marvell,function = "gpio"; | ||
57 | }; | ||
58 | pmx_led_left_cap_2: pmx-led_left_cap_2 { | ||
59 | marvell,pins = "mpp44"; | ||
60 | marvell,function = "gpio"; | ||
61 | }; | ||
62 | pmx_led_left_cap_3: pmx-led_left_cap_3 { | ||
63 | marvell,pins = "mpp45"; | ||
64 | marvell,function = "gpio"; | ||
65 | }; | ||
66 | pmx_led_green: pmx-led_green { | ||
67 | marvell,pins = "mpp46"; | ||
68 | marvell,function = "gpio"; | ||
69 | }; | ||
70 | pmx_led_orange: pmx-led_orange { | ||
71 | marvell,pins = "mpp47"; | ||
72 | marvell,function = "gpio"; | ||
73 | }; | ||
74 | }; | ||
19 | serial@12000 { | 75 | serial@12000 { |
20 | clock-frequency = <200000000>; | 76 | clock-frequency = <200000000>; |
21 | status = "ok"; | 77 | status = "ok"; |
@@ -96,4 +152,21 @@ | |||
96 | gpios = <&gpio1 9 0>; | 152 | gpios = <&gpio1 9 0>; |
97 | }; | 153 | }; |
98 | }; | 154 | }; |
155 | regulators { | ||
156 | compatible = "simple-bus"; | ||
157 | #address-cells = <1>; | ||
158 | #size-cells = <0>; | ||
159 | |||
160 | usb_power: regulator@1 { | ||
161 | compatible = "regulator-fixed"; | ||
162 | reg = <1>; | ||
163 | regulator-name = "USB Power"; | ||
164 | regulator-min-microvolt = <5000000>; | ||
165 | regulator-max-microvolt = <5000000>; | ||
166 | enable-active-high; | ||
167 | regulator-always-on; | ||
168 | regulator-boot-on; | ||
169 | gpio = <&gpio0 29 0>; | ||
170 | }; | ||
171 | }; | ||
99 | }; | 172 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts index 66794ed75ff1..71902da33d63 100644 --- a/arch/arm/boot/dts/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; | 7 | model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; |
@@ -16,6 +17,39 @@ | |||
16 | }; | 17 | }; |
17 | 18 | ||
18 | ocp@f1000000 { | 19 | ocp@f1000000 { |
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_nand | ||
23 | &pmx_led_os_red &pmx_power_off | ||
24 | &pmx_led_os_green &pmx_led_usb_transfer | ||
25 | &pmx_button_reset &pmx_button_usb_copy >; | ||
26 | pinctrl-names = "default"; | ||
27 | |||
28 | pmx_led_os_red: pmx-led-os-red { | ||
29 | marvell,pins = "mpp22"; | ||
30 | marvell,function = "gpio"; | ||
31 | }; | ||
32 | pmx_power_off: pmx-power-off { | ||
33 | marvell,pins = "mpp24"; | ||
34 | marvell,function = "gpio"; | ||
35 | }; | ||
36 | pmx_led_os_green: pmx-led-os-green { | ||
37 | marvell,pins = "mpp25"; | ||
38 | marvell,function = "gpio"; | ||
39 | }; | ||
40 | pmx_led_usb_transfer: pmx-led-usb-transfer { | ||
41 | marvell,pins = "mpp27"; | ||
42 | marvell,function = "gpio"; | ||
43 | }; | ||
44 | pmx_button_reset: pmx-button-reset { | ||
45 | marvell,pins = "mpp28"; | ||
46 | marvell,function = "gpio"; | ||
47 | }; | ||
48 | pmx_button_usb_copy: pmx-button-usb-copy { | ||
49 | marvell,pins = "mpp29"; | ||
50 | marvell,function = "gpio"; | ||
51 | }; | ||
52 | }; | ||
19 | serial@12000 { | 53 | serial@12000 { |
20 | clock-frequency = <200000000>; | 54 | clock-frequency = <200000000>; |
21 | status = "okay"; | 55 | status = "okay"; |
@@ -79,4 +113,10 @@ | |||
79 | gpios = <&gpio0 27 0>; | 113 | gpios = <&gpio0 27 0>; |
80 | }; | 114 | }; |
81 | }; | 115 | }; |
116 | gpio_poweroff { | ||
117 | compatible = "gpio-poweroff"; | ||
118 | gpios = <&gpio0 24 0>; | ||
119 | }; | ||
120 | |||
121 | |||
82 | }; | 122 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts index d97cd9d4753e..504f16be8b54 100644 --- a/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "Iomega Iconnect"; | 7 | model = "Iomega Iconnect"; |
@@ -18,6 +19,56 @@ | |||
18 | }; | 19 | }; |
19 | 20 | ||
20 | ocp@f1000000 { | 21 | ocp@f1000000 { |
22 | pinctrl: pinctrl@10000 { | ||
23 | |||
24 | pinctrl-0 = < &pmx_gpio_12 &pmx_gpio_35 | ||
25 | &pmx_gpio_41 &pmx_gpio_42 | ||
26 | &pmx_gpio_43 &pmx_gpio_44 | ||
27 | &pmx_gpio_45 &pmx_gpio_46 | ||
28 | &pmx_gpio_47 &pmx_gpio_48 >; | ||
29 | pinctrl-names = "default"; | ||
30 | |||
31 | pmx_gpio_12: pmx-gpio-12 { | ||
32 | marvell,pins = "mpp12"; | ||
33 | marvell,function = "gpio"; | ||
34 | }; | ||
35 | pmx_gpio_35: pmx-gpio-35 { | ||
36 | marvell,pins = "mpp35"; | ||
37 | marvell,function = "gpio"; | ||
38 | }; | ||
39 | pmx_gpio_41: pmx-gpio-41 { | ||
40 | marvell,pins = "mpp41"; | ||
41 | marvell,function = "gpio"; | ||
42 | }; | ||
43 | pmx_gpio_42: pmx-gpio-42 { | ||
44 | marvell,pins = "mpp42"; | ||
45 | marvell,function = "gpio"; | ||
46 | }; | ||
47 | pmx_gpio_43: pmx-gpio-43 { | ||
48 | marvell,pins = "mpp43"; | ||
49 | marvell,function = "gpio"; | ||
50 | }; | ||
51 | pmx_gpio_44: pmx-gpio-44 { | ||
52 | marvell,pins = "mpp44"; | ||
53 | marvell,function = "gpio"; | ||
54 | }; | ||
55 | pmx_gpio_45: pmx-gpio-45 { | ||
56 | marvell,pins = "mpp45"; | ||
57 | marvell,function = "gpio"; | ||
58 | }; | ||
59 | pmx_gpio_46: pmx-gpio-46 { | ||
60 | marvell,pins = "mpp46"; | ||
61 | marvell,function = "gpio"; | ||
62 | }; | ||
63 | pmx_gpio_47: pmx-gpio-47 { | ||
64 | marvell,pins = "mpp47"; | ||
65 | marvell,function = "gpio"; | ||
66 | }; | ||
67 | pmx_gpio_48: pmx-gpio-48 { | ||
68 | marvell,pins = "mpp48"; | ||
69 | marvell,function = "gpio"; | ||
70 | }; | ||
71 | }; | ||
21 | i2c@11000 { | 72 | i2c@11000 { |
22 | status = "okay"; | 73 | status = "okay"; |
23 | 74 | ||
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index 865aeec40a26..6cae4599c4b3 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "Iomega StorCenter ix2-200"; | 7 | model = "Iomega StorCenter ix2-200"; |
@@ -16,6 +17,94 @@ | |||
16 | }; | 17 | }; |
17 | 18 | ||
18 | ocp@f1000000 { | 19 | ocp@f1000000 { |
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_button_reset &pmx_button_power | ||
23 | &pmx_led_backup &pmx_led_power | ||
24 | &pmx_button_otb &pmx_led_rebuild | ||
25 | &pmx_led_health | ||
26 | &pmx_led_sata_brt_ctrl_1 | ||
27 | &pmx_led_sata_brt_ctrl_2 | ||
28 | &pmx_led_backup_brt_ctrl_1 | ||
29 | &pmx_led_backup_brt_ctrl_2 | ||
30 | &pmx_led_power_brt_ctrl_1 | ||
31 | &pmx_led_power_brt_ctrl_2 | ||
32 | &pmx_led_health_brt_ctrl_1 | ||
33 | &pmx_led_health_brt_ctrl_2 | ||
34 | &pmx_led_rebuild_brt_ctrl_1 | ||
35 | &pmx_led_rebuild_brt_ctrl_2 >; | ||
36 | pinctrl-names = "default"; | ||
37 | |||
38 | pmx_button_reset: pmx-button-reset { | ||
39 | marvell,pins = "mpp12"; | ||
40 | marvell,function = "gpio"; | ||
41 | }; | ||
42 | pmx_button_power: pmx-button-power { | ||
43 | marvell,pins = "mpp14"; | ||
44 | marvell,function = "gpio"; | ||
45 | }; | ||
46 | pmx_led_backup: pmx-led-backup { | ||
47 | marvell,pins = "mpp15"; | ||
48 | marvell,function = "gpio"; | ||
49 | }; | ||
50 | pmx_led_power: pmx-led-power { | ||
51 | marvell,pins = "mpp16"; | ||
52 | marvell,function = "gpio"; | ||
53 | }; | ||
54 | pmx_button_otb: pmx-button-otb { | ||
55 | marvell,pins = "mpp35"; | ||
56 | marvell,function = "gpio"; | ||
57 | }; | ||
58 | pmx_led_rebuild: pmx-led-rebuild { | ||
59 | marvell,pins = "mpp36"; | ||
60 | marvell,function = "gpio"; | ||
61 | }; | ||
62 | pmx_led_health: pmx-led_health { | ||
63 | marvell,pins = "mpp37"; | ||
64 | marvell,function = "gpio"; | ||
65 | }; | ||
66 | pmx_led_sata_brt_ctrl_1: pmx-led-sata-brt-ctrl-1 { | ||
67 | marvell,pins = "mpp38"; | ||
68 | marvell,function = "gpio"; | ||
69 | }; | ||
70 | pmx_led_sata_brt_ctrl_2: pmx-led-sata-brt-ctrl-2 { | ||
71 | marvell,pins = "mpp39"; | ||
72 | marvell,function = "gpio"; | ||
73 | }; | ||
74 | pmx_led_backup_brt_ctrl_1: pmx-led-backup-brt-ctrl-1 { | ||
75 | marvell,pins = "mpp40"; | ||
76 | marvell,function = "gpio"; | ||
77 | }; | ||
78 | pmx_led_backup_brt_ctrl_2: pmx-led-backup-brt-ctrl-2 { | ||
79 | marvell,pins = "mpp41"; | ||
80 | marvell,function = "gpio"; | ||
81 | }; | ||
82 | pmx_led_power_brt_ctrl_1: pmx-led-power-brt-ctrl-1 { | ||
83 | marvell,pins = "mpp42"; | ||
84 | marvell,function = "gpio"; | ||
85 | }; | ||
86 | pmx_led_power_brt_ctrl_2: pmx-led-power-brt-ctrl-2 { | ||
87 | marvell,pins = "mpp43"; | ||
88 | marvell,function = "gpio"; | ||
89 | }; | ||
90 | pmx_led_health_brt_ctrl_1: pmx-led-health-brt-ctrl-1 { | ||
91 | marvell,pins = "mpp44"; | ||
92 | marvell,function = "gpio"; | ||
93 | }; | ||
94 | pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 { | ||
95 | marvell,pins = "mpp45"; | ||
96 | marvell,function = "gpio"; | ||
97 | }; | ||
98 | pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 { | ||
99 | marvell,pins = "mpp44"; | ||
100 | marvell,function = "gpio"; | ||
101 | }; | ||
102 | pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 { | ||
103 | marvell,pins = "mpp45"; | ||
104 | marvell,function = "gpio"; | ||
105 | }; | ||
106 | |||
107 | }; | ||
19 | i2c@11000 { | 108 | i2c@11000 { |
20 | status = "okay"; | 109 | status = "okay"; |
21 | 110 | ||
diff --git a/arch/arm/boot/dts/kirkwood-is2.dts b/arch/arm/boot/dts/kirkwood-is2.dts new file mode 100644 index 000000000000..0bdce0ad7277 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-is2.dts | |||
@@ -0,0 +1,30 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood-ns2-common.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "LaCie Internet Space v2"; | ||
7 | compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x8000000>; | ||
12 | }; | ||
13 | |||
14 | ocp@f1000000 { | ||
15 | sata@80000 { | ||
16 | status = "okay"; | ||
17 | nr-ports = <1>; | ||
18 | }; | ||
19 | }; | ||
20 | |||
21 | ns2-leds { | ||
22 | compatible = "lacie,ns2-leds"; | ||
23 | |||
24 | blue-sata { | ||
25 | label = "ns2:blue:sata"; | ||
26 | slow-gpio = <&gpio0 29 0>; | ||
27 | cmd-gpio = <&gpio0 30 0>; | ||
28 | }; | ||
29 | }; | ||
30 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts index 75bdb93fed26..8db3123ac80f 100644 --- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts +++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts | |||
@@ -1,6 +1,7 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood.dtsi" | 3 | /include/ "kirkwood.dtsi" |
4 | /include/ "kirkwood-98dx4122.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
6 | model = "Keymile Kirkwood Reference Design"; | 7 | model = "Keymile Kirkwood Reference Design"; |
@@ -16,6 +17,22 @@ | |||
16 | }; | 17 | }; |
17 | 18 | ||
18 | ocp@f1000000 { | 19 | ocp@f1000000 { |
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_nand &pmx_i2c_gpio_sda | ||
23 | &pmx_i2c_gpio_scl >; | ||
24 | pinctrl-names = "default"; | ||
25 | |||
26 | pmx_i2c_gpio_sda: pmx-gpio-sda { | ||
27 | marvell,pins = "mpp8"; | ||
28 | marvell,function = "gpio"; | ||
29 | }; | ||
30 | pmx_i2c_gpio_scl: pmx-gpio-scl { | ||
31 | marvell,pins = "mpp9"; | ||
32 | marvell,function = "gpio"; | ||
33 | }; | ||
34 | }; | ||
35 | |||
19 | serial@12000 { | 36 | serial@12000 { |
20 | clock-frequency = <200000000>; | 37 | clock-frequency = <200000000>; |
21 | status = "ok"; | 38 | status = "ok"; |
diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi index 8fea375c734d..37d45c4f88fb 100644 --- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi | |||
@@ -1,4 +1,5 @@ | |||
1 | /include/ "kirkwood.dtsi" | 1 | /include/ "kirkwood.dtsi" |
2 | /include/ "kirkwood-6281.dtsi" | ||
2 | 3 | ||
3 | / { | 4 | / { |
4 | chosen { | 5 | chosen { |
@@ -6,6 +7,71 @@ | |||
6 | }; | 7 | }; |
7 | 8 | ||
8 | ocp@f1000000 { | 9 | ocp@f1000000 { |
10 | pinctrl: pinctrl@10000 { | ||
11 | |||
12 | pinctrl-0 = < &pmx_power_hdd &pmx_usb_vbus | ||
13 | &pmx_fan_low &pmx_fan_high | ||
14 | &pmx_led_function_red &pmx_led_alarm | ||
15 | &pmx_led_info &pmx_led_power | ||
16 | &pmx_fan_lock &pmx_button_function | ||
17 | &pmx_power_switch &pmx_power_auto_switch | ||
18 | &pmx_led_function_blue >; | ||
19 | pinctrl-names = "default"; | ||
20 | |||
21 | pmx_power_hdd: pmx-power-hdd { | ||
22 | marvell,pins = "mpp10"; | ||
23 | marvell,function = "gpo"; | ||
24 | }; | ||
25 | pmx_usb_vbus: pmx-usb-vbus { | ||
26 | marvell,pins = "mpp11"; | ||
27 | marvell,function = "gpio"; | ||
28 | }; | ||
29 | pmx_fan_high: pmx-fan-high { | ||
30 | marvell,pins = "mpp18"; | ||
31 | marvell,function = "gpo"; | ||
32 | }; | ||
33 | pmx_fan_low: pmx-fan-low { | ||
34 | marvell,pins = "mpp19"; | ||
35 | marvell,function = "gpo"; | ||
36 | }; | ||
37 | pmx_led_function_blue: pmx-led-function-blue { | ||
38 | marvell,pins = "mpp36"; | ||
39 | marvell,function = "gpio"; | ||
40 | }; | ||
41 | pmx_led_alarm: pmx-led-alarm { | ||
42 | marvell,pins = "mpp37"; | ||
43 | marvell,function = "gpio"; | ||
44 | }; | ||
45 | pmx_led_info: pmx-led-info { | ||
46 | marvell,pins = "mpp38"; | ||
47 | marvell,function = "gpio"; | ||
48 | }; | ||
49 | pmx_led_power: pmx-led-power { | ||
50 | marvell,pins = "mpp39"; | ||
51 | marvell,function = "gpio"; | ||
52 | }; | ||
53 | pmx_fan_lock: pmx-fan-lock { | ||
54 | marvell,pins = "mpp40"; | ||
55 | marvell,function = "gpio"; | ||
56 | }; | ||
57 | pmx_button_function: pmx-button-function { | ||
58 | marvell,pins = "mpp41"; | ||
59 | marvell,function = "gpio"; | ||
60 | }; | ||
61 | pmx_power_switch: pmx-power-switch { | ||
62 | marvell,pins = "mpp42"; | ||
63 | marvell,function = "gpio"; | ||
64 | }; | ||
65 | pmx_power_auto_switch: pmx-power-auto-switch { | ||
66 | marvell,pins = "mpp43"; | ||
67 | marvell,function = "gpio"; | ||
68 | }; | ||
69 | pmx_led_function_red: pmx-led-function_red { | ||
70 | marvell,pins = "mpp48"; | ||
71 | marvell,function = "gpio"; | ||
72 | }; | ||
73 | |||
74 | }; | ||
9 | sata@80000 { | 75 | sata@80000 { |
10 | status = "okay"; | 76 | status = "okay"; |
11 | nr-ports = <1>; | 77 | nr-ports = <1>; |
@@ -94,4 +160,44 @@ | |||
94 | gpios = <&gpio1 16 1>; | 160 | gpios = <&gpio1 16 1>; |
95 | }; | 161 | }; |
96 | }; | 162 | }; |
163 | |||
164 | gpio_fan { | ||
165 | compatible = "gpio-fan"; | ||
166 | gpios = <&gpio0 19 1 | ||
167 | &gpio0 18 1>; | ||
168 | gpio-fan,speed-map = <0 3 | ||
169 | 1500 2 | ||
170 | 3250 1 | ||
171 | 5000 0>; | ||
172 | alarm-gpios = <&gpio1 8 0>; | ||
173 | }; | ||
174 | |||
175 | regulators { | ||
176 | compatible = "simple-bus"; | ||
177 | #address-cells = <1>; | ||
178 | #size-cells = <0>; | ||
179 | |||
180 | usb_power: regulator@1 { | ||
181 | compatible = "regulator-fixed"; | ||
182 | reg = <1>; | ||
183 | regulator-name = "USB Power"; | ||
184 | regulator-min-microvolt = <5000000>; | ||
185 | regulator-max-microvolt = <5000000>; | ||
186 | enable-active-high; | ||
187 | regulator-always-on; | ||
188 | regulator-boot-on; | ||
189 | gpio = <&gpio0 11 0>; | ||
190 | }; | ||
191 | hdd_power: regulator@2 { | ||
192 | compatible = "regulator-fixed"; | ||
193 | reg = <2>; | ||
194 | regulator-name = "HDD Power"; | ||
195 | regulator-min-microvolt = <5000000>; | ||
196 | regulator-max-microvolt = <5000000>; | ||
197 | enable-active-high; | ||
198 | regulator-always-on; | ||
199 | regulator-boot-on; | ||
200 | gpio = <&gpio0 10 0>; | ||
201 | }; | ||
202 | }; | ||
97 | }; | 203 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts new file mode 100644 index 000000000000..262c65403760 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts | |||
@@ -0,0 +1,178 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood.dtsi" | ||
4 | /include/ "kirkwood-6281.dtsi" | ||
5 | |||
6 | / { | ||
7 | model = "MPL CEC4"; | ||
8 | compatible = "mpl,cec4-10", "mpl,cec4", "marvell,kirkwood-88f6281", "marvell,kirkwood"; | ||
9 | |||
10 | memory { | ||
11 | device_type = "memory"; | ||
12 | reg = <0x00000000 0x20000000>; | ||
13 | }; | ||
14 | |||
15 | chosen { | ||
16 | bootargs = "console=ttyS0,115200n8 earlyprintk"; | ||
17 | }; | ||
18 | |||
19 | ocp@f1000000 { | ||
20 | pinctrl: pinctrl@10000 { | ||
21 | |||
22 | pinctrl-0 = < &pmx_nand &pmx_uart0 | ||
23 | &pmx_led_health &pmx_sdio | ||
24 | &pmx_sata0 &pmx_sata1 | ||
25 | &pmx_led_user1o | ||
26 | &pmx_led_user1g &pmx_led_user0o | ||
27 | &pmx_led_user0g &pmx_led_misc | ||
28 | &pmx_sdio_cd | ||
29 | >; | ||
30 | pinctrl-names = "default"; | ||
31 | |||
32 | pmx_led_health: pmx-led-health { | ||
33 | marvell,pins = "mpp7"; | ||
34 | marvell,function = "gpo"; | ||
35 | }; | ||
36 | |||
37 | pmx_sata1: pmx-sata1 { | ||
38 | marvell,pins = "mpp34"; | ||
39 | marvell,function = "sata1"; | ||
40 | }; | ||
41 | |||
42 | pmx_sata0: pmx-sata0 { | ||
43 | marvell,pins = "mpp35"; | ||
44 | marvell,function = "sata0"; | ||
45 | }; | ||
46 | |||
47 | pmx_led_user1o: pmx-led-user1o { | ||
48 | marvell,pins = "mpp40"; | ||
49 | marvell,function = "gpio"; | ||
50 | }; | ||
51 | |||
52 | pmx_led_user1g: pmx-led-user1g { | ||
53 | marvell,pins = "mpp41"; | ||
54 | marvell,function = "gpio"; | ||
55 | }; | ||
56 | |||
57 | pmx_led_user0o: pmx-led-user0o { | ||
58 | marvell,pins = "mpp44"; | ||
59 | marvell,function = "gpio"; | ||
60 | }; | ||
61 | |||
62 | pmx_led_user0g: pmx-led-user0g { | ||
63 | marvell,pins = "mpp45"; | ||
64 | marvell,function = "gpio"; | ||
65 | }; | ||
66 | |||
67 | pmx_led_misc: pmx-led-misc { | ||
68 | marvell,pins = "mpp46"; | ||
69 | marvell,function = "gpio"; | ||
70 | }; | ||
71 | |||
72 | pmx_sdio_cd: pmx-sdio-cd { | ||
73 | marvell,pins = "mpp47"; | ||
74 | marvell,function = "gpio"; | ||
75 | }; | ||
76 | }; | ||
77 | |||
78 | i2c@11000 { | ||
79 | status = "okay"; | ||
80 | |||
81 | rtc@51 { | ||
82 | compatible = "nxp,pcf8563"; | ||
83 | reg = <0x51>; | ||
84 | }; | ||
85 | |||
86 | eeprom@57 { | ||
87 | compatible = "atmel,24c02"; | ||
88 | reg = <0x57>; | ||
89 | }; | ||
90 | |||
91 | }; | ||
92 | |||
93 | serial@12000 { | ||
94 | clock-frequency = <200000000>; | ||
95 | status = "ok"; | ||
96 | }; | ||
97 | |||
98 | nand@3000000 { | ||
99 | status = "okay"; | ||
100 | |||
101 | partition@0 { | ||
102 | label = "uboot"; | ||
103 | reg = <0x0000000 0x100000>; | ||
104 | }; | ||
105 | |||
106 | partition@100000 { | ||
107 | label = "env"; | ||
108 | reg = <0x100000 0x80000>; | ||
109 | }; | ||
110 | |||
111 | partition@180000 { | ||
112 | label = "fdt"; | ||
113 | reg = <0x180000 0x80000>; | ||
114 | }; | ||
115 | |||
116 | partition@200000 { | ||
117 | label = "kernel"; | ||
118 | reg = <0x200000 0x400000>; | ||
119 | }; | ||
120 | |||
121 | partition@600000 { | ||
122 | label = "rootfs"; | ||
123 | reg = <0x600000 0x1fa00000>; | ||
124 | }; | ||
125 | }; | ||
126 | |||
127 | rtc@10300 { | ||
128 | status = "disabled"; | ||
129 | }; | ||
130 | |||
131 | sata@80000 { | ||
132 | nr-ports = <2>; | ||
133 | status = "okay"; | ||
134 | |||
135 | }; | ||
136 | }; | ||
137 | |||
138 | gpio-leds { | ||
139 | compatible = "gpio-leds"; | ||
140 | |||
141 | health { | ||
142 | label = "status:green:health"; | ||
143 | gpios = <&gpio0 7 1>; | ||
144 | }; | ||
145 | |||
146 | user1o { | ||
147 | label = "user1:orange"; | ||
148 | gpios = <&gpio1 8 1>; | ||
149 | default-state = "on"; | ||
150 | }; | ||
151 | |||
152 | user1g { | ||
153 | label = "user1:green"; | ||
154 | gpios = <&gpio1 9 1>; | ||
155 | default-state = "on"; | ||
156 | }; | ||
157 | |||
158 | user0o { | ||
159 | label = "user0:orange"; | ||
160 | gpios = <&gpio1 12 1>; | ||
161 | default-state = "on"; | ||
162 | }; | ||
163 | |||
164 | user0g { | ||
165 | label = "user0:green"; | ||
166 | gpios = <&gpio1 13 1>; | ||
167 | default-state = "on"; | ||
168 | }; | ||
169 | |||
170 | misc { | ||
171 | label = "status:orange:misc"; | ||
172 | gpios = <&gpio1 14 1>; | ||
173 | default-state = "on"; | ||
174 | }; | ||
175 | |||
176 | }; | ||
177 | }; | ||
178 | |||
diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi new file mode 100644 index 000000000000..9bc6785ad228 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi | |||
@@ -0,0 +1,63 @@ | |||
1 | /include/ "kirkwood.dtsi" | ||
2 | |||
3 | / { | ||
4 | chosen { | ||
5 | bootargs = "console=ttyS0,115200n8"; | ||
6 | }; | ||
7 | |||
8 | ocp@f1000000 { | ||
9 | serial@12000 { | ||
10 | clock-frequency = <166666667>; | ||
11 | status = "okay"; | ||
12 | }; | ||
13 | |||
14 | spi@10600 { | ||
15 | status = "okay"; | ||
16 | |||
17 | flash@0 { | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | compatible = "mx25l4005a"; | ||
21 | reg = <0>; | ||
22 | spi-max-frequency = <20000000>; | ||
23 | mode = <0>; | ||
24 | |||
25 | partition@0 { | ||
26 | reg = <0x0 0x80000>; | ||
27 | label = "u-boot"; | ||
28 | }; | ||
29 | }; | ||
30 | }; | ||
31 | |||
32 | i2c@11000 { | ||
33 | status = "okay"; | ||
34 | |||
35 | eeprom@50 { | ||
36 | compatible = "at,24c04"; | ||
37 | pagesize = <16>; | ||
38 | reg = <0x50>; | ||
39 | }; | ||
40 | }; | ||
41 | }; | ||
42 | |||
43 | gpio_keys { | ||
44 | compatible = "gpio-keys"; | ||
45 | #address-cells = <1>; | ||
46 | #size-cells = <0>; | ||
47 | |||
48 | button@1 { | ||
49 | label = "Power push button"; | ||
50 | linux,code = <116>; | ||
51 | gpios = <&gpio1 0 0>; | ||
52 | }; | ||
53 | }; | ||
54 | |||
55 | gpio-leds { | ||
56 | compatible = "gpio-leds"; | ||
57 | |||
58 | red-fail { | ||
59 | label = "ns2:red:fail"; | ||
60 | gpios = <&gpio0 12 0>; | ||
61 | }; | ||
62 | }; | ||
63 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-ns2.dts b/arch/arm/boot/dts/kirkwood-ns2.dts new file mode 100644 index 000000000000..f2d36ecf36d8 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-ns2.dts | |||
@@ -0,0 +1,30 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood-ns2-common.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "LaCie Network Space v2"; | ||
7 | compatible = "lacie,netspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x10000000>; | ||
12 | }; | ||
13 | |||
14 | ocp@f1000000 { | ||
15 | sata@80000 { | ||
16 | status = "okay"; | ||
17 | nr-ports = <1>; | ||
18 | }; | ||
19 | }; | ||
20 | |||
21 | ns2-leds { | ||
22 | compatible = "lacie,ns2-leds"; | ||
23 | |||
24 | blue-sata { | ||
25 | label = "ns2:blue:sata"; | ||
26 | slow-gpio = <&gpio0 29 0>; | ||
27 | cmd-gpio = <&gpio0 30 0>; | ||
28 | }; | ||
29 | }; | ||
30 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-ns2lite.dts b/arch/arm/boot/dts/kirkwood-ns2lite.dts new file mode 100644 index 000000000000..b02eb4ea1bb4 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-ns2lite.dts | |||
@@ -0,0 +1,30 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood-ns2-common.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "LaCie Network Space Lite v2"; | ||
7 | compatible = "lacie,netspace_lite_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x8000000>; | ||
12 | }; | ||
13 | |||
14 | ocp@f1000000 { | ||
15 | sata@80000 { | ||
16 | status = "okay"; | ||
17 | nr-ports = <1>; | ||
18 | }; | ||
19 | }; | ||
20 | |||
21 | gpio-leds { | ||
22 | compatible = "gpio-leds"; | ||
23 | |||
24 | blue-sata { | ||
25 | label = "ns2:blue:sata"; | ||
26 | gpios = <&gpio0 30 1>; | ||
27 | linux,default-trigger = "default-on"; | ||
28 | }; | ||
29 | }; | ||
30 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-ns2max.dts b/arch/arm/boot/dts/kirkwood-ns2max.dts new file mode 100644 index 000000000000..bcec4d6cada7 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-ns2max.dts | |||
@@ -0,0 +1,49 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood-ns2-common.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "LaCie Network Space Max v2"; | ||
7 | compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x10000000>; | ||
12 | }; | ||
13 | |||
14 | ocp@f1000000 { | ||
15 | sata@80000 { | ||
16 | status = "okay"; | ||
17 | nr-ports = <2>; | ||
18 | }; | ||
19 | }; | ||
20 | |||
21 | gpio_fan { | ||
22 | compatible = "gpio-fan"; | ||
23 | gpios = <&gpio0 22 1 | ||
24 | &gpio0 7 1 | ||
25 | &gpio1 1 1 | ||
26 | &gpio0 23 1>; | ||
27 | gpio-fan,speed-map = | ||
28 | < 0 0 | ||
29 | 1500 15 | ||
30 | 1700 14 | ||
31 | 1800 13 | ||
32 | 2100 12 | ||
33 | 3100 11 | ||
34 | 3300 10 | ||
35 | 4300 9 | ||
36 | 5500 8>; | ||
37 | alarm-gpios = <&gpio0 25 1>; | ||
38 | }; | ||
39 | |||
40 | ns2-leds { | ||
41 | compatible = "lacie,ns2-leds"; | ||
42 | |||
43 | blue-sata { | ||
44 | label = "ns2:blue:sata"; | ||
45 | slow-gpio = <&gpio0 29 0>; | ||
46 | cmd-gpio = <&gpio0 30 0>; | ||
47 | }; | ||
48 | }; | ||
49 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-ns2mini.dts b/arch/arm/boot/dts/kirkwood-ns2mini.dts new file mode 100644 index 000000000000..b79f5eb25589 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-ns2mini.dts | |||
@@ -0,0 +1,49 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood-ns2-common.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "LaCie Network Space Mini v2"; | ||
7 | compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x8000000>; | ||
12 | }; | ||
13 | |||
14 | ocp@f1000000 { | ||
15 | sata@80000 { | ||
16 | status = "okay"; | ||
17 | nr-ports = <1>; | ||
18 | }; | ||
19 | }; | ||
20 | |||
21 | gpio_fan { | ||
22 | compatible = "gpio-fan"; | ||
23 | gpios = <&gpio0 22 1 | ||
24 | &gpio0 7 1 | ||
25 | &gpio1 1 1 | ||
26 | &gpio0 23 1>; | ||
27 | gpio-fan,speed-map = | ||
28 | < 0 0 | ||
29 | 3000 15 | ||
30 | 3180 14 | ||
31 | 4140 13 | ||
32 | 4570 12 | ||
33 | 6760 11 | ||
34 | 7140 10 | ||
35 | 7980 9 | ||
36 | 9200 8>; | ||
37 | alarm-gpios = <&gpio0 25 1>; | ||
38 | }; | ||
39 | |||
40 | ns2-leds { | ||
41 | compatible = "lacie,ns2-leds"; | ||
42 | |||
43 | blue-sata { | ||
44 | label = "ns2:blue:sata"; | ||
45 | slow-gpio = <&gpio0 29 0>; | ||
46 | cmd-gpio = <&gpio0 30 0>; | ||
47 | }; | ||
48 | }; | ||
49 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts new file mode 100644 index 000000000000..5509f9659546 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-nsa310.dts | |||
@@ -0,0 +1,144 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "ZyXEL NSA310"; | ||
7 | compatible = "zyxel,nsa310", "marvell,kirkwood-88f6281", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x10000000>; | ||
12 | }; | ||
13 | |||
14 | chosen { | ||
15 | bootargs = "console=ttyS0,115200"; | ||
16 | }; | ||
17 | |||
18 | ocp@f1000000 { | ||
19 | |||
20 | serial@12000 { | ||
21 | clock-frequency = <200000000>; | ||
22 | status = "ok"; | ||
23 | }; | ||
24 | |||
25 | sata@80000 { | ||
26 | status = "okay"; | ||
27 | nr-ports = <2>; | ||
28 | }; | ||
29 | |||
30 | i2c@11000 { | ||
31 | status = "okay"; | ||
32 | }; | ||
33 | |||
34 | nand@3000000 { | ||
35 | status = "okay"; | ||
36 | chip-delay = <35>; | ||
37 | |||
38 | partition@0 { | ||
39 | label = "uboot"; | ||
40 | reg = <0x0000000 0x0100000>; | ||
41 | read-only; | ||
42 | }; | ||
43 | partition@100000 { | ||
44 | label = "uboot_env"; | ||
45 | reg = <0x0100000 0x0080000>; | ||
46 | }; | ||
47 | partition@180000 { | ||
48 | label = "key_store"; | ||
49 | reg = <0x0180000 0x0080000>; | ||
50 | }; | ||
51 | partition@200000 { | ||
52 | label = "info"; | ||
53 | reg = <0x0200000 0x0080000>; | ||
54 | }; | ||
55 | partition@280000 { | ||
56 | label = "etc"; | ||
57 | reg = <0x0280000 0x0a00000>; | ||
58 | }; | ||
59 | partition@c80000 { | ||
60 | label = "kernel_1"; | ||
61 | reg = <0x0c80000 0x0a00000>; | ||
62 | }; | ||
63 | partition@1680000 { | ||
64 | label = "rootfs1"; | ||
65 | reg = <0x1680000 0x2fc0000>; | ||
66 | }; | ||
67 | partition@4640000 { | ||
68 | label = "kernel_2"; | ||
69 | reg = <0x4640000 0x0a00000>; | ||
70 | }; | ||
71 | partition@5040000 { | ||
72 | label = "rootfs2"; | ||
73 | reg = <0x5040000 0x2fc0000>; | ||
74 | }; | ||
75 | }; | ||
76 | }; | ||
77 | |||
78 | gpio_keys { | ||
79 | compatible = "gpio-keys"; | ||
80 | #address-cells = <1>; | ||
81 | #size-cells = <0>; | ||
82 | |||
83 | button@1 { | ||
84 | label = "Power Button"; | ||
85 | linux,code = <116>; | ||
86 | gpios = <&gpio1 14 0>; | ||
87 | }; | ||
88 | button@2 { | ||
89 | label = "Copy Button"; | ||
90 | linux,code = <133>; | ||
91 | gpios = <&gpio1 5 1>; | ||
92 | }; | ||
93 | button@3 { | ||
94 | label = "Reset Button"; | ||
95 | linux,code = <0x198>; | ||
96 | gpios = <&gpio1 4 1>; | ||
97 | }; | ||
98 | }; | ||
99 | |||
100 | gpio-leds { | ||
101 | compatible = "gpio-leds"; | ||
102 | |||
103 | green-sys { | ||
104 | label = "nsa310:green:sys"; | ||
105 | gpios = <&gpio0 28 0>; | ||
106 | }; | ||
107 | red-sys { | ||
108 | label = "nsa310:red:sys"; | ||
109 | gpios = <&gpio0 29 0>; | ||
110 | }; | ||
111 | green-hdd { | ||
112 | label = "nsa310:green:hdd"; | ||
113 | gpios = <&gpio1 9 0>; | ||
114 | }; | ||
115 | red-hdd { | ||
116 | label = "nsa310:red:hdd"; | ||
117 | gpios = <&gpio1 10 0>; | ||
118 | }; | ||
119 | green-esata { | ||
120 | label = "nsa310:green:esata"; | ||
121 | gpios = <&gpio0 12 0>; | ||
122 | }; | ||
123 | red-esata { | ||
124 | label = "nsa310:red:esata"; | ||
125 | gpios = <&gpio0 13 0>; | ||
126 | }; | ||
127 | green-usb { | ||
128 | label = "nsa310:green:usb"; | ||
129 | gpios = <&gpio0 15 0>; | ||
130 | }; | ||
131 | red-usb { | ||
132 | label = "nsa310:red:usb"; | ||
133 | gpios = <&gpio0 16 0>; | ||
134 | }; | ||
135 | green-copy { | ||
136 | label = "nsa310:green:copy"; | ||
137 | gpios = <&gpio1 7 0>; | ||
138 | }; | ||
139 | red-copy { | ||
140 | label = "nsa310:red:copy"; | ||
141 | gpios = <&gpio1 8 0>; | ||
142 | }; | ||
143 | }; | ||
144 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts new file mode 100644 index 000000000000..49d3d74d4d38 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts | |||
@@ -0,0 +1,98 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood.dtsi" | ||
4 | /include/ "kirkwood-6282.dtsi" | ||
5 | |||
6 | / { | ||
7 | model = "Plat'Home OpenBlocksA6"; | ||
8 | compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood"; | ||
9 | |||
10 | memory { | ||
11 | device_type = "memory"; | ||
12 | reg = <0x00000000 0x20000000>; | ||
13 | }; | ||
14 | |||
15 | chosen { | ||
16 | bootargs = "console=ttyS0,115200n8 earlyprintk"; | ||
17 | }; | ||
18 | |||
19 | ocp@f1000000 { | ||
20 | serial@12000 { | ||
21 | clock-frequency = <200000000>; | ||
22 | status = "ok"; | ||
23 | }; | ||
24 | |||
25 | serial@12100 { | ||
26 | clock-frequency = <200000000>; | ||
27 | status = "ok"; | ||
28 | }; | ||
29 | |||
30 | nand@3000000 { | ||
31 | chip-delay = <25>; | ||
32 | status = "okay"; | ||
33 | |||
34 | partition@0 { | ||
35 | label = "uboot"; | ||
36 | reg = <0x0 0x90000>; | ||
37 | }; | ||
38 | |||
39 | partition@90000 { | ||
40 | label = "env"; | ||
41 | reg = <0x90000 0x44000>; | ||
42 | }; | ||
43 | |||
44 | partition@d4000 { | ||
45 | label = "test"; | ||
46 | reg = <0xd4000 0x24000>; | ||
47 | }; | ||
48 | |||
49 | partition@f4000 { | ||
50 | label = "conf"; | ||
51 | reg = <0xf4000 0x400000>; | ||
52 | }; | ||
53 | |||
54 | partition@4f4000 { | ||
55 | label = "linux"; | ||
56 | reg = <0x4f4000 0x1d20000>; | ||
57 | }; | ||
58 | |||
59 | partition@2214000 { | ||
60 | label = "user"; | ||
61 | reg = <0x2214000 0x1dec000>; | ||
62 | }; | ||
63 | }; | ||
64 | |||
65 | sata@80000 { | ||
66 | nr-ports = <1>; | ||
67 | status = "okay"; | ||
68 | }; | ||
69 | |||
70 | i2c@11100 { | ||
71 | status = "okay"; | ||
72 | |||
73 | s35390a: s35390a@30 { | ||
74 | compatible = "s35390a"; | ||
75 | reg = <0x30>; | ||
76 | }; | ||
77 | }; | ||
78 | }; | ||
79 | |||
80 | gpio-leds { | ||
81 | compatible = "gpio-leds"; | ||
82 | |||
83 | led-red { | ||
84 | label = "obsa6:red:stat"; | ||
85 | gpios = <&gpio1 9 1>; | ||
86 | }; | ||
87 | |||
88 | led-green { | ||
89 | label = "obsa6:green:stat"; | ||
90 | gpios = <&gpio1 10 1>; | ||
91 | }; | ||
92 | |||
93 | led-yellow { | ||
94 | label = "obsa6:yellow:stat"; | ||
95 | gpios = <&gpio1 11 1>; | ||
96 | }; | ||
97 | }; | ||
98 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts new file mode 100644 index 000000000000..c0de5a7f660d --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-topkick.dts | |||
@@ -0,0 +1,85 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "kirkwood.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "Univeral Scientific Industrial Co. Topkick-1281P2"; | ||
7 | compatible = "usi,topkick-1281P2", "usi,topkick", "marvell,kirkwood-88f6282", "marvell,kirkwood"; | ||
8 | |||
9 | memory { | ||
10 | device_type = "memory"; | ||
11 | reg = <0x00000000 0x10000000>; | ||
12 | }; | ||
13 | |||
14 | chosen { | ||
15 | bootargs = "console=ttyS0,115200n8 earlyprintk"; | ||
16 | }; | ||
17 | |||
18 | ocp@f1000000 { | ||
19 | serial@12000 { | ||
20 | clock-frequency = <200000000>; | ||
21 | status = "ok"; | ||
22 | }; | ||
23 | |||
24 | nand@3000000 { | ||
25 | status = "okay"; | ||
26 | |||
27 | partition@0 { | ||
28 | label = "u-boot"; | ||
29 | reg = <0x0000000 0x180000>; | ||
30 | }; | ||
31 | |||
32 | partition@180000 { | ||
33 | label = "u-boot env"; | ||
34 | reg = <0x0180000 0x20000>; | ||
35 | }; | ||
36 | |||
37 | partition@200000 { | ||
38 | label = "uImage"; | ||
39 | reg = <0x0200000 0x600000>; | ||
40 | }; | ||
41 | |||
42 | partition@800000 { | ||
43 | label = "uInitrd"; | ||
44 | reg = <0x0800000 0x1000000>; | ||
45 | }; | ||
46 | |||
47 | partition@1800000 { | ||
48 | label = "rootfs"; | ||
49 | reg = <0x1800000 0xe800000>; | ||
50 | }; | ||
51 | }; | ||
52 | |||
53 | sata@80000 { | ||
54 | status = "okay"; | ||
55 | nr-ports = <1>; | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | gpio-leds { | ||
60 | compatible = "gpio-leds"; | ||
61 | |||
62 | disk { | ||
63 | label = "topkick:yellow:disk"; | ||
64 | gpios = <&gpio0 21 1>; | ||
65 | linux,default-trigger = "ide-disk"; | ||
66 | }; | ||
67 | system2 { | ||
68 | label = "topkick:red:system"; | ||
69 | gpios = <&gpio1 5 1>; | ||
70 | }; | ||
71 | system { | ||
72 | label = "topkick:blue:system"; | ||
73 | gpios = <&gpio1 6 1>; | ||
74 | default-state = "on"; | ||
75 | }; | ||
76 | wifi { | ||
77 | label = "topkick:green:wifi"; | ||
78 | gpios = <&gpio1 7 1>; | ||
79 | }; | ||
80 | wifi2 { | ||
81 | label = "topkick:yellow:wifi"; | ||
82 | gpios = <&gpio1 16 1>; | ||
83 | }; | ||
84 | }; | ||
85 | }; | ||
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts index ccbf32757800..8295c833887f 100644 --- a/arch/arm/boot/dts/kirkwood-ts219-6281.dts +++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts | |||
@@ -1,8 +1,39 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood-ts219.dtsi" | 3 | /include/ "kirkwood-ts219.dtsi" |
4 | /include/ "kirkwood-6281.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
7 | ocp@f1000000 { | ||
8 | pinctrl: pinctrl@10000 { | ||
9 | |||
10 | pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi | ||
11 | &pmx_twsi0 &pmx_sata0 &pmx_sata1 | ||
12 | &pmx_ram_size &pmx_reset_button | ||
13 | &pmx_USB_copy_button &pmx_board_id>; | ||
14 | pinctrl-names = "default"; | ||
15 | |||
16 | pmx_ram_size: pmx-ram-size { | ||
17 | /* RAM: 0: 256 MB, 1: 512 MB */ | ||
18 | marvell,pins = "mpp36"; | ||
19 | marvell,function = "gpio"; | ||
20 | }; | ||
21 | pmx_USB_copy_button: pmx-USB-copy-button { | ||
22 | marvell,pins = "mpp15"; | ||
23 | marvell,function = "gpio"; | ||
24 | }; | ||
25 | pmx_reset_button: pmx-reset-button { | ||
26 | marvell,pins = "mpp16"; | ||
27 | marvell,function = "gpio"; | ||
28 | }; | ||
29 | pmx_board_id: pmx-board-id { | ||
30 | /* 0: TS-11x, 1: TS-21x */ | ||
31 | marvell,pins = "mpp44"; | ||
32 | marvell,function = "gpio"; | ||
33 | }; | ||
34 | }; | ||
35 | }; | ||
36 | |||
6 | gpio_keys { | 37 | gpio_keys { |
7 | compatible = "gpio-keys"; | 38 | compatible = "gpio-keys"; |
8 | #address-cells = <1>; | 39 | #address-cells = <1>; |
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts index fbe9932161a1..df3f95dfba33 100644 --- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts +++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts | |||
@@ -1,8 +1,39 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | /include/ "kirkwood-ts219.dtsi" | 3 | /include/ "kirkwood-ts219.dtsi" |
4 | /include/ "kirkwood-6282.dtsi" | ||
4 | 5 | ||
5 | / { | 6 | / { |
7 | ocp@f1000000 { | ||
8 | pinctrl: pinctrl@10000 { | ||
9 | |||
10 | pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi | ||
11 | &pmx_twsi0 &pmx_sata0 &pmx_sata1 | ||
12 | &pmx_ram_size &pmx_reset_button | ||
13 | &pmx_USB_copy_button &pmx_board_id>; | ||
14 | pinctrl-names = "default"; | ||
15 | |||
16 | pmx_ram_size: pmx-ram-size { | ||
17 | /* RAM: 0: 256 MB, 1: 512 MB */ | ||
18 | marvell,pins = "mpp36"; | ||
19 | marvell,function = "gpio"; | ||
20 | }; | ||
21 | pmx_reset_button: pmx-reset-button { | ||
22 | marvell,pins = "mpp37"; | ||
23 | marvell,function = "gpio"; | ||
24 | }; | ||
25 | pmx_USB_copy_button: pmx-USB-copy-button { | ||
26 | marvell,pins = "mpp43"; | ||
27 | marvell,function = "gpio"; | ||
28 | }; | ||
29 | pmx_board_id: pmx-board-id { | ||
30 | /* 0: TS-11x, 1: TS-21x */ | ||
31 | marvell,pins = "mpp44"; | ||
32 | marvell,function = "gpio"; | ||
33 | }; | ||
34 | }; | ||
35 | }; | ||
36 | |||
6 | gpio_keys { | 37 | gpio_keys { |
7 | compatible = "gpio-keys"; | 38 | compatible = "gpio-keys"; |
8 | #address-cells = <1>; | 39 | #address-cells = <1>; |
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 4e5b8154a5be..a990c30f0a26 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi | |||
@@ -4,6 +4,10 @@ | |||
4 | compatible = "marvell,kirkwood"; | 4 | compatible = "marvell,kirkwood"; |
5 | interrupt-parent = <&intc>; | 5 | interrupt-parent = <&intc>; |
6 | 6 | ||
7 | aliases { | ||
8 | gpio0 = &gpio0; | ||
9 | gpio1 = &gpio1; | ||
10 | }; | ||
7 | intc: interrupt-controller { | 11 | intc: interrupt-controller { |
8 | compatible = "marvell,orion-intc", "marvell,intc"; | 12 | compatible = "marvell,orion-intc", "marvell,intc"; |
9 | interrupt-controller; | 13 | interrupt-controller; |
@@ -24,7 +28,8 @@ | |||
24 | #gpio-cells = <2>; | 28 | #gpio-cells = <2>; |
25 | gpio-controller; | 29 | gpio-controller; |
26 | reg = <0x10100 0x40>; | 30 | reg = <0x10100 0x40>; |
27 | ngpio = <32>; | 31 | ngpios = <32>; |
32 | interrupt-controller; | ||
28 | interrupts = <35>, <36>, <37>, <38>; | 33 | interrupts = <35>, <36>, <37>, <38>; |
29 | }; | 34 | }; |
30 | 35 | ||
@@ -33,7 +38,8 @@ | |||
33 | #gpio-cells = <2>; | 38 | #gpio-cells = <2>; |
34 | gpio-controller; | 39 | gpio-controller; |
35 | reg = <0x10140 0x40>; | 40 | reg = <0x10140 0x40>; |
36 | ngpio = <18>; | 41 | ngpios = <18>; |
42 | interrupt-controller; | ||
37 | interrupts = <39>, <40>, <41>; | 43 | interrupts = <39>, <40>, <41>; |
38 | }; | 44 | }; |
39 | 45 | ||
@@ -77,6 +83,13 @@ | |||
77 | status = "okay"; | 83 | status = "okay"; |
78 | }; | 84 | }; |
79 | 85 | ||
86 | ehci@50000 { | ||
87 | compatible = "marvell,orion-ehci"; | ||
88 | reg = <0x50000 0x1000>; | ||
89 | interrupts = <19>; | ||
90 | status = "okay"; | ||
91 | }; | ||
92 | |||
80 | sata@80000 { | 93 | sata@80000 { |
81 | compatible = "marvell,orion-sata"; | 94 | compatible = "marvell,orion-sata"; |
82 | reg = <0x80000 0x5000>; | 95 | reg = <0x80000 0x5000>; |
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index e5ffe960dbf3..1582f484a867 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi | |||
@@ -182,6 +182,13 @@ | |||
182 | pnx,timeout = <0x64>; | 182 | pnx,timeout = <0x64>; |
183 | }; | 183 | }; |
184 | 184 | ||
185 | mpwm: mpwm@400E8000 { | ||
186 | compatible = "nxp,lpc3220-motor-pwm"; | ||
187 | reg = <0x400E8000 0x78>; | ||
188 | status = "disabled"; | ||
189 | #pwm-cells = <2>; | ||
190 | }; | ||
191 | |||
185 | i2cusb: i2c@31020300 { | 192 | i2cusb: i2c@31020300 { |
186 | compatible = "nxp,pnx-i2c"; | 193 | compatible = "nxp,pnx-i2c"; |
187 | reg = <0x31020300 0x100>; | 194 | reg = <0x31020300 0x100>; |
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts new file mode 100644 index 000000000000..5a3a58b7e18f --- /dev/null +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | |||
@@ -0,0 +1,55 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | /dts-v1/; | ||
10 | /include/ "orion5x.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "LaCie Ethernet Disk mini V2"; | ||
14 | compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x"; | ||
15 | |||
16 | memory { | ||
17 | reg = <0x00000000 0x4000000>; /* 64 MB */ | ||
18 | }; | ||
19 | |||
20 | chosen { | ||
21 | bootargs = "console=ttyS0,115200n8 earlyprintk"; | ||
22 | }; | ||
23 | |||
24 | ocp@f1000000 { | ||
25 | serial@12000 { | ||
26 | clock-frequency = <166666667>; | ||
27 | status = "okay"; | ||
28 | }; | ||
29 | |||
30 | sata@80000 { | ||
31 | status = "okay"; | ||
32 | nr-ports = <2>; | ||
33 | }; | ||
34 | }; | ||
35 | |||
36 | gpio_keys { | ||
37 | compatible = "gpio-keys"; | ||
38 | #address-cells = <1>; | ||
39 | #size-cells = <0>; | ||
40 | button@1 { | ||
41 | label = "Power-on Switch"; | ||
42 | linux,code = <116>; /* KEY_POWER */ | ||
43 | gpios = <&gpio0 18 0>; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | gpio_leds { | ||
48 | compatible = "gpio-leds"; | ||
49 | |||
50 | led@1 { | ||
51 | label = "power:blue"; | ||
52 | gpios = <&gpio0 16 1>; | ||
53 | }; | ||
54 | }; | ||
55 | }; | ||
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi new file mode 100644 index 000000000000..8aad00f81ed9 --- /dev/null +++ b/arch/arm/boot/dts/orion5x.dtsi | |||
@@ -0,0 +1,98 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | /include/ "skeleton.dtsi" | ||
10 | |||
11 | / { | ||
12 | model = "Marvell Orion5x SoC"; | ||
13 | compatible = "marvell,orion5x"; | ||
14 | interrupt-parent = <&intc>; | ||
15 | |||
16 | intc: interrupt-controller { | ||
17 | compatible = "marvell,orion-intc", "marvell,intc"; | ||
18 | interrupt-controller; | ||
19 | #interrupt-cells = <1>; | ||
20 | reg = <0xf1020204 0x04>; | ||
21 | }; | ||
22 | |||
23 | ocp@f1000000 { | ||
24 | compatible = "simple-bus"; | ||
25 | ranges = <0x00000000 0xf1000000 0x4000000 | ||
26 | 0xf2200000 0xf2200000 0x0000800>; | ||
27 | #address-cells = <1>; | ||
28 | #size-cells = <1>; | ||
29 | |||
30 | gpio0: gpio@10100 { | ||
31 | compatible = "marvell,orion-gpio"; | ||
32 | #gpio-cells = <2>; | ||
33 | gpio-controller; | ||
34 | reg = <0x10100 0x40>; | ||
35 | ngpio = <32>; | ||
36 | interrupts = <6>, <7>, <8>, <9>; | ||
37 | }; | ||
38 | |||
39 | serial@12000 { | ||
40 | compatible = "ns16550a"; | ||
41 | reg = <0x12000 0x100>; | ||
42 | reg-shift = <2>; | ||
43 | interrupts = <3>; | ||
44 | /* set clock-frequency in board dts */ | ||
45 | status = "disabled"; | ||
46 | }; | ||
47 | |||
48 | serial@12100 { | ||
49 | compatible = "ns16550a"; | ||
50 | reg = <0x12100 0x100>; | ||
51 | reg-shift = <2>; | ||
52 | interrupts = <4>; | ||
53 | /* set clock-frequency in board dts */ | ||
54 | status = "disabled"; | ||
55 | }; | ||
56 | |||
57 | spi@10600 { | ||
58 | compatible = "marvell,orion-spi"; | ||
59 | #address-cells = <1>; | ||
60 | #size-cells = <0>; | ||
61 | cell-index = <0>; | ||
62 | reg = <0x10600 0x28>; | ||
63 | status = "disabled"; | ||
64 | }; | ||
65 | |||
66 | wdt@20300 { | ||
67 | compatible = "marvell,orion-wdt"; | ||
68 | reg = <0x20300 0x28>; | ||
69 | status = "okay"; | ||
70 | }; | ||
71 | |||
72 | sata@80000 { | ||
73 | compatible = "marvell,orion-sata"; | ||
74 | reg = <0x80000 0x5000>; | ||
75 | interrupts = <29>; | ||
76 | status = "disabled"; | ||
77 | }; | ||
78 | |||
79 | i2c@11000 { | ||
80 | compatible = "marvell,mv64xxx-i2c"; | ||
81 | reg = <0x11000 0x20>; | ||
82 | #address-cells = <1>; | ||
83 | #size-cells = <0>; | ||
84 | interrupts = <5>; | ||
85 | clock-frequency = <100000>; | ||
86 | status = "disabled"; | ||
87 | }; | ||
88 | |||
89 | crypto@90000 { | ||
90 | compatible = "marvell,orion-crypto"; | ||
91 | reg = <0x90000 0x10000>, | ||
92 | <0xf2200000 0x800>; | ||
93 | reg-names = "regs", "sram"; | ||
94 | interrupts = <22>; | ||
95 | status = "okay"; | ||
96 | }; | ||
97 | }; | ||
98 | }; | ||
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index 702c0baa6004..9e02a913eb62 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | model = "Calao Systems Snowball platform with device tree"; | 16 | model = "Calao Systems Snowball platform with device tree"; |
17 | compatible = "calaosystems,snowball-a9500"; | 17 | compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500"; |
18 | 18 | ||
19 | memory { | 19 | memory { |
20 | reg = <0x00000000 0x20000000>; | 20 | reg = <0x00000000 0x20000000>; |
@@ -120,10 +120,10 @@ | |||
120 | }; | 120 | }; |
121 | 121 | ||
122 | // External Micro SD slot | 122 | // External Micro SD slot |
123 | sdi@80126000 { | 123 | sdi0_per1@80126000 { |
124 | arm,primecell-periphid = <0x10480180>; | 124 | arm,primecell-periphid = <0x10480180>; |
125 | max-frequency = <50000000>; | 125 | max-frequency = <50000000>; |
126 | bus-width = <8>; | 126 | bus-width = <4>; |
127 | mmc-cap-mmc-highspeed; | 127 | mmc-cap-mmc-highspeed; |
128 | vmmc-supply = <&ab8500_ldo_aux3_reg>; | 128 | vmmc-supply = <&ab8500_ldo_aux3_reg>; |
129 | 129 | ||
@@ -134,7 +134,7 @@ | |||
134 | }; | 134 | }; |
135 | 135 | ||
136 | // On-board eMMC | 136 | // On-board eMMC |
137 | sdi@80114000 { | 137 | sdi4_per2@80114000 { |
138 | arm,primecell-periphid = <0x10480180>; | 138 | arm,primecell-periphid = <0x10480180>; |
139 | max-frequency = <50000000>; | 139 | max-frequency = <50000000>; |
140 | bus-width = <8>; | 140 | bus-width = <8>; |
@@ -183,5 +183,137 @@ | |||
183 | reg = <0x33>; | 183 | reg = <0x33>; |
184 | }; | 184 | }; |
185 | }; | 185 | }; |
186 | |||
187 | prcmu@80157000 { | ||
188 | db8500-prcmu-regulators { | ||
189 | db8500_vape_reg: db8500_vape { | ||
190 | regulator-name = "db8500-vape"; | ||
191 | }; | ||
192 | |||
193 | db8500_varm_reg: db8500_varm { | ||
194 | regulator-name = "db8500-varm"; | ||
195 | }; | ||
196 | |||
197 | db8500_vmodem_reg: db8500_vmodem { | ||
198 | regulator-name = "db8500-vmodem"; | ||
199 | }; | ||
200 | |||
201 | db8500_vpll_reg: db8500_vpll { | ||
202 | regulator-name = "db8500-vpll"; | ||
203 | }; | ||
204 | |||
205 | db8500_vsmps1_reg: db8500_vsmps1 { | ||
206 | regulator-name = "db8500-vsmps1"; | ||
207 | }; | ||
208 | |||
209 | db8500_vsmps2_reg: db8500_vsmps2 { | ||
210 | regulator-name = "db8500-vsmps2"; | ||
211 | }; | ||
212 | |||
213 | db8500_vsmps3_reg: db8500_vsmps3 { | ||
214 | regulator-name = "db8500-vsmps3"; | ||
215 | }; | ||
216 | |||
217 | db8500_vrf1_reg: db8500_vrf1 { | ||
218 | regulator-name = "db8500-vrf1"; | ||
219 | }; | ||
220 | |||
221 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { | ||
222 | regulator-name = "db8500-sva-mmdsp"; | ||
223 | }; | ||
224 | |||
225 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { | ||
226 | regulator-name = "db8500-sva-mmdsp-ret"; | ||
227 | }; | ||
228 | |||
229 | db8500_sva_pipe_reg: db8500_sva_pipe { | ||
230 | regulator-name = "db8500_sva_pipe"; | ||
231 | }; | ||
232 | |||
233 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { | ||
234 | regulator-name = "db8500_sia_mmdsp"; | ||
235 | }; | ||
236 | |||
237 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { | ||
238 | regulator-name = "db8500-sia-mmdsp-ret"; | ||
239 | }; | ||
240 | |||
241 | db8500_sia_pipe_reg: db8500_sia_pipe { | ||
242 | regulator-name = "db8500-sia-pipe"; | ||
243 | }; | ||
244 | |||
245 | db8500_sga_reg: db8500_sga { | ||
246 | regulator-name = "db8500-sga"; | ||
247 | }; | ||
248 | |||
249 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { | ||
250 | regulator-name = "db8500-b2r2-mcde"; | ||
251 | }; | ||
252 | |||
253 | db8500_esram12_reg: db8500_esram12 { | ||
254 | regulator-name = "db8500-esram12"; | ||
255 | }; | ||
256 | |||
257 | db8500_esram12_ret_reg: db8500_esram12_ret { | ||
258 | regulator-name = "db8500-esram12-ret"; | ||
259 | }; | ||
260 | |||
261 | db8500_esram34_reg: db8500_esram34 { | ||
262 | regulator-name = "db8500-esram34"; | ||
263 | }; | ||
264 | |||
265 | db8500_esram34_ret_reg: db8500_esram34_ret { | ||
266 | regulator-name = "db8500-esram34-ret"; | ||
267 | }; | ||
268 | }; | ||
269 | |||
270 | ab8500@5 { | ||
271 | ab8500-regulators { | ||
272 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | ||
273 | regulator-name = "V-DISPLAY"; | ||
274 | }; | ||
275 | |||
276 | ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { | ||
277 | regulator-name = "V-eMMC1"; | ||
278 | }; | ||
279 | |||
280 | ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { | ||
281 | regulator-name = "V-MMC-SD"; | ||
282 | }; | ||
283 | |||
284 | ab8500_ldo_initcore_reg: ab8500_ldo_initcore { | ||
285 | regulator-name = "V-INTCORE"; | ||
286 | }; | ||
287 | |||
288 | ab8500_ldo_tvout_reg: ab8500_ldo_tvout { | ||
289 | regulator-name = "V-TVOUT"; | ||
290 | }; | ||
291 | |||
292 | ab8500_ldo_usb_reg: ab8500_ldo_usb { | ||
293 | regulator-name = "dummy"; | ||
294 | }; | ||
295 | |||
296 | ab8500_ldo_audio_reg: ab8500_ldo_audio { | ||
297 | regulator-name = "V-AUD"; | ||
298 | }; | ||
299 | |||
300 | ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { | ||
301 | regulator-name = "V-AMIC1"; | ||
302 | }; | ||
303 | |||
304 | ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { | ||
305 | regulator-name = "V-AMIC2"; | ||
306 | }; | ||
307 | |||
308 | ab8500_ldo_dmic_reg: ab8500_ldo_dmic { | ||
309 | regulator-name = "V-DMIC"; | ||
310 | }; | ||
311 | |||
312 | ab8500_ldo_ana_reg: ab8500_ldo_ana { | ||
313 | regulator-name = "V-CSI/DSI"; | ||
314 | }; | ||
315 | }; | ||
316 | }; | ||
317 | }; | ||
186 | }; | 318 | }; |
187 | }; | 319 | }; |
diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/stuib.dtsi new file mode 100644 index 000000000000..39446a247e79 --- /dev/null +++ b/arch/arm/boot/dts/stuib.dtsi | |||
@@ -0,0 +1,78 @@ | |||
1 | /* | ||
2 | * Copyright 2012 ST-Ericsson AB | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | / { | ||
13 | soc-u9500 { | ||
14 | i2c@80004000 { | ||
15 | stmpe1601: stmpe1601@40 { | ||
16 | compatible = "st,stmpe1601"; | ||
17 | reg = <0x40>; | ||
18 | interrupts = <26 0x1>; | ||
19 | interrupt-parent = <&gpio6>; | ||
20 | interrupt-controller; | ||
21 | |||
22 | wakeup-source; | ||
23 | st,autosleep-timeout = <1024>; | ||
24 | |||
25 | stmpe_keypad { | ||
26 | compatible = "st,stmpe-keypad"; | ||
27 | |||
28 | debounce-interval = <64>; | ||
29 | st,scan-count = <8>; | ||
30 | st,no-autorepeat; | ||
31 | |||
32 | linux,keymap = <0x205006b | ||
33 | 0x4010074 | ||
34 | 0x3050072 | ||
35 | 0x1030004 | ||
36 | 0x502006a | ||
37 | 0x500000a | ||
38 | 0x5008b | ||
39 | 0x706001c | ||
40 | 0x405000b | ||
41 | 0x6070003 | ||
42 | 0x3040067 | ||
43 | 0x303006c | ||
44 | 0x60400e7 | ||
45 | 0x602009e | ||
46 | 0x4020073 | ||
47 | 0x5050002 | ||
48 | 0x4030069 | ||
49 | 0x3020008>; | ||
50 | }; | ||
51 | }; | ||
52 | }; | ||
53 | |||
54 | i2c@80110000 { | ||
55 | bu21013_tp@0x5c { | ||
56 | compatible = "rhom,bu21013_tp"; | ||
57 | reg = <0x5c>; | ||
58 | touch-gpio = <&gpio2 20 0x4>; | ||
59 | avdd-supply = <&ab8500_ldo_aux1_reg>; | ||
60 | |||
61 | rhom,touch-max-x = <384>; | ||
62 | rhom,touch-max-y = <704>; | ||
63 | rhom,flip-y; | ||
64 | }; | ||
65 | |||
66 | bu21013_tp@0x5d { | ||
67 | compatible = "rhom,bu21013_tp"; | ||
68 | reg = <0x5d>; | ||
69 | touch-gpio = <&gpio2 20 0x4>; | ||
70 | avdd-supply = <&ab8500_ldo_aux1_reg>; | ||
71 | |||
72 | rhom,touch-max-x = <384>; | ||
73 | rhom,touch-max-y = <704>; | ||
74 | rhom,flip-y; | ||
75 | }; | ||
76 | }; | ||
77 | }; | ||
78 | }; | ||
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 74b8a47adf91..43eb72af8948 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts | |||
@@ -10,6 +10,18 @@ | |||
10 | reg = <0x00000000 0x40000000>; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | host1x { | ||
14 | hdmi { | ||
15 | status = "okay"; | ||
16 | |||
17 | vdd-supply = <&hdmi_vdd_reg>; | ||
18 | pll-supply = <&hdmi_pll_reg>; | ||
19 | |||
20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | ||
21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ | ||
22 | }; | ||
23 | }; | ||
24 | |||
13 | pinmux { | 25 | pinmux { |
14 | pinctrl-names = "default"; | 26 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 27 | pinctrl-0 = <&state_default>; |
@@ -262,9 +274,9 @@ | |||
262 | }; | 274 | }; |
263 | }; | 275 | }; |
264 | 276 | ||
265 | i2c@7000c400 { | 277 | hdmi_ddc: i2c@7000c400 { |
266 | status = "okay"; | 278 | status = "okay"; |
267 | clock-frequency = <400000>; | 279 | clock-frequency = <100000>; |
268 | }; | 280 | }; |
269 | 281 | ||
270 | i2c@7000c500 { | 282 | i2c@7000c500 { |
@@ -369,13 +381,13 @@ | |||
369 | regulator-max-microvolt = <1800000>; | 381 | regulator-max-microvolt = <1800000>; |
370 | }; | 382 | }; |
371 | 383 | ||
372 | ldo7 { | 384 | hdmi_vdd_reg: ldo7 { |
373 | regulator-name = "vdd_ldo7,avdd_hdmi"; | 385 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
374 | regulator-min-microvolt = <3300000>; | 386 | regulator-min-microvolt = <3300000>; |
375 | regulator-max-microvolt = <3300000>; | 387 | regulator-max-microvolt = <3300000>; |
376 | }; | 388 | }; |
377 | 389 | ||
378 | ldo8 { | 390 | hdmi_pll_reg: ldo8 { |
379 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 391 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
380 | regulator-min-microvolt = <1800000>; | 392 | regulator-min-microvolt = <1800000>; |
381 | regulator-max-microvolt = <1800000>; | 393 | regulator-max-microvolt = <1800000>; |
@@ -396,6 +408,11 @@ | |||
396 | }; | 408 | }; |
397 | }; | 409 | }; |
398 | }; | 410 | }; |
411 | |||
412 | temperature-sensor@4c { | ||
413 | compatible = "adi,adt7461"; | ||
414 | reg = <0x4c>; | ||
415 | }; | ||
399 | }; | 416 | }; |
400 | 417 | ||
401 | pmc { | 418 | pmc { |
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts index 331a3ef24d59..289480026fbf 100644 --- a/arch/arm/boot/dts/tegra20-plutux.dts +++ b/arch/arm/boot/dts/tegra20-plutux.dts | |||
@@ -6,6 +6,12 @@ | |||
6 | model = "Avionic Design Plutux board"; | 6 | model = "Avionic Design Plutux board"; |
7 | compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20"; | 7 | compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20"; |
8 | 8 | ||
9 | host1x { | ||
10 | hdmi { | ||
11 | status = "okay"; | ||
12 | }; | ||
13 | }; | ||
14 | |||
9 | i2c@7000c000 { | 15 | i2c@7000c000 { |
10 | wm8903: wm8903@1a { | 16 | wm8903: wm8903@1a { |
11 | compatible = "wlf,wm8903"; | 17 | compatible = "wlf,wm8903"; |
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 33ae81358d8e..eafeca65eb21 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts | |||
@@ -561,6 +561,12 @@ | |||
561 | status = "okay"; | 561 | status = "okay"; |
562 | }; | 562 | }; |
563 | 563 | ||
564 | sdhci@c8000000 { | ||
565 | status = "okay"; | ||
566 | power-gpios = <&gpio 86 0>; /* gpio PK6 */ | ||
567 | bus-width = <4>; | ||
568 | }; | ||
569 | |||
564 | sdhci@c8000400 { | 570 | sdhci@c8000400 { |
565 | status = "okay"; | 571 | status = "okay"; |
566 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | 572 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 5b3d8b157b33..a239ccdfaa52 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi | |||
@@ -8,6 +8,16 @@ | |||
8 | reg = <0x00000000 0x20000000>; | 8 | reg = <0x00000000 0x20000000>; |
9 | }; | 9 | }; |
10 | 10 | ||
11 | host1x { | ||
12 | hdmi { | ||
13 | vdd-supply = <&hdmi_vdd_reg>; | ||
14 | pll-supply = <&hdmi_pll_reg>; | ||
15 | |||
16 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | ||
17 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ | ||
18 | }; | ||
19 | }; | ||
20 | |||
11 | pinmux { | 21 | pinmux { |
12 | pinctrl-names = "default"; | 22 | pinctrl-names = "default"; |
13 | pinctrl-0 = <&state_default>; | 23 | pinctrl-0 = <&state_default>; |
@@ -62,10 +72,6 @@ | |||
62 | nvidia,pins = "dap4"; | 72 | nvidia,pins = "dap4"; |
63 | nvidia,function = "dap4"; | 73 | nvidia,function = "dap4"; |
64 | }; | 74 | }; |
65 | ddc { | ||
66 | nvidia,pins = "ddc"; | ||
67 | nvidia,function = "i2c2"; | ||
68 | }; | ||
69 | dta { | 75 | dta { |
70 | nvidia,pins = "dta", "dtd"; | 76 | nvidia,pins = "dta", "dtd"; |
71 | nvidia,function = "sdio2"; | 77 | nvidia,function = "sdio2"; |
@@ -91,7 +97,7 @@ | |||
91 | nvidia,function = "pcie"; | 97 | nvidia,function = "pcie"; |
92 | }; | 98 | }; |
93 | hdint { | 99 | hdint { |
94 | nvidia,pins = "hdint", "pta"; | 100 | nvidia,pins = "hdint"; |
95 | nvidia,function = "hdmi"; | 101 | nvidia,function = "hdmi"; |
96 | }; | 102 | }; |
97 | i2cp { | 103 | i2cp { |
@@ -230,6 +236,39 @@ | |||
230 | nvidia,pull = <1>; | 236 | nvidia,pull = <1>; |
231 | }; | 237 | }; |
232 | }; | 238 | }; |
239 | |||
240 | state_i2cmux_ddc: pinmux_i2cmux_ddc { | ||
241 | ddc { | ||
242 | nvidia,pins = "ddc"; | ||
243 | nvidia,function = "i2c2"; | ||
244 | }; | ||
245 | pta { | ||
246 | nvidia,pins = "pta"; | ||
247 | nvidia,function = "rsvd4"; | ||
248 | }; | ||
249 | }; | ||
250 | |||
251 | state_i2cmux_pta: pinmux_i2cmux_pta { | ||
252 | ddc { | ||
253 | nvidia,pins = "ddc"; | ||
254 | nvidia,function = "rsvd4"; | ||
255 | }; | ||
256 | pta { | ||
257 | nvidia,pins = "pta"; | ||
258 | nvidia,function = "i2c2"; | ||
259 | }; | ||
260 | }; | ||
261 | |||
262 | state_i2cmux_idle: pinmux_i2cmux_idle { | ||
263 | ddc { | ||
264 | nvidia,pins = "ddc"; | ||
265 | nvidia,function = "rsvd4"; | ||
266 | }; | ||
267 | pta { | ||
268 | nvidia,pins = "pta"; | ||
269 | nvidia,function = "rsvd4"; | ||
270 | }; | ||
271 | }; | ||
233 | }; | 272 | }; |
234 | 273 | ||
235 | i2s@70002800 { | 274 | i2s@70002800 { |
@@ -246,6 +285,36 @@ | |||
246 | status = "okay"; | 285 | status = "okay"; |
247 | }; | 286 | }; |
248 | 287 | ||
288 | i2c@7000c400 { | ||
289 | clock-frequency = <100000>; | ||
290 | status = "okay"; | ||
291 | }; | ||
292 | |||
293 | i2cmux { | ||
294 | compatible = "i2c-mux-pinctrl"; | ||
295 | #address-cells = <1>; | ||
296 | #size-cells = <0>; | ||
297 | |||
298 | i2c-parent = <&{/i2c@7000c400}>; | ||
299 | |||
300 | pinctrl-names = "ddc", "pta", "idle"; | ||
301 | pinctrl-0 = <&state_i2cmux_ddc>; | ||
302 | pinctrl-1 = <&state_i2cmux_pta>; | ||
303 | pinctrl-2 = <&state_i2cmux_idle>; | ||
304 | |||
305 | hdmi_ddc: i2c@0 { | ||
306 | reg = <0>; | ||
307 | #address-cells = <1>; | ||
308 | #size-cells = <0>; | ||
309 | }; | ||
310 | |||
311 | i2c@1 { | ||
312 | reg = <1>; | ||
313 | #address-cells = <1>; | ||
314 | #size-cells = <0>; | ||
315 | }; | ||
316 | }; | ||
317 | |||
249 | i2c@7000d000 { | 318 | i2c@7000d000 { |
250 | clock-frequency = <400000>; | 319 | clock-frequency = <400000>; |
251 | status = "okay"; | 320 | status = "okay"; |
@@ -348,13 +417,13 @@ | |||
348 | regulator-max-microvolt = <2850000>; | 417 | regulator-max-microvolt = <2850000>; |
349 | }; | 418 | }; |
350 | 419 | ||
351 | ldo7 { | 420 | hdmi_vdd_reg: ldo7 { |
352 | regulator-name = "vdd_ldo7,avdd_hdmi"; | 421 | regulator-name = "vdd_ldo7,avdd_hdmi"; |
353 | regulator-min-microvolt = <3300000>; | 422 | regulator-min-microvolt = <3300000>; |
354 | regulator-max-microvolt = <3300000>; | 423 | regulator-max-microvolt = <3300000>; |
355 | }; | 424 | }; |
356 | 425 | ||
357 | ldo8 { | 426 | hdmi_pll_reg: ldo8 { |
358 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; | 427 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
359 | regulator-min-microvolt = <1800000>; | 428 | regulator-min-microvolt = <1800000>; |
360 | regulator-max-microvolt = <1800000>; | 429 | regulator-max-microvolt = <1800000>; |
@@ -381,6 +450,11 @@ | |||
381 | }; | 450 | }; |
382 | }; | 451 | }; |
383 | }; | 452 | }; |
453 | |||
454 | temperature-sensor@4c { | ||
455 | compatible = "onnn,nct1008"; | ||
456 | reg = <0x4c>; | ||
457 | }; | ||
384 | }; | 458 | }; |
385 | 459 | ||
386 | pmc { | 460 | pmc { |
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts index 9aff31b0fe4a..402b21004bef 100644 --- a/arch/arm/boot/dts/tegra20-tec.dts +++ b/arch/arm/boot/dts/tegra20-tec.dts | |||
@@ -6,10 +6,13 @@ | |||
6 | model = "Avionic Design Tamonten Evaluation Carrier"; | 6 | model = "Avionic Design Tamonten Evaluation Carrier"; |
7 | compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20"; | 7 | compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20"; |
8 | 8 | ||
9 | i2c@7000c000 { | 9 | host1x { |
10 | clock-frequency = <400000>; | 10 | hdmi { |
11 | status = "okay"; | 11 | status = "okay"; |
12 | }; | ||
13 | }; | ||
12 | 14 | ||
15 | i2c@7000c000 { | ||
13 | wm8903: wm8903@1a { | 16 | wm8903: wm8903@1a { |
14 | compatible = "wlf,wm8903"; | 17 | compatible = "wlf,wm8903"; |
15 | reg = <0x1a>; | 18 | reg = <0x1a>; |
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 27fb8a67ea42..b70b4cb754c8 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts | |||
@@ -10,6 +10,18 @@ | |||
10 | reg = <0x00000000 0x40000000>; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | host1x { | ||
14 | hdmi { | ||
15 | status = "okay"; | ||
16 | |||
17 | vdd-supply = <&hdmi_vdd_reg>; | ||
18 | pll-supply = <&hdmi_pll_reg>; | ||
19 | |||
20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | ||
21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ | ||
22 | }; | ||
23 | }; | ||
24 | |||
13 | pinmux { | 25 | pinmux { |
14 | pinctrl-names = "default"; | 26 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 27 | pinctrl-0 = <&state_default>; |
@@ -249,14 +261,24 @@ | |||
249 | clock-frequency = <216000000>; | 261 | clock-frequency = <216000000>; |
250 | }; | 262 | }; |
251 | 263 | ||
252 | i2c@7000c000 { | 264 | dvi_ddc: i2c@7000c000 { |
253 | status = "okay"; | 265 | status = "okay"; |
254 | clock-frequency = <400000>; | 266 | clock-frequency = <100000>; |
255 | }; | 267 | }; |
256 | 268 | ||
257 | i2c@7000c400 { | 269 | spi@7000c380 { |
258 | status = "okay"; | 270 | status = "okay"; |
259 | clock-frequency = <400000>; | 271 | spi-max-frequency = <48000000>; |
272 | spi-flash@0 { | ||
273 | compatible = "winbond,w25q80bl"; | ||
274 | reg = <0>; | ||
275 | spi-max-frequency = <48000000>; | ||
276 | }; | ||
277 | }; | ||
278 | |||
279 | hdmi_ddc: i2c@7000c400 { | ||
280 | status = "okay"; | ||
281 | clock-frequency = <100000>; | ||
260 | }; | 282 | }; |
261 | 283 | ||
262 | i2c@7000c500 { | 284 | i2c@7000c500 { |
@@ -300,6 +322,30 @@ | |||
300 | bus-width = <4>; | 322 | bus-width = <4>; |
301 | }; | 323 | }; |
302 | 324 | ||
325 | regulators { | ||
326 | compatible = "simple-bus"; | ||
327 | #address-cells = <1>; | ||
328 | #size-cells = <0>; | ||
329 | |||
330 | hdmi_vdd_reg: regulator@0 { | ||
331 | compatible = "regulator-fixed"; | ||
332 | reg = <0>; | ||
333 | regulator-name = "avdd_hdmi"; | ||
334 | regulator-min-microvolt = <3300000>; | ||
335 | regulator-max-microvolt = <3300000>; | ||
336 | regulator-always-on; | ||
337 | }; | ||
338 | |||
339 | hdmi_pll_reg: regulator@1 { | ||
340 | compatible = "regulator-fixed"; | ||
341 | reg = <1>; | ||
342 | regulator-name = "avdd_hdmi_pll"; | ||
343 | regulator-min-microvolt = <1800000>; | ||
344 | regulator-max-microvolt = <1800000>; | ||
345 | regulator-always-on; | ||
346 | }; | ||
347 | }; | ||
348 | |||
303 | sound { | 349 | sound { |
304 | compatible = "nvidia,tegra-audio-trimslice"; | 350 | compatible = "nvidia,tegra-audio-trimslice"; |
305 | nvidia,i2s-controller = <&tegra_i2s1>; | 351 | nvidia,i2s-controller = <&tegra_i2s1>; |
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 86854f1abd58..adc47547eaae 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts | |||
@@ -64,11 +64,6 @@ | |||
64 | nvidia,pins = "dap4"; | 64 | nvidia,pins = "dap4"; |
65 | nvidia,function = "dap4"; | 65 | nvidia,function = "dap4"; |
66 | }; | 66 | }; |
67 | ddc { | ||
68 | nvidia,pins = "ddc", "owc", "spdi", "spdo", | ||
69 | "uac"; | ||
70 | nvidia,function = "rsvd2"; | ||
71 | }; | ||
72 | dta { | 67 | dta { |
73 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; | 68 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
74 | nvidia,function = "vi"; | 69 | nvidia,function = "vi"; |
@@ -98,7 +93,7 @@ | |||
98 | nvidia,function = "pcie"; | 93 | nvidia,function = "pcie"; |
99 | }; | 94 | }; |
100 | hdint { | 95 | hdint { |
101 | nvidia,pins = "hdint", "pta"; | 96 | nvidia,pins = "hdint"; |
102 | nvidia,function = "hdmi"; | 97 | nvidia,function = "hdmi"; |
103 | }; | 98 | }; |
104 | i2cp { | 99 | i2cp { |
@@ -129,6 +124,10 @@ | |||
129 | "lspi", "lvp1", "lvs"; | 124 | "lspi", "lvp1", "lvs"; |
130 | nvidia,function = "displaya"; | 125 | nvidia,function = "displaya"; |
131 | }; | 126 | }; |
127 | owc { | ||
128 | nvidia,pins = "owc", "spdi", "spdo", "uac"; | ||
129 | nvidia,function = "rsvd2"; | ||
130 | }; | ||
132 | pmc { | 131 | pmc { |
133 | nvidia,pins = "pmc"; | 132 | nvidia,pins = "pmc"; |
134 | nvidia,function = "pwr_on"; | 133 | nvidia,function = "pwr_on"; |
@@ -237,6 +236,49 @@ | |||
237 | "ld23_22"; | 236 | "ld23_22"; |
238 | nvidia,pull = <1>; | 237 | nvidia,pull = <1>; |
239 | }; | 238 | }; |
239 | drive_sdio1 { | ||
240 | nvidia,pins = "drive_sdio1"; | ||
241 | nvidia,high-speed-mode = <0>; | ||
242 | nvidia,schmitt = <1>; | ||
243 | nvidia,low-power-mode = <3>; | ||
244 | nvidia,pull-down-strength = <31>; | ||
245 | nvidia,pull-up-strength = <31>; | ||
246 | nvidia,slew-rate-rising = <3>; | ||
247 | nvidia,slew-rate-falling = <3>; | ||
248 | }; | ||
249 | }; | ||
250 | |||
251 | state_i2cmux_ddc: pinmux_i2cmux_ddc { | ||
252 | ddc { | ||
253 | nvidia,pins = "ddc"; | ||
254 | nvidia,function = "i2c2"; | ||
255 | }; | ||
256 | pta { | ||
257 | nvidia,pins = "pta"; | ||
258 | nvidia,function = "rsvd4"; | ||
259 | }; | ||
260 | }; | ||
261 | |||
262 | state_i2cmux_pta: pinmux_i2cmux_pta { | ||
263 | ddc { | ||
264 | nvidia,pins = "ddc"; | ||
265 | nvidia,function = "rsvd4"; | ||
266 | }; | ||
267 | pta { | ||
268 | nvidia,pins = "pta"; | ||
269 | nvidia,function = "i2c2"; | ||
270 | }; | ||
271 | }; | ||
272 | |||
273 | state_i2cmux_idle: pinmux_i2cmux_idle { | ||
274 | ddc { | ||
275 | nvidia,pins = "ddc"; | ||
276 | nvidia,function = "rsvd4"; | ||
277 | }; | ||
278 | pta { | ||
279 | nvidia,pins = "pta"; | ||
280 | nvidia,function = "rsvd4"; | ||
281 | }; | ||
240 | }; | 282 | }; |
241 | }; | 283 | }; |
242 | 284 | ||
@@ -281,6 +323,31 @@ | |||
281 | clock-frequency = <400000>; | 323 | clock-frequency = <400000>; |
282 | }; | 324 | }; |
283 | 325 | ||
326 | i2cmux { | ||
327 | compatible = "i2c-mux-pinctrl"; | ||
328 | #address-cells = <1>; | ||
329 | #size-cells = <0>; | ||
330 | |||
331 | i2c-parent = <&{/i2c@7000c400}>; | ||
332 | |||
333 | pinctrl-names = "ddc", "pta", "idle"; | ||
334 | pinctrl-0 = <&state_i2cmux_ddc>; | ||
335 | pinctrl-1 = <&state_i2cmux_pta>; | ||
336 | pinctrl-2 = <&state_i2cmux_idle>; | ||
337 | |||
338 | i2c@0 { | ||
339 | reg = <0>; | ||
340 | #address-cells = <1>; | ||
341 | #size-cells = <0>; | ||
342 | }; | ||
343 | |||
344 | i2c@1 { | ||
345 | reg = <1>; | ||
346 | #address-cells = <1>; | ||
347 | #size-cells = <0>; | ||
348 | }; | ||
349 | }; | ||
350 | |||
284 | i2c@7000c500 { | 351 | i2c@7000c500 { |
285 | status = "okay"; | 352 | status = "okay"; |
286 | clock-frequency = <400000>; | 353 | clock-frequency = <400000>; |
@@ -406,6 +473,11 @@ | |||
406 | }; | 473 | }; |
407 | }; | 474 | }; |
408 | }; | 475 | }; |
476 | |||
477 | temperature-sensor@4c { | ||
478 | compatible = "onnn,nct1008"; | ||
479 | reg = <0x4c>; | ||
480 | }; | ||
409 | }; | 481 | }; |
410 | 482 | ||
411 | pmc { | 483 | pmc { |
@@ -425,6 +497,12 @@ | |||
425 | status = "okay"; | 497 | status = "okay"; |
426 | }; | 498 | }; |
427 | 499 | ||
500 | sdhci@c8000000 { | ||
501 | status = "okay"; | ||
502 | power-gpios = <&gpio 86 0>; /* gpio PK6 */ | ||
503 | bus-width = <4>; | ||
504 | }; | ||
505 | |||
428 | sdhci@c8000400 { | 506 | sdhci@c8000400 { |
429 | status = "okay"; | 507 | status = "okay"; |
430 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | 508 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index 94a71c91beb5..20d576ecd555 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts | |||
@@ -10,6 +10,18 @@ | |||
10 | reg = <0x00000000 0x20000000>; | 10 | reg = <0x00000000 0x20000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | host1x { | ||
14 | hdmi { | ||
15 | status = "okay"; | ||
16 | |||
17 | vdd-supply = <&hdmi_vdd_reg>; | ||
18 | pll-supply = <&hdmi_pll_reg>; | ||
19 | |||
20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | ||
21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ | ||
22 | }; | ||
23 | }; | ||
24 | |||
13 | pinmux { | 25 | pinmux { |
14 | pinctrl-names = "default"; | 26 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 27 | pinctrl-0 = <&state_default>; |
@@ -246,6 +258,11 @@ | |||
246 | clock-frequency = <216000000>; | 258 | clock-frequency = <216000000>; |
247 | }; | 259 | }; |
248 | 260 | ||
261 | hdmi_ddc: i2c@7000c400 { | ||
262 | status = "okay"; | ||
263 | clock-frequency = <100000>; | ||
264 | }; | ||
265 | |||
249 | i2c@7000d000 { | 266 | i2c@7000d000 { |
250 | status = "okay"; | 267 | status = "okay"; |
251 | clock-frequency = <100000>; | 268 | clock-frequency = <100000>; |
@@ -356,7 +373,7 @@ | |||
356 | regulator-always-on; | 373 | regulator-always-on; |
357 | }; | 374 | }; |
358 | 375 | ||
359 | ldo6 { | 376 | hdmi_pll_reg: ldo6 { |
360 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; | 377 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; |
361 | regulator-min-microvolt = <1800000>; | 378 | regulator-min-microvolt = <1800000>; |
362 | regulator-max-microvolt = <1800000>; | 379 | regulator-max-microvolt = <1800000>; |
@@ -388,7 +405,7 @@ | |||
388 | regulator-always-on; | 405 | regulator-always-on; |
389 | }; | 406 | }; |
390 | 407 | ||
391 | ldo11 { | 408 | hdmi_vdd_reg: ldo11 { |
392 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; | 409 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; |
393 | regulator-min-microvolt = <3300000>; | 410 | regulator-min-microvolt = <3300000>; |
394 | regulator-max-microvolt = <3300000>; | 411 | regulator-max-microvolt = <3300000>; |
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f3a09d0d45bc..fba998e3954a 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -4,6 +4,102 @@ | |||
4 | compatible = "nvidia,tegra20"; | 4 | compatible = "nvidia,tegra20"; |
5 | interrupt-parent = <&intc>; | 5 | interrupt-parent = <&intc>; |
6 | 6 | ||
7 | host1x { | ||
8 | compatible = "nvidia,tegra20-host1x", "simple-bus"; | ||
9 | reg = <0x50000000 0x00024000>; | ||
10 | interrupts = <0 65 0x04 /* mpcore syncpt */ | ||
11 | 0 67 0x04>; /* mpcore general */ | ||
12 | |||
13 | #address-cells = <1>; | ||
14 | #size-cells = <1>; | ||
15 | |||
16 | ranges = <0x54000000 0x54000000 0x04000000>; | ||
17 | |||
18 | mpe { | ||
19 | compatible = "nvidia,tegra20-mpe"; | ||
20 | reg = <0x54040000 0x00040000>; | ||
21 | interrupts = <0 68 0x04>; | ||
22 | }; | ||
23 | |||
24 | vi { | ||
25 | compatible = "nvidia,tegra20-vi"; | ||
26 | reg = <0x54080000 0x00040000>; | ||
27 | interrupts = <0 69 0x04>; | ||
28 | }; | ||
29 | |||
30 | epp { | ||
31 | compatible = "nvidia,tegra20-epp"; | ||
32 | reg = <0x540c0000 0x00040000>; | ||
33 | interrupts = <0 70 0x04>; | ||
34 | }; | ||
35 | |||
36 | isp { | ||
37 | compatible = "nvidia,tegra20-isp"; | ||
38 | reg = <0x54100000 0x00040000>; | ||
39 | interrupts = <0 71 0x04>; | ||
40 | }; | ||
41 | |||
42 | gr2d { | ||
43 | compatible = "nvidia,tegra20-gr2d"; | ||
44 | reg = <0x54140000 0x00040000>; | ||
45 | interrupts = <0 72 0x04>; | ||
46 | }; | ||
47 | |||
48 | gr3d { | ||
49 | compatible = "nvidia,tegra20-gr3d"; | ||
50 | reg = <0x54180000 0x00040000>; | ||
51 | }; | ||
52 | |||
53 | dc@54200000 { | ||
54 | compatible = "nvidia,tegra20-dc"; | ||
55 | reg = <0x54200000 0x00040000>; | ||
56 | interrupts = <0 73 0x04>; | ||
57 | |||
58 | rgb { | ||
59 | status = "disabled"; | ||
60 | }; | ||
61 | }; | ||
62 | |||
63 | dc@54240000 { | ||
64 | compatible = "nvidia,tegra20-dc"; | ||
65 | reg = <0x54240000 0x00040000>; | ||
66 | interrupts = <0 74 0x04>; | ||
67 | |||
68 | rgb { | ||
69 | status = "disabled"; | ||
70 | }; | ||
71 | }; | ||
72 | |||
73 | hdmi { | ||
74 | compatible = "nvidia,tegra20-hdmi"; | ||
75 | reg = <0x54280000 0x00040000>; | ||
76 | interrupts = <0 75 0x04>; | ||
77 | status = "disabled"; | ||
78 | }; | ||
79 | |||
80 | tvo { | ||
81 | compatible = "nvidia,tegra20-tvo"; | ||
82 | reg = <0x542c0000 0x00040000>; | ||
83 | interrupts = <0 76 0x04>; | ||
84 | status = "disabled"; | ||
85 | }; | ||
86 | |||
87 | dsi { | ||
88 | compatible = "nvidia,tegra20-dsi"; | ||
89 | reg = <0x54300000 0x00040000>; | ||
90 | status = "disabled"; | ||
91 | }; | ||
92 | }; | ||
93 | |||
94 | cache-controller@50043000 { | ||
95 | compatible = "arm,pl310-cache"; | ||
96 | reg = <0x50043000 0x1000>; | ||
97 | arm,data-latency = <5 5 2>; | ||
98 | arm,tag-latency = <4 4 2>; | ||
99 | cache-unified; | ||
100 | cache-level = <2>; | ||
101 | }; | ||
102 | |||
7 | intc: interrupt-controller { | 103 | intc: interrupt-controller { |
8 | compatible = "arm,cortex-a9-gic"; | 104 | compatible = "arm,cortex-a9-gic"; |
9 | reg = <0x50041000 0x1000 | 105 | reg = <0x50041000 0x1000 |
@@ -138,6 +234,16 @@ | |||
138 | status = "disabled"; | 234 | status = "disabled"; |
139 | }; | 235 | }; |
140 | 236 | ||
237 | spi@7000c380 { | ||
238 | compatible = "nvidia,tegra20-sflash"; | ||
239 | reg = <0x7000c380 0x80>; | ||
240 | interrupts = <0 39 0x04>; | ||
241 | nvidia,dma-request-selector = <&apbdma 11>; | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <0>; | ||
244 | status = "disabled"; | ||
245 | }; | ||
246 | |||
141 | i2c@7000c400 { | 247 | i2c@7000c400 { |
142 | compatible = "nvidia,tegra20-i2c"; | 248 | compatible = "nvidia,tegra20-i2c"; |
143 | reg = <0x7000c400 0x100>; | 249 | reg = <0x7000c400 0x100>; |
@@ -165,6 +271,46 @@ | |||
165 | status = "disabled"; | 271 | status = "disabled"; |
166 | }; | 272 | }; |
167 | 273 | ||
274 | spi@7000d400 { | ||
275 | compatible = "nvidia,tegra20-slink"; | ||
276 | reg = <0x7000d400 0x200>; | ||
277 | interrupts = <0 59 0x04>; | ||
278 | nvidia,dma-request-selector = <&apbdma 15>; | ||
279 | #address-cells = <1>; | ||
280 | #size-cells = <0>; | ||
281 | status = "disabled"; | ||
282 | }; | ||
283 | |||
284 | spi@7000d600 { | ||
285 | compatible = "nvidia,tegra20-slink"; | ||
286 | reg = <0x7000d600 0x200>; | ||
287 | interrupts = <0 82 0x04>; | ||
288 | nvidia,dma-request-selector = <&apbdma 16>; | ||
289 | #address-cells = <1>; | ||
290 | #size-cells = <0>; | ||
291 | status = "disabled"; | ||
292 | }; | ||
293 | |||
294 | spi@7000d800 { | ||
295 | compatible = "nvidia,tegra20-slink"; | ||
296 | reg = <0x7000d480 0x200>; | ||
297 | interrupts = <0 83 0x04>; | ||
298 | nvidia,dma-request-selector = <&apbdma 17>; | ||
299 | #address-cells = <1>; | ||
300 | #size-cells = <0>; | ||
301 | status = "disabled"; | ||
302 | }; | ||
303 | |||
304 | spi@7000da00 { | ||
305 | compatible = "nvidia,tegra20-slink"; | ||
306 | reg = <0x7000da00 0x200>; | ||
307 | interrupts = <0 93 0x04>; | ||
308 | nvidia,dma-request-selector = <&apbdma 18>; | ||
309 | #address-cells = <1>; | ||
310 | #size-cells = <0>; | ||
311 | status = "disabled"; | ||
312 | }; | ||
313 | |||
168 | pmc { | 314 | pmc { |
169 | compatible = "nvidia,tegra20-pmc"; | 315 | compatible = "nvidia,tegra20-pmc"; |
170 | reg = <0x7000e400 0x400>; | 316 | reg = <0x7000e400 0x400>; |
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts index dd4222f00eca..adc88aa50eb6 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts | |||
@@ -83,5 +83,11 @@ | |||
83 | gpio = <&gpio 83 0>; /* GPIO PK3 */ | 83 | gpio = <&gpio 83 0>; /* GPIO PK3 */ |
84 | }; | 84 | }; |
85 | }; | 85 | }; |
86 | |||
87 | sdhci@78000400 { | ||
88 | status = "okay"; | ||
89 | power-gpios = <&gpio 28 0>; /* gpio PD4 */ | ||
90 | bus-width = <4>; | ||
91 | }; | ||
86 | }; | 92 | }; |
87 | 93 | ||
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts index 0828f097ca86..08163e145d57 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts | |||
@@ -95,4 +95,10 @@ | |||
95 | gpio = <&gpio 232 0>; /* GPIO PDD0 */ | 95 | gpio = <&gpio 232 0>; /* GPIO PDD0 */ |
96 | }; | 96 | }; |
97 | }; | 97 | }; |
98 | |||
99 | sdhci@78000400 { | ||
100 | status = "okay"; | ||
101 | power-gpios = <&gpio 27 0>; /* gpio PD3 */ | ||
102 | bus-width = <4>; | ||
103 | }; | ||
98 | }; | 104 | }; |
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index b1271a894327..bdb2a660f376 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi | |||
@@ -52,6 +52,22 @@ | |||
52 | nvidia,pull = <2>; | 52 | nvidia,pull = <2>; |
53 | nvidia,tristate = <0>; | 53 | nvidia,tristate = <0>; |
54 | }; | 54 | }; |
55 | sdmmc3_clk_pa6 { | ||
56 | nvidia,pins = "sdmmc3_clk_pa6"; | ||
57 | nvidia,function = "sdmmc3"; | ||
58 | nvidia,pull = <0>; | ||
59 | nvidia,tristate = <0>; | ||
60 | }; | ||
61 | sdmmc3_cmd_pa7 { | ||
62 | nvidia,pins = "sdmmc3_cmd_pa7", | ||
63 | "sdmmc3_dat0_pb7", | ||
64 | "sdmmc3_dat1_pb6", | ||
65 | "sdmmc3_dat2_pb5", | ||
66 | "sdmmc3_dat3_pb4"; | ||
67 | nvidia,function = "sdmmc3"; | ||
68 | nvidia,pull = <2>; | ||
69 | nvidia,tristate = <0>; | ||
70 | }; | ||
55 | sdmmc4_clk_pcc4 { | 71 | sdmmc4_clk_pcc4 { |
56 | nvidia,pins = "sdmmc4_clk_pcc4", | 72 | nvidia,pins = "sdmmc4_clk_pcc4", |
57 | "sdmmc4_rst_n_pcc3"; | 73 | "sdmmc4_rst_n_pcc3"; |
@@ -81,6 +97,15 @@ | |||
81 | nvidia,pull = <0>; | 97 | nvidia,pull = <0>; |
82 | nvidia,tristate = <0>; | 98 | nvidia,tristate = <0>; |
83 | }; | 99 | }; |
100 | sdio3 { | ||
101 | nvidia,pins = "drive_sdio3"; | ||
102 | nvidia,high-speed-mode = <0>; | ||
103 | nvidia,schmitt = <0>; | ||
104 | nvidia,pull-down-strength = <46>; | ||
105 | nvidia,pull-up-strength = <42>; | ||
106 | nvidia,slew-rate-rising = <1>; | ||
107 | nvidia,slew-rate-falling = <1>; | ||
108 | }; | ||
84 | }; | 109 | }; |
85 | }; | 110 | }; |
86 | 111 | ||
@@ -250,6 +275,16 @@ | |||
250 | }; | 275 | }; |
251 | }; | 276 | }; |
252 | 277 | ||
278 | spi@7000da00 { | ||
279 | status = "okay"; | ||
280 | spi-max-frequency = <25000000>; | ||
281 | spi-flash@1 { | ||
282 | compatible = "winbond,w25q32"; | ||
283 | reg = <1>; | ||
284 | spi-max-frequency = <20000000>; | ||
285 | }; | ||
286 | }; | ||
287 | |||
253 | ahub { | 288 | ahub { |
254 | i2s@70080400 { | 289 | i2s@70080400 { |
255 | status = "okay"; | 290 | status = "okay"; |
@@ -384,6 +419,8 @@ | |||
384 | regulator-name = "vdd_com"; | 419 | regulator-name = "vdd_com"; |
385 | regulator-min-microvolt = <3300000>; | 420 | regulator-min-microvolt = <3300000>; |
386 | regulator-max-microvolt = <3300000>; | 421 | regulator-max-microvolt = <3300000>; |
422 | regulator-always-on; | ||
423 | regulator-boot-on; | ||
387 | enable-active-high; | 424 | enable-active-high; |
388 | gpio = <&gpio 24 0>; /* gpio PD0 */ | 425 | gpio = <&gpio 24 0>; /* gpio PD0 */ |
389 | vin-supply = <&sys_3v3_reg>; | 426 | vin-supply = <&sys_3v3_reg>; |
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index df7f2270fc91..efa603d47a6a 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -4,6 +4,102 @@ | |||
4 | compatible = "nvidia,tegra30"; | 4 | compatible = "nvidia,tegra30"; |
5 | interrupt-parent = <&intc>; | 5 | interrupt-parent = <&intc>; |
6 | 6 | ||
7 | host1x { | ||
8 | compatible = "nvidia,tegra30-host1x", "simple-bus"; | ||
9 | reg = <0x50000000 0x00024000>; | ||
10 | interrupts = <0 65 0x04 /* mpcore syncpt */ | ||
11 | 0 67 0x04>; /* mpcore general */ | ||
12 | |||
13 | #address-cells = <1>; | ||
14 | #size-cells = <1>; | ||
15 | |||
16 | ranges = <0x54000000 0x54000000 0x04000000>; | ||
17 | |||
18 | mpe { | ||
19 | compatible = "nvidia,tegra30-mpe"; | ||
20 | reg = <0x54040000 0x00040000>; | ||
21 | interrupts = <0 68 0x04>; | ||
22 | }; | ||
23 | |||
24 | vi { | ||
25 | compatible = "nvidia,tegra30-vi"; | ||
26 | reg = <0x54080000 0x00040000>; | ||
27 | interrupts = <0 69 0x04>; | ||
28 | }; | ||
29 | |||
30 | epp { | ||
31 | compatible = "nvidia,tegra30-epp"; | ||
32 | reg = <0x540c0000 0x00040000>; | ||
33 | interrupts = <0 70 0x04>; | ||
34 | }; | ||
35 | |||
36 | isp { | ||
37 | compatible = "nvidia,tegra30-isp"; | ||
38 | reg = <0x54100000 0x00040000>; | ||
39 | interrupts = <0 71 0x04>; | ||
40 | }; | ||
41 | |||
42 | gr2d { | ||
43 | compatible = "nvidia,tegra30-gr2d"; | ||
44 | reg = <0x54140000 0x00040000>; | ||
45 | interrupts = <0 72 0x04>; | ||
46 | }; | ||
47 | |||
48 | gr3d { | ||
49 | compatible = "nvidia,tegra30-gr3d"; | ||
50 | reg = <0x54180000 0x00040000>; | ||
51 | }; | ||
52 | |||
53 | dc@54200000 { | ||
54 | compatible = "nvidia,tegra30-dc"; | ||
55 | reg = <0x54200000 0x00040000>; | ||
56 | interrupts = <0 73 0x04>; | ||
57 | |||
58 | rgb { | ||
59 | status = "disabled"; | ||
60 | }; | ||
61 | }; | ||
62 | |||
63 | dc@54240000 { | ||
64 | compatible = "nvidia,tegra30-dc"; | ||
65 | reg = <0x54240000 0x00040000>; | ||
66 | interrupts = <0 74 0x04>; | ||
67 | |||
68 | rgb { | ||
69 | status = "disabled"; | ||
70 | }; | ||
71 | }; | ||
72 | |||
73 | hdmi { | ||
74 | compatible = "nvidia,tegra30-hdmi"; | ||
75 | reg = <0x54280000 0x00040000>; | ||
76 | interrupts = <0 75 0x04>; | ||
77 | status = "disabled"; | ||
78 | }; | ||
79 | |||
80 | tvo { | ||
81 | compatible = "nvidia,tegra30-tvo"; | ||
82 | reg = <0x542c0000 0x00040000>; | ||
83 | interrupts = <0 76 0x04>; | ||
84 | status = "disabled"; | ||
85 | }; | ||
86 | |||
87 | dsi { | ||
88 | compatible = "nvidia,tegra30-dsi"; | ||
89 | reg = <0x54300000 0x00040000>; | ||
90 | status = "disabled"; | ||
91 | }; | ||
92 | }; | ||
93 | |||
94 | cache-controller@50043000 { | ||
95 | compatible = "arm,pl310-cache"; | ||
96 | reg = <0x50043000 0x1000>; | ||
97 | arm,data-latency = <6 6 2>; | ||
98 | arm,tag-latency = <5 5 2>; | ||
99 | cache-unified; | ||
100 | cache-level = <2>; | ||
101 | }; | ||
102 | |||
7 | intc: interrupt-controller { | 103 | intc: interrupt-controller { |
8 | compatible = "arm,cortex-a9-gic"; | 104 | compatible = "arm,cortex-a9-gic"; |
9 | reg = <0x50041000 0x1000 | 105 | reg = <0x50041000 0x1000 |
@@ -168,6 +264,66 @@ | |||
168 | status = "disabled"; | 264 | status = "disabled"; |
169 | }; | 265 | }; |
170 | 266 | ||
267 | spi@7000d400 { | ||
268 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | ||
269 | reg = <0x7000d400 0x200>; | ||
270 | interrupts = <0 59 0x04>; | ||
271 | nvidia,dma-request-selector = <&apbdma 15>; | ||
272 | #address-cells = <1>; | ||
273 | #size-cells = <0>; | ||
274 | status = "disabled"; | ||
275 | }; | ||
276 | |||
277 | spi@7000d600 { | ||
278 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | ||
279 | reg = <0x7000d600 0x200>; | ||
280 | interrupts = <0 82 0x04>; | ||
281 | nvidia,dma-request-selector = <&apbdma 16>; | ||
282 | #address-cells = <1>; | ||
283 | #size-cells = <0>; | ||
284 | status = "disabled"; | ||
285 | }; | ||
286 | |||
287 | spi@7000d800 { | ||
288 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | ||
289 | reg = <0x7000d480 0x200>; | ||
290 | interrupts = <0 83 0x04>; | ||
291 | nvidia,dma-request-selector = <&apbdma 17>; | ||
292 | #address-cells = <1>; | ||
293 | #size-cells = <0>; | ||
294 | status = "disabled"; | ||
295 | }; | ||
296 | |||
297 | spi@7000da00 { | ||
298 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | ||
299 | reg = <0x7000da00 0x200>; | ||
300 | interrupts = <0 93 0x04>; | ||
301 | nvidia,dma-request-selector = <&apbdma 18>; | ||
302 | #address-cells = <1>; | ||
303 | #size-cells = <0>; | ||
304 | status = "disabled"; | ||
305 | }; | ||
306 | |||
307 | spi@7000dc00 { | ||
308 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | ||
309 | reg = <0x7000dc00 0x200>; | ||
310 | interrupts = <0 94 0x04>; | ||
311 | nvidia,dma-request-selector = <&apbdma 27>; | ||
312 | #address-cells = <1>; | ||
313 | #size-cells = <0>; | ||
314 | status = "disabled"; | ||
315 | }; | ||
316 | |||
317 | spi@7000de00 { | ||
318 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | ||
319 | reg = <0x7000de00 0x200>; | ||
320 | interrupts = <0 79 0x04>; | ||
321 | nvidia,dma-request-selector = <&apbdma 28>; | ||
322 | #address-cells = <1>; | ||
323 | #size-cells = <0>; | ||
324 | status = "disabled"; | ||
325 | }; | ||
326 | |||
171 | pmc { | 327 | pmc { |
172 | compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; | 328 | compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; |
173 | reg = <0x7000e400 0x400>; | 329 | reg = <0x7000e400 0x400>; |
diff --git a/arch/arm/boot/dts/u9540.dts b/arch/arm/boot/dts/u9540.dts new file mode 100644 index 000000000000..95892ec6c342 --- /dev/null +++ b/arch/arm/boot/dts/u9540.dts | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * Copyright 2012 ST-Ericsson AB | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "dbx5x0.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "ST-Ericsson U9540 platform with Device Tree"; | ||
17 | compatible = "st-ericsson,u9540"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x00000000 0x20000000>; | ||
21 | }; | ||
22 | |||
23 | soc-u9500 { | ||
24 | uart@80120000 { | ||
25 | status = "okay"; | ||
26 | }; | ||
27 | |||
28 | uart@80121000 { | ||
29 | status = "okay"; | ||
30 | }; | ||
31 | |||
32 | uart@80007000 { | ||
33 | status = "okay"; | ||
34 | }; | ||
35 | |||
36 | // External Micro SD slot | ||
37 | sdi0_per1@80126000 { | ||
38 | arm,primecell-periphid = <0x10480180>; | ||
39 | max-frequency = <100000000>; | ||
40 | bus-width = <4>; | ||
41 | mmc-cap-sd-highspeed; | ||
42 | mmc-cap-mmc-highspeed; | ||
43 | vmmc-supply = <&ab8500_ldo_aux3_reg>; | ||
44 | |||
45 | cd-gpios = <&gpio7 6 0x4>; // 230 | ||
46 | cd-inverted; | ||
47 | |||
48 | status = "okay"; | ||
49 | }; | ||
50 | |||
51 | |||
52 | // WLAN SDIO channel | ||
53 | sdi1_per2@80118000 { | ||
54 | arm,primecell-periphid = <0x10480180>; | ||
55 | max-frequency = <50000000>; | ||
56 | bus-width = <4>; | ||
57 | |||
58 | status = "okay"; | ||
59 | }; | ||
60 | |||
61 | // On-board eMMC | ||
62 | sdi4_per2@80114000 { | ||
63 | arm,primecell-periphid = <0x10480180>; | ||
64 | max-frequency = <100000000>; | ||
65 | bus-width = <8>; | ||
66 | mmc-cap-mmc-highspeed; | ||
67 | vmmc-supply = <&ab8500_ldo_aux2_reg>; | ||
68 | |||
69 | status = "okay"; | ||
70 | }; | ||
71 | }; | ||
72 | }; | ||
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi new file mode 100644 index 000000000000..401c1262d4ed --- /dev/null +++ b/arch/arm/boot/dts/zynq-7000.dtsi | |||
@@ -0,0 +1,166 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Xilinx | ||
3 | * | ||
4 | * This software is licensed under the terms of the GNU General Public | ||
5 | * License version 2, as published by the Free Software Foundation, and | ||
6 | * may be copied, distributed, and modified under those terms. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | */ | ||
13 | /include/ "skeleton.dtsi" | ||
14 | |||
15 | / { | ||
16 | compatible = "xlnx,zynq-7000"; | ||
17 | |||
18 | amba { | ||
19 | compatible = "simple-bus"; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | interrupt-parent = <&intc>; | ||
23 | ranges; | ||
24 | |||
25 | intc: interrupt-controller@f8f01000 { | ||
26 | compatible = "arm,cortex-a9-gic"; | ||
27 | #interrupt-cells = <3>; | ||
28 | #address-cells = <1>; | ||
29 | interrupt-controller; | ||
30 | reg = <0xF8F01000 0x1000>, | ||
31 | <0xF8F00100 0x100>; | ||
32 | }; | ||
33 | |||
34 | L2: cache-controller { | ||
35 | compatible = "arm,pl310-cache"; | ||
36 | reg = <0xF8F02000 0x1000>; | ||
37 | arm,data-latency = <2 3 2>; | ||
38 | arm,tag-latency = <2 3 2>; | ||
39 | cache-unified; | ||
40 | cache-level = <2>; | ||
41 | }; | ||
42 | |||
43 | uart0: uart@e0000000 { | ||
44 | compatible = "xlnx,xuartps"; | ||
45 | reg = <0xE0000000 0x1000>; | ||
46 | interrupts = <0 27 4>; | ||
47 | clock = <50000000>; | ||
48 | }; | ||
49 | |||
50 | uart1: uart@e0001000 { | ||
51 | compatible = "xlnx,xuartps"; | ||
52 | reg = <0xE0001000 0x1000>; | ||
53 | interrupts = <0 50 4>; | ||
54 | clock = <50000000>; | ||
55 | }; | ||
56 | |||
57 | slcr: slcr@f8000000 { | ||
58 | compatible = "xlnx,zynq-slcr"; | ||
59 | reg = <0xF8000000 0x1000>; | ||
60 | |||
61 | clocks { | ||
62 | #address-cells = <1>; | ||
63 | #size-cells = <0>; | ||
64 | |||
65 | ps_clk: ps_clk { | ||
66 | #clock-cells = <0>; | ||
67 | compatible = "fixed-clock"; | ||
68 | /* clock-frequency set in board-specific file */ | ||
69 | clock-output-names = "ps_clk"; | ||
70 | }; | ||
71 | armpll: armpll { | ||
72 | #clock-cells = <0>; | ||
73 | compatible = "xlnx,zynq-pll"; | ||
74 | clocks = <&ps_clk>; | ||
75 | reg = <0x100 0x110>; | ||
76 | clock-output-names = "armpll"; | ||
77 | }; | ||
78 | ddrpll: ddrpll { | ||
79 | #clock-cells = <0>; | ||
80 | compatible = "xlnx,zynq-pll"; | ||
81 | clocks = <&ps_clk>; | ||
82 | reg = <0x104 0x114>; | ||
83 | clock-output-names = "ddrpll"; | ||
84 | }; | ||
85 | iopll: iopll { | ||
86 | #clock-cells = <0>; | ||
87 | compatible = "xlnx,zynq-pll"; | ||
88 | clocks = <&ps_clk>; | ||
89 | reg = <0x108 0x118>; | ||
90 | clock-output-names = "iopll"; | ||
91 | }; | ||
92 | uart_clk: uart_clk { | ||
93 | #clock-cells = <1>; | ||
94 | compatible = "xlnx,zynq-periph-clock"; | ||
95 | clocks = <&iopll &armpll &ddrpll>; | ||
96 | reg = <0x154>; | ||
97 | clock-output-names = "uart0_ref_clk", | ||
98 | "uart1_ref_clk"; | ||
99 | }; | ||
100 | cpu_clk: cpu_clk { | ||
101 | #clock-cells = <1>; | ||
102 | compatible = "xlnx,zynq-cpu-clock"; | ||
103 | clocks = <&iopll &armpll &ddrpll>; | ||
104 | reg = <0x120 0x1C4>; | ||
105 | clock-output-names = "cpu_6x4x", | ||
106 | "cpu_3x2x", | ||
107 | "cpu_2x", | ||
108 | "cpu_1x"; | ||
109 | }; | ||
110 | }; | ||
111 | }; | ||
112 | |||
113 | ttc0: ttc0@f8001000 { | ||
114 | #address-cells = <1>; | ||
115 | #size-cells = <0>; | ||
116 | compatible = "xlnx,ttc"; | ||
117 | reg = <0xF8001000 0x1000>; | ||
118 | clocks = <&cpu_clk 3>; | ||
119 | clock-names = "cpu_1x"; | ||
120 | clock-ranges; | ||
121 | |||
122 | ttc0_0: ttc0.0 { | ||
123 | status = "disabled"; | ||
124 | reg = <0>; | ||
125 | interrupts = <0 10 4>; | ||
126 | }; | ||
127 | ttc0_1: ttc0.1 { | ||
128 | status = "disabled"; | ||
129 | reg = <1>; | ||
130 | interrupts = <0 11 4>; | ||
131 | }; | ||
132 | ttc0_2: ttc0.2 { | ||
133 | status = "disabled"; | ||
134 | reg = <2>; | ||
135 | interrupts = <0 12 4>; | ||
136 | }; | ||
137 | }; | ||
138 | |||
139 | ttc1: ttc1@f8002000 { | ||
140 | #interrupt-parent = <&intc>; | ||
141 | #address-cells = <1>; | ||
142 | #size-cells = <0>; | ||
143 | compatible = "xlnx,ttc"; | ||
144 | reg = <0xF8002000 0x1000>; | ||
145 | clocks = <&cpu_clk 3>; | ||
146 | clock-names = "cpu_1x"; | ||
147 | clock-ranges; | ||
148 | |||
149 | ttc1_0: ttc1.0 { | ||
150 | status = "disabled"; | ||
151 | reg = <0>; | ||
152 | interrupts = <0 37 4>; | ||
153 | }; | ||
154 | ttc1_1: ttc1.1 { | ||
155 | status = "disabled"; | ||
156 | reg = <1>; | ||
157 | interrupts = <0 38 4>; | ||
158 | }; | ||
159 | ttc1_2: ttc1.2 { | ||
160 | status = "disabled"; | ||
161 | reg = <2>; | ||
162 | interrupts = <0 39 4>; | ||
163 | }; | ||
164 | }; | ||
165 | }; | ||
166 | }; | ||
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts deleted file mode 100644 index 574bc044f572..000000000000 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Xilinx | ||
3 | * | ||
4 | * This software is licensed under the terms of the GNU General Public | ||
5 | * License version 2, as published by the Free Software Foundation, and | ||
6 | * may be copied, distributed, and modified under those terms. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | / { | ||
16 | model = "Xilinx Zynq EP107"; | ||
17 | compatible = "xlnx,zynq-ep107"; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | interrupt-parent = <&intc>; | ||
21 | |||
22 | memory { | ||
23 | device_type = "memory"; | ||
24 | reg = <0x0 0x10000000>; | ||
25 | }; | ||
26 | |||
27 | chosen { | ||
28 | bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk"; | ||
29 | linux,stdout-path = &uart0; | ||
30 | }; | ||
31 | |||
32 | amba { | ||
33 | compatible = "simple-bus"; | ||
34 | #address-cells = <1>; | ||
35 | #size-cells = <1>; | ||
36 | ranges; | ||
37 | |||
38 | intc: interrupt-controller@f8f01000 { | ||
39 | compatible = "arm,cortex-a9-gic"; | ||
40 | #interrupt-cells = <3>; | ||
41 | #address-cells = <1>; | ||
42 | interrupt-controller; | ||
43 | reg = <0xF8F01000 0x1000>, | ||
44 | <0xF8F00100 0x100>; | ||
45 | }; | ||
46 | |||
47 | L2: cache-controller { | ||
48 | compatible = "arm,pl310-cache"; | ||
49 | reg = <0xF8F02000 0x1000>; | ||
50 | arm,data-latency = <2 3 2>; | ||
51 | arm,tag-latency = <2 3 2>; | ||
52 | cache-unified; | ||
53 | cache-level = <2>; | ||
54 | }; | ||
55 | |||
56 | uart0: uart@e0000000 { | ||
57 | compatible = "xlnx,xuartps"; | ||
58 | reg = <0xE0000000 0x1000>; | ||
59 | interrupts = <0 27 4>; | ||
60 | clock = <50000000>; | ||
61 | }; | ||
62 | }; | ||
63 | }; | ||
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts new file mode 100644 index 000000000000..c772942a399a --- /dev/null +++ b/arch/arm/boot/dts/zynq-zc702.dts | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Xilinx | ||
3 | * Copyright (C) 2012 National Instruments Corp. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | /dts-v1/; | ||
15 | /include/ "zynq-7000.dtsi" | ||
16 | |||
17 | / { | ||
18 | model = "Zynq ZC702 Development Board"; | ||
19 | compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; | ||
20 | |||
21 | memory { | ||
22 | device_type = "memory"; | ||
23 | reg = <0x0 0x40000000>; | ||
24 | }; | ||
25 | |||
26 | chosen { | ||
27 | bootargs = "console=ttyPS1,115200 earlyprintk"; | ||
28 | }; | ||
29 | |||
30 | }; | ||
31 | |||
32 | &ps_clk { | ||
33 | clock-frequency = <33333330>; | ||
34 | }; | ||
35 | |||
36 | &ttc0_0 { | ||
37 | status = "ok"; | ||
38 | compatible = "xlnx,ttc-counter-clocksource"; | ||
39 | }; | ||
40 | |||
41 | &ttc0_1 { | ||
42 | status = "ok"; | ||
43 | compatible = "xlnx,ttc-counter-clockevent"; | ||
44 | }; | ||
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig index 40db34cf2771..0b7ee92c5713 100644 --- a/arch/arm/configs/dove_defconfig +++ b/arch/arm/configs/dove_defconfig | |||
@@ -8,11 +8,19 @@ CONFIG_MODULE_UNLOAD=y | |||
8 | # CONFIG_BLK_DEV_BSG is not set | 8 | # CONFIG_BLK_DEV_BSG is not set |
9 | CONFIG_ARCH_DOVE=y | 9 | CONFIG_ARCH_DOVE=y |
10 | CONFIG_MACH_DOVE_DB=y | 10 | CONFIG_MACH_DOVE_DB=y |
11 | CONFIG_MACH_CM_A510=y | ||
12 | CONFIG_MACH_DOVE_DT=y | ||
11 | CONFIG_NO_HZ=y | 13 | CONFIG_NO_HZ=y |
12 | CONFIG_HIGH_RES_TIMERS=y | 14 | CONFIG_HIGH_RES_TIMERS=y |
13 | CONFIG_AEABI=y | 15 | CONFIG_AEABI=y |
14 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 16 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
15 | CONFIG_ZBOOT_ROM_BSS=0x0 | 17 | CONFIG_ZBOOT_ROM_BSS=0x0 |
18 | CONFIG_HIGHMEM=y | ||
19 | CONFIG_USE_OF=y | ||
20 | CONFIG_ATAGS=y | ||
21 | CONFIG_ARM_APPENDED_DTB=y | ||
22 | CONFIG_ARM_ATAG_DTB_COMPAT=y | ||
23 | CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y | ||
16 | CONFIG_VFP=y | 24 | CONFIG_VFP=y |
17 | CONFIG_NET=y | 25 | CONFIG_NET=y |
18 | CONFIG_PACKET=y | 26 | CONFIG_PACKET=y |
@@ -62,6 +70,9 @@ CONFIG_SERIAL_8250=y | |||
62 | CONFIG_SERIAL_8250_CONSOLE=y | 70 | CONFIG_SERIAL_8250_CONSOLE=y |
63 | # CONFIG_SERIAL_8250_PCI is not set | 71 | # CONFIG_SERIAL_8250_PCI is not set |
64 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | 72 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 |
73 | CONFIG_SERIAL_CORE=y | ||
74 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
75 | CONFIG_SERIAL_OF_PLATFORM=y | ||
65 | # CONFIG_HW_RANDOM is not set | 76 | # CONFIG_HW_RANDOM is not set |
66 | CONFIG_I2C=y | 77 | CONFIG_I2C=y |
67 | CONFIG_I2C_CHARDEV=y | 78 | CONFIG_I2C_CHARDEV=y |
@@ -74,6 +85,18 @@ CONFIG_USB_DEVICEFS=y | |||
74 | CONFIG_USB_EHCI_HCD=y | 85 | CONFIG_USB_EHCI_HCD=y |
75 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | 86 | CONFIG_USB_EHCI_ROOT_HUB_TT=y |
76 | CONFIG_USB_STORAGE=y | 87 | CONFIG_USB_STORAGE=y |
88 | CONFIG_MMC=y | ||
89 | CONFIG_MMC_SDHCI=y | ||
90 | CONFIG_MMC_SDHCI_IO_ACCESSORS=y | ||
91 | CONFIG_MMC_SDHCI_PLTFM=y | ||
92 | CONFIG_MMC_SDHCI_DOVE=y | ||
93 | CONFIG_NEW_LEDS=y | ||
94 | CONFIG_LEDS_CLASS=y | ||
95 | CONFIG_LEDS_GPIO=y | ||
96 | CONFIG_LEDS_TRIGGERS=y | ||
97 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
98 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
99 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
77 | CONFIG_RTC_CLASS=y | 100 | CONFIG_RTC_CLASS=y |
78 | CONFIG_RTC_DRV_MV=y | 101 | CONFIG_RTC_DRV_MV=y |
79 | CONFIG_DMADEVICES=y | 102 | CONFIG_DMADEVICES=y |
@@ -122,6 +145,7 @@ CONFIG_CRYPTO_TWOFISH=y | |||
122 | CONFIG_CRYPTO_DEFLATE=y | 145 | CONFIG_CRYPTO_DEFLATE=y |
123 | CONFIG_CRYPTO_LZO=y | 146 | CONFIG_CRYPTO_LZO=y |
124 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 147 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
148 | CONFIG_CRYPTO_DEV_MV_CESA=y | ||
125 | CONFIG_CRC_CCITT=y | 149 | CONFIG_CRC_CCITT=y |
126 | CONFIG_CRC16=y | 150 | CONFIG_CRC16=y |
127 | CONFIG_LIBCRC32C=y | 151 | CONFIG_LIBCRC32C=y |
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig index 74eee0c78f28..93f3794ba5cb 100644 --- a/arch/arm/configs/kirkwood_defconfig +++ b/arch/arm/configs/kirkwood_defconfig | |||
@@ -27,6 +27,14 @@ CONFIG_MACH_GOFLEXNET_DT=y | |||
27 | CONFIG_MACH_LSXL_DT=y | 27 | CONFIG_MACH_LSXL_DT=y |
28 | CONFIG_MACH_IOMEGA_IX2_200_DT=y | 28 | CONFIG_MACH_IOMEGA_IX2_200_DT=y |
29 | CONFIG_MACH_KM_KIRKWOOD_DT=y | 29 | CONFIG_MACH_KM_KIRKWOOD_DT=y |
30 | CONFIG_MACH_INETSPACE_V2_DT=y | ||
31 | CONFIG_MACH_MPLCEC4_DT=y | ||
32 | CONFIG_MACH_NETSPACE_V2_DT=y | ||
33 | CONFIG_MACH_NETSPACE_MAX_V2_DT=y | ||
34 | CONFIG_MACH_NETSPACE_LITE_V2_DT=y | ||
35 | CONFIG_MACH_NETSPACE_MINI_V2_DT=y | ||
36 | CONFIG_MACH_OPENBLOCKS_A6_DT=y | ||
37 | CONFIG_MACH_TOPKICK_DT=y | ||
30 | CONFIG_MACH_TS219=y | 38 | CONFIG_MACH_TS219=y |
31 | CONFIG_MACH_TS41X=y | 39 | CONFIG_MACH_TS41X=y |
32 | CONFIG_MACH_DOCKSTAR=y | 40 | CONFIG_MACH_DOCKSTAR=y |
@@ -40,6 +48,7 @@ CONFIG_MACH_D2NET_V2=y | |||
40 | CONFIG_MACH_NET2BIG_V2=y | 48 | CONFIG_MACH_NET2BIG_V2=y |
41 | CONFIG_MACH_NET5BIG_V2=y | 49 | CONFIG_MACH_NET5BIG_V2=y |
42 | CONFIG_MACH_T5325=y | 50 | CONFIG_MACH_T5325=y |
51 | CONFIG_MACH_NSA310_DT=y | ||
43 | # CONFIG_CPU_FEROCEON_OLD_ID is not set | 52 | # CONFIG_CPU_FEROCEON_OLD_ID is not set |
44 | CONFIG_PREEMPT=y | 53 | CONFIG_PREEMPT=y |
45 | CONFIG_AEABI=y | 54 | CONFIG_AEABI=y |
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 048aaca60814..7bf535104e26 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig | |||
@@ -61,6 +61,8 @@ CONFIG_MTD_NAND_GPMI_NAND=y | |||
61 | CONFIG_NETDEVICES=y | 61 | CONFIG_NETDEVICES=y |
62 | CONFIG_NET_ETHERNET=y | 62 | CONFIG_NET_ETHERNET=y |
63 | CONFIG_ENC28J60=y | 63 | CONFIG_ENC28J60=y |
64 | CONFIG_USB_USBNET=y | ||
65 | CONFIG_USB_NET_SMSC95XX=y | ||
64 | # CONFIG_NETDEV_1000 is not set | 66 | # CONFIG_NETDEV_1000 is not set |
65 | # CONFIG_NETDEV_10000 is not set | 67 | # CONFIG_NETDEV_10000 is not set |
66 | # CONFIG_WLAN is not set | 68 | # CONFIG_WLAN is not set |
@@ -158,6 +160,10 @@ CONFIG_NFS_V3=y | |||
158 | CONFIG_NFS_V3_ACL=y | 160 | CONFIG_NFS_V3_ACL=y |
159 | CONFIG_NFS_V4=y | 161 | CONFIG_NFS_V4=y |
160 | CONFIG_ROOT_NFS=y | 162 | CONFIG_ROOT_NFS=y |
163 | CONFIG_NLS_CODEPAGE_437=y | ||
164 | CONFIG_NLS_CODEPAGE_850=y | ||
165 | CONFIG_NLS_ISO8859_1=y | ||
166 | CONFIG_NLS_ISO8859_15=y | ||
161 | CONFIG_PRINTK_TIME=y | 167 | CONFIG_PRINTK_TIME=y |
162 | CONFIG_FRAME_WARN=2048 | 168 | CONFIG_FRAME_WARN=2048 |
163 | CONFIG_MAGIC_SYSRQ=y | 169 | CONFIG_MAGIC_SYSRQ=y |
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig index cd5e6ba9a54d..952430d9e2d9 100644 --- a/arch/arm/configs/orion5x_defconfig +++ b/arch/arm/configs/orion5x_defconfig | |||
@@ -1,7 +1,8 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | 1 | CONFIG_EXPERIMENTAL=y |
2 | CONFIG_SYSVIPC=y | 2 | CONFIG_SYSVIPC=y |
3 | CONFIG_NO_HZ=y | ||
4 | CONFIG_HIGH_RES_TIMERS=y | ||
3 | CONFIG_LOG_BUF_SHIFT=14 | 5 | CONFIG_LOG_BUF_SHIFT=14 |
4 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
5 | CONFIG_EXPERT=y | 6 | CONFIG_EXPERT=y |
6 | # CONFIG_SLUB_DEBUG is not set | 7 | # CONFIG_SLUB_DEBUG is not set |
7 | CONFIG_PROFILING=y | 8 | CONFIG_PROFILING=y |
@@ -10,6 +11,8 @@ CONFIG_KPROBES=y | |||
10 | CONFIG_MODULES=y | 11 | CONFIG_MODULES=y |
11 | CONFIG_MODULE_UNLOAD=y | 12 | CONFIG_MODULE_UNLOAD=y |
12 | # CONFIG_BLK_DEV_BSG is not set | 13 | # CONFIG_BLK_DEV_BSG is not set |
14 | CONFIG_PARTITION_ADVANCED=y | ||
15 | CONFIG_BSD_DISKLABEL=y | ||
13 | CONFIG_ARCH_ORION5X=y | 16 | CONFIG_ARCH_ORION5X=y |
14 | CONFIG_MACH_DB88F5281=y | 17 | CONFIG_MACH_DB88F5281=y |
15 | CONFIG_MACH_RD88F5182=y | 18 | CONFIG_MACH_RD88F5182=y |
@@ -24,7 +27,7 @@ CONFIG_MACH_TS409=y | |||
24 | CONFIG_MACH_WRT350N_V2=y | 27 | CONFIG_MACH_WRT350N_V2=y |
25 | CONFIG_MACH_TS78XX=y | 28 | CONFIG_MACH_TS78XX=y |
26 | CONFIG_MACH_MV2120=y | 29 | CONFIG_MACH_MV2120=y |
27 | CONFIG_MACH_EDMINI_V2=y | 30 | CONFIG_MACH_EDMINI_V2_DT=y |
28 | CONFIG_MACH_D2NET=y | 31 | CONFIG_MACH_D2NET=y |
29 | CONFIG_MACH_BIGDISK=y | 32 | CONFIG_MACH_BIGDISK=y |
30 | CONFIG_MACH_NET2BIG=y | 33 | CONFIG_MACH_NET2BIG=y |
@@ -33,17 +36,13 @@ CONFIG_MACH_WNR854T=y | |||
33 | CONFIG_MACH_RD88F5181L_GE=y | 36 | CONFIG_MACH_RD88F5181L_GE=y |
34 | CONFIG_MACH_RD88F5181L_FXO=y | 37 | CONFIG_MACH_RD88F5181L_FXO=y |
35 | CONFIG_MACH_RD88F6183AP_GE=y | 38 | CONFIG_MACH_RD88F6183AP_GE=y |
36 | CONFIG_NO_HZ=y | ||
37 | CONFIG_HIGH_RES_TIMERS=y | ||
38 | CONFIG_PREEMPT=y | 39 | CONFIG_PREEMPT=y |
39 | CONFIG_AEABI=y | 40 | CONFIG_AEABI=y |
40 | CONFIG_LEDS=y | ||
41 | CONFIG_LEDS_CPU=y | ||
42 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 41 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
43 | CONFIG_ZBOOT_ROM_BSS=0x0 | 42 | CONFIG_ZBOOT_ROM_BSS=0x0 |
43 | CONFIG_ARM_APPENDED_DTB=y | ||
44 | CONFIG_FPE_NWFPE=y | 44 | CONFIG_FPE_NWFPE=y |
45 | CONFIG_VFP=y | 45 | CONFIG_VFP=y |
46 | # CONFIG_SUSPEND is not set | ||
47 | CONFIG_NET=y | 46 | CONFIG_NET=y |
48 | CONFIG_PACKET=y | 47 | CONFIG_PACKET=y |
49 | CONFIG_UNIX=y | 48 | CONFIG_UNIX=y |
@@ -54,13 +53,10 @@ CONFIG_IP_PNP_DHCP=y | |||
54 | CONFIG_IP_PNP_BOOTP=y | 53 | CONFIG_IP_PNP_BOOTP=y |
55 | # CONFIG_IPV6 is not set | 54 | # CONFIG_IPV6 is not set |
56 | CONFIG_NET_DSA=y | 55 | CONFIG_NET_DSA=y |
57 | CONFIG_NET_DSA_MV88E6131=y | ||
58 | CONFIG_NET_DSA_MV88E6123_61_65=y | ||
59 | CONFIG_NET_PKTGEN=m | 56 | CONFIG_NET_PKTGEN=m |
60 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 57 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
61 | # CONFIG_FIRMWARE_IN_KERNEL is not set | 58 | # CONFIG_FIRMWARE_IN_KERNEL is not set |
62 | CONFIG_MTD=y | 59 | CONFIG_MTD=y |
63 | CONFIG_MTD_PARTITIONS=y | ||
64 | CONFIG_MTD_CMDLINE_PARTS=y | 60 | CONFIG_MTD_CMDLINE_PARTS=y |
65 | CONFIG_MTD_CHAR=y | 61 | CONFIG_MTD_CHAR=y |
66 | CONFIG_MTD_BLOCK=y | 62 | CONFIG_MTD_BLOCK=y |
@@ -82,12 +78,11 @@ CONFIG_CHR_DEV_SG=m | |||
82 | CONFIG_ATA=y | 78 | CONFIG_ATA=y |
83 | CONFIG_SATA_MV=y | 79 | CONFIG_SATA_MV=y |
84 | CONFIG_NETDEVICES=y | 80 | CONFIG_NETDEVICES=y |
85 | CONFIG_MARVELL_PHY=y | ||
86 | CONFIG_NET_ETHERNET=y | ||
87 | CONFIG_MII=y | 81 | CONFIG_MII=y |
88 | CONFIG_NET_PCI=y | 82 | CONFIG_NET_DSA_MV88E6131=y |
83 | CONFIG_NET_DSA_MV88E6123_61_65=y | ||
89 | CONFIG_MV643XX_ETH=y | 84 | CONFIG_MV643XX_ETH=y |
90 | # CONFIG_NETDEV_10000 is not set | 85 | CONFIG_MARVELL_PHY=y |
91 | # CONFIG_INPUT_MOUSEDEV is not set | 86 | # CONFIG_INPUT_MOUSEDEV is not set |
92 | CONFIG_INPUT_EVDEV=y | 87 | CONFIG_INPUT_EVDEV=y |
93 | # CONFIG_KEYBOARD_ATKBD is not set | 88 | # CONFIG_KEYBOARD_ATKBD is not set |
@@ -95,11 +90,12 @@ CONFIG_KEYBOARD_GPIO=y | |||
95 | # CONFIG_INPUT_MOUSE is not set | 90 | # CONFIG_INPUT_MOUSE is not set |
96 | # CONFIG_SERIO is not set | 91 | # CONFIG_SERIO is not set |
97 | # CONFIG_VT is not set | 92 | # CONFIG_VT is not set |
93 | CONFIG_LEGACY_PTY_COUNT=16 | ||
98 | CONFIG_SERIAL_8250=y | 94 | CONFIG_SERIAL_8250=y |
99 | CONFIG_SERIAL_8250_CONSOLE=y | 95 | CONFIG_SERIAL_8250_CONSOLE=y |
100 | # CONFIG_SERIAL_8250_PCI is not set | 96 | # CONFIG_SERIAL_8250_PCI is not set |
101 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | 97 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 |
102 | CONFIG_LEGACY_PTY_COUNT=16 | 98 | CONFIG_SERIAL_OF_PLATFORM=y |
103 | CONFIG_HW_RANDOM_TIMERIOMEM=m | 99 | CONFIG_HW_RANDOM_TIMERIOMEM=m |
104 | CONFIG_I2C=y | 100 | CONFIG_I2C=y |
105 | # CONFIG_I2C_COMPAT is not set | 101 | # CONFIG_I2C_COMPAT is not set |
@@ -109,10 +105,8 @@ CONFIG_GPIO_SYSFS=y | |||
109 | CONFIG_SENSORS_LM75=y | 105 | CONFIG_SENSORS_LM75=y |
110 | # CONFIG_VGA_ARB is not set | 106 | # CONFIG_VGA_ARB is not set |
111 | CONFIG_USB=y | 107 | CONFIG_USB=y |
112 | CONFIG_USB_DEVICEFS=y | ||
113 | CONFIG_USB_EHCI_HCD=y | 108 | CONFIG_USB_EHCI_HCD=y |
114 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | 109 | CONFIG_USB_EHCI_ROOT_HUB_TT=y |
115 | CONFIG_USB_EHCI_TT_NEWSCHED=y | ||
116 | CONFIG_USB_PRINTER=y | 110 | CONFIG_USB_PRINTER=y |
117 | CONFIG_USB_STORAGE=y | 111 | CONFIG_USB_STORAGE=y |
118 | CONFIG_USB_STORAGE_DATAFAB=y | 112 | CONFIG_USB_STORAGE_DATAFAB=y |
@@ -140,7 +134,6 @@ CONFIG_EXT2_FS=y | |||
140 | CONFIG_EXT3_FS=y | 134 | CONFIG_EXT3_FS=y |
141 | # CONFIG_EXT3_FS_XATTR is not set | 135 | # CONFIG_EXT3_FS_XATTR is not set |
142 | CONFIG_EXT4_FS=m | 136 | CONFIG_EXT4_FS=m |
143 | CONFIG_INOTIFY=y | ||
144 | CONFIG_ISO9660_FS=m | 137 | CONFIG_ISO9660_FS=m |
145 | CONFIG_JOLIET=y | 138 | CONFIG_JOLIET=y |
146 | CONFIG_UDF_FS=m | 139 | CONFIG_UDF_FS=m |
@@ -150,25 +143,18 @@ CONFIG_TMPFS=y | |||
150 | CONFIG_JFFS2_FS=y | 143 | CONFIG_JFFS2_FS=y |
151 | CONFIG_CRAMFS=y | 144 | CONFIG_CRAMFS=y |
152 | CONFIG_NFS_FS=y | 145 | CONFIG_NFS_FS=y |
153 | CONFIG_NFS_V3=y | ||
154 | CONFIG_ROOT_NFS=y | 146 | CONFIG_ROOT_NFS=y |
155 | CONFIG_PARTITION_ADVANCED=y | ||
156 | CONFIG_BSD_DISKLABEL=y | ||
157 | CONFIG_NLS_CODEPAGE_437=y | 147 | CONFIG_NLS_CODEPAGE_437=y |
158 | CONFIG_NLS_CODEPAGE_850=y | 148 | CONFIG_NLS_CODEPAGE_850=y |
159 | CONFIG_NLS_ISO8859_1=y | 149 | CONFIG_NLS_ISO8859_1=y |
160 | CONFIG_NLS_ISO8859_2=y | 150 | CONFIG_NLS_ISO8859_2=y |
161 | CONFIG_MAGIC_SYSRQ=y | 151 | CONFIG_MAGIC_SYSRQ=y |
162 | CONFIG_DEBUG_FS=y | 152 | CONFIG_DEBUG_FS=y |
163 | CONFIG_DEBUG_KERNEL=y | ||
164 | # CONFIG_DEBUG_BUGVERBOSE is not set | 153 | # CONFIG_DEBUG_BUGVERBOSE is not set |
165 | CONFIG_DEBUG_INFO=y | 154 | CONFIG_DEBUG_INFO=y |
166 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
167 | CONFIG_LATENCYTOP=y | 155 | CONFIG_LATENCYTOP=y |
168 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
169 | # CONFIG_FTRACE is not set | 156 | # CONFIG_FTRACE is not set |
170 | CONFIG_DEBUG_USER=y | 157 | CONFIG_DEBUG_USER=y |
171 | CONFIG_DEBUG_ERRORS=y | ||
172 | CONFIG_DEBUG_LL=y | 158 | CONFIG_DEBUG_LL=y |
173 | CONFIG_CRYPTO_CBC=m | 159 | CONFIG_CRYPTO_CBC=m |
174 | CONFIG_CRYPTO_ECB=m | 160 | CONFIG_CRYPTO_ECB=m |
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig index da6845493caa..6fe7ede6f0c2 100644 --- a/arch/arm/configs/u8500_defconfig +++ b/arch/arm/configs/u8500_defconfig | |||
@@ -76,6 +76,7 @@ CONFIG_AB8500_CORE=y | |||
76 | CONFIG_REGULATOR=y | 76 | CONFIG_REGULATOR=y |
77 | CONFIG_REGULATOR_AB8500=y | 77 | CONFIG_REGULATOR_AB8500=y |
78 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | 78 | CONFIG_REGULATOR_FIXED_VOLTAGE=y |
79 | CONFIG_REGULATOR_GPIO=y | ||
79 | # CONFIG_HID_SUPPORT is not set | 80 | # CONFIG_HID_SUPPORT is not set |
80 | CONFIG_USB_GADGET=y | 81 | CONFIG_USB_GADGET=y |
81 | CONFIG_AB8500_USB=y | 82 | CONFIG_AB8500_USB=y |
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S index 0b65d792f664..0c4e17d4d359 100644 --- a/arch/arm/include/debug/imx.S +++ b/arch/arm/include/debug/imx.S | |||
@@ -10,6 +10,20 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | #define IMX6Q_UART1_BASE_ADDR 0x02020000 | ||
14 | #define IMX6Q_UART2_BASE_ADDR 0x021e8000 | ||
15 | #define IMX6Q_UART3_BASE_ADDR 0x021ec000 | ||
16 | #define IMX6Q_UART4_BASE_ADDR 0x021f0000 | ||
17 | #define IMX6Q_UART5_BASE_ADDR 0x021f4000 | ||
18 | |||
19 | /* | ||
20 | * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion | ||
21 | * of IMX6Q_UART##n##_BASE_ADDR. | ||
22 | */ | ||
23 | #define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR | ||
24 | #define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) | ||
25 | #define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) | ||
26 | |||
13 | #ifdef CONFIG_DEBUG_IMX1_UART | 27 | #ifdef CONFIG_DEBUG_IMX1_UART |
14 | #define UART_PADDR 0x00206000 | 28 | #define UART_PADDR 0x00206000 |
15 | #elif defined (CONFIG_DEBUG_IMX25_UART) | 29 | #elif defined (CONFIG_DEBUG_IMX25_UART) |
@@ -22,10 +36,8 @@ | |||
22 | #define UART_PADDR 0x73fbc000 | 36 | #define UART_PADDR 0x73fbc000 |
23 | #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) | 37 | #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) |
24 | #define UART_PADDR 0x53fbc000 | 38 | #define UART_PADDR 0x53fbc000 |
25 | #elif defined (CONFIG_DEBUG_IMX6Q_UART2) | 39 | #elif defined (CONFIG_DEBUG_IMX6Q_UART) |
26 | #define UART_PADDR 0x021e8000 | 40 | #define UART_PADDR IMX6Q_DEBUG_UART_BASE |
27 | #elif defined (CONFIG_DEBUG_IMX6Q_UART4) | ||
28 | #define UART_PADDR 0x021f0000 | ||
29 | #endif | 41 | #endif |
30 | 42 | ||
31 | /* | 43 | /* |
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index f8eecb959413..0153950f6068 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig | |||
@@ -58,6 +58,14 @@ config ARCH_DAVINCI_TNETV107X | |||
58 | 58 | ||
59 | comment "DaVinci Board Type" | 59 | comment "DaVinci Board Type" |
60 | 60 | ||
61 | config MACH_DA8XX_DT | ||
62 | bool "Support DA8XX platforms using device tree" | ||
63 | default y | ||
64 | depends on ARCH_DAVINCI_DA8XX | ||
65 | help | ||
66 | Say y here to include support for TI DaVinci DA850 based using | ||
67 | Flattened Device Tree. More information at Documentation/devicetree | ||
68 | |||
61 | config MACH_DAVINCI_EVM | 69 | config MACH_DAVINCI_EVM |
62 | bool "TI DM644x EVM" | 70 | bool "TI DM644x EVM" |
63 | default ARCH_DAVINCI_DM644x | 71 | default ARCH_DAVINCI_DM644x |
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 2227effcb0e9..fb5c1aa98a63 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile | |||
@@ -22,6 +22,7 @@ obj-$(CONFIG_AINTC) += irq.o | |||
22 | obj-$(CONFIG_CP_INTC) += cp_intc.o | 22 | obj-$(CONFIG_CP_INTC) += cp_intc.o |
23 | 23 | ||
24 | # Board specific | 24 | # Board specific |
25 | obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o | ||
25 | obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o | 26 | obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o |
26 | obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o | 27 | obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o |
27 | obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o | 28 | obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o |
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index 88ebea89abdf..cdf8d0746e79 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -324,7 +324,7 @@ static __init void dm355_evm_init(void) | |||
324 | if (IS_ERR(aemif)) | 324 | if (IS_ERR(aemif)) |
325 | WARN("%s: unable to get AEMIF clock\n", __func__); | 325 | WARN("%s: unable to get AEMIF clock\n", __func__); |
326 | else | 326 | else |
327 | clk_enable(aemif); | 327 | clk_prepare_enable(aemif); |
328 | 328 | ||
329 | platform_add_devices(davinci_evm_devices, | 329 | platform_add_devices(davinci_evm_devices, |
330 | ARRAY_SIZE(davinci_evm_devices)); | 330 | ARRAY_SIZE(davinci_evm_devices)); |
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index 2f88103c6459..d41954507fc2 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c | |||
@@ -246,7 +246,7 @@ static __init void dm355_leopard_init(void) | |||
246 | if (IS_ERR(aemif)) | 246 | if (IS_ERR(aemif)) |
247 | WARN("%s: unable to get AEMIF clock\n", __func__); | 247 | WARN("%s: unable to get AEMIF clock\n", __func__); |
248 | else | 248 | else |
249 | clk_enable(aemif); | 249 | clk_prepare_enable(aemif); |
250 | 250 | ||
251 | platform_add_devices(davinci_leopard_devices, | 251 | platform_add_devices(davinci_leopard_devices, |
252 | ARRAY_SIZE(davinci_leopard_devices)); | 252 | ARRAY_SIZE(davinci_leopard_devices)); |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 1b4a8adcfdc9..5d49c75388ca 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -478,7 +478,7 @@ static void __init evm_init_cpld(void) | |||
478 | aemif_clk = clk_get(NULL, "aemif"); | 478 | aemif_clk = clk_get(NULL, "aemif"); |
479 | if (IS_ERR(aemif_clk)) | 479 | if (IS_ERR(aemif_clk)) |
480 | return; | 480 | return; |
481 | clk_enable(aemif_clk); | 481 | clk_prepare_enable(aemif_clk); |
482 | 482 | ||
483 | if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, | 483 | if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, |
484 | "cpld") == NULL) | 484 | "cpld") == NULL) |
@@ -489,7 +489,7 @@ static void __init evm_init_cpld(void) | |||
489 | SECTION_SIZE); | 489 | SECTION_SIZE); |
490 | fail: | 490 | fail: |
491 | pr_err("ERROR: can't map CPLD\n"); | 491 | pr_err("ERROR: can't map CPLD\n"); |
492 | clk_disable(aemif_clk); | 492 | clk_disable_unprepare(aemif_clk); |
493 | return; | 493 | return; |
494 | } | 494 | } |
495 | 495 | ||
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index f22572cee49d..a84dfcbc1154 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -776,7 +776,7 @@ static __init void davinci_evm_init(void) | |||
776 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 776 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
777 | 777 | ||
778 | aemif_clk = clk_get(NULL, "aemif"); | 778 | aemif_clk = clk_get(NULL, "aemif"); |
779 | clk_enable(aemif_clk); | 779 | clk_prepare_enable(aemif_clk); |
780 | 780 | ||
781 | if (HAS_ATA) { | 781 | if (HAS_ATA) { |
782 | if (HAS_NAND || HAS_NOR) | 782 | if (HAS_NAND || HAS_NOR) |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 144bf31d68dd..3e3e3afebf88 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
@@ -188,7 +188,7 @@ static __init void davinci_ntosd2_init(void) | |||
188 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 188 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
189 | 189 | ||
190 | aemif_clk = clk_get(NULL, "aemif"); | 190 | aemif_clk = clk_get(NULL, "aemif"); |
191 | clk_enable(aemif_clk); | 191 | clk_prepare_enable(aemif_clk); |
192 | 192 | ||
193 | if (HAS_ATA) { | 193 | if (HAS_ATA) { |
194 | if (HAS_NAND) | 194 | if (HAS_NAND) |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index b90c172d5541..68c5fe01857c 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -212,6 +212,12 @@ static struct clk tptc2_clk = { | |||
212 | .flags = ALWAYS_ENABLED, | 212 | .flags = ALWAYS_ENABLED, |
213 | }; | 213 | }; |
214 | 214 | ||
215 | static struct clk pruss_clk = { | ||
216 | .name = "pruss", | ||
217 | .parent = &pll0_sysclk2, | ||
218 | .lpsc = DA8XX_LPSC0_PRUSS, | ||
219 | }; | ||
220 | |||
215 | static struct clk uart0_clk = { | 221 | static struct clk uart0_clk = { |
216 | .name = "uart0", | 222 | .name = "uart0", |
217 | .parent = &pll0_sysclk2, | 223 | .parent = &pll0_sysclk2, |
@@ -385,6 +391,7 @@ static struct clk_lookup da850_clks[] = { | |||
385 | CLK(NULL, "tptc1", &tptc1_clk), | 391 | CLK(NULL, "tptc1", &tptc1_clk), |
386 | CLK(NULL, "tpcc1", &tpcc1_clk), | 392 | CLK(NULL, "tpcc1", &tpcc1_clk), |
387 | CLK(NULL, "tptc2", &tptc2_clk), | 393 | CLK(NULL, "tptc2", &tptc2_clk), |
394 | CLK("pruss_uio", "pruss", &pruss_clk), | ||
388 | CLK(NULL, "uart0", &uart0_clk), | 395 | CLK(NULL, "uart0", &uart0_clk), |
389 | CLK(NULL, "uart1", &uart1_clk), | 396 | CLK(NULL, "uart1", &uart1_clk), |
390 | CLK(NULL, "uart2", &uart2_clk), | 397 | CLK(NULL, "uart2", &uart2_clk), |
@@ -781,12 +788,6 @@ static struct map_desc da850_io_desc[] = { | |||
781 | .length = DA8XX_CP_INTC_SIZE, | 788 | .length = DA8XX_CP_INTC_SIZE, |
782 | .type = MT_DEVICE | 789 | .type = MT_DEVICE |
783 | }, | 790 | }, |
784 | { | ||
785 | .virtual = SRAM_VIRT, | ||
786 | .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE), | ||
787 | .length = SZ_8K, | ||
788 | .type = MT_DEVICE | ||
789 | }, | ||
790 | }; | 791 | }; |
791 | 792 | ||
792 | static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; | 793 | static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; |
@@ -1239,8 +1240,8 @@ static struct davinci_soc_info davinci_soc_info_da850 = { | |||
1239 | .gpio_irq = IRQ_DA8XX_GPIO0, | 1240 | .gpio_irq = IRQ_DA8XX_GPIO0, |
1240 | .serial_dev = &da8xx_serial_device, | 1241 | .serial_dev = &da8xx_serial_device, |
1241 | .emac_pdata = &da8xx_emac_pdata, | 1242 | .emac_pdata = &da8xx_emac_pdata, |
1242 | .sram_dma = DA8XX_ARM_RAM_BASE, | 1243 | .sram_dma = DA8XX_SHARED_RAM_BASE, |
1243 | .sram_len = SZ_8K, | 1244 | .sram_len = SZ_128K, |
1244 | }; | 1245 | }; |
1245 | 1246 | ||
1246 | void __init da850_init(void) | 1247 | void __init da850_init(void) |
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c new file mode 100644 index 000000000000..37c27af18fa0 --- /dev/null +++ b/arch/arm/mach-davinci/da8xx-dt.c | |||
@@ -0,0 +1,66 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * Modified from mach-omap/omap2/board-generic.c | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/io.h> | ||
11 | #include <linux/of_irq.h> | ||
12 | #include <linux/of_platform.h> | ||
13 | #include <linux/irqdomain.h> | ||
14 | |||
15 | #include <asm/mach/arch.h> | ||
16 | |||
17 | #include <mach/common.h> | ||
18 | #include <mach/cp_intc.h> | ||
19 | #include <mach/da8xx.h> | ||
20 | |||
21 | #define DA8XX_NUM_UARTS 3 | ||
22 | |||
23 | void __init da8xx_uart_clk_enable(void) | ||
24 | { | ||
25 | int i; | ||
26 | for (i = 0; i < DA8XX_NUM_UARTS; i++) | ||
27 | davinci_serial_setup_clk(i, NULL); | ||
28 | } | ||
29 | |||
30 | static struct of_device_id da8xx_irq_match[] __initdata = { | ||
31 | { .compatible = "ti,cp-intc", .data = cp_intc_of_init, }, | ||
32 | { } | ||
33 | }; | ||
34 | |||
35 | static void __init da8xx_init_irq(void) | ||
36 | { | ||
37 | of_irq_init(da8xx_irq_match); | ||
38 | } | ||
39 | |||
40 | #ifdef CONFIG_ARCH_DAVINCI_DA850 | ||
41 | |||
42 | static void __init da850_init_machine(void) | ||
43 | { | ||
44 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | ||
45 | |||
46 | da8xx_uart_clk_enable(); | ||
47 | } | ||
48 | |||
49 | static const char *da850_boards_compat[] __initdata = { | ||
50 | "enbw,cmc", | ||
51 | "ti,da850-evm", | ||
52 | "ti,da850", | ||
53 | NULL, | ||
54 | }; | ||
55 | |||
56 | DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x") | ||
57 | .map_io = da850_init, | ||
58 | .init_irq = da8xx_init_irq, | ||
59 | .timer = &davinci_timer, | ||
60 | .init_machine = da850_init_machine, | ||
61 | .dt_compat = da850_boards_compat, | ||
62 | .init_late = davinci_init_late, | ||
63 | .restart = da8xx_restart, | ||
64 | MACHINE_END | ||
65 | |||
66 | #endif | ||
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index bd2f72b414bc..46c9a0c09ae5 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <mach/time.h> | 22 | #include <mach/time.h> |
23 | #include <mach/da8xx.h> | 23 | #include <mach/da8xx.h> |
24 | #include <mach/cpuidle.h> | 24 | #include <mach/cpuidle.h> |
25 | #include <mach/sram.h> | ||
25 | 26 | ||
26 | #include "clock.h" | 27 | #include "clock.h" |
27 | #include "asp.h" | 28 | #include "asp.h" |
@@ -32,6 +33,7 @@ | |||
32 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ | 33 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ |
33 | #define DA8XX_I2C0_BASE 0x01c22000 | 34 | #define DA8XX_I2C0_BASE 0x01c22000 |
34 | #define DA8XX_RTC_BASE 0x01c23000 | 35 | #define DA8XX_RTC_BASE 0x01c23000 |
36 | #define DA8XX_PRUSS_MEM_BASE 0x01c30000 | ||
35 | #define DA8XX_MMCSD0_BASE 0x01c40000 | 37 | #define DA8XX_MMCSD0_BASE 0x01c40000 |
36 | #define DA8XX_SPI0_BASE 0x01c41000 | 38 | #define DA8XX_SPI0_BASE 0x01c41000 |
37 | #define DA830_SPI1_BASE 0x01e12000 | 39 | #define DA830_SPI1_BASE 0x01e12000 |
@@ -518,6 +520,75 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) | |||
518 | } | 520 | } |
519 | } | 521 | } |
520 | 522 | ||
523 | static struct resource da8xx_pruss_resources[] = { | ||
524 | { | ||
525 | .start = DA8XX_PRUSS_MEM_BASE, | ||
526 | .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF, | ||
527 | .flags = IORESOURCE_MEM, | ||
528 | }, | ||
529 | { | ||
530 | .start = IRQ_DA8XX_EVTOUT0, | ||
531 | .end = IRQ_DA8XX_EVTOUT0, | ||
532 | .flags = IORESOURCE_IRQ, | ||
533 | }, | ||
534 | { | ||
535 | .start = IRQ_DA8XX_EVTOUT1, | ||
536 | .end = IRQ_DA8XX_EVTOUT1, | ||
537 | .flags = IORESOURCE_IRQ, | ||
538 | }, | ||
539 | { | ||
540 | .start = IRQ_DA8XX_EVTOUT2, | ||
541 | .end = IRQ_DA8XX_EVTOUT2, | ||
542 | .flags = IORESOURCE_IRQ, | ||
543 | }, | ||
544 | { | ||
545 | .start = IRQ_DA8XX_EVTOUT3, | ||
546 | .end = IRQ_DA8XX_EVTOUT3, | ||
547 | .flags = IORESOURCE_IRQ, | ||
548 | }, | ||
549 | { | ||
550 | .start = IRQ_DA8XX_EVTOUT4, | ||
551 | .end = IRQ_DA8XX_EVTOUT4, | ||
552 | .flags = IORESOURCE_IRQ, | ||
553 | }, | ||
554 | { | ||
555 | .start = IRQ_DA8XX_EVTOUT5, | ||
556 | .end = IRQ_DA8XX_EVTOUT5, | ||
557 | .flags = IORESOURCE_IRQ, | ||
558 | }, | ||
559 | { | ||
560 | .start = IRQ_DA8XX_EVTOUT6, | ||
561 | .end = IRQ_DA8XX_EVTOUT6, | ||
562 | .flags = IORESOURCE_IRQ, | ||
563 | }, | ||
564 | { | ||
565 | .start = IRQ_DA8XX_EVTOUT7, | ||
566 | .end = IRQ_DA8XX_EVTOUT7, | ||
567 | .flags = IORESOURCE_IRQ, | ||
568 | }, | ||
569 | }; | ||
570 | |||
571 | static struct uio_pruss_pdata da8xx_uio_pruss_pdata = { | ||
572 | .pintc_base = 0x4000, | ||
573 | }; | ||
574 | |||
575 | static struct platform_device da8xx_uio_pruss_dev = { | ||
576 | .name = "pruss_uio", | ||
577 | .id = -1, | ||
578 | .num_resources = ARRAY_SIZE(da8xx_pruss_resources), | ||
579 | .resource = da8xx_pruss_resources, | ||
580 | .dev = { | ||
581 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
582 | .platform_data = &da8xx_uio_pruss_pdata, | ||
583 | } | ||
584 | }; | ||
585 | |||
586 | int __init da8xx_register_uio_pruss(void) | ||
587 | { | ||
588 | da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool(); | ||
589 | return platform_device_register(&da8xx_uio_pruss_dev); | ||
590 | } | ||
591 | |||
521 | static const struct display_panel disp_panel = { | 592 | static const struct display_panel disp_panel = { |
522 | QVGA, | 593 | QVGA, |
523 | 16, | 594 | 16, |
@@ -900,7 +971,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) | |||
900 | if (IS_ERR(da850_sata_clk)) | 971 | if (IS_ERR(da850_sata_clk)) |
901 | return PTR_ERR(da850_sata_clk); | 972 | return PTR_ERR(da850_sata_clk); |
902 | 973 | ||
903 | ret = clk_enable(da850_sata_clk); | 974 | ret = clk_prepare_enable(da850_sata_clk); |
904 | if (ret) | 975 | if (ret) |
905 | goto err0; | 976 | goto err0; |
906 | 977 | ||
@@ -931,7 +1002,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) | |||
931 | return 0; | 1002 | return 0; |
932 | 1003 | ||
933 | err1: | 1004 | err1: |
934 | clk_disable(da850_sata_clk); | 1005 | clk_disable_unprepare(da850_sata_clk); |
935 | err0: | 1006 | err0: |
936 | clk_put(da850_sata_clk); | 1007 | clk_put(da850_sata_clk); |
937 | return ret; | 1008 | return ret; |
@@ -939,7 +1010,7 @@ err0: | |||
939 | 1010 | ||
940 | static void da850_sata_exit(struct device *dev) | 1011 | static void da850_sata_exit(struct device *dev) |
941 | { | 1012 | { |
942 | clk_disable(da850_sata_clk); | 1013 | clk_disable_unprepare(da850_sata_clk); |
943 | clk_put(da850_sata_clk); | 1014 | clk_put(da850_sata_clk); |
944 | } | 1015 | } |
945 | 1016 | ||
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index a255434908db..b49c3b77d55e 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -758,12 +758,6 @@ static struct map_desc dm355_io_desc[] = { | |||
758 | .length = IO_SIZE, | 758 | .length = IO_SIZE, |
759 | .type = MT_DEVICE | 759 | .type = MT_DEVICE |
760 | }, | 760 | }, |
761 | { | ||
762 | .virtual = SRAM_VIRT, | ||
763 | .pfn = __phys_to_pfn(0x00010000), | ||
764 | .length = SZ_32K, | ||
765 | .type = MT_MEMORY_NONCACHED, | ||
766 | }, | ||
767 | }; | 761 | }; |
768 | 762 | ||
769 | /* Contents of JTAG ID register used to identify exact cpu type */ | 763 | /* Contents of JTAG ID register used to identify exact cpu type */ |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index b680c832e0ba..6c3980540be0 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -985,12 +985,6 @@ static struct map_desc dm365_io_desc[] = { | |||
985 | .length = IO_SIZE, | 985 | .length = IO_SIZE, |
986 | .type = MT_DEVICE | 986 | .type = MT_DEVICE |
987 | }, | 987 | }, |
988 | { | ||
989 | .virtual = SRAM_VIRT, | ||
990 | .pfn = __phys_to_pfn(0x00010000), | ||
991 | .length = SZ_32K, | ||
992 | .type = MT_MEMORY_NONCACHED, | ||
993 | }, | ||
994 | }; | 988 | }; |
995 | 989 | ||
996 | static struct resource dm365_ks_resources[] = { | 990 | static struct resource dm365_ks_resources[] = { |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 14e9947bad6e..11c79a3362ef 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -785,12 +785,6 @@ static struct map_desc dm644x_io_desc[] = { | |||
785 | .length = IO_SIZE, | 785 | .length = IO_SIZE, |
786 | .type = MT_DEVICE | 786 | .type = MT_DEVICE |
787 | }, | 787 | }, |
788 | { | ||
789 | .virtual = SRAM_VIRT, | ||
790 | .pfn = __phys_to_pfn(0x00008000), | ||
791 | .length = SZ_16K, | ||
792 | .type = MT_MEMORY_NONCACHED, | ||
793 | }, | ||
794 | }; | 788 | }; |
795 | 789 | ||
796 | /* Contents of JTAG ID register used to identify exact cpu type */ | 790 | /* Contents of JTAG ID register used to identify exact cpu type */ |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 97c0f8e555bd..ac7b431c4c8e 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -756,12 +756,6 @@ static struct map_desc dm646x_io_desc[] = { | |||
756 | .length = IO_SIZE, | 756 | .length = IO_SIZE, |
757 | .type = MT_DEVICE | 757 | .type = MT_DEVICE |
758 | }, | 758 | }, |
759 | { | ||
760 | .virtual = SRAM_VIRT, | ||
761 | .pfn = __phys_to_pfn(0x00010000), | ||
762 | .length = SZ_32K, | ||
763 | .type = MT_MEMORY_NONCACHED, | ||
764 | }, | ||
765 | }; | 759 | }; |
766 | 760 | ||
767 | /* Contents of JTAG ID register used to identify exact cpu type */ | 761 | /* Contents of JTAG ID register used to identify exact cpu type */ |
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index bdc4aa8e672a..046c7238a3d6 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h | |||
@@ -104,8 +104,6 @@ int davinci_pm_init(void); | |||
104 | static inline int davinci_pm_init(void) { return 0; } | 104 | static inline int davinci_pm_init(void) { return 0; } |
105 | #endif | 105 | #endif |
106 | 106 | ||
107 | /* standard place to map on-chip SRAMs; they *may* support DMA */ | ||
108 | #define SRAM_VIRT 0xfffe0000 | ||
109 | #define SRAM_SIZE SZ_128K | 107 | #define SRAM_SIZE SZ_128K |
110 | 108 | ||
111 | #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ | 109 | #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index aaccdc4528fc..700d311c6854 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/platform_data/mmc-davinci.h> | 26 | #include <linux/platform_data/mmc-davinci.h> |
27 | #include <linux/platform_data/usb-davinci.h> | 27 | #include <linux/platform_data/usb-davinci.h> |
28 | #include <linux/platform_data/spi-davinci.h> | 28 | #include <linux/platform_data/spi-davinci.h> |
29 | #include <linux/platform_data/uio_pruss.h> | ||
29 | 30 | ||
30 | #include <media/davinci/vpif_types.h> | 31 | #include <media/davinci/vpif_types.h> |
31 | 32 | ||
@@ -72,6 +73,7 @@ extern unsigned int da850_max_speed; | |||
72 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 | 73 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 |
73 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 | 74 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 |
74 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 | 75 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 |
76 | #define DA8XX_SHARED_RAM_BASE 0x80000000 | ||
75 | #define DA8XX_ARM_RAM_BASE 0xffff0000 | 77 | #define DA8XX_ARM_RAM_BASE 0xffff0000 |
76 | 78 | ||
77 | void __init da830_init(void); | 79 | void __init da830_init(void); |
@@ -86,6 +88,7 @@ int da8xx_register_watchdog(void); | |||
86 | int da8xx_register_usb20(unsigned mA, unsigned potpgt); | 88 | int da8xx_register_usb20(unsigned mA, unsigned potpgt); |
87 | int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); | 89 | int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); |
88 | int da8xx_register_emac(void); | 90 | int da8xx_register_emac(void); |
91 | int da8xx_register_uio_pruss(void); | ||
89 | int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); | 92 | int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); |
90 | int da8xx_register_mmcsd0(struct davinci_mmc_config *config); | 93 | int da8xx_register_mmcsd0(struct davinci_mmc_config *config); |
91 | int da850_register_mmcsd1(struct davinci_mmc_config *config); | 94 | int da850_register_mmcsd1(struct davinci_mmc_config *config); |
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index 46b3cd11c3c2..2d9d921e8b01 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
@@ -43,6 +43,7 @@ struct davinci_uart_config { | |||
43 | }; | 43 | }; |
44 | 44 | ||
45 | extern int davinci_serial_init(struct davinci_uart_config *); | 45 | extern int davinci_serial_init(struct davinci_uart_config *); |
46 | extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate); | ||
46 | #endif | 47 | #endif |
47 | 48 | ||
48 | #endif /* __ASM_ARCH_SERIAL_H */ | 49 | #endif /* __ASM_ARCH_SERIAL_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/sram.h b/arch/arm/mach-davinci/include/mach/sram.h index 111f7cc71e07..4e5db56218b8 100644 --- a/arch/arm/mach-davinci/include/mach/sram.h +++ b/arch/arm/mach-davinci/include/mach/sram.h | |||
@@ -24,4 +24,7 @@ | |||
24 | extern void *sram_alloc(size_t len, dma_addr_t *dma); | 24 | extern void *sram_alloc(size_t len, dma_addr_t *dma); |
25 | extern void sram_free(void *addr, size_t len); | 25 | extern void sram_free(void *addr, size_t len); |
26 | 26 | ||
27 | /* Get the struct gen_pool * for use in platform data */ | ||
28 | extern struct gen_pool *sram_get_gen_pool(void); | ||
29 | |||
27 | #endif /* __MACH_SRAM_H */ | 30 | #endif /* __MACH_SRAM_H */ |
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c index 1875740fe27c..f2625814c3c9 100644 --- a/arch/arm/mach-davinci/serial.c +++ b/arch/arm/mach-davinci/serial.c | |||
@@ -70,11 +70,33 @@ static void __init davinci_serial_reset(struct plat_serial8250_port *p) | |||
70 | UART_DM646X_SCR_TX_WATERMARK); | 70 | UART_DM646X_SCR_TX_WATERMARK); |
71 | } | 71 | } |
72 | 72 | ||
73 | int __init davinci_serial_init(struct davinci_uart_config *info) | 73 | /* Enable UART clock and obtain its rate */ |
74 | int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate) | ||
74 | { | 75 | { |
75 | int i; | ||
76 | char name[16]; | 76 | char name[16]; |
77 | struct clk *uart_clk; | 77 | struct clk *clk; |
78 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
79 | struct device *dev = &soc_info->serial_dev->dev; | ||
80 | |||
81 | sprintf(name, "uart%d", instance); | ||
82 | clk = clk_get(dev, name); | ||
83 | if (IS_ERR(clk)) { | ||
84 | pr_err("%s:%d: failed to get UART%d clock\n", | ||
85 | __func__, __LINE__, instance); | ||
86 | return PTR_ERR(clk); | ||
87 | } | ||
88 | |||
89 | clk_prepare_enable(clk); | ||
90 | |||
91 | if (rate) | ||
92 | *rate = clk_get_rate(clk); | ||
93 | |||
94 | return 0; | ||
95 | } | ||
96 | |||
97 | int __init davinci_serial_init(struct davinci_uart_config *info) | ||
98 | { | ||
99 | int i, ret; | ||
78 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 100 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
79 | struct device *dev = &soc_info->serial_dev->dev; | 101 | struct device *dev = &soc_info->serial_dev->dev; |
80 | struct plat_serial8250_port *p = dev->platform_data; | 102 | struct plat_serial8250_port *p = dev->platform_data; |
@@ -87,16 +109,9 @@ int __init davinci_serial_init(struct davinci_uart_config *info) | |||
87 | if (!(info->enabled_uarts & (1 << i))) | 109 | if (!(info->enabled_uarts & (1 << i))) |
88 | continue; | 110 | continue; |
89 | 111 | ||
90 | sprintf(name, "uart%d", i); | 112 | ret = davinci_serial_setup_clk(i, &p->uartclk); |
91 | uart_clk = clk_get(dev, name); | 113 | if (ret) |
92 | if (IS_ERR(uart_clk)) { | ||
93 | printk(KERN_ERR "%s:%d: failed to get UART%d clock\n", | ||
94 | __func__, __LINE__, i); | ||
95 | continue; | 114 | continue; |
96 | } | ||
97 | |||
98 | clk_enable(uart_clk); | ||
99 | p->uartclk = clk_get_rate(uart_clk); | ||
100 | 115 | ||
101 | if (!p->membase && p->mapbase) { | 116 | if (!p->membase && p->mapbase) { |
102 | p->membase = ioremap(p->mapbase, SZ_4K); | 117 | p->membase = ioremap(p->mapbase, SZ_4K); |
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c index db0f7787faf1..c5f7ee5cc80a 100644 --- a/arch/arm/mach-davinci/sram.c +++ b/arch/arm/mach-davinci/sram.c | |||
@@ -10,6 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/io.h> | ||
13 | #include <linux/genalloc.h> | 14 | #include <linux/genalloc.h> |
14 | 15 | ||
15 | #include <mach/common.h> | 16 | #include <mach/common.h> |
@@ -17,6 +18,11 @@ | |||
17 | 18 | ||
18 | static struct gen_pool *sram_pool; | 19 | static struct gen_pool *sram_pool; |
19 | 20 | ||
21 | struct gen_pool *sram_get_gen_pool(void) | ||
22 | { | ||
23 | return sram_pool; | ||
24 | } | ||
25 | |||
20 | void *sram_alloc(size_t len, dma_addr_t *dma) | 26 | void *sram_alloc(size_t len, dma_addr_t *dma) |
21 | { | 27 | { |
22 | unsigned long vaddr; | 28 | unsigned long vaddr; |
@@ -32,7 +38,7 @@ void *sram_alloc(size_t len, dma_addr_t *dma) | |||
32 | return NULL; | 38 | return NULL; |
33 | 39 | ||
34 | if (dma) | 40 | if (dma) |
35 | *dma = dma_base + (vaddr - SRAM_VIRT); | 41 | *dma = gen_pool_virt_to_phys(sram_pool, vaddr); |
36 | return (void *)vaddr; | 42 | return (void *)vaddr; |
37 | 43 | ||
38 | } | 44 | } |
@@ -53,8 +59,10 @@ EXPORT_SYMBOL(sram_free); | |||
53 | */ | 59 | */ |
54 | static int __init sram_init(void) | 60 | static int __init sram_init(void) |
55 | { | 61 | { |
62 | phys_addr_t phys = davinci_soc_info.sram_dma; | ||
56 | unsigned len = davinci_soc_info.sram_len; | 63 | unsigned len = davinci_soc_info.sram_len; |
57 | int status = 0; | 64 | int status = 0; |
65 | void *addr; | ||
58 | 66 | ||
59 | if (len) { | 67 | if (len) { |
60 | len = min_t(unsigned, len, SRAM_SIZE); | 68 | len = min_t(unsigned, len, SRAM_SIZE); |
@@ -62,8 +70,17 @@ static int __init sram_init(void) | |||
62 | if (!sram_pool) | 70 | if (!sram_pool) |
63 | status = -ENOMEM; | 71 | status = -ENOMEM; |
64 | } | 72 | } |
65 | if (sram_pool) | 73 | |
66 | status = gen_pool_add(sram_pool, SRAM_VIRT, len, -1); | 74 | if (sram_pool) { |
75 | addr = ioremap(phys, len); | ||
76 | if (!addr) | ||
77 | return -ENOMEM; | ||
78 | status = gen_pool_add_virt(sram_pool, (unsigned)addr, | ||
79 | phys, len, -1); | ||
80 | if (status < 0) | ||
81 | iounmap(addr); | ||
82 | } | ||
83 | |||
67 | WARN_ON(status < 0); | 84 | WARN_ON(status < 0); |
68 | return status; | 85 | return status; |
69 | } | 86 | } |
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 75da315b6587..9847938785ca 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c | |||
@@ -379,7 +379,7 @@ static void __init davinci_timer_init(void) | |||
379 | 379 | ||
380 | timer_clk = clk_get(NULL, "timer0"); | 380 | timer_clk = clk_get(NULL, "timer0"); |
381 | BUG_ON(IS_ERR(timer_clk)); | 381 | BUG_ON(IS_ERR(timer_clk)); |
382 | clk_enable(timer_clk); | 382 | clk_prepare_enable(timer_clk); |
383 | 383 | ||
384 | /* init timer hw */ | 384 | /* init timer hw */ |
385 | timer_init(); | 385 | timer_init(); |
@@ -429,7 +429,7 @@ void davinci_watchdog_reset(struct platform_device *pdev) | |||
429 | wd_clk = clk_get(&pdev->dev, NULL); | 429 | wd_clk = clk_get(&pdev->dev, NULL); |
430 | if (WARN_ON(IS_ERR(wd_clk))) | 430 | if (WARN_ON(IS_ERR(wd_clk))) |
431 | return; | 431 | return; |
432 | clk_enable(wd_clk); | 432 | clk_prepare_enable(wd_clk); |
433 | 433 | ||
434 | /* disable, internal clock source */ | 434 | /* disable, internal clock source */ |
435 | __raw_writel(0, base + TCR); | 435 | __raw_writel(0, base + TCR); |
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index da55107033dd..bb3b09aa9183 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -63,6 +63,7 @@ config SOC_EXYNOS5250 | |||
63 | depends on ARCH_EXYNOS5 | 63 | depends on ARCH_EXYNOS5 |
64 | select S5P_PM if PM | 64 | select S5P_PM if PM |
65 | select S5P_SLEEP if PM | 65 | select S5P_SLEEP if PM |
66 | select S5P_DEV_MFC | ||
66 | select SAMSUNG_DMADEV | 67 | select SAMSUNG_DMADEV |
67 | help | 68 | help |
68 | Enable EXYNOS5250 SoC support | 69 | Enable EXYNOS5250 SoC support |
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 9b58024f7d43..1797dee88a0d 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o | |||
53 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | 53 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o |
54 | obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o | 54 | obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o |
55 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o | 55 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o |
56 | obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o | ||
57 | obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o | 56 | obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o |
58 | 57 | ||
59 | obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o | 58 | obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o |
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index fa8a13405c94..efead60b9436 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c | |||
@@ -576,6 +576,10 @@ static struct clk exynos4_init_clocks_off[] = { | |||
576 | .enable = exynos4_clk_ip_peril_ctrl, | 576 | .enable = exynos4_clk_ip_peril_ctrl, |
577 | .ctrlbit = (1 << 15), | 577 | .ctrlbit = (1 << 15), |
578 | }, { | 578 | }, { |
579 | .name = "tmu_apbif", | ||
580 | .enable = exynos4_clk_ip_perir_ctrl, | ||
581 | .ctrlbit = (1 << 17), | ||
582 | }, { | ||
579 | .name = "keypad", | 583 | .name = "keypad", |
580 | .enable = exynos4_clk_ip_perir_ctrl, | 584 | .enable = exynos4_clk_ip_perir_ctrl, |
581 | .ctrlbit = (1 << 16), | 585 | .ctrlbit = (1 << 16), |
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 4478757b9301..7652f5d78a56 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c | |||
@@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable) | |||
196 | return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable); | 196 | return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable); |
197 | } | 197 | } |
198 | 198 | ||
199 | static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable) | ||
200 | { | ||
201 | return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); | ||
202 | } | ||
203 | |||
199 | /* Core list of CMU_CPU side */ | 204 | /* Core list of CMU_CPU side */ |
200 | 205 | ||
201 | static struct clksrc_clk exynos5_clk_mout_apll = { | 206 | static struct clksrc_clk exynos5_clk_mout_apll = { |
@@ -616,6 +621,11 @@ static struct clk exynos5_init_clocks_off[] = { | |||
616 | .enable = exynos5_clk_ip_peric_ctrl, | 621 | .enable = exynos5_clk_ip_peric_ctrl, |
617 | .ctrlbit = (1 << 24), | 622 | .ctrlbit = (1 << 24), |
618 | }, { | 623 | }, { |
624 | .name = "tmu_apbif", | ||
625 | .parent = &exynos5_clk_aclk_66.clk, | ||
626 | .enable = exynos5_clk_ip_peris_ctrl, | ||
627 | .ctrlbit = (1 << 21), | ||
628 | }, { | ||
619 | .name = "rtc", | 629 | .name = "rtc", |
620 | .parent = &exynos5_clk_aclk_66.clk, | 630 | .parent = &exynos5_clk_aclk_66.clk, |
621 | .enable = exynos5_clk_ip_peris_ctrl, | 631 | .enable = exynos5_clk_ip_peris_ctrl, |
@@ -664,17 +674,22 @@ static struct clk exynos5_init_clocks_off[] = { | |||
664 | .ctrlbit = (1 << 25), | 674 | .ctrlbit = (1 << 25), |
665 | }, { | 675 | }, { |
666 | .name = "mfc", | 676 | .name = "mfc", |
667 | .devname = "s5p-mfc", | 677 | .devname = "s5p-mfc-v6", |
668 | .enable = exynos5_clk_ip_mfc_ctrl, | 678 | .enable = exynos5_clk_ip_mfc_ctrl, |
669 | .ctrlbit = (1 << 0), | 679 | .ctrlbit = (1 << 0), |
670 | }, { | 680 | }, { |
671 | .name = "hdmi", | 681 | .name = "hdmi", |
672 | .devname = "exynos4-hdmi", | 682 | .devname = "exynos5-hdmi", |
673 | .enable = exynos5_clk_ip_disp1_ctrl, | 683 | .enable = exynos5_clk_ip_disp1_ctrl, |
674 | .ctrlbit = (1 << 6), | 684 | .ctrlbit = (1 << 6), |
675 | }, { | 685 | }, { |
686 | .name = "hdmiphy", | ||
687 | .devname = "exynos5-hdmi", | ||
688 | .enable = exynos5_clk_hdmiphy_ctrl, | ||
689 | .ctrlbit = (1 << 0), | ||
690 | }, { | ||
676 | .name = "mixer", | 691 | .name = "mixer", |
677 | .devname = "s5p-mixer", | 692 | .devname = "exynos5-mixer", |
678 | .enable = exynos5_clk_ip_disp1_ctrl, | 693 | .enable = exynos5_clk_ip_disp1_ctrl, |
679 | .ctrlbit = (1 << 5), | 694 | .ctrlbit = (1 << 5), |
680 | }, { | 695 | }, { |
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 0dbee7fef9bd..4e1dd8d1eda8 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -955,11 +955,14 @@ static int __init exynos_init_irq_eint(void) | |||
955 | * platforms switch over to using the pinctrl driver, the wakeup | 955 | * platforms switch over to using the pinctrl driver, the wakeup |
956 | * interrupt support code here can be completely removed. | 956 | * interrupt support code here can be completely removed. |
957 | */ | 957 | */ |
958 | static const struct of_device_id exynos_pinctrl_ids[] = { | ||
959 | { .compatible = "samsung,pinctrl-exynos4210", }, | ||
960 | { .compatible = "samsung,pinctrl-exynos4x12", }, | ||
961 | }; | ||
958 | struct device_node *pctrl_np, *wkup_np; | 962 | struct device_node *pctrl_np, *wkup_np; |
959 | const char *pctrl_compat = "samsung,pinctrl-exynos4210"; | ||
960 | const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; | 963 | const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; |
961 | 964 | ||
962 | for_each_compatible_node(pctrl_np, NULL, pctrl_compat) { | 965 | for_each_matching_node(pctrl_np, exynos_pinctrl_ids) { |
963 | if (of_device_is_available(pctrl_np)) { | 966 | if (of_device_is_available(pctrl_np)) { |
964 | wkup_np = of_find_compatible_node(pctrl_np, NULL, | 967 | wkup_np = of_find_compatible_node(pctrl_np, NULL, |
965 | wkup_compat); | 968 | wkup_compat); |
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c deleted file mode 100644 index 17c9c6ecc2e0..000000000000 --- a/arch/arm/mach-exynos/dev-drm.c +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos/dev-drm.c | ||
3 | * | ||
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * EXYNOS - core DRM device | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/dma-mapping.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <plat/devs.h> | ||
20 | |||
21 | static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32); | ||
22 | |||
23 | struct platform_device exynos_device_drm = { | ||
24 | .name = "exynos-drm", | ||
25 | .dev = { | ||
26 | .dma_mask = &exynos_drm_dma_mask, | ||
27 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
28 | } | ||
29 | }; | ||
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 6da31152de3a..5d44616c2014 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -136,6 +136,9 @@ | |||
136 | #define EXYNOS4_IRQ_TSI IRQ_SPI(115) | 136 | #define EXYNOS4_IRQ_TSI IRQ_SPI(115) |
137 | #define EXYNOS4_IRQ_SATA IRQ_SPI(116) | 137 | #define EXYNOS4_IRQ_SATA IRQ_SPI(116) |
138 | 138 | ||
139 | #define EXYNOS4_IRQ_TMU_TRIG0 COMBINER_IRQ(2, 4) | ||
140 | #define EXYNOS4_IRQ_TMU_TRIG1 COMBINER_IRQ(3, 4) | ||
141 | |||
139 | #define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) | 142 | #define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) |
140 | #define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) | 143 | #define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) |
141 | #define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) | 144 | #define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 872840b2ff45..9f180aa3a848 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -88,6 +88,8 @@ | |||
88 | #define EXYNOS4_PA_TWD 0x10500600 | 88 | #define EXYNOS4_PA_TWD 0x10500600 |
89 | #define EXYNOS4_PA_L2CC 0x10502000 | 89 | #define EXYNOS4_PA_L2CC 0x10502000 |
90 | 90 | ||
91 | #define EXYNOS4_PA_TMU 0x100C0000 | ||
92 | |||
91 | #define EXYNOS4_PA_MDMA0 0x10810000 | 93 | #define EXYNOS4_PA_MDMA0 0x10810000 |
92 | #define EXYNOS4_PA_MDMA1 0x12850000 | 94 | #define EXYNOS4_PA_MDMA1 0x12850000 |
93 | #define EXYNOS4_PA_S_MDMA1 0x12840000 | 95 | #define EXYNOS4_PA_S_MDMA1 0x12840000 |
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index eadf4b59e7d2..8858068d2b6a 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c | |||
@@ -77,6 +77,8 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = { | |||
77 | "exynos4210-spi.2", NULL), | 77 | "exynos4210-spi.2", NULL), |
78 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), | 78 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), |
79 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), | 79 | OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), |
80 | OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU, | ||
81 | "exynos-tmu", NULL), | ||
80 | {}, | 82 | {}, |
81 | }; | 83 | }; |
82 | 84 | ||
@@ -94,6 +96,8 @@ static void __init exynos4_dt_machine_init(void) | |||
94 | 96 | ||
95 | static char const *exynos4_dt_compat[] __initdata = { | 97 | static char const *exynos4_dt_compat[] __initdata = { |
96 | "samsung,exynos4210", | 98 | "samsung,exynos4210", |
99 | "samsung,exynos4212", | ||
100 | "samsung,exynos4412", | ||
97 | NULL | 101 | NULL |
98 | }; | 102 | }; |
99 | 103 | ||
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index db1cd8eacf28..25f464cf7979 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c | |||
@@ -11,6 +11,8 @@ | |||
11 | 11 | ||
12 | #include <linux/of_platform.h> | 12 | #include <linux/of_platform.h> |
13 | #include <linux/serial_core.h> | 13 | #include <linux/serial_core.h> |
14 | #include <linux/memblock.h> | ||
15 | #include <linux/of_fdt.h> | ||
14 | 16 | ||
15 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
16 | #include <asm/hardware/gic.h> | 18 | #include <asm/hardware/gic.h> |
@@ -18,6 +20,7 @@ | |||
18 | 20 | ||
19 | #include <plat/cpu.h> | 21 | #include <plat/cpu.h> |
20 | #include <plat/regs-serial.h> | 22 | #include <plat/regs-serial.h> |
23 | #include <plat/mfc.h> | ||
21 | 24 | ||
22 | #include "common.h" | 25 | #include "common.h" |
23 | 26 | ||
@@ -47,6 +50,20 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { | |||
47 | "s3c2440-i2c.0", NULL), | 50 | "s3c2440-i2c.0", NULL), |
48 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), | 51 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), |
49 | "s3c2440-i2c.1", NULL), | 52 | "s3c2440-i2c.1", NULL), |
53 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2), | ||
54 | "s3c2440-i2c.2", NULL), | ||
55 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3), | ||
56 | "s3c2440-i2c.3", NULL), | ||
57 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4), | ||
58 | "s3c2440-i2c.4", NULL), | ||
59 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5), | ||
60 | "s3c2440-i2c.5", NULL), | ||
61 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6), | ||
62 | "s3c2440-i2c.6", NULL), | ||
63 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7), | ||
64 | "s3c2440-i2c.7", NULL), | ||
65 | OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8), | ||
66 | "s3c2440-hdmiphy-i2c", NULL), | ||
50 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0, | 67 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0, |
51 | "dw_mmc.0", NULL), | 68 | "dw_mmc.0", NULL), |
52 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1, | 69 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1, |
@@ -61,6 +78,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { | |||
61 | "exynos4210-spi.1", NULL), | 78 | "exynos4210-spi.1", NULL), |
62 | OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2, | 79 | OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2, |
63 | "exynos4210-spi.2", NULL), | 80 | "exynos4210-spi.2", NULL), |
81 | OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000, | ||
82 | "exynos5-sata", NULL), | ||
83 | OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000, | ||
84 | "exynos5-sata-phy", NULL), | ||
85 | OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000, | ||
86 | "exynos5-sata-phy-i2c", NULL), | ||
64 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), | 87 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), |
65 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), | 88 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), |
66 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL), | 89 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL), |
@@ -72,6 +95,13 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { | |||
72 | "exynos-gsc.2", NULL), | 95 | "exynos-gsc.2", NULL), |
73 | OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3, | 96 | OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3, |
74 | "exynos-gsc.3", NULL), | 97 | "exynos-gsc.3", NULL), |
98 | OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000, | ||
99 | "exynos5-hdmi", NULL), | ||
100 | OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000, | ||
101 | "exynos5-mixer", NULL), | ||
102 | OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL), | ||
103 | OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000, | ||
104 | "exynos-tmu", NULL), | ||
75 | {}, | 105 | {}, |
76 | }; | 106 | }; |
77 | 107 | ||
@@ -92,6 +122,17 @@ static char const *exynos5250_dt_compat[] __initdata = { | |||
92 | NULL | 122 | NULL |
93 | }; | 123 | }; |
94 | 124 | ||
125 | static void __init exynos5_reserve(void) | ||
126 | { | ||
127 | struct s5p_mfc_dt_meminfo mfc_mem; | ||
128 | |||
129 | /* Reserve memory for MFC only if it's available */ | ||
130 | mfc_mem.compatible = "samsung,mfc-v6"; | ||
131 | if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) | ||
132 | s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, | ||
133 | mfc_mem.lsize); | ||
134 | } | ||
135 | |||
95 | DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") | 136 | DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") |
96 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | 137 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ |
97 | .init_irq = exynos5_init_irq, | 138 | .init_irq = exynos5_init_irq, |
@@ -103,4 +144,5 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") | |||
103 | .timer = &exynos4_timer, | 144 | .timer = &exynos4_timer, |
104 | .dt_compat = exynos5250_dt_compat, | 145 | .dt_compat = exynos5250_dt_compat, |
105 | .restart = exynos5_restart, | 146 | .restart = exynos5_restart, |
147 | .reserve = exynos5_reserve, | ||
106 | MACHINE_END | 148 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 69359a0c8a1c..27d4ed8b116e 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -1326,9 +1326,6 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
1326 | &cam_vdda_fixed_rdev, | 1326 | &cam_vdda_fixed_rdev, |
1327 | &cam_8m_12v_fixed_rdev, | 1327 | &cam_8m_12v_fixed_rdev, |
1328 | &exynos4_bus_devfreq, | 1328 | &exynos4_bus_devfreq, |
1329 | #ifdef CONFIG_DRM_EXYNOS | ||
1330 | &exynos_device_drm, | ||
1331 | #endif | ||
1332 | }; | 1329 | }; |
1333 | 1330 | ||
1334 | static void __init nuri_map_io(void) | 1331 | static void __init nuri_map_io(void) |
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 485ce6c477f9..c931ce15a966 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -709,9 +709,6 @@ static struct platform_device *origen_devices[] __initdata = { | |||
709 | &s5p_device_mfc_l, | 709 | &s5p_device_mfc_l, |
710 | &s5p_device_mfc_r, | 710 | &s5p_device_mfc_r, |
711 | &s5p_device_mixer, | 711 | &s5p_device_mixer, |
712 | #ifdef CONFIG_DRM_EXYNOS | ||
713 | &exynos_device_drm, | ||
714 | #endif | ||
715 | &exynos4_device_ohci, | 712 | &exynos4_device_ohci, |
716 | &origen_device_gpiokeys, | 713 | &origen_device_gpiokeys, |
717 | &origen_lcd_hv070wsa, | 714 | &origen_lcd_hv070wsa, |
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index ddb92631252d..a1555a73c7af 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c | |||
@@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = { | |||
317 | &s5p_device_mfc, | 317 | &s5p_device_mfc, |
318 | &s5p_device_mfc_l, | 318 | &s5p_device_mfc_l, |
319 | &s5p_device_mfc_r, | 319 | &s5p_device_mfc_r, |
320 | #ifdef CONFIG_DRM_EXYNOS | ||
321 | &exynos_device_drm, | ||
322 | #endif | ||
323 | &samsung_device_keypad, | 320 | &samsung_device_keypad, |
324 | }; | 321 | }; |
325 | 322 | ||
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index 8dd6a1e8030d..063cb94b934d 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = { | |||
300 | &s5p_device_fimc_md, | 300 | &s5p_device_fimc_md, |
301 | &s5p_device_g2d, | 301 | &s5p_device_g2d, |
302 | &s5p_device_jpeg, | 302 | &s5p_device_jpeg, |
303 | #ifdef CONFIG_DRM_EXYNOS | ||
304 | &exynos_device_drm, | ||
305 | #endif | ||
306 | &exynos4_device_ac97, | 303 | &exynos4_device_ac97, |
307 | &exynos4_device_i2s0, | 304 | &exynos4_device_i2s0, |
308 | &exynos4_device_ohci, | 305 | &exynos4_device_ohci, |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index 2d6bc83d5c99..9e3340f18950 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -1080,9 +1080,6 @@ static struct platform_device *universal_devices[] __initdata = { | |||
1080 | &s5p_device_onenand, | 1080 | &s5p_device_onenand, |
1081 | &s5p_device_fimd0, | 1081 | &s5p_device_fimd0, |
1082 | &s5p_device_jpeg, | 1082 | &s5p_device_jpeg, |
1083 | #ifdef CONFIG_DRM_EXYNOS | ||
1084 | &exynos_device_drm, | ||
1085 | #endif | ||
1086 | &s3c_device_usb_hsotg, | 1083 | &s3c_device_usb_hsotg, |
1087 | &s5p_device_mfc, | 1084 | &s5p_device_mfc, |
1088 | &s5p_device_mfc_l, | 1085 | &s5p_device_mfc_l, |
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c index c0bc83a7663e..9f1351de52f7 100644 --- a/arch/arm/mach-exynos/pm_domains.c +++ b/arch/arm/mach-exynos/pm_domains.c | |||
@@ -19,6 +19,8 @@ | |||
19 | #include <linux/pm_domain.h> | 19 | #include <linux/pm_domain.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/of_address.h> | 21 | #include <linux/of_address.h> |
22 | #include <linux/of_platform.h> | ||
23 | #include <linux/sched.h> | ||
22 | 24 | ||
23 | #include <mach/regs-pmu.h> | 25 | #include <mach/regs-pmu.h> |
24 | #include <plat/devs.h> | 26 | #include <plat/devs.h> |
@@ -83,12 +85,88 @@ static struct exynos_pm_domain PD = { \ | |||
83 | } | 85 | } |
84 | 86 | ||
85 | #ifdef CONFIG_OF | 87 | #ifdef CONFIG_OF |
88 | static void exynos_add_device_to_domain(struct exynos_pm_domain *pd, | ||
89 | struct device *dev) | ||
90 | { | ||
91 | int ret; | ||
92 | |||
93 | dev_dbg(dev, "adding to power domain %s\n", pd->pd.name); | ||
94 | |||
95 | while (1) { | ||
96 | ret = pm_genpd_add_device(&pd->pd, dev); | ||
97 | if (ret != -EAGAIN) | ||
98 | break; | ||
99 | cond_resched(); | ||
100 | } | ||
101 | |||
102 | pm_genpd_dev_need_restore(dev, true); | ||
103 | } | ||
104 | |||
105 | static void exynos_remove_device_from_domain(struct device *dev) | ||
106 | { | ||
107 | struct generic_pm_domain *genpd = dev_to_genpd(dev); | ||
108 | int ret; | ||
109 | |||
110 | dev_dbg(dev, "removing from power domain %s\n", genpd->name); | ||
111 | |||
112 | while (1) { | ||
113 | ret = pm_genpd_remove_device(genpd, dev); | ||
114 | if (ret != -EAGAIN) | ||
115 | break; | ||
116 | cond_resched(); | ||
117 | } | ||
118 | } | ||
119 | |||
120 | static void exynos_read_domain_from_dt(struct device *dev) | ||
121 | { | ||
122 | struct platform_device *pd_pdev; | ||
123 | struct exynos_pm_domain *pd; | ||
124 | struct device_node *node; | ||
125 | |||
126 | node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0); | ||
127 | if (!node) | ||
128 | return; | ||
129 | pd_pdev = of_find_device_by_node(node); | ||
130 | if (!pd_pdev) | ||
131 | return; | ||
132 | pd = platform_get_drvdata(pd_pdev); | ||
133 | exynos_add_device_to_domain(pd, dev); | ||
134 | } | ||
135 | |||
136 | static int exynos_pm_notifier_call(struct notifier_block *nb, | ||
137 | unsigned long event, void *data) | ||
138 | { | ||
139 | struct device *dev = data; | ||
140 | |||
141 | switch (event) { | ||
142 | case BUS_NOTIFY_BIND_DRIVER: | ||
143 | if (dev->of_node) | ||
144 | exynos_read_domain_from_dt(dev); | ||
145 | |||
146 | break; | ||
147 | |||
148 | case BUS_NOTIFY_UNBOUND_DRIVER: | ||
149 | exynos_remove_device_from_domain(dev); | ||
150 | |||
151 | break; | ||
152 | } | ||
153 | return NOTIFY_DONE; | ||
154 | } | ||
155 | |||
156 | static struct notifier_block platform_nb = { | ||
157 | .notifier_call = exynos_pm_notifier_call, | ||
158 | }; | ||
159 | |||
86 | static __init int exynos_pm_dt_parse_domains(void) | 160 | static __init int exynos_pm_dt_parse_domains(void) |
87 | { | 161 | { |
162 | struct platform_device *pdev; | ||
88 | struct device_node *np; | 163 | struct device_node *np; |
89 | 164 | ||
90 | for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { | 165 | for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { |
91 | struct exynos_pm_domain *pd; | 166 | struct exynos_pm_domain *pd; |
167 | int on; | ||
168 | |||
169 | pdev = of_find_device_by_node(np); | ||
92 | 170 | ||
93 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); | 171 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); |
94 | if (!pd) { | 172 | if (!pd) { |
@@ -97,15 +175,22 @@ static __init int exynos_pm_dt_parse_domains(void) | |||
97 | return -ENOMEM; | 175 | return -ENOMEM; |
98 | } | 176 | } |
99 | 177 | ||
100 | if (of_get_property(np, "samsung,exynos4210-pd-off", NULL)) | 178 | pd->pd.name = kstrdup(np->name, GFP_KERNEL); |
101 | pd->is_off = true; | 179 | pd->name = pd->pd.name; |
102 | pd->name = np->name; | ||
103 | pd->base = of_iomap(np, 0); | 180 | pd->base = of_iomap(np, 0); |
104 | pd->pd.power_off = exynos_pd_power_off; | 181 | pd->pd.power_off = exynos_pd_power_off; |
105 | pd->pd.power_on = exynos_pd_power_on; | 182 | pd->pd.power_on = exynos_pd_power_on; |
106 | pd->pd.of_node = np; | 183 | pd->pd.of_node = np; |
107 | pm_genpd_init(&pd->pd, NULL, false); | 184 | |
185 | platform_set_drvdata(pdev, pd); | ||
186 | |||
187 | on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN; | ||
188 | |||
189 | pm_genpd_init(&pd->pd, NULL, !on); | ||
108 | } | 190 | } |
191 | |||
192 | bus_register_notifier(&platform_bus_type, &platform_nb); | ||
193 | |||
109 | return 0; | 194 | return 0; |
110 | } | 195 | } |
111 | #else | 196 | #else |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index f1bf610e2900..b09924112f99 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -272,6 +272,13 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD | |||
272 | 272 | ||
273 | endchoice | 273 | endchoice |
274 | 274 | ||
275 | config MACH_IMX25_DT | ||
276 | bool "Support i.MX25 platforms from device tree" | ||
277 | select SOC_IMX25 | ||
278 | help | ||
279 | Include support for Freescale i.MX25 based platforms | ||
280 | using the device tree for discovery | ||
281 | |||
275 | comment "MX27 platforms:" | 282 | comment "MX27 platforms:" |
276 | 283 | ||
277 | config MACH_MX27ADS | 284 | config MACH_MX27ADS |
@@ -829,7 +836,14 @@ config SOC_IMX53 | |||
829 | 836 | ||
830 | config SOC_IMX6Q | 837 | config SOC_IMX6Q |
831 | bool "i.MX6 Quad support" | 838 | bool "i.MX6 Quad support" |
839 | select ARCH_HAS_CPUFREQ | ||
840 | select ARCH_HAS_OPP | ||
832 | select ARM_CPU_SUSPEND if PM | 841 | select ARM_CPU_SUSPEND if PM |
842 | select ARM_ERRATA_743622 | ||
843 | select ARM_ERRATA_751472 | ||
844 | select ARM_ERRATA_754322 | ||
845 | select ARM_ERRATA_764369 if SMP | ||
846 | select ARM_ERRATA_775420 | ||
833 | select ARM_GIC | 847 | select ARM_GIC |
834 | select COMMON_CLK | 848 | select COMMON_CLK |
835 | select CPU_V7 | 849 | select CPU_V7 |
@@ -841,6 +855,10 @@ config SOC_IMX6Q | |||
841 | select MFD_SYSCON | 855 | select MFD_SYSCON |
842 | select PINCTRL | 856 | select PINCTRL |
843 | select PINCTRL_IMX6Q | 857 | select PINCTRL_IMX6Q |
858 | select PL310_ERRATA_588369 if CACHE_PL310 | ||
859 | select PL310_ERRATA_727915 if CACHE_PL310 | ||
860 | select PL310_ERRATA_769419 if CACHE_PL310 | ||
861 | select PM_OPP if PM | ||
844 | 862 | ||
845 | help | 863 | help |
846 | This enables support for Freescale i.MX6 Quad processor. | 864 | This enables support for Freescale i.MX6 Quad processor. |
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index fe47b71469c9..0634b3152c24 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile | |||
@@ -50,6 +50,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o | |||
50 | obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o | 50 | obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o |
51 | obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o | 51 | obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o |
52 | obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o | 52 | obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o |
53 | obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o | ||
53 | 54 | ||
54 | # i.MX27 based machines | 55 | # i.MX27 based machines |
55 | obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o | 56 | obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o |
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index bc885801cd68..b197aa73dc4b 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c | |||
@@ -23,6 +23,9 @@ | |||
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/clkdev.h> | 24 | #include <linux/clkdev.h> |
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/of.h> | ||
27 | #include <linux/of_address.h> | ||
28 | #include <linux/of_irq.h> | ||
26 | 29 | ||
27 | #include "clk.h" | 30 | #include "clk.h" |
28 | #include "common.h" | 31 | #include "common.h" |
@@ -55,6 +58,8 @@ | |||
55 | 58 | ||
56 | #define ccm(x) (CRM_BASE + (x)) | 59 | #define ccm(x) (CRM_BASE + (x)) |
57 | 60 | ||
61 | static struct clk_onecell_data clk_data; | ||
62 | |||
58 | static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", }; | 63 | static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", }; |
59 | static const char *per_sel_clks[] = { "ahb", "upll", }; | 64 | static const char *per_sel_clks[] = { "ahb", "upll", }; |
60 | 65 | ||
@@ -64,24 +69,30 @@ enum mx25_clks { | |||
64 | per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel, | 69 | per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel, |
65 | per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5, | 70 | per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5, |
66 | per6, per7, per8, per9, per10, per11, per12, per13, per14, per15, | 71 | per6, per7, per8, per9, per10, per11, per12, per13, per14, per15, |
67 | csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per, | 72 | csi_ipg_per, epit_ipg_per, esai_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, |
68 | lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per, | 73 | gpt_ipg_per, i2c_ipg_per, lcdc_ipg_per, nfc_ipg_per, owire_ipg_per, |
69 | csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb, | 74 | pwm_ipg_per, sim1_ipg_per, sim2_ipg_per, ssi1_ipg_per, ssi2_ipg_per, |
70 | usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg, | 75 | uart_ipg_per, ata_ahb, reserved1, csi_ahb, emi_ahb, esai_ahb, esdhc1_ahb, |
71 | cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg, | 76 | esdhc2_ahb, fec_ahb, lcdc_ahb, rtic_ahb, sdma_ahb, slcdc_ahb, usbotg_ahb, |
72 | kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg, | 77 | reserved2, reserved3, reserved4, reserved5, can1_ipg, can2_ipg, csi_ipg, |
73 | ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg, | 78 | cspi1_ipg, cspi2_ipg, cspi3_ipg, dryice_ipg, ect_ipg, epit1_ipg, epit2_ipg, |
74 | uart4_ipg, uart5_ipg, wdt_ipg, clk_max | 79 | reserved6, esdhc1_ipg, esdhc2_ipg, fec_ipg, reserved7, reserved8, reserved9, |
80 | gpt1_ipg, gpt2_ipg, gpt3_ipg, gpt4_ipg, reserved10, reserved11, reserved12, | ||
81 | iim_ipg, reserved13, reserved14, kpp_ipg, lcdc_ipg, reserved15, pwm1_ipg, | ||
82 | pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg, | ||
83 | sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg, | ||
84 | uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17, | ||
85 | wdt_ipg, clk_max | ||
75 | }; | 86 | }; |
76 | 87 | ||
77 | static struct clk *clk[clk_max]; | 88 | static struct clk *clk[clk_max]; |
78 | 89 | ||
79 | int __init mx25_clocks_init(void) | 90 | static int __init __mx25_clocks_init(unsigned long osc_rate) |
80 | { | 91 | { |
81 | int i; | 92 | int i; |
82 | 93 | ||
83 | clk[dummy] = imx_clk_fixed("dummy", 0); | 94 | clk[dummy] = imx_clk_fixed("dummy", 0); |
84 | clk[osc] = imx_clk_fixed("osc", 24000000); | 95 | clk[osc] = imx_clk_fixed("osc", osc_rate); |
85 | clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL)); | 96 | clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL)); |
86 | clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL)); | 97 | clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL)); |
87 | clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4); | 98 | clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4); |
@@ -123,22 +134,36 @@ int __init mx25_clocks_init(void) | |||
123 | clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6); | 134 | clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6); |
124 | clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6); | 135 | clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6); |
125 | clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0); | 136 | clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0); |
137 | clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0), 1); | ||
138 | clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0), 2); | ||
126 | clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3); | 139 | clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3); |
127 | clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); | 140 | clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); |
128 | clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); | 141 | clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); |
129 | clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); | 142 | clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); |
130 | clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7); | 143 | clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7); |
131 | clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8); | 144 | clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8); |
145 | clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0), 9); | ||
146 | clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0), 10); | ||
147 | clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0), 11); | ||
148 | clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0), 12); | ||
132 | clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); | 149 | clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); |
133 | clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); | 150 | clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); |
134 | clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); | 151 | clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); |
152 | clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16); | ||
153 | /* CCM_CGCR0(17): reserved */ | ||
135 | clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18); | 154 | clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18); |
155 | clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19); | ||
156 | clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20); | ||
136 | clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21); | 157 | clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21); |
137 | clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22); | 158 | clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22); |
138 | clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23); | 159 | clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23); |
139 | clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24); | 160 | clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24); |
161 | clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25); | ||
140 | clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26); | 162 | clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26); |
163 | clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27); | ||
141 | clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28); | 164 | clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28); |
165 | /* CCM_CGCR0(29-31): reserved */ | ||
166 | /* CCM_CGCR1(0): reserved in datasheet, used as audmux in FSL kernel */ | ||
142 | clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2); | 167 | clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2); |
143 | clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3); | 168 | clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3); |
144 | clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4); | 169 | clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4); |
@@ -146,17 +171,41 @@ int __init mx25_clocks_init(void) | |||
146 | clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6); | 171 | clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6); |
147 | clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7); | 172 | clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7); |
148 | clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8); | 173 | clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8); |
174 | clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1), 9); | ||
175 | clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1), 10); | ||
176 | clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1), 11); | ||
177 | /* CCM_CGCR1(12): reserved in datasheet, used as esai in FSL kernel */ | ||
149 | clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13); | 178 | clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13); |
150 | clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14); | 179 | clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14); |
151 | clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15); | 180 | clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15); |
181 | /* CCM_CGCR1(16): reserved in datasheet, used as gpio1 in FSL kernel */ | ||
182 | /* CCM_CGCR1(17): reserved in datasheet, used as gpio2 in FSL kernel */ | ||
183 | /* CCM_CGCR1(18): reserved in datasheet, used as gpio3 in FSL kernel */ | ||
184 | clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19); | ||
185 | clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20); | ||
186 | clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21); | ||
187 | clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22); | ||
188 | /* CCM_CGCR1(23): reserved in datasheet, used as i2c1 in FSL kernel */ | ||
189 | /* CCM_CGCR1(24): reserved in datasheet, used as i2c2 in FSL kernel */ | ||
190 | /* CCM_CGCR1(25): reserved in datasheet, used as i2c3 in FSL kernel */ | ||
152 | clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26); | 191 | clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26); |
192 | /* CCM_CGCR1(27): reserved in datasheet, used as iomuxc in FSL kernel */ | ||
193 | /* CCM_CGCR1(28): reserved in datasheet, used as kpp in FSL kernel */ | ||
153 | clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28); | 194 | clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28); |
154 | clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29); | 195 | clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29); |
196 | /* CCM_CGCR1(30): reserved in datasheet, used as owire in FSL kernel */ | ||
155 | clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31); | 197 | clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31); |
156 | clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0); | 198 | clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0); |
157 | clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1); | 199 | clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1); |
158 | clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2); | 200 | clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2); |
201 | clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2), 3); | ||
202 | /* CCM_CGCR2(4): reserved in datasheet, used as rtic in FSL kernel */ | ||
203 | clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2), 5); | ||
159 | clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6); | 204 | clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6); |
205 | clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2), 7); | ||
206 | clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2), 8); | ||
207 | clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2), 9); | ||
208 | clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2), 10); | ||
160 | clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11); | 209 | clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11); |
161 | clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12); | 210 | clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12); |
162 | clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13); | 211 | clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13); |
@@ -165,6 +214,7 @@ int __init mx25_clocks_init(void) | |||
165 | clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16); | 214 | clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16); |
166 | clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17); | 215 | clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17); |
167 | clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18); | 216 | clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18); |
217 | /* CCM_CGCR2(19): reserved in datasheet, but used as wdt in FSL kernel */ | ||
168 | clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19); | 218 | clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19); |
169 | 219 | ||
170 | for (i = 0; i < ARRAY_SIZE(clk); i++) | 220 | for (i = 0; i < ARRAY_SIZE(clk); i++) |
@@ -172,6 +222,18 @@ int __init mx25_clocks_init(void) | |||
172 | pr_err("i.MX25 clk %d: register failed with %ld\n", | 222 | pr_err("i.MX25 clk %d: register failed with %ld\n", |
173 | i, PTR_ERR(clk[i])); | 223 | i, PTR_ERR(clk[i])); |
174 | 224 | ||
225 | clk_prepare_enable(clk[emi_ahb]); | ||
226 | |||
227 | clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); | ||
228 | clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); | ||
229 | |||
230 | return 0; | ||
231 | } | ||
232 | |||
233 | int __init mx25_clocks_init(void) | ||
234 | { | ||
235 | __mx25_clocks_init(24000000); | ||
236 | |||
175 | /* i.mx25 has the i.mx21 type uart */ | 237 | /* i.mx25 has the i.mx21 type uart */ |
176 | clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0"); | 238 | clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0"); |
177 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0"); | 239 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0"); |
@@ -183,8 +245,6 @@ int __init mx25_clocks_init(void) | |||
183 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3"); | 245 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3"); |
184 | clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4"); | 246 | clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4"); |
185 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4"); | 247 | clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4"); |
186 | clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); | ||
187 | clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); | ||
188 | clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); | 248 | clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); |
189 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0"); | 249 | clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0"); |
190 | clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0"); | 250 | clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0"); |
@@ -242,5 +302,40 @@ int __init mx25_clocks_init(void) | |||
242 | clk_register_clkdev(clk[iim_ipg], "iim", NULL); | 302 | clk_register_clkdev(clk[iim_ipg], "iim", NULL); |
243 | 303 | ||
244 | mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1); | 304 | mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1); |
305 | |||
306 | return 0; | ||
307 | } | ||
308 | |||
309 | int __init mx25_clocks_init_dt(void) | ||
310 | { | ||
311 | struct device_node *np; | ||
312 | void __iomem *base; | ||
313 | int irq; | ||
314 | unsigned long osc_rate = 24000000; | ||
315 | |||
316 | /* retrieve the freqency of fixed clocks from device tree */ | ||
317 | for_each_compatible_node(np, NULL, "fixed-clock") { | ||
318 | u32 rate; | ||
319 | if (of_property_read_u32(np, "clock-frequency", &rate)) | ||
320 | continue; | ||
321 | |||
322 | if (of_device_is_compatible(np, "fsl,imx-osc")) | ||
323 | osc_rate = rate; | ||
324 | } | ||
325 | |||
326 | np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm"); | ||
327 | clk_data.clks = clk; | ||
328 | clk_data.clk_num = ARRAY_SIZE(clk); | ||
329 | of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); | ||
330 | |||
331 | __mx25_clocks_init(osc_rate); | ||
332 | |||
333 | np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"); | ||
334 | base = of_iomap(np, 0); | ||
335 | WARN_ON(!base); | ||
336 | irq = irq_of_parse_and_map(np, 0); | ||
337 | |||
338 | mxc_timer_init(base, irq); | ||
339 | |||
245 | return 0; | 340 | return 0; |
246 | } | 341 | } |
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index e5a82bb95b52..5f9f5919dd74 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c | |||
@@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void) | |||
406 | clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); | 406 | clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); |
407 | clk_register_clkdev(clk[ahb], "ahb", NULL); | 407 | clk_register_clkdev(clk[ahb], "ahb", NULL); |
408 | clk_register_clkdev(clk[cko1], "cko1", NULL); | 408 | clk_register_clkdev(clk[cko1], "cko1", NULL); |
409 | clk_register_clkdev(clk[arm], NULL, "cpu0"); | ||
409 | 410 | ||
410 | /* | 411 | /* |
411 | * The gpmi needs 100MHz frequency in the EDO/Sync mode, | 412 | * The gpmi needs 100MHz frequency in the EDO/Sync mode, |
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index ef8db6b34841..7191ab4434e5 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h | |||
@@ -66,6 +66,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
66 | unsigned long ckih1, unsigned long ckih2); | 66 | unsigned long ckih1, unsigned long ckih2); |
67 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, | 67 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, |
68 | unsigned long ckih1, unsigned long ckih2); | 68 | unsigned long ckih1, unsigned long ckih2); |
69 | extern int mx25_clocks_init_dt(void); | ||
69 | extern int mx27_clocks_init_dt(void); | 70 | extern int mx27_clocks_init_dt(void); |
70 | extern int mx31_clocks_init_dt(void); | 71 | extern int mx31_clocks_init_dt(void); |
71 | extern int mx51_clocks_init_dt(void); | 72 | extern int mx51_clocks_init_dt(void); |
diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c new file mode 100644 index 000000000000..e17dfbc42192 --- /dev/null +++ b/arch/arm/mach-imx/imx25-dt.c | |||
@@ -0,0 +1,48 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Sascha Hauer, Pengutronix | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | #include <linux/irq.h> | ||
13 | #include <linux/of_irq.h> | ||
14 | #include <linux/of_platform.h> | ||
15 | #include <asm/mach/arch.h> | ||
16 | #include <asm/mach/time.h> | ||
17 | #include "common.h" | ||
18 | #include "mx25.h" | ||
19 | |||
20 | static void __init imx25_dt_init(void) | ||
21 | { | ||
22 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | ||
23 | } | ||
24 | |||
25 | static void __init imx25_timer_init(void) | ||
26 | { | ||
27 | mx25_clocks_init_dt(); | ||
28 | } | ||
29 | |||
30 | static struct sys_timer imx25_timer = { | ||
31 | .init = imx25_timer_init, | ||
32 | }; | ||
33 | |||
34 | static const char * const imx25_dt_board_compat[] __initconst = { | ||
35 | "fsl,imx25", | ||
36 | NULL | ||
37 | }; | ||
38 | |||
39 | DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)") | ||
40 | .map_io = mx25_map_io, | ||
41 | .init_early = imx25_init_early, | ||
42 | .init_irq = mx25_init_irq, | ||
43 | .handle_irq = imx25_handle_irq, | ||
44 | .timer = &imx25_timer, | ||
45 | .init_machine = imx25_dt_init, | ||
46 | .dt_compat = imx25_dt_board_compat, | ||
47 | .restart = mxc_restart, | ||
48 | MACHINE_END | ||
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index 5f1510363ee7..2fdc9bf2fb5e 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c | |||
@@ -17,17 +17,25 @@ | |||
17 | 17 | ||
18 | #include "hardware.h" | 18 | #include "hardware.h" |
19 | 19 | ||
20 | #define IMX6Q_UART1_BASE_ADDR 0x02020000 | ||
21 | #define IMX6Q_UART2_BASE_ADDR 0x021e8000 | ||
22 | #define IMX6Q_UART3_BASE_ADDR 0x021ec000 | ||
23 | #define IMX6Q_UART4_BASE_ADDR 0x021f0000 | ||
24 | #define IMX6Q_UART5_BASE_ADDR 0x021f4000 | ||
25 | |||
26 | /* | ||
27 | * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion | ||
28 | * of IMX6Q_UART##n##_BASE_ADDR. | ||
29 | */ | ||
30 | #define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR | ||
31 | #define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) | ||
32 | #define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) | ||
33 | |||
20 | static struct map_desc imx_lluart_desc = { | 34 | static struct map_desc imx_lluart_desc = { |
21 | #ifdef CONFIG_DEBUG_IMX6Q_UART2 | 35 | #ifdef CONFIG_DEBUG_IMX6Q_UART |
22 | .virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR), | 36 | .virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE), |
23 | .pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR), | 37 | .pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE), |
24 | .length = MX6Q_UART2_SIZE, | 38 | .length = 0x4000, |
25 | .type = MT_DEVICE, | ||
26 | #endif | ||
27 | #ifdef CONFIG_DEBUG_IMX6Q_UART4 | ||
28 | .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR), | ||
29 | .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), | ||
30 | .length = MX6Q_UART4_SIZE, | ||
31 | .type = MT_DEVICE, | 39 | .type = MT_DEVICE, |
32 | #endif | 40 | #endif |
33 | }; | 41 | }; |
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 978b6dd00de4..9511142d436c 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -38,6 +38,40 @@ | |||
38 | #include "cpuidle.h" | 38 | #include "cpuidle.h" |
39 | #include "hardware.h" | 39 | #include "hardware.h" |
40 | 40 | ||
41 | #define IMX6Q_ANALOG_DIGPROG 0x260 | ||
42 | |||
43 | static int imx6q_revision(void) | ||
44 | { | ||
45 | struct device_node *np; | ||
46 | void __iomem *base; | ||
47 | static u32 rev; | ||
48 | |||
49 | if (!rev) { | ||
50 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); | ||
51 | if (!np) | ||
52 | return IMX_CHIP_REVISION_UNKNOWN; | ||
53 | base = of_iomap(np, 0); | ||
54 | if (!base) { | ||
55 | of_node_put(np); | ||
56 | return IMX_CHIP_REVISION_UNKNOWN; | ||
57 | } | ||
58 | rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG); | ||
59 | iounmap(base); | ||
60 | of_node_put(np); | ||
61 | } | ||
62 | |||
63 | switch (rev & 0xff) { | ||
64 | case 0: | ||
65 | return IMX_CHIP_REVISION_1_0; | ||
66 | case 1: | ||
67 | return IMX_CHIP_REVISION_1_1; | ||
68 | case 2: | ||
69 | return IMX_CHIP_REVISION_1_2; | ||
70 | default: | ||
71 | return IMX_CHIP_REVISION_UNKNOWN; | ||
72 | } | ||
73 | } | ||
74 | |||
41 | void imx6q_restart(char mode, const char *cmd) | 75 | void imx6q_restart(char mode, const char *cmd) |
42 | { | 76 | { |
43 | struct device_node *np; | 77 | struct device_node *np; |
@@ -192,6 +226,7 @@ static void __init imx6q_timer_init(void) | |||
192 | { | 226 | { |
193 | mx6q_clocks_init(); | 227 | mx6q_clocks_init(); |
194 | twd_local_timer_of_register(); | 228 | twd_local_timer_of_register(); |
229 | imx_print_silicon_rev("i.MX6Q", imx6q_revision()); | ||
195 | } | 230 | } |
196 | 231 | ||
197 | static struct sys_timer imx6q_timer = { | 232 | static struct sys_timer imx6q_timer = { |
diff --git a/arch/arm/mach-imx/mx6q.h b/arch/arm/mach-imx/mx6q.h index f7e7dbac8f4b..19d3f54db5af 100644 --- a/arch/arm/mach-imx/mx6q.h +++ b/arch/arm/mach-imx/mx6q.h | |||
@@ -27,9 +27,5 @@ | |||
27 | #define MX6Q_CCM_SIZE 0x4000 | 27 | #define MX6Q_CCM_SIZE 0x4000 |
28 | #define MX6Q_ANATOP_BASE_ADDR 0x020c8000 | 28 | #define MX6Q_ANATOP_BASE_ADDR 0x020c8000 |
29 | #define MX6Q_ANATOP_SIZE 0x1000 | 29 | #define MX6Q_ANATOP_SIZE 0x1000 |
30 | #define MX6Q_UART2_BASE_ADDR 0x021e8000 | ||
31 | #define MX6Q_UART2_SIZE 0x4000 | ||
32 | #define MX6Q_UART4_BASE_ADDR 0x021f0000 | ||
33 | #define MX6Q_UART4_SIZE 0x4000 | ||
34 | 30 | ||
35 | #endif /* __MACH_MX6Q_H__ */ | 31 | #endif /* __MACH_MX6Q_H__ */ |
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 50bca5032b7e..503d7dd944ff 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig | |||
@@ -46,6 +46,11 @@ config MACH_GURUPLUG | |||
46 | 46 | ||
47 | config ARCH_KIRKWOOD_DT | 47 | config ARCH_KIRKWOOD_DT |
48 | bool "Marvell Kirkwood Flattened Device Tree" | 48 | bool "Marvell Kirkwood Flattened Device Tree" |
49 | select POWER_SUPPLY | ||
50 | select POWER_RESET | ||
51 | select POWER_RESET_GPIO | ||
52 | select REGULATOR | ||
53 | select REGULATOR_FIXED_VOLTAGE | ||
49 | select USE_OF | 54 | select USE_OF |
50 | help | 55 | help |
51 | Say 'Y' here if you want your kernel to support the | 56 | Say 'Y' here if you want your kernel to support the |
@@ -130,6 +135,63 @@ config MACH_KM_KIRKWOOD_DT | |||
130 | Say 'Y' here if you want your kernel to support the | 135 | Say 'Y' here if you want your kernel to support the |
131 | Keymile Kirkwood Reference Desgin, using Flattened Device Tree. | 136 | Keymile Kirkwood Reference Desgin, using Flattened Device Tree. |
132 | 137 | ||
138 | config MACH_INETSPACE_V2_DT | ||
139 | bool "LaCie Internet Space v2 NAS (Flattened Device Tree)" | ||
140 | select ARCH_KIRKWOOD_DT | ||
141 | help | ||
142 | Say 'Y' here if you want your kernel to support the LaCie | ||
143 | Internet Space v2 NAS, using Flattened Device Tree. | ||
144 | |||
145 | config MACH_MPLCEC4_DT | ||
146 | bool "MPL CEC4 (Flattened Device Tree)" | ||
147 | select ARCH_KIRKWOOD_DT | ||
148 | help | ||
149 | Say 'Y' here if you want your kernel to support the | ||
150 | MPL CEC4 (Flattened Device Tree). | ||
151 | |||
152 | config MACH_NETSPACE_V2_DT | ||
153 | bool "LaCie Network Space v2 NAS (Flattened Device Tree)" | ||
154 | select ARCH_KIRKWOOD_DT | ||
155 | help | ||
156 | Say 'Y' here if you want your kernel to support the LaCie | ||
157 | Network Space v2 NAS, using Flattened Device Tree. | ||
158 | |||
159 | config MACH_NETSPACE_MAX_V2_DT | ||
160 | bool "LaCie Network Space Max v2 NAS (Flattened Device Tree)" | ||
161 | select ARCH_KIRKWOOD_DT | ||
162 | help | ||
163 | Say 'Y' here if you want your kernel to support the LaCie | ||
164 | Network Space Max v2 NAS, using Flattened Device Tree. | ||
165 | |||
166 | config MACH_NETSPACE_LITE_V2_DT | ||
167 | bool "LaCie Network Space Lite v2 NAS (Flattened Device Tree)" | ||
168 | select ARCH_KIRKWOOD_DT | ||
169 | help | ||
170 | Say 'Y' here if you want your kernel to support the LaCie | ||
171 | Network Space Lite v2 NAS, using Flattened Device Tree. | ||
172 | |||
173 | config MACH_NETSPACE_MINI_V2_DT | ||
174 | bool "LaCie Network Space Mini v2 NAS (Flattened Device Tree)" | ||
175 | select ARCH_KIRKWOOD_DT | ||
176 | help | ||
177 | Say 'Y' here if you want your kernel to support the LaCie | ||
178 | Network Space Mini v2 NAS (aka SafeBox), using Flattened | ||
179 | Device Tree. | ||
180 | |||
181 | config MACH_OPENBLOCKS_A6_DT | ||
182 | bool "Plat'Home OpenBlocks A6 (Flattened Device Tree)" | ||
183 | select ARCH_KIRKWOOD_DT | ||
184 | help | ||
185 | Say 'Y' here if you want your kernel to support the | ||
186 | Plat'Home OpenBlocks A6 (Flattened Device Tree). | ||
187 | |||
188 | config MACH_TOPKICK_DT | ||
189 | bool "USI Topkick (Flattened Device Tree)" | ||
190 | select ARCH_KIRKWOOD_DT | ||
191 | help | ||
192 | Say 'Y' here if you want your kernel to support the | ||
193 | USI Topkick, using Flattened Device Tree | ||
194 | |||
133 | config MACH_TS219 | 195 | config MACH_TS219 |
134 | bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" | 196 | bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" |
135 | help | 197 | help |
@@ -216,6 +278,14 @@ config MACH_T5325 | |||
216 | Say 'Y' here if you want your kernel to support the | 278 | Say 'Y' here if you want your kernel to support the |
217 | HP t5325 Thin Client. | 279 | HP t5325 Thin Client. |
218 | 280 | ||
281 | config MACH_NSA310_DT | ||
282 | bool "ZyXEL NSA-310 (Flattened Device Tree)" | ||
283 | select ARCH_KIRKWOOD_DT | ||
284 | select ARM_ATAG_DTB_COMPAT | ||
285 | help | ||
286 | Say 'Y' here if you want your kernel to support the | ||
287 | ZyXEL NSA-310 board (Flattened Device Tree). | ||
288 | |||
219 | endmenu | 289 | endmenu |
220 | 290 | ||
221 | endif | 291 | endif |
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile index 294779f892d9..8d2e5a96247c 100644 --- a/arch/arm/mach-kirkwood/Makefile +++ b/arch/arm/mach-kirkwood/Makefile | |||
@@ -31,3 +31,12 @@ obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o | |||
31 | obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o | 31 | obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o |
32 | obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += board-iomega_ix2_200.o | 32 | obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += board-iomega_ix2_200.o |
33 | obj-$(CONFIG_MACH_KM_KIRKWOOD_DT) += board-km_kirkwood.o | 33 | obj-$(CONFIG_MACH_KM_KIRKWOOD_DT) += board-km_kirkwood.o |
34 | obj-$(CONFIG_MACH_INETSPACE_V2_DT) += board-ns2.o | ||
35 | obj-$(CONFIG_MACH_MPLCEC4_DT) += board-mplcec4.o | ||
36 | obj-$(CONFIG_MACH_NETSPACE_V2_DT) += board-ns2.o | ||
37 | obj-$(CONFIG_MACH_NETSPACE_MAX_V2_DT) += board-ns2.o | ||
38 | obj-$(CONFIG_MACH_NETSPACE_LITE_V2_DT) += board-ns2.o | ||
39 | obj-$(CONFIG_MACH_NETSPACE_MINI_V2_DT) += board-ns2.o | ||
40 | obj-$(CONFIG_MACH_NSA310_DT) += board-nsa310.o | ||
41 | obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT) += board-openblocks_a6.o | ||
42 | obj-$(CONFIG_MACH_TOPKICK_DT) += board-usi_topkick.o | ||
diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c index 43d16d6714b8..a1aa87f09180 100644 --- a/arch/arm/mach-kirkwood/board-dnskw.c +++ b/arch/arm/mach-kirkwood/board-dnskw.c | |||
@@ -17,51 +17,11 @@ | |||
17 | #include <linux/mv643xx_eth.h> | 17 | #include <linux/mv643xx_eth.h> |
18 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
19 | #include "common.h" | 19 | #include "common.h" |
20 | #include "mpp.h" | ||
21 | 20 | ||
22 | static struct mv643xx_eth_platform_data dnskw_ge00_data = { | 21 | static struct mv643xx_eth_platform_data dnskw_ge00_data = { |
23 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | 22 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), |
24 | }; | 23 | }; |
25 | 24 | ||
26 | static unsigned int dnskw_mpp_config[] __initdata = { | ||
27 | MPP13_UART1_TXD, /* Custom ... */ | ||
28 | MPP14_UART1_RXD, /* ... Controller (DNS-320 only) */ | ||
29 | MPP20_SATA1_ACTn, /* LED: White Right HDD */ | ||
30 | MPP21_SATA0_ACTn, /* LED: White Left HDD */ | ||
31 | MPP24_GPIO, | ||
32 | MPP25_GPIO, | ||
33 | MPP26_GPIO, /* LED: Power */ | ||
34 | MPP27_GPIO, /* LED: Red Right HDD */ | ||
35 | MPP28_GPIO, /* LED: Red Left HDD */ | ||
36 | MPP29_GPIO, /* LED: Red USB (DNS-325 only) */ | ||
37 | MPP30_GPIO, | ||
38 | MPP31_GPIO, | ||
39 | MPP32_GPIO, | ||
40 | MPP33_GPO, | ||
41 | MPP34_GPIO, /* Button: Front power */ | ||
42 | MPP35_GPIO, /* LED: Red USB (DNS-320 only) */ | ||
43 | MPP36_GPIO, /* Power: Turn off board */ | ||
44 | MPP37_GPIO, /* Power: Turn back on after power failure */ | ||
45 | MPP38_GPIO, | ||
46 | MPP39_GPIO, /* Power: SATA0 */ | ||
47 | MPP40_GPIO, /* Power: SATA1 */ | ||
48 | MPP41_GPIO, /* SATA0 present */ | ||
49 | MPP42_GPIO, /* SATA1 present */ | ||
50 | MPP43_GPIO, /* LED: White USB */ | ||
51 | MPP44_GPIO, /* Fan: Tachometer Pin */ | ||
52 | MPP45_GPIO, /* Fan: high speed */ | ||
53 | MPP46_GPIO, /* Fan: low speed */ | ||
54 | MPP47_GPIO, /* Button: Back unmount */ | ||
55 | MPP48_GPIO, /* Button: Back reset */ | ||
56 | MPP49_GPIO, /* Temp Alarm (DNS-325) Pin of U5 (DNS-320) */ | ||
57 | 0 | ||
58 | }; | ||
59 | |||
60 | static void dnskw_power_off(void) | ||
61 | { | ||
62 | gpio_set_value(36, 1); | ||
63 | } | ||
64 | |||
65 | /* Register any GPIO for output and set the value */ | 25 | /* Register any GPIO for output and set the value */ |
66 | static void __init dnskw_gpio_register(unsigned gpio, char *name, int def) | 26 | static void __init dnskw_gpio_register(unsigned gpio, char *name, int def) |
67 | { | 27 | { |
@@ -76,22 +36,8 @@ static void __init dnskw_gpio_register(unsigned gpio, char *name, int def) | |||
76 | 36 | ||
77 | void __init dnskw_init(void) | 37 | void __init dnskw_init(void) |
78 | { | 38 | { |
79 | kirkwood_mpp_conf(dnskw_mpp_config); | ||
80 | |||
81 | kirkwood_ehci_init(); | ||
82 | kirkwood_ge00_init(&dnskw_ge00_data); | 39 | kirkwood_ge00_init(&dnskw_ge00_data); |
83 | 40 | ||
84 | /* Register power-off GPIO. */ | ||
85 | if (gpio_request(36, "dnskw:power:off") == 0 | ||
86 | && gpio_direction_output(36, 0) == 0) | ||
87 | pm_power_off = dnskw_power_off; | ||
88 | else | ||
89 | pr_err("dnskw: failed to configure power-off GPIO\n"); | ||
90 | |||
91 | /* Ensure power is supplied to both HDDs */ | ||
92 | dnskw_gpio_register(39, "dnskw:power:sata0", 1); | ||
93 | dnskw_gpio_register(40, "dnskw:power:sata1", 1); | ||
94 | |||
95 | /* Set NAS to turn back on after a power failure */ | 41 | /* Set NAS to turn back on after a power failure */ |
96 | dnskw_gpio_register(37, "dnskw:power:recover", 1); | 42 | dnskw_gpio_register(37, "dnskw:power:recover", 1); |
97 | } | 43 | } |
diff --git a/arch/arm/mach-kirkwood/board-dockstar.c b/arch/arm/mach-kirkwood/board-dockstar.c index 6912882b0aa9..d7196db33984 100644 --- a/arch/arm/mach-kirkwood/board-dockstar.c +++ b/arch/arm/mach-kirkwood/board-dockstar.c | |||
@@ -17,32 +17,16 @@ | |||
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/mv643xx_eth.h> | 19 | #include <linux/mv643xx_eth.h> |
20 | #include <linux/gpio.h> | ||
21 | #include "common.h" | 20 | #include "common.h" |
22 | #include "mpp.h" | ||
23 | 21 | ||
24 | static struct mv643xx_eth_platform_data dockstar_ge00_data = { | 22 | static struct mv643xx_eth_platform_data dockstar_ge00_data = { |
25 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | 23 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), |
26 | }; | 24 | }; |
27 | 25 | ||
28 | static unsigned int dockstar_mpp_config[] __initdata = { | ||
29 | MPP29_GPIO, /* USB Power Enable */ | ||
30 | MPP46_GPIO, /* LED green */ | ||
31 | MPP47_GPIO, /* LED orange */ | ||
32 | 0 | ||
33 | }; | ||
34 | |||
35 | void __init dockstar_dt_init(void) | 26 | void __init dockstar_dt_init(void) |
36 | { | 27 | { |
37 | /* | 28 | /* |
38 | * Basic setup. Needs to be called early. | 29 | * Basic setup. Needs to be called early. |
39 | */ | 30 | */ |
40 | kirkwood_mpp_conf(dockstar_mpp_config); | ||
41 | |||
42 | if (gpio_request(29, "USB Power Enable") != 0 || | ||
43 | gpio_direction_output(29, 1) != 0) | ||
44 | pr_err("can't setup GPIO 29 (USB Power Enable)\n"); | ||
45 | kirkwood_ehci_init(); | ||
46 | |||
47 | kirkwood_ge00_init(&dockstar_ge00_data); | 31 | kirkwood_ge00_init(&dockstar_ge00_data); |
48 | } | 32 | } |
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c index 8a8ebe09e512..08248e24ffcd 100644 --- a/arch/arm/mach-kirkwood/board-dreamplug.c +++ b/arch/arm/mach-kirkwood/board-dreamplug.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/platform_data/mmc-mvsdio.h> | 18 | #include <linux/platform_data/mmc-mvsdio.h> |
19 | #include "common.h" | 19 | #include "common.h" |
20 | #include "mpp.h" | ||
21 | 20 | ||
22 | static struct mv643xx_eth_platform_data dreamplug_ge00_data = { | 21 | static struct mv643xx_eth_platform_data dreamplug_ge00_data = { |
23 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | 22 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), |
@@ -31,25 +30,11 @@ static struct mvsdio_platform_data dreamplug_mvsdio_data = { | |||
31 | /* unfortunately the CD signal has not been connected */ | 30 | /* unfortunately the CD signal has not been connected */ |
32 | }; | 31 | }; |
33 | 32 | ||
34 | static unsigned int dreamplug_mpp_config[] __initdata = { | ||
35 | MPP0_SPI_SCn, | ||
36 | MPP1_SPI_MOSI, | ||
37 | MPP2_SPI_SCK, | ||
38 | MPP3_SPI_MISO, | ||
39 | MPP47_GPIO, /* Bluetooth LED */ | ||
40 | MPP48_GPIO, /* Wifi LED */ | ||
41 | MPP49_GPIO, /* Wifi AP LED */ | ||
42 | 0 | ||
43 | }; | ||
44 | |||
45 | void __init dreamplug_init(void) | 33 | void __init dreamplug_init(void) |
46 | { | 34 | { |
47 | /* | 35 | /* |
48 | * Basic setup. Needs to be called early. | 36 | * Basic setup. Needs to be called early. |
49 | */ | 37 | */ |
50 | kirkwood_mpp_conf(dreamplug_mpp_config); | ||
51 | |||
52 | kirkwood_ehci_init(); | ||
53 | kirkwood_ge00_init(&dreamplug_ge00_data); | 38 | kirkwood_ge00_init(&dreamplug_ge00_data); |
54 | kirkwood_ge01_init(&dreamplug_ge01_data); | 39 | kirkwood_ge01_init(&dreamplug_ge01_data); |
55 | kirkwood_sdio_init(&dreamplug_mvsdio_data); | 40 | kirkwood_sdio_init(&dreamplug_mvsdio_data); |
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index e75fbdb533de..375f7d88551c 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c | |||
@@ -30,6 +30,8 @@ static struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = { | |||
30 | OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), | 30 | OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), |
31 | OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", | 31 | OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", |
32 | NULL), | 32 | NULL), |
33 | OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011100, "mv64xxx_i2c.1", | ||
34 | NULL), | ||
33 | OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL), | 35 | OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL), |
34 | OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL), | 36 | OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL), |
35 | OF_DEV_AUXDATA("marvell,orion-nand", 0xf4000000, "orion_nand", NULL), | 37 | OF_DEV_AUXDATA("marvell,orion-nand", 0xf4000000, "orion_nand", NULL), |
@@ -94,6 +96,25 @@ static void __init kirkwood_dt_init(void) | |||
94 | if (of_machine_is_compatible("keymile,km_kirkwood")) | 96 | if (of_machine_is_compatible("keymile,km_kirkwood")) |
95 | km_kirkwood_init(); | 97 | km_kirkwood_init(); |
96 | 98 | ||
99 | if (of_machine_is_compatible("lacie,inetspace_v2") || | ||
100 | of_machine_is_compatible("lacie,netspace_v2") || | ||
101 | of_machine_is_compatible("lacie,netspace_max_v2") || | ||
102 | of_machine_is_compatible("lacie,netspace_lite_v2") || | ||
103 | of_machine_is_compatible("lacie,netspace_mini_v2")) | ||
104 | ns2_init(); | ||
105 | |||
106 | if (of_machine_is_compatible("mpl,cec4")) | ||
107 | mplcec4_init(); | ||
108 | |||
109 | if (of_machine_is_compatible("plathome,openblocks-a6")) | ||
110 | openblocks_a6_init(); | ||
111 | |||
112 | if (of_machine_is_compatible("usi,topkick")) | ||
113 | usi_topkick_init(); | ||
114 | |||
115 | if (of_machine_is_compatible("zyxel,nsa310")) | ||
116 | nsa310_init(); | ||
117 | |||
97 | of_platform_populate(NULL, kirkwood_dt_match_table, | 118 | of_platform_populate(NULL, kirkwood_dt_match_table, |
98 | kirkwood_auxdata_lookup, NULL); | 119 | kirkwood_auxdata_lookup, NULL); |
99 | } | 120 | } |
@@ -110,6 +131,15 @@ static const char * const kirkwood_dt_board_compat[] = { | |||
110 | "buffalo,lsxl", | 131 | "buffalo,lsxl", |
111 | "iom,ix2-200", | 132 | "iom,ix2-200", |
112 | "keymile,km_kirkwood", | 133 | "keymile,km_kirkwood", |
134 | "lacie,inetspace_v2", | ||
135 | "lacie,netspace_max_v2", | ||
136 | "lacie,netspace_v2", | ||
137 | "lacie,netspace_lite_v2", | ||
138 | "lacie,netspace_mini_v2", | ||
139 | "mpl,cec4", | ||
140 | "plathome,openblocks-a6", | ||
141 | "usi,topkick", | ||
142 | "zyxel,nsa310", | ||
113 | NULL | 143 | NULL |
114 | }; | 144 | }; |
115 | 145 | ||
diff --git a/arch/arm/mach-kirkwood/board-goflexnet.c b/arch/arm/mach-kirkwood/board-goflexnet.c index 5dcd0d62aa42..9db979aec82e 100644 --- a/arch/arm/mach-kirkwood/board-goflexnet.c +++ b/arch/arm/mach-kirkwood/board-goflexnet.c | |||
@@ -19,40 +19,16 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/mv643xx_eth.h> | 21 | #include <linux/mv643xx_eth.h> |
22 | #include <linux/gpio.h> | ||
23 | #include "common.h" | 22 | #include "common.h" |
24 | #include "mpp.h" | ||
25 | 23 | ||
26 | static struct mv643xx_eth_platform_data goflexnet_ge00_data = { | 24 | static struct mv643xx_eth_platform_data goflexnet_ge00_data = { |
27 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | 25 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), |
28 | }; | 26 | }; |
29 | 27 | ||
30 | static unsigned int goflexnet_mpp_config[] __initdata = { | ||
31 | MPP29_GPIO, /* USB Power Enable */ | ||
32 | MPP47_GPIO, /* LED Orange */ | ||
33 | MPP46_GPIO, /* LED Green */ | ||
34 | MPP45_GPIO, /* LED Left Capacity 3 */ | ||
35 | MPP44_GPIO, /* LED Left Capacity 2 */ | ||
36 | MPP43_GPIO, /* LED Left Capacity 1 */ | ||
37 | MPP42_GPIO, /* LED Left Capacity 0 */ | ||
38 | MPP41_GPIO, /* LED Right Capacity 3 */ | ||
39 | MPP40_GPIO, /* LED Right Capacity 2 */ | ||
40 | MPP39_GPIO, /* LED Right Capacity 1 */ | ||
41 | MPP38_GPIO, /* LED Right Capacity 0 */ | ||
42 | 0 | ||
43 | }; | ||
44 | |||
45 | void __init goflexnet_init(void) | 28 | void __init goflexnet_init(void) |
46 | { | 29 | { |
47 | /* | 30 | /* |
48 | * Basic setup. Needs to be called early. | 31 | * Basic setup. Needs to be called early. |
49 | */ | 32 | */ |
50 | kirkwood_mpp_conf(goflexnet_mpp_config); | ||
51 | |||
52 | if (gpio_request(29, "USB Power Enable") != 0 || | ||
53 | gpio_direction_output(29, 1) != 0) | ||
54 | pr_err("can't setup GPIO 29 (USB Power Enable)\n"); | ||
55 | kirkwood_ehci_init(); | ||
56 | |||
57 | kirkwood_ge00_init(&goflexnet_ge00_data); | 33 | kirkwood_ge00_init(&goflexnet_ge00_data); |
58 | } | 34 | } |
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c index 6d3a56421142..9f6f496380d8 100644 --- a/arch/arm/mach-kirkwood/board-ib62x0.c +++ b/arch/arm/mach-kirkwood/board-ib62x0.c | |||
@@ -14,52 +14,17 @@ | |||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/mv643xx_eth.h> | 16 | #include <linux/mv643xx_eth.h> |
17 | #include <linux/gpio.h> | ||
18 | #include <linux/input.h> | 17 | #include <linux/input.h> |
19 | #include "common.h" | 18 | #include "common.h" |
20 | #include "mpp.h" | ||
21 | |||
22 | #define IB62X0_GPIO_POWER_OFF 24 | ||
23 | 19 | ||
24 | static struct mv643xx_eth_platform_data ib62x0_ge00_data = { | 20 | static struct mv643xx_eth_platform_data ib62x0_ge00_data = { |
25 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | 21 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), |
26 | }; | 22 | }; |
27 | 23 | ||
28 | static unsigned int ib62x0_mpp_config[] __initdata = { | ||
29 | MPP0_NF_IO2, | ||
30 | MPP1_NF_IO3, | ||
31 | MPP2_NF_IO4, | ||
32 | MPP3_NF_IO5, | ||
33 | MPP4_NF_IO6, | ||
34 | MPP5_NF_IO7, | ||
35 | MPP18_NF_IO0, | ||
36 | MPP19_NF_IO1, | ||
37 | MPP22_GPIO, /* OS LED red */ | ||
38 | MPP24_GPIO, /* Power off device */ | ||
39 | MPP25_GPIO, /* OS LED green */ | ||
40 | MPP27_GPIO, /* USB transfer LED */ | ||
41 | MPP28_GPIO, /* Reset button */ | ||
42 | MPP29_GPIO, /* USB Copy button */ | ||
43 | 0 | ||
44 | }; | ||
45 | |||
46 | static void ib62x0_power_off(void) | ||
47 | { | ||
48 | gpio_set_value(IB62X0_GPIO_POWER_OFF, 1); | ||
49 | } | ||
50 | |||
51 | void __init ib62x0_init(void) | 24 | void __init ib62x0_init(void) |
52 | { | 25 | { |
53 | /* | 26 | /* |
54 | * Basic setup. Needs to be called early. | 27 | * Basic setup. Needs to be called early. |
55 | */ | 28 | */ |
56 | kirkwood_mpp_conf(ib62x0_mpp_config); | ||
57 | |||
58 | kirkwood_ehci_init(); | ||
59 | kirkwood_ge00_init(&ib62x0_ge00_data); | 29 | kirkwood_ge00_init(&ib62x0_ge00_data); |
60 | if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 && | ||
61 | gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0) | ||
62 | pm_power_off = ib62x0_power_off; | ||
63 | else | ||
64 | pr_err("board-ib62x0: failed to configure power-off GPIO\n"); | ||
65 | } | 30 | } |
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c index 24f5aa7f698b..c8ebde4919e2 100644 --- a/arch/arm/mach-kirkwood/board-iconnect.c +++ b/arch/arm/mach-kirkwood/board-iconnect.c | |||
@@ -13,31 +13,13 @@ | |||
13 | #include <linux/of.h> | 13 | #include <linux/of.h> |
14 | #include <linux/mv643xx_eth.h> | 14 | #include <linux/mv643xx_eth.h> |
15 | #include "common.h" | 15 | #include "common.h" |
16 | #include "mpp.h" | ||
17 | 16 | ||
18 | static struct mv643xx_eth_platform_data iconnect_ge00_data = { | 17 | static struct mv643xx_eth_platform_data iconnect_ge00_data = { |
19 | .phy_addr = MV643XX_ETH_PHY_ADDR(11), | 18 | .phy_addr = MV643XX_ETH_PHY_ADDR(11), |
20 | }; | 19 | }; |
21 | 20 | ||
22 | static unsigned int iconnect_mpp_config[] __initdata = { | ||
23 | MPP12_GPIO, | ||
24 | MPP35_GPIO, | ||
25 | MPP41_GPIO, | ||
26 | MPP42_GPIO, | ||
27 | MPP43_GPIO, | ||
28 | MPP44_GPIO, | ||
29 | MPP45_GPIO, | ||
30 | MPP46_GPIO, | ||
31 | MPP47_GPIO, | ||
32 | MPP48_GPIO, | ||
33 | 0 | ||
34 | }; | ||
35 | |||
36 | void __init iconnect_init(void) | 21 | void __init iconnect_init(void) |
37 | { | 22 | { |
38 | kirkwood_mpp_conf(iconnect_mpp_config); | ||
39 | |||
40 | kirkwood_ehci_init(); | ||
41 | kirkwood_ge00_init(&iconnect_ge00_data); | 23 | kirkwood_ge00_init(&iconnect_ge00_data); |
42 | } | 24 | } |
43 | 25 | ||
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c index e4ed62c28f54..f655b2637b0e 100644 --- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c +++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c | |||
@@ -13,7 +13,6 @@ | |||
13 | #include <linux/mv643xx_eth.h> | 13 | #include <linux/mv643xx_eth.h> |
14 | #include <linux/ethtool.h> | 14 | #include <linux/ethtool.h> |
15 | #include "common.h" | 15 | #include "common.h" |
16 | #include "mpp.h" | ||
17 | 16 | ||
18 | static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = { | 17 | static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = { |
19 | .phy_addr = MV643XX_ETH_PHY_NONE, | 18 | .phy_addr = MV643XX_ETH_PHY_NONE, |
@@ -21,35 +20,10 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = { | |||
21 | .duplex = DUPLEX_FULL, | 20 | .duplex = DUPLEX_FULL, |
22 | }; | 21 | }; |
23 | 22 | ||
24 | static unsigned int iomega_ix2_200_mpp_config[] __initdata = { | ||
25 | MPP12_GPIO, /* Reset Button */ | ||
26 | MPP14_GPIO, /* Power Button */ | ||
27 | MPP15_GPIO, /* Backup LED (blue) */ | ||
28 | MPP16_GPIO, /* Power LED (white) */ | ||
29 | MPP35_GPIO, /* OTB Button */ | ||
30 | MPP36_GPIO, /* Rebuild LED (white) */ | ||
31 | MPP37_GPIO, /* Health LED (red) */ | ||
32 | MPP38_GPIO, /* SATA LED brightness control 1 */ | ||
33 | MPP39_GPIO, /* SATA LED brightness control 2 */ | ||
34 | MPP40_GPIO, /* Backup LED brightness control 1 */ | ||
35 | MPP41_GPIO, /* Backup LED brightness control 2 */ | ||
36 | MPP42_GPIO, /* Power LED brightness control 1 */ | ||
37 | MPP43_GPIO, /* Power LED brightness control 2 */ | ||
38 | MPP44_GPIO, /* Health LED brightness control 1 */ | ||
39 | MPP45_GPIO, /* Health LED brightness control 2 */ | ||
40 | MPP46_GPIO, /* Rebuild LED brightness control 1 */ | ||
41 | MPP47_GPIO, /* Rebuild LED brightness control 2 */ | ||
42 | 0 | ||
43 | }; | ||
44 | |||
45 | void __init iomega_ix2_200_init(void) | 23 | void __init iomega_ix2_200_init(void) |
46 | { | 24 | { |
47 | /* | 25 | /* |
48 | * Basic setup. Needs to be called early. | 26 | * Basic setup. Needs to be called early. |
49 | */ | 27 | */ |
50 | kirkwood_mpp_conf(iomega_ix2_200_mpp_config); | ||
51 | |||
52 | kirkwood_ehci_init(); | ||
53 | |||
54 | kirkwood_ge01_init(&iomega_ix2_200_ge00_data); | 28 | kirkwood_ge01_init(&iomega_ix2_200_ge00_data); |
55 | } | 29 | } |
diff --git a/arch/arm/mach-kirkwood/board-km_kirkwood.c b/arch/arm/mach-kirkwood/board-km_kirkwood.c index f7d32834b757..44e4605ba0bf 100644 --- a/arch/arm/mach-kirkwood/board-km_kirkwood.c +++ b/arch/arm/mach-kirkwood/board-km_kirkwood.c | |||
@@ -18,27 +18,15 @@ | |||
18 | #include <linux/clk.h> | 18 | #include <linux/clk.h> |
19 | #include <linux/clk-private.h> | 19 | #include <linux/clk-private.h> |
20 | #include "common.h" | 20 | #include "common.h" |
21 | #include "mpp.h" | ||
22 | 21 | ||
23 | static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = { | 22 | static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = { |
24 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | 23 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), |
25 | }; | 24 | }; |
26 | 25 | ||
27 | static unsigned int km_kirkwood_mpp_config[] __initdata = { | ||
28 | MPP8_GPIO, /* I2C SDA */ | ||
29 | MPP9_GPIO, /* I2C SCL */ | ||
30 | 0 | ||
31 | }; | ||
32 | |||
33 | void __init km_kirkwood_init(void) | 26 | void __init km_kirkwood_init(void) |
34 | { | 27 | { |
35 | struct clk *sata_clk; | 28 | struct clk *sata_clk; |
36 | /* | 29 | /* |
37 | * Basic setup. Needs to be called early. | ||
38 | */ | ||
39 | kirkwood_mpp_conf(km_kirkwood_mpp_config); | ||
40 | |||
41 | /* | ||
42 | * Our variant of kirkwood (integrated in the Bobcat) hangs on accessing | 30 | * Our variant of kirkwood (integrated in the Bobcat) hangs on accessing |
43 | * SATA bits (14-15) of the Clock Gating Control Register. Since these | 31 | * SATA bits (14-15) of the Clock Gating Control Register. Since these |
44 | * devices are also not present in this variant, their clocks get | 32 | * devices are also not present in this variant, their clocks get |
@@ -52,6 +40,5 @@ void __init km_kirkwood_init(void) | |||
52 | if (!IS_ERR(sata_clk)) | 40 | if (!IS_ERR(sata_clk)) |
53 | sata_clk->flags |= CLK_IGNORE_UNUSED; | 41 | sata_clk->flags |= CLK_IGNORE_UNUSED; |
54 | 42 | ||
55 | kirkwood_ehci_init(); | ||
56 | kirkwood_ge00_init(&km_kirkwood_ge00_data); | 43 | kirkwood_ge00_init(&km_kirkwood_ge00_data); |
57 | } | 44 | } |
diff --git a/arch/arm/mach-kirkwood/board-lsxl.c b/arch/arm/mach-kirkwood/board-lsxl.c index 64e5cc6b6d5f..4ec8b7ae784a 100644 --- a/arch/arm/mach-kirkwood/board-lsxl.c +++ b/arch/arm/mach-kirkwood/board-lsxl.c | |||
@@ -15,10 +15,7 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/mv643xx_eth.h> | 17 | #include <linux/mv643xx_eth.h> |
18 | #include <linux/gpio.h> | ||
19 | #include <linux/gpio-fan.h> | ||
20 | #include "common.h" | 18 | #include "common.h" |
21 | #include "mpp.h" | ||
22 | 19 | ||
23 | static struct mv643xx_eth_platform_data lsxl_ge00_data = { | 20 | static struct mv643xx_eth_platform_data lsxl_ge00_data = { |
24 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | 21 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), |
@@ -28,68 +25,6 @@ static struct mv643xx_eth_platform_data lsxl_ge01_data = { | |||
28 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | 25 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), |
29 | }; | 26 | }; |
30 | 27 | ||
31 | static unsigned int lsxl_mpp_config[] __initdata = { | ||
32 | MPP10_GPO, /* HDD Power Enable */ | ||
33 | MPP11_GPIO, /* USB Vbus Enable */ | ||
34 | MPP18_GPO, /* FAN High Enable# */ | ||
35 | MPP19_GPO, /* FAN Low Enable# */ | ||
36 | MPP36_GPIO, /* Function Blue LED */ | ||
37 | MPP37_GPIO, /* Alarm LED */ | ||
38 | MPP38_GPIO, /* Info LED */ | ||
39 | MPP39_GPIO, /* Power LED */ | ||
40 | MPP40_GPIO, /* Fan Lock */ | ||
41 | MPP41_GPIO, /* Function Button */ | ||
42 | MPP42_GPIO, /* Power Switch */ | ||
43 | MPP43_GPIO, /* Power Auto Switch */ | ||
44 | MPP48_GPIO, /* Function Red LED */ | ||
45 | 0 | ||
46 | }; | ||
47 | |||
48 | #define LSXL_GPIO_FAN_HIGH 18 | ||
49 | #define LSXL_GPIO_FAN_LOW 19 | ||
50 | #define LSXL_GPIO_FAN_LOCK 40 | ||
51 | |||
52 | static struct gpio_fan_alarm lsxl_alarm = { | ||
53 | .gpio = LSXL_GPIO_FAN_LOCK, | ||
54 | }; | ||
55 | |||
56 | static struct gpio_fan_speed lsxl_speeds[] = { | ||
57 | { | ||
58 | .rpm = 0, | ||
59 | .ctrl_val = 3, | ||
60 | }, { | ||
61 | .rpm = 1500, | ||
62 | .ctrl_val = 1, | ||
63 | }, { | ||
64 | .rpm = 3250, | ||
65 | .ctrl_val = 2, | ||
66 | }, { | ||
67 | .rpm = 5000, | ||
68 | .ctrl_val = 0, | ||
69 | } | ||
70 | }; | ||
71 | |||
72 | static int lsxl_gpio_list[] = { | ||
73 | LSXL_GPIO_FAN_HIGH, LSXL_GPIO_FAN_LOW, | ||
74 | }; | ||
75 | |||
76 | static struct gpio_fan_platform_data lsxl_fan_data = { | ||
77 | .num_ctrl = ARRAY_SIZE(lsxl_gpio_list), | ||
78 | .ctrl = lsxl_gpio_list, | ||
79 | .alarm = &lsxl_alarm, | ||
80 | .num_speed = ARRAY_SIZE(lsxl_speeds), | ||
81 | .speed = lsxl_speeds, | ||
82 | }; | ||
83 | |||
84 | static struct platform_device lsxl_fan_device = { | ||
85 | .name = "gpio-fan", | ||
86 | .id = -1, | ||
87 | .num_resources = 0, | ||
88 | .dev = { | ||
89 | .platform_data = &lsxl_fan_data, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | /* | 28 | /* |
94 | * On the LS-XHL/LS-CHLv2, the shutdown process is following: | 29 | * On the LS-XHL/LS-CHLv2, the shutdown process is following: |
95 | * - Userland monitors key events until the power switch goes to off position | 30 | * - Userland monitors key events until the power switch goes to off position |
@@ -103,24 +38,14 @@ static void lsxl_power_off(void) | |||
103 | kirkwood_restart('h', NULL); | 38 | kirkwood_restart('h', NULL); |
104 | } | 39 | } |
105 | 40 | ||
106 | #define LSXL_GPIO_HDD_POWER 10 | ||
107 | #define LSXL_GPIO_USB_POWER 11 | ||
108 | |||
109 | void __init lsxl_init(void) | 41 | void __init lsxl_init(void) |
110 | { | 42 | { |
111 | /* | 43 | /* |
112 | * Basic setup. Needs to be called early. | 44 | * Basic setup. Needs to be called early. |
113 | */ | 45 | */ |
114 | kirkwood_mpp_conf(lsxl_mpp_config); | ||
115 | |||
116 | /* usb and sata power on */ | ||
117 | gpio_set_value(LSXL_GPIO_USB_POWER, 1); | ||
118 | gpio_set_value(LSXL_GPIO_HDD_POWER, 1); | ||
119 | 46 | ||
120 | kirkwood_ehci_init(); | ||
121 | kirkwood_ge00_init(&lsxl_ge00_data); | 47 | kirkwood_ge00_init(&lsxl_ge00_data); |
122 | kirkwood_ge01_init(&lsxl_ge01_data); | 48 | kirkwood_ge01_init(&lsxl_ge01_data); |
123 | platform_device_register(&lsxl_fan_device); | ||
124 | 49 | ||
125 | /* register power-off method */ | 50 | /* register power-off method */ |
126 | pm_power_off = lsxl_power_off; | 51 | pm_power_off = lsxl_power_off; |
diff --git a/arch/arm/mach-kirkwood/board-mplcec4.c b/arch/arm/mach-kirkwood/board-mplcec4.c new file mode 100644 index 000000000000..56bfe5a1605a --- /dev/null +++ b/arch/arm/mach-kirkwood/board-mplcec4.c | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 MPL AG, Switzerland | ||
3 | * Stefan Peter <s.peter@mpl.ch> | ||
4 | * | ||
5 | * arch/arm/mach-kirkwood/board-mplcec4.c | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/mv643xx_eth.h> | ||
15 | #include <linux/platform_data/mmc-mvsdio.h> | ||
16 | #include "common.h" | ||
17 | #include "mpp.h" | ||
18 | |||
19 | static struct mv643xx_eth_platform_data mplcec4_ge00_data = { | ||
20 | .phy_addr = MV643XX_ETH_PHY_ADDR(1), | ||
21 | }; | ||
22 | |||
23 | static struct mv643xx_eth_platform_data mplcec4_ge01_data = { | ||
24 | .phy_addr = MV643XX_ETH_PHY_ADDR(2), | ||
25 | }; | ||
26 | |||
27 | static struct mvsdio_platform_data mplcec4_mvsdio_data = { | ||
28 | .gpio_card_detect = 47, /* MPP47 used as SD card detect */ | ||
29 | }; | ||
30 | |||
31 | |||
32 | void __init mplcec4_init(void) | ||
33 | { | ||
34 | /* | ||
35 | * Basic setup. Needs to be called early. | ||
36 | */ | ||
37 | kirkwood_ge00_init(&mplcec4_ge00_data); | ||
38 | kirkwood_ge01_init(&mplcec4_ge01_data); | ||
39 | kirkwood_sdio_init(&mplcec4_mvsdio_data); | ||
40 | kirkwood_pcie_init(KW_PCIE0); | ||
41 | } | ||
42 | |||
43 | |||
44 | |||
diff --git a/arch/arm/mach-kirkwood/board-ns2.c b/arch/arm/mach-kirkwood/board-ns2.c new file mode 100644 index 000000000000..8821720ab5a4 --- /dev/null +++ b/arch/arm/mach-kirkwood/board-ns2.c | |||
@@ -0,0 +1,86 @@ | |||
1 | /* | ||
2 | * Copyright 2012 (C), Simon Guinot <simon.guinot@sequanux.org> | ||
3 | * | ||
4 | * arch/arm/mach-kirkwood/board-ns2.c | ||
5 | * | ||
6 | * LaCie Network Space v2 board (and parents) initialization for drivers | ||
7 | * not converted to flattened device tree yet. | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/mv643xx_eth.h> | ||
18 | #include <linux/gpio.h> | ||
19 | #include <linux/of.h> | ||
20 | #include "common.h" | ||
21 | #include "mpp.h" | ||
22 | |||
23 | static struct mv643xx_eth_platform_data ns2_ge00_data = { | ||
24 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
25 | }; | ||
26 | |||
27 | static unsigned int ns2_mpp_config[] __initdata = { | ||
28 | MPP0_SPI_SCn, | ||
29 | MPP1_SPI_MOSI, | ||
30 | MPP2_SPI_SCK, | ||
31 | MPP3_SPI_MISO, | ||
32 | MPP4_NF_IO6, | ||
33 | MPP5_NF_IO7, | ||
34 | MPP6_SYSRST_OUTn, | ||
35 | MPP7_GPO, /* Fan speed (bit 1) */ | ||
36 | MPP8_TW0_SDA, | ||
37 | MPP9_TW0_SCK, | ||
38 | MPP10_UART0_TXD, | ||
39 | MPP11_UART0_RXD, | ||
40 | MPP12_GPO, /* Red led */ | ||
41 | MPP14_GPIO, /* USB fuse */ | ||
42 | MPP16_GPIO, /* SATA 0 power */ | ||
43 | MPP17_GPIO, /* SATA 1 power */ | ||
44 | MPP18_NF_IO0, | ||
45 | MPP19_NF_IO1, | ||
46 | MPP20_SATA1_ACTn, | ||
47 | MPP21_SATA0_ACTn, | ||
48 | MPP22_GPIO, /* Fan speed (bit 0) */ | ||
49 | MPP23_GPIO, /* Fan power */ | ||
50 | MPP24_GPIO, /* USB mode select */ | ||
51 | MPP25_GPIO, /* Fan rotation fail */ | ||
52 | MPP26_GPIO, /* USB device vbus */ | ||
53 | MPP28_GPIO, /* USB enable host vbus */ | ||
54 | MPP29_GPIO, /* Blue led (slow register) */ | ||
55 | MPP30_GPIO, /* Blue led (command register) */ | ||
56 | MPP31_GPIO, /* Board power off */ | ||
57 | MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */ | ||
58 | MPP33_GPO, /* Fan speed (bit 2) */ | ||
59 | 0 | ||
60 | }; | ||
61 | |||
62 | #define NS2_GPIO_POWER_OFF 31 | ||
63 | |||
64 | static void ns2_power_off(void) | ||
65 | { | ||
66 | gpio_set_value(NS2_GPIO_POWER_OFF, 1); | ||
67 | } | ||
68 | |||
69 | void __init ns2_init(void) | ||
70 | { | ||
71 | /* | ||
72 | * Basic setup. Needs to be called early. | ||
73 | */ | ||
74 | kirkwood_mpp_conf(ns2_mpp_config); | ||
75 | |||
76 | if (of_machine_is_compatible("lacie,netspace_lite_v2") || | ||
77 | of_machine_is_compatible("lacie,netspace_mini_v2")) | ||
78 | ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); | ||
79 | kirkwood_ge00_init(&ns2_ge00_data); | ||
80 | |||
81 | if (gpio_request(NS2_GPIO_POWER_OFF, "power-off") == 0 && | ||
82 | gpio_direction_output(NS2_GPIO_POWER_OFF, 0) == 0) | ||
83 | pm_power_off = ns2_power_off; | ||
84 | else | ||
85 | pr_err("ns2: failed to configure power-off GPIO\n"); | ||
86 | } | ||
diff --git a/arch/arm/mach-kirkwood/board-nsa310.c b/arch/arm/mach-kirkwood/board-nsa310.c new file mode 100644 index 000000000000..f58d2e1a4042 --- /dev/null +++ b/arch/arm/mach-kirkwood/board-nsa310.c | |||
@@ -0,0 +1,101 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/nsa-310-setup.c | ||
3 | * | ||
4 | * ZyXEL NSA-310 Setup | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/i2c.h> | ||
14 | #include <linux/gpio.h> | ||
15 | |||
16 | #include <asm/mach-types.h> | ||
17 | #include <asm/mach/arch.h> | ||
18 | #include <mach/kirkwood.h> | ||
19 | #include "common.h" | ||
20 | #include "mpp.h" | ||
21 | |||
22 | #define NSA310_GPIO_USB_POWER_OFF 21 | ||
23 | #define NSA310_GPIO_POWER_OFF 48 | ||
24 | |||
25 | static unsigned int nsa310_mpp_config[] __initdata = { | ||
26 | MPP12_GPIO, /* led esata green */ | ||
27 | MPP13_GPIO, /* led esata red */ | ||
28 | MPP15_GPIO, /* led usb green */ | ||
29 | MPP16_GPIO, /* led usb red */ | ||
30 | MPP21_GPIO, /* control usb power off */ | ||
31 | MPP28_GPIO, /* led sys green */ | ||
32 | MPP29_GPIO, /* led sys red */ | ||
33 | MPP36_GPIO, /* key reset */ | ||
34 | MPP37_GPIO, /* key copy */ | ||
35 | MPP39_GPIO, /* led copy green */ | ||
36 | MPP40_GPIO, /* led copy red */ | ||
37 | MPP41_GPIO, /* led hdd green */ | ||
38 | MPP42_GPIO, /* led hdd red */ | ||
39 | MPP44_GPIO, /* ?? */ | ||
40 | MPP46_GPIO, /* key power */ | ||
41 | MPP48_GPIO, /* control power off */ | ||
42 | 0 | ||
43 | }; | ||
44 | |||
45 | static struct i2c_board_info __initdata nsa310_i2c_info[] = { | ||
46 | { I2C_BOARD_INFO("adt7476", 0x2e) }, | ||
47 | }; | ||
48 | |||
49 | static void nsa310_power_off(void) | ||
50 | { | ||
51 | gpio_set_value(NSA310_GPIO_POWER_OFF, 1); | ||
52 | } | ||
53 | |||
54 | static int __init nsa310_gpio_request(unsigned int gpio, unsigned long flags, | ||
55 | const char *label) | ||
56 | { | ||
57 | int err; | ||
58 | |||
59 | err = gpio_request_one(gpio, flags, label); | ||
60 | if (err) | ||
61 | pr_err("NSA-310: can't setup GPIO%u (%s), err=%d\n", | ||
62 | gpio, label, err); | ||
63 | |||
64 | return err; | ||
65 | } | ||
66 | |||
67 | static void __init nsa310_gpio_init(void) | ||
68 | { | ||
69 | int err; | ||
70 | |||
71 | err = nsa310_gpio_request(NSA310_GPIO_POWER_OFF, GPIOF_OUT_INIT_LOW, | ||
72 | "Power Off"); | ||
73 | if (!err) | ||
74 | pm_power_off = nsa310_power_off; | ||
75 | |||
76 | nsa310_gpio_request(NSA310_GPIO_USB_POWER_OFF, GPIOF_OUT_INIT_LOW, | ||
77 | "USB Power Off"); | ||
78 | } | ||
79 | |||
80 | void __init nsa310_init(void) | ||
81 | { | ||
82 | u32 dev, rev; | ||
83 | |||
84 | kirkwood_mpp_conf(nsa310_mpp_config); | ||
85 | |||
86 | nsa310_gpio_init(); | ||
87 | |||
88 | kirkwood_pcie_id(&dev, &rev); | ||
89 | |||
90 | i2c_register_board_info(0, ARRAY_AND_SIZE(nsa310_i2c_info)); | ||
91 | } | ||
92 | |||
93 | static int __init nsa310_pci_init(void) | ||
94 | { | ||
95 | if (of_machine_is_compatible("zyxel,nsa310")) | ||
96 | kirkwood_pcie_init(KW_PCIE0); | ||
97 | |||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | subsys_initcall(nsa310_pci_init); | ||
diff --git a/arch/arm/mach-kirkwood/board-openblocks_a6.c b/arch/arm/mach-kirkwood/board-openblocks_a6.c new file mode 100644 index 000000000000..815fc6451d52 --- /dev/null +++ b/arch/arm/mach-kirkwood/board-openblocks_a6.c | |||
@@ -0,0 +1,70 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | ||
3 | * | ||
4 | * arch/arm/mach-kirkwood/board-openblocks_a6.c | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/mv643xx_eth.h> | ||
14 | #include <linux/clk.h> | ||
15 | #include <linux/clk-private.h> | ||
16 | #include "common.h" | ||
17 | #include "mpp.h" | ||
18 | |||
19 | static struct mv643xx_eth_platform_data openblocks_ge00_data = { | ||
20 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | ||
21 | }; | ||
22 | |||
23 | static unsigned int openblocks_a6_mpp_config[] __initdata = { | ||
24 | MPP0_NF_IO2, | ||
25 | MPP1_NF_IO3, | ||
26 | MPP2_NF_IO4, | ||
27 | MPP3_NF_IO5, | ||
28 | MPP4_NF_IO6, | ||
29 | MPP5_NF_IO7, | ||
30 | MPP6_SYSRST_OUTn, | ||
31 | MPP8_UART1_RTS, | ||
32 | MPP9_UART1_CTS, | ||
33 | MPP10_UART0_TXD, | ||
34 | MPP11_UART0_RXD, | ||
35 | MPP13_UART1_TXD, | ||
36 | MPP14_UART1_RXD, | ||
37 | MPP15_UART0_RTS, | ||
38 | MPP16_UART0_CTS, | ||
39 | MPP18_NF_IO0, | ||
40 | MPP19_NF_IO1, | ||
41 | MPP20_GPIO, /* DIP SW0 */ | ||
42 | MPP21_GPIO, /* DIP SW1 */ | ||
43 | MPP22_GPIO, /* DIP SW2 */ | ||
44 | MPP23_GPIO, /* DIP SW3 */ | ||
45 | MPP24_GPIO, /* GPIO 0 */ | ||
46 | MPP25_GPIO, /* GPIO 1 */ | ||
47 | MPP26_GPIO, /* GPIO 2 */ | ||
48 | MPP27_GPIO, /* GPIO 3 */ | ||
49 | MPP28_GPIO, /* GPIO 4 */ | ||
50 | MPP29_GPIO, /* GPIO 5 */ | ||
51 | MPP30_GPIO, /* GPIO 6 */ | ||
52 | MPP31_GPIO, /* GPIO 7 */ | ||
53 | MPP36_TW1_SDA, | ||
54 | MPP37_TW1_SCK, | ||
55 | MPP38_GPIO, /* INIT */ | ||
56 | MPP39_GPIO, /* USB OC */ | ||
57 | MPP41_GPIO, /* LED: Red */ | ||
58 | MPP42_GPIO, /* LED: Green */ | ||
59 | MPP43_GPIO, /* LED: Yellow */ | ||
60 | 0, | ||
61 | }; | ||
62 | |||
63 | void __init openblocks_a6_init(void) | ||
64 | { | ||
65 | /* | ||
66 | * Basic setup. Needs to be called early. | ||
67 | */ | ||
68 | kirkwood_mpp_conf(openblocks_a6_mpp_config); | ||
69 | kirkwood_ge00_init(&openblocks_ge00_data); | ||
70 | } | ||
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c index f3bfedae3a20..acb0187c7ee1 100644 --- a/arch/arm/mach-kirkwood/board-ts219.c +++ b/arch/arm/mach-kirkwood/board-ts219.c | |||
@@ -23,47 +23,21 @@ | |||
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | #include <mach/kirkwood.h> | 24 | #include <mach/kirkwood.h> |
25 | #include "common.h" | 25 | #include "common.h" |
26 | #include "mpp.h" | ||
27 | #include "tsx1x-common.h" | 26 | #include "tsx1x-common.h" |
28 | 27 | ||
29 | static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = { | 28 | static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = { |
30 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | 29 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), |
31 | }; | 30 | }; |
32 | 31 | ||
33 | static unsigned int qnap_ts219_mpp_config[] __initdata = { | ||
34 | MPP0_SPI_SCn, | ||
35 | MPP1_SPI_MOSI, | ||
36 | MPP2_SPI_SCK, | ||
37 | MPP3_SPI_MISO, | ||
38 | MPP4_SATA1_ACTn, | ||
39 | MPP5_SATA0_ACTn, | ||
40 | MPP8_TW0_SDA, | ||
41 | MPP9_TW0_SCK, | ||
42 | MPP10_UART0_TXD, | ||
43 | MPP11_UART0_RXD, | ||
44 | MPP13_UART1_TXD, /* PIC controller */ | ||
45 | MPP14_UART1_RXD, /* PIC controller */ | ||
46 | MPP15_GPIO, /* USB Copy button (on devices with 88F6281) */ | ||
47 | MPP16_GPIO, /* Reset button (on devices with 88F6281) */ | ||
48 | MPP36_GPIO, /* RAM: 0: 256 MB, 1: 512 MB */ | ||
49 | MPP37_GPIO, /* Reset button (on devices with 88F6282) */ | ||
50 | MPP43_GPIO, /* USB Copy button (on devices with 88F6282) */ | ||
51 | MPP44_GPIO, /* Board ID: 0: TS-11x, 1: TS-21x */ | ||
52 | 0 | ||
53 | }; | ||
54 | |||
55 | void __init qnap_dt_ts219_init(void) | 32 | void __init qnap_dt_ts219_init(void) |
56 | { | 33 | { |
57 | u32 dev, rev; | 34 | u32 dev, rev; |
58 | 35 | ||
59 | kirkwood_mpp_conf(qnap_ts219_mpp_config); | ||
60 | |||
61 | kirkwood_pcie_id(&dev, &rev); | 36 | kirkwood_pcie_id(&dev, &rev); |
62 | if (dev == MV88F6282_DEV_ID) | 37 | if (dev == MV88F6282_DEV_ID) |
63 | qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); | 38 | qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); |
64 | 39 | ||
65 | kirkwood_ge00_init(&qnap_ts219_ge00_data); | 40 | kirkwood_ge00_init(&qnap_ts219_ge00_data); |
66 | kirkwood_ehci_init(); | ||
67 | 41 | ||
68 | pm_power_off = qnap_tsx1x_power_off; | 42 | pm_power_off = qnap_tsx1x_power_off; |
69 | } | 43 | } |
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c new file mode 100644 index 000000000000..15e69fcde9f4 --- /dev/null +++ b/arch/arm/mach-kirkwood/board-usi_topkick.c | |||
@@ -0,0 +1,81 @@ | |||
1 | /* | ||
2 | * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net> | ||
3 | * | ||
4 | * arch/arm/mach-kirkwood/board-usi_topkick.c | ||
5 | * | ||
6 | * USI Topkick Init for drivers not converted to flattened device tree yet. | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/mv643xx_eth.h> | ||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/platform_data/mmc-mvsdio.h> | ||
18 | #include "common.h" | ||
19 | #include "mpp.h" | ||
20 | |||
21 | static struct mv643xx_eth_platform_data topkick_ge00_data = { | ||
22 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | ||
23 | }; | ||
24 | |||
25 | static struct mvsdio_platform_data topkick_mvsdio_data = { | ||
26 | /* unfortunately the CD signal has not been connected */ | ||
27 | }; | ||
28 | |||
29 | /* | ||
30 | * GPIO LED layout | ||
31 | * | ||
32 | * /-SYS_LED(2) | ||
33 | * | | ||
34 | * | /-DISK_LED | ||
35 | * | | | ||
36 | * | | /-WLAN_LED(2) | ||
37 | * | | | | ||
38 | * [SW] [*] [*] [*] | ||
39 | */ | ||
40 | |||
41 | /* | ||
42 | * Switch positions | ||
43 | * | ||
44 | * /-SW_LEFT | ||
45 | * | | ||
46 | * | /-SW_IDLE | ||
47 | * | | | ||
48 | * | | /-SW_RIGHT | ||
49 | * | | | | ||
50 | * PS [L] [I] [R] LEDS | ||
51 | */ | ||
52 | |||
53 | static unsigned int topkick_mpp_config[] __initdata = { | ||
54 | MPP21_GPIO, /* DISK_LED (low active) - yellow */ | ||
55 | MPP36_GPIO, /* SATA0 power enable (high active) */ | ||
56 | MPP37_GPIO, /* SYS_LED2 (low active) - red */ | ||
57 | MPP38_GPIO, /* SYS_LED (low active) - blue */ | ||
58 | MPP39_GPIO, /* WLAN_LED (low active) - green */ | ||
59 | MPP43_GPIO, /* SW_LEFT (low active) */ | ||
60 | MPP44_GPIO, /* SW_RIGHT (low active) */ | ||
61 | MPP45_GPIO, /* SW_IDLE (low active) */ | ||
62 | MPP46_GPIO, /* SW_LEFT (low active) */ | ||
63 | MPP48_GPIO, /* WLAN_LED2 (low active) - yellow */ | ||
64 | 0 | ||
65 | }; | ||
66 | |||
67 | #define TOPKICK_SATA0_PWR_ENABLE 36 | ||
68 | |||
69 | void __init usi_topkick_init(void) | ||
70 | { | ||
71 | /* | ||
72 | * Basic setup. Needs to be called early. | ||
73 | */ | ||
74 | kirkwood_mpp_conf(topkick_mpp_config); | ||
75 | |||
76 | /* SATA0 power enable */ | ||
77 | gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1); | ||
78 | |||
79 | kirkwood_ge00_init(&topkick_ge00_data); | ||
80 | kirkwood_sdio_init(&topkick_mvsdio_data); | ||
81 | } | ||
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index f0fc25bd3ffe..5303be62b311 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c | |||
@@ -266,6 +266,7 @@ void __init kirkwood_clk_init(void) | |||
266 | orion_clkdev_add("1", "pcie", pex1); | 266 | orion_clkdev_add("1", "pcie", pex1); |
267 | orion_clkdev_add(NULL, "kirkwood-i2s", audio); | 267 | orion_clkdev_add(NULL, "kirkwood-i2s", audio); |
268 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit); | 268 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit); |
269 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit); | ||
269 | 270 | ||
270 | /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., | 271 | /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., |
271 | * so should never be gated. | 272 | * so should never be gated. |
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index 6088e9227889..5ffa57f08c80 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h | |||
@@ -113,6 +113,40 @@ void km_kirkwood_init(void); | |||
113 | static inline void km_kirkwood_init(void) {}; | 113 | static inline void km_kirkwood_init(void) {}; |
114 | #endif | 114 | #endif |
115 | 115 | ||
116 | #ifdef CONFIG_MACH_MPLCEC4_DT | ||
117 | void mplcec4_init(void); | ||
118 | #else | ||
119 | static inline void mplcec4_init(void) {}; | ||
120 | #endif | ||
121 | |||
122 | #if defined(CONFIG_MACH_INETSPACE_V2_DT) || \ | ||
123 | defined(CONFIG_MACH_NETSPACE_V2_DT) || \ | ||
124 | defined(CONFIG_MACH_NETSPACE_MAX_V2_DT) || \ | ||
125 | defined(CONFIG_MACH_NETSPACE_LITE_V2_DT) || \ | ||
126 | defined(CONFIG_MACH_NETSPACE_MINI_V2_DT) | ||
127 | void ns2_init(void); | ||
128 | #else | ||
129 | static inline void ns2_init(void) {}; | ||
130 | #endif | ||
131 | |||
132 | #ifdef CONFIG_MACH_NSA310_DT | ||
133 | void nsa310_init(void); | ||
134 | #else | ||
135 | static inline void nsa310_init(void) {}; | ||
136 | #endif | ||
137 | |||
138 | #ifdef CONFIG_MACH_OPENBLOCKS_A6_DT | ||
139 | void openblocks_a6_init(void); | ||
140 | #else | ||
141 | static inline void openblocks_a6_init(void) {}; | ||
142 | #endif | ||
143 | |||
144 | #ifdef CONFIG_MACH_TOPKICK_DT | ||
145 | void usi_topkick_init(void); | ||
146 | #else | ||
147 | static inline void usi_topkick_init(void) {}; | ||
148 | #endif | ||
149 | |||
116 | /* early init functions not converted to fdt yet */ | 150 | /* early init functions not converted to fdt yet */ |
117 | char *kirkwood_id(void); | 151 | char *kirkwood_id(void); |
118 | void kirkwood_l2_init(void); | 152 | void kirkwood_l2_init(void); |
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 4748ec551a68..98070370d602 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c | |||
@@ -100,6 +100,25 @@ static struct fb_videomode apx4devkit_video_modes[] = { | |||
100 | }, | 100 | }, |
101 | }; | 101 | }; |
102 | 102 | ||
103 | static struct fb_videomode apf28dev_video_modes[] = { | ||
104 | { | ||
105 | .name = "LW700", | ||
106 | .refresh = 60, | ||
107 | .xres = 800, | ||
108 | .yres = 480, | ||
109 | .pixclock = 30303, /* picosecond */ | ||
110 | .left_margin = 96, | ||
111 | .right_margin = 96, /* at least 3 & 1 */ | ||
112 | .upper_margin = 0x14, | ||
113 | .lower_margin = 0x15, | ||
114 | .hsync_len = 64, | ||
115 | .vsync_len = 4, | ||
116 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | | ||
117 | FB_SYNC_DATA_ENABLE_HIGH_ACT | | ||
118 | FB_SYNC_DOTCLK_FAILING_ACT, | ||
119 | }, | ||
120 | }; | ||
121 | |||
103 | static struct mxsfb_platform_data mxsfb_pdata __initdata; | 122 | static struct mxsfb_platform_data mxsfb_pdata __initdata; |
104 | 123 | ||
105 | /* | 124 | /* |
@@ -160,6 +179,7 @@ static struct sys_timer imx28_timer = { | |||
160 | enum mac_oui { | 179 | enum mac_oui { |
161 | OUI_FSL, | 180 | OUI_FSL, |
162 | OUI_DENX, | 181 | OUI_DENX, |
182 | OUI_CRYSTALFONTZ, | ||
163 | }; | 183 | }; |
164 | 184 | ||
165 | static void __init update_fec_mac_prop(enum mac_oui oui) | 185 | static void __init update_fec_mac_prop(enum mac_oui oui) |
@@ -175,8 +195,12 @@ static void __init update_fec_mac_prop(enum mac_oui oui) | |||
175 | np = of_find_compatible_node(from, NULL, "fsl,imx28-fec"); | 195 | np = of_find_compatible_node(from, NULL, "fsl,imx28-fec"); |
176 | if (!np) | 196 | if (!np) |
177 | return; | 197 | return; |
198 | |||
178 | from = np; | 199 | from = np; |
179 | 200 | ||
201 | if (of_get_property(np, "local-mac-address", NULL)) | ||
202 | continue; | ||
203 | |||
180 | newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL); | 204 | newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL); |
181 | if (!newmac) | 205 | if (!newmac) |
182 | return; | 206 | return; |
@@ -205,6 +229,11 @@ static void __init update_fec_mac_prop(enum mac_oui oui) | |||
205 | macaddr[1] = 0xe5; | 229 | macaddr[1] = 0xe5; |
206 | macaddr[2] = 0x4e; | 230 | macaddr[2] = 0x4e; |
207 | break; | 231 | break; |
232 | case OUI_CRYSTALFONTZ: | ||
233 | macaddr[0] = 0x58; | ||
234 | macaddr[1] = 0xb9; | ||
235 | macaddr[2] = 0xe1; | ||
236 | break; | ||
208 | } | 237 | } |
209 | val = ocotp[i]; | 238 | val = ocotp[i]; |
210 | macaddr[3] = (val >> 16) & 0xff; | 239 | macaddr[3] = (val >> 16) & 0xff; |
@@ -261,6 +290,11 @@ static void __init m28evk_init(void) | |||
261 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; | 290 | mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; |
262 | } | 291 | } |
263 | 292 | ||
293 | static void __init sc_sps1_init(void) | ||
294 | { | ||
295 | enable_clk_enet_out(); | ||
296 | } | ||
297 | |||
264 | static int apx4devkit_phy_fixup(struct phy_device *phy) | 298 | static int apx4devkit_phy_fixup(struct phy_device *phy) |
265 | { | 299 | { |
266 | phy->dev_flags |= MICREL_PHY_50MHZ_CLK; | 300 | phy->dev_flags |= MICREL_PHY_50MHZ_CLK; |
@@ -355,6 +389,22 @@ static void __init tx28_post_init(void) | |||
355 | pinctrl_put(pctl); | 389 | pinctrl_put(pctl); |
356 | } | 390 | } |
357 | 391 | ||
392 | static void __init cfa10049_init(void) | ||
393 | { | ||
394 | enable_clk_enet_out(); | ||
395 | update_fec_mac_prop(OUI_CRYSTALFONTZ); | ||
396 | } | ||
397 | |||
398 | static void __init apf28_init(void) | ||
399 | { | ||
400 | enable_clk_enet_out(); | ||
401 | |||
402 | mxsfb_pdata.mode_list = apf28dev_video_modes; | ||
403 | mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes); | ||
404 | mxsfb_pdata.default_bpp = 16; | ||
405 | mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT; | ||
406 | } | ||
407 | |||
358 | static void __init mxs_machine_init(void) | 408 | static void __init mxs_machine_init(void) |
359 | { | 409 | { |
360 | if (of_machine_is_compatible("fsl,imx28-evk")) | 410 | if (of_machine_is_compatible("fsl,imx28-evk")) |
@@ -365,6 +415,12 @@ static void __init mxs_machine_init(void) | |||
365 | m28evk_init(); | 415 | m28evk_init(); |
366 | else if (of_machine_is_compatible("bluegiga,apx4devkit")) | 416 | else if (of_machine_is_compatible("bluegiga,apx4devkit")) |
367 | apx4devkit_init(); | 417 | apx4devkit_init(); |
418 | else if (of_machine_is_compatible("crystalfontz,cfa10049")) | ||
419 | cfa10049_init(); | ||
420 | else if (of_machine_is_compatible("armadeus,imx28-apf28")) | ||
421 | apf28_init(); | ||
422 | else if (of_machine_is_compatible("schulercontrol,imx28-sps1")) | ||
423 | sc_sps1_init(); | ||
368 | 424 | ||
369 | of_platform_populate(NULL, of_default_bus_match_table, | 425 | of_platform_populate(NULL, of_default_bus_match_table, |
370 | mxs_auxdata_lookup, NULL); | 426 | mxs_auxdata_lookup, NULL); |
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 7c3792613392..856f4c796061 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/of_irq.h> | 29 | #include <linux/of_irq.h> |
30 | 30 | ||
31 | #include <asm/mach/time.h> | 31 | #include <asm/mach/time.h> |
32 | #include <asm/sched_clock.h> | ||
32 | #include <mach/mxs.h> | 33 | #include <mach/mxs.h> |
33 | #include <mach/common.h> | 34 | #include <mach/common.h> |
34 | 35 | ||
@@ -233,15 +234,22 @@ static struct clocksource clocksource_mxs = { | |||
233 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 234 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
234 | }; | 235 | }; |
235 | 236 | ||
237 | static u32 notrace mxs_read_sched_clock_v2(void) | ||
238 | { | ||
239 | return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1)); | ||
240 | } | ||
241 | |||
236 | static int __init mxs_clocksource_init(struct clk *timer_clk) | 242 | static int __init mxs_clocksource_init(struct clk *timer_clk) |
237 | { | 243 | { |
238 | unsigned int c = clk_get_rate(timer_clk); | 244 | unsigned int c = clk_get_rate(timer_clk); |
239 | 245 | ||
240 | if (timrot_is_v1()) | 246 | if (timrot_is_v1()) |
241 | clocksource_register_hz(&clocksource_mxs, c); | 247 | clocksource_register_hz(&clocksource_mxs, c); |
242 | else | 248 | else { |
243 | clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1), | 249 | clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1), |
244 | "mxs_timer", c, 200, 32, clocksource_mmio_readl_down); | 250 | "mxs_timer", c, 200, 32, clocksource_mmio_readl_down); |
251 | setup_sched_clock(mxs_read_sched_clock_v2, 32, c); | ||
252 | } | ||
245 | 253 | ||
246 | return 0; | 254 | return 0; |
247 | } | 255 | } |
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index aa6e4a19dd90..f0715a369c44 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -112,7 +112,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |||
112 | .init_machine = omap_generic_init, | 112 | .init_machine = omap_generic_init, |
113 | .timer = &omap3_secure_timer, | 113 | .timer = &omap3_secure_timer, |
114 | .dt_compat = omap3_gp_boards_compat, | 114 | .dt_compat = omap3_gp_boards_compat, |
115 | .restart = omap_prcm_restart, | 115 | .restart = omap3xxx_restart, |
116 | MACHINE_END | 116 | MACHINE_END |
117 | #endif | 117 | #endif |
118 | 118 | ||
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 0673f0c10432..2cb2f06c20f5 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig | |||
@@ -2,6 +2,13 @@ if ARCH_ORION5X | |||
2 | 2 | ||
3 | menu "Orion Implementations" | 3 | menu "Orion Implementations" |
4 | 4 | ||
5 | config ARCH_ORION5X_DT | ||
6 | bool "Marvell Orion5x Flattened Device Tree" | ||
7 | select USE_OF | ||
8 | help | ||
9 | Say 'Y' here if you want your kernel to support the | ||
10 | Marvell Orion5x using flattened device tree. | ||
11 | |||
5 | config MACH_DB88F5281 | 12 | config MACH_DB88F5281 |
6 | bool "Marvell Orion-2 Development Board" | 13 | bool "Marvell Orion-2 Development Board" |
7 | select I2C_BOARDINFO | 14 | select I2C_BOARDINFO |
@@ -96,12 +103,13 @@ config MACH_MV2120 | |||
96 | Say 'Y' here if you want your kernel to support the | 103 | Say 'Y' here if you want your kernel to support the |
97 | HP Media Vault mv2120 or mv5100. | 104 | HP Media Vault mv2120 or mv5100. |
98 | 105 | ||
99 | config MACH_EDMINI_V2 | 106 | config MACH_EDMINI_V2_DT |
100 | bool "LaCie Ethernet Disk mini V2" | 107 | bool "LaCie Ethernet Disk mini V2 (Flattened Device Tree)" |
101 | select I2C_BOARDINFO | 108 | select I2C_BOARDINFO |
109 | select ARCH_ORION5X_DT | ||
102 | help | 110 | help |
103 | Say 'Y' here if you want your kernel to support the | 111 | Say 'Y' here if you want your kernel to support the |
104 | LaCie Ethernet Disk mini V2. | 112 | LaCie Ethernet Disk mini V2 (Flattened Device Tree). |
105 | 113 | ||
106 | config MACH_D2NET | 114 | config MACH_D2NET |
107 | bool "LaCie d2 Network" | 115 | bool "LaCie d2 Network" |
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile index 7f18cdacd487..9e809a7c05c0 100644 --- a/arch/arm/mach-orion5x/Makefile +++ b/arch/arm/mach-orion5x/Makefile | |||
@@ -12,7 +12,6 @@ obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o | |||
12 | obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o | 12 | obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o |
13 | obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o | 13 | obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o |
14 | obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o | 14 | obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o |
15 | obj-$(CONFIG_MACH_EDMINI_V2) += edmini_v2-setup.o | ||
16 | obj-$(CONFIG_MACH_D2NET) += d2net-setup.o | 15 | obj-$(CONFIG_MACH_D2NET) += d2net-setup.o |
17 | obj-$(CONFIG_MACH_BIGDISK) += d2net-setup.o | 16 | obj-$(CONFIG_MACH_BIGDISK) += d2net-setup.o |
18 | obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o | 17 | obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o |
@@ -22,3 +21,6 @@ obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o | |||
22 | obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o | 21 | obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o |
23 | obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o | 22 | obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o |
24 | obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o | 23 | obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o |
24 | |||
25 | obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o | ||
26 | obj-$(CONFIG_MACH_EDMINI_V2_DT) += edmini_v2-setup.o | ||
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c new file mode 100644 index 000000000000..32e5c211a89b --- /dev/null +++ b/arch/arm/mach-orion5x/board-dt.c | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * Copyright 2012 (C), Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | ||
3 | * | ||
4 | * arch/arm/mach-orion5x/board-dt.c | ||
5 | * | ||
6 | * Flattened Device Tree board initialization | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/of.h> | ||
16 | #include <linux/of_platform.h> | ||
17 | #include <asm/system_misc.h> | ||
18 | #include <asm/mach/arch.h> | ||
19 | #include <mach/orion5x.h> | ||
20 | #include <plat/irq.h> | ||
21 | #include "common.h" | ||
22 | |||
23 | struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = { | ||
24 | OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), | ||
25 | OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", | ||
26 | NULL), | ||
27 | OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL), | ||
28 | OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL), | ||
29 | OF_DEV_AUXDATA("marvell,orion-crypto", 0xf1090000, "mv_crypto", NULL), | ||
30 | {}, | ||
31 | }; | ||
32 | |||
33 | static void __init orion5x_dt_init(void) | ||
34 | { | ||
35 | char *dev_name; | ||
36 | u32 dev, rev; | ||
37 | |||
38 | orion5x_id(&dev, &rev, &dev_name); | ||
39 | printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk); | ||
40 | |||
41 | /* | ||
42 | * Setup Orion address map | ||
43 | */ | ||
44 | orion5x_setup_cpu_mbus_bridge(); | ||
45 | |||
46 | /* Setup root of clk tree */ | ||
47 | clk_init(); | ||
48 | |||
49 | /* | ||
50 | * Don't issue "Wait for Interrupt" instruction if we are | ||
51 | * running on D0 5281 silicon. | ||
52 | */ | ||
53 | if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) { | ||
54 | printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n"); | ||
55 | disable_hlt(); | ||
56 | } | ||
57 | |||
58 | if (of_machine_is_compatible("lacie,ethernet-disk-mini-v2")) | ||
59 | edmini_v2_init(); | ||
60 | |||
61 | of_platform_populate(NULL, of_default_bus_match_table, | ||
62 | orion5x_auxdata_lookup, NULL); | ||
63 | } | ||
64 | |||
65 | static const char *orion5x_dt_compat[] = { | ||
66 | "marvell,orion5x", | ||
67 | NULL, | ||
68 | }; | ||
69 | |||
70 | DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)") | ||
71 | /* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */ | ||
72 | .map_io = orion5x_map_io, | ||
73 | .init_early = orion5x_init_early, | ||
74 | .init_irq = orion_dt_init_irq, | ||
75 | .timer = &orion5x_timer, | ||
76 | .init_machine = orion5x_dt_init, | ||
77 | .restart = orion5x_restart, | ||
78 | .dt_compat = orion5x_dt_compat, | ||
79 | MACHINE_END | ||
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index b3eb3da01160..550f92320afb 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c | |||
@@ -65,7 +65,7 @@ void __init orion5x_map_io(void) | |||
65 | ****************************************************************************/ | 65 | ****************************************************************************/ |
66 | static struct clk *tclk; | 66 | static struct clk *tclk; |
67 | 67 | ||
68 | static void __init clk_init(void) | 68 | void __init clk_init(void) |
69 | { | 69 | { |
70 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, | 70 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, |
71 | orion5x_tclk); | 71 | orion5x_tclk); |
@@ -236,7 +236,7 @@ struct sys_timer orion5x_timer = { | |||
236 | /* | 236 | /* |
237 | * Identify device ID and rev from PCIe configuration header space '0'. | 237 | * Identify device ID and rev from PCIe configuration header space '0'. |
238 | */ | 238 | */ |
239 | static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) | 239 | void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) |
240 | { | 240 | { |
241 | orion5x_pcie_id(dev, rev); | 241 | orion5x_pcie_id(dev, rev); |
242 | 242 | ||
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 31bab92ce038..7db5cdd9c4b7 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h | |||
@@ -12,6 +12,8 @@ void orion5x_map_io(void); | |||
12 | void orion5x_init_early(void); | 12 | void orion5x_init_early(void); |
13 | void orion5x_init_irq(void); | 13 | void orion5x_init_irq(void); |
14 | void orion5x_init(void); | 14 | void orion5x_init(void); |
15 | void orion5x_id(u32 *dev, u32 *rev, char **dev_name); | ||
16 | void clk_init(void); | ||
15 | extern int orion5x_tclk; | 17 | extern int orion5x_tclk; |
16 | extern struct sys_timer orion5x_timer; | 18 | extern struct sys_timer orion5x_timer; |
17 | 19 | ||
@@ -54,6 +56,13 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys); | |||
54 | struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); | 56 | struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); |
55 | int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | 57 | int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); |
56 | 58 | ||
59 | /* board init functions for boards not fully converted to fdt */ | ||
60 | #ifdef CONFIG_MACH_EDMINI_V2_DT | ||
61 | void edmini_v2_init(void); | ||
62 | #else | ||
63 | static inline void edmini_v2_init(void) {}; | ||
64 | #endif | ||
65 | |||
57 | struct meminfo; | 66 | struct meminfo; |
58 | struct tag; | 67 | struct tag; |
59 | extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *); | 68 | extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *); |
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c index 355e962137c7..d675e727803d 100644 --- a/arch/arm/mach-orion5x/edmini_v2-setup.c +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c | |||
@@ -115,69 +115,6 @@ static struct i2c_board_info __initdata edmini_v2_i2c_rtc = { | |||
115 | }; | 115 | }; |
116 | 116 | ||
117 | /***************************************************************************** | 117 | /***************************************************************************** |
118 | * Sata | ||
119 | ****************************************************************************/ | ||
120 | |||
121 | static struct mv_sata_platform_data edmini_v2_sata_data = { | ||
122 | .n_ports = 2, | ||
123 | }; | ||
124 | |||
125 | /***************************************************************************** | ||
126 | * GPIO LED (simple - doesn't use hardware blinking support) | ||
127 | ****************************************************************************/ | ||
128 | |||
129 | #define EDMINI_V2_GPIO_LED_POWER 16 | ||
130 | |||
131 | static struct gpio_led edmini_v2_leds[] = { | ||
132 | { | ||
133 | .name = "power:blue", | ||
134 | .gpio = EDMINI_V2_GPIO_LED_POWER, | ||
135 | .active_low = 1, | ||
136 | }, | ||
137 | }; | ||
138 | |||
139 | static struct gpio_led_platform_data edmini_v2_led_data = { | ||
140 | .num_leds = ARRAY_SIZE(edmini_v2_leds), | ||
141 | .leds = edmini_v2_leds, | ||
142 | }; | ||
143 | |||
144 | static struct platform_device edmini_v2_gpio_leds = { | ||
145 | .name = "leds-gpio", | ||
146 | .id = -1, | ||
147 | .dev = { | ||
148 | .platform_data = &edmini_v2_led_data, | ||
149 | }, | ||
150 | }; | ||
151 | |||
152 | /**************************************************************************** | ||
153 | * GPIO key | ||
154 | ****************************************************************************/ | ||
155 | |||
156 | #define EDMINI_V2_GPIO_KEY_POWER 18 | ||
157 | |||
158 | static struct gpio_keys_button edmini_v2_buttons[] = { | ||
159 | { | ||
160 | .code = KEY_POWER, | ||
161 | .gpio = EDMINI_V2_GPIO_KEY_POWER, | ||
162 | .desc = "Power Button", | ||
163 | .active_low = 0, | ||
164 | }, | ||
165 | }; | ||
166 | |||
167 | static struct gpio_keys_platform_data edmini_v2_button_data = { | ||
168 | .buttons = edmini_v2_buttons, | ||
169 | .nbuttons = ARRAY_SIZE(edmini_v2_buttons), | ||
170 | }; | ||
171 | |||
172 | static struct platform_device edmini_v2_gpio_buttons = { | ||
173 | .name = "gpio-keys", | ||
174 | .id = -1, | ||
175 | .dev = { | ||
176 | .platform_data = &edmini_v2_button_data, | ||
177 | }, | ||
178 | }; | ||
179 | |||
180 | /***************************************************************************** | ||
181 | * General Setup | 118 | * General Setup |
182 | ****************************************************************************/ | 119 | ****************************************************************************/ |
183 | static unsigned int edminiv2_mpp_modes[] __initdata = { | 120 | static unsigned int edminiv2_mpp_modes[] __initdata = { |
@@ -207,13 +144,8 @@ static unsigned int edminiv2_mpp_modes[] __initdata = { | |||
207 | 0, | 144 | 0, |
208 | }; | 145 | }; |
209 | 146 | ||
210 | static void __init edmini_v2_init(void) | 147 | void __init edmini_v2_init(void) |
211 | { | 148 | { |
212 | /* | ||
213 | * Setup basic Orion functions. Need to be called early. | ||
214 | */ | ||
215 | orion5x_init(); | ||
216 | |||
217 | orion5x_mpp_conf(edminiv2_mpp_modes); | 149 | orion5x_mpp_conf(edminiv2_mpp_modes); |
218 | 150 | ||
219 | /* | 151 | /* |
@@ -221,15 +153,10 @@ static void __init edmini_v2_init(void) | |||
221 | */ | 153 | */ |
222 | orion5x_ehci0_init(); | 154 | orion5x_ehci0_init(); |
223 | orion5x_eth_init(&edmini_v2_eth_data); | 155 | orion5x_eth_init(&edmini_v2_eth_data); |
224 | orion5x_i2c_init(); | ||
225 | orion5x_sata_init(&edmini_v2_sata_data); | ||
226 | orion5x_uart0_init(); | ||
227 | 156 | ||
228 | orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE, | 157 | orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE, |
229 | EDMINI_V2_NOR_BOOT_SIZE); | 158 | EDMINI_V2_NOR_BOOT_SIZE); |
230 | platform_device_register(&edmini_v2_nor_flash); | 159 | platform_device_register(&edmini_v2_nor_flash); |
231 | platform_device_register(&edmini_v2_gpio_leds); | ||
232 | platform_device_register(&edmini_v2_gpio_buttons); | ||
233 | 160 | ||
234 | pr_notice("edmini_v2: USB device port, flash write and power-off " | 161 | pr_notice("edmini_v2: USB device port, flash write and power-off " |
235 | "are not yet supported.\n"); | 162 | "are not yet supported.\n"); |
@@ -247,16 +174,3 @@ static void __init edmini_v2_init(void) | |||
247 | 174 | ||
248 | i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1); | 175 | i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1); |
249 | } | 176 | } |
250 | |||
251 | /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ | ||
252 | MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") | ||
253 | /* Maintainer: Christopher Moore <moore@free.fr> */ | ||
254 | .atag_offset = 0x100, | ||
255 | .init_machine = edmini_v2_init, | ||
256 | .map_io = orion5x_map_io, | ||
257 | .init_early = orion5x_init_early, | ||
258 | .init_irq = orion5x_init_irq, | ||
259 | .timer = &orion5x_timer, | ||
260 | .fixup = tag_fixup_mem32, | ||
261 | .restart = orion5x_restart, | ||
262 | MACHINE_END | ||
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 9aa653b3eb32..6cc23cc83509 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile | |||
@@ -12,10 +12,12 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle.o | |||
12 | obj-$(CONFIG_CPU_IDLE) += sleep.o | 12 | obj-$(CONFIG_CPU_IDLE) += sleep.o |
13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks.o | 13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks.o |
14 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks_data.o | 14 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks_data.o |
15 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o | ||
15 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o | 16 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o |
16 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-t20.o | 17 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-t20.o |
17 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o | 18 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o |
18 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks_data.o | 19 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks_data.o |
20 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_speedo.o | ||
19 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-t30.o | 21 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-t30.o |
20 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | 22 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
21 | obj-$(CONFIG_SMP) += reset.o | 23 | obj-$(CONFIG_SMP) += reset.o |
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 71569c01afd2..734d9cc87f2e 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c | |||
@@ -89,6 +89,17 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { | |||
89 | &tegra_ehci3_pdata), | 89 | &tegra_ehci3_pdata), |
90 | OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL), | 90 | OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL), |
91 | OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), | 91 | OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), |
92 | OF_DEV_AUXDATA("nvidia,tegra20-sflash", 0x7000c380, "spi", NULL), | ||
93 | OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D400, "spi_tegra.0", NULL), | ||
94 | OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL), | ||
95 | OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL), | ||
96 | OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL), | ||
97 | OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", NULL), | ||
98 | OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54200000, "tegradc.0", NULL), | ||
99 | OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54240000, "tegradc.1", NULL), | ||
100 | OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x54280000, "hdmi", NULL), | ||
101 | OF_DEV_AUXDATA("nvidia,tegra20-dsi", 0x54300000, "dsi", NULL), | ||
102 | OF_DEV_AUXDATA("nvidia,tegra20-tvo", 0x542c0000, "tvo", NULL), | ||
92 | {} | 103 | {} |
93 | }; | 104 | }; |
94 | 105 | ||
@@ -102,8 +113,20 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { | |||
102 | { "pll_a", "pll_p_out1", 56448000, true }, | 113 | { "pll_a", "pll_p_out1", 56448000, true }, |
103 | { "pll_a_out0", "pll_a", 11289600, true }, | 114 | { "pll_a_out0", "pll_a", 11289600, true }, |
104 | { "cdev1", NULL, 0, true }, | 115 | { "cdev1", NULL, 0, true }, |
116 | { "blink", "clk_32k", 32768, true }, | ||
105 | { "i2s1", "pll_a_out0", 11289600, false}, | 117 | { "i2s1", "pll_a_out0", 11289600, false}, |
106 | { "i2s2", "pll_a_out0", 11289600, false}, | 118 | { "i2s2", "pll_a_out0", 11289600, false}, |
119 | { "sdmmc1", "pll_p", 48000000, false}, | ||
120 | { "sdmmc3", "pll_p", 48000000, false}, | ||
121 | { "sdmmc4", "pll_p", 48000000, false}, | ||
122 | { "spi", "pll_p", 20000000, false }, | ||
123 | { "sbc1", "pll_p", 100000000, false }, | ||
124 | { "sbc2", "pll_p", 100000000, false }, | ||
125 | { "sbc3", "pll_p", 100000000, false }, | ||
126 | { "sbc4", "pll_p", 100000000, false }, | ||
127 | { "host1x", "pll_c", 150000000, false }, | ||
128 | { "disp1", "pll_p", 600000000, false }, | ||
129 | { "disp2", "pll_p", 600000000, false }, | ||
107 | { NULL, NULL, 0, 0}, | 130 | { NULL, NULL, 0, 0}, |
108 | }; | 131 | }; |
109 | 132 | ||
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index e56170393a5b..6497d1236b08 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c | |||
@@ -51,6 +51,18 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { | |||
51 | OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), | 51 | OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), |
52 | OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), | 52 | OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), |
53 | OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), | 53 | OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), |
54 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D400, "spi_tegra.0", NULL), | ||
55 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D600, "spi_tegra.1", NULL), | ||
56 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D800, "spi_tegra.2", NULL), | ||
57 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL), | ||
58 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL), | ||
59 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL), | ||
60 | OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "host1x", NULL), | ||
61 | OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegradc.0", NULL), | ||
62 | OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegradc.1", NULL), | ||
63 | OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "hdmi", NULL), | ||
64 | OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "dsi", NULL), | ||
65 | OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tvo", NULL), | ||
54 | {} | 66 | {} |
55 | }; | 67 | }; |
56 | 68 | ||
@@ -61,11 +73,24 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { | |||
61 | { "pll_a_out0", "pll_a", 11289600, true }, | 73 | { "pll_a_out0", "pll_a", 11289600, true }, |
62 | { "extern1", "pll_a_out0", 0, true }, | 74 | { "extern1", "pll_a_out0", 0, true }, |
63 | { "clk_out_1", "extern1", 0, true }, | 75 | { "clk_out_1", "extern1", 0, true }, |
76 | { "blink", "clk_32k", 32768, true }, | ||
64 | { "i2s0", "pll_a_out0", 11289600, false}, | 77 | { "i2s0", "pll_a_out0", 11289600, false}, |
65 | { "i2s1", "pll_a_out0", 11289600, false}, | 78 | { "i2s1", "pll_a_out0", 11289600, false}, |
66 | { "i2s2", "pll_a_out0", 11289600, false}, | 79 | { "i2s2", "pll_a_out0", 11289600, false}, |
67 | { "i2s3", "pll_a_out0", 11289600, false}, | 80 | { "i2s3", "pll_a_out0", 11289600, false}, |
68 | { "i2s4", "pll_a_out0", 11289600, false}, | 81 | { "i2s4", "pll_a_out0", 11289600, false}, |
82 | { "sdmmc1", "pll_p", 48000000, false}, | ||
83 | { "sdmmc3", "pll_p", 48000000, false}, | ||
84 | { "sdmmc4", "pll_p", 48000000, false}, | ||
85 | { "sbc1", "pll_p", 100000000, false}, | ||
86 | { "sbc2", "pll_p", 100000000, false}, | ||
87 | { "sbc3", "pll_p", 100000000, false}, | ||
88 | { "sbc4", "pll_p", 100000000, false}, | ||
89 | { "sbc5", "pll_p", 100000000, false}, | ||
90 | { "sbc6", "pll_p", 100000000, false}, | ||
91 | { "host1x", "pll_c", 150000000, false}, | ||
92 | { "disp1", "pll_p", 600000000, false}, | ||
93 | { "disp2", "pll_p", 600000000, false}, | ||
69 | { NULL, NULL, 0, 0}, | 94 | { NULL, NULL, 0, 0}, |
70 | }; | 95 | }; |
71 | 96 | ||
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index f688daa74978..3e03e5f15c14 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -104,25 +104,26 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { | |||
104 | { "clk_m", NULL, 0, true }, | 104 | { "clk_m", NULL, 0, true }, |
105 | { "pll_p", "clk_m", 408000000, true }, | 105 | { "pll_p", "clk_m", 408000000, true }, |
106 | { "pll_p_out1", "pll_p", 9600000, true }, | 106 | { "pll_p_out1", "pll_p", 9600000, true }, |
107 | { "pll_p_out4", "pll_p", 102000000, true }, | ||
108 | { "sclk", "pll_p_out4", 102000000, true }, | ||
109 | { "hclk", "sclk", 102000000, true }, | ||
110 | { "pclk", "hclk", 51000000, true }, | ||
107 | { NULL, NULL, 0, 0}, | 111 | { NULL, NULL, 0, 0}, |
108 | }; | 112 | }; |
109 | #endif | 113 | #endif |
110 | 114 | ||
111 | 115 | ||
112 | static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) | 116 | static void __init tegra_init_cache(void) |
113 | { | 117 | { |
114 | #ifdef CONFIG_CACHE_L2X0 | 118 | #ifdef CONFIG_CACHE_L2X0 |
115 | void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; | 119 | void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; |
116 | u32 aux_ctrl, cache_type; | 120 | u32 aux_ctrl, cache_type; |
117 | 121 | ||
118 | writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL); | ||
119 | writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL); | ||
120 | |||
121 | cache_type = readl(p + L2X0_CACHE_TYPE); | 122 | cache_type = readl(p + L2X0_CACHE_TYPE); |
122 | aux_ctrl = (cache_type & 0x700) << (17-8); | 123 | aux_ctrl = (cache_type & 0x700) << (17-8); |
123 | aux_ctrl |= 0x6C000001; | 124 | aux_ctrl |= 0x7C400001; |
124 | 125 | ||
125 | l2x0_init(p, aux_ctrl, 0x8200c3fe); | 126 | l2x0_of_init(aux_ctrl, 0x8200c3fe); |
126 | #endif | 127 | #endif |
127 | 128 | ||
128 | } | 129 | } |
@@ -134,7 +135,7 @@ void __init tegra20_init_early(void) | |||
134 | tegra_init_fuse(); | 135 | tegra_init_fuse(); |
135 | tegra2_init_clocks(); | 136 | tegra2_init_clocks(); |
136 | tegra_clk_init_from_table(tegra20_clk_init_table); | 137 | tegra_clk_init_from_table(tegra20_clk_init_table); |
137 | tegra_init_cache(0x331, 0x441); | 138 | tegra_init_cache(); |
138 | tegra_pmc_init(); | 139 | tegra_pmc_init(); |
139 | tegra_powergate_init(); | 140 | tegra_powergate_init(); |
140 | tegra20_hotplug_init(); | 141 | tegra20_hotplug_init(); |
@@ -147,7 +148,7 @@ void __init tegra30_init_early(void) | |||
147 | tegra_init_fuse(); | 148 | tegra_init_fuse(); |
148 | tegra30_init_clocks(); | 149 | tegra30_init_clocks(); |
149 | tegra_clk_init_from_table(tegra30_clk_init_table); | 150 | tegra_clk_init_from_table(tegra30_clk_init_table); |
150 | tegra_init_cache(0x441, 0x551); | 151 | tegra_init_cache(); |
151 | tegra_pmc_init(); | 152 | tegra_pmc_init(); |
152 | tegra_powergate_init(); | 153 | tegra_powergate_init(); |
153 | tegra30_hotplug_init(); | 154 | tegra30_hotplug_init(); |
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 6c752e8f1f06..8121742711fe 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c | |||
@@ -28,14 +28,21 @@ | |||
28 | #define FUSE_UID_LOW 0x108 | 28 | #define FUSE_UID_LOW 0x108 |
29 | #define FUSE_UID_HIGH 0x10c | 29 | #define FUSE_UID_HIGH 0x10c |
30 | #define FUSE_SKU_INFO 0x110 | 30 | #define FUSE_SKU_INFO 0x110 |
31 | #define FUSE_SPARE_BIT 0x200 | 31 | |
32 | #define TEGRA20_FUSE_SPARE_BIT 0x200 | ||
33 | #define TEGRA30_FUSE_SPARE_BIT 0x244 | ||
32 | 34 | ||
33 | int tegra_sku_id; | 35 | int tegra_sku_id; |
34 | int tegra_cpu_process_id; | 36 | int tegra_cpu_process_id; |
35 | int tegra_core_process_id; | 37 | int tegra_core_process_id; |
36 | int tegra_chip_id; | 38 | int tegra_chip_id; |
39 | int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */ | ||
40 | int tegra_soc_speedo_id; | ||
37 | enum tegra_revision tegra_revision; | 41 | enum tegra_revision tegra_revision; |
38 | 42 | ||
43 | static int tegra_fuse_spare_bit; | ||
44 | static void (*tegra_init_speedo_data)(void); | ||
45 | |||
39 | /* The BCT to use at boot is specified by board straps that can be read | 46 | /* The BCT to use at boot is specified by board straps that can be read |
40 | * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs. | 47 | * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs. |
41 | */ | 48 | */ |
@@ -56,14 +63,14 @@ static const char *tegra_revision_name[TEGRA_REVISION_MAX] = { | |||
56 | [TEGRA_REVISION_A04] = "A04", | 63 | [TEGRA_REVISION_A04] = "A04", |
57 | }; | 64 | }; |
58 | 65 | ||
59 | static inline u32 tegra_fuse_readl(unsigned long offset) | 66 | u32 tegra_fuse_readl(unsigned long offset) |
60 | { | 67 | { |
61 | return tegra_apb_readl(TEGRA_FUSE_BASE + offset); | 68 | return tegra_apb_readl(TEGRA_FUSE_BASE + offset); |
62 | } | 69 | } |
63 | 70 | ||
64 | static inline bool get_spare_fuse(int bit) | 71 | bool tegra_spare_fuse(int bit) |
65 | { | 72 | { |
66 | return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4); | 73 | return tegra_fuse_readl(tegra_fuse_spare_bit + bit * 4); |
67 | } | 74 | } |
68 | 75 | ||
69 | static enum tegra_revision tegra_get_revision(u32 id) | 76 | static enum tegra_revision tegra_get_revision(u32 id) |
@@ -77,7 +84,7 @@ static enum tegra_revision tegra_get_revision(u32 id) | |||
77 | return TEGRA_REVISION_A02; | 84 | return TEGRA_REVISION_A02; |
78 | case 3: | 85 | case 3: |
79 | if (tegra_chip_id == TEGRA20 && | 86 | if (tegra_chip_id == TEGRA20 && |
80 | (get_spare_fuse(18) || get_spare_fuse(19))) | 87 | (tegra_spare_fuse(18) || tegra_spare_fuse(19))) |
81 | return TEGRA_REVISION_A03p; | 88 | return TEGRA_REVISION_A03p; |
82 | else | 89 | else |
83 | return TEGRA_REVISION_A03; | 90 | return TEGRA_REVISION_A03; |
@@ -88,6 +95,16 @@ static enum tegra_revision tegra_get_revision(u32 id) | |||
88 | } | 95 | } |
89 | } | 96 | } |
90 | 97 | ||
98 | static void tegra_get_process_id(void) | ||
99 | { | ||
100 | u32 reg; | ||
101 | |||
102 | reg = tegra_fuse_readl(tegra_fuse_spare_bit); | ||
103 | tegra_cpu_process_id = (reg >> 6) & 3; | ||
104 | reg = tegra_fuse_readl(tegra_fuse_spare_bit); | ||
105 | tegra_core_process_id = (reg >> 12) & 3; | ||
106 | } | ||
107 | |||
91 | void tegra_init_fuse(void) | 108 | void tegra_init_fuse(void) |
92 | { | 109 | { |
93 | u32 id; | 110 | u32 id; |
@@ -99,19 +116,29 @@ void tegra_init_fuse(void) | |||
99 | reg = tegra_fuse_readl(FUSE_SKU_INFO); | 116 | reg = tegra_fuse_readl(FUSE_SKU_INFO); |
100 | tegra_sku_id = reg & 0xFF; | 117 | tegra_sku_id = reg & 0xFF; |
101 | 118 | ||
102 | reg = tegra_fuse_readl(FUSE_SPARE_BIT); | ||
103 | tegra_cpu_process_id = (reg >> 6) & 3; | ||
104 | |||
105 | reg = tegra_fuse_readl(FUSE_SPARE_BIT); | ||
106 | tegra_core_process_id = (reg >> 12) & 3; | ||
107 | |||
108 | reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); | 119 | reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); |
109 | tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; | 120 | tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; |
110 | 121 | ||
111 | id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); | 122 | id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); |
112 | tegra_chip_id = (id >> 8) & 0xff; | 123 | tegra_chip_id = (id >> 8) & 0xff; |
113 | 124 | ||
125 | switch (tegra_chip_id) { | ||
126 | case TEGRA20: | ||
127 | tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT; | ||
128 | tegra_init_speedo_data = &tegra20_init_speedo_data; | ||
129 | break; | ||
130 | case TEGRA30: | ||
131 | tegra_fuse_spare_bit = TEGRA30_FUSE_SPARE_BIT; | ||
132 | tegra_init_speedo_data = &tegra30_init_speedo_data; | ||
133 | break; | ||
134 | default: | ||
135 | pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id); | ||
136 | tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT; | ||
137 | tegra_init_speedo_data = &tegra_get_process_id; | ||
138 | } | ||
139 | |||
114 | tegra_revision = tegra_get_revision(id); | 140 | tegra_revision = tegra_get_revision(id); |
141 | tegra_init_speedo_data(); | ||
115 | 142 | ||
116 | pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", | 143 | pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", |
117 | tegra_revision_name[tegra_revision], | 144 | tegra_revision_name[tegra_revision], |
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h index d2107b2cb85a..ff1383dd61a7 100644 --- a/arch/arm/mach-tegra/fuse.h +++ b/arch/arm/mach-tegra/fuse.h | |||
@@ -42,11 +42,27 @@ extern int tegra_sku_id; | |||
42 | extern int tegra_cpu_process_id; | 42 | extern int tegra_cpu_process_id; |
43 | extern int tegra_core_process_id; | 43 | extern int tegra_core_process_id; |
44 | extern int tegra_chip_id; | 44 | extern int tegra_chip_id; |
45 | extern int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */ | ||
46 | extern int tegra_soc_speedo_id; | ||
45 | extern enum tegra_revision tegra_revision; | 47 | extern enum tegra_revision tegra_revision; |
46 | 48 | ||
47 | extern int tegra_bct_strapping; | 49 | extern int tegra_bct_strapping; |
48 | 50 | ||
49 | unsigned long long tegra_chip_uid(void); | 51 | unsigned long long tegra_chip_uid(void); |
50 | void tegra_init_fuse(void); | 52 | void tegra_init_fuse(void); |
53 | bool tegra_spare_fuse(int bit); | ||
54 | u32 tegra_fuse_readl(unsigned long offset); | ||
55 | |||
56 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | ||
57 | void tegra20_init_speedo_data(void); | ||
58 | #else | ||
59 | static inline void tegra20_init_speedo_data(void) {} | ||
60 | #endif | ||
61 | |||
62 | #ifdef CONFIG_ARCH_TEGRA_3x_SOC | ||
63 | void tegra30_init_speedo_data(void); | ||
64 | #else | ||
65 | static inline void tegra30_init_speedo_data(void) {} | ||
66 | #endif | ||
51 | 67 | ||
52 | #endif | 68 | #endif |
diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c index 9615ee39c353..a23a0734e352 100644 --- a/arch/arm/mach-tegra/tegra20_clocks_data.c +++ b/arch/arm/mach-tegra/tegra20_clocks_data.c | |||
@@ -246,11 +246,16 @@ static struct clk_pll_freq_table tegra_pll_d_freq_table[] = { | |||
246 | { 19200000, 216000000, 135, 12, 1, 3}, | 246 | { 19200000, 216000000, 135, 12, 1, 3}, |
247 | { 26000000, 216000000, 216, 26, 1, 4}, | 247 | { 26000000, 216000000, 216, 26, 1, 4}, |
248 | 248 | ||
249 | { 12000000, 297000000, 99, 4, 1, 4 }, | ||
250 | { 12000000, 339000000, 113, 4, 1, 4 }, | ||
251 | |||
249 | { 12000000, 594000000, 594, 12, 1, 8}, | 252 | { 12000000, 594000000, 594, 12, 1, 8}, |
250 | { 13000000, 594000000, 594, 13, 1, 8}, | 253 | { 13000000, 594000000, 594, 13, 1, 8}, |
251 | { 19200000, 594000000, 495, 16, 1, 8}, | 254 | { 19200000, 594000000, 495, 16, 1, 8}, |
252 | { 26000000, 594000000, 594, 26, 1, 8}, | 255 | { 26000000, 594000000, 594, 26, 1, 8}, |
253 | 256 | ||
257 | { 12000000, 616000000, 616, 12, 1, 8}, | ||
258 | |||
254 | { 12000000, 1000000000, 1000, 12, 1, 12}, | 259 | { 12000000, 1000000000, 1000, 12, 1, 12}, |
255 | { 13000000, 1000000000, 1000, 13, 1, 12}, | 260 | { 13000000, 1000000000, 1000, 13, 1, 12}, |
256 | { 19200000, 1000000000, 625, 12, 1, 8}, | 261 | { 19200000, 1000000000, 625, 12, 1, 8}, |
@@ -1036,9 +1041,6 @@ static struct clk_duplicate tegra_clk_duplicates[] = { | |||
1036 | CLK_DUPLICATE("usbd", "utmip-pad", NULL), | 1041 | CLK_DUPLICATE("usbd", "utmip-pad", NULL), |
1037 | CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), | 1042 | CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), |
1038 | CLK_DUPLICATE("usbd", "tegra-otg", NULL), | 1043 | CLK_DUPLICATE("usbd", "tegra-otg", NULL), |
1039 | CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"), | ||
1040 | CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), | ||
1041 | CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"), | ||
1042 | CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"), | 1044 | CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"), |
1043 | CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"), | 1045 | CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"), |
1044 | CLK_DUPLICATE("epp", "tegra_grhost", "epp"), | 1046 | CLK_DUPLICATE("epp", "tegra_grhost", "epp"), |
@@ -1051,6 +1053,9 @@ static struct clk_duplicate tegra_clk_duplicates[] = { | |||
1051 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.1", "fast-clk"), | 1053 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.1", "fast-clk"), |
1052 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"), | 1054 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"), |
1053 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"), | 1055 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"), |
1056 | CLK_DUPLICATE("pll_p", "tegradc.0", "parent"), | ||
1057 | CLK_DUPLICATE("pll_p", "tegradc.1", "parent"), | ||
1058 | CLK_DUPLICATE("pll_d_out0", "hdmi", "parent"), | ||
1054 | }; | 1059 | }; |
1055 | 1060 | ||
1056 | #define CLK(dev, con, ck) \ | 1061 | #define CLK(dev, con, ck) \ |
diff --git a/arch/arm/mach-tegra/tegra20_speedo.c b/arch/arm/mach-tegra/tegra20_speedo.c new file mode 100644 index 000000000000..fa6eb570623f --- /dev/null +++ b/arch/arm/mach-tegra/tegra20_speedo.c | |||
@@ -0,0 +1,109 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/bug.h> | ||
19 | |||
20 | #include "fuse.h" | ||
21 | |||
22 | #define CPU_SPEEDO_LSBIT 20 | ||
23 | #define CPU_SPEEDO_MSBIT 29 | ||
24 | #define CPU_SPEEDO_REDUND_LSBIT 30 | ||
25 | #define CPU_SPEEDO_REDUND_MSBIT 39 | ||
26 | #define CPU_SPEEDO_REDUND_OFFS (CPU_SPEEDO_REDUND_MSBIT - CPU_SPEEDO_MSBIT) | ||
27 | |||
28 | #define CORE_SPEEDO_LSBIT 40 | ||
29 | #define CORE_SPEEDO_MSBIT 47 | ||
30 | #define CORE_SPEEDO_REDUND_LSBIT 48 | ||
31 | #define CORE_SPEEDO_REDUND_MSBIT 55 | ||
32 | #define CORE_SPEEDO_REDUND_OFFS (CORE_SPEEDO_REDUND_MSBIT - CORE_SPEEDO_MSBIT) | ||
33 | |||
34 | #define SPEEDO_MULT 4 | ||
35 | |||
36 | #define PROCESS_CORNERS_NUM 4 | ||
37 | |||
38 | #define SPEEDO_ID_SELECT_0(rev) ((rev) <= 2) | ||
39 | #define SPEEDO_ID_SELECT_1(sku) \ | ||
40 | (((sku) != 20) && ((sku) != 23) && ((sku) != 24) && \ | ||
41 | ((sku) != 27) && ((sku) != 28)) | ||
42 | |||
43 | enum { | ||
44 | SPEEDO_ID_0, | ||
45 | SPEEDO_ID_1, | ||
46 | SPEEDO_ID_2, | ||
47 | SPEEDO_ID_COUNT, | ||
48 | }; | ||
49 | |||
50 | static const u32 cpu_process_speedos[][PROCESS_CORNERS_NUM] = { | ||
51 | {315, 366, 420, UINT_MAX}, | ||
52 | {303, 368, 419, UINT_MAX}, | ||
53 | {316, 331, 383, UINT_MAX}, | ||
54 | }; | ||
55 | |||
56 | static const u32 core_process_speedos[][PROCESS_CORNERS_NUM] = { | ||
57 | {165, 195, 224, UINT_MAX}, | ||
58 | {165, 195, 224, UINT_MAX}, | ||
59 | {165, 195, 224, UINT_MAX}, | ||
60 | }; | ||
61 | |||
62 | void tegra20_init_speedo_data(void) | ||
63 | { | ||
64 | u32 reg; | ||
65 | u32 val; | ||
66 | int i; | ||
67 | |||
68 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != SPEEDO_ID_COUNT); | ||
69 | BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != SPEEDO_ID_COUNT); | ||
70 | |||
71 | if (SPEEDO_ID_SELECT_0(tegra_revision)) | ||
72 | tegra_soc_speedo_id = SPEEDO_ID_0; | ||
73 | else if (SPEEDO_ID_SELECT_1(tegra_sku_id)) | ||
74 | tegra_soc_speedo_id = SPEEDO_ID_1; | ||
75 | else | ||
76 | tegra_soc_speedo_id = SPEEDO_ID_2; | ||
77 | |||
78 | val = 0; | ||
79 | for (i = CPU_SPEEDO_MSBIT; i >= CPU_SPEEDO_LSBIT; i--) { | ||
80 | reg = tegra_spare_fuse(i) | | ||
81 | tegra_spare_fuse(i + CPU_SPEEDO_REDUND_OFFS); | ||
82 | val = (val << 1) | (reg & 0x1); | ||
83 | } | ||
84 | val = val * SPEEDO_MULT; | ||
85 | pr_debug("%s CPU speedo value %u\n", __func__, val); | ||
86 | |||
87 | for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) { | ||
88 | if (val <= cpu_process_speedos[tegra_soc_speedo_id][i]) | ||
89 | break; | ||
90 | } | ||
91 | tegra_cpu_process_id = i; | ||
92 | |||
93 | val = 0; | ||
94 | for (i = CORE_SPEEDO_MSBIT; i >= CORE_SPEEDO_LSBIT; i--) { | ||
95 | reg = tegra_spare_fuse(i) | | ||
96 | tegra_spare_fuse(i + CORE_SPEEDO_REDUND_OFFS); | ||
97 | val = (val << 1) | (reg & 0x1); | ||
98 | } | ||
99 | val = val * SPEEDO_MULT; | ||
100 | pr_debug("%s Core speedo value %u\n", __func__, val); | ||
101 | |||
102 | for (i = 0; i < (PROCESS_CORNERS_NUM - 1); i++) { | ||
103 | if (val <= core_process_speedos[tegra_soc_speedo_id][i]) | ||
104 | break; | ||
105 | } | ||
106 | tegra_core_process_id = i; | ||
107 | |||
108 | pr_info("Tegra20 Soc Speedo ID %d", tegra_soc_speedo_id); | ||
109 | } | ||
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index 000239d68393..f5b453f4bf4d 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c | |||
@@ -791,6 +791,112 @@ struct clk_ops tegra30_twd_ops = { | |||
791 | .recalc_rate = tegra30_twd_clk_recalc_rate, | 791 | .recalc_rate = tegra30_twd_clk_recalc_rate, |
792 | }; | 792 | }; |
793 | 793 | ||
794 | /* bus clock functions */ | ||
795 | static int tegra30_bus_clk_is_enabled(struct clk_hw *hw) | ||
796 | { | ||
797 | struct clk_tegra *c = to_clk_tegra(hw); | ||
798 | u32 val = clk_readl(c->reg); | ||
799 | |||
800 | c->state = ((val >> c->reg_shift) & BUS_CLK_DISABLE) ? OFF : ON; | ||
801 | return c->state; | ||
802 | } | ||
803 | |||
804 | static int tegra30_bus_clk_enable(struct clk_hw *hw) | ||
805 | { | ||
806 | struct clk_tegra *c = to_clk_tegra(hw); | ||
807 | u32 val; | ||
808 | |||
809 | val = clk_readl(c->reg); | ||
810 | val &= ~(BUS_CLK_DISABLE << c->reg_shift); | ||
811 | clk_writel(val, c->reg); | ||
812 | |||
813 | return 0; | ||
814 | } | ||
815 | |||
816 | static void tegra30_bus_clk_disable(struct clk_hw *hw) | ||
817 | { | ||
818 | struct clk_tegra *c = to_clk_tegra(hw); | ||
819 | u32 val; | ||
820 | |||
821 | val = clk_readl(c->reg); | ||
822 | val |= BUS_CLK_DISABLE << c->reg_shift; | ||
823 | clk_writel(val, c->reg); | ||
824 | } | ||
825 | |||
826 | static unsigned long tegra30_bus_clk_recalc_rate(struct clk_hw *hw, | ||
827 | unsigned long prate) | ||
828 | { | ||
829 | struct clk_tegra *c = to_clk_tegra(hw); | ||
830 | u32 val = clk_readl(c->reg); | ||
831 | u64 rate = prate; | ||
832 | |||
833 | c->div = ((val >> c->reg_shift) & BUS_CLK_DIV_MASK) + 1; | ||
834 | c->mul = 1; | ||
835 | |||
836 | if (c->mul != 0 && c->div != 0) { | ||
837 | rate *= c->mul; | ||
838 | rate += c->div - 1; /* round up */ | ||
839 | do_div(rate, c->div); | ||
840 | } | ||
841 | return rate; | ||
842 | } | ||
843 | |||
844 | static int tegra30_bus_clk_set_rate(struct clk_hw *hw, unsigned long rate, | ||
845 | unsigned long parent_rate) | ||
846 | { | ||
847 | struct clk_tegra *c = to_clk_tegra(hw); | ||
848 | int ret = -EINVAL; | ||
849 | u32 val; | ||
850 | int i; | ||
851 | |||
852 | val = clk_readl(c->reg); | ||
853 | for (i = 1; i <= 4; i++) { | ||
854 | if (rate == parent_rate / i) { | ||
855 | val &= ~(BUS_CLK_DIV_MASK << c->reg_shift); | ||
856 | val |= (i - 1) << c->reg_shift; | ||
857 | clk_writel(val, c->reg); | ||
858 | c->div = i; | ||
859 | c->mul = 1; | ||
860 | ret = 0; | ||
861 | break; | ||
862 | } | ||
863 | } | ||
864 | |||
865 | return ret; | ||
866 | } | ||
867 | |||
868 | static long tegra30_bus_clk_round_rate(struct clk_hw *hw, unsigned long rate, | ||
869 | unsigned long *prate) | ||
870 | { | ||
871 | unsigned long parent_rate = *prate; | ||
872 | s64 divider; | ||
873 | |||
874 | if (rate >= parent_rate) | ||
875 | return parent_rate; | ||
876 | |||
877 | divider = parent_rate; | ||
878 | divider += rate - 1; | ||
879 | do_div(divider, rate); | ||
880 | |||
881 | if (divider < 0) | ||
882 | return divider; | ||
883 | |||
884 | if (divider > 4) | ||
885 | divider = 4; | ||
886 | do_div(parent_rate, divider); | ||
887 | |||
888 | return parent_rate; | ||
889 | } | ||
890 | |||
891 | struct clk_ops tegra30_bus_ops = { | ||
892 | .is_enabled = tegra30_bus_clk_is_enabled, | ||
893 | .enable = tegra30_bus_clk_enable, | ||
894 | .disable = tegra30_bus_clk_disable, | ||
895 | .set_rate = tegra30_bus_clk_set_rate, | ||
896 | .round_rate = tegra30_bus_clk_round_rate, | ||
897 | .recalc_rate = tegra30_bus_clk_recalc_rate, | ||
898 | }; | ||
899 | |||
794 | /* Blink output functions */ | 900 | /* Blink output functions */ |
795 | static int tegra30_blink_clk_is_enabled(struct clk_hw *hw) | 901 | static int tegra30_blink_clk_is_enabled(struct clk_hw *hw) |
796 | { | 902 | { |
diff --git a/arch/arm/mach-tegra/tegra30_clocks.h b/arch/arm/mach-tegra/tegra30_clocks.h index f2f88fef6b8b..7a34adb2f72d 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.h +++ b/arch/arm/mach-tegra/tegra30_clocks.h | |||
@@ -34,6 +34,7 @@ extern struct clk_ops tegra_clk_out_ops; | |||
34 | extern struct clk_ops tegra30_super_ops; | 34 | extern struct clk_ops tegra30_super_ops; |
35 | extern struct clk_ops tegra30_blink_clk_ops; | 35 | extern struct clk_ops tegra30_blink_clk_ops; |
36 | extern struct clk_ops tegra30_twd_ops; | 36 | extern struct clk_ops tegra30_twd_ops; |
37 | extern struct clk_ops tegra30_bus_ops; | ||
37 | extern struct clk_ops tegra30_periph_clk_ops; | 38 | extern struct clk_ops tegra30_periph_clk_ops; |
38 | extern struct clk_ops tegra30_dsib_clk_ops; | 39 | extern struct clk_ops tegra30_dsib_clk_ops; |
39 | extern struct clk_ops tegra_nand_clk_ops; | 40 | extern struct clk_ops tegra_nand_clk_ops; |
diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index 3d2e5532a9ea..6942c7add3bb 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c | |||
@@ -711,6 +711,50 @@ static struct clk tegra_clk_sclk = { | |||
711 | .num_parents = ARRAY_SIZE(mux_sclk), | 711 | .num_parents = ARRAY_SIZE(mux_sclk), |
712 | }; | 712 | }; |
713 | 713 | ||
714 | static const char *tegra_hclk_parent_names[] = { | ||
715 | "tegra_sclk", | ||
716 | }; | ||
717 | |||
718 | static struct clk *tegra_hclk_parents[] = { | ||
719 | &tegra_clk_sclk, | ||
720 | }; | ||
721 | |||
722 | static struct clk tegra_hclk; | ||
723 | static struct clk_tegra tegra_hclk_hw = { | ||
724 | .hw = { | ||
725 | .clk = &tegra_hclk, | ||
726 | }, | ||
727 | .flags = DIV_BUS, | ||
728 | .reg = 0x30, | ||
729 | .reg_shift = 4, | ||
730 | .max_rate = 378000000, | ||
731 | .min_rate = 12000000, | ||
732 | }; | ||
733 | DEFINE_CLK_TEGRA(hclk, 0, &tegra30_bus_ops, 0, tegra_hclk_parent_names, | ||
734 | tegra_hclk_parents, &tegra_clk_sclk); | ||
735 | |||
736 | static const char *tegra_pclk_parent_names[] = { | ||
737 | "tegra_hclk", | ||
738 | }; | ||
739 | |||
740 | static struct clk *tegra_pclk_parents[] = { | ||
741 | &tegra_hclk, | ||
742 | }; | ||
743 | |||
744 | static struct clk tegra_pclk; | ||
745 | static struct clk_tegra tegra_pclk_hw = { | ||
746 | .hw = { | ||
747 | .clk = &tegra_pclk, | ||
748 | }, | ||
749 | .flags = DIV_BUS, | ||
750 | .reg = 0x30, | ||
751 | .reg_shift = 0, | ||
752 | .max_rate = 167000000, | ||
753 | .min_rate = 12000000, | ||
754 | }; | ||
755 | DEFINE_CLK_TEGRA(pclk, 0, &tegra30_bus_ops, 0, tegra_pclk_parent_names, | ||
756 | tegra_pclk_parents, &tegra_hclk); | ||
757 | |||
714 | static const char *mux_blink[] = { | 758 | static const char *mux_blink[] = { |
715 | "clk_32k", | 759 | "clk_32k", |
716 | }; | 760 | }; |
@@ -1254,8 +1298,6 @@ struct clk_duplicate tegra_clk_duplicates[] = { | |||
1254 | CLK_DUPLICATE("usbd", "utmip-pad", NULL), | 1298 | CLK_DUPLICATE("usbd", "utmip-pad", NULL), |
1255 | CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), | 1299 | CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), |
1256 | CLK_DUPLICATE("usbd", "tegra-otg", NULL), | 1300 | CLK_DUPLICATE("usbd", "tegra-otg", NULL), |
1257 | CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"), | ||
1258 | CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), | ||
1259 | CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), | 1301 | CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), |
1260 | CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), | 1302 | CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), |
1261 | CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), | 1303 | CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), |
@@ -1293,6 +1335,9 @@ struct clk_duplicate tegra_clk_duplicates[] = { | |||
1293 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"), | 1335 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"), |
1294 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"), | 1336 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"), |
1295 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"), | 1337 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"), |
1338 | CLK_DUPLICATE("pll_p", "tegradc.0", "parent"), | ||
1339 | CLK_DUPLICATE("pll_p", "tegradc.1", "parent"), | ||
1340 | CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"), | ||
1296 | }; | 1341 | }; |
1297 | 1342 | ||
1298 | struct clk *tegra_ptr_clks[] = { | 1343 | struct clk *tegra_ptr_clks[] = { |
@@ -1325,6 +1370,8 @@ struct clk *tegra_ptr_clks[] = { | |||
1325 | &tegra_cml1, | 1370 | &tegra_cml1, |
1326 | &tegra_pciex, | 1371 | &tegra_pciex, |
1327 | &tegra_clk_sclk, | 1372 | &tegra_clk_sclk, |
1373 | &tegra_hclk, | ||
1374 | &tegra_pclk, | ||
1328 | &tegra_clk_blink, | 1375 | &tegra_clk_blink, |
1329 | &tegra30_clk_twd, | 1376 | &tegra30_clk_twd, |
1330 | }; | 1377 | }; |
diff --git a/arch/arm/mach-tegra/tegra30_speedo.c b/arch/arm/mach-tegra/tegra30_speedo.c new file mode 100644 index 000000000000..125cb16424a6 --- /dev/null +++ b/arch/arm/mach-tegra/tegra30_speedo.c | |||
@@ -0,0 +1,292 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/bug.h> | ||
19 | |||
20 | #include "fuse.h" | ||
21 | |||
22 | #define CORE_PROCESS_CORNERS_NUM 1 | ||
23 | #define CPU_PROCESS_CORNERS_NUM 6 | ||
24 | |||
25 | #define FUSE_SPEEDO_CALIB_0 0x114 | ||
26 | #define FUSE_PACKAGE_INFO 0X1FC | ||
27 | #define FUSE_TEST_PROG_VER 0X128 | ||
28 | |||
29 | #define G_SPEEDO_BIT_MINUS1 58 | ||
30 | #define G_SPEEDO_BIT_MINUS1_R 59 | ||
31 | #define G_SPEEDO_BIT_MINUS2 60 | ||
32 | #define G_SPEEDO_BIT_MINUS2_R 61 | ||
33 | #define LP_SPEEDO_BIT_MINUS1 62 | ||
34 | #define LP_SPEEDO_BIT_MINUS1_R 63 | ||
35 | #define LP_SPEEDO_BIT_MINUS2 64 | ||
36 | #define LP_SPEEDO_BIT_MINUS2_R 65 | ||
37 | |||
38 | enum { | ||
39 | THRESHOLD_INDEX_0, | ||
40 | THRESHOLD_INDEX_1, | ||
41 | THRESHOLD_INDEX_2, | ||
42 | THRESHOLD_INDEX_3, | ||
43 | THRESHOLD_INDEX_4, | ||
44 | THRESHOLD_INDEX_5, | ||
45 | THRESHOLD_INDEX_6, | ||
46 | THRESHOLD_INDEX_7, | ||
47 | THRESHOLD_INDEX_8, | ||
48 | THRESHOLD_INDEX_9, | ||
49 | THRESHOLD_INDEX_10, | ||
50 | THRESHOLD_INDEX_11, | ||
51 | THRESHOLD_INDEX_COUNT, | ||
52 | }; | ||
53 | |||
54 | static const u32 core_process_speedos[][CORE_PROCESS_CORNERS_NUM] = { | ||
55 | {180}, | ||
56 | {170}, | ||
57 | {195}, | ||
58 | {180}, | ||
59 | {168}, | ||
60 | {192}, | ||
61 | {180}, | ||
62 | {170}, | ||
63 | {195}, | ||
64 | {180}, | ||
65 | {180}, | ||
66 | {180}, | ||
67 | }; | ||
68 | |||
69 | static const u32 cpu_process_speedos[][CPU_PROCESS_CORNERS_NUM] = { | ||
70 | {306, 338, 360, 376, UINT_MAX}, | ||
71 | {295, 336, 358, 375, UINT_MAX}, | ||
72 | {325, 325, 358, 375, UINT_MAX}, | ||
73 | {325, 325, 358, 375, UINT_MAX}, | ||
74 | {292, 324, 348, 364, UINT_MAX}, | ||
75 | {324, 324, 348, 364, UINT_MAX}, | ||
76 | {324, 324, 348, 364, UINT_MAX}, | ||
77 | {295, 336, 358, 375, UINT_MAX}, | ||
78 | {358, 358, 358, 358, 397, UINT_MAX}, | ||
79 | {364, 364, 364, 364, 397, UINT_MAX}, | ||
80 | {295, 336, 358, 375, 391, UINT_MAX}, | ||
81 | {295, 336, 358, 375, 391, UINT_MAX}, | ||
82 | }; | ||
83 | |||
84 | static int threshold_index; | ||
85 | static int package_id; | ||
86 | |||
87 | static void fuse_speedo_calib(u32 *speedo_g, u32 *speedo_lp) | ||
88 | { | ||
89 | u32 reg; | ||
90 | int ate_ver; | ||
91 | int bit_minus1; | ||
92 | int bit_minus2; | ||
93 | |||
94 | reg = tegra_fuse_readl(FUSE_SPEEDO_CALIB_0); | ||
95 | |||
96 | *speedo_lp = (reg & 0xFFFF) * 4; | ||
97 | *speedo_g = ((reg >> 16) & 0xFFFF) * 4; | ||
98 | |||
99 | ate_ver = tegra_fuse_readl(FUSE_TEST_PROG_VER); | ||
100 | pr_info("%s: ATE prog ver %d.%d\n", __func__, ate_ver/10, ate_ver%10); | ||
101 | |||
102 | if (ate_ver >= 26) { | ||
103 | bit_minus1 = tegra_spare_fuse(LP_SPEEDO_BIT_MINUS1); | ||
104 | bit_minus1 |= tegra_spare_fuse(LP_SPEEDO_BIT_MINUS1_R); | ||
105 | bit_minus2 = tegra_spare_fuse(LP_SPEEDO_BIT_MINUS2); | ||
106 | bit_minus2 |= tegra_spare_fuse(LP_SPEEDO_BIT_MINUS2_R); | ||
107 | *speedo_lp |= (bit_minus1 << 1) | bit_minus2; | ||
108 | |||
109 | bit_minus1 = tegra_spare_fuse(G_SPEEDO_BIT_MINUS1); | ||
110 | bit_minus1 |= tegra_spare_fuse(G_SPEEDO_BIT_MINUS1_R); | ||
111 | bit_minus2 = tegra_spare_fuse(G_SPEEDO_BIT_MINUS2); | ||
112 | bit_minus2 |= tegra_spare_fuse(G_SPEEDO_BIT_MINUS2_R); | ||
113 | *speedo_g |= (bit_minus1 << 1) | bit_minus2; | ||
114 | } else { | ||
115 | *speedo_lp |= 0x3; | ||
116 | *speedo_g |= 0x3; | ||
117 | } | ||
118 | } | ||
119 | |||
120 | static void rev_sku_to_speedo_ids(int rev, int sku) | ||
121 | { | ||
122 | switch (rev) { | ||
123 | case TEGRA_REVISION_A01: | ||
124 | tegra_cpu_speedo_id = 0; | ||
125 | tegra_soc_speedo_id = 0; | ||
126 | threshold_index = THRESHOLD_INDEX_0; | ||
127 | break; | ||
128 | case TEGRA_REVISION_A02: | ||
129 | case TEGRA_REVISION_A03: | ||
130 | switch (sku) { | ||
131 | case 0x87: | ||
132 | case 0x82: | ||
133 | tegra_cpu_speedo_id = 1; | ||
134 | tegra_soc_speedo_id = 1; | ||
135 | threshold_index = THRESHOLD_INDEX_1; | ||
136 | break; | ||
137 | case 0x81: | ||
138 | switch (package_id) { | ||
139 | case 1: | ||
140 | tegra_cpu_speedo_id = 2; | ||
141 | tegra_soc_speedo_id = 2; | ||
142 | threshold_index = THRESHOLD_INDEX_2; | ||
143 | break; | ||
144 | case 2: | ||
145 | tegra_cpu_speedo_id = 4; | ||
146 | tegra_soc_speedo_id = 1; | ||
147 | threshold_index = THRESHOLD_INDEX_7; | ||
148 | break; | ||
149 | default: | ||
150 | pr_err("Tegra30: Unknown pkg %d\n", package_id); | ||
151 | BUG(); | ||
152 | break; | ||
153 | } | ||
154 | break; | ||
155 | case 0x80: | ||
156 | switch (package_id) { | ||
157 | case 1: | ||
158 | tegra_cpu_speedo_id = 5; | ||
159 | tegra_soc_speedo_id = 2; | ||
160 | threshold_index = THRESHOLD_INDEX_8; | ||
161 | break; | ||
162 | case 2: | ||
163 | tegra_cpu_speedo_id = 6; | ||
164 | tegra_soc_speedo_id = 2; | ||
165 | threshold_index = THRESHOLD_INDEX_9; | ||
166 | break; | ||
167 | default: | ||
168 | pr_err("Tegra30: Unknown pkg %d\n", package_id); | ||
169 | BUG(); | ||
170 | break; | ||
171 | } | ||
172 | break; | ||
173 | case 0x83: | ||
174 | switch (package_id) { | ||
175 | case 1: | ||
176 | tegra_cpu_speedo_id = 7; | ||
177 | tegra_soc_speedo_id = 1; | ||
178 | threshold_index = THRESHOLD_INDEX_10; | ||
179 | break; | ||
180 | case 2: | ||
181 | tegra_cpu_speedo_id = 3; | ||
182 | tegra_soc_speedo_id = 2; | ||
183 | threshold_index = THRESHOLD_INDEX_3; | ||
184 | break; | ||
185 | default: | ||
186 | pr_err("Tegra30: Unknown pkg %d\n", package_id); | ||
187 | BUG(); | ||
188 | break; | ||
189 | } | ||
190 | break; | ||
191 | case 0x8F: | ||
192 | tegra_cpu_speedo_id = 8; | ||
193 | tegra_soc_speedo_id = 1; | ||
194 | threshold_index = THRESHOLD_INDEX_11; | ||
195 | break; | ||
196 | case 0x08: | ||
197 | tegra_cpu_speedo_id = 1; | ||
198 | tegra_soc_speedo_id = 1; | ||
199 | threshold_index = THRESHOLD_INDEX_4; | ||
200 | break; | ||
201 | case 0x02: | ||
202 | tegra_cpu_speedo_id = 2; | ||
203 | tegra_soc_speedo_id = 2; | ||
204 | threshold_index = THRESHOLD_INDEX_5; | ||
205 | break; | ||
206 | case 0x04: | ||
207 | tegra_cpu_speedo_id = 3; | ||
208 | tegra_soc_speedo_id = 2; | ||
209 | threshold_index = THRESHOLD_INDEX_6; | ||
210 | break; | ||
211 | case 0: | ||
212 | switch (package_id) { | ||
213 | case 1: | ||
214 | tegra_cpu_speedo_id = 2; | ||
215 | tegra_soc_speedo_id = 2; | ||
216 | threshold_index = THRESHOLD_INDEX_2; | ||
217 | break; | ||
218 | case 2: | ||
219 | tegra_cpu_speedo_id = 3; | ||
220 | tegra_soc_speedo_id = 2; | ||
221 | threshold_index = THRESHOLD_INDEX_3; | ||
222 | break; | ||
223 | default: | ||
224 | pr_err("Tegra30: Unknown pkg %d\n", package_id); | ||
225 | BUG(); | ||
226 | break; | ||
227 | } | ||
228 | break; | ||
229 | default: | ||
230 | pr_warn("Tegra30: Unknown SKU %d\n", sku); | ||
231 | tegra_cpu_speedo_id = 0; | ||
232 | tegra_soc_speedo_id = 0; | ||
233 | threshold_index = THRESHOLD_INDEX_0; | ||
234 | break; | ||
235 | } | ||
236 | break; | ||
237 | default: | ||
238 | pr_warn("Tegra30: Unknown chip rev %d\n", rev); | ||
239 | tegra_cpu_speedo_id = 0; | ||
240 | tegra_soc_speedo_id = 0; | ||
241 | threshold_index = THRESHOLD_INDEX_0; | ||
242 | break; | ||
243 | } | ||
244 | } | ||
245 | |||
246 | void tegra30_init_speedo_data(void) | ||
247 | { | ||
248 | u32 cpu_speedo_val; | ||
249 | u32 core_speedo_val; | ||
250 | int i; | ||
251 | |||
252 | BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) != | ||
253 | THRESHOLD_INDEX_COUNT); | ||
254 | BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) != | ||
255 | THRESHOLD_INDEX_COUNT); | ||
256 | |||
257 | package_id = tegra_fuse_readl(FUSE_PACKAGE_INFO) & 0x0F; | ||
258 | |||
259 | rev_sku_to_speedo_ids(tegra_revision, tegra_sku_id); | ||
260 | fuse_speedo_calib(&cpu_speedo_val, &core_speedo_val); | ||
261 | pr_debug("%s CPU speedo value %u\n", __func__, cpu_speedo_val); | ||
262 | pr_debug("%s Core speedo value %u\n", __func__, core_speedo_val); | ||
263 | |||
264 | for (i = 0; i < CPU_PROCESS_CORNERS_NUM; i++) { | ||
265 | if (cpu_speedo_val < cpu_process_speedos[threshold_index][i]) | ||
266 | break; | ||
267 | } | ||
268 | tegra_cpu_process_id = i - 1; | ||
269 | |||
270 | if (tegra_cpu_process_id == -1) { | ||
271 | pr_warn("Tegra30: CPU speedo value %3d out of range", | ||
272 | cpu_speedo_val); | ||
273 | tegra_cpu_process_id = 0; | ||
274 | tegra_cpu_speedo_id = 1; | ||
275 | } | ||
276 | |||
277 | for (i = 0; i < CORE_PROCESS_CORNERS_NUM; i++) { | ||
278 | if (core_speedo_val < core_process_speedos[threshold_index][i]) | ||
279 | break; | ||
280 | } | ||
281 | tegra_core_process_id = i - 1; | ||
282 | |||
283 | if (tegra_core_process_id == -1) { | ||
284 | pr_warn("Tegra30: CORE speedo value %3d out of range", | ||
285 | core_speedo_val); | ||
286 | tegra_core_process_id = 0; | ||
287 | tegra_soc_speedo_id = 1; | ||
288 | } | ||
289 | |||
290 | pr_info("Tegra30: CPU Speedo ID %d, Soc Speedo ID %d", | ||
291 | tegra_cpu_speedo_id, tegra_soc_speedo_id); | ||
292 | } | ||
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c index 070629a95625..7adbed5df8a1 100644 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ b/arch/arm/mach-ux500/board-mop500-audio.c | |||
@@ -150,15 +150,6 @@ static struct platform_device snd_soc_mop500 = { | |||
150 | }, | 150 | }, |
151 | }; | 151 | }; |
152 | 152 | ||
153 | /* Platform device for Ux500-PCM */ | ||
154 | static struct platform_device ux500_pcm = { | ||
155 | .name = "ux500-pcm", | ||
156 | .id = 0, | ||
157 | .dev = { | ||
158 | .platform_data = NULL, | ||
159 | }, | ||
160 | }; | ||
161 | |||
162 | struct msp_i2s_platform_data msp2_platform_data = { | 153 | struct msp_i2s_platform_data msp2_platform_data = { |
163 | .id = MSP_I2S_2, | 154 | .id = MSP_I2S_2, |
164 | .msp_i2s_dma_rx = &msp2_dma_rx, | 155 | .msp_i2s_dma_rx = &msp2_dma_rx, |
@@ -186,10 +177,3 @@ void mop500_audio_init(struct device *parent) | |||
186 | db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, | 177 | db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, |
187 | &msp3_platform_data); | 178 | &msp3_platform_data); |
188 | } | 179 | } |
189 | |||
190 | /* Due for removal once the MSP driver has been fully DT:ed. */ | ||
191 | void mop500_of_audio_init(struct device *parent) | ||
192 | { | ||
193 | pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__); | ||
194 | platform_device_register(&ux500_pcm); | ||
195 | } | ||
diff --git a/arch/arm/mach-ux500/board-mop500-stuib.c b/arch/arm/mach-ux500/board-mop500-stuib.c index 8c979770d872..564f57d5d8a7 100644 --- a/arch/arm/mach-ux500/board-mop500-stuib.c +++ b/arch/arm/mach-ux500/board-mop500-stuib.c | |||
@@ -162,18 +162,6 @@ static struct bu21013_platform_device tsc_plat_device = { | |||
162 | .y_flip = true, | 162 | .y_flip = true, |
163 | }; | 163 | }; |
164 | 164 | ||
165 | static struct bu21013_platform_device tsc_plat2_device = { | ||
166 | .cs_en = bu21013_gpio_board_init, | ||
167 | .cs_dis = bu21013_gpio_board_exit, | ||
168 | .irq_read_val = bu21013_read_pin_val, | ||
169 | .irq = NOMADIK_GPIO_TO_IRQ(TOUCH_GPIO_PIN), | ||
170 | .touch_x_max = TOUCH_XMAX, | ||
171 | .touch_y_max = TOUCH_YMAX, | ||
172 | .ext_clk = false, | ||
173 | .x_flip = false, | ||
174 | .y_flip = true, | ||
175 | }; | ||
176 | |||
177 | static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = { | 165 | static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = { |
178 | { | 166 | { |
179 | I2C_BOARD_INFO("bu21013_tp", 0x5C), | 167 | I2C_BOARD_INFO("bu21013_tp", 0x5C), |
@@ -181,21 +169,17 @@ static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = { | |||
181 | }, | 169 | }, |
182 | { | 170 | { |
183 | I2C_BOARD_INFO("bu21013_tp", 0x5D), | 171 | I2C_BOARD_INFO("bu21013_tp", 0x5D), |
184 | .platform_data = &tsc_plat2_device, | 172 | .platform_data = &tsc_plat_device, |
185 | }, | 173 | }, |
186 | 174 | ||
187 | }; | 175 | }; |
188 | 176 | ||
189 | void __init mop500_stuib_init(void) | 177 | void __init mop500_stuib_init(void) |
190 | { | 178 | { |
191 | if (machine_is_hrefv60()) { | 179 | if (machine_is_hrefv60()) |
192 | tsc_plat_device.cs_pin = HREFV60_TOUCH_RST_GPIO; | 180 | tsc_plat_device.cs_pin = HREFV60_TOUCH_RST_GPIO; |
193 | tsc_plat2_device.cs_pin = HREFV60_TOUCH_RST_GPIO; | 181 | else |
194 | } else { | ||
195 | tsc_plat_device.cs_pin = GPIO_BU21013_CS; | 182 | tsc_plat_device.cs_pin = GPIO_BU21013_CS; |
196 | tsc_plat2_device.cs_pin = GPIO_BU21013_CS; | ||
197 | |||
198 | } | ||
199 | 183 | ||
200 | mop500_uib_i2c_add(0, mop500_i2c0_devices_stuib, | 184 | mop500_uib_i2c_add(0, mop500_i2c0_devices_stuib, |
201 | ARRAY_SIZE(mop500_i2c0_devices_stuib)); | 185 | ARRAY_SIZE(mop500_i2c0_devices_stuib)); |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 416d436111f2..daa4237ac0dc 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -33,8 +33,6 @@ | |||
33 | #include <linux/smsc911x.h> | 33 | #include <linux/smsc911x.h> |
34 | #include <linux/gpio_keys.h> | 34 | #include <linux/gpio_keys.h> |
35 | #include <linux/delay.h> | 35 | #include <linux/delay.h> |
36 | #include <linux/of.h> | ||
37 | #include <linux/of_platform.h> | ||
38 | #include <linux/leds.h> | 36 | #include <linux/leds.h> |
39 | #include <linux/pinctrl/consumer.h> | 37 | #include <linux/pinctrl/consumer.h> |
40 | 38 | ||
@@ -464,7 +462,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | |||
464 | }; | 462 | }; |
465 | #endif | 463 | #endif |
466 | 464 | ||
467 | static struct pl022_ssp_controller ssp0_plat = { | 465 | struct pl022_ssp_controller ssp0_plat = { |
468 | .bus_id = 0, | 466 | .bus_id = 0, |
469 | #ifdef CONFIG_STE_DMA40 | 467 | #ifdef CONFIG_STE_DMA40 |
470 | .enable_dma = 1, | 468 | .enable_dma = 1, |
@@ -541,7 +539,7 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | |||
541 | }; | 539 | }; |
542 | #endif | 540 | #endif |
543 | 541 | ||
544 | static struct amba_pl011_data uart0_plat = { | 542 | struct amba_pl011_data uart0_plat = { |
545 | #ifdef CONFIG_STE_DMA40 | 543 | #ifdef CONFIG_STE_DMA40 |
546 | .dma_filter = stedma40_filter, | 544 | .dma_filter = stedma40_filter, |
547 | .dma_rx_param = &uart0_dma_cfg_rx, | 545 | .dma_rx_param = &uart0_dma_cfg_rx, |
@@ -549,7 +547,7 @@ static struct amba_pl011_data uart0_plat = { | |||
549 | #endif | 547 | #endif |
550 | }; | 548 | }; |
551 | 549 | ||
552 | static struct amba_pl011_data uart1_plat = { | 550 | struct amba_pl011_data uart1_plat = { |
553 | #ifdef CONFIG_STE_DMA40 | 551 | #ifdef CONFIG_STE_DMA40 |
554 | .dma_filter = stedma40_filter, | 552 | .dma_filter = stedma40_filter, |
555 | .dma_rx_param = &uart1_dma_cfg_rx, | 553 | .dma_rx_param = &uart1_dma_cfg_rx, |
@@ -557,7 +555,7 @@ static struct amba_pl011_data uart1_plat = { | |||
557 | #endif | 555 | #endif |
558 | }; | 556 | }; |
559 | 557 | ||
560 | static struct amba_pl011_data uart2_plat = { | 558 | struct amba_pl011_data uart2_plat = { |
561 | #ifdef CONFIG_STE_DMA40 | 559 | #ifdef CONFIG_STE_DMA40 |
562 | .dma_filter = stedma40_filter, | 560 | .dma_filter = stedma40_filter, |
563 | .dma_rx_param = &uart2_dma_cfg_rx, | 561 | .dma_rx_param = &uart2_dma_cfg_rx, |
@@ -618,8 +616,6 @@ static void __init mop500_init_machine(void) | |||
618 | 616 | ||
619 | /* This board has full regulator constraints */ | 617 | /* This board has full regulator constraints */ |
620 | regulator_has_full_constraints(); | 618 | regulator_has_full_constraints(); |
621 | |||
622 | mop500_uib_init(); | ||
623 | } | 619 | } |
624 | 620 | ||
625 | static void __init snowball_init_machine(void) | 621 | static void __init snowball_init_machine(void) |
@@ -684,8 +680,6 @@ static void __init hrefv60_init_machine(void) | |||
684 | 680 | ||
685 | /* This board has full regulator constraints */ | 681 | /* This board has full regulator constraints */ |
686 | regulator_has_full_constraints(); | 682 | regulator_has_full_constraints(); |
687 | |||
688 | mop500_uib_init(); | ||
689 | } | 683 | } |
690 | 684 | ||
691 | MACHINE_START(U8500, "ST-Ericsson MOP500 platform") | 685 | MACHINE_START(U8500, "ST-Ericsson MOP500 platform") |
@@ -721,135 +715,5 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") | |||
721 | .timer = &ux500_timer, | 715 | .timer = &ux500_timer, |
722 | .handle_irq = gic_handle_irq, | 716 | .handle_irq = gic_handle_irq, |
723 | .init_machine = snowball_init_machine, | 717 | .init_machine = snowball_init_machine, |
724 | .init_late = ux500_init_late, | 718 | .init_late = NULL, |
725 | MACHINE_END | ||
726 | |||
727 | #ifdef CONFIG_MACH_UX500_DT | ||
728 | |||
729 | struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { | ||
730 | /* Requires call-back bindings. */ | ||
731 | OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), | ||
732 | /* Requires DMA and call-back bindings. */ | ||
733 | OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), | ||
734 | OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), | ||
735 | OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), | ||
736 | /* Requires DMA bindings. */ | ||
737 | OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), | ||
738 | OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), | ||
739 | OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), | ||
740 | OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data), | ||
741 | OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data), | ||
742 | /* Requires clock name bindings. */ | ||
743 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL), | ||
744 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL), | ||
745 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL), | ||
746 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL), | ||
747 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL), | ||
748 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL), | ||
749 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), | ||
750 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), | ||
751 | OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), | ||
752 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL), | ||
753 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL), | ||
754 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL), | ||
755 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), | ||
756 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), | ||
757 | /* Requires device name bindings. */ | ||
758 | OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL), | ||
759 | /* Requires clock name and DMA bindings. */ | ||
760 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, | ||
761 | "ux500-msp-i2s.0", &msp0_platform_data), | ||
762 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, | ||
763 | "ux500-msp-i2s.1", &msp1_platform_data), | ||
764 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, | ||
765 | "ux500-msp-i2s.2", &msp2_platform_data), | ||
766 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, | ||
767 | "ux500-msp-i2s.3", &msp3_platform_data), | ||
768 | {}, | ||
769 | }; | ||
770 | |||
771 | static const struct of_device_id u8500_local_bus_nodes[] = { | ||
772 | /* only create devices below soc node */ | ||
773 | { .compatible = "stericsson,db8500", }, | ||
774 | { .compatible = "stericsson,db8500-prcmu", }, | ||
775 | { .compatible = "simple-bus"}, | ||
776 | { }, | ||
777 | }; | ||
778 | |||
779 | static void __init u8500_init_machine(void) | ||
780 | { | ||
781 | struct device *parent = NULL; | ||
782 | int i2c0_devs; | ||
783 | int i; | ||
784 | |||
785 | /* Pinmaps must be in place before devices register */ | ||
786 | if (of_machine_is_compatible("st-ericsson,mop500")) | ||
787 | mop500_pinmaps_init(); | ||
788 | else if (of_machine_is_compatible("calaosystems,snowball-a9500")) | ||
789 | snowball_pinmaps_init(); | ||
790 | else if (of_machine_is_compatible("st-ericsson,hrefv60+")) | ||
791 | hrefv60_pinmaps_init(); | ||
792 | |||
793 | parent = u8500_of_init_devices(); | ||
794 | |||
795 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) | ||
796 | mop500_platform_devs[i]->dev.parent = parent; | ||
797 | |||
798 | /* automatically probe child nodes of db8500 device */ | ||
799 | of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent); | ||
800 | |||
801 | if (of_machine_is_compatible("st-ericsson,mop500")) { | ||
802 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; | ||
803 | |||
804 | platform_add_devices(mop500_platform_devs, | ||
805 | ARRAY_SIZE(mop500_platform_devs)); | ||
806 | |||
807 | mop500_sdi_init(parent); | ||
808 | mop500_audio_init(parent); | ||
809 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); | ||
810 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | ||
811 | i2c_register_board_info(2, mop500_i2c2_devices, | ||
812 | ARRAY_SIZE(mop500_i2c2_devices)); | ||
813 | |||
814 | mop500_uib_init(); | ||
815 | |||
816 | } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) { | ||
817 | mop500_of_audio_init(parent); | ||
818 | } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) { | ||
819 | /* | ||
820 | * The HREFv60 board removed a GPIO expander and routed | ||
821 | * all these GPIO pins to the internal GPIO controller | ||
822 | * instead. | ||
823 | */ | ||
824 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; | ||
825 | platform_add_devices(mop500_platform_devs, | ||
826 | ARRAY_SIZE(mop500_platform_devs)); | ||
827 | |||
828 | mop500_uib_init(); | ||
829 | } | ||
830 | |||
831 | /* This board has full regulator constraints */ | ||
832 | regulator_has_full_constraints(); | ||
833 | } | ||
834 | |||
835 | static const char * u8500_dt_board_compat[] = { | ||
836 | "calaosystems,snowball-a9500", | ||
837 | "st-ericsson,hrefv60+", | ||
838 | "st-ericsson,u8500", | ||
839 | "st-ericsson,mop500", | ||
840 | NULL, | ||
841 | }; | ||
842 | |||
843 | |||
844 | DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)") | ||
845 | .smp = smp_ops(ux500_smp_ops), | ||
846 | .map_io = u8500_map_io, | ||
847 | .init_irq = ux500_init_irq, | ||
848 | /* we re-use nomadik timer here */ | ||
849 | .timer = &ux500_timer, | ||
850 | .handle_irq = gic_handle_irq, | ||
851 | .init_machine = u8500_init_machine, | ||
852 | .init_late = ux500_init_late, | ||
853 | .dt_compat = u8500_dt_board_compat, | ||
854 | MACHINE_END | 719 | MACHINE_END |
855 | #endif | ||
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h index aca39a68712a..eaa605f5d90d 100644 --- a/arch/arm/mach-ux500/board-mop500.h +++ b/arch/arm/mach-ux500/board-mop500.h | |||
@@ -89,6 +89,10 @@ extern struct msp_i2s_platform_data msp1_platform_data; | |||
89 | extern struct msp_i2s_platform_data msp2_platform_data; | 89 | extern struct msp_i2s_platform_data msp2_platform_data; |
90 | extern struct msp_i2s_platform_data msp3_platform_data; | 90 | extern struct msp_i2s_platform_data msp3_platform_data; |
91 | extern struct arm_pmu_platdata db8500_pmu_platdata; | 91 | extern struct arm_pmu_platdata db8500_pmu_platdata; |
92 | extern struct amba_pl011_data uart0_plat; | ||
93 | extern struct amba_pl011_data uart1_plat; | ||
94 | extern struct amba_pl011_data uart2_plat; | ||
95 | extern struct pl022_ssp_controller ssp0_plat; | ||
92 | 96 | ||
93 | extern void mop500_sdi_init(struct device *parent); | 97 | extern void mop500_sdi_init(struct device *parent); |
94 | extern void snowball_sdi_init(struct device *parent); | 98 | extern void snowball_sdi_init(struct device *parent); |
@@ -100,14 +104,8 @@ void __init mop500_pinmaps_init(void); | |||
100 | void __init snowball_pinmaps_init(void); | 104 | void __init snowball_pinmaps_init(void); |
101 | void __init hrefv60_pinmaps_init(void); | 105 | void __init hrefv60_pinmaps_init(void); |
102 | void mop500_audio_init(struct device *parent); | 106 | void mop500_audio_init(struct device *parent); |
103 | /* Due for removal once the MSP driver has been fully DT:ed. */ | ||
104 | void mop500_of_audio_init(struct device *parent); | ||
105 | 107 | ||
106 | int __init mop500_uib_init(void); | 108 | int __init mop500_uib_init(void); |
107 | void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info, | 109 | void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info, |
108 | unsigned n); | 110 | unsigned n); |
109 | |||
110 | /* TODO: Once all pieces are DT:ed, remove completely. */ | ||
111 | struct device * __init u8500_of_init_devices(void); | ||
112 | |||
113 | #endif | 111 | #endif |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index bcdfe6b1d453..4c6ce012daef 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -17,9 +17,15 @@ | |||
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/mfd/abx500/ab8500.h> | 19 | #include <linux/mfd/abx500/ab8500.h> |
20 | #include <linux/mfd/dbx500-prcmu.h> | ||
21 | #include <linux/of.h> | ||
22 | #include <linux/of_platform.h> | ||
23 | #include <linux/regulator/machine.h> | ||
20 | 24 | ||
21 | #include <asm/pmu.h> | 25 | #include <asm/pmu.h> |
22 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
27 | #include <asm/mach/arch.h> | ||
28 | #include <asm/hardware/gic.h> | ||
23 | #include <plat/gpio-nomadik.h> | 29 | #include <plat/gpio-nomadik.h> |
24 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
25 | #include <mach/setup.h> | 31 | #include <mach/setup.h> |
@@ -29,6 +35,7 @@ | |||
29 | 35 | ||
30 | #include "devices-db8500.h" | 36 | #include "devices-db8500.h" |
31 | #include "ste-dma40-db8500.h" | 37 | #include "ste-dma40-db8500.h" |
38 | #include "board-mop500.h" | ||
32 | 39 | ||
33 | /* minimum static i/o mapping required to boot U8500 platforms */ | 40 | /* minimum static i/o mapping required to boot U8500 platforms */ |
34 | static struct map_desc u8500_uart_io_desc[] __initdata = { | 41 | static struct map_desc u8500_uart_io_desc[] __initdata = { |
@@ -215,7 +222,7 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) | |||
215 | db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); | 222 | db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); |
216 | 223 | ||
217 | platform_device_register_data(parent, | 224 | platform_device_register_data(parent, |
218 | "cpufreq-u8500", -1, NULL, 0); | 225 | "cpufreq-ux500", -1, NULL, 0); |
219 | 226 | ||
220 | for (i = 0; i < ARRAY_SIZE(platform_devs); i++) | 227 | for (i = 0; i < ARRAY_SIZE(platform_devs); i++) |
221 | platform_devs[i]->dev.parent = parent; | 228 | platform_devs[i]->dev.parent = parent; |
@@ -227,17 +234,17 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) | |||
227 | return parent; | 234 | return parent; |
228 | } | 235 | } |
229 | 236 | ||
237 | #ifdef CONFIG_MACH_UX500_DT | ||
238 | |||
230 | /* TODO: Once all pieces are DT:ed, remove completely. */ | 239 | /* TODO: Once all pieces are DT:ed, remove completely. */ |
231 | struct device * __init u8500_of_init_devices(void) | 240 | static struct device * __init u8500_of_init_devices(void) |
232 | { | 241 | { |
233 | struct device *parent; | 242 | struct device *parent = db8500_soc_device_init(); |
234 | |||
235 | parent = db8500_soc_device_init(); | ||
236 | 243 | ||
237 | db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); | 244 | db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); |
238 | 245 | ||
239 | platform_device_register_data(parent, | 246 | platform_device_register_data(parent, |
240 | "cpufreq-u8500", -1, NULL, 0); | 247 | "cpufreq-ux500", -1, NULL, 0); |
241 | 248 | ||
242 | u8500_dma40_device.dev.parent = parent; | 249 | u8500_dma40_device.dev.parent = parent; |
243 | 250 | ||
@@ -251,3 +258,95 @@ struct device * __init u8500_of_init_devices(void) | |||
251 | 258 | ||
252 | return parent; | 259 | return parent; |
253 | } | 260 | } |
261 | |||
262 | static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { | ||
263 | /* Requires call-back bindings. */ | ||
264 | OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), | ||
265 | /* Requires DMA bindings. */ | ||
266 | OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), | ||
267 | OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), | ||
268 | OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), | ||
269 | OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), | ||
270 | OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), | ||
271 | OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), | ||
272 | OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data), | ||
273 | OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data), | ||
274 | /* Requires clock name bindings. */ | ||
275 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL), | ||
276 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL), | ||
277 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL), | ||
278 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL), | ||
279 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL), | ||
280 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL), | ||
281 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), | ||
282 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), | ||
283 | OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), | ||
284 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL), | ||
285 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL), | ||
286 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL), | ||
287 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), | ||
288 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), | ||
289 | /* Requires device name bindings. */ | ||
290 | OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL), | ||
291 | /* Requires clock name and DMA bindings. */ | ||
292 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, | ||
293 | "ux500-msp-i2s.0", &msp0_platform_data), | ||
294 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, | ||
295 | "ux500-msp-i2s.1", &msp1_platform_data), | ||
296 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, | ||
297 | "ux500-msp-i2s.2", &msp2_platform_data), | ||
298 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, | ||
299 | "ux500-msp-i2s.3", &msp3_platform_data), | ||
300 | {}, | ||
301 | }; | ||
302 | |||
303 | static const struct of_device_id u8500_local_bus_nodes[] = { | ||
304 | /* only create devices below soc node */ | ||
305 | { .compatible = "stericsson,db8500", }, | ||
306 | { .compatible = "stericsson,db8500-prcmu", }, | ||
307 | { .compatible = "simple-bus"}, | ||
308 | { }, | ||
309 | }; | ||
310 | |||
311 | static void __init u8500_init_machine(void) | ||
312 | { | ||
313 | struct device *parent = NULL; | ||
314 | |||
315 | /* Pinmaps must be in place before devices register */ | ||
316 | if (of_machine_is_compatible("st-ericsson,mop500")) | ||
317 | mop500_pinmaps_init(); | ||
318 | else if (of_machine_is_compatible("calaosystems,snowball-a9500")) | ||
319 | snowball_pinmaps_init(); | ||
320 | else if (of_machine_is_compatible("st-ericsson,hrefv60+")) | ||
321 | hrefv60_pinmaps_init(); | ||
322 | else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} | ||
323 | /* TODO: Add pinmaps for ccu9540 board. */ | ||
324 | |||
325 | /* TODO: Export SoC, USB, cpu-freq and DMA40 */ | ||
326 | parent = u8500_of_init_devices(); | ||
327 | |||
328 | /* automatically probe child nodes of db8500 device */ | ||
329 | of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent); | ||
330 | } | ||
331 | |||
332 | static const char * stericsson_dt_platform_compat[] = { | ||
333 | "st-ericsson,u8500", | ||
334 | "st-ericsson,u8540", | ||
335 | "st-ericsson,u9500", | ||
336 | "st-ericsson,u9540", | ||
337 | NULL, | ||
338 | }; | ||
339 | |||
340 | DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") | ||
341 | .smp = smp_ops(ux500_smp_ops), | ||
342 | .map_io = u8500_map_io, | ||
343 | .init_irq = ux500_init_irq, | ||
344 | /* we re-use nomadik timer here */ | ||
345 | .timer = &ux500_timer, | ||
346 | .handle_irq = gic_handle_irq, | ||
347 | .init_machine = u8500_init_machine, | ||
348 | .init_late = NULL, | ||
349 | .dt_compat = stericsson_dt_platform_compat, | ||
350 | MACHINE_END | ||
351 | |||
352 | #endif | ||
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 1f3fbc2bb776..721e7b4275f3 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <mach/setup.h> | 26 | #include <mach/setup.h> |
27 | #include <mach/devices.h> | 27 | #include <mach/devices.h> |
28 | 28 | ||
29 | #include "board-mop500.h" | ||
30 | |||
29 | void __iomem *_PRCMU_BASE; | 31 | void __iomem *_PRCMU_BASE; |
30 | 32 | ||
31 | /* | 33 | /* |
@@ -82,6 +84,7 @@ void __init ux500_init_irq(void) | |||
82 | 84 | ||
83 | void __init ux500_init_late(void) | 85 | void __init ux500_init_late(void) |
84 | { | 86 | { |
87 | mop500_uib_init(); | ||
85 | } | 88 | } |
86 | 89 | ||
87 | static const char * __init ux500_get_machine(void) | 90 | static const char * __init ux500_get_machine(void) |
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ba8d14f78d4d..79bf5fb4dad3 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c | |||
@@ -19,12 +19,15 @@ | |||
19 | #include <linux/cpumask.h> | 19 | #include <linux/cpumask.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/clk/zynq.h> | ||
23 | #include <linux/of_address.h> | ||
22 | #include <linux/of_irq.h> | 24 | #include <linux/of_irq.h> |
23 | #include <linux/of_platform.h> | 25 | #include <linux/of_platform.h> |
24 | #include <linux/of.h> | 26 | #include <linux/of.h> |
25 | 27 | ||
26 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/map.h> | 29 | #include <asm/mach/map.h> |
30 | #include <asm/mach/time.h> | ||
28 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
29 | #include <asm/page.h> | 32 | #include <asm/page.h> |
30 | #include <asm/hardware/gic.h> | 33 | #include <asm/hardware/gic.h> |
@@ -84,15 +87,36 @@ static struct map_desc io_desc[] __initdata = { | |||
84 | 87 | ||
85 | #ifdef CONFIG_DEBUG_LL | 88 | #ifdef CONFIG_DEBUG_LL |
86 | { | 89 | { |
87 | .virtual = UART0_VIRT, | 90 | .virtual = LL_UART_VADDR, |
88 | .pfn = __phys_to_pfn(UART0_PHYS), | 91 | .pfn = __phys_to_pfn(LL_UART_PADDR), |
89 | .length = UART0_SIZE, | 92 | .length = UART_SIZE, |
90 | .type = MT_DEVICE, | 93 | .type = MT_DEVICE, |
91 | }, | 94 | }, |
92 | #endif | 95 | #endif |
93 | 96 | ||
94 | }; | 97 | }; |
95 | 98 | ||
99 | static void __init xilinx_zynq_timer_init(void) | ||
100 | { | ||
101 | struct device_node *np; | ||
102 | void __iomem *slcr; | ||
103 | |||
104 | np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); | ||
105 | slcr = of_iomap(np, 0); | ||
106 | WARN_ON(!slcr); | ||
107 | |||
108 | xilinx_zynq_clocks_init(slcr); | ||
109 | |||
110 | xttcpss_timer_init(); | ||
111 | } | ||
112 | |||
113 | /* | ||
114 | * Instantiate and initialize the system timer structure | ||
115 | */ | ||
116 | static struct sys_timer xttcpss_sys_timer = { | ||
117 | .init = xilinx_zynq_timer_init, | ||
118 | }; | ||
119 | |||
96 | /** | 120 | /** |
97 | * xilinx_map_io() - Create memory mappings needed for early I/O. | 121 | * xilinx_map_io() - Create memory mappings needed for early I/O. |
98 | */ | 122 | */ |
@@ -102,7 +126,8 @@ static void __init xilinx_map_io(void) | |||
102 | } | 126 | } |
103 | 127 | ||
104 | static const char *xilinx_dt_match[] = { | 128 | static const char *xilinx_dt_match[] = { |
105 | "xlnx,zynq-ep107", | 129 | "xlnx,zynq-zc702", |
130 | "xlnx,zynq-7000", | ||
106 | NULL | 131 | NULL |
107 | }; | 132 | }; |
108 | 133 | ||
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index a009644a1555..954b91c13c91 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h | |||
@@ -17,8 +17,6 @@ | |||
17 | #ifndef __MACH_ZYNQ_COMMON_H__ | 17 | #ifndef __MACH_ZYNQ_COMMON_H__ |
18 | #define __MACH_ZYNQ_COMMON_H__ | 18 | #define __MACH_ZYNQ_COMMON_H__ |
19 | 19 | ||
20 | #include <asm/mach/time.h> | 20 | void __init xttcpss_timer_init(void); |
21 | |||
22 | extern struct sys_timer xttcpss_sys_timer; | ||
23 | 21 | ||
24 | #endif | 22 | #endif |
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 1b8bf0ecbcb0..5ebbd8e6eeee 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h | |||
@@ -25,8 +25,9 @@ | |||
25 | * address that is known to work. | 25 | * address that is known to work. |
26 | */ | 26 | */ |
27 | #define UART0_PHYS 0xE0000000 | 27 | #define UART0_PHYS 0xE0000000 |
28 | #define UART0_SIZE SZ_4K | 28 | #define UART1_PHYS 0xE0001000 |
29 | #define UART0_VIRT 0xF0001000 | 29 | #define UART_SIZE SZ_4K |
30 | #define UART_VIRT 0xF0001000 | ||
30 | 31 | ||
31 | #define TTC0_PHYS 0xF8001000 | 32 | #define TTC0_PHYS 0xF8001000 |
32 | #define TTC0_SIZE SZ_4K | 33 | #define TTC0_SIZE SZ_4K |
@@ -36,12 +37,17 @@ | |||
36 | #define SCU_PERIPH_SIZE SZ_8K | 37 | #define SCU_PERIPH_SIZE SZ_8K |
37 | #define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) | 38 | #define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) |
38 | 39 | ||
40 | #if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) | ||
41 | # define LL_UART_PADDR UART1_PHYS | ||
42 | #else | ||
43 | # define LL_UART_PADDR UART0_PHYS | ||
44 | #endif | ||
45 | |||
46 | #define LL_UART_VADDR UART_VIRT | ||
47 | |||
39 | /* The following are intended for the devices that are mapped early */ | 48 | /* The following are intended for the devices that are mapped early */ |
40 | 49 | ||
41 | #define TTC0_BASE IOMEM(TTC0_VIRT) | 50 | #define TTC0_BASE IOMEM(TTC0_VIRT) |
42 | #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) | 51 | #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) |
43 | 52 | ||
44 | #define LL_UART_PADDR UART0_PHYS | ||
45 | #define LL_UART_VADDR UART0_VIRT | ||
46 | |||
47 | #endif | 53 | #endif |
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index c2c96cc7d6e7..9662306aa12f 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c | |||
@@ -23,32 +23,15 @@ | |||
23 | #include <linux/clocksource.h> | 23 | #include <linux/clocksource.h> |
24 | #include <linux/clockchips.h> | 24 | #include <linux/clockchips.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/of.h> | ||
27 | #include <linux/of_address.h> | ||
28 | #include <linux/of_irq.h> | ||
29 | #include <linux/slab.h> | ||
30 | #include <linux/clk-provider.h> | ||
26 | 31 | ||
27 | #include <asm/mach/time.h> | ||
28 | #include <mach/zynq_soc.h> | 32 | #include <mach/zynq_soc.h> |
29 | #include "common.h" | 33 | #include "common.h" |
30 | 34 | ||
31 | #define IRQ_TIMERCOUNTER0 42 | ||
32 | |||
33 | /* | ||
34 | * This driver configures the 2 16-bit count-up timers as follows: | ||
35 | * | ||
36 | * T1: Timer 1, clocksource for generic timekeeping | ||
37 | * T2: Timer 2, clockevent source for hrtimers | ||
38 | * T3: Timer 3, <unused> | ||
39 | * | ||
40 | * The input frequency to the timer module for emulation is 2.5MHz which is | ||
41 | * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32, | ||
42 | * the timers are clocked at 78.125KHz (12.8 us resolution). | ||
43 | * | ||
44 | * The input frequency to the timer module in silicon will be 200MHz. With the | ||
45 | * pre-scaler of 32, the timers are clocked at 6.25MHz (160ns resolution). | ||
46 | */ | ||
47 | #define XTTCPSS_CLOCKSOURCE 0 /* Timer 1 as a generic timekeeping */ | ||
48 | #define XTTCPSS_CLOCKEVENT 1 /* Timer 2 as a clock event */ | ||
49 | |||
50 | #define XTTCPSS_TIMER_BASE TTC0_BASE | ||
51 | #define XTTCPCC_EVENT_TIMER_IRQ (IRQ_TIMERCOUNTER0 + 1) | ||
52 | /* | 35 | /* |
53 | * Timer Register Offset Definitions of Timer 1, Increment base address by 4 | 36 | * Timer Register Offset Definitions of Timer 1, Increment base address by 4 |
54 | * and use same offsets for Timer 2 | 37 | * and use same offsets for Timer 2 |
@@ -65,9 +48,14 @@ | |||
65 | 48 | ||
66 | #define XTTCPSS_CNT_CNTRL_DISABLE_MASK 0x1 | 49 | #define XTTCPSS_CNT_CNTRL_DISABLE_MASK 0x1 |
67 | 50 | ||
68 | /* Setup the timers to use pre-scaling */ | 51 | /* Setup the timers to use pre-scaling, using a fixed value for now that will |
69 | 52 | * work across most input frequency, but it may need to be more dynamic | |
70 | #define TIMER_RATE (PERIPHERAL_CLOCK_RATE / 32) | 53 | */ |
54 | #define PRESCALE_EXPONENT 11 /* 2 ^ PRESCALE_EXPONENT = PRESCALE */ | ||
55 | #define PRESCALE 2048 /* The exponent must match this */ | ||
56 | #define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1) | ||
57 | #define CLK_CNTRL_PRESCALE_EN 1 | ||
58 | #define CNT_CNTRL_RESET (1<<4) | ||
71 | 59 | ||
72 | /** | 60 | /** |
73 | * struct xttcpss_timer - This definition defines local timer structure | 61 | * struct xttcpss_timer - This definition defines local timer structure |
@@ -75,11 +63,25 @@ | |||
75 | * @base_addr: Base address of timer | 63 | * @base_addr: Base address of timer |
76 | **/ | 64 | **/ |
77 | struct xttcpss_timer { | 65 | struct xttcpss_timer { |
78 | void __iomem *base_addr; | 66 | void __iomem *base_addr; |
79 | }; | 67 | }; |
80 | 68 | ||
81 | static struct xttcpss_timer timers[2]; | 69 | struct xttcpss_timer_clocksource { |
82 | static struct clock_event_device xttcpss_clockevent; | 70 | struct xttcpss_timer xttc; |
71 | struct clocksource cs; | ||
72 | }; | ||
73 | |||
74 | #define to_xttcpss_timer_clksrc(x) \ | ||
75 | container_of(x, struct xttcpss_timer_clocksource, cs) | ||
76 | |||
77 | struct xttcpss_timer_clockevent { | ||
78 | struct xttcpss_timer xttc; | ||
79 | struct clock_event_device ce; | ||
80 | struct clk *clk; | ||
81 | }; | ||
82 | |||
83 | #define to_xttcpss_timer_clkevent(x) \ | ||
84 | container_of(x, struct xttcpss_timer_clockevent, ce) | ||
83 | 85 | ||
84 | /** | 86 | /** |
85 | * xttcpss_set_interval - Set the timer interval value | 87 | * xttcpss_set_interval - Set the timer interval value |
@@ -101,7 +103,7 @@ static void xttcpss_set_interval(struct xttcpss_timer *timer, | |||
101 | 103 | ||
102 | /* Reset the counter (0x10) so that it starts from 0, one-shot | 104 | /* Reset the counter (0x10) so that it starts from 0, one-shot |
103 | mode makes this needed for timing to be right. */ | 105 | mode makes this needed for timing to be right. */ |
104 | ctrl_reg |= 0x10; | 106 | ctrl_reg |= CNT_CNTRL_RESET; |
105 | ctrl_reg &= ~XTTCPSS_CNT_CNTRL_DISABLE_MASK; | 107 | ctrl_reg &= ~XTTCPSS_CNT_CNTRL_DISABLE_MASK; |
106 | __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET); | 108 | __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET); |
107 | } | 109 | } |
@@ -116,90 +118,31 @@ static void xttcpss_set_interval(struct xttcpss_timer *timer, | |||
116 | **/ | 118 | **/ |
117 | static irqreturn_t xttcpss_clock_event_interrupt(int irq, void *dev_id) | 119 | static irqreturn_t xttcpss_clock_event_interrupt(int irq, void *dev_id) |
118 | { | 120 | { |
119 | struct clock_event_device *evt = &xttcpss_clockevent; | 121 | struct xttcpss_timer_clockevent *xttce = dev_id; |
120 | struct xttcpss_timer *timer = dev_id; | 122 | struct xttcpss_timer *timer = &xttce->xttc; |
121 | 123 | ||
122 | /* Acknowledge the interrupt and call event handler */ | 124 | /* Acknowledge the interrupt and call event handler */ |
123 | __raw_writel(__raw_readl(timer->base_addr + XTTCPSS_ISR_OFFSET), | 125 | __raw_writel(__raw_readl(timer->base_addr + XTTCPSS_ISR_OFFSET), |
124 | timer->base_addr + XTTCPSS_ISR_OFFSET); | 126 | timer->base_addr + XTTCPSS_ISR_OFFSET); |
125 | 127 | ||
126 | evt->event_handler(evt); | 128 | xttce->ce.event_handler(&xttce->ce); |
127 | 129 | ||
128 | return IRQ_HANDLED; | 130 | return IRQ_HANDLED; |
129 | } | 131 | } |
130 | 132 | ||
131 | static struct irqaction event_timer_irq = { | ||
132 | .name = "xttcpss clockevent", | ||
133 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
134 | .handler = xttcpss_clock_event_interrupt, | ||
135 | }; | ||
136 | |||
137 | /** | 133 | /** |
138 | * xttcpss_timer_hardware_init - Initialize the timer hardware | 134 | * __xttc_clocksource_read - Reads the timer counter register |
139 | * | ||
140 | * Initialize the hardware to start the clock source, get the clock | ||
141 | * event timer ready to use, and hook up the interrupt. | ||
142 | **/ | ||
143 | static void __init xttcpss_timer_hardware_init(void) | ||
144 | { | ||
145 | /* Setup the clock source counter to be an incrementing counter | ||
146 | * with no interrupt and it rolls over at 0xFFFF. Pre-scale | ||
147 | it by 32 also. Let it start running now. | ||
148 | */ | ||
149 | timers[XTTCPSS_CLOCKSOURCE].base_addr = XTTCPSS_TIMER_BASE; | ||
150 | |||
151 | __raw_writel(0x0, timers[XTTCPSS_CLOCKSOURCE].base_addr + | ||
152 | XTTCPSS_IER_OFFSET); | ||
153 | __raw_writel(0x9, timers[XTTCPSS_CLOCKSOURCE].base_addr + | ||
154 | XTTCPSS_CLK_CNTRL_OFFSET); | ||
155 | __raw_writel(0x10, timers[XTTCPSS_CLOCKSOURCE].base_addr + | ||
156 | XTTCPSS_CNT_CNTRL_OFFSET); | ||
157 | |||
158 | /* Setup the clock event timer to be an interval timer which | ||
159 | * is prescaled by 32 using the interval interrupt. Leave it | ||
160 | * disabled for now. | ||
161 | */ | ||
162 | |||
163 | timers[XTTCPSS_CLOCKEVENT].base_addr = XTTCPSS_TIMER_BASE + 4; | ||
164 | |||
165 | __raw_writel(0x23, timers[XTTCPSS_CLOCKEVENT].base_addr + | ||
166 | XTTCPSS_CNT_CNTRL_OFFSET); | ||
167 | __raw_writel(0x9, timers[XTTCPSS_CLOCKEVENT].base_addr + | ||
168 | XTTCPSS_CLK_CNTRL_OFFSET); | ||
169 | __raw_writel(0x1, timers[XTTCPSS_CLOCKEVENT].base_addr + | ||
170 | XTTCPSS_IER_OFFSET); | ||
171 | |||
172 | /* Setup IRQ the clock event timer */ | ||
173 | event_timer_irq.dev_id = &timers[XTTCPSS_CLOCKEVENT]; | ||
174 | setup_irq(XTTCPCC_EVENT_TIMER_IRQ, &event_timer_irq); | ||
175 | } | ||
176 | |||
177 | /** | ||
178 | * __raw_readl_cycles - Reads the timer counter register | ||
179 | * | 135 | * |
180 | * returns: Current timer counter register value | 136 | * returns: Current timer counter register value |
181 | **/ | 137 | **/ |
182 | static cycle_t __raw_readl_cycles(struct clocksource *cs) | 138 | static cycle_t __xttc_clocksource_read(struct clocksource *cs) |
183 | { | 139 | { |
184 | struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKSOURCE]; | 140 | struct xttcpss_timer *timer = &to_xttcpss_timer_clksrc(cs)->xttc; |
185 | 141 | ||
186 | return (cycle_t)__raw_readl(timer->base_addr + | 142 | return (cycle_t)__raw_readl(timer->base_addr + |
187 | XTTCPSS_COUNT_VAL_OFFSET); | 143 | XTTCPSS_COUNT_VAL_OFFSET); |
188 | } | 144 | } |
189 | 145 | ||
190 | |||
191 | /* | ||
192 | * Instantiate and initialize the clock source structure | ||
193 | */ | ||
194 | static struct clocksource clocksource_xttcpss = { | ||
195 | .name = "xttcpss_timer1", | ||
196 | .rating = 200, /* Reasonable clock source */ | ||
197 | .read = __raw_readl_cycles, | ||
198 | .mask = CLOCKSOURCE_MASK(16), | ||
199 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
200 | }; | ||
201 | |||
202 | |||
203 | /** | 146 | /** |
204 | * xttcpss_set_next_event - Sets the time interval for next event | 147 | * xttcpss_set_next_event - Sets the time interval for next event |
205 | * | 148 | * |
@@ -211,7 +154,8 @@ static struct clocksource clocksource_xttcpss = { | |||
211 | static int xttcpss_set_next_event(unsigned long cycles, | 154 | static int xttcpss_set_next_event(unsigned long cycles, |
212 | struct clock_event_device *evt) | 155 | struct clock_event_device *evt) |
213 | { | 156 | { |
214 | struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT]; | 157 | struct xttcpss_timer_clockevent *xttce = to_xttcpss_timer_clkevent(evt); |
158 | struct xttcpss_timer *timer = &xttce->xttc; | ||
215 | 159 | ||
216 | xttcpss_set_interval(timer, cycles); | 160 | xttcpss_set_interval(timer, cycles); |
217 | return 0; | 161 | return 0; |
@@ -226,12 +170,15 @@ static int xttcpss_set_next_event(unsigned long cycles, | |||
226 | static void xttcpss_set_mode(enum clock_event_mode mode, | 170 | static void xttcpss_set_mode(enum clock_event_mode mode, |
227 | struct clock_event_device *evt) | 171 | struct clock_event_device *evt) |
228 | { | 172 | { |
229 | struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT]; | 173 | struct xttcpss_timer_clockevent *xttce = to_xttcpss_timer_clkevent(evt); |
174 | struct xttcpss_timer *timer = &xttce->xttc; | ||
230 | u32 ctrl_reg; | 175 | u32 ctrl_reg; |
231 | 176 | ||
232 | switch (mode) { | 177 | switch (mode) { |
233 | case CLOCK_EVT_MODE_PERIODIC: | 178 | case CLOCK_EVT_MODE_PERIODIC: |
234 | xttcpss_set_interval(timer, TIMER_RATE / HZ); | 179 | xttcpss_set_interval(timer, |
180 | DIV_ROUND_CLOSEST(clk_get_rate(xttce->clk), | ||
181 | PRESCALE * HZ)); | ||
235 | break; | 182 | break; |
236 | case CLOCK_EVT_MODE_ONESHOT: | 183 | case CLOCK_EVT_MODE_ONESHOT: |
237 | case CLOCK_EVT_MODE_UNUSED: | 184 | case CLOCK_EVT_MODE_UNUSED: |
@@ -252,15 +199,106 @@ static void xttcpss_set_mode(enum clock_event_mode mode, | |||
252 | } | 199 | } |
253 | } | 200 | } |
254 | 201 | ||
255 | /* | 202 | static void __init zynq_ttc_setup_clocksource(struct device_node *np, |
256 | * Instantiate and initialize the clock event structure | 203 | void __iomem *base) |
257 | */ | 204 | { |
258 | static struct clock_event_device xttcpss_clockevent = { | 205 | struct xttcpss_timer_clocksource *ttccs; |
259 | .name = "xttcpss_timer2", | 206 | struct clk *clk; |
260 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 207 | int err; |
261 | .set_next_event = xttcpss_set_next_event, | 208 | u32 reg; |
262 | .set_mode = xttcpss_set_mode, | 209 | |
263 | .rating = 200, | 210 | ttccs = kzalloc(sizeof(*ttccs), GFP_KERNEL); |
211 | if (WARN_ON(!ttccs)) | ||
212 | return; | ||
213 | |||
214 | err = of_property_read_u32(np, "reg", ®); | ||
215 | if (WARN_ON(err)) | ||
216 | return; | ||
217 | |||
218 | clk = of_clk_get_by_name(np, "cpu_1x"); | ||
219 | if (WARN_ON(IS_ERR(clk))) | ||
220 | return; | ||
221 | |||
222 | err = clk_prepare_enable(clk); | ||
223 | if (WARN_ON(err)) | ||
224 | return; | ||
225 | |||
226 | ttccs->xttc.base_addr = base + reg * 4; | ||
227 | |||
228 | ttccs->cs.name = np->name; | ||
229 | ttccs->cs.rating = 200; | ||
230 | ttccs->cs.read = __xttc_clocksource_read; | ||
231 | ttccs->cs.mask = CLOCKSOURCE_MASK(16); | ||
232 | ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS; | ||
233 | |||
234 | __raw_writel(0x0, ttccs->xttc.base_addr + XTTCPSS_IER_OFFSET); | ||
235 | __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN, | ||
236 | ttccs->xttc.base_addr + XTTCPSS_CLK_CNTRL_OFFSET); | ||
237 | __raw_writel(CNT_CNTRL_RESET, | ||
238 | ttccs->xttc.base_addr + XTTCPSS_CNT_CNTRL_OFFSET); | ||
239 | |||
240 | err = clocksource_register_hz(&ttccs->cs, clk_get_rate(clk) / PRESCALE); | ||
241 | if (WARN_ON(err)) | ||
242 | return; | ||
243 | } | ||
244 | |||
245 | static void __init zynq_ttc_setup_clockevent(struct device_node *np, | ||
246 | void __iomem *base) | ||
247 | { | ||
248 | struct xttcpss_timer_clockevent *ttcce; | ||
249 | int err, irq; | ||
250 | u32 reg; | ||
251 | |||
252 | ttcce = kzalloc(sizeof(*ttcce), GFP_KERNEL); | ||
253 | if (WARN_ON(!ttcce)) | ||
254 | return; | ||
255 | |||
256 | err = of_property_read_u32(np, "reg", ®); | ||
257 | if (WARN_ON(err)) | ||
258 | return; | ||
259 | |||
260 | ttcce->xttc.base_addr = base + reg * 4; | ||
261 | |||
262 | ttcce->clk = of_clk_get_by_name(np, "cpu_1x"); | ||
263 | if (WARN_ON(IS_ERR(ttcce->clk))) | ||
264 | return; | ||
265 | |||
266 | err = clk_prepare_enable(ttcce->clk); | ||
267 | if (WARN_ON(err)) | ||
268 | return; | ||
269 | |||
270 | irq = irq_of_parse_and_map(np, 0); | ||
271 | if (WARN_ON(!irq)) | ||
272 | return; | ||
273 | |||
274 | ttcce->ce.name = np->name; | ||
275 | ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; | ||
276 | ttcce->ce.set_next_event = xttcpss_set_next_event; | ||
277 | ttcce->ce.set_mode = xttcpss_set_mode; | ||
278 | ttcce->ce.rating = 200; | ||
279 | ttcce->ce.irq = irq; | ||
280 | |||
281 | __raw_writel(0x23, ttcce->xttc.base_addr + XTTCPSS_CNT_CNTRL_OFFSET); | ||
282 | __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN, | ||
283 | ttcce->xttc.base_addr + XTTCPSS_CLK_CNTRL_OFFSET); | ||
284 | __raw_writel(0x1, ttcce->xttc.base_addr + XTTCPSS_IER_OFFSET); | ||
285 | |||
286 | err = request_irq(irq, xttcpss_clock_event_interrupt, IRQF_TIMER, | ||
287 | np->name, ttcce); | ||
288 | if (WARN_ON(err)) | ||
289 | return; | ||
290 | |||
291 | clockevents_config_and_register(&ttcce->ce, | ||
292 | clk_get_rate(ttcce->clk) / PRESCALE, | ||
293 | 1, 0xfffe); | ||
294 | } | ||
295 | |||
296 | static const __initconst struct of_device_id zynq_ttc_match[] = { | ||
297 | { .compatible = "xlnx,ttc-counter-clocksource", | ||
298 | .data = zynq_ttc_setup_clocksource, }, | ||
299 | { .compatible = "xlnx,ttc-counter-clockevent", | ||
300 | .data = zynq_ttc_setup_clockevent, }, | ||
301 | {} | ||
264 | }; | 302 | }; |
265 | 303 | ||
266 | /** | 304 | /** |
@@ -269,30 +307,27 @@ static struct clock_event_device xttcpss_clockevent = { | |||
269 | * Initializes the timer hardware and register the clock source and clock event | 307 | * Initializes the timer hardware and register the clock source and clock event |
270 | * timers with Linux kernal timer framework | 308 | * timers with Linux kernal timer framework |
271 | **/ | 309 | **/ |
272 | static void __init xttcpss_timer_init(void) | 310 | void __init xttcpss_timer_init(void) |
273 | { | 311 | { |
274 | xttcpss_timer_hardware_init(); | 312 | struct device_node *np; |
275 | clocksource_register_hz(&clocksource_xttcpss, TIMER_RATE); | 313 | |
276 | 314 | for_each_compatible_node(np, NULL, "xlnx,ttc") { | |
277 | /* Calculate the parameters to allow the clockevent to operate using | 315 | struct device_node *np_chld; |
278 | integer math | 316 | void __iomem *base; |
279 | */ | 317 | |
280 | clockevents_calc_mult_shift(&xttcpss_clockevent, TIMER_RATE, 4); | 318 | base = of_iomap(np, 0); |
281 | 319 | if (WARN_ON(!base)) | |
282 | xttcpss_clockevent.max_delta_ns = | 320 | return; |
283 | clockevent_delta2ns(0xfffe, &xttcpss_clockevent); | 321 | |
284 | xttcpss_clockevent.min_delta_ns = | 322 | for_each_available_child_of_node(np, np_chld) { |
285 | clockevent_delta2ns(1, &xttcpss_clockevent); | 323 | int (*cb)(struct device_node *np, void __iomem *base); |
286 | 324 | const struct of_device_id *match; | |
287 | /* Indicate that clock event is on 1st CPU as SMP boot needs it */ | 325 | |
288 | 326 | match = of_match_node(zynq_ttc_match, np_chld); | |
289 | xttcpss_clockevent.cpumask = cpumask_of(0); | 327 | if (match) { |
290 | clockevents_register_device(&xttcpss_clockevent); | 328 | cb = match->data; |
329 | cb(np_chld, base); | ||
330 | } | ||
331 | } | ||
332 | } | ||
291 | } | 333 | } |
292 | |||
293 | /* | ||
294 | * Instantiate and initialize the system timer structure | ||
295 | */ | ||
296 | struct sys_timer xttcpss_sys_timer = { | ||
297 | .init = xttcpss_timer_init, | ||
298 | }; | ||
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index 1867944415ca..8db0b981ca64 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c | |||
@@ -41,7 +41,7 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) | |||
41 | static int __init orion_add_irq_domain(struct device_node *np, | 41 | static int __init orion_add_irq_domain(struct device_node *np, |
42 | struct device_node *interrupt_parent) | 42 | struct device_node *interrupt_parent) |
43 | { | 43 | { |
44 | int i = 0, irq_gpio; | 44 | int i = 0; |
45 | void __iomem *base; | 45 | void __iomem *base; |
46 | 46 | ||
47 | do { | 47 | do { |
@@ -54,10 +54,6 @@ static int __init orion_add_irq_domain(struct device_node *np, | |||
54 | 54 | ||
55 | irq_domain_add_legacy(np, i * 32, 0, 0, | 55 | irq_domain_add_legacy(np, i * 32, 0, 0, |
56 | &irq_domain_simple_ops, NULL); | 56 | &irq_domain_simple_ops, NULL); |
57 | |||
58 | irq_gpio = i * 32; | ||
59 | orion_gpio_of_init(irq_gpio); | ||
60 | |||
61 | return 0; | 57 | return 0; |
62 | } | 58 | } |
63 | 59 | ||
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index a17d7b3e3725..bc50b20a8ffc 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -929,6 +929,7 @@ struct platform_device s5p_device_mfc_r = { | |||
929 | .coherent_dma_mask = DMA_BIT_MASK(32), | 929 | .coherent_dma_mask = DMA_BIT_MASK(32), |
930 | }, | 930 | }, |
931 | }; | 931 | }; |
932 | |||
932 | #endif /* CONFIG_S5P_DEV_MFC */ | 933 | #endif /* CONFIG_S5P_DEV_MFC */ |
933 | 934 | ||
934 | /* MIPI CSIS */ | 935 | /* MIPI CSIS */ |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 5da4b4f38f40..133e3e4170fb 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -133,8 +133,6 @@ extern struct platform_device exynos4_device_pcm1; | |||
133 | extern struct platform_device exynos4_device_pcm2; | 133 | extern struct platform_device exynos4_device_pcm2; |
134 | extern struct platform_device exynos4_device_spdif; | 134 | extern struct platform_device exynos4_device_spdif; |
135 | 135 | ||
136 | extern struct platform_device exynos_device_drm; | ||
137 | |||
138 | extern struct platform_device samsung_asoc_dma; | 136 | extern struct platform_device samsung_asoc_dma; |
139 | extern struct platform_device samsung_asoc_idma; | 137 | extern struct platform_device samsung_asoc_idma; |
140 | extern struct platform_device samsung_device_keypad; | 138 | extern struct platform_device samsung_device_keypad; |
diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h index ac13227272f0..e6d7c42d68b6 100644 --- a/arch/arm/plat-samsung/include/plat/mfc.h +++ b/arch/arm/plat-samsung/include/plat/mfc.h | |||
@@ -10,6 +10,14 @@ | |||
10 | #ifndef __PLAT_SAMSUNG_MFC_H | 10 | #ifndef __PLAT_SAMSUNG_MFC_H |
11 | #define __PLAT_SAMSUNG_MFC_H __FILE__ | 11 | #define __PLAT_SAMSUNG_MFC_H __FILE__ |
12 | 12 | ||
13 | struct s5p_mfc_dt_meminfo { | ||
14 | unsigned long loff; | ||
15 | unsigned long lsize; | ||
16 | unsigned long roff; | ||
17 | unsigned long rsize; | ||
18 | char *compatible; | ||
19 | }; | ||
20 | |||
13 | /** | 21 | /** |
14 | * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver | 22 | * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver |
15 | * @rbase: base address for MFC 'right' memory interface | 23 | * @rbase: base address for MFC 'right' memory interface |
@@ -24,4 +32,7 @@ | |||
24 | void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, | 32 | void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, |
25 | phys_addr_t lbase, unsigned int lsize); | 33 | phys_addr_t lbase, unsigned int lsize); |
26 | 34 | ||
35 | int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname, | ||
36 | int depth, void *data); | ||
37 | |||
27 | #endif /* __PLAT_SAMSUNG_MFC_H */ | 38 | #endif /* __PLAT_SAMSUNG_MFC_H */ |
diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c index ad6089465e2a..5ec104b5408b 100644 --- a/arch/arm/plat-samsung/s5p-dev-mfc.c +++ b/arch/arm/plat-samsung/s5p-dev-mfc.c | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/memblock.h> | 15 | #include <linux/memblock.h> |
16 | #include <linux/ioport.h> | 16 | #include <linux/ioport.h> |
17 | #include <linux/of_fdt.h> | ||
18 | #include <linux/of.h> | ||
17 | 19 | ||
18 | #include <mach/map.h> | 20 | #include <mach/map.h> |
19 | #include <plat/devs.h> | 21 | #include <plat/devs.h> |
@@ -69,3 +71,35 @@ static int __init s5p_mfc_memory_init(void) | |||
69 | return 0; | 71 | return 0; |
70 | } | 72 | } |
71 | device_initcall(s5p_mfc_memory_init); | 73 | device_initcall(s5p_mfc_memory_init); |
74 | |||
75 | #ifdef CONFIG_OF | ||
76 | int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname, | ||
77 | int depth, void *data) | ||
78 | { | ||
79 | __be32 *prop; | ||
80 | unsigned long len; | ||
81 | struct s5p_mfc_dt_meminfo *mfc_mem = data; | ||
82 | |||
83 | if (!data) | ||
84 | return 0; | ||
85 | |||
86 | if (!of_flat_dt_is_compatible(node, mfc_mem->compatible)) | ||
87 | return 0; | ||
88 | |||
89 | prop = of_get_flat_dt_prop(node, "samsung,mfc-l", &len); | ||
90 | if (!prop || (len != 2 * sizeof(unsigned long))) | ||
91 | return 0; | ||
92 | |||
93 | mfc_mem->loff = be32_to_cpu(prop[0]); | ||
94 | mfc_mem->lsize = be32_to_cpu(prop[1]); | ||
95 | |||
96 | prop = of_get_flat_dt_prop(node, "samsung,mfc-r", &len); | ||
97 | if (!prop || (len != 2 * sizeof(unsigned long))) | ||
98 | return 0; | ||
99 | |||
100 | mfc_mem->roff = be32_to_cpu(prop[0]); | ||
101 | mfc_mem->rsize = be32_to_cpu(prop[1]); | ||
102 | |||
103 | return 1; | ||
104 | } | ||
105 | #endif | ||