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authorKevin Hilman <khilman@deeprootsystems.com>2010-02-25 18:36:38 -0500
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-06 18:02:01 -0400
commit28552c2eae472a0a52d1cdb02eb32766c7f690e1 (patch)
treeb996bede5ecde42ad8b95d99b494418b1acd2a90 /arch/arm
parent66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8 (diff)
davinci: misc cleanups from sparse
- Convert data/functions to static - include headers for missing declarations - pointer cleanups: struct foo *__iomem f --> struct foo __iomem *f; Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c2
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c2
-rw-r--r--arch/arm/mach-davinci/cdce949.c1
-rw-r--r--arch/arm/mach-davinci/clock.c1
-rw-r--r--arch/arm/mach-davinci/devices.c2
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm365.c2
-rw-r--r--arch/arm/mach-davinci/dm644x.c4
-rw-r--r--arch/arm/mach-davinci/dm646x.c6
-rw-r--r--arch/arm/mach-davinci/gpio.c24
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h8
-rw-r--r--arch/arm/mach-davinci/mux.c1
13 files changed, 31 insertions, 26 deletions
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 976e11b7fa4a..95cef1f46ef2 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -111,7 +111,7 @@ static struct platform_device davinci_evm_norflash_device = {
111 * It may used instead of the (default) NOR chip to boot, using TI's 111 * It may used instead of the (default) NOR chip to boot, using TI's
112 * tools to install the secondary boot loader (UBL) and U-Boot. 112 * tools to install the secondary boot loader (UBL) and U-Boot.
113 */ 113 */
114struct mtd_partition davinci_evm_nandflash_partition[] = { 114static struct mtd_partition davinci_evm_nandflash_partition[] = {
115 /* Bootloader layout depends on whose u-boot is installed, but we 115 /* Bootloader layout depends on whose u-boot is installed, but we
116 * can hide all the details. 116 * can hide all the details.
117 * - block 0 for u-boot environment ... in mainline u-boot 117 * - block 0 for u-boot environment ... in mainline u-boot
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index bd9ca079b69d..1fadc68d9fbb 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -60,7 +60,7 @@
60 60
61#define NAND_BLOCK_SIZE SZ_128K 61#define NAND_BLOCK_SIZE SZ_128K
62 62
63struct mtd_partition davinci_ntosd2_nandflash_partition[] = { 63static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
64 { 64 {
65 /* UBL (a few copies) plus U-Boot */ 65 /* UBL (a few copies) plus U-Boot */
66 .name = "bootloader", 66 .name = "bootloader",
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 08d373bfcc8a..a7cf810bb13e 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -48,7 +48,7 @@
48#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000 48#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
49#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 49#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
50 50
51struct mtd_partition davinci_sffsdr_nandflash_partition[] = { 51static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
52 /* U-Boot Environment: Block 0 52 /* U-Boot Environment: Block 0
53 * UBL: Block 1 53 * UBL: Block 1
54 * U-Boot: Blocks 6-7 (256 kb) 54 * U-Boot: Blocks 6-7 (256 kb)
diff --git a/arch/arm/mach-davinci/cdce949.c b/arch/arm/mach-davinci/cdce949.c
index aec375690543..ba8b12b2913b 100644
--- a/arch/arm/mach-davinci/cdce949.c
+++ b/arch/arm/mach-davinci/cdce949.c
@@ -19,6 +19,7 @@
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20 20
21#include <mach/clock.h> 21#include <mach/clock.h>
22#include <mach/cdce949.h>
22 23
23#include "clock.h" 24#include "clock.h"
24 25
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index bf6218ee94e1..058c77f72a07 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -22,6 +22,7 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
25#include <mach/clock.h>
25#include <mach/psc.h> 26#include <mach/psc.h>
26#include <mach/cputype.h> 27#include <mach/cputype.h>
27#include "clock.h" 28#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 147949650c25..ef28080b1fda 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -23,6 +23,8 @@
23#include <mach/mmc.h> 23#include <mach/mmc.h>
24#include <mach/time.h> 24#include <mach/time.h>
25 25
26#include "clock.h"
27
26#define DAVINCI_I2C_BASE 0x01C21000 28#define DAVINCI_I2C_BASE 0x01C21000
27#define DAVINCI_MMCSD0_BASE 0x01E10000 29#define DAVINCI_MMCSD0_BASE 0x01E10000
28#define DM355_MMCSD0_BASE 0x01E11000 30#define DM355_MMCSD0_BASE 0x01E11000
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 3dc0a88712eb..5efce70ccdd0 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -798,7 +798,7 @@ static void __iomem *dm355_psc_bases[] = {
798 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) 798 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
799 * T1_TOP: Timer 1, top : <unused> 799 * T1_TOP: Timer 1, top : <unused>
800 */ 800 */
801struct davinci_timer_info dm355_timer_info = { 801static struct davinci_timer_info dm355_timer_info = {
802 .timers = davinci_timer_instance, 802 .timers = davinci_timer_instance,
803 .clockevent_id = T0_BOT, 803 .clockevent_id = T0_BOT,
804 .clocksource_id = T0_TOP, 804 .clocksource_id = T0_TOP,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 0d6ee583f65c..871be5af2735 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1010,7 +1010,7 @@ static void __iomem *dm365_psc_bases[] = {
1010 IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), 1010 IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
1011}; 1011};
1012 1012
1013struct davinci_timer_info dm365_timer_info = { 1013static struct davinci_timer_info dm365_timer_info = {
1014 .timers = davinci_timer_instance, 1014 .timers = davinci_timer_instance,
1015 .clockevent_id = T0_BOT, 1015 .clockevent_id = T0_BOT,
1016 .clocksource_id = T0_TOP, 1016 .clocksource_id = T0_TOP,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2f2ae8bc77bb..23cbe9d04bc5 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -277,7 +277,7 @@ static struct clk timer2_clk = {
277 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 277 .usecount = 1, /* REVISIT: why cant' this be disabled? */
278}; 278};
279 279
280struct clk_lookup dm644x_clks[] = { 280static struct clk_lookup dm644x_clks[] = {
281 CLK(NULL, "ref", &ref_clk), 281 CLK(NULL, "ref", &ref_clk),
282 CLK(NULL, "pll1", &pll1_clk), 282 CLK(NULL, "pll1", &pll1_clk),
283 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), 283 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
@@ -687,7 +687,7 @@ static void __iomem *dm644x_psc_bases[] = {
687 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) 687 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
688 * T1_TOP: Timer 1, top : <unused> 688 * T1_TOP: Timer 1, top : <unused>
689 */ 689 */
690struct davinci_timer_info dm644x_timer_info = { 690static struct davinci_timer_info dm644x_timer_info = {
691 .timers = davinci_timer_instance, 691 .timers = davinci_timer_instance,
692 .clockevent_id = T0_BOT, 692 .clockevent_id = T0_BOT,
693 .clocksource_id = T0_TOP, 693 .clocksource_id = T0_TOP,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 893baf4ad37d..b67b997d0bbc 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -311,7 +311,7 @@ static struct clk vpif1_clk = {
311 .flags = ALWAYS_ENABLED, 311 .flags = ALWAYS_ENABLED,
312}; 312};
313 313
314struct clk_lookup dm646x_clks[] = { 314static struct clk_lookup dm646x_clks[] = {
315 CLK(NULL, "ref", &ref_clk), 315 CLK(NULL, "ref", &ref_clk),
316 CLK(NULL, "aux", &aux_clkin), 316 CLK(NULL, "aux", &aux_clkin),
317 CLK(NULL, "pll1", &pll1_clk), 317 CLK(NULL, "pll1", &pll1_clk),
@@ -797,7 +797,7 @@ static void __iomem *dm646x_psc_bases[] = {
797 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) 797 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
798 * T1_TOP: Timer 1, top : <unused> 798 * T1_TOP: Timer 1, top : <unused>
799 */ 799 */
800struct davinci_timer_info dm646x_timer_info = { 800static struct davinci_timer_info dm646x_timer_info = {
801 .timers = davinci_timer_instance, 801 .timers = davinci_timer_instance,
802 .clockevent_id = T0_BOT, 802 .clockevent_id = T0_BOT,
803 .clocksource_id = T0_TOP, 803 .clocksource_id = T0_TOP,
@@ -867,7 +867,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
867 .sram_len = SZ_32K, 867 .sram_len = SZ_32K,
868}; 868};
869 869
870void __init dm646x_init_ide() 870void __init dm646x_init_ide(void)
871{ 871{
872 davinci_cfg_reg(DM646X_ATAEN); 872 davinci_cfg_reg(DM646X_ATAEN);
873 platform_device_register(&ide_dev); 873 platform_device_register(&ide_dev);
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 744755b53236..3f7706266ca6 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -24,14 +24,14 @@ static DEFINE_SPINLOCK(gpio_lock);
24 24
25struct davinci_gpio { 25struct davinci_gpio {
26 struct gpio_chip chip; 26 struct gpio_chip chip;
27 struct gpio_controller *__iomem regs; 27 struct gpio_controller __iomem *regs;
28 int irq_base; 28 int irq_base;
29}; 29};
30 30
31static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; 31static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
32 32
33/* create a non-inlined version */ 33/* create a non-inlined version */
34static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio) 34static struct gpio_controller __iomem __init *gpio2controller(unsigned gpio)
35{ 35{
36 return __gpio_to_controller(gpio); 36 return __gpio_to_controller(gpio);
37} 37}
@@ -48,7 +48,7 @@ static int __init davinci_gpio_irq_setup(void);
48static int davinci_direction_in(struct gpio_chip *chip, unsigned offset) 48static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
49{ 49{
50 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 50 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
51 struct gpio_controller *__iomem g = d->regs; 51 struct gpio_controller __iomem *g = d->regs;
52 u32 temp; 52 u32 temp;
53 53
54 spin_lock(&gpio_lock); 54 spin_lock(&gpio_lock);
@@ -70,7 +70,7 @@ static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
70static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) 70static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
71{ 71{
72 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 72 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
73 struct gpio_controller *__iomem g = d->regs; 73 struct gpio_controller __iomem *g = d->regs;
74 74
75 return (1 << offset) & __raw_readl(&g->in_data); 75 return (1 << offset) & __raw_readl(&g->in_data);
76} 76}
@@ -79,7 +79,7 @@ static int
79davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value) 79davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
80{ 80{
81 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 81 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
82 struct gpio_controller *__iomem g = d->regs; 82 struct gpio_controller __iomem *g = d->regs;
83 u32 temp; 83 u32 temp;
84 u32 mask = 1 << offset; 84 u32 mask = 1 << offset;
85 85
@@ -99,7 +99,7 @@ static void
99davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 99davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
100{ 100{
101 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 101 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
102 struct gpio_controller *__iomem g = d->regs; 102 struct gpio_controller __iomem *g = d->regs;
103 103
104 __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data); 104 __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
105} 105}
@@ -161,7 +161,7 @@ pure_initcall(davinci_gpio_setup);
161 161
162static void gpio_irq_disable(unsigned irq) 162static void gpio_irq_disable(unsigned irq)
163{ 163{
164 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 164 struct gpio_controller __iomem *g = get_irq_chip_data(irq);
165 u32 mask = (u32) get_irq_data(irq); 165 u32 mask = (u32) get_irq_data(irq);
166 166
167 __raw_writel(mask, &g->clr_falling); 167 __raw_writel(mask, &g->clr_falling);
@@ -170,7 +170,7 @@ static void gpio_irq_disable(unsigned irq)
170 170
171static void gpio_irq_enable(unsigned irq) 171static void gpio_irq_enable(unsigned irq)
172{ 172{
173 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 173 struct gpio_controller __iomem *g = get_irq_chip_data(irq);
174 u32 mask = (u32) get_irq_data(irq); 174 u32 mask = (u32) get_irq_data(irq);
175 unsigned status = irq_desc[irq].status; 175 unsigned status = irq_desc[irq].status;
176 176
@@ -186,7 +186,7 @@ static void gpio_irq_enable(unsigned irq)
186 186
187static int gpio_irq_type(unsigned irq, unsigned trigger) 187static int gpio_irq_type(unsigned irq, unsigned trigger)
188{ 188{
189 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 189 struct gpio_controller __iomem *g = get_irq_chip_data(irq);
190 u32 mask = (u32) get_irq_data(irq); 190 u32 mask = (u32) get_irq_data(irq);
191 191
192 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 192 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
@@ -215,7 +215,7 @@ static struct irq_chip gpio_irqchip = {
215static void 215static void
216gpio_irq_handler(unsigned irq, struct irq_desc *desc) 216gpio_irq_handler(unsigned irq, struct irq_desc *desc)
217{ 217{
218 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 218 struct gpio_controller __iomem *g = get_irq_chip_data(irq);
219 u32 mask = 0xffff; 219 u32 mask = 0xffff;
220 220
221 /* we only care about one bank */ 221 /* we only care about one bank */
@@ -276,7 +276,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
276 276
277static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) 277static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
278{ 278{
279 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 279 struct gpio_controller __iomem *g = get_irq_chip_data(irq);
280 u32 mask = (u32) get_irq_data(irq); 280 u32 mask = (u32) get_irq_data(irq);
281 281
282 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 282 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
@@ -305,7 +305,7 @@ static int __init davinci_gpio_irq_setup(void)
305 u32 binten = 0; 305 u32 binten = 0;
306 unsigned ngpio, bank_irq; 306 unsigned ngpio, bank_irq;
307 struct davinci_soc_info *soc_info = &davinci_soc_info; 307 struct davinci_soc_info *soc_info = &davinci_soc_info;
308 struct gpio_controller *__iomem g; 308 struct gpio_controller __iomem *g;
309 309
310 ngpio = soc_info->gpio_num; 310 ngpio = soc_info->gpio_num;
311 311
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index f3b8ef878158..0099e6e5aff8 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -67,10 +67,10 @@ struct gpio_controller {
67 * 67 *
68 * These are NOT part of the cross-platform GPIO interface 68 * These are NOT part of the cross-platform GPIO interface
69 */ 69 */
70static inline struct gpio_controller *__iomem 70static inline struct gpio_controller __iomem *
71__gpio_to_controller(unsigned gpio) 71__gpio_to_controller(unsigned gpio)
72{ 72{
73 void *__iomem ptr; 73 void __iomem *ptr;
74 void __iomem *base = davinci_soc_info.gpio_base; 74 void __iomem *base = davinci_soc_info.gpio_base;
75 75
76 if (gpio < 32 * 1) 76 if (gpio < 32 * 1)
@@ -102,7 +102,7 @@ static inline u32 __gpio_mask(unsigned gpio)
102static inline void gpio_set_value(unsigned gpio, int value) 102static inline void gpio_set_value(unsigned gpio, int value)
103{ 103{
104 if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) { 104 if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
105 struct gpio_controller *__iomem g; 105 struct gpio_controller __iomem *g;
106 u32 mask; 106 u32 mask;
107 107
108 g = __gpio_to_controller(gpio); 108 g = __gpio_to_controller(gpio);
@@ -128,7 +128,7 @@ static inline void gpio_set_value(unsigned gpio, int value)
128 */ 128 */
129static inline int gpio_get_value(unsigned gpio) 129static inline int gpio_get_value(unsigned gpio)
130{ 130{
131 struct gpio_controller *__iomem g; 131 struct gpio_controller __iomem *g;
132 132
133 if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO) 133 if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
134 return __gpio_get_value(gpio); 134 return __gpio_get_value(gpio);
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index f757e83415f3..c942c893a2eb 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -21,6 +21,7 @@
21 21
22#include <mach/mux.h> 22#include <mach/mux.h>
23#include <mach/common.h> 23#include <mach/common.h>
24#include <mach/da8xx.h>
24 25
25/* 26/*
26 * Sets the DAVINCI MUX register based on the table 27 * Sets the DAVINCI MUX register based on the table