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authorKukjin Kim <kgene.kim@samsung.com>2012-05-12 18:53:34 -0400
committerKukjin Kim <kgene.kim@samsung.com>2012-05-12 18:53:34 -0400
commit163ec0369be4c26e68385f6cec88d0ee38c8d8e5 (patch)
treef3e441866f8bc1b0548e7d8eddd9548b6aedef5e /arch/arm
parent199642bfe107c411f25fbfc16c9fd49cfef9785d (diff)
parent99dbdd98f271899e023d52b3f4c2bf67cdd7eb56 (diff)
Merge branch 'next/cleanup-plat-s3c24xx' into next/cleanup-plat-s3c24xx-s5p
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/boot/compressed/atags_to_fdt.c2
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9g25ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts6
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9x5cm.dtsi2
-rw-r--r--arch/arm/boot/dts/db8500.dtsi1
-rw-r--r--arch/arm/boot/dts/highbank.dts1
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts4
-rw-r--r--arch/arm/boot/dts/usb_a9g20.dts2
-rw-r--r--arch/arm/boot/dts/versatile-ab.dts2
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts2
-rw-r--r--arch/arm/common/vic.c9
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/mini2440_defconfig2
-rw-r--r--arch/arm/configs/u8500_defconfig9
-rw-r--r--arch/arm/include/asm/barrier.h2
-rw-r--r--arch/arm/include/asm/io.h2
-rw-r--r--arch/arm/include/asm/jump_label.h2
-rw-r--r--arch/arm/include/asm/thread_info.h7
-rw-r--r--arch/arm/include/asm/tls.h4
-rw-r--r--arch/arm/kernel/bios32.c1
-rw-r--r--arch/arm/kernel/insn.c1
-rw-r--r--arch/arm/kernel/irq.c6
-rw-r--r--arch/arm/kernel/kprobes.c2
-rw-r--r--arch/arm/kernel/ptrace.c4
-rw-r--r--arch/arm/kernel/setup.c16
-rw-r--r--arch/arm/kernel/signal.c55
-rw-r--r--arch/arm/kernel/smp.c29
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c6
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c11
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c3
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c5
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c1
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c1
-rw-r--r--arch/arm/mach-at91/clock.c1
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h2
-rw-r--r--arch/arm/mach-at91/include/mach/board.h13
-rw-r--r--arch/arm/mach-at91/include/mach/io.h27
-rw-r--r--arch/arm/mach-at91/setup.c2
-rw-r--r--arch/arm/mach-bcmring/core.c4
-rw-r--r--arch/arm/mach-exynos/Kconfig2
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c24
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c24
-rw-r--r--arch/arm/mach-exynos/common.c17
-rw-r--r--arch/arm/mach-exynos/dev-dwmci.c13
-rw-r--r--arch/arm/mach-exynos/dma.c2
-rw-r--r--arch/arm/mach-exynos/include/mach/debug-macro.S7
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h4
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-clock.h6
-rw-r--r--arch/arm/mach-exynos/include/mach/uncompress.h17
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c2
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c47
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c3
-rw-r--r--arch/arm/mach-imx/clock-imx27.c1
-rw-r--r--arch/arm/mach-imx/clock-imx35.c2
-rw-r--r--arch/arm/mach-imx/imx27-dt.c6
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c9
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c9
-rw-r--r--arch/arm/mach-imx/mach-mx31lilly.c9
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c9
-rw-r--r--arch/arm/mach-imx/mach-mx35_3ds.c2
-rw-r--r--arch/arm/mach-imx/mach-mx53_ard.c8
-rw-r--r--arch/arm/mach-imx/mm-imx5.c2
-rw-r--r--arch/arm/mach-msm/board-halibut.c3
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c25
-rw-r--r--arch/arm/mach-msm/board-trout-panel.c1
-rw-r--r--arch/arm/mach-msm/board-trout.c1
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-msm/proc_comm.c2
-rw-r--r--arch/arm/mach-msm/smd_debug.c8
-rw-r--r--arch/arm/mach-omap1/include/mach/io.h45
-rw-r--r--arch/arm/mach-omap1/mux.c1
-rw-r--r--arch/arm/mach-omap1/timer.c4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c12
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c16
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c6
-rw-r--r--arch/arm/mach-omap2/board-ldp.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c16
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c13
-rw-r--r--arch/arm/mach-omap2/board-overo.c8
-rw-r--r--arch/arm/mach-omap2/board-zoom-debugboard.c9
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c80
-rw-r--r--arch/arm/mach-omap2/clock.c5
-rw-r--r--arch/arm/mach-omap2/clock.h8
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c18
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c5
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c65
-rw-r--r--arch/arm/mach-omap2/hsmmc.c7
-rw-r--r--arch/arm/mach-omap2/include/mach/barriers.h2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c85
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c37
-rw-r--r--arch/arm/mach-omap2/opp.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c38
-rw-r--r--arch/arm/mach-omap2/pm44xx.c10
-rw-r--r--arch/arm/mach-omap2/powerdomain.c8
-rw-r--r--arch/arm/mach-omap2/prm44xx.c21
-rw-r--r--arch/arm/mach-omap2/prm_common.c2
-rw-r--r--arch/arm/mach-omap2/serial.c124
-rw-r--r--arch/arm/mach-omap2/twl-common.c37
-rw-r--r--arch/arm/mach-omap2/twl-common.h10
-rw-r--r--arch/arm/mach-omap2/usb-host.c10
-rw-r--r--arch/arm/mach-pxa/Kconfig1
-rw-r--r--arch/arm/mach-pxa/include/mach/io.h17
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h7
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c21
-rw-r--r--arch/arm/mach-pxa/pxa27x.c6
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig8
-rw-r--r--arch/arm/mach-s3c24xx/Makefile6
-rw-r--r--arch/arm/mach-s3c24xx/common.c (renamed from arch/arm/plat-s3c24xx/cpu.c)69
-rw-r--r--arch/arm/mach-s3c24xx/common.h18
-rw-r--r--arch/arm/mach-s3c24xx/irq-pm.c (renamed from arch/arm/plat-s3c24xx/irq-pm.c)0
-rw-r--r--arch/arm/mach-s3c24xx/pm.c (renamed from arch/arm/plat-s3c24xx/pm.c)0
-rw-r--r--arch/arm/mach-s3c24xx/sleep.S (renamed from arch/arm/plat-s3c24xx/sleep.S)0
-rw-r--r--arch/arm/mach-s5pv210/dma.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c6
-rw-r--r--arch/arm/mach-sa1100/collie.c4
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/collie.h3
-rw-r--r--arch/arm/mach-u300/core.c6
-rw-r--r--arch/arm/mach-u300/i2c.c9
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h150
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/mbox-db5500.c2
-rw-r--r--arch/arm/mach-ux500/platsmp.c2
-rw-r--r--arch/arm/mach-versatile/pci.c10
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/abort-ev6.S17
-rw-r--r--arch/arm/mm/cache-l2x0.c25
-rw-r--r--arch/arm/mm/fault.c2
-rw-r--r--arch/arm/mm/init.c4
-rw-r--r--arch/arm/mm/mmu.c4
-rw-r--r--arch/arm/mm/nommu.c2
-rw-r--r--arch/arm/mm/proc-v7.S12
-rw-r--r--arch/arm/plat-mxc/3ds_debugboard.c2
-rw-r--r--arch/arm/plat-omap/Kconfig1
-rw-r--r--arch/arm/plat-omap/clock.c31
-rw-r--r--arch/arm/plat-omap/dma.c14
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h10
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h16
-rw-r--r--arch/arm/plat-omap/sram.c12
-rw-r--r--arch/arm/plat-s3c24xx/Makefile6
-rw-r--r--arch/arm/plat-s3c24xx/clock.c59
-rw-r--r--arch/arm/plat-s3c24xx/dev-uart.c100
-rw-r--r--arch/arm/plat-samsung/Kconfig1
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h28
-rw-r--r--arch/arm/vfp/vfpmodule.c99
165 files changed, 1111 insertions, 992 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 60c2f9c0ba1a..85d8e2e9ae27 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -338,6 +338,7 @@ config ARCH_AT91
338 select HAVE_CLK 338 select HAVE_CLK
339 select CLKDEV_LOOKUP 339 select CLKDEV_LOOKUP
340 select IRQ_DOMAIN 340 select IRQ_DOMAIN
341 select NEED_MACH_IO_H if PCCARD
341 help 342 help
342 This enables support for systems based on the Atmel AT91RM9200, 343 This enables support for systems based on the Atmel AT91RM9200,
343 AT91SAM9 processors. 344 AT91SAM9 processors.
@@ -1184,6 +1185,15 @@ if !MMU
1184source "arch/arm/Kconfig-nommu" 1185source "arch/arm/Kconfig-nommu"
1185endif 1186endif
1186 1187
1188config ARM_ERRATA_326103
1189 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1190 depends on CPU_V6
1191 help
1192 Executing a SWP instruction to read-only memory does not set bit 11
1193 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1194 treat the access as a read, preventing a COW from occurring and
1195 causing the faulting task to livelock.
1196
1187config ARM_ERRATA_411920 1197config ARM_ERRATA_411920
1188 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1198 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1189 depends on CPU_V6 || CPU_V6K 1199 depends on CPU_V6 || CPU_V6K
diff --git a/arch/arm/boot/compressed/atags_to_fdt.c b/arch/arm/boot/compressed/atags_to_fdt.c
index 6ce11c481178..797f04bedb47 100644
--- a/arch/arm/boot/compressed/atags_to_fdt.c
+++ b/arch/arm/boot/compressed/atags_to_fdt.c
@@ -77,6 +77,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space)
77 } else if (atag->hdr.tag == ATAG_MEM) { 77 } else if (atag->hdr.tag == ATAG_MEM) {
78 if (memcount >= sizeof(mem_reg_property)/4) 78 if (memcount >= sizeof(mem_reg_property)/4)
79 continue; 79 continue;
80 if (!atag->u.mem.size)
81 continue;
80 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start); 82 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start);
81 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size); 83 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size);
82 } else if (atag->hdr.tag == ATAG_INITRD2) { 84 } else if (atag->hdr.tag == ATAG_INITRD2) {
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 5f6045f1766c..dc7e8ce8e6be 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -273,7 +273,7 @@ restart: adr r0, LC0
273 add r0, r0, #0x100 273 add r0, r0, #0x100
274 mov r1, r6 274 mov r1, r6
275 sub r2, sp, r6 275 sub r2, sp, r6
276 blne atags_to_fdt 276 bleq atags_to_fdt
277 277
278 ldmfd sp!, {r0-r3, ip, lr} 278 ldmfd sp!, {r0-r3, ip, lr}
279 sub sp, sp, #0x10000 279 sub sp, sp, #0x10000
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 92f36627e7f8..773ef484037a 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -35,7 +35,7 @@
35 }; 35 };
36 }; 36 };
37 37
38 memory@20000000 { 38 memory {
39 reg = <0x20000000 0x08000000>; 39 reg = <0x20000000 0x08000000>;
40 }; 40 };
41 41
@@ -55,7 +55,6 @@
55 #interrupt-cells = <2>; 55 #interrupt-cells = <2>;
56 compatible = "atmel,at91rm9200-aic"; 56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller; 57 interrupt-controller;
58 interrupt-parent;
59 reg = <0xfffff000 0x200>; 58 reg = <0xfffff000 0x200>;
60 }; 59 };
61 60
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index ac0dc0031dda..7829a4d0cb22 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -37,8 +37,8 @@
37 usb0: ohci@00600000 { 37 usb0: ohci@00600000 {
38 status = "okay"; 38 status = "okay";
39 num-ports = <2>; 39 num-ports = <2>;
40 atmel,vbus-gpio = <&pioD 19 0 40 atmel,vbus-gpio = <&pioD 19 1
41 &pioD 20 0 41 &pioD 20 1
42 >; 42 >;
43 }; 43 };
44 44
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 3d0c32fb218f..c8042147eaa2 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -36,7 +36,7 @@
36 }; 36 };
37 }; 37 };
38 38
39 memory@70000000 { 39 memory {
40 reg = <0x70000000 0x10000000>; 40 reg = <0x70000000 0x10000000>;
41 }; 41 };
42 42
@@ -56,7 +56,6 @@
56 #interrupt-cells = <2>; 56 #interrupt-cells = <2>;
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
61 }; 60 };
62 61
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index c4c8ae4123d5..a3633bd13111 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -17,7 +17,7 @@
17 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"; 17 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
18 }; 18 };
19 19
20 memory@70000000 { 20 memory {
21 reg = <0x70000000 0x4000000>; 21 reg = <0x70000000 0x4000000>;
22 }; 22 };
23 23
@@ -73,8 +73,8 @@
73 usb0: ohci@00700000 { 73 usb0: ohci@00700000 {
74 status = "okay"; 74 status = "okay";
75 num-ports = <2>; 75 num-ports = <2>;
76 atmel,vbus-gpio = <&pioD 1 0 76 atmel,vbus-gpio = <&pioD 1 1
77 &pioD 3 0>; 77 &pioD 3 1>;
78 }; 78 };
79 79
80 usb1: ehci@00800000 { 80 usb1: ehci@00800000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index c111001f254e..dd4ed748469a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -34,7 +34,7 @@
34 }; 34 };
35 }; 35 };
36 36
37 memory@20000000 { 37 memory {
38 reg = <0x20000000 0x10000000>; 38 reg = <0x20000000 0x10000000>;
39 }; 39 };
40 40
@@ -54,7 +54,6 @@
54 #interrupt-cells = <2>; 54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic"; 55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller; 56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>; 57 reg = <0xfffff000 0x200>;
59 }; 58 };
60 59
@@ -201,8 +200,8 @@
201 >; 200 >;
202 atmel,nand-addr-offset = <21>; 201 atmel,nand-addr-offset = <21>;
203 atmel,nand-cmd-offset = <22>; 202 atmel,nand-cmd-offset = <22>;
204 gpios = <&pioC 8 0 203 gpios = <&pioD 5 0
205 &pioC 14 0 204 &pioD 4 0
206 0 205 0
207 >; 206 >;
208 status = "disabled"; 207 status = "disabled";
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 67936f83c694..31e7be23703d 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -8,7 +8,7 @@
8 */ 8 */
9 9
10/ { 10/ {
11 memory@20000000 { 11 memory {
12 reg = <0x20000000 0x8000000>; 12 reg = <0x20000000 0x8000000>;
13 }; 13 };
14 14
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
index d73dce645667..14bc30705099 100644
--- a/arch/arm/boot/dts/db8500.dtsi
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -24,7 +24,6 @@
24 #interrupt-cells = <3>; 24 #interrupt-cells = <3>;
25 #address-cells = <1>; 25 #address-cells = <1>;
26 interrupt-controller; 26 interrupt-controller;
27 interrupt-parent;
28 reg = <0xa0411000 0x1000>, 27 reg = <0xa0411000 0x1000>,
29 <0xa0410100 0x100>; 28 <0xa0410100 0x100>;
30 }; 29 };
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 37c0ff9c8b90..83e72294aefb 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -89,7 +89,6 @@
89 #size-cells = <0>; 89 #size-cells = <0>;
90 #address-cells = <1>; 90 #address-cells = <1>;
91 interrupt-controller; 91 interrupt-controller;
92 interrupt-parent;
93 reg = <0xfff11000 0x1000>, 92 reg = <0xfff11000 0x1000>,
94 <0xfff10100 0x100>; 93 <0xfff10100 0x100>;
95 }; 94 };
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 15ded0deaa79..45bc4bb04e57 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -10,7 +10,7 @@
10 intc: interrupt-controller@02080000 { 10 intc: interrupt-controller@02080000 {
11 compatible = "qcom,msm-8660-qgic"; 11 compatible = "qcom,msm-8660-qgic";
12 interrupt-controller; 12 interrupt-controller;
13 #interrupt-cells = <1>; 13 #interrupt-cells = <3>;
14 reg = < 0x02080000 0x1000 >, 14 reg = < 0x02080000 0x1000 >,
15 < 0x02081000 0x1000 >; 15 < 0x02081000 0x1000 >;
16 }; 16 };
@@ -19,6 +19,6 @@
19 compatible = "qcom,msm-hsuart", "qcom,msm-uart"; 19 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
20 reg = <0x19c40000 0x1000>, 20 reg = <0x19c40000 0x1000>,
21 <0x19c00000 0x1000>; 21 <0x19c00000 0x1000>;
22 interrupts = <195>; 22 interrupts = <0 195 0x0>;
23 }; 23 };
24}; 24};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index 3b3c4e0fa79f..7c2399c532e5 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -16,7 +16,7 @@
16 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs"; 16 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
17 }; 17 };
18 18
19 memory@20000000 { 19 memory {
20 reg = <0x20000000 0x4000000>; 20 reg = <0x20000000 0x4000000>;
21 }; 21 };
22 22
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index 0b32925f2147..e2fe3195c0d1 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -173,7 +173,7 @@
173 mmc@5000 { 173 mmc@5000 {
174 compatible = "arm,primecell"; 174 compatible = "arm,primecell";
175 reg = < 0x5000 0x1000>; 175 reg = < 0x5000 0x1000>;
176 interrupts = <22>; 176 interrupts = <22 34>;
177 }; 177 };
178 kmi@6000 { 178 kmi@6000 {
179 compatible = "arm,pl050", "arm,primecell"; 179 compatible = "arm,pl050", "arm,primecell";
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 166461073b78..7e8175269064 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -41,7 +41,7 @@
41 mmc@b000 { 41 mmc@b000 {
42 compatible = "arm,primecell"; 42 compatible = "arm,primecell";
43 reg = <0xb000 0x1000>; 43 reg = <0xb000 0x1000>;
44 interrupts = <23>; 44 interrupts = <23 34>;
45 }; 45 };
46 }; 46 };
47 }; 47 };
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7a66311f3066..7e288f96cedf 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -427,19 +427,18 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
427 427
428/* 428/*
429 * Handle each interrupt in a single VIC. Returns non-zero if we've 429 * Handle each interrupt in a single VIC. Returns non-zero if we've
430 * handled at least one interrupt. This does a single read of the 430 * handled at least one interrupt. This reads the status register
431 * status register and handles all interrupts in order from LSB first. 431 * before handling each interrupt, which is necessary given that
432 * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
432 */ 433 */
433static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) 434static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
434{ 435{
435 u32 stat, irq; 436 u32 stat, irq;
436 int handled = 0; 437 int handled = 0;
437 438
438 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); 439 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
439 while (stat) {
440 irq = ffs(stat) - 1; 440 irq = ffs(stat) - 1;
441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs); 441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
442 stat &= ~(1 << irq);
443 handled = 1; 442 handled = 1;
444 } 443 }
445 444
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index b5ac644e12af..6b31cb60daab 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -112,6 +112,7 @@ CONFIG_WATCHDOG=y
112CONFIG_IMX2_WDT=y 112CONFIG_IMX2_WDT=y
113CONFIG_MFD_MC13XXX=y 113CONFIG_MFD_MC13XXX=y
114CONFIG_REGULATOR=y 114CONFIG_REGULATOR=y
115CONFIG_REGULATOR_FIXED_VOLTAGE=y
115CONFIG_REGULATOR_MC13783=y 116CONFIG_REGULATOR_MC13783=y
116CONFIG_REGULATOR_MC13892=y 117CONFIG_REGULATOR_MC13892=y
117CONFIG_FB=y 118CONFIG_FB=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 42da9183acc8..082175c54e7c 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -14,6 +14,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set 14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_BLK_DEV_INTEGRITY=y 15CONFIG_BLK_DEV_INTEGRITY=y
16CONFIG_ARCH_S3C24XX=y 16CONFIG_ARCH_S3C24XX=y
17# CONFIG_CPU_S3C2410 is not set
18CONFIG_CPU_S3C2440=y
17CONFIG_S3C_ADC=y 19CONFIG_S3C_ADC=y
18CONFIG_S3C24XX_PWM=y 20CONFIG_S3C24XX_PWM=y
19CONFIG_MACH_MINI2440=y 21CONFIG_MACH_MINI2440=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 889d73ac1ae1..7e84f453e8a6 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -8,8 +8,6 @@ CONFIG_MODULE_UNLOAD=y
8# CONFIG_LBDAF is not set 8# CONFIG_LBDAF is not set
9# CONFIG_BLK_DEV_BSG is not set 9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_ARCH_U8500=y 10CONFIG_ARCH_U8500=y
11CONFIG_UX500_SOC_DB5500=y
12CONFIG_UX500_SOC_DB8500=y
13CONFIG_MACH_HREFV60=y 11CONFIG_MACH_HREFV60=y
14CONFIG_MACH_SNOWBALL=y 12CONFIG_MACH_SNOWBALL=y
15CONFIG_MACH_U5500=y 13CONFIG_MACH_U5500=y
@@ -39,7 +37,6 @@ CONFIG_CAIF=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 37CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40CONFIG_BLK_DEV_RAM=y 38CONFIG_BLK_DEV_RAM=y
41CONFIG_BLK_DEV_RAM_SIZE=65536 39CONFIG_BLK_DEV_RAM_SIZE=65536
42CONFIG_MISC_DEVICES=y
43CONFIG_AB8500_PWM=y 40CONFIG_AB8500_PWM=y
44CONFIG_SENSORS_BH1780=y 41CONFIG_SENSORS_BH1780=y
45CONFIG_NETDEVICES=y 42CONFIG_NETDEVICES=y
@@ -65,16 +62,18 @@ CONFIG_SERIAL_AMBA_PL011=y
65CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 62CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
66CONFIG_HW_RANDOM=y 63CONFIG_HW_RANDOM=y
67CONFIG_HW_RANDOM_NOMADIK=y 64CONFIG_HW_RANDOM_NOMADIK=y
68CONFIG_I2C=y
69CONFIG_I2C_NOMADIK=y
70CONFIG_SPI=y 65CONFIG_SPI=y
71CONFIG_SPI_PL022=y 66CONFIG_SPI_PL022=y
72CONFIG_GPIO_STMPE=y 67CONFIG_GPIO_STMPE=y
73CONFIG_GPIO_TC3589X=y 68CONFIG_GPIO_TC3589X=y
69CONFIG_POWER_SUPPLY=y
70CONFIG_AB8500_BM=y
71CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y
74CONFIG_MFD_STMPE=y 72CONFIG_MFD_STMPE=y
75CONFIG_MFD_TC3589X=y 73CONFIG_MFD_TC3589X=y
76CONFIG_AB5500_CORE=y 74CONFIG_AB5500_CORE=y
77CONFIG_AB8500_CORE=y 75CONFIG_AB8500_CORE=y
76CONFIG_REGULATOR=y
78CONFIG_REGULATOR_AB8500=y 77CONFIG_REGULATOR_AB8500=y
79# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
80CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
index 44f4a09ff37b..05112380dc53 100644
--- a/arch/arm/include/asm/barrier.h
+++ b/arch/arm/include/asm/barrier.h
@@ -2,6 +2,7 @@
2#define __ASM_BARRIER_H 2#define __ASM_BARRIER_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <asm/outercache.h>
5 6
6#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); 7#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
7 8
@@ -39,7 +40,6 @@
39#ifdef CONFIG_ARCH_HAS_BARRIERS 40#ifdef CONFIG_ARCH_HAS_BARRIERS
40#include <mach/barriers.h> 41#include <mach/barriers.h>
41#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) 42#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
42#include <asm/outercache.h>
43#define mb() do { dsb(); outer_sync(); } while (0) 43#define mb() do { dsb(); outer_sync(); } while (0)
44#define rmb() dsb() 44#define rmb() dsb()
45#define wmb() mb() 45#define wmb() mb()
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index df0ac0bb39aa..9af5563dd3eb 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -119,7 +119,7 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
119#ifdef CONFIG_NEED_MACH_IO_H 119#ifdef CONFIG_NEED_MACH_IO_H
120#include <mach/io.h> 120#include <mach/io.h>
121#else 121#else
122#define __io(a) ({ (void)(a); __typesafe_io(0); }) 122#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
123#endif 123#endif
124 124
125/* 125/*
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h
index 5c5ca2ea62b0..bfc198c75913 100644
--- a/arch/arm/include/asm/jump_label.h
+++ b/arch/arm/include/asm/jump_label.h
@@ -14,7 +14,7 @@
14#define JUMP_LABEL_NOP "nop" 14#define JUMP_LABEL_NOP "nop"
15#endif 15#endif
16 16
17static __always_inline bool arch_static_branch(struct jump_label_key *key) 17static __always_inline bool arch_static_branch(struct static_key *key)
18{ 18{
19 asm goto("1:\n\t" 19 asm goto("1:\n\t"
20 JUMP_LABEL_NOP "\n\t" 20 JUMP_LABEL_NOP "\n\t"
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index d4c24d412a8d..0f04d84582e1 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -118,6 +118,13 @@ extern void iwmmxt_task_switch(struct thread_info *);
118extern void vfp_sync_hwstate(struct thread_info *); 118extern void vfp_sync_hwstate(struct thread_info *);
119extern void vfp_flush_hwstate(struct thread_info *); 119extern void vfp_flush_hwstate(struct thread_info *);
120 120
121struct user_vfp;
122struct user_vfp_exc;
123
124extern int vfp_preserve_user_clear_hwstate(struct user_vfp __user *,
125 struct user_vfp_exc __user *);
126extern int vfp_restore_user_hwstate(struct user_vfp __user *,
127 struct user_vfp_exc __user *);
121#endif 128#endif
122 129
123/* 130/*
diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h
index 60843eb0f61c..73409e6c0251 100644
--- a/arch/arm/include/asm/tls.h
+++ b/arch/arm/include/asm/tls.h
@@ -7,6 +7,8 @@
7 7
8 .macro set_tls_v6k, tp, tmp1, tmp2 8 .macro set_tls_v6k, tp, tmp1, tmp2
9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register 9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register
10 mov \tmp1, #0
11 mcr p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
10 .endm 12 .endm
11 13
12 .macro set_tls_v6, tp, tmp1, tmp2 14 .macro set_tls_v6, tp, tmp1, tmp2
@@ -15,6 +17,8 @@
15 mov \tmp2, #0xffff0fff 17 mov \tmp2, #0xffff0fff
16 tst \tmp1, #HWCAP_TLS @ hardware TLS available? 18 tst \tmp1, #HWCAP_TLS @ hardware TLS available?
17 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register 19 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register
20 movne \tmp1, #0
21 mcrne p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
18 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 22 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0
19 .endm 23 .endm
20 24
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 632df9a66f8c..ede5f7741c42 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -299,7 +299,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
299 */ 299 */
300void pcibios_fixup_bus(struct pci_bus *bus) 300void pcibios_fixup_bus(struct pci_bus *bus)
301{ 301{
302 struct pci_sys_data *root = bus->sysdata;
303 struct pci_dev *dev; 302 struct pci_dev *dev;
304 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK; 303 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
305 304
diff --git a/arch/arm/kernel/insn.c b/arch/arm/kernel/insn.c
index ab312e516546..b760340b7014 100644
--- a/arch/arm/kernel/insn.c
+++ b/arch/arm/kernel/insn.c
@@ -1,3 +1,4 @@
1#include <linux/bug.h>
1#include <linux/kernel.h> 2#include <linux/kernel.h>
2#include <asm/opcodes.h> 3#include <asm/opcodes.h>
3 4
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 71ccdbfed662..8349d4e97e2b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -155,10 +155,10 @@ static bool migrate_one_irq(struct irq_desc *desc)
155 } 155 }
156 156
157 c = irq_data_get_irq_chip(d); 157 c = irq_data_get_irq_chip(d);
158 if (c->irq_set_affinity) 158 if (!c->irq_set_affinity)
159 c->irq_set_affinity(d, affinity, true);
160 else
161 pr_debug("IRQ%u: unable to set affinity\n", d->irq); 159 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
160 else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
161 cpumask_copy(d->affinity, affinity);
162 162
163 return ret; 163 return ret;
164} 164}
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index ab1869dac97a..4dd41fc9e235 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -152,7 +152,7 @@ int __kprobes __arch_disarm_kprobe(void *p)
152 152
153void __kprobes arch_disarm_kprobe(struct kprobe *p) 153void __kprobes arch_disarm_kprobe(struct kprobe *p)
154{ 154{
155 stop_machine(__arch_disarm_kprobe, p, &cpu_online_map); 155 stop_machine(__arch_disarm_kprobe, p, cpu_online_mask);
156} 156}
157 157
158void __kprobes arch_remove_kprobe(struct kprobe *p) 158void __kprobes arch_remove_kprobe(struct kprobe *p)
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 45956c9d0ef0..80abafb9bf33 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -256,7 +256,7 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
256{ 256{
257 unsigned long tmp; 257 unsigned long tmp;
258 258
259 if (off & 3 || off >= sizeof(struct user)) 259 if (off & 3)
260 return -EIO; 260 return -EIO;
261 261
262 tmp = 0; 262 tmp = 0;
@@ -268,6 +268,8 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
268 tmp = tsk->mm->end_code; 268 tmp = tsk->mm->end_code;
269 else if (off < sizeof(struct pt_regs)) 269 else if (off < sizeof(struct pt_regs))
270 tmp = get_user_reg(tsk, off >> 2); 270 tmp = get_user_reg(tsk, off >> 2);
271 else if (off >= sizeof(struct user))
272 return -EIO;
271 273
272 return put_user(tmp, ret); 274 return put_user(tmp, ret);
273} 275}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index b91411371ae1..ebfac782593f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -523,7 +523,21 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
523 */ 523 */
524 size -= start & ~PAGE_MASK; 524 size -= start & ~PAGE_MASK;
525 bank->start = PAGE_ALIGN(start); 525 bank->start = PAGE_ALIGN(start);
526 bank->size = size & PAGE_MASK; 526
527#ifndef CONFIG_LPAE
528 if (bank->start + size < bank->start) {
529 printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
530 "32-bit physical address space\n", (long long)start);
531 /*
532 * To ensure bank->start + bank->size is representable in
533 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
534 * This means we lose a page after masking.
535 */
536 size = ULONG_MAX - bank->start;
537 }
538#endif
539
540 bank->size = size & PAGE_MASK;
527 541
528 /* 542 /*
529 * Check whether this memory region has non-zero size or 543 * Check whether this memory region has non-zero size or
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 7cb532fc8aa4..d68d1b694680 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -180,44 +180,23 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
180 180
181static int preserve_vfp_context(struct vfp_sigframe __user *frame) 181static int preserve_vfp_context(struct vfp_sigframe __user *frame)
182{ 182{
183 struct thread_info *thread = current_thread_info();
184 struct vfp_hard_struct *h = &thread->vfpstate.hard;
185 const unsigned long magic = VFP_MAGIC; 183 const unsigned long magic = VFP_MAGIC;
186 const unsigned long size = VFP_STORAGE_SIZE; 184 const unsigned long size = VFP_STORAGE_SIZE;
187 int err = 0; 185 int err = 0;
188 186
189 vfp_sync_hwstate(thread);
190 __put_user_error(magic, &frame->magic, err); 187 __put_user_error(magic, &frame->magic, err);
191 __put_user_error(size, &frame->size, err); 188 __put_user_error(size, &frame->size, err);
192 189
193 /* 190 if (err)
194 * Copy the floating point registers. There can be unused 191 return -EFAULT;
195 * registers see asm/hwcap.h for details.
196 */
197 err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
198 sizeof(h->fpregs));
199 /*
200 * Copy the status and control register.
201 */
202 __put_user_error(h->fpscr, &frame->ufp.fpscr, err);
203
204 /*
205 * Copy the exception registers.
206 */
207 __put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
208 __put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
209 __put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
210 192
211 return err ? -EFAULT : 0; 193 return vfp_preserve_user_clear_hwstate(&frame->ufp, &frame->ufp_exc);
212} 194}
213 195
214static int restore_vfp_context(struct vfp_sigframe __user *frame) 196static int restore_vfp_context(struct vfp_sigframe __user *frame)
215{ 197{
216 struct thread_info *thread = current_thread_info();
217 struct vfp_hard_struct *h = &thread->vfpstate.hard;
218 unsigned long magic; 198 unsigned long magic;
219 unsigned long size; 199 unsigned long size;
220 unsigned long fpexc;
221 int err = 0; 200 int err = 0;
222 201
223 __get_user_error(magic, &frame->magic, err); 202 __get_user_error(magic, &frame->magic, err);
@@ -228,33 +207,7 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
228 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) 207 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
229 return -EINVAL; 208 return -EINVAL;
230 209
231 vfp_flush_hwstate(thread); 210 return vfp_restore_user_hwstate(&frame->ufp, &frame->ufp_exc);
232
233 /*
234 * Copy the floating point registers. There can be unused
235 * registers see asm/hwcap.h for details.
236 */
237 err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
238 sizeof(h->fpregs));
239 /*
240 * Copy the status and control register.
241 */
242 __get_user_error(h->fpscr, &frame->ufp.fpscr, err);
243
244 /*
245 * Sanitise and restore the exception registers.
246 */
247 __get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
248 /* Ensure the VFP is enabled. */
249 fpexc |= FPEXC_EN;
250 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
251 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
252 h->fpexc = fpexc;
253
254 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
255 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
256
257 return err ? -EFAULT : 0;
258} 211}
259 212
260#endif 213#endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 2cee7d1eb958..f6a4d32b0421 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -349,7 +349,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
349 * re-initialize the map in platform_smp_prepare_cpus() if 349 * re-initialize the map in platform_smp_prepare_cpus() if
350 * present != possible (e.g. physical hotplug). 350 * present != possible (e.g. physical hotplug).
351 */ 351 */
352 init_cpu_present(&cpu_possible_map); 352 init_cpu_present(cpu_possible_mask);
353 353
354 /* 354 /*
355 * Initialise the SCU if there are more than one CPU 355 * Initialise the SCU if there are more than one CPU
@@ -510,10 +510,6 @@ static void ipi_cpu_stop(unsigned int cpu)
510 local_fiq_disable(); 510 local_fiq_disable();
511 local_irq_disable(); 511 local_irq_disable();
512 512
513#ifdef CONFIG_HOTPLUG_CPU
514 platform_cpu_kill(cpu);
515#endif
516
517 while (1) 513 while (1)
518 cpu_relax(); 514 cpu_relax();
519} 515}
@@ -576,16 +572,25 @@ void smp_send_reschedule(int cpu)
576 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 572 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
577} 573}
578 574
575#ifdef CONFIG_HOTPLUG_CPU
576static void smp_kill_cpus(cpumask_t *mask)
577{
578 unsigned int cpu;
579 for_each_cpu(cpu, mask)
580 platform_cpu_kill(cpu);
581}
582#else
583static void smp_kill_cpus(cpumask_t *mask) { }
584#endif
585
579void smp_send_stop(void) 586void smp_send_stop(void)
580{ 587{
581 unsigned long timeout; 588 unsigned long timeout;
589 struct cpumask mask;
582 590
583 if (num_online_cpus() > 1) { 591 cpumask_copy(&mask, cpu_online_mask);
584 cpumask_t mask = cpu_online_map; 592 cpumask_clear_cpu(smp_processor_id(), &mask);
585 cpu_clear(smp_processor_id(), mask); 593 smp_cross_call(&mask, IPI_CPU_STOP);
586
587 smp_cross_call(&mask, IPI_CPU_STOP);
588 }
589 594
590 /* Wait up to one second for other CPUs to stop */ 595 /* Wait up to one second for other CPUs to stop */
591 timeout = USEC_PER_SEC; 596 timeout = USEC_PER_SEC;
@@ -594,6 +599,8 @@ void smp_send_stop(void)
594 599
595 if (num_online_cpus() > 1) 600 if (num_online_cpus() > 1)
596 pr_warning("SMP: failed to stop secondary CPUs\n"); 601 pr_warning("SMP: failed to stop secondary CPUs\n");
602
603 smp_kill_cpus(&mask);
597} 604}
598 605
599/* 606/*
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 99ce5c955e39..05774e5b1cba 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1173,7 +1173,6 @@ void __init at91_add_device_serial(void)
1173 printk(KERN_INFO "AT91: No default serial console defined.\n"); 1173 printk(KERN_INFO "AT91: No default serial console defined.\n");
1174} 1174}
1175#else 1175#else
1176void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1177void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} 1176void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1178void __init at91_set_serial_console(unsigned portnr) {} 1177void __init at91_set_serial_console(unsigned portnr) {}
1179void __init at91_add_device_serial(void) {} 1178void __init at91_add_device_serial(void) {}
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index dd7f782b0b91..104ca40d8d18 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/clockchips.h> 25#include <linux/clockchips.h>
26#include <linux/export.h>
26 27
27#include <asm/mach/time.h> 28#include <asm/mach/time.h>
28 29
@@ -176,6 +177,7 @@ static struct clock_event_device clkevt = {
176}; 177};
177 178
178void __iomem *at91_st_base; 179void __iomem *at91_st_base;
180EXPORT_SYMBOL_GPL(at91_st_base);
179 181
180void __init at91rm9200_ioremap_st(u32 addr) 182void __init at91rm9200_ioremap_st(u32 addr)
181{ 183{
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7e5651ee9f85..5652dde4bbe2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -598,6 +598,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
598 else 598 else
599 cs_pin = spi1_standard_cs[devices[i].chip_select]; 599 cs_pin = spi1_standard_cs[devices[i].chip_select];
600 600
601 if (!gpio_is_valid(cs_pin))
602 continue;
603
601 if (devices[i].bus_num == 0) 604 if (devices[i].bus_num == 0)
602 enable_spi0 = 1; 605 enable_spi0 = 1;
603 else 606 else
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 096da87dc00d..4db961a93085 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -415,6 +415,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
415 else 415 else
416 cs_pin = spi1_standard_cs[devices[i].chip_select]; 416 cs_pin = spi1_standard_cs[devices[i].chip_select];
417 417
418 if (!gpio_is_valid(cs_pin))
419 continue;
420
418 if (devices[i].bus_num == 0) 421 if (devices[i].bus_num == 0)
419 enable_spi0 = 1; 422 enable_spi0 = 1;
420 else 423 else
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 53688c46f956..fe99206de880 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -72,7 +72,8 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 /* Enable VBus control for UHP ports */ 72 /* Enable VBus control for UHP ports */
73 for (i = 0; i < data->ports; i++) { 73 for (i = 0; i < data->ports; i++) {
74 if (gpio_is_valid(data->vbus_pin[i])) 74 if (gpio_is_valid(data->vbus_pin[i]))
75 at91_set_gpio_output(data->vbus_pin[i], 0); 75 at91_set_gpio_output(data->vbus_pin[i],
76 data->vbus_pin_active_low[i]);
76 } 77 }
77 78
78 /* Enable overcurrent notification */ 79 /* Enable overcurrent notification */
@@ -671,6 +672,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
671 else 672 else
672 cs_pin = spi1_standard_cs[devices[i].chip_select]; 673 cs_pin = spi1_standard_cs[devices[i].chip_select];
673 674
675 if (!gpio_is_valid(cs_pin))
676 continue;
677
674 if (devices[i].bus_num == 0) 678 if (devices[i].bus_num == 0)
675 enable_spi0 = 1; 679 enable_spi0 = 1;
676 else 680 else
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 698479f1e197..6b008aee1dff 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -127,12 +127,13 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
127 /* Enable VBus control for UHP ports */ 127 /* Enable VBus control for UHP ports */
128 for (i = 0; i < data->ports; i++) { 128 for (i = 0; i < data->ports; i++) {
129 if (gpio_is_valid(data->vbus_pin[i])) 129 if (gpio_is_valid(data->vbus_pin[i]))
130 at91_set_gpio_output(data->vbus_pin[i], 0); 130 at91_set_gpio_output(data->vbus_pin[i],
131 data->vbus_pin_active_low[i]);
131 } 132 }
132 133
133 /* Enable overcurrent notification */ 134 /* Enable overcurrent notification */
134 for (i = 0; i < data->ports; i++) { 135 for (i = 0; i < data->ports; i++) {
135 if (data->overcurrent_pin[i]) 136 if (gpio_is_valid(data->overcurrent_pin[i]))
136 at91_set_gpio_input(data->overcurrent_pin[i], 1); 137 at91_set_gpio_input(data->overcurrent_pin[i], 1);
137 } 138 }
138 139
@@ -188,7 +189,8 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
188 /* Enable VBus control for UHP ports */ 189 /* Enable VBus control for UHP ports */
189 for (i = 0; i < data->ports; i++) { 190 for (i = 0; i < data->ports; i++) {
190 if (gpio_is_valid(data->vbus_pin[i])) 191 if (gpio_is_valid(data->vbus_pin[i]))
191 at91_set_gpio_output(data->vbus_pin[i], 0); 192 at91_set_gpio_output(data->vbus_pin[i],
193 data->vbus_pin_active_low[i]);
192 } 194 }
193 195
194 usbh_ehci_data = *data; 196 usbh_ehci_data = *data;
@@ -785,6 +787,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
785 else 787 else
786 cs_pin = spi1_standard_cs[devices[i].chip_select]; 788 cs_pin = spi1_standard_cs[devices[i].chip_select];
787 789
790 if (!gpio_is_valid(cs_pin))
791 continue;
792
788 if (devices[i].bus_num == 0) 793 if (devices[i].bus_num == 0)
789 enable_spi0 = 1; 794 enable_spi0 = 1;
790 else 795 else
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index eda72e83037d..fe4ae22e8561 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -419,6 +419,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
419 else 419 else
420 cs_pin = spi_standard_cs[devices[i].chip_select]; 420 cs_pin = spi_standard_cs[devices[i].chip_select];
421 421
422 if (!gpio_is_valid(cs_pin))
423 continue;
424
422 /* enable chip-select pin */ 425 /* enable chip-select pin */
423 at91_set_gpio_output(cs_pin, 1); 426 at91_set_gpio_output(cs_pin, 1);
424 427
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index b6831eeb7b76..13c8cae60462 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -223,6 +223,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
223 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), 223 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
224 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk), 224 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
225 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk), 225 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
226 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
227 CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
226 CLKDEV_CON_ID("pioA", &pioAB_clk), 228 CLKDEV_CON_ID("pioA", &pioAB_clk),
227 CLKDEV_CON_ID("pioB", &pioAB_clk), 229 CLKDEV_CON_ID("pioB", &pioAB_clk),
228 CLKDEV_CON_ID("pioC", &pioCD_clk), 230 CLKDEV_CON_ID("pioC", &pioCD_clk),
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 11cbaa8946fe..b2e4fe21f346 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -117,7 +117,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
117}; 117};
118 118
119#define EK_FLASH_BASE AT91_CHIPSELECT_0 119#define EK_FLASH_BASE AT91_CHIPSELECT_0
120#define EK_FLASH_SIZE SZ_2M 120#define EK_FLASH_SIZE SZ_8M
121 121
122static struct physmap_flash_data ek_flash_data = { 122static struct physmap_flash_data ek_flash_data = {
123 .width = 2, 123 .width = 2,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index c3f994462864..065fed342424 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -85,8 +85,6 @@ static struct resource dm9000_resource[] = {
85 .flags = IORESOURCE_MEM 85 .flags = IORESOURCE_MEM
86 }, 86 },
87 [2] = { 87 [2] = {
88 .start = AT91_PIN_PC11,
89 .end = AT91_PIN_PC11,
90 .flags = IORESOURCE_IRQ 88 .flags = IORESOURCE_IRQ
91 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE, 89 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
92 } 90 }
@@ -130,6 +128,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
130 128
131static void __init ek_add_device_dm9000(void) 129static void __init ek_add_device_dm9000(void)
132{ 130{
131 struct resource *r = &dm9000_resource[2];
132
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(0, 2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
@@ -139,6 +139,7 @@ static void __init ek_add_device_dm9000(void)
139 /* Configure Interrupt pin as input, no pull-up */ 139 /* Configure Interrupt pin as input, no pull-up */
140 at91_set_gpio_input(AT91_PIN_PC11, 0); 140 at91_set_gpio_input(AT91_PIN_PC11, 0);
141 141
142 r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
142 platform_device_register(&dm9000_device); 143 platform_device_register(&dm9000_device);
143} 144}
144#else 145#else
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 66f0ddf4b2ae..2ffe50f3a9e9 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
74static struct at91_usbh_data __initdata ek_usbh_data = { 74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2, 75 .ports = 2,
76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
77 .vbus_pin_active_low = {1, 1},
77 .overcurrent_pin= {-EINVAL, -EINVAL}, 78 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 79};
79 80
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index e1bea73e6b30..c88e908ddd82 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -71,6 +71,7 @@ static void __init ek_init_early(void)
71static struct at91_usbh_data __initdata ek_usbh_hs_data = { 71static struct at91_usbh_data __initdata ek_usbh_hs_data = {
72 .ports = 2, 72 .ports = 2,
73 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, 73 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
74 .vbus_pin_active_low = {1, 1},
74 .overcurrent_pin= {-EINVAL, -EINVAL}, 75 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 76};
76 77
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index a0f4d7424cdc..6b692824c988 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -35,6 +35,7 @@
35#include "generic.h" 35#include "generic.h"
36 36
37void __iomem *at91_pmc_base; 37void __iomem *at91_pmc_base;
38EXPORT_SYMBOL_GPL(at91_pmc_base);
38 39
39/* 40/*
40 * There's a lot more which can be done with clocks, including cpufreq 41 * There's a lot more which can be done with clocks, including cpufreq
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 36604782a78f..ea2c57a86ca6 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -25,7 +25,7 @@ extern void __iomem *at91_pmc_base;
25#define at91_pmc_write(field, value) \ 25#define at91_pmc_write(field, value) \
26 __raw_writel(value, at91_pmc_base + field) 26 __raw_writel(value, at91_pmc_base + field)
27#else 27#else
28.extern at91_aic_base 28.extern at91_pmc_base
29#endif 29#endif
30 30
31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ 31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 544a5d5ce416..49a821192c65 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -86,14 +86,15 @@ extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *d
86extern void __init at91_add_device_eth(struct macb_platform_data *data); 86extern void __init at91_add_device_eth(struct macb_platform_data *data);
87 87
88 /* USB Host */ 88 /* USB Host */
89#define AT91_MAX_USBH_PORTS 3
89struct at91_usbh_data { 90struct at91_usbh_data {
90 u8 ports; /* number of ports on root hub */ 91 int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */
91 int vbus_pin[2]; /* port power-control pin */ 92 int overcurrent_pin[AT91_MAX_USBH_PORTS];
92 u8 vbus_pin_active_low[2]; 93 u8 ports; /* number of ports on root hub */
93 u8 overcurrent_supported; 94 u8 overcurrent_supported;
94 int overcurrent_pin[2]; 95 u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS];
95 u8 overcurrent_status[2]; 96 u8 overcurrent_status[AT91_MAX_USBH_PORTS];
96 u8 overcurrent_changed[2]; 97 u8 overcurrent_changed[AT91_MAX_USBH_PORTS];
97}; 98};
98extern void __init at91_add_device_usbh(struct at91_usbh_data *data); 99extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
99extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); 100extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
new file mode 100644
index 000000000000..2d9ca0455745
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/mach-at91/include/mach/io.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_IO_H
22#define __ASM_ARCH_IO_H
23
24#define IO_SPACE_LIMIT 0xFFFFFFFF
25#define __io(a) __typesafe_io(a)
26
27#endif
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 97cc04dc8073..f44a2e7272e3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -54,6 +54,7 @@ void __init at91_init_interrupts(unsigned int *priority)
54} 54}
55 55
56void __iomem *at91_ramc_base[2]; 56void __iomem *at91_ramc_base[2];
57EXPORT_SYMBOL_GPL(at91_ramc_base);
57 58
58void __init at91_ioremap_ramc(int id, u32 addr, u32 size) 59void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
59{ 60{
@@ -292,6 +293,7 @@ void __init at91_ioremap_rstc(u32 base_addr)
292} 293}
293 294
294void __iomem *at91_matrix_base; 295void __iomem *at91_matrix_base;
296EXPORT_SYMBOL_GPL(at91_matrix_base);
295 297
296void __init at91_ioremap_matrix(u32 base_addr) 298void __init at91_ioremap_matrix(u32 base_addr)
297{ 299{
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 22e4e0a28ad1..adbfb1994582 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,8 +52,8 @@
52#include <mach/csp/chipcHw_inline.h> 52#include <mach/csp/chipcHw_inline.h>
53#include <mach/csp/tmrHw_reg.h> 53#include <mach/csp/tmrHw_reg.h>
54 54
55static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); 55static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL);
56static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); 56static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL);
57 57
58static struct clk pll1_clk = { 58static struct clk pll1_clk = {
59 .name = "PLL1", 59 .name = "PLL1",
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 801c738d8f0e..2c35fd404cae 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -370,6 +370,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
370 370
371config MACH_EXYNOS4_DT 371config MACH_EXYNOS4_DT
372 bool "Samsung Exynos4 Machine using device tree" 372 bool "Samsung Exynos4 Machine using device tree"
373 depends on ARCH_EXYNOS4
373 select CPU_EXYNOS4210 374 select CPU_EXYNOS4210
374 select USE_OF 375 select USE_OF
375 select ARM_AMBA 376 select ARM_AMBA
@@ -382,6 +383,7 @@ config MACH_EXYNOS4_DT
382 383
383config MACH_EXYNOS5_DT 384config MACH_EXYNOS5_DT
384 bool "SAMSUNG EXYNOS5 Machine using device tree" 385 bool "SAMSUNG EXYNOS5 Machine using device tree"
386 depends on ARCH_EXYNOS5
385 select SOC_EXYNOS5250 387 select SOC_EXYNOS5250
386 select USE_OF 388 select USE_OF
387 select ARM_AMBA 389 select ARM_AMBA
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 428731197471..bcb7db453145 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -502,25 +502,25 @@ static struct clk exynos4_init_clocks_off[] = {
502 .ctrlbit = (1 << 3), 502 .ctrlbit = (1 << 3),
503 }, { 503 }, {
504 .name = "hsmmc", 504 .name = "hsmmc",
505 .devname = "s3c-sdhci.0", 505 .devname = "exynos4-sdhci.0",
506 .parent = &exynos4_clk_aclk_133.clk, 506 .parent = &exynos4_clk_aclk_133.clk,
507 .enable = exynos4_clk_ip_fsys_ctrl, 507 .enable = exynos4_clk_ip_fsys_ctrl,
508 .ctrlbit = (1 << 5), 508 .ctrlbit = (1 << 5),
509 }, { 509 }, {
510 .name = "hsmmc", 510 .name = "hsmmc",
511 .devname = "s3c-sdhci.1", 511 .devname = "exynos4-sdhci.1",
512 .parent = &exynos4_clk_aclk_133.clk, 512 .parent = &exynos4_clk_aclk_133.clk,
513 .enable = exynos4_clk_ip_fsys_ctrl, 513 .enable = exynos4_clk_ip_fsys_ctrl,
514 .ctrlbit = (1 << 6), 514 .ctrlbit = (1 << 6),
515 }, { 515 }, {
516 .name = "hsmmc", 516 .name = "hsmmc",
517 .devname = "s3c-sdhci.2", 517 .devname = "exynos4-sdhci.2",
518 .parent = &exynos4_clk_aclk_133.clk, 518 .parent = &exynos4_clk_aclk_133.clk,
519 .enable = exynos4_clk_ip_fsys_ctrl, 519 .enable = exynos4_clk_ip_fsys_ctrl,
520 .ctrlbit = (1 << 7), 520 .ctrlbit = (1 << 7),
521 }, { 521 }, {
522 .name = "hsmmc", 522 .name = "hsmmc",
523 .devname = "s3c-sdhci.3", 523 .devname = "exynos4-sdhci.3",
524 .parent = &exynos4_clk_aclk_133.clk, 524 .parent = &exynos4_clk_aclk_133.clk,
525 .enable = exynos4_clk_ip_fsys_ctrl, 525 .enable = exynos4_clk_ip_fsys_ctrl,
526 .ctrlbit = (1 << 8), 526 .ctrlbit = (1 << 8),
@@ -1201,7 +1201,7 @@ static struct clksrc_clk exynos4_clk_sclk_uart3 = {
1201static struct clksrc_clk exynos4_clk_sclk_mmc0 = { 1201static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
1202 .clk = { 1202 .clk = {
1203 .name = "sclk_mmc", 1203 .name = "sclk_mmc",
1204 .devname = "s3c-sdhci.0", 1204 .devname = "exynos4-sdhci.0",
1205 .parent = &exynos4_clk_dout_mmc0.clk, 1205 .parent = &exynos4_clk_dout_mmc0.clk,
1206 .enable = exynos4_clksrc_mask_fsys_ctrl, 1206 .enable = exynos4_clksrc_mask_fsys_ctrl,
1207 .ctrlbit = (1 << 0), 1207 .ctrlbit = (1 << 0),
@@ -1212,7 +1212,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
1212static struct clksrc_clk exynos4_clk_sclk_mmc1 = { 1212static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
1213 .clk = { 1213 .clk = {
1214 .name = "sclk_mmc", 1214 .name = "sclk_mmc",
1215 .devname = "s3c-sdhci.1", 1215 .devname = "exynos4-sdhci.1",
1216 .parent = &exynos4_clk_dout_mmc1.clk, 1216 .parent = &exynos4_clk_dout_mmc1.clk,
1217 .enable = exynos4_clksrc_mask_fsys_ctrl, 1217 .enable = exynos4_clksrc_mask_fsys_ctrl,
1218 .ctrlbit = (1 << 4), 1218 .ctrlbit = (1 << 4),
@@ -1223,7 +1223,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
1223static struct clksrc_clk exynos4_clk_sclk_mmc2 = { 1223static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
1224 .clk = { 1224 .clk = {
1225 .name = "sclk_mmc", 1225 .name = "sclk_mmc",
1226 .devname = "s3c-sdhci.2", 1226 .devname = "exynos4-sdhci.2",
1227 .parent = &exynos4_clk_dout_mmc2.clk, 1227 .parent = &exynos4_clk_dout_mmc2.clk,
1228 .enable = exynos4_clksrc_mask_fsys_ctrl, 1228 .enable = exynos4_clksrc_mask_fsys_ctrl,
1229 .ctrlbit = (1 << 8), 1229 .ctrlbit = (1 << 8),
@@ -1234,7 +1234,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
1234static struct clksrc_clk exynos4_clk_sclk_mmc3 = { 1234static struct clksrc_clk exynos4_clk_sclk_mmc3 = {
1235 .clk = { 1235 .clk = {
1236 .name = "sclk_mmc", 1236 .name = "sclk_mmc",
1237 .devname = "s3c-sdhci.3", 1237 .devname = "exynos4-sdhci.3",
1238 .parent = &exynos4_clk_dout_mmc3.clk, 1238 .parent = &exynos4_clk_dout_mmc3.clk,
1239 .enable = exynos4_clksrc_mask_fsys_ctrl, 1239 .enable = exynos4_clksrc_mask_fsys_ctrl,
1240 .ctrlbit = (1 << 12), 1240 .ctrlbit = (1 << 12),
@@ -1339,10 +1339,10 @@ static struct clk_lookup exynos4_clk_lookup[] = {
1339 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk), 1339 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk),
1340 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk), 1340 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk),
1341 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk), 1341 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk),
1342 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk), 1342 CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk),
1343 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk), 1343 CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
1344 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk), 1344 CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
1345 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk), 1345 CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
1346 CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0), 1346 CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0),
1347 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0), 1347 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
1348 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1), 1348 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 3320ad140ebe..ad3bec4f1fa6 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -475,25 +475,25 @@ static struct clk exynos5_init_clocks_off[] = {
475 .ctrlbit = (1 << 20), 475 .ctrlbit = (1 << 20),
476 }, { 476 }, {
477 .name = "hsmmc", 477 .name = "hsmmc",
478 .devname = "s3c-sdhci.0", 478 .devname = "exynos4-sdhci.0",
479 .parent = &exynos5_clk_aclk_200.clk, 479 .parent = &exynos5_clk_aclk_200.clk,
480 .enable = exynos5_clk_ip_fsys_ctrl, 480 .enable = exynos5_clk_ip_fsys_ctrl,
481 .ctrlbit = (1 << 12), 481 .ctrlbit = (1 << 12),
482 }, { 482 }, {
483 .name = "hsmmc", 483 .name = "hsmmc",
484 .devname = "s3c-sdhci.1", 484 .devname = "exynos4-sdhci.1",
485 .parent = &exynos5_clk_aclk_200.clk, 485 .parent = &exynos5_clk_aclk_200.clk,
486 .enable = exynos5_clk_ip_fsys_ctrl, 486 .enable = exynos5_clk_ip_fsys_ctrl,
487 .ctrlbit = (1 << 13), 487 .ctrlbit = (1 << 13),
488 }, { 488 }, {
489 .name = "hsmmc", 489 .name = "hsmmc",
490 .devname = "s3c-sdhci.2", 490 .devname = "exynos4-sdhci.2",
491 .parent = &exynos5_clk_aclk_200.clk, 491 .parent = &exynos5_clk_aclk_200.clk,
492 .enable = exynos5_clk_ip_fsys_ctrl, 492 .enable = exynos5_clk_ip_fsys_ctrl,
493 .ctrlbit = (1 << 14), 493 .ctrlbit = (1 << 14),
494 }, { 494 }, {
495 .name = "hsmmc", 495 .name = "hsmmc",
496 .devname = "s3c-sdhci.3", 496 .devname = "exynos4-sdhci.3",
497 .parent = &exynos5_clk_aclk_200.clk, 497 .parent = &exynos5_clk_aclk_200.clk,
498 .enable = exynos5_clk_ip_fsys_ctrl, 498 .enable = exynos5_clk_ip_fsys_ctrl,
499 .ctrlbit = (1 << 15), 499 .ctrlbit = (1 << 15),
@@ -903,7 +903,7 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
903static struct clksrc_clk exynos5_clk_sclk_mmc0 = { 903static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
904 .clk = { 904 .clk = {
905 .name = "sclk_mmc", 905 .name = "sclk_mmc",
906 .devname = "s3c-sdhci.0", 906 .devname = "exynos4-sdhci.0",
907 .parent = &exynos5_clk_dout_mmc0.clk, 907 .parent = &exynos5_clk_dout_mmc0.clk,
908 .enable = exynos5_clksrc_mask_fsys_ctrl, 908 .enable = exynos5_clksrc_mask_fsys_ctrl,
909 .ctrlbit = (1 << 0), 909 .ctrlbit = (1 << 0),
@@ -914,7 +914,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
914static struct clksrc_clk exynos5_clk_sclk_mmc1 = { 914static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
915 .clk = { 915 .clk = {
916 .name = "sclk_mmc", 916 .name = "sclk_mmc",
917 .devname = "s3c-sdhci.1", 917 .devname = "exynos4-sdhci.1",
918 .parent = &exynos5_clk_dout_mmc1.clk, 918 .parent = &exynos5_clk_dout_mmc1.clk,
919 .enable = exynos5_clksrc_mask_fsys_ctrl, 919 .enable = exynos5_clksrc_mask_fsys_ctrl,
920 .ctrlbit = (1 << 4), 920 .ctrlbit = (1 << 4),
@@ -925,7 +925,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
925static struct clksrc_clk exynos5_clk_sclk_mmc2 = { 925static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
926 .clk = { 926 .clk = {
927 .name = "sclk_mmc", 927 .name = "sclk_mmc",
928 .devname = "s3c-sdhci.2", 928 .devname = "exynos4-sdhci.2",
929 .parent = &exynos5_clk_dout_mmc2.clk, 929 .parent = &exynos5_clk_dout_mmc2.clk,
930 .enable = exynos5_clksrc_mask_fsys_ctrl, 930 .enable = exynos5_clksrc_mask_fsys_ctrl,
931 .ctrlbit = (1 << 8), 931 .ctrlbit = (1 << 8),
@@ -936,7 +936,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
936static struct clksrc_clk exynos5_clk_sclk_mmc3 = { 936static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
937 .clk = { 937 .clk = {
938 .name = "sclk_mmc", 938 .name = "sclk_mmc",
939 .devname = "s3c-sdhci.3", 939 .devname = "exynos4-sdhci.3",
940 .parent = &exynos5_clk_dout_mmc3.clk, 940 .parent = &exynos5_clk_dout_mmc3.clk,
941 .enable = exynos5_clksrc_mask_fsys_ctrl, 941 .enable = exynos5_clksrc_mask_fsys_ctrl,
942 .ctrlbit = (1 << 12), 942 .ctrlbit = (1 << 12),
@@ -1080,10 +1080,10 @@ static struct clk_lookup exynos5_clk_lookup[] = {
1080 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk), 1080 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk),
1081 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk), 1081 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk),
1082 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk), 1082 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk),
1083 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk), 1083 CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
1084 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk), 1084 CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
1085 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk), 1085 CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
1086 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk), 1086 CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
1087 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0), 1087 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
1088 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1), 1088 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
1089 CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1), 1089 CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e6cc50e94a58..5ccd6e80a607 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -326,6 +326,11 @@ static void __init exynos4_map_io(void)
326 s3c_fimc_setname(2, "exynos4-fimc"); 326 s3c_fimc_setname(2, "exynos4-fimc");
327 s3c_fimc_setname(3, "exynos4-fimc"); 327 s3c_fimc_setname(3, "exynos4-fimc");
328 328
329 s3c_sdhci_setname(0, "exynos4-sdhci");
330 s3c_sdhci_setname(1, "exynos4-sdhci");
331 s3c_sdhci_setname(2, "exynos4-sdhci");
332 s3c_sdhci_setname(3, "exynos4-sdhci");
333
329 /* The I2C bus controllers are directly compatible with s3c2440 */ 334 /* The I2C bus controllers are directly compatible with s3c2440 */
330 s3c_i2c0_setname("s3c2440-i2c"); 335 s3c_i2c0_setname("s3c2440-i2c");
331 s3c_i2c1_setname("s3c2440-i2c"); 336 s3c_i2c1_setname("s3c2440-i2c");
@@ -344,6 +349,11 @@ static void __init exynos5_map_io(void)
344 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; 349 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
345 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; 350 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
346 351
352 s3c_sdhci_setname(0, "exynos4-sdhci");
353 s3c_sdhci_setname(1, "exynos4-sdhci");
354 s3c_sdhci_setname(2, "exynos4-sdhci");
355 s3c_sdhci_setname(3, "exynos4-sdhci");
356
347 /* The I2C bus controllers are directly compatible with s3c2440 */ 357 /* The I2C bus controllers are directly compatible with s3c2440 */
348 s3c_i2c0_setname("s3c2440-i2c"); 358 s3c_i2c0_setname("s3c2440-i2c");
349 s3c_i2c1_setname("s3c2440-i2c"); 359 s3c_i2c1_setname("s3c2440-i2c");
@@ -537,7 +547,9 @@ void __init exynos5_init_irq(void)
537{ 547{
538 int irq; 548 int irq;
539 549
540 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 550#ifdef CONFIG_OF
551 of_irq_init(exynos4_dt_irq_match);
552#endif
541 553
542 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) { 554 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
543 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), 555 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
@@ -583,10 +595,11 @@ core_initcall(exynos_core_init);
583#ifdef CONFIG_CACHE_L2X0 595#ifdef CONFIG_CACHE_L2X0
584static int __init exynos4_l2x0_cache_init(void) 596static int __init exynos4_l2x0_cache_init(void)
585{ 597{
598 int ret;
599
586 if (soc_is_exynos5250()) 600 if (soc_is_exynos5250())
587 return 0; 601 return 0;
588 602
589 int ret;
590 ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); 603 ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
591 if (!ret) { 604 if (!ret) {
592 l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); 605 l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c
index b025db4bf602..79035018fb74 100644
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ b/arch/arm/mach-exynos/dev-dwmci.c
@@ -16,6 +16,7 @@
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/ioport.h>
19#include <linux/mmc/dw_mmc.h> 20#include <linux/mmc/dw_mmc.h>
20 21
21#include <plat/devs.h> 22#include <plat/devs.h>
@@ -33,16 +34,8 @@ static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
33} 34}
34 35
35static struct resource exynos4_dwmci_resource[] = { 36static struct resource exynos4_dwmci_resource[] = {
36 [0] = { 37 [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
37 .start = EXYNOS4_PA_DWMCI, 38 [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
38 .end = EXYNOS4_PA_DWMCI + SZ_4K - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = IRQ_DWMCI,
43 .end = IRQ_DWMCI,
44 .flags = IORESOURCE_IRQ,
45 }
46}; 39};
47 40
48static struct dw_mci_board exynos4_dwci_pdata = { 41static struct dw_mci_board exynos4_dwci_pdata = {
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 3983abee4264..69aaa4503205 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -35,8 +35,6 @@
35#include <mach/irqs.h> 35#include <mach/irqs.h>
36#include <mach/dma.h> 36#include <mach/dma.h>
37 37
38static u64 dma_dmamask = DMA_BIT_MASK(32);
39
40static u8 exynos4210_pdma0_peri[] = { 38static u8 exynos4210_pdma0_peri[] = {
41 DMACH_PCM0_RX, 39 DMACH_PCM0_RX,
42 DMACH_PCM0_TX, 40 DMACH_PCM0_TX,
diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S b/arch/arm/mach-exynos/include/mach/debug-macro.S
index 6c857ff0b5d8..e0c86ea475e7 100644
--- a/arch/arm/mach-exynos/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos/include/mach/debug-macro.S
@@ -21,10 +21,9 @@
21 */ 21 */
22 22
23 .macro addruart, rp, rv, tmp 23 .macro addruart, rp, rv, tmp
24 mov \rp, #0x10000000 24 mrc p15, 0, \tmp, c0, c0, 0
25 ldr \rp, [\rp, #0x0] 25 and \tmp, \tmp, #0xf0
26 and \rp, \rp, #0xf00000 26 teq \tmp, #0xf0 @@ A15
27 teq \rp, #0x500000 @@ EXYNOS5
28 ldreq \rp, =EXYNOS5_PA_UART 27 ldreq \rp, =EXYNOS5_PA_UART
29 movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 28 movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
30 ldr \rv, =S3C_VA_UART 29 ldr \rv, =S3C_VA_UART
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index f140e1a2d335..116167524051 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -219,6 +219,8 @@
219#define IRQ_MFC EXYNOS4_IRQ_MFC 219#define IRQ_MFC EXYNOS4_IRQ_MFC
220#define IRQ_SDO EXYNOS4_IRQ_SDO 220#define IRQ_SDO EXYNOS4_IRQ_SDO
221 221
222#define IRQ_I2S0 EXYNOS4_IRQ_I2S0
223
222#define IRQ_ADC EXYNOS4_IRQ_ADC0 224#define IRQ_ADC EXYNOS4_IRQ_ADC0
223#define IRQ_TC EXYNOS4_IRQ_PEN0 225#define IRQ_TC EXYNOS4_IRQ_PEN0
224 226
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 69f2ea6fb0d2..0e2292d04550 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -89,6 +89,10 @@
89#define EXYNOS4_PA_MDMA1 0x12840000 89#define EXYNOS4_PA_MDMA1 0x12840000
90#define EXYNOS4_PA_PDMA0 0x12680000 90#define EXYNOS4_PA_PDMA0 0x12680000
91#define EXYNOS4_PA_PDMA1 0x12690000 91#define EXYNOS4_PA_PDMA1 0x12690000
92#define EXYNOS5_PA_MDMA0 0x10800000
93#define EXYNOS5_PA_MDMA1 0x11C10000
94#define EXYNOS5_PA_PDMA0 0x121A0000
95#define EXYNOS5_PA_PDMA1 0x121B0000
92 96
93#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000 97#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
94#define EXYNOS4_PA_SYSMMU_2D_ACP 0x10A40000 98#define EXYNOS4_PA_SYSMMU_2D_ACP 0x10A40000
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 7395236ffc0e..dba83e91f0fd 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -258,9 +258,15 @@
258 258
259/* For EXYNOS5250 */ 259/* For EXYNOS5250 */
260 260
261#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
261#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100) 262#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
262#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200) 263#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
264#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
263#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500) 265#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
266#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
267#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
268#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
269
264#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100) 270#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
265#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204) 271#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
266 272
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 493f4f365ddf..2979995d5a6a 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -20,9 +20,24 @@ volatile u8 *uart_base;
20 20
21#include <plat/uncompress.h> 21#include <plat/uncompress.h>
22 22
23static unsigned int __raw_readl(unsigned int ptr)
24{
25 return *((volatile unsigned int *)ptr);
26}
27
23static void arch_detect_cpu(void) 28static void arch_detect_cpu(void)
24{ 29{
25 if (machine_is_smdk5250()) 30 u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);
31
32 /*
33 * product_id is bits 31:12
34 * bits 23:20 describe the exynosX family
35 *
36 */
37 chip_id >>= 20;
38 chip_id &= 0xf;
39
40 if (chip_id == 0x5)
26 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); 41 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
27 else 42 else
28 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); 43 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 0d26f50081ad..4711c8920e37 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
45 "exynos4210-uart.3", NULL), 45 "exynos4210-uart.3", NULL),
46 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), 46 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
47 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), 47 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
48 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL), 48 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
49 {}, 49 {},
50}; 50};
51 51
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index b3982c867c9c..ed90aef404c3 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -112,6 +112,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
112 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 112 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
113 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 113 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
114 MMC_CAP_ERASE), 114 MMC_CAP_ERASE),
115 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
115 .cd_type = S3C_SDHCI_CD_PERMANENT, 116 .cd_type = S3C_SDHCI_CD_PERMANENT,
116 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 117 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
117}; 118};
@@ -307,49 +308,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
307}; 308};
308 309
309/* TSP */ 310/* TSP */
310static u8 mxt_init_vals[] = {
311 /* MXT_GEN_COMMAND(6) */
312 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
313 /* MXT_GEN_POWER(7) */
314 0x20, 0xff, 0x32,
315 /* MXT_GEN_ACQUIRE(8) */
316 0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
317 /* MXT_TOUCH_MULTI(9) */
318 0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
319 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
320 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
321 0x00,
322 /* MXT_TOUCH_KEYARRAY(15) */
323 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
324 0x00,
325 /* MXT_SPT_GPIOPWM(19) */
326 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
327 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
328 /* MXT_PROCI_GRIPFACE(20) */
329 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
330 0x0f, 0x0a,
331 /* MXT_PROCG_NOISE(22) */
332 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
333 0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
334 /* MXT_TOUCH_PROXIMITY(23) */
335 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
336 0x00, 0x00, 0x00, 0x00, 0x00,
337 /* MXT_PROCI_ONETOUCH(24) */
338 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
339 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
340 /* MXT_SPT_SELFTEST(25) */
341 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
342 0x00, 0x00, 0x00, 0x00,
343 /* MXT_PROCI_TWOTOUCH(27) */
344 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
345 /* MXT_SPT_CTECONFIG(28) */
346 0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
347};
348
349static struct mxt_platform_data mxt_platform_data = { 311static struct mxt_platform_data mxt_platform_data = {
350 .config = mxt_init_vals,
351 .config_length = ARRAY_SIZE(mxt_init_vals),
352
353 .x_line = 18, 312 .x_line = 18,
354 .y_line = 11, 313 .y_line = 11,
355 .x_size = 1024, 314 .x_size = 1024,
@@ -571,7 +530,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {
571 530
572static struct regulator_init_data __initdata max8997_ldo8_data = { 531static struct regulator_init_data __initdata max8997_ldo8_data = {
573 .constraints = { 532 .constraints = {
574 .name = "VUSB/VDAC_3.3V_C210", 533 .name = "VUSB+VDAC_3.3V_C210",
575 .min_uV = 3300000, 534 .min_uV = 3300000,
576 .max_uV = 3300000, 535 .max_uV = 3300000,
577 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 536 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
@@ -1347,6 +1306,7 @@ static struct platform_device *nuri_devices[] __initdata = {
1347 1306
1348static void __init nuri_map_io(void) 1307static void __init nuri_map_io(void)
1349{ 1308{
1309 clk_xusbxti.rate = 24000000;
1350 exynos_init_io(NULL, 0); 1310 exynos_init_io(NULL, 0);
1351 s3c24xx_init_clocks(24000000); 1311 s3c24xx_init_clocks(24000000);
1352 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); 1312 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
@@ -1379,7 +1339,6 @@ static void __init nuri_machine_init(void)
1379 nuri_camera_init(); 1339 nuri_camera_init();
1380 1340
1381 nuri_ehci_init(); 1341 nuri_ehci_init();
1382 clk_xusbxti.rate = 24000000;
1383 1342
1384 /* Last */ 1343 /* Last */
1385 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); 1344 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 6bb9dbdd73fd..cb2b027f09a6 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,6 +29,7 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30 30
31#include <plat/regs-serial.h> 31#include <plat/regs-serial.h>
32#include <plat/clock.h>
32#include <plat/cpu.h> 33#include <plat/cpu.h>
33#include <plat/devs.h> 34#include <plat/devs.h>
34#include <plat/iic.h> 35#include <plat/iic.h>
@@ -746,6 +747,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
746 .max_width = 8, 747 .max_width = 8,
747 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 748 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
748 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), 749 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
750 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
749 .cd_type = S3C_SDHCI_CD_PERMANENT, 751 .cd_type = S3C_SDHCI_CD_PERMANENT,
750 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 752 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
751}; 753};
@@ -1057,6 +1059,7 @@ static struct platform_device *universal_devices[] __initdata = {
1057 1059
1058static void __init universal_map_io(void) 1060static void __init universal_map_io(void)
1059{ 1061{
1062 clk_xusbxti.rate = 24000000;
1060 exynos_init_io(NULL, 0); 1063 exynos_init_io(NULL, 0);
1061 s3c24xx_init_clocks(24000000); 1064 s3c24xx_init_clocks(24000000);
1062 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 1065 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index b9a95ed75553..98e04f5a87dd 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -662,6 +662,7 @@ static struct clk_lookup lookups[] = {
662 _REGISTER_CLOCK(NULL, "dma", dma_clk) 662 _REGISTER_CLOCK(NULL, "dma", dma_clk)
663 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 663 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
664 _REGISTER_CLOCK(NULL, "brom", brom_clk) 664 _REGISTER_CLOCK(NULL, "brom", brom_clk)
665 _REGISTER_CLOCK(NULL, "emma", emma_clk)
665 _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk) 666 _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)
666 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) 667 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
667 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) 668 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 1e279af656ad..e56c1a83eee3 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -483,7 +483,7 @@ static struct clk_lookup lookups[] = {
483 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk) 483 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
484 _REGISTER_CLOCK(NULL, "max", max_clk) 484 _REGISTER_CLOCK(NULL, "max", max_clk)
485 _REGISTER_CLOCK(NULL, "audmux", audmux_clk) 485 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
486 _REGISTER_CLOCK(NULL, "csi", csi_clk) 486 _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
487 _REGISTER_CLOCK(NULL, "iim", iim_clk) 487 _REGISTER_CLOCK(NULL, "iim", iim_clk)
488 _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) 488 _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
489 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) 489 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index 861ceb8232d6..ed38d03c61f2 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -35,7 +35,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
35static int __init imx27_avic_add_irq_domain(struct device_node *np, 35static int __init imx27_avic_add_irq_domain(struct device_node *np,
36 struct device_node *interrupt_parent) 36 struct device_node *interrupt_parent)
37{ 37{
38 irq_domain_add_simple(np, 0); 38 irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
39 return 0; 39 return 0;
40} 40}
41 41
@@ -44,7 +44,9 @@ static int __init imx27_gpio_add_irq_domain(struct device_node *np,
44{ 44{
45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
46 46
47 irq_domain_add_simple(np, gpio_irq_base); 47 gpio_irq_base -= 32;
48 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
49 NULL);
48 50
49 return 0; 51 return 0;
50} 52}
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 27bc27e6ea41..c650145d1646 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -38,6 +38,8 @@
38#include <linux/usb/otg.h> 38#include <linux/usb/otg.h>
39#include <linux/usb/ulpi.h> 39#include <linux/usb/ulpi.h>
40#include <linux/delay.h> 40#include <linux/delay.h>
41#include <linux/regulator/machine.h>
42#include <linux/regulator/fixed.h>
41 43
42#include <mach/hardware.h> 44#include <mach/hardware.h>
43#include <asm/mach-types.h> 45#include <asm/mach-types.h>
@@ -479,6 +481,11 @@ static struct platform_device *devices[] __initdata = {
479 &armadillo5x0_smc911x_device, 481 &armadillo5x0_smc911x_device,
480}; 482};
481 483
484static struct regulator_consumer_supply dummy_supplies[] = {
485 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
486 REGULATOR_SUPPLY("vddvario", "smsc911x"),
487};
488
482/* 489/*
483 * Perform board specific initializations 490 * Perform board specific initializations
484 */ 491 */
@@ -489,6 +496,8 @@ static void __init armadillo5x0_init(void)
489 mxc_iomux_setup_multiple_pins(armadillo5x0_pins, 496 mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
490 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); 497 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
491 498
499 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
500
492 platform_add_devices(devices, ARRAY_SIZE(devices)); 501 platform_add_devices(devices, ARRAY_SIZE(devices));
493 imx_add_gpio_keys(&armadillo5x0_button_data); 502 imx_add_gpio_keys(&armadillo5x0_button_data);
494 imx31_add_imx_i2c1(NULL); 503 imx31_add_imx_i2c1(NULL);
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index fc78e8071cd1..15a26e908260 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -24,6 +24,8 @@
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25#include <linux/smsc911x.h> 25#include <linux/smsc911x.h>
26#include <linux/types.h> 26#include <linux/types.h>
27#include <linux/regulator/machine.h>
28#include <linux/regulator/fixed.h>
27 29
28#include <asm/irq.h> 30#include <asm/irq.h>
29#include <asm/mach-types.h> 31#include <asm/mach-types.h>
@@ -166,6 +168,11 @@ static struct platform_device kzm_smsc9118_device = {
166 }, 168 },
167}; 169};
168 170
171static struct regulator_consumer_supply dummy_supplies[] = {
172 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
173 REGULATOR_SUPPLY("vddvario", "smsc911x"),
174};
175
169static int __init kzm_init_smsc9118(void) 176static int __init kzm_init_smsc9118(void)
170{ 177{
171 /* 178 /*
@@ -175,6 +182,8 @@ static int __init kzm_init_smsc9118(void)
175 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int"); 182 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
176 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2)); 183 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
177 184
185 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
186
178 return platform_device_register(&kzm_smsc9118_device); 187 return platform_device_register(&kzm_smsc9118_device);
179} 188}
180#else 189#else
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 02401bbd6d53..83714b0cc290 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -34,6 +34,8 @@
34#include <linux/mfd/mc13783.h> 34#include <linux/mfd/mc13783.h>
35#include <linux/usb/otg.h> 35#include <linux/usb/otg.h>
36#include <linux/usb/ulpi.h> 36#include <linux/usb/ulpi.h>
37#include <linux/regulator/machine.h>
38#include <linux/regulator/fixed.h>
37 39
38#include <asm/mach-types.h> 40#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -242,6 +244,11 @@ static struct platform_device *devices[] __initdata = {
242static int mx31lilly_baseboard; 244static int mx31lilly_baseboard;
243core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444); 245core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
244 246
247static struct regulator_consumer_supply dummy_supplies[] = {
248 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
249 REGULATOR_SUPPLY("vddvario", "smsc911x"),
250};
251
245static void __init mx31lilly_board_init(void) 252static void __init mx31lilly_board_init(void)
246{ 253{
247 imx31_soc_init(); 254 imx31_soc_init();
@@ -280,6 +287,8 @@ static void __init mx31lilly_board_init(void)
280 imx31_add_spi_imx1(&spi1_pdata); 287 imx31_add_spi_imx1(&spi1_pdata);
281 spi_register_board_info(&mc13783_dev, 1); 288 spi_register_board_info(&mc13783_dev, 1);
282 289
290 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
291
283 platform_add_devices(devices, ARRAY_SIZE(devices)); 292 platform_add_devices(devices, ARRAY_SIZE(devices));
284 293
285 /* USB */ 294 /* USB */
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index ef80751712e7..0abef5f13df5 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -29,6 +29,8 @@
29#include <linux/usb/ulpi.h> 29#include <linux/usb/ulpi.h>
30#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/regulator/machine.h>
33#include <linux/regulator/fixed.h>
32 34
33#include <asm/mach-types.h> 35#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -226,6 +228,11 @@ void __init mx31lite_map_io(void)
226static int mx31lite_baseboard; 228static int mx31lite_baseboard;
227core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444); 229core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
228 230
231static struct regulator_consumer_supply dummy_supplies[] = {
232 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
233 REGULATOR_SUPPLY("vddvario", "smsc911x"),
234};
235
229static void __init mx31lite_init(void) 236static void __init mx31lite_init(void)
230{ 237{
231 int ret; 238 int ret;
@@ -259,6 +266,8 @@ static void __init mx31lite_init(void)
259 if (usbh2_pdata.otg) 266 if (usbh2_pdata.otg)
260 imx31_add_mxc_ehci_hs(2, &usbh2_pdata); 267 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
261 268
269 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
270
262 /* SMSC9117 IRQ pin */ 271 /* SMSC9117 IRQ pin */
263 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); 272 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
264 if (ret) 273 if (ret)
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index e14291d89e4f..6ae51c6b95b7 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -97,7 +97,7 @@ static struct i2c_board_info __initdata i2c_devices_3ds[] = {
97static int lcd_power_gpio = -ENXIO; 97static int lcd_power_gpio = -ENXIO;
98 98
99static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, 99static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip,
100 void *data) 100 const void *data)
101{ 101{
102 return !strcmp(chip->label, data); 102 return !strcmp(chip->label, data);
103} 103}
diff --git a/arch/arm/mach-imx/mach-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c
index 753f4fc9ec04..05641980dc5e 100644
--- a/arch/arm/mach-imx/mach-mx53_ard.c
+++ b/arch/arm/mach-imx/mach-mx53_ard.c
@@ -23,6 +23,8 @@
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/smsc911x.h> 25#include <linux/smsc911x.h>
26#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
26 28
27#include <mach/common.h> 29#include <mach/common.h>
28#include <mach/hardware.h> 30#include <mach/hardware.h>
@@ -214,6 +216,11 @@ static int weim_cs_config(void)
214 return 0; 216 return 0;
215} 217}
216 218
219static struct regulator_consumer_supply dummy_supplies[] = {
220 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
221 REGULATOR_SUPPLY("vddvario", "smsc911x"),
222};
223
217void __init imx53_ard_common_init(void) 224void __init imx53_ard_common_init(void)
218{ 225{
219 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, 226 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
@@ -232,6 +239,7 @@ static void __init mx53_ard_board_init(void)
232 239
233 imx53_ard_common_init(); 240 imx53_ard_common_init();
234 mx53_ard_io_init(); 241 mx53_ard_io_init();
242 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
235 platform_add_devices(devices, ARRAY_SIZE(devices)); 243 platform_add_devices(devices, ARRAY_SIZE(devices));
236 244
237 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); 245 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 05250aed61fb..e10f3914fcfe 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -35,7 +35,7 @@ static void imx5_idle(void)
35 } 35 }
36 clk_enable(gpc_dvfs_clk); 36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake() != 0) 38 if (!tzic_enable_wake())
39 cpu_do_idle(); 39 cpu_do_idle();
40 clk_disable(gpc_dvfs_clk); 40 clk_disable(gpc_dvfs_clk);
41} 41}
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 3698a370d636..26aac363a064 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -86,9 +86,6 @@ static void __init halibut_init(void)
86static void __init halibut_fixup(struct tag *tags, char **cmdline, 86static void __init halibut_fixup(struct tag *tags, char **cmdline,
87 struct meminfo *mi) 87 struct meminfo *mi)
88{ 88{
89 mi->nr_banks=1;
90 mi->bank[0].start = PHYS_OFFSET;
91 mi->bank[0].size = (101*1024*1024);
92} 89}
93 90
94static void __init halibut_map_io(void) 91static void __init halibut_map_io(void)
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 962e71169750..fb3496a52ef4 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -17,6 +17,7 @@
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18#include <linux/of.h> 18#include <linux/of.h>
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/of_irq.h>
20#include <linux/of_platform.h> 21#include <linux/of_platform.h>
21#include <linux/memblock.h> 22#include <linux/memblock.h>
22 23
@@ -49,10 +50,22 @@ static void __init msm8x60_map_io(void)
49 msm_map_msm8x60_io(); 50 msm_map_msm8x60_io();
50} 51}
51 52
53#ifdef CONFIG_OF
54static struct of_device_id msm_dt_gic_match[] __initdata = {
55 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
56 {}
57};
58#endif
59
52static void __init msm8x60_init_irq(void) 60static void __init msm8x60_init_irq(void)
53{ 61{
54 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, 62 if (!of_have_populated_dt())
55 (void *)MSM_QGIC_CPU_BASE); 63 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
64 (void *)MSM_QGIC_CPU_BASE);
65#ifdef CONFIG_OF
66 else
67 of_irq_init(msm_dt_gic_match);
68#endif
56 69
57 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ 70 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
58 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); 71 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
@@ -73,16 +86,8 @@ static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
73 {} 86 {}
74}; 87};
75 88
76static struct of_device_id msm_dt_gic_match[] __initdata = {
77 { .compatible = "qcom,msm-8660-qgic", },
78 {}
79};
80
81static void __init msm8x60_dt_init(void) 89static void __init msm8x60_dt_init(void)
82{ 90{
83 irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
84 GIC_SPI_START);
85
86 if (of_machine_is_compatible("qcom,msm8660-surf")) { 91 if (of_machine_is_compatible("qcom,msm8660-surf")) {
87 printk(KERN_INFO "Init surf UART registers\n"); 92 printk(KERN_INFO "Init surf UART registers\n");
88 msm8x60_init_uart12dm(); 93 msm8x60_init_uart12dm();
diff --git a/arch/arm/mach-msm/board-trout-panel.c b/arch/arm/mach-msm/board-trout-panel.c
index 25105c1027fe..89bf6b426699 100644
--- a/arch/arm/mach-msm/board-trout-panel.c
+++ b/arch/arm/mach-msm/board-trout-panel.c
@@ -12,6 +12,7 @@
12 12
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/system_info.h>
15 16
16#include <mach/msm_fb.h> 17#include <mach/msm_fb.h>
17#include <mach/vreg.h> 18#include <mach/vreg.h>
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 5414f76ec0a9..d4060a37e23d 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/clkdev.h> 20#include <linux/clkdev.h>
21 21
22#include <asm/system_info.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index 169a84007456..c14011fe832d 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -16,6 +16,7 @@
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H 16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H 17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18 18
19#include <asm/barrier.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <mach/msm_iomap.h> 21#include <mach/msm_iomap.h>
21 22
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c
index 67e701c7f183..9980dc736e7b 100644
--- a/arch/arm/mach-msm/proc_comm.c
+++ b/arch/arm/mach-msm/proc_comm.c
@@ -121,7 +121,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
121 * and unknown state. This function should be called early to 121 * and unknown state. This function should be called early to
122 * wait on the ARM9. 122 * wait on the ARM9.
123 */ 123 */
124void __init proc_comm_boot_wait(void) 124void __devinit proc_comm_boot_wait(void)
125{ 125{
126 void __iomem *base = MSM_SHARED_RAM_BASE; 126 void __iomem *base = MSM_SHARED_RAM_BASE;
127 127
diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c
index 0c56a5aaf588..c56df9e932ae 100644
--- a/arch/arm/mach-msm/smd_debug.c
+++ b/arch/arm/mach-msm/smd_debug.c
@@ -203,15 +203,9 @@ static ssize_t debug_read(struct file *file, char __user *buf,
203 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize); 203 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize);
204} 204}
205 205
206static int debug_open(struct inode *inode, struct file *file)
207{
208 file->private_data = inode->i_private;
209 return 0;
210}
211
212static const struct file_operations debug_ops = { 206static const struct file_operations debug_ops = {
213 .read = debug_read, 207 .read = debug_read,
214 .open = debug_open, 208 .open = simple_open,
215 .llseek = default_llseek, 209 .llseek = default_llseek,
216}; 210};
217 211
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
new file mode 100644
index 000000000000..ce4f8005b26f
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/io.h
@@ -0,0 +1,45 @@
1/*
2 * arch/arm/mach-omap1/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Modifications:
30 * 06-12-1997 RMK Created.
31 * 07-04-1999 RMK Major cleanup
32 */
33
34#ifndef __ASM_ARM_ARCH_IO_H
35#define __ASM_ARM_ARCH_IO_H
36
37#define IO_SPACE_LIMIT 0xffffffff
38
39/*
40 * We don't actually have real ISA nor PCI buses, but there is so many
41 * drivers out there that might just work if we fake them...
42 */
43#define __io(a) __typesafe_io(a)
44
45#endif
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 087dba0df47e..e9cc52d4cb28 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -27,6 +27,7 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29 29
30#include <mach/hardware.h>
30 31
31#include <plat/mux.h> 32#include <plat/mux.h>
32 33
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index 6e90665a7c47..fb202af01d0d 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,
47 int n = (pdev->id - 1) << 1; 47 int n = (pdev->id - 1) << 1;
48 u32 l; 48 u32 l;
49 49
50 l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); 50 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
51 l |= source << n; 51 l |= source << n;
52 __raw_writel(l, MOD_CONF_CTRL_1); 52 omap_writel(l, MOD_CONF_CTRL_1);
53 53
54 return 0; 54 return 0;
55} 55}
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a39fc4bbd2b8..130ab00c09a2 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -20,6 +20,7 @@
20#include <linux/usb/otg.h> 20#include <linux/usb/otg.h>
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/i2c/twl.h> 22#include <linux/i2c/twl.h>
23#include <linux/mfd/twl6040.h>
23#include <linux/gpio_keys.h> 24#include <linux/gpio_keys.h>
24#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
25#include <linux/regulator/fixed.h> 26#include <linux/regulator/fixed.h>
@@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = {
560 }, 561 },
561}; 562};
562 563
563static struct twl4030_codec_data twl6040_codec = { 564static struct twl6040_codec_data twl6040_codec = {
564 /* single-step ramp for headset and handsfree */ 565 /* single-step ramp for headset and handsfree */
565 .hs_left_step = 0x0f, 566 .hs_left_step = 0x0f,
566 .hs_right_step = 0x0f, 567 .hs_right_step = 0x0f,
@@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = {
568 .hf_right_step = 0x1d, 569 .hf_right_step = 0x1d,
569}; 570};
570 571
571static struct twl4030_vibra_data twl6040_vibra = { 572static struct twl6040_vibra_data twl6040_vibra = {
572 .vibldrv_res = 8, 573 .vibldrv_res = 8,
573 .vibrdrv_res = 3, 574 .vibrdrv_res = 3,
574 .viblmotor_res = 10, 575 .viblmotor_res = 10,
@@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = {
577 .vddvibr_uV = 0, /* fixed volt supply - VBAT */ 578 .vddvibr_uV = 0, /* fixed volt supply - VBAT */
578}; 579};
579 580
580static struct twl4030_audio_data twl6040_audio = { 581static struct twl6040_platform_data twl6040_data = {
581 .codec = &twl6040_codec, 582 .codec = &twl6040_codec,
582 .vibra = &twl6040_vibra, 583 .vibra = &twl6040_vibra,
583 .audpwron_gpio = 127, 584 .audpwron_gpio = 127,
584 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
585 .irq_base = TWL6040_CODEC_IRQ_BASE, 585 .irq_base = TWL6040_CODEC_IRQ_BASE,
586}; 586};
587 587
588static struct twl4030_platform_data sdp4430_twldata = { 588static struct twl4030_platform_data sdp4430_twldata = {
589 .audio = &twl6040_audio,
590 /* Regulators */ 589 /* Regulators */
591 .vusim = &sdp4430_vusim, 590 .vusim = &sdp4430_vusim,
592 .vaux1 = &sdp4430_vaux1, 591 .vaux1 = &sdp4430_vaux1,
@@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void)
617 TWL_COMMON_REGULATOR_VCXIO | 616 TWL_COMMON_REGULATOR_VCXIO |
618 TWL_COMMON_REGULATOR_VUSB | 617 TWL_COMMON_REGULATOR_VUSB |
619 TWL_COMMON_REGULATOR_CLK32KG); 618 TWL_COMMON_REGULATOR_CLK32KG);
620 omap4_pmic_init("twl6030", &sdp4430_twldata); 619 omap4_pmic_init("twl6030", &sdp4430_twldata,
620 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
621 omap_register_i2c_bus(2, 400, NULL, 0); 621 omap_register_i2c_bus(2, 400, NULL, 0);
622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, 622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); 623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 41b0a2fe0b04..909a8b91b564 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -26,6 +26,7 @@
26 26
27#include <linux/i2c/at24.h> 27#include <linux/i2c/at24.h>
28#include <linux/i2c/twl.h> 28#include <linux/i2c/twl.h>
29#include <linux/regulator/fixed.h>
29#include <linux/regulator/machine.h> 30#include <linux/regulator/machine.h>
30#include <linux/mmc/host.h> 31#include <linux/mmc/host.h>
31 32
@@ -81,8 +82,23 @@ static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
81 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, 82 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
82}; 83};
83 84
85static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
86 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
87 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
88};
89
90static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
91 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
92 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
93};
94
84static void __init cm_t35_init_ethernet(void) 95static void __init cm_t35_init_ethernet(void)
85{ 96{
97 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
98 ARRAY_SIZE(cm_t35_smsc911x_supplies));
99 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
100 ARRAY_SIZE(sb_t35_smsc911x_supplies));
101
86 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg); 102 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
87 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg); 103 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
88} 104}
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 74e1687b5170..098d183a0086 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
137 137
138static void __init omap4_i2c_init(void) 138static void __init omap4_i2c_init(void)
139{ 139{
140 omap4_pmic_init("twl6030", &sdp4430_twldata); 140 omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0);
141} 141}
142 142
143static void __init omap4_init(void) 143static void __init omap4_init(void)
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index e558800adfdf..930c0d380435 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -634,8 +634,14 @@ static void __init igep_wlan_bt_init(void)
634static inline void __init igep_wlan_bt_init(void) { } 634static inline void __init igep_wlan_bt_init(void) { }
635#endif 635#endif
636 636
637static struct regulator_consumer_supply dummy_supplies[] = {
638 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
639 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
640};
641
637static void __init igep_init(void) 642static void __init igep_init(void)
638{ 643{
644 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
639 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 645 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
640 646
641 /* Get IGEP2 hardware revision */ 647 /* Get IGEP2 hardware revision */
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index d50a562adfa0..1b6049567ab4 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -22,6 +22,7 @@
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
25#include <linux/regulator/fixed.h>
25#include <linux/regulator/machine.h> 26#include <linux/regulator/machine.h>
26#include <linux/i2c/twl.h> 27#include <linux/i2c/twl.h>
27#include <linux/io.h> 28#include <linux/io.h>
@@ -410,8 +411,14 @@ static struct mtd_partition ldp_nand_partitions[] = {
410 411
411}; 412};
412 413
414static struct regulator_consumer_supply dummy_supplies[] = {
415 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
416 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
417};
418
413static void __init omap_ldp_init(void) 419static void __init omap_ldp_init(void)
414{ 420{
421 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
415 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 422 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
416 ldp_init_smsc911x(); 423 ldp_init_smsc911x();
417 omap_i2c_init(); 424 omap_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 4c90f078abe1..49df12735b41 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -114,15 +114,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
114 114
115static inline void __init omap3evm_init_smsc911x(void) 115static inline void __init omap3evm_init_smsc911x(void)
116{ 116{
117 struct clk *l3ck;
118 unsigned int rate;
119
120 l3ck = clk_get(NULL, "l3_ck");
121 if (IS_ERR(l3ck))
122 rate = 100000000;
123 else
124 rate = clk_get_rate(l3ck);
125
126 /* Configure ethernet controller reset gpio */ 117 /* Configure ethernet controller reset gpio */
127 if (cpu_is_omap3430()) { 118 if (cpu_is_omap3430()) {
128 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) 119 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
@@ -632,9 +623,15 @@ static void __init omap3_evm_wl12xx_init(void)
632#endif 623#endif
633} 624}
634 625
626static struct regulator_consumer_supply dummy_supplies[] = {
627 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
628 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
629};
630
635static void __init omap3_evm_init(void) 631static void __init omap3_evm_init(void)
636{ 632{
637 omap3_evm_get_revision(); 633 omap3_evm_get_revision();
634 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
638 635
639 if (cpu_is_omap3630()) 636 if (cpu_is_omap3630())
640 omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB); 637 omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 4a7d8c8a75da..9b3c141ff51b 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -23,6 +23,7 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25 25
26#include <linux/regulator/fixed.h>
26#include <linux/regulator/machine.h> 27#include <linux/regulator/machine.h>
27 28
28#include <linux/i2c/twl.h> 29#include <linux/i2c/twl.h>
@@ -188,8 +189,14 @@ static struct omap_board_mux board_mux[] __initdata = {
188}; 189};
189#endif 190#endif
190 191
192static struct regulator_consumer_supply dummy_supplies[] = {
193 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
194 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
195};
196
191static void __init omap3logic_init(void) 197static void __init omap3logic_init(void)
192{ 198{
199 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
193 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 200 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
194 omap3torpedo_fix_pbias_voltage(); 201 omap3torpedo_fix_pbias_voltage();
195 omap3logic_i2c_init(); 202 omap3logic_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 641004380795..4dffc95bddd2 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -24,6 +24,7 @@
24#include <linux/input.h> 24#include <linux/input.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26 26
27#include <linux/regulator/fixed.h>
27#include <linux/regulator/machine.h> 28#include <linux/regulator/machine.h>
28#include <linux/i2c/twl.h> 29#include <linux/i2c/twl.h>
29#include <linux/mmc/host.h> 30#include <linux/mmc/host.h>
@@ -72,15 +73,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
72 73
73static inline void __init omap3stalker_init_eth(void) 74static inline void __init omap3stalker_init_eth(void)
74{ 75{
75 struct clk *l3ck;
76 unsigned int rate;
77
78 l3ck = clk_get(NULL, "l3_ck");
79 if (IS_ERR(l3ck))
80 rate = 100000000;
81 else
82 rate = clk_get_rate(l3ck);
83
84 omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); 76 omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP);
85 gpmc_smsc911x_init(&smsc911x_cfg); 77 gpmc_smsc911x_init(&smsc911x_cfg);
86} 78}
@@ -419,8 +411,14 @@ static struct omap_board_mux board_mux[] __initdata = {
419}; 411};
420#endif 412#endif
421 413
414static struct regulator_consumer_supply dummy_supplies[] = {
415 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
416 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
417};
418
422static void __init omap3_stalker_init(void) 419static void __init omap3_stalker_init(void)
423{ 420{
421 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
424 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); 422 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
425 omap_board_config = omap3_stalker_config; 423 omap_board_config = omap3_stalker_config;
426 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); 424 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index d8c0e89f0126..1b782ba53433 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -25,6 +25,7 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/usb/otg.h> 26#include <linux/usb/otg.h>
27#include <linux/i2c/twl.h> 27#include <linux/i2c/twl.h>
28#include <linux/mfd/twl6040.h>
28#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
29#include <linux/regulator/fixed.h> 30#include <linux/regulator/fixed.h>
30#include <linux/wl12xx.h> 31#include <linux/wl12xx.h>
@@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
284 return 0; 285 return 0;
285} 286}
286 287
287static struct twl4030_codec_data twl6040_codec = { 288static struct twl6040_codec_data twl6040_codec = {
288 /* single-step ramp for headset and handsfree */ 289 /* single-step ramp for headset and handsfree */
289 .hs_left_step = 0x0f, 290 .hs_left_step = 0x0f,
290 .hs_right_step = 0x0f, 291 .hs_right_step = 0x0f,
@@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = {
292 .hf_right_step = 0x1d, 293 .hf_right_step = 0x1d,
293}; 294};
294 295
295static struct twl4030_audio_data twl6040_audio = { 296static struct twl6040_platform_data twl6040_data = {
296 .codec = &twl6040_codec, 297 .codec = &twl6040_codec,
297 .audpwron_gpio = 127, 298 .audpwron_gpio = 127,
298 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
299 .irq_base = TWL6040_CODEC_IRQ_BASE, 299 .irq_base = TWL6040_CODEC_IRQ_BASE,
300}; 300};
301 301
302/* Panda board uses the common PMIC configuration */ 302/* Panda board uses the common PMIC configuration */
303static struct twl4030_platform_data omap4_panda_twldata = { 303static struct twl4030_platform_data omap4_panda_twldata;
304 .audio = &twl6040_audio,
305};
306 304
307/* 305/*
308 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM 306 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
@@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void)
326 TWL_COMMON_REGULATOR_VCXIO | 324 TWL_COMMON_REGULATOR_VCXIO |
327 TWL_COMMON_REGULATOR_VUSB | 325 TWL_COMMON_REGULATOR_VUSB |
328 TWL_COMMON_REGULATOR_CLK32KG); 326 TWL_COMMON_REGULATOR_CLK32KG);
329 omap4_pmic_init("twl6030", &omap4_panda_twldata); 327 omap4_pmic_init("twl6030", &omap4_panda_twldata,
328 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
330 omap_register_i2c_bus(2, 400, NULL, 0); 329 omap_register_i2c_bus(2, 400, NULL, 0);
331 /* 330 /*
332 * Bus 3 is attached to the DVI port where devices like the pico DLP 331 * Bus 3 is attached to the DVI port where devices like the pico DLP
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 668533e2a379..33aa3910b09e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -498,10 +498,18 @@ static struct gpio overo_bt_gpios[] __initdata = {
498 { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, 498 { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH, "lcd bl enable" },
499}; 499};
500 500
501static struct regulator_consumer_supply dummy_supplies[] = {
502 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
503 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
504 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
505 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
506};
507
501static void __init overo_init(void) 508static void __init overo_init(void)
502{ 509{
503 int ret; 510 int ret;
504 511
512 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
505 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 513 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
506 omap_hsmmc_init(mmc); 514 omap_hsmmc_init(mmc);
507 overo_i2c_init(); 515 overo_i2c_init();
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index 1e8540eabde9..f64f44173061 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -14,6 +14,9 @@
14#include <linux/smsc911x.h> 14#include <linux/smsc911x.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16 16
17#include <linux/regulator/fixed.h>
18#include <linux/regulator/machine.h>
19
17#include <plat/gpmc.h> 20#include <plat/gpmc.h>
18#include <plat/gpmc-smsc911x.h> 21#include <plat/gpmc-smsc911x.h>
19 22
@@ -117,11 +120,17 @@ static struct platform_device *zoom_devices[] __initdata = {
117 &zoom_debugboard_serial_device, 120 &zoom_debugboard_serial_device,
118}; 121};
119 122
123static struct regulator_consumer_supply dummy_supplies[] = {
124 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
125 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
126};
127
120int __init zoom_debugboard_init(void) 128int __init zoom_debugboard_init(void)
121{ 129{
122 if (!omap_zoom_debugboard_detect()) 130 if (!omap_zoom_debugboard_detect())
123 return 0; 131 return 0;
124 132
133 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
125 zoom_init_smsc911x(); 134 zoom_init_smsc911x();
126 zoom_init_quaduart(); 135 zoom_init_quaduart();
127 return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices)); 136 return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 7072e0d651b1..3d9d746b221a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -165,83 +165,3 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
165 165
166 return 0; 166 return 0;
167} 167}
168
169#ifdef CONFIG_CPU_FREQ
170/*
171 * Walk PRCM rate table and fillout cpufreq freq_table
172 * XXX This should be replaced by an OPP layer in the near future
173 */
174static struct cpufreq_frequency_table *freq_table;
175
176void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
177{
178 const struct prcm_config *prcm;
179 int i = 0;
180 int tbl_sz = 0;
181
182 if (!cpu_is_omap24xx())
183 return;
184
185 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
186 if (!(prcm->flags & cpu_mask))
187 continue;
188 if (prcm->xtal_speed != sclk->rate)
189 continue;
190
191 /* don't put bypass rates in table */
192 if (prcm->dpll_speed == prcm->xtal_speed)
193 continue;
194
195 tbl_sz++;
196 }
197
198 /*
199 * XXX Ensure that we're doing what CPUFreq expects for this error
200 * case and the following one
201 */
202 if (tbl_sz == 0) {
203 pr_warning("%s: no matching entries in rate_table\n",
204 __func__);
205 return;
206 }
207
208 /* Include the CPUFREQ_TABLE_END terminator entry */
209 tbl_sz++;
210
211 freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
212 GFP_ATOMIC);
213 if (!freq_table) {
214 pr_err("%s: could not kzalloc frequency table\n", __func__);
215 return;
216 }
217
218 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
219 if (!(prcm->flags & cpu_mask))
220 continue;
221 if (prcm->xtal_speed != sclk->rate)
222 continue;
223
224 /* don't put bypass rates in table */
225 if (prcm->dpll_speed == prcm->xtal_speed)
226 continue;
227
228 freq_table[i].index = i;
229 freq_table[i].frequency = prcm->mpu_speed / 1000;
230 i++;
231 }
232
233 freq_table[i].index = i;
234 freq_table[i].frequency = CPUFREQ_TABLE_END;
235
236 *table = &freq_table[0];
237}
238
239void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
240{
241 if (!cpu_is_omap24xx())
242 return;
243
244 kfree(freq_table);
245}
246
247#endif
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index f57ed5baeccf..d9f4931513f9 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -536,10 +536,5 @@ struct clk_functions omap2_clk_functions = {
536 .clk_set_rate = omap2_clk_set_rate, 536 .clk_set_rate = omap2_clk_set_rate,
537 .clk_set_parent = omap2_clk_set_parent, 537 .clk_set_parent = omap2_clk_set_parent,
538 .clk_disable_unused = omap2_clk_disable_unused, 538 .clk_disable_unused = omap2_clk_disable_unused,
539#ifdef CONFIG_CPU_FREQ
540 /* These will be removed when the OPP code is integrated */
541 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
542 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
543#endif
544}; 539};
545 540
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b8c2a686481c..a1bb23a23351 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -146,14 +146,6 @@ extern const struct clksel_rate gpt_sys_rates[];
146extern const struct clksel_rate gfx_l3_rates[]; 146extern const struct clksel_rate gfx_l3_rates[];
147extern const struct clksel_rate dsp_ick_rates[]; 147extern const struct clksel_rate dsp_ick_rates[];
148 148
149#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
150extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
151extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
152#else
153#define omap2_clk_init_cpufreq_table 0
154#define omap2_clk_exit_cpufreq_table 0
155#endif
156
157extern const struct clkops clkops_omap2_iclk_dflt_wait; 149extern const struct clkops clkops_omap2_iclk_dflt_wait;
158extern const struct clkops clkops_omap2_iclk_dflt; 150extern const struct clkops clkops_omap2_iclk_dflt;
159extern const struct clkops clkops_omap2_iclk_idle_only; 151extern const struct clkops clkops_omap2_iclk_idle_only;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 480fb8f09aed..f4a626f7c79e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -747,7 +747,7 @@ static struct clk dpll4_m3_ck = {
747 .parent = &dpll4_ck, 747 .parent = &dpll4_ck,
748 .init = &omap2_init_clksel_parent, 748 .init = &omap2_init_clksel_parent,
749 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 749 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
750 .clksel_mask = OMAP3430_CLKSEL_TV_MASK, 750 .clksel_mask = OMAP3630_CLKSEL_TV_MASK,
751 .clksel = dpll4_clksel, 751 .clksel = dpll4_clksel,
752 .clkdm_name = "dpll4_clkdm", 752 .clkdm_name = "dpll4_clkdm",
753 .recalc = &omap2_clksel_recalc, 753 .recalc = &omap2_clksel_recalc,
@@ -832,7 +832,7 @@ static struct clk dpll4_m4_ck = {
832 .parent = &dpll4_ck, 832 .parent = &dpll4_ck,
833 .init = &omap2_init_clksel_parent, 833 .init = &omap2_init_clksel_parent,
834 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 834 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
835 .clksel_mask = OMAP3430_CLKSEL_DSS1_MASK, 835 .clksel_mask = OMAP3630_CLKSEL_DSS1_MASK,
836 .clksel = dpll4_clksel, 836 .clksel = dpll4_clksel,
837 .clkdm_name = "dpll4_clkdm", 837 .clkdm_name = "dpll4_clkdm",
838 .recalc = &omap2_clksel_recalc, 838 .recalc = &omap2_clksel_recalc,
@@ -859,7 +859,7 @@ static struct clk dpll4_m5_ck = {
859 .parent = &dpll4_ck, 859 .parent = &dpll4_ck,
860 .init = &omap2_init_clksel_parent, 860 .init = &omap2_init_clksel_parent,
861 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), 861 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
862 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, 862 .clksel_mask = OMAP3630_CLKSEL_CAM_MASK,
863 .clksel = dpll4_clksel, 863 .clksel = dpll4_clksel,
864 .clkdm_name = "dpll4_clkdm", 864 .clkdm_name = "dpll4_clkdm",
865 .set_rate = &omap2_clksel_set_rate, 865 .set_rate = &omap2_clksel_set_rate,
@@ -886,7 +886,7 @@ static struct clk dpll4_m6_ck = {
886 .parent = &dpll4_ck, 886 .parent = &dpll4_ck,
887 .init = &omap2_init_clksel_parent, 887 .init = &omap2_init_clksel_parent,
888 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), 888 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
889 .clksel_mask = OMAP3430_DIV_DPLL4_MASK, 889 .clksel_mask = OMAP3630_DIV_DPLL4_MASK,
890 .clksel = dpll4_clksel, 890 .clksel = dpll4_clksel,
891 .clkdm_name = "dpll4_clkdm", 891 .clkdm_name = "dpll4_clkdm",
892 .recalc = &omap2_clksel_recalc, 892 .recalc = &omap2_clksel_recalc,
@@ -1394,6 +1394,7 @@ static struct clk cpefuse_fck = {
1394 .name = "cpefuse_fck", 1394 .name = "cpefuse_fck",
1395 .ops = &clkops_omap2_dflt, 1395 .ops = &clkops_omap2_dflt,
1396 .parent = &sys_ck, 1396 .parent = &sys_ck,
1397 .clkdm_name = "core_l4_clkdm",
1397 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1398 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1398 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, 1399 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT,
1399 .recalc = &followparent_recalc, 1400 .recalc = &followparent_recalc,
@@ -1403,6 +1404,7 @@ static struct clk ts_fck = {
1403 .name = "ts_fck", 1404 .name = "ts_fck",
1404 .ops = &clkops_omap2_dflt, 1405 .ops = &clkops_omap2_dflt,
1405 .parent = &omap_32k_fck, 1406 .parent = &omap_32k_fck,
1407 .clkdm_name = "core_l4_clkdm",
1406 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1408 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1407 .enable_bit = OMAP3430ES2_EN_TS_SHIFT, 1409 .enable_bit = OMAP3430ES2_EN_TS_SHIFT,
1408 .recalc = &followparent_recalc, 1410 .recalc = &followparent_recalc,
@@ -1412,6 +1414,7 @@ static struct clk usbtll_fck = {
1412 .name = "usbtll_fck", 1414 .name = "usbtll_fck",
1413 .ops = &clkops_omap2_dflt_wait, 1415 .ops = &clkops_omap2_dflt_wait,
1414 .parent = &dpll5_m2_ck, 1416 .parent = &dpll5_m2_ck,
1417 .clkdm_name = "core_l4_clkdm",
1415 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1418 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1416 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, 1419 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
1417 .recalc = &followparent_recalc, 1420 .recalc = &followparent_recalc,
@@ -1617,6 +1620,7 @@ static struct clk fshostusb_fck = {
1617 .name = "fshostusb_fck", 1620 .name = "fshostusb_fck",
1618 .ops = &clkops_omap2_dflt_wait, 1621 .ops = &clkops_omap2_dflt_wait,
1619 .parent = &core_48m_fck, 1622 .parent = &core_48m_fck,
1623 .clkdm_name = "core_l4_clkdm",
1620 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1624 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1621 .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT, 1625 .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
1622 .recalc = &followparent_recalc, 1626 .recalc = &followparent_recalc,
@@ -2043,6 +2047,7 @@ static struct clk omapctrl_ick = {
2043 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2047 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2044 .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT, 2048 .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT,
2045 .flags = ENABLE_ON_INIT, 2049 .flags = ENABLE_ON_INIT,
2050 .clkdm_name = "core_l4_clkdm",
2046 .recalc = &followparent_recalc, 2051 .recalc = &followparent_recalc,
2047}; 2052};
2048 2053
@@ -2094,6 +2099,7 @@ static struct clk usb_l4_ick = {
2094 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), 2099 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
2095 .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK, 2100 .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
2096 .clksel = usb_l4_clksel, 2101 .clksel = usb_l4_clksel,
2102 .clkdm_name = "core_l4_clkdm",
2097 .recalc = &omap2_clksel_recalc, 2103 .recalc = &omap2_clksel_recalc,
2098}; 2104};
2099 2105
@@ -3467,8 +3473,8 @@ static struct omap_clk omap3xxx_clks[] = {
3467 CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX), 3473 CLK(NULL, "ipss_ick", &ipss_ick, CK_AM35XX),
3468 CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX), 3474 CLK(NULL, "rmii_ck", &rmii_ck, CK_AM35XX),
3469 CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX), 3475 CLK(NULL, "pclk_ck", &pclk_ck, CK_AM35XX),
3470 CLK("davinci_emac", "emac_clk", &emac_ick, CK_AM35XX), 3476 CLK("davinci_emac", NULL, &emac_ick, CK_AM35XX),
3471 CLK("davinci_emac", "phy_clk", &emac_fck, CK_AM35XX), 3477 CLK("davinci_mdio.0", NULL, &emac_fck, CK_AM35XX),
3472 CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX), 3478 CLK("vpfe-capture", "master", &vpfe_ick, CK_AM35XX),
3473 CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX), 3479 CLK("vpfe-capture", "slave", &vpfe_fck, CK_AM35XX),
3474 CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX), 3480 CLK("musb-am35x", "ick", &hsotgusb_ick_am35xx, CK_AM35XX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index c03c1108468e..fa6ea65ad44b 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = {
957 .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), 957 .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
958 .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB, 958 .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB,
959 .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB, 959 .idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB,
960 .mult_mask = OMAP4430_DPLL_MULT_MASK, 960 .mult_mask = OMAP4430_DPLL_MULT_USB_MASK,
961 .div1_mask = OMAP4430_DPLL_DIV_MASK, 961 .div1_mask = OMAP4430_DPLL_DIV_0_7_MASK,
962 .enable_mask = OMAP4430_DPLL_EN_MASK, 962 .enable_mask = OMAP4430_DPLL_EN_MASK,
963 .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, 963 .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
964 .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, 964 .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
@@ -978,6 +978,7 @@ static struct clk dpll_usb_ck = {
978 .recalc = &omap3_dpll_recalc, 978 .recalc = &omap3_dpll_recalc,
979 .round_rate = &omap2_dpll_round_rate, 979 .round_rate = &omap2_dpll_round_rate,
980 .set_rate = &omap3_noncore_dpll_set_rate, 980 .set_rate = &omap3_noncore_dpll_set_rate,
981 .clkdm_name = "l3_init_clkdm",
981}; 982};
982 983
983static struct clk dpll_usb_clkdcoldo_ck = { 984static struct clk dpll_usb_clkdcoldo_ck = {
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 9299ac291d28..bd7ed13515cc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = {
390 .prcm_partition = OMAP4430_PRM_PARTITION, 390 .prcm_partition = OMAP4430_PRM_PARTITION,
391 .cm_inst = OMAP4430_PRM_EMU_CM_INST, 391 .cm_inst = OMAP4430_PRM_EMU_CM_INST,
392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, 392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
393 .flags = CLKDM_CAN_HWSUP, 393 .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,
394}; 394};
395 395
396static struct clockdomain l3_dma_44xx_clkdm = { 396static struct clockdomain l3_dma_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 5e5880d6d099..b6c77be3e8f7 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,15 +19,11 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
24 22
25#include <plat/board.h> 23#include <plat/board.h>
26#include <plat/gpmc.h> 24#include <plat/gpmc.h>
27#include <plat/gpmc-smsc911x.h> 25#include <plat/gpmc-smsc911x.h>
28 26
29static struct omap_smsc911x_platform_data *gpmc_cfg;
30
31static struct resource gpmc_smsc911x_resources[] = { 27static struct resource gpmc_smsc911x_resources[] = {
32 [0] = { 28 [0] = {
33 .flags = IORESOURCE_MEM, 29 .flags = IORESOURCE_MEM,
@@ -41,51 +37,6 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
41 .phy_interface = PHY_INTERFACE_MODE_MII, 37 .phy_interface = PHY_INTERFACE_MODE_MII,
42 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 38 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
43 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 39 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
44 .flags = SMSC911X_USE_16BIT,
45};
46
47static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
48 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
49 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
50};
51
52/* Generic regulator definition to satisfy smsc911x */
53static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
54 .constraints = {
55 .min_uV = 3300000,
56 .max_uV = 3300000,
57 .valid_modes_mask = REGULATOR_MODE_NORMAL
58 | REGULATOR_MODE_STANDBY,
59 .valid_ops_mask = REGULATOR_CHANGE_MODE
60 | REGULATOR_CHANGE_STATUS,
61 },
62 .num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
63 .consumer_supplies = gpmc_smsc911x_supply,
64};
65
66static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
67 .supply_name = "gpmc_smsc911x",
68 .microvolts = 3300000,
69 .gpio = -EINVAL,
70 .startup_delay = 0,
71 .enable_high = 0,
72 .enabled_at_boot = 1,
73 .init_data = &gpmc_smsc911x_reg_init_data,
74};
75
76/*
77 * Platform device id of 42 is a temporary fix to avoid conflicts
78 * with other reg-fixed-voltage devices. The real fix should
79 * involve the driver core providing a way of dynamically
80 * assigning a unique id on registration for platform devices
81 * in the same name space.
82 */
83static struct platform_device gpmc_smsc911x_regulator = {
84 .name = "reg-fixed-voltage",
85 .id = 42,
86 .dev = {
87 .platform_data = &gpmc_smsc911x_fixed_reg_data,
88 },
89}; 40};
90 41
91/* 42/*
@@ -93,23 +44,12 @@ static struct platform_device gpmc_smsc911x_regulator = {
93 * assume that pin multiplexing is done in the board-*.c file, 44 * assume that pin multiplexing is done in the board-*.c file,
94 * or in the bootloader. 45 * or in the bootloader.
95 */ 46 */
96void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data) 47void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
97{ 48{
98 struct platform_device *pdev; 49 struct platform_device *pdev;
99 unsigned long cs_mem_base; 50 unsigned long cs_mem_base;
100 int ret; 51 int ret;
101 52
102 gpmc_cfg = board_data;
103
104 if (!gpmc_cfg->id) {
105 ret = platform_device_register(&gpmc_smsc911x_regulator);
106 if (ret < 0) {
107 pr_err("Unable to register smsc911x regulators: %d\n",
108 ret);
109 return;
110 }
111 }
112
113 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { 53 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
114 pr_err("Failed to request GPMC mem region\n"); 54 pr_err("Failed to request GPMC mem region\n");
115 return; 55 return;
@@ -139,8 +79,7 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
139 gpio_set_value(gpmc_cfg->gpio_reset, 1); 79 gpio_set_value(gpmc_cfg->gpio_reset, 1);
140 } 80 }
141 81
142 if (gpmc_cfg->flags) 82 gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT;
143 gpmc_smsc911x_config.flags = gpmc_cfg->flags;
144 83
145 pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, 84 pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id,
146 gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), 85 gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 100db6217f39..b0268eaffe13 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -506,6 +506,13 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
506 if (oh->dev_attr != NULL) { 506 if (oh->dev_attr != NULL) {
507 mmc_dev_attr = oh->dev_attr; 507 mmc_dev_attr = oh->dev_attr;
508 mmc_data->controller_flags = mmc_dev_attr->flags; 508 mmc_data->controller_flags = mmc_dev_attr->flags;
509 /*
510 * erratum 2.1.1.128 doesn't apply if board has
511 * a transceiver is attached
512 */
513 if (hsmmcinfo->transceiver)
514 mmc_data->controller_flags &=
515 ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
509 } 516 }
510 517
511 pdev = platform_device_alloc(name, ctrl_nr - 1); 518 pdev = platform_device_alloc(name, ctrl_nr - 1);
diff --git a/arch/arm/mach-omap2/include/mach/barriers.h b/arch/arm/mach-omap2/include/mach/barriers.h
index 4fa72c7cc7cd..1c582a8592b9 100644
--- a/arch/arm/mach-omap2/include/mach/barriers.h
+++ b/arch/arm/mach-omap2/include/mach/barriers.h
@@ -22,6 +22,8 @@
22#ifndef __MACH_BARRIERS_H 22#ifndef __MACH_BARRIERS_H
23#define __MACH_BARRIERS_H 23#define __MACH_BARRIERS_H
24 24
25#include <asm/outercache.h>
26
25extern void omap_bus_sync(void); 27extern void omap_bus_sync(void);
26 28
27#define rmb() dsb() 29#define rmb() dsb()
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index eba6cd3816f5..7144ae651d3d 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1395 */ 1395 */
1396static int _ocp_softreset(struct omap_hwmod *oh) 1396static int _ocp_softreset(struct omap_hwmod *oh)
1397{ 1397{
1398 u32 v; 1398 u32 v, softrst_mask;
1399 int c = 0; 1399 int c = 0;
1400 int ret = 0; 1400 int ret = 0;
1401 1401
@@ -1422,16 +1422,21 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1422 goto dis_opt_clks; 1422 goto dis_opt_clks;
1423 _write_sysconfig(v, oh); 1423 _write_sysconfig(v, oh);
1424 1424
1425 if (oh->class->sysc->srst_udelay)
1426 udelay(oh->class->sysc->srst_udelay);
1427
1425 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1428 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1426 omap_test_timeout((omap_hwmod_read(oh, 1429 omap_test_timeout((omap_hwmod_read(oh,
1427 oh->class->sysc->syss_offs) 1430 oh->class->sysc->syss_offs)
1428 & SYSS_RESETDONE_MASK), 1431 & SYSS_RESETDONE_MASK),
1429 MAX_MODULE_SOFTRESET_WAIT, c); 1432 MAX_MODULE_SOFTRESET_WAIT, c);
1430 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) 1433 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1434 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1431 omap_test_timeout(!(omap_hwmod_read(oh, 1435 omap_test_timeout(!(omap_hwmod_read(oh,
1432 oh->class->sysc->sysc_offs) 1436 oh->class->sysc->sysc_offs)
1433 & SYSC_TYPE2_SOFTRESET_MASK), 1437 & softrst_mask),
1434 MAX_MODULE_SOFTRESET_WAIT, c); 1438 MAX_MODULE_SOFTRESET_WAIT, c);
1439 }
1435 1440
1436 if (c == MAX_MODULE_SOFTRESET_WAIT) 1441 if (c == MAX_MODULE_SOFTRESET_WAIT)
1437 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1442 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
@@ -1477,6 +1482,11 @@ static int _reset(struct omap_hwmod *oh)
1477 1482
1478 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh); 1483 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1479 1484
1485 if (oh->class->sysc) {
1486 _update_sysc_cache(oh);
1487 _enable_sysc(oh);
1488 }
1489
1480 return ret; 1490 return ret;
1481} 1491}
1482 1492
@@ -1786,20 +1796,9 @@ static int _setup(struct omap_hwmod *oh, void *data)
1786 return 0; 1796 return 0;
1787 } 1797 }
1788 1798
1789 if (!(oh->flags & HWMOD_INIT_NO_RESET)) { 1799 if (!(oh->flags & HWMOD_INIT_NO_RESET))
1790 _reset(oh); 1800 _reset(oh);
1791 1801
1792 /*
1793 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1794 * The _enable() function should be split to
1795 * avoid the rewrite of the OCP_SYSCONFIG register.
1796 */
1797 if (oh->class->sysc) {
1798 _update_sysc_cache(oh);
1799 _enable_sysc(oh);
1800 }
1801 }
1802
1803 postsetup_state = oh->_postsetup_state; 1802 postsetup_state = oh->_postsetup_state;
1804 if (postsetup_state == _HWMOD_STATE_UNKNOWN) 1803 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1805 postsetup_state = _HWMOD_STATE_ENABLED; 1804 postsetup_state = _HWMOD_STATE_ENABLED;
@@ -2463,26 +2462,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2463 * @oh: struct omap_hwmod * 2462 * @oh: struct omap_hwmod *
2464 * 2463 *
2465 * Sets the module OCP socket ENAWAKEUP bit to allow the module to 2464 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2466 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup 2465 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2467 * registers to cause the PRCM to receive wakeup events from the 2466 * this IP block if it has dynamic mux entries. Eventually this
2468 * module. Does not set any wakeup routing registers beyond this 2467 * should set PRCM wakeup registers to cause the PRCM to receive
2469 * point - if the module is to wake up any other module or subsystem, 2468 * wakeup events from the module. Does not set any wakeup routing
2470 * that must be set separately. Called by omap_device code. Returns 2469 * registers beyond this point - if the module is to wake up any other
2471 * -EINVAL on error or 0 upon success. 2470 * module or subsystem, that must be set separately. Called by
2471 * omap_device code. Returns -EINVAL on error or 0 upon success.
2472 */ 2472 */
2473int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 2473int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2474{ 2474{
2475 unsigned long flags; 2475 unsigned long flags;
2476 u32 v; 2476 u32 v;
2477 2477
2478 if (!oh->class->sysc ||
2479 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2480 return -EINVAL;
2481
2482 spin_lock_irqsave(&oh->_lock, flags); 2478 spin_lock_irqsave(&oh->_lock, flags);
2483 v = oh->_sysc_cache; 2479
2484 _enable_wakeup(oh, &v); 2480 if (oh->class->sysc &&
2485 _write_sysconfig(v, oh); 2481 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2482 v = oh->_sysc_cache;
2483 _enable_wakeup(oh, &v);
2484 _write_sysconfig(v, oh);
2485 }
2486
2486 _set_idle_ioring_wakeup(oh, true); 2487 _set_idle_ioring_wakeup(oh, true);
2487 spin_unlock_irqrestore(&oh->_lock, flags); 2488 spin_unlock_irqrestore(&oh->_lock, flags);
2488 2489
@@ -2494,26 +2495,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2494 * @oh: struct omap_hwmod * 2495 * @oh: struct omap_hwmod *
2495 * 2496 *
2496 * Clears the module OCP socket ENAWAKEUP bit to prevent the module 2497 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2497 * from sending wakeups to the PRCM. Eventually this should clear 2498 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2498 * PRCM wakeup registers to cause the PRCM to ignore wakeup events 2499 * events for this IP block if it has dynamic mux entries. Eventually
2499 * from the module. Does not set any wakeup routing registers beyond 2500 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2500 * this point - if the module is to wake up any other module or 2501 * wakeup events from the module. Does not set any wakeup routing
2501 * subsystem, that must be set separately. Called by omap_device 2502 * registers beyond this point - if the module is to wake up any other
2502 * code. Returns -EINVAL on error or 0 upon success. 2503 * module or subsystem, that must be set separately. Called by
2504 * omap_device code. Returns -EINVAL on error or 0 upon success.
2503 */ 2505 */
2504int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) 2506int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2505{ 2507{
2506 unsigned long flags; 2508 unsigned long flags;
2507 u32 v; 2509 u32 v;
2508 2510
2509 if (!oh->class->sysc ||
2510 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2511 return -EINVAL;
2512
2513 spin_lock_irqsave(&oh->_lock, flags); 2511 spin_lock_irqsave(&oh->_lock, flags);
2514 v = oh->_sysc_cache; 2512
2515 _disable_wakeup(oh, &v); 2513 if (oh->class->sysc &&
2516 _write_sysconfig(v, oh); 2514 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2515 v = oh->_sysc_cache;
2516 _disable_wakeup(oh, &v);
2517 _write_sysconfig(v, oh);
2518 }
2519
2517 _set_idle_ioring_wakeup(oh, false); 2520 _set_idle_ioring_wakeup(oh, false);
2518 spin_unlock_irqrestore(&oh->_lock, flags); 2521 spin_unlock_irqrestore(&oh->_lock, flags);
2519 2522
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a5409ce3f323..a6bde34e443a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1000 .flags = OMAP_FIREWALL_L4, 1000 .flags = OMAP_FIREWALL_L4,
1001 } 1001 }
1002 }, 1002 },
1003 .flags = OCPIF_SWSUP_IDLE,
1004 .user = OCP_USER_MPU | OCP_USER_SDMA, 1003 .user = OCP_USER_MPU | OCP_USER_SDMA,
1005}; 1004};
1006 1005
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c4f56cb60d7d..04a3885f4475 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1049 .slave = &omap2430_dss_venc_hwmod, 1049 .slave = &omap2430_dss_venc_hwmod,
1050 .clk = "dss_ick", 1050 .clk = "dss_ick",
1051 .addr = omap2_dss_venc_addrs, 1051 .addr = omap2_dss_venc_addrs,
1052 .flags = OCPIF_SWSUP_IDLE,
1053 .user = OCP_USER_MPU | OCP_USER_SDMA, 1052 .user = OCP_USER_MPU | OCP_USER_SDMA,
1054}; 1053};
1055 1054
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 34b9766d1d23..db86ce90c69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1676 .flags = OMAP_FIREWALL_L4, 1676 .flags = OMAP_FIREWALL_L4,
1677 } 1677 }
1678 }, 1678 },
1679 .flags = OCPIF_SWSUP_IDLE,
1680 .user = OCP_USER_MPU | OCP_USER_SDMA, 1679 .user = OCP_USER_MPU | OCP_USER_SDMA,
1681}; 1680};
1682 1681
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 08daa5e0eb5f..6abc75753e42 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { 2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
2595 .rev_offs = 0x0000, 2595 .rev_offs = 0x0000,
2596 .sysc_offs = 0x0010, 2596 .sysc_offs = 0x0010,
2597 /*
2598 * ISS needs 100 OCP clk cycles delay after a softreset before
2599 * accessing sysconfig again.
2600 * The lowest frequency at the moment for L3 bus is 100 MHz, so
2601 * 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
2602 *
2603 * TODO: Indicate errata when available.
2604 */
2605 .srst_udelay = 2,
2597 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | 2606 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
2598 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), 2607 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
2599 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2608 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
@@ -2996,6 +3005,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
2996 &omap44xx_l4_abe__mcbsp1_dma, 3005 &omap44xx_l4_abe__mcbsp1_dma,
2997}; 3006};
2998 3007
3008static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
3009 { .role = "pad_fck", .clk = "pad_clks_ck" },
3010 { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },
3011};
3012
2999static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 3013static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
3000 .name = "mcbsp1", 3014 .name = "mcbsp1",
3001 .class = &omap44xx_mcbsp_hwmod_class, 3015 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3012,6 +3026,8 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
3012 }, 3026 },
3013 .slaves = omap44xx_mcbsp1_slaves, 3027 .slaves = omap44xx_mcbsp1_slaves,
3014 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), 3028 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
3029 .opt_clks = mcbsp1_opt_clks,
3030 .opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks),
3015}; 3031};
3016 3032
3017/* mcbsp2 */ 3033/* mcbsp2 */
@@ -3071,6 +3087,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
3071 &omap44xx_l4_abe__mcbsp2_dma, 3087 &omap44xx_l4_abe__mcbsp2_dma,
3072}; 3088};
3073 3089
3090static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
3091 { .role = "pad_fck", .clk = "pad_clks_ck" },
3092 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },
3093};
3094
3074static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 3095static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
3075 .name = "mcbsp2", 3096 .name = "mcbsp2",
3076 .class = &omap44xx_mcbsp_hwmod_class, 3097 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3087,6 +3108,8 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
3087 }, 3108 },
3088 .slaves = omap44xx_mcbsp2_slaves, 3109 .slaves = omap44xx_mcbsp2_slaves,
3089 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), 3110 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
3111 .opt_clks = mcbsp2_opt_clks,
3112 .opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks),
3090}; 3113};
3091 3114
3092/* mcbsp3 */ 3115/* mcbsp3 */
@@ -3146,6 +3169,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
3146 &omap44xx_l4_abe__mcbsp3_dma, 3169 &omap44xx_l4_abe__mcbsp3_dma,
3147}; 3170};
3148 3171
3172static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
3173 { .role = "pad_fck", .clk = "pad_clks_ck" },
3174 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },
3175};
3176
3149static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 3177static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3150 .name = "mcbsp3", 3178 .name = "mcbsp3",
3151 .class = &omap44xx_mcbsp_hwmod_class, 3179 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3162,6 +3190,8 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3162 }, 3190 },
3163 .slaves = omap44xx_mcbsp3_slaves, 3191 .slaves = omap44xx_mcbsp3_slaves,
3164 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), 3192 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
3193 .opt_clks = mcbsp3_opt_clks,
3194 .opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks),
3165}; 3195};
3166 3196
3167/* mcbsp4 */ 3197/* mcbsp4 */
@@ -3200,6 +3230,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
3200 &omap44xx_l4_per__mcbsp4, 3230 &omap44xx_l4_per__mcbsp4,
3201}; 3231};
3202 3232
3233static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
3234 { .role = "pad_fck", .clk = "pad_clks_ck" },
3235 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },
3236};
3237
3203static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 3238static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3204 .name = "mcbsp4", 3239 .name = "mcbsp4",
3205 .class = &omap44xx_mcbsp_hwmod_class, 3240 .class = &omap44xx_mcbsp_hwmod_class,
@@ -3216,6 +3251,8 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3216 }, 3251 },
3217 .slaves = omap44xx_mcbsp4_slaves, 3252 .slaves = omap44xx_mcbsp4_slaves,
3218 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), 3253 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
3254 .opt_clks = mcbsp4_opt_clks,
3255 .opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks),
3219}; 3256};
3220 3257
3221/* 3258/*
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 9262a6b47702..de6d46451746 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
64 } 64 }
65 oh = omap_hwmod_lookup(opp_def->hwmod_name); 65 oh = omap_hwmod_lookup(opp_def->hwmod_name);
66 if (!oh || !oh->od) { 66 if (!oh || !oh->od) {
67 pr_warn("%s: no hwmod or odev for %s, [%d] " 67 pr_debug("%s: no hwmod or odev for %s, [%d] "
68 "cannot add OPPs.\n", __func__, 68 "cannot add OPPs.\n", __func__,
69 opp_def->hwmod_name, i); 69 opp_def->hwmod_name, i);
70 return -EINVAL; 70 continue;
71 } 71 }
72 dev = &oh->od->pdev->dev; 72 dev = &oh->od->pdev->dev;
73 73
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 238defc6f6df..703bd1099259 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -153,8 +153,7 @@ static void omap3_save_secure_ram_context(void)
153 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); 153 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
154 /* Following is for error tracking, it should not happen */ 154 /* Following is for error tracking, it should not happen */
155 if (ret) { 155 if (ret) {
156 printk(KERN_ERR "save_secure_sram() returns %08x\n", 156 pr_err("save_secure_sram() returns %08x\n", ret);
157 ret);
158 while (1) 157 while (1)
159 ; 158 ;
160 } 159 }
@@ -289,7 +288,7 @@ void omap_sram_idle(void)
289 break; 288 break;
290 default: 289 default:
291 /* Invalid state */ 290 /* Invalid state */
292 printk(KERN_ERR "Invalid mpu state in sram_idle\n"); 291 pr_err("Invalid mpu state in sram_idle\n");
293 return; 292 return;
294 } 293 }
295 294
@@ -439,18 +438,17 @@ restore:
439 list_for_each_entry(pwrst, &pwrst_list, node) { 438 list_for_each_entry(pwrst, &pwrst_list, node) {
440 state = pwrdm_read_prev_pwrst(pwrst->pwrdm); 439 state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
441 if (state > pwrst->next_state) { 440 if (state > pwrst->next_state) {
442 printk(KERN_INFO "Powerdomain (%s) didn't enter " 441 pr_info("Powerdomain (%s) didn't enter "
443 "target state %d\n", 442 "target state %d\n",
444 pwrst->pwrdm->name, pwrst->next_state); 443 pwrst->pwrdm->name, pwrst->next_state);
445 ret = -1; 444 ret = -1;
446 } 445 }
447 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); 446 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
448 } 447 }
449 if (ret) 448 if (ret)
450 printk(KERN_ERR "Could not enter target state in pm_suspend\n"); 449 pr_err("Could not enter target state in pm_suspend\n");
451 else 450 else
452 printk(KERN_INFO "Successfully put all powerdomains " 451 pr_info("Successfully put all powerdomains to target state\n");
453 "to target state\n");
454 452
455 return ret; 453 return ret;
456} 454}
@@ -734,21 +732,22 @@ static int __init omap3_pm_init(void)
734 732
735 if (ret) { 733 if (ret) {
736 pr_err("pm: Failed to request pm_io irq\n"); 734 pr_err("pm: Failed to request pm_io irq\n");
737 goto err1; 735 goto err2;
738 } 736 }
739 737
740 ret = pwrdm_for_each(pwrdms_setup, NULL); 738 ret = pwrdm_for_each(pwrdms_setup, NULL);
741 if (ret) { 739 if (ret) {
742 printk(KERN_ERR "Failed to setup powerdomains\n"); 740 pr_err("Failed to setup powerdomains\n");
743 goto err2; 741 goto err3;
744 } 742 }
745 743
746 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); 744 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
747 745
748 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); 746 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
749 if (mpu_pwrdm == NULL) { 747 if (mpu_pwrdm == NULL) {
750 printk(KERN_ERR "Failed to get mpu_pwrdm\n"); 748 pr_err("Failed to get mpu_pwrdm\n");
751 goto err2; 749 ret = -EINVAL;
750 goto err3;
752 } 751 }
753 752
754 neon_pwrdm = pwrdm_lookup("neon_pwrdm"); 753 neon_pwrdm = pwrdm_lookup("neon_pwrdm");
@@ -781,8 +780,8 @@ static int __init omap3_pm_init(void)
781 omap3_secure_ram_storage = 780 omap3_secure_ram_storage =
782 kmalloc(0x803F, GFP_KERNEL); 781 kmalloc(0x803F, GFP_KERNEL);
783 if (!omap3_secure_ram_storage) 782 if (!omap3_secure_ram_storage)
784 printk(KERN_ERR "Memory allocation failed when" 783 pr_err("Memory allocation failed when "
785 "allocating for secure sram context\n"); 784 "allocating for secure sram context\n");
786 785
787 local_irq_disable(); 786 local_irq_disable();
788 local_fiq_disable(); 787 local_fiq_disable();
@@ -796,14 +795,17 @@ static int __init omap3_pm_init(void)
796 } 795 }
797 796
798 omap3_save_scratchpad_contents(); 797 omap3_save_scratchpad_contents();
799err1:
800 return ret; 798 return ret;
801err2: 799
802 free_irq(INT_34XX_PRCM_MPU_IRQ, NULL); 800err3:
803 list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) { 801 list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) {
804 list_del(&pwrst->node); 802 list_del(&pwrst->node);
805 kfree(pwrst); 803 kfree(pwrst);
806 } 804 }
805 free_irq(omap_prcm_event_to_irq("io"), omap3_pm_init);
806err2:
807 free_irq(omap_prcm_event_to_irq("wkup"), NULL);
808err1:
807 return ret; 809 return ret;
808} 810}
809 811
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 9ccaadc2cf07..885625352429 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -144,7 +144,7 @@ static void omap_default_idle(void)
144static int __init omap4_pm_init(void) 144static int __init omap4_pm_init(void)
145{ 145{
146 int ret; 146 int ret;
147 struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm; 147 struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup;
148 struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; 148 struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;
149 149
150 if (!cpu_is_omap44xx()) 150 if (!cpu_is_omap44xx())
@@ -168,14 +168,19 @@ static int __init omap4_pm_init(void)
168 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as 168 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
169 * expected. The hardware recommendation is to enable static 169 * expected. The hardware recommendation is to enable static
170 * dependencies for these to avoid system lock ups or random crashes. 170 * dependencies for these to avoid system lock ups or random crashes.
171 * The L4 wakeup depedency is added to workaround the OCP sync hardware
172 * BUG with 32K synctimer which lead to incorrect timer value read
173 * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
174 * are part of L4 wakeup clockdomain.
171 */ 175 */
172 mpuss_clkdm = clkdm_lookup("mpuss_clkdm"); 176 mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
173 emif_clkdm = clkdm_lookup("l3_emif_clkdm"); 177 emif_clkdm = clkdm_lookup("l3_emif_clkdm");
174 l3_1_clkdm = clkdm_lookup("l3_1_clkdm"); 178 l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
175 l3_2_clkdm = clkdm_lookup("l3_2_clkdm"); 179 l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
176 l4_per_clkdm = clkdm_lookup("l4_per_clkdm"); 180 l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
181 l4wkup = clkdm_lookup("l4_wkup_clkdm");
177 ducati_clkdm = clkdm_lookup("ducati_clkdm"); 182 ducati_clkdm = clkdm_lookup("ducati_clkdm");
178 if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || 183 if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) ||
179 (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm)) 184 (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
180 goto err2; 185 goto err2;
181 186
@@ -183,6 +188,7 @@ static int __init omap4_pm_init(void)
183 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm); 188 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
184 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm); 189 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
185 ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm); 190 ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
191 ret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup);
186 ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); 192 ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
187 ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); 193 ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
188 if (ret) { 194 if (ret) {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 8a18d1bd61c8..96ad3dbeac34 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -972,7 +972,13 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
972 972
973int pwrdm_state_switch(struct powerdomain *pwrdm) 973int pwrdm_state_switch(struct powerdomain *pwrdm)
974{ 974{
975 return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); 975 int ret;
976
977 ret = pwrdm_wait_transition(pwrdm);
978 if (!ret)
979 ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
980
981 return ret;
976} 982}
977 983
978int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) 984int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index eac623c7c3d8..f106d21ff581 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
147 u32 mask, st; 147 u32 mask, st;
148 148
149 /* XXX read mask from RAM? */ 149 /* XXX read mask from RAM? */
150 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs); 150 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
151 st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs); 151 irqen_offs);
152 st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs);
152 153
153 return mask & st; 154 return mask & st;
154} 155}
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
180 */ 181 */
181void omap44xx_prm_ocp_barrier(void) 182void omap44xx_prm_ocp_barrier(void)
182{ 183{
183 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 184 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
184 OMAP4_REVISION_PRM_OFFSET); 185 OMAP4_REVISION_PRM_OFFSET);
185} 186}
186 187
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
198void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) 199void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
199{ 200{
200 saved_mask[0] = 201 saved_mask[0] =
201 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 202 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
202 OMAP4_PRM_IRQSTATUS_MPU_OFFSET); 203 OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
203 saved_mask[1] = 204 saved_mask[1] =
204 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 205 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
205 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); 206 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
206 207
207 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, 208 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
208 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 209 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
209 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, 210 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
210 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 211 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
211 212
212 /* OCP barrier */ 213 /* OCP barrier */
213 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 214 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
214 OMAP4_REVISION_PRM_OFFSET); 215 OMAP4_REVISION_PRM_OFFSET);
215} 216}
216 217
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
226 */ 227 */
227void omap44xx_prm_restore_irqen(u32 *saved_mask) 228void omap44xx_prm_restore_irqen(u32 *saved_mask)
228{ 229{
229 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST, 230 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
230 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 231 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
231 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST, 232 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
232 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 233 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
233} 234}
234 235
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 873b51d494ea..d28f848897d6 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -290,7 +290,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
290 goto err; 290 goto err;
291 } 291 }
292 292
293 for (i = 0; i <= irq_setup->nr_regs; i++) { 293 for (i = 0; i < irq_setup->nr_regs; i++) {
294 gc = irq_alloc_generic_chip("PRCM", 1, 294 gc = irq_alloc_generic_chip("PRCM", 1,
295 irq_setup->base_irq + i * 32, prm_base, 295 irq_setup->base_irq + i * 32, prm_base,
296 handle_level_irq); 296 handle_level_irq);
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0cdd359a128e..9fc2f44188cb 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
108static void omap_uart_set_smartidle(struct platform_device *pdev) 108static void omap_uart_set_smartidle(struct platform_device *pdev)
109{ 109{
110 struct omap_device *od = to_omap_device(pdev); 110 struct omap_device *od = to_omap_device(pdev);
111 u8 idlemode;
111 112
112 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); 113 if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
114 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
115 else
116 idlemode = HWMOD_IDLEMODE_SMART;
117
118 omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
113} 119}
114 120
115#else 121#else
@@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
120#endif /* CONFIG_PM */ 126#endif /* CONFIG_PM */
121 127
122#ifdef CONFIG_OMAP_MUX 128#ifdef CONFIG_OMAP_MUX
123static struct omap_device_pad default_uart1_pads[] __initdata = {
124 {
125 .name = "uart1_cts.uart1_cts",
126 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
127 },
128 {
129 .name = "uart1_rts.uart1_rts",
130 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
131 },
132 {
133 .name = "uart1_tx.uart1_tx",
134 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
135 },
136 {
137 .name = "uart1_rx.uart1_rx",
138 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
139 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
140 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
141 },
142};
143
144static struct omap_device_pad default_uart2_pads[] __initdata = {
145 {
146 .name = "uart2_cts.uart2_cts",
147 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
148 },
149 {
150 .name = "uart2_rts.uart2_rts",
151 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
152 },
153 {
154 .name = "uart2_tx.uart2_tx",
155 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
156 },
157 {
158 .name = "uart2_rx.uart2_rx",
159 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
160 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
161 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
162 },
163};
164
165static struct omap_device_pad default_uart3_pads[] __initdata = {
166 {
167 .name = "uart3_cts_rctx.uart3_cts_rctx",
168 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
169 },
170 {
171 .name = "uart3_rts_sd.uart3_rts_sd",
172 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
173 },
174 {
175 .name = "uart3_tx_irtx.uart3_tx_irtx",
176 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
177 },
178 {
179 .name = "uart3_rx_irrx.uart3_rx_irrx",
180 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
181 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
182 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
183 },
184};
185
186static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
187 {
188 .name = "gpmc_wait2.uart4_tx",
189 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
190 },
191 {
192 .name = "gpmc_wait3.uart4_rx",
193 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
194 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
195 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
196 },
197};
198
199static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
200 {
201 .name = "uart4_tx.uart4_tx",
202 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
203 },
204 {
205 .name = "uart4_rx.uart4_rx",
206 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
207 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
208 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
209 },
210};
211
212static void omap_serial_fill_default_pads(struct omap_board_data *bdata) 129static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
213{ 130{
214 switch (bdata->id) {
215 case 0:
216 bdata->pads = default_uart1_pads;
217 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
218 break;
219 case 1:
220 bdata->pads = default_uart2_pads;
221 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
222 break;
223 case 2:
224 bdata->pads = default_uart3_pads;
225 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
226 break;
227 case 3:
228 if (cpu_is_omap44xx()) {
229 bdata->pads = default_omap4_uart4_pads;
230 bdata->pads_cnt =
231 ARRAY_SIZE(default_omap4_uart4_pads);
232 } else if (cpu_is_omap3630()) {
233 bdata->pads = default_omap36xx_uart4_pads;
234 bdata->pads_cnt =
235 ARRAY_SIZE(default_omap36xx_uart4_pads);
236 }
237 break;
238 default:
239 break;
240 }
241} 131}
242#else 132#else
243static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} 133static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 4b57757bf9d1..7a7b89304c48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .flags = I2C_CLIENT_WAKE, 37 .flags = I2C_CLIENT_WAKE,
38}; 38};
39 39
40static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
41 {
42 .addr = 0x48,
43 .flags = I2C_CLIENT_WAKE,
44 },
45 {
46 I2C_BOARD_INFO("twl6040", 0x4b),
47 },
48};
49
40void __init omap_pmic_init(int bus, u32 clkrate, 50void __init omap_pmic_init(int bus, u32 clkrate,
41 const char *pmic_type, int pmic_irq, 51 const char *pmic_type, int pmic_irq,
42 struct twl4030_platform_data *pmic_data) 52 struct twl4030_platform_data *pmic_data)
@@ -49,14 +59,31 @@ void __init omap_pmic_init(int bus, u32 clkrate,
49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); 59 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
50} 60}
51 61
62void __init omap4_pmic_init(const char *pmic_type,
63 struct twl4030_platform_data *pmic_data,
64 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
65{
66 /* PMIC part*/
67 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
68 sizeof(omap4_i2c1_board_info[0].type));
69 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
70 omap4_i2c1_board_info[0].platform_data = pmic_data;
71
72 /* TWL6040 audio IC part */
73 omap4_i2c1_board_info[1].irq = twl6040_irq;
74 omap4_i2c1_board_info[1].platform_data = twl6040_data;
75
76 omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
77
78}
79
52void __init omap_pmic_late_init(void) 80void __init omap_pmic_late_init(void)
53{ 81{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */ 82 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq) 83 if (pmic_i2c_board_info.irq)
56 return; 84 omap3_twl_init();
57 85 if (omap4_i2c1_board_info[0].irq)
58 omap3_twl_init(); 86 omap4_twl_init();
59 omap4_twl_init();
60} 87}
61 88
62#if defined(CONFIG_ARCH_OMAP3) 89#if defined(CONFIG_ARCH_OMAP3)
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 275dde8cb27a..09627483a57f 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -29,6 +29,7 @@
29 29
30 30
31struct twl4030_platform_data; 31struct twl4030_platform_data;
32struct twl6040_platform_data;
32 33
33void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, 34void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
34 struct twl4030_platform_data *pmic_data); 35 struct twl4030_platform_data *pmic_data);
@@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type,
46 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); 47 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
47} 48}
48 49
49static inline void omap4_pmic_init(const char *pmic_type, 50void omap4_pmic_init(const char *pmic_type,
50 struct twl4030_platform_data *pmic_data) 51 struct twl4030_platform_data *pmic_data,
51{ 52 struct twl6040_platform_data *audio_data, int twl6040_irq);
52 /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
53 omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
54}
55 53
56void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, 54void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
57 u32 pdata_flags, u32 regulators_flags); 55 u32 pdata_flags, u32 regulators_flags);
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index f51348dafafd..dde8a11f47d5 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -54,7 +54,7 @@ static struct omap_device_pm_latency omap_uhhtll_latency[] = {
54/* 54/*
55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST 55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
56 */ 56 */
57static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) 57static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
58{ 58{
59 switch (port_mode[0]) { 59 switch (port_mode[0]) {
60 case OMAP_EHCI_PORT_MODE_PHY: 60 case OMAP_EHCI_PORT_MODE_PHY:
@@ -197,7 +197,8 @@ static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
197 return; 197 return;
198} 198}
199 199
200static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode) 200static
201void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
201{ 202{
202 switch (port_mode[0]) { 203 switch (port_mode[0]) {
203 case OMAP_EHCI_PORT_MODE_PHY: 204 case OMAP_EHCI_PORT_MODE_PHY:
@@ -315,7 +316,7 @@ static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
315 } 316 }
316} 317}
317 318
318static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) 319static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
319{ 320{
320 switch (port_mode[0]) { 321 switch (port_mode[0]) {
321 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 322 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
@@ -412,7 +413,8 @@ static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
412 } 413 }
413} 414}
414 415
415static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) 416static
417void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
416{ 418{
417 switch (port_mode[0]) { 419 switch (port_mode[0]) {
418 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 420 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 109ccd2a8885..fe2d1f80ef50 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -113,6 +113,7 @@ config MACH_ARMCORE
113 select IWMMXT 113 select IWMMXT
114 select PXA25x 114 select PXA25x
115 select MIGHT_HAVE_PCI 115 select MIGHT_HAVE_PCI
116 select NEED_MACH_IO_H if PCI
116 117
117config MACH_EM_X270 118config MACH_EM_X270
118 bool "CompuLab EM-x270 platform" 119 bool "CompuLab EM-x270 platform"
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
new file mode 100644
index 000000000000..cd78b7fe3567
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -0,0 +1,17 @@
1/*
2 * arch/arm/mach-pxa/include/mach/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#define IO_SPACE_LIMIT 0xffffffff
10
11/*
12 * We don't actually have real ISA nor PCI buses, but there is so many
13 * drivers out there that might just work if we fake them...
14 */
15#define __io(a) __typesafe_io(a)
16
17#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index c54cef25895c..cbf51ae81855 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -17,6 +17,7 @@
17 * 17 *
18 * bit 23 - Input/Output (PXA2xx specific) 18 * bit 23 - Input/Output (PXA2xx specific)
19 * bit 24 - Wakeup Enable(PXA2xx specific) 19 * bit 24 - Wakeup Enable(PXA2xx specific)
20 * bit 25 - Keep Output (PXA2xx specific)
20 */ 21 */
21 22
22#define MFP_DIR_IN (0x0 << 23) 23#define MFP_DIR_IN (0x0 << 23)
@@ -25,6 +26,12 @@
25#define MFP_DIR(x) (((x) >> 23) & 0x1) 26#define MFP_DIR(x) (((x) >> 23) & 0x1)
26 27
27#define MFP_LPM_CAN_WAKEUP (0x1 << 24) 28#define MFP_LPM_CAN_WAKEUP (0x1 << 24)
29
30/*
31 * MFP_LPM_KEEP_OUTPUT must be specified for pins that need to
32 * retain their last output level (low or high).
33 * Note: MFP_LPM_KEEP_OUTPUT has no effect on pins configured for input.
34 */
28#define MFP_LPM_KEEP_OUTPUT (0x1 << 25) 35#define MFP_LPM_KEEP_OUTPUT (0x1 << 25)
29 36
30#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) 37#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b0a842887780..ef0426a159d4 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -33,6 +33,8 @@
33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
34#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) 34#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
35#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) 35#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
36#define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
37#define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
36 38
37#define PWER_WE35 (1 << 24) 39#define PWER_WE35 (1 << 24)
38 40
@@ -348,6 +350,7 @@ static inline void pxa27x_mfp_init(void) {}
348#ifdef CONFIG_PM 350#ifdef CONFIG_PM
349static unsigned long saved_gafr[2][4]; 351static unsigned long saved_gafr[2][4];
350static unsigned long saved_gpdr[4]; 352static unsigned long saved_gpdr[4];
353static unsigned long saved_gplr[4];
351static unsigned long saved_pgsr[4]; 354static unsigned long saved_pgsr[4];
352 355
353static int pxa2xx_mfp_suspend(void) 356static int pxa2xx_mfp_suspend(void)
@@ -366,14 +369,26 @@ static int pxa2xx_mfp_suspend(void)
366 } 369 }
367 370
368 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 371 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
369
370 saved_gafr[0][i] = GAFR_L(i); 372 saved_gafr[0][i] = GAFR_L(i);
371 saved_gafr[1][i] = GAFR_U(i); 373 saved_gafr[1][i] = GAFR_U(i);
372 saved_gpdr[i] = GPDR(i * 32); 374 saved_gpdr[i] = GPDR(i * 32);
375 saved_gplr[i] = GPLR(i * 32);
373 saved_pgsr[i] = PGSR(i); 376 saved_pgsr[i] = PGSR(i);
374 377
375 GPDR(i * 32) = gpdr_lpm[i]; 378 GPSR(i * 32) = PGSR(i);
379 GPCR(i * 32) = ~PGSR(i);
380 }
381
382 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
383 for (i = 0; i < pxa_last_gpio; i++) {
384 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
385 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
386 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
387 GPDR(i) |= GPIO_bit(i);
388 else
389 GPDR(i) &= ~GPIO_bit(i);
376 } 390 }
391
377 return 0; 392 return 0;
378} 393}
379 394
@@ -384,6 +399,8 @@ static void pxa2xx_mfp_resume(void)
384 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 399 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
385 GAFR_L(i) = saved_gafr[0][i]; 400 GAFR_L(i) = saved_gafr[0][i];
386 GAFR_U(i) = saved_gafr[1][i]; 401 GAFR_U(i) = saved_gafr[1][i];
402 GPSR(i * 32) = saved_gplr[i];
403 GPCR(i * 32) = ~saved_gplr[i];
387 GPDR(i * 32) = saved_gpdr[i]; 404 GPDR(i * 32) = saved_gpdr[i];
388 PGSR(i) = saved_pgsr[i]; 405 PGSR(i) = saved_pgsr[i];
389 } 406 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 6bce78edce7a..4726c246dcdc 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -421,8 +421,11 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
421 pxa_register_device(&pxa27x_device_i2c_power, info); 421 pxa_register_device(&pxa27x_device_i2c_power, info);
422} 422}
423 423
424static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
425 .gpio_set_wake = gpio_set_wake,
426};
427
424static struct platform_device *devices[] __initdata = { 428static struct platform_device *devices[] __initdata = {
425 &pxa_device_gpio,
426 &pxa27x_device_udc, 429 &pxa27x_device_udc,
427 &pxa_device_pmu, 430 &pxa_device_pmu,
428 &pxa_device_i2s, 431 &pxa_device_i2s,
@@ -458,6 +461,7 @@ static int __init pxa27x_init(void)
458 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 461 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
459 register_syscore_ops(&pxa2xx_clock_syscore_ops); 462 register_syscore_ops(&pxa2xx_clock_syscore_ops);
460 463
464 pxa_register_device(&pxa_device_gpio, &pxa27x_gpio_info);
461 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 465 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
462 } 466 }
463 467
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 0f3a327ebcaa..b34287ab5afd 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -111,10 +111,6 @@ config S3C24XX_SETUP_TS
111 help 111 help
112 Compile in platform device definition for Samsung TouchScreen. 112 Compile in platform device definition for Samsung TouchScreen.
113 113
114# cpu-specific sections
115
116if CPU_S3C2410
117
118config S3C2410_DMA 114config S3C2410_DMA
119 bool 115 bool
120 depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) 116 depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)
@@ -127,6 +123,10 @@ config S3C2410_PM
127 help 123 help
128 Power Management code common to S3C2410 and better 124 Power Management code common to S3C2410 and better
129 125
126# cpu-specific sections
127
128if CPU_S3C2410
129
130config S3C24XX_SIMTEC_NOR 130config S3C24XX_SIMTEC_NOR
131 bool 131 bool
132 help 132 help
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index 3518fe812d5f..270a0b6f4f22 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -14,6 +14,8 @@ obj- :=
14 14
15# core 15# core
16 16
17obj-y += common.o
18
17obj-$(CONFIG_CPU_S3C2410) += s3c2410.o 19obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
18obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o 20obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o
19obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o 21obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o
@@ -33,6 +35,10 @@ obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o
33 35
34obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o 36obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o
35 37
38# PM
39
40obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o
41
36# common code 42# common code
37 43
38obj-$(CONFIG_S3C2443_COMMON) += common-s3c2443.o 44obj-$(CONFIG_S3C2443_COMMON) += common-s3c2443.o
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/mach-s3c24xx/common.c
index 290942d9adda..56cdd34cce41 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -4,7 +4,7 @@
4 * http://www.simtec.co.uk/products/SWLINUX/ 4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * S3C24XX CPU Support 7 * Common code for S3C24XX machines
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -41,6 +41,7 @@
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 42#include <asm/mach/map.h>
43 43
44#include <mach/regs-clock.h>
44#include <mach/regs-gpio.h> 45#include <mach/regs-gpio.h>
45#include <plat/regs-serial.h> 46#include <plat/regs-serial.h>
46 47
@@ -52,6 +53,8 @@
52#include <plat/s3c2416.h> 53#include <plat/s3c2416.h>
53#include <plat/s3c244x.h> 54#include <plat/s3c244x.h>
54#include <plat/s3c2443.h> 55#include <plat/s3c2443.h>
56#include <plat/cpu-freq.h>
57#include <plat/pll.h>
55 58
56/* table of supported CPUs */ 59/* table of supported CPUs */
57 60
@@ -234,3 +237,67 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
234 237
235 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 238 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
236} 239}
240
241/* Serial port registrations */
242
243static struct resource s3c2410_uart0_resource[] = {
244 [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),
245 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \
246 IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \
247 NULL, IORESOURCE_IRQ)
248};
249
250static struct resource s3c2410_uart1_resource[] = {
251 [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K),
252 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \
253 IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \
254 NULL, IORESOURCE_IRQ)
255};
256
257static struct resource s3c2410_uart2_resource[] = {
258 [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K),
259 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \
260 IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \
261 NULL, IORESOURCE_IRQ)
262};
263
264static struct resource s3c2410_uart3_resource[] = {
265 [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K),
266 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \
267 IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \
268 NULL, IORESOURCE_IRQ)
269};
270
271struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
272 [0] = {
273 .resources = s3c2410_uart0_resource,
274 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
275 },
276 [1] = {
277 .resources = s3c2410_uart1_resource,
278 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
279 },
280 [2] = {
281 .resources = s3c2410_uart2_resource,
282 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
283 },
284 [3] = {
285 .resources = s3c2410_uart3_resource,
286 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
287 },
288};
289
290/* initialise all the clocks */
291
292void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
293 unsigned long hclk,
294 unsigned long pclk)
295{
296 clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
297 clk_xtal.rate);
298
299 clk_mpll.rate = fclk;
300 clk_h.rate = hclk;
301 clk_p.rate = pclk;
302 clk_f.rate = fclk;
303}
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
new file mode 100644
index 000000000000..c2f596e7bc2d
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C24XX SoCs
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
13#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
14
15void s3c2410_restart(char mode, const char *cmd);
16void s3c244x_restart(char mode, const char *cmd);
17
18#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/mach-s3c24xx/irq-pm.c
index 0efb2e2848c8..0efb2e2848c8 100644
--- a/arch/arm/plat-s3c24xx/irq-pm.c
+++ b/arch/arm/mach-s3c24xx/irq-pm.c
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c
index 60627e63a254..60627e63a254 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/mach-s3c24xx/pm.c
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S
index c56612569b40..c56612569b40 100644
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/mach-s3c24xx/sleep.S
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 86ce62f66190..b8337e248b09 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -33,8 +33,6 @@
33#include <mach/irqs.h> 33#include <mach/irqs.h>
34#include <mach/dma.h> 34#include <mach/dma.h>
35 35
36static u64 dma_dmamask = DMA_BIT_MASK(32);
37
38static u8 pdma0_peri[] = { 36static u8 pdma0_peri[] = {
39 DMACH_UART0_RX, 37 DMACH_UART0_RX,
40 DMACH_UART0_TX, 38 DMACH_UART0_TX,
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index a9ea64e0da0d..48d018f2332b 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -484,8 +484,8 @@ static struct wm8994_pdata wm8994_platform_data = {
484 .gpio_defaults[8] = 0x0100, 484 .gpio_defaults[8] = 0x0100,
485 .gpio_defaults[9] = 0x0100, 485 .gpio_defaults[9] = 0x0100,
486 .gpio_defaults[10] = 0x0100, 486 .gpio_defaults[10] = 0x0100,
487 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ 487 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
488 .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, 488 .ldo[1] = { 0, &wm8994_ldo2_data },
489}; 489};
490 490
491/* GPIO I2C PMIC */ 491/* GPIO I2C PMIC */
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 2cf5ed75f390..32395664e879 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -25,6 +25,7 @@
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/mmc/host.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
29 30
30#include <asm/hardware/vic.h> 31#include <asm/hardware/vic.h>
@@ -674,8 +675,8 @@ static struct wm8994_pdata wm8994_platform_data = {
674 .gpio_defaults[8] = 0x0100, 675 .gpio_defaults[8] = 0x0100,
675 .gpio_defaults[9] = 0x0100, 676 .gpio_defaults[9] = 0x0100,
676 .gpio_defaults[10] = 0x0100, 677 .gpio_defaults[10] = 0x0100,
677 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ 678 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
678 .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, 679 .ldo[1] = { 0, &wm8994_ldo2_data },
679}; 680};
680 681
681/* GPIO I2C PMIC */ 682/* GPIO I2C PMIC */
@@ -765,6 +766,7 @@ static void __init goni_pmic_init(void)
765/* MoviNAND */ 766/* MoviNAND */
766static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { 767static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
767 .max_width = 4, 768 .max_width = 4,
769 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
768 .cd_type = S3C_SDHCI_CD_PERMANENT, 770 .cd_type = S3C_SDHCI_CD_PERMANENT,
769}; 771};
770 772
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 48885b7efd6b..c7f418b0cde9 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -313,6 +313,10 @@ static struct sa1100fb_mach_info collie_lcd_info = {
313 313
314 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, 314 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
315 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), 315 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
316
317#ifdef CONFIG_BACKLIGHT_LOCOMO
318 .lcd_power = locomolcd_power
319#endif
316}; 320};
317 321
318static void __init collie_init(void) 322static void __init collie_init(void)
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 7c524b4e415d..16be4c56abe3 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -306,7 +306,7 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
306} 306}
307 307
308static struct resource sa1100_rtc_resources[] = { 308static struct resource sa1100_rtc_resources[] = {
309 DEFINE_RES_MEM(0x90010000, 0x9001003f), 309 DEFINE_RES_MEM(0x90010000, 0x40),
310 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"), 310 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
311 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"), 311 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
312}; 312};
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index 52acda7061b7..f33679d2d3ee 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/collie.h 2 * arch/arm/mach-sa1100/include/mach/collie.h
3 * 3 *
4 * This file contains the hardware specific definitions for Assabet 4 * This file contains the hardware specific definitions for Collie
5 * Only include this file from SA1100-specific files. 5 * Only include this file from SA1100-specific files.
6 * 6 *
7 * ChangeLog: 7 * ChangeLog:
@@ -13,6 +13,7 @@
13#ifndef __ASM_ARCH_COLLIE_H 13#ifndef __ASM_ARCH_COLLIE_H
14#define __ASM_ARCH_COLLIE_H 14#define __ASM_ARCH_COLLIE_H
15 15
16extern void locomolcd_power(int on);
16 17
17#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) 18#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
18#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0) 19#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0)
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 1621ad07d284..33339745d432 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1667,8 +1667,10 @@ void __init u300_init_irq(void)
1667 1667
1668 for (i = 0; i < U300_VIC_IRQS_END; i++) 1668 for (i = 0; i < U300_VIC_IRQS_END; i++)
1669 set_bit(i, (unsigned long *) &mask[0]); 1669 set_bit(i, (unsigned long *) &mask[0]);
1670 vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]); 1670 vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
1671 vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]); 1671 mask[0], mask[0]);
1672 vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
1673 mask[1], mask[1]);
1672} 1674}
1673 1675
1674 1676
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
index a38f80238ea9..cb04bd6ab3e7 100644
--- a/arch/arm/mach-u300/i2c.c
+++ b/arch/arm/mach-u300/i2c.c
@@ -146,9 +146,6 @@ static struct ab3100_platform_data ab3100_plf_data = {
146 .min_uV = 1800000, 146 .min_uV = 1800000,
147 .max_uV = 1800000, 147 .max_uV = 1800000,
148 .valid_modes_mask = REGULATOR_MODE_NORMAL, 148 .valid_modes_mask = REGULATOR_MODE_NORMAL,
149 .valid_ops_mask =
150 REGULATOR_CHANGE_VOLTAGE |
151 REGULATOR_CHANGE_STATUS,
152 .always_on = 1, 149 .always_on = 1,
153 .boot_on = 1, 150 .boot_on = 1,
154 }, 151 },
@@ -160,9 +157,6 @@ static struct ab3100_platform_data ab3100_plf_data = {
160 .min_uV = 2500000, 157 .min_uV = 2500000,
161 .max_uV = 2500000, 158 .max_uV = 2500000,
162 .valid_modes_mask = REGULATOR_MODE_NORMAL, 159 .valid_modes_mask = REGULATOR_MODE_NORMAL,
163 .valid_ops_mask =
164 REGULATOR_CHANGE_VOLTAGE |
165 REGULATOR_CHANGE_STATUS,
166 .always_on = 1, 160 .always_on = 1,
167 .boot_on = 1, 161 .boot_on = 1,
168 }, 162 },
@@ -230,8 +224,7 @@ static struct ab3100_platform_data ab3100_plf_data = {
230 .max_uV = 1800000, 224 .max_uV = 1800000,
231 .valid_modes_mask = REGULATOR_MODE_NORMAL, 225 .valid_modes_mask = REGULATOR_MODE_NORMAL,
232 .valid_ops_mask = 226 .valid_ops_mask =
233 REGULATOR_CHANGE_VOLTAGE | 227 REGULATOR_CHANGE_VOLTAGE,
234 REGULATOR_CHANGE_STATUS,
235 .always_on = 1, 228 .always_on = 1,
236 .boot_on = 1, 229 .boot_on = 1,
237 }, 230 },
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index ee78a26707eb..ec09c1e07b1a 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,101 +12,101 @@
12#ifndef __MACH_IRQS_H 12#ifndef __MACH_IRQS_H
13#define __MACH_IRQS_H 13#define __MACH_IRQS_H
14 14
15#define IRQ_U300_INTCON0_START 0 15#define IRQ_U300_INTCON0_START 1
16#define IRQ_U300_INTCON1_START 32 16#define IRQ_U300_INTCON1_START 33
17/* These are on INTCON0 - 30 lines */ 17/* These are on INTCON0 - 30 lines */
18#define IRQ_U300_IRQ0_EXT 0 18#define IRQ_U300_IRQ0_EXT 1
19#define IRQ_U300_IRQ1_EXT 1 19#define IRQ_U300_IRQ1_EXT 2
20#define IRQ_U300_DMA 2 20#define IRQ_U300_DMA 3
21#define IRQ_U300_VIDEO_ENC_0 3 21#define IRQ_U300_VIDEO_ENC_0 4
22#define IRQ_U300_VIDEO_ENC_1 4 22#define IRQ_U300_VIDEO_ENC_1 5
23#define IRQ_U300_AAIF_RX 5 23#define IRQ_U300_AAIF_RX 6
24#define IRQ_U300_AAIF_TX 6 24#define IRQ_U300_AAIF_TX 7
25#define IRQ_U300_AAIF_VGPIO 7 25#define IRQ_U300_AAIF_VGPIO 8
26#define IRQ_U300_AAIF_WAKEUP 8 26#define IRQ_U300_AAIF_WAKEUP 9
27#define IRQ_U300_PCM_I2S0_FRAME 9 27#define IRQ_U300_PCM_I2S0_FRAME 10
28#define IRQ_U300_PCM_I2S0_FIFO 10 28#define IRQ_U300_PCM_I2S0_FIFO 11
29#define IRQ_U300_PCM_I2S1_FRAME 11 29#define IRQ_U300_PCM_I2S1_FRAME 12
30#define IRQ_U300_PCM_I2S1_FIFO 12 30#define IRQ_U300_PCM_I2S1_FIFO 13
31#define IRQ_U300_XGAM_GAMCON 13 31#define IRQ_U300_XGAM_GAMCON 14
32#define IRQ_U300_XGAM_CDI 14 32#define IRQ_U300_XGAM_CDI 15
33#define IRQ_U300_XGAM_CDICON 15 33#define IRQ_U300_XGAM_CDICON 16
34#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 34#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
35/* MMIACC not used on the DB3210 or DB3350 chips */ 35/* MMIACC not used on the DB3210 or DB3350 chips */
36#define IRQ_U300_XGAM_MMIACC 16 36#define IRQ_U300_XGAM_MMIACC 17
37#endif 37#endif
38#define IRQ_U300_XGAM_PDI 17 38#define IRQ_U300_XGAM_PDI 18
39#define IRQ_U300_XGAM_PDICON 18 39#define IRQ_U300_XGAM_PDICON 19
40#define IRQ_U300_XGAM_GAMEACC 19 40#define IRQ_U300_XGAM_GAMEACC 20
41#define IRQ_U300_XGAM_MCIDCT 20 41#define IRQ_U300_XGAM_MCIDCT 21
42#define IRQ_U300_APEX 21 42#define IRQ_U300_APEX 22
43#define IRQ_U300_UART0 22 43#define IRQ_U300_UART0 23
44#define IRQ_U300_SPI 23 44#define IRQ_U300_SPI 24
45#define IRQ_U300_TIMER_APP_OS 24 45#define IRQ_U300_TIMER_APP_OS 25
46#define IRQ_U300_TIMER_APP_DD 25 46#define IRQ_U300_TIMER_APP_DD 26
47#define IRQ_U300_TIMER_APP_GP1 26 47#define IRQ_U300_TIMER_APP_GP1 27
48#define IRQ_U300_TIMER_APP_GP2 27 48#define IRQ_U300_TIMER_APP_GP2 28
49#define IRQ_U300_TIMER_OS 28 49#define IRQ_U300_TIMER_OS 29
50#define IRQ_U300_TIMER_MS 29 50#define IRQ_U300_TIMER_MS 30
51#define IRQ_U300_KEYPAD_KEYBF 30 51#define IRQ_U300_KEYPAD_KEYBF 31
52#define IRQ_U300_KEYPAD_KEYBR 31 52#define IRQ_U300_KEYPAD_KEYBR 32
53/* These are on INTCON1 - 32 lines */ 53/* These are on INTCON1 - 32 lines */
54#define IRQ_U300_GPIO_PORT0 32 54#define IRQ_U300_GPIO_PORT0 33
55#define IRQ_U300_GPIO_PORT1 33 55#define IRQ_U300_GPIO_PORT1 34
56#define IRQ_U300_GPIO_PORT2 34 56#define IRQ_U300_GPIO_PORT2 35
57 57
58#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \ 58#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
59 defined(CONFIG_MACH_U300_BS335) 59 defined(CONFIG_MACH_U300_BS335)
60/* These are for DB3150, DB3200 and DB3350 */ 60/* These are for DB3150, DB3200 and DB3350 */
61#define IRQ_U300_WDOG 35 61#define IRQ_U300_WDOG 36
62#define IRQ_U300_EVHIST 36 62#define IRQ_U300_EVHIST 37
63#define IRQ_U300_MSPRO 37 63#define IRQ_U300_MSPRO 38
64#define IRQ_U300_MMCSD_MCIINTR0 38 64#define IRQ_U300_MMCSD_MCIINTR0 39
65#define IRQ_U300_MMCSD_MCIINTR1 39 65#define IRQ_U300_MMCSD_MCIINTR1 40
66#define IRQ_U300_I2C0 40 66#define IRQ_U300_I2C0 41
67#define IRQ_U300_I2C1 41 67#define IRQ_U300_I2C1 42
68#define IRQ_U300_RTC 42 68#define IRQ_U300_RTC 43
69#define IRQ_U300_NFIF 43 69#define IRQ_U300_NFIF 44
70#define IRQ_U300_NFIF2 44 70#define IRQ_U300_NFIF2 45
71#endif 71#endif
72 72
73/* DB3150 and DB3200 have only 45 IRQs */ 73/* DB3150 and DB3200 have only 45 IRQs */
74#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 74#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
75#define U300_VIC_IRQS_END 45 75#define U300_VIC_IRQS_END 46
76#endif 76#endif
77 77
78/* The DB3350-specific interrupt lines */ 78/* The DB3350-specific interrupt lines */
79#ifdef CONFIG_MACH_U300_BS335 79#ifdef CONFIG_MACH_U300_BS335
80#define IRQ_U300_ISP_F0 45 80#define IRQ_U300_ISP_F0 46
81#define IRQ_U300_ISP_F1 46 81#define IRQ_U300_ISP_F1 47
82#define IRQ_U300_ISP_F2 47 82#define IRQ_U300_ISP_F2 48
83#define IRQ_U300_ISP_F3 48 83#define IRQ_U300_ISP_F3 49
84#define IRQ_U300_ISP_F4 49 84#define IRQ_U300_ISP_F4 50
85#define IRQ_U300_GPIO_PORT3 50 85#define IRQ_U300_GPIO_PORT3 51
86#define IRQ_U300_SYSCON_PLL_LOCK 51 86#define IRQ_U300_SYSCON_PLL_LOCK 52
87#define IRQ_U300_UART1 52 87#define IRQ_U300_UART1 53
88#define IRQ_U300_GPIO_PORT4 53 88#define IRQ_U300_GPIO_PORT4 54
89#define IRQ_U300_GPIO_PORT5 54 89#define IRQ_U300_GPIO_PORT5 55
90#define IRQ_U300_GPIO_PORT6 55 90#define IRQ_U300_GPIO_PORT6 56
91#define U300_VIC_IRQS_END 56 91#define U300_VIC_IRQS_END 57
92#endif 92#endif
93 93
94/* The DB3210-specific interrupt lines */ 94/* The DB3210-specific interrupt lines */
95#ifdef CONFIG_MACH_U300_BS365 95#ifdef CONFIG_MACH_U300_BS365
96#define IRQ_U300_GPIO_PORT3 35 96#define IRQ_U300_GPIO_PORT3 36
97#define IRQ_U300_GPIO_PORT4 36 97#define IRQ_U300_GPIO_PORT4 37
98#define IRQ_U300_WDOG 37 98#define IRQ_U300_WDOG 38
99#define IRQ_U300_EVHIST 38 99#define IRQ_U300_EVHIST 39
100#define IRQ_U300_MSPRO 39 100#define IRQ_U300_MSPRO 40
101#define IRQ_U300_MMCSD_MCIINTR0 40 101#define IRQ_U300_MMCSD_MCIINTR0 41
102#define IRQ_U300_MMCSD_MCIINTR1 41 102#define IRQ_U300_MMCSD_MCIINTR1 42
103#define IRQ_U300_I2C0 42 103#define IRQ_U300_I2C0 43
104#define IRQ_U300_I2C1 43 104#define IRQ_U300_I2C1 44
105#define IRQ_U300_RTC 44 105#define IRQ_U300_RTC 45
106#define IRQ_U300_NFIF 45 106#define IRQ_U300_NFIF 46
107#define IRQ_U300_NFIF2 46 107#define IRQ_U300_NFIF2 47
108#define IRQ_U300_SYSCON_PLL_LOCK 47 108#define IRQ_U300_SYSCON_PLL_LOCK 48
109#define U300_VIC_IRQS_END 48 109#define U300_VIC_IRQS_END 49
110#endif 110#endif
111 111
112/* Maximum 8*7 GPIO lines */ 112/* Maximum 8*7 GPIO lines */
@@ -117,6 +117,6 @@
117#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END) 117#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
118#endif 118#endif
119 119
120#define NR_IRQS (IRQ_U300_GPIO_END) 120#define NR_IRQS (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
121 121
122#endif 122#endif
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 880d02ec89d4..ef7099eea0f2 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -17,6 +17,7 @@ config UX500_SOC_DB5500
17config UX500_SOC_DB8500 17config UX500_SOC_DB8500
18 bool 18 bool
19 select MFD_DB8500_PRCMU 19 select MFD_DB8500_PRCMU
20 select REGULATOR
20 select REGULATOR_DB8500_PRCMU 21 select REGULATOR_DB8500_PRCMU
21 select CPU_FREQ_TABLE if CPU_FREQ 22 select CPU_FREQ_TABLE if CPU_FREQ
22 23
diff --git a/arch/arm/mach-ux500/mbox-db5500.c b/arch/arm/mach-ux500/mbox-db5500.c
index 2b2d51caf9d8..0127490218cd 100644
--- a/arch/arm/mach-ux500/mbox-db5500.c
+++ b/arch/arm/mach-ux500/mbox-db5500.c
@@ -168,7 +168,7 @@ static ssize_t mbox_read_fifo(struct device *dev,
168 return sprintf(buf, "0x%X\n", mbox_value); 168 return sprintf(buf, "0x%X\n", mbox_value);
169} 169}
170 170
171static DEVICE_ATTR(fifo, S_IWUGO | S_IRUGO, mbox_read_fifo, mbox_write_fifo); 171static DEVICE_ATTR(fifo, S_IWUSR | S_IRUGO, mbox_read_fifo, mbox_write_fifo);
172 172
173static int mbox_show(struct seq_file *s, void *data) 173static int mbox_show(struct seq_file *s, void *data)
174{ 174{
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index d2058ef8345f..eff5842f6232 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -99,7 +99,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
99 */ 99 */
100 write_pen_release(cpu_logical_map(cpu)); 100 write_pen_release(cpu_logical_map(cpu));
101 101
102 gic_raise_softirq(cpumask_of(cpu), 1); 102 smp_send_reschedule(cpu);
103 103
104 timeout = jiffies + (1 * HZ); 104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) { 105 while (time_before(jiffies, timeout)) {
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index a6e23f464528..d2268be8c34c 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -190,7 +190,7 @@ static struct resource pre_mem = {
190 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, 190 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
191}; 191};
192 192
193static int __init pci_versatile_setup_resources(struct list_head *resources) 193static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
194{ 194{
195 int ret = 0; 195 int ret = 0;
196 196
@@ -218,9 +218,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources)
218 * the mem resource for this bus 218 * the mem resource for this bus
219 * the prefetch mem resource for this bus 219 * the prefetch mem resource for this bus
220 */ 220 */
221 pci_add_resource_offset(resources, &io_mem, sys->io_offset); 221 pci_add_resource_offset(&sys->resources, &io_mem, sys->io_offset);
222 pci_add_resource_offset(resources, &non_mem, sys->mem_offset); 222 pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
223 pci_add_resource_offset(resources, &pre_mem, sys->mem_offset); 223 pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
224 224
225 goto out; 225 goto out;
226 226
@@ -249,7 +249,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
249 249
250 if (nr == 0) { 250 if (nr == 0) {
251 sys->mem_offset = 0; 251 sys->mem_offset = 0;
252 ret = pci_versatile_setup_resources(&sys->resources); 252 ret = pci_versatile_setup_resources(sys);
253 if (ret < 0) { 253 if (ret < 0) {
254 printk("pci_versatile_setup: resources... oops?\n"); 254 printk("pci_versatile_setup: resources... oops?\n");
255 goto out; 255 goto out;
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 7edef9121632..7c8a7d8467bf 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -723,7 +723,7 @@ config CPU_HIGH_VECTOR
723 bool "Select the High exception vector" 723 bool "Select the High exception vector"
724 help 724 help
725 Say Y here to select high exception vector(0xFFFF0000~). 725 Say Y here to select high exception vector(0xFFFF0000~).
726 The exception vector can be vary depending on the platform 726 The exception vector can vary depending on the platform
727 design in nommu mode. If your platform needs to select 727 design in nommu mode. If your platform needs to select
728 high exception vector, say Y. 728 high exception vector, say Y.
729 Otherwise or if you are unsure, say N, and the low exception 729 Otherwise or if you are unsure, say N, and the low exception
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index ff1f7cc11f87..80741992a9fc 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -26,18 +26,23 @@ ENTRY(v6_early_abort)
26 mrc p15, 0, r1, c5, c0, 0 @ get FSR 26 mrc p15, 0, r1, c5, c0, 0 @ get FSR
27 mrc p15, 0, r0, c6, c0, 0 @ get FAR 27 mrc p15, 0, r0, c6, c0, 0 @ get FAR
28/* 28/*
29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103). 29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
30 * The test below covers all the write situations, including Java bytecodes
31 */ 30 */
32 bic r1, r1, #1 << 11 @ clear bit 11 of FSR 31#ifdef CONFIG_ARM_ERRATA_326103
32 ldr ip, =0x4107b36
33 mrc p15, 0, r3, c0, c0, 0 @ get processor id
34 teq ip, r3, lsr #4 @ r0 ARM1136?
35 bne do_DataAbort
33 tst r5, #PSR_J_BIT @ Java? 36 tst r5, #PSR_J_BIT @ Java?
37 tsteq r5, #PSR_T_BIT @ Thumb?
34 bne do_DataAbort 38 bne do_DataAbort
35 do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3 39 bic r1, r1, #1 << 11 @ clear bit 11 of FSR
36 ldreq r3, [r4] @ read aborted ARM instruction 40 ldr r3, [r4] @ read aborted ARM instruction
37#ifdef CONFIG_CPU_ENDIAN_BE8 41#ifdef CONFIG_CPU_ENDIAN_BE8
38 reveq r3, r3 42 rev r3, r3
39#endif 43#endif
40 do_ldrd_abort tmp=ip, insn=r3 44 do_ldrd_abort tmp=ip, insn=r3
41 tst r3, #1 << 20 @ L = 0 -> write 45 tst r3, #1 << 20 @ L = 0 -> write
42 orreq r1, r1, #1 << 11 @ yes. 46 orreq r1, r1, #1 << 11 @ yes.
47#endif
43 b do_DataAbort 48 b do_DataAbort
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index a53fd2aaa2f4..2a8e380501e8 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -32,6 +32,7 @@ static void __iomem *l2x0_base;
32static DEFINE_RAW_SPINLOCK(l2x0_lock); 32static DEFINE_RAW_SPINLOCK(l2x0_lock);
33static u32 l2x0_way_mask; /* Bitmask of active ways */ 33static u32 l2x0_way_mask; /* Bitmask of active ways */
34static u32 l2x0_size; 34static u32 l2x0_size;
35static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
35 36
36struct l2x0_regs l2x0_saved_regs; 37struct l2x0_regs l2x0_saved_regs;
37 38
@@ -61,12 +62,7 @@ static inline void cache_sync(void)
61{ 62{
62 void __iomem *base = l2x0_base; 63 void __iomem *base = l2x0_base;
63 64
64#ifdef CONFIG_PL310_ERRATA_753970 65 writel_relaxed(0, base + sync_reg_offset);
65 /* write to an unmmapped register */
66 writel_relaxed(0, base + L2X0_DUMMY_REG);
67#else
68 writel_relaxed(0, base + L2X0_CACHE_SYNC);
69#endif
70 cache_wait(base + L2X0_CACHE_SYNC, 1); 66 cache_wait(base + L2X0_CACHE_SYNC, 1);
71} 67}
72 68
@@ -85,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr)
85} 81}
86 82
87#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915) 83#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
84static inline void debug_writel(unsigned long val)
85{
86 if (outer_cache.set_debug)
87 outer_cache.set_debug(val);
88}
88 89
89#define debug_writel(val) outer_cache.set_debug(val) 90static void pl310_set_debug(unsigned long val)
90
91static void l2x0_set_debug(unsigned long val)
92{ 91{
93 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL); 92 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
94} 93}
@@ -98,7 +97,7 @@ static inline void debug_writel(unsigned long val)
98{ 97{
99} 98}
100 99
101#define l2x0_set_debug NULL 100#define pl310_set_debug NULL
102#endif 101#endif
103 102
104#ifdef CONFIG_PL310_ERRATA_588369 103#ifdef CONFIG_PL310_ERRATA_588369
@@ -331,6 +330,11 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
331 else 330 else
332 ways = 8; 331 ways = 8;
333 type = "L310"; 332 type = "L310";
333#ifdef CONFIG_PL310_ERRATA_753970
334 /* Unmapped register. */
335 sync_reg_offset = L2X0_DUMMY_REG;
336#endif
337 outer_cache.set_debug = pl310_set_debug;
334 break; 338 break;
335 case L2X0_CACHE_ID_PART_L210: 339 case L2X0_CACHE_ID_PART_L210:
336 ways = (aux >> 13) & 0xf; 340 ways = (aux >> 13) & 0xf;
@@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
379 outer_cache.flush_all = l2x0_flush_all; 383 outer_cache.flush_all = l2x0_flush_all;
380 outer_cache.inv_all = l2x0_inv_all; 384 outer_cache.inv_all = l2x0_inv_all;
381 outer_cache.disable = l2x0_disable; 385 outer_cache.disable = l2x0_disable;
382 outer_cache.set_debug = l2x0_set_debug;
383 386
384 printk(KERN_INFO "%s cache controller enabled\n", type); 387 printk(KERN_INFO "%s cache controller enabled\n", type);
385 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", 388 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 9055b5a84ec5..f07467533365 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -320,7 +320,7 @@ retry:
320 */ 320 */
321 321
322 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 322 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
323 if (flags & FAULT_FLAG_ALLOW_RETRY) { 323 if (!(fault & VM_FAULT_ERROR) && flags & FAULT_FLAG_ALLOW_RETRY) {
324 if (fault & VM_FAULT_MAJOR) { 324 if (fault & VM_FAULT_MAJOR) {
325 tsk->maj_flt++; 325 tsk->maj_flt++;
326 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 326 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 595079fa9d1d..8f5813bbffb5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -293,11 +293,11 @@ EXPORT_SYMBOL(pfn_valid);
293#endif 293#endif
294 294
295#ifndef CONFIG_SPARSEMEM 295#ifndef CONFIG_SPARSEMEM
296static void arm_memory_present(void) 296static void __init arm_memory_present(void)
297{ 297{
298} 298}
299#else 299#else
300static void arm_memory_present(void) 300static void __init arm_memory_present(void)
301{ 301{
302 struct memblock_region *reg; 302 struct memblock_region *reg;
303 303
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b86f8933ff91..2c7cf2f9c837 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -618,8 +618,8 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
618 } 618 }
619} 619}
620 620
621static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 621static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
622 unsigned long phys, const struct mem_type *type) 622 unsigned long end, unsigned long phys, const struct mem_type *type)
623{ 623{
624 pud_t *pud = pud_offset(pgd, addr); 624 pud_t *pud = pud_offset(pgd, addr);
625 unsigned long next; 625 unsigned long next;
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 6486d2f253cd..d51225f90ae2 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -13,6 +13,7 @@
13#include <asm/sections.h> 13#include <asm/sections.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/setup.h> 15#include <asm/setup.h>
16#include <asm/traps.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17 18
18#include "mm.h" 19#include "mm.h"
@@ -39,6 +40,7 @@ void __init sanity_check_meminfo(void)
39 */ 40 */
40void __init paging_init(struct machine_desc *mdesc) 41void __init paging_init(struct machine_desc *mdesc)
41{ 42{
43 early_trap_init((void *)CONFIG_VECTORS_BASE);
42 bootmem_init(); 44 bootmem_init();
43} 45}
44 46
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index f1c8486f7501..c2e2b66f72b5 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -255,6 +255,18 @@ __v7_setup:
255 mcr p15, 0, r5, c10, c2, 0 @ write PRRR 255 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
256 mcr p15, 0, r6, c10, c2, 1 @ write NMRR 256 mcr p15, 0, r6, c10, c2, 1 @ write NMRR
257#endif 257#endif
258#ifndef CONFIG_ARM_THUMBEE
259 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
260 and r0, r0, #(0xf << 12) @ ThumbEE enabled field
261 teq r0, #(1 << 12) @ check if ThumbEE is present
262 bne 1f
263 mov r5, #0
264 mcr p14, 6, r5, c1, c0, 0 @ Initialize TEEHBR to 0
265 mrc p14, 6, r0, c0, c0, 0 @ load TEECR
266 orr r0, r0, #1 @ set the 1st bit in order to
267 mcr p14, 6, r0, c0, c0, 0 @ stop userspace TEEHBR access
2681:
269#endif
258 adr r5, v7_crval 270 adr r5, v7_crval
259 ldmia r5, {r5, r6} 271 ldmia r5, {r5, r6}
260#ifdef CONFIG_CPU_ENDIAN_BE8 272#ifdef CONFIG_CPU_ENDIAN_BE8
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index d1e31fa1b0c3..5cac2c540f4f 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -80,7 +80,7 @@ static struct smsc911x_platform_config smsc911x_config = {
80 80
81static struct platform_device smsc_lan9217_device = { 81static struct platform_device smsc_lan9217_device = {
82 .name = "smsc911x", 82 .name = "smsc911x",
83 .id = 0, 83 .id = -1,
84 .dev = { 84 .dev = {
85 .platform_data = &smsc911x_config, 85 .platform_data = &smsc911x_config,
86 }, 86 },
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ce1e9b96ba1a..ad95c7a5d009 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -17,6 +17,7 @@ config ARCH_OMAP1
17 select IRQ_DOMAIN 17 select IRQ_DOMAIN
18 select HAVE_IDE 18 select HAVE_IDE
19 select NEED_MACH_MEMORY_H 19 select NEED_MACH_MEMORY_H
20 select NEED_MACH_IO_H if PCCARD
20 help 21 help
21 "Systems based on omap7xx, omap15xx or omap16xx" 22 "Systems based on omap7xx, omap15xx or omap16xx"
22 23
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 56b6f8b7053e..62ec5c452792 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -398,32 +398,6 @@ struct clk dummy_ck = {
398 .ops = &clkops_null, 398 .ops = &clkops_null,
399}; 399};
400 400
401#ifdef CONFIG_CPU_FREQ
402void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
403{
404 unsigned long flags;
405
406 if (!arch_clock || !arch_clock->clk_init_cpufreq_table)
407 return;
408
409 spin_lock_irqsave(&clockfw_lock, flags);
410 arch_clock->clk_init_cpufreq_table(table);
411 spin_unlock_irqrestore(&clockfw_lock, flags);
412}
413
414void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
415{
416 unsigned long flags;
417
418 if (!arch_clock || !arch_clock->clk_exit_cpufreq_table)
419 return;
420
421 spin_lock_irqsave(&clockfw_lock, flags);
422 arch_clock->clk_exit_cpufreq_table(table);
423 spin_unlock_irqrestore(&clockfw_lock, flags);
424}
425#endif
426
427/* 401/*
428 * 402 *
429 */ 403 */
@@ -441,6 +415,8 @@ static int __init clk_disable_unused(void)
441 return 0; 415 return 0;
442 416
443 pr_info("clock: disabling unused clocks to save power\n"); 417 pr_info("clock: disabling unused clocks to save power\n");
418
419 spin_lock_irqsave(&clockfw_lock, flags);
444 list_for_each_entry(ck, &clocks, node) { 420 list_for_each_entry(ck, &clocks, node) {
445 if (ck->ops == &clkops_null) 421 if (ck->ops == &clkops_null)
446 continue; 422 continue;
@@ -448,10 +424,9 @@ static int __init clk_disable_unused(void)
448 if (ck->usecount > 0 || !ck->enable_reg) 424 if (ck->usecount > 0 || !ck->enable_reg)
449 continue; 425 continue;
450 426
451 spin_lock_irqsave(&clockfw_lock, flags);
452 arch_clock->clk_disable_unused(ck); 427 arch_clock->clk_disable_unused(ck);
453 spin_unlock_irqrestore(&clockfw_lock, flags);
454 } 428 }
429 spin_unlock_irqrestore(&clockfw_lock, flags);
455 430
456 return 0; 431 return 0;
457} 432}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index ecdb3da0dea9..c58d896cd5c3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -916,6 +916,13 @@ void omap_start_dma(int lch)
916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE; 916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
917 l |= OMAP_DMA_CCR_EN; 917 l |= OMAP_DMA_CCR_EN;
918 918
919 /*
920 * As dma_write() uses IO accessors which are weakly ordered, there
921 * is no guarantee that data in coherent DMA memory will be visible
922 * to the DMA device. Add a memory barrier here to ensure that any
923 * such data is visible prior to enabling DMA.
924 */
925 mb();
919 p->dma_write(l, CCR, lch); 926 p->dma_write(l, CCR, lch);
920 927
921 dma_chan[lch].flags |= OMAP_DMA_ACTIVE; 928 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
@@ -965,6 +972,13 @@ void omap_stop_dma(int lch)
965 p->dma_write(l, CCR, lch); 972 p->dma_write(l, CCR, lch);
966 } 973 }
967 974
975 /*
976 * Ensure that data transferred by DMA is visible to any access
977 * after DMA has been disabled. This is important for coherent
978 * DMA regions.
979 */
980 mb();
981
968 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 982 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
969 int next_lch, cur_lch = lch; 983 int next_lch, cur_lch = lch;
970 char dma_chan_link_map[dma_lch_count]; 984 char dma_chan_link_map[dma_lch_count];
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 240a7b9fd946..d0ef57c1d71b 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -272,8 +272,6 @@ struct clk {
272#endif 272#endif
273}; 273};
274 274
275struct cpufreq_frequency_table;
276
277struct clk_functions { 275struct clk_functions {
278 int (*clk_enable)(struct clk *clk); 276 int (*clk_enable)(struct clk *clk);
279 void (*clk_disable)(struct clk *clk); 277 void (*clk_disable)(struct clk *clk);
@@ -283,10 +281,6 @@ struct clk_functions {
283 void (*clk_allow_idle)(struct clk *clk); 281 void (*clk_allow_idle)(struct clk *clk);
284 void (*clk_deny_idle)(struct clk *clk); 282 void (*clk_deny_idle)(struct clk *clk);
285 void (*clk_disable_unused)(struct clk *clk); 283 void (*clk_disable_unused)(struct clk *clk);
286#ifdef CONFIG_CPU_FREQ
287 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
288 void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
289#endif
290}; 284};
291 285
292extern int mpurate; 286extern int mpurate;
@@ -301,10 +295,6 @@ extern void recalculate_root_clocks(void);
301extern unsigned long followparent_recalc(struct clk *clk); 295extern unsigned long followparent_recalc(struct clk *clk);
302extern void clk_enable_init_clocks(void); 296extern void clk_enable_init_clocks(void);
303unsigned long omap_fixed_divisor_recalc(struct clk *clk); 297unsigned long omap_fixed_divisor_recalc(struct clk *clk);
304#ifdef CONFIG_CPU_FREQ
305extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
306extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
307#endif
308extern struct clk *omap_clk_get_by_name(const char *name); 298extern struct clk *omap_clk_get_by_name(const char *name);
309extern int omap_clk_enable_autoidle_all(void); 299extern int omap_clk_enable_autoidle_all(void);
310extern int omap_clk_disable_autoidle_all(void); 300extern int omap_clk_disable_autoidle_all(void);
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 9e8e63d52aab..3f26db4ee8e6 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -47,17 +47,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
47 * with the original PRCM protocol defined for OMAP2420 47 * with the original PRCM protocol defined for OMAP2420
48 */ 48 */
49#define SYSC_TYPE1_MIDLEMODE_SHIFT 12 49#define SYSC_TYPE1_MIDLEMODE_SHIFT 12
50#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT) 50#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
51#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8 51#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
52#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT) 52#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
53#define SYSC_TYPE1_SIDLEMODE_SHIFT 3 53#define SYSC_TYPE1_SIDLEMODE_SHIFT 3
54#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT) 54#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
55#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2 55#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
56#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) 56#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
57#define SYSC_TYPE1_SOFTRESET_SHIFT 1 57#define SYSC_TYPE1_SOFTRESET_SHIFT 1
58#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) 58#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
59#define SYSC_TYPE1_AUTOIDLE_SHIFT 0 59#define SYSC_TYPE1_AUTOIDLE_SHIFT 0
60#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT) 60#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
61 61
62/* 62/*
63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant 63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
@@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
305 * @rev_offs: IP block revision register offset (from module base addr) 305 * @rev_offs: IP block revision register offset (from module base addr)
306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
308 * @srst_udelay: Delay needed after doing a softreset in usecs
308 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 309 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
309 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 310 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
310 * @clockact: the default value of the module CLOCKACTIVITY bits 311 * @clockact: the default value of the module CLOCKACTIVITY bits
@@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
330 u16 sysc_offs; 331 u16 sysc_offs;
331 u16 syss_offs; 332 u16 syss_offs;
332 u16 sysc_flags; 333 u16 sysc_flags;
334 struct omap_hwmod_sysc_fields *sysc_fields;
335 u8 srst_udelay;
333 u8 idlemodes; 336 u8 idlemodes;
334 u8 clockact; 337 u8 clockact;
335 struct omap_hwmod_sysc_fields *sysc_fields;
336}; 338};
337 339
338/** 340/**
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index eec98afa0f83..f9a8c5341ee9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
348 sdrc_actim_ctrl_b_1, sdrc_mr_1); 348 sdrc_actim_ctrl_b_1, sdrc_mr_1);
349} 349}
350 350
351#ifdef CONFIG_PM
352void omap3_sram_restore_context(void) 351void omap3_sram_restore_context(void)
353{ 352{
354 omap_sram_ceil = omap_sram_base + omap_sram_size; 353 omap_sram_ceil = omap_sram_base + omap_sram_size;
@@ -358,17 +357,18 @@ void omap3_sram_restore_context(void)
358 omap3_sram_configure_core_dpll_sz); 357 omap3_sram_configure_core_dpll_sz);
359 omap_push_sram_idle(); 358 omap_push_sram_idle();
360} 359}
361#endif /* CONFIG_PM */
362
363#endif /* CONFIG_ARCH_OMAP3 */
364 360
365static inline int omap34xx_sram_init(void) 361static inline int omap34xx_sram_init(void)
366{ 362{
367#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
368 omap3_sram_restore_context(); 363 omap3_sram_restore_context();
369#endif
370 return 0; 364 return 0;
371} 365}
366#else
367static inline int omap34xx_sram_init(void)
368{
369 return 0;
370}
371#endif /* CONFIG_ARCH_OMAP3 */
372 372
373static inline int am33xx_sram_init(void) 373static inline int am33xx_sram_init(void)
374{ 374{
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 2467b800cc76..9f60549c8da1 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -12,10 +12,7 @@ obj- :=
12 12
13# Core files 13# Core files
14 14
15obj-y += cpu.o
16obj-y += irq.o 15obj-y += irq.o
17obj-y += dev-uart.o
18obj-y += clock.o
19obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o 16obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o
20 17
21obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o 18obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o
@@ -23,9 +20,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
23 20
24# Architecture dependent builds 21# Architecture dependent builds
25 22
26obj-$(CONFIG_PM) += pm.o
27obj-$(CONFIG_PM) += irq-pm.o
28obj-$(CONFIG_PM) += sleep.o
29obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o 23obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
30obj-$(CONFIG_S3C24XX_DMA) += dma.o 24obj-$(CONFIG_S3C24XX_DMA) += dma.o
31obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o 25obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
deleted file mode 100644
index 931d26d1a54b..000000000000
--- a/arch/arm/plat-s3c24xx/clock.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/clock.c
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX Core clock control support
7 *
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
9 **
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
12 *
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27*/
28
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33
34#include <mach/hardware.h>
35#include <asm/irq.h>
36
37#include <mach/regs-clock.h>
38#include <mach/regs-gpio.h>
39
40#include <plat/cpu-freq.h>
41
42#include <plat/clock.h>
43#include <plat/cpu.h>
44#include <plat/pll.h>
45
46/* initialise all the clocks */
47
48void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
49 unsigned long hclk,
50 unsigned long pclk)
51{
52 clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
53 clk_xtal.rate);
54
55 clk_mpll.rate = fclk;
56 clk_h.rate = hclk;
57 clk_p.rate = pclk;
58 clk_f.rate = fclk;
59}
diff --git a/arch/arm/plat-s3c24xx/dev-uart.c b/arch/arm/plat-s3c24xx/dev-uart.c
deleted file mode 100644
index 9ab22e662fff..000000000000
--- a/arch/arm/plat-s3c24xx/dev-uart.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/dev-uart.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C24XX UART resource and platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/serial_core.h>
18#include <linux/platform_device.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach/map.h>
22#include <asm/mach/irq.h>
23#include <mach/hardware.h>
24#include <mach/map.h>
25
26#include <plat/devs.h>
27#include <plat/regs-serial.h>
28
29/* Serial port registrations */
30
31static struct resource s3c2410_uart0_resource[] = {
32 [0] = {
33 .start = S3C2410_PA_UART0,
34 .end = S3C2410_PA_UART0 + 0x3fff,
35 .flags = IORESOURCE_MEM,
36 },
37 [1] = {
38 .start = IRQ_S3CUART_RX0,
39 .end = IRQ_S3CUART_ERR0,
40 .flags = IORESOURCE_IRQ,
41 }
42};
43
44static struct resource s3c2410_uart1_resource[] = {
45 [0] = {
46 .start = S3C2410_PA_UART1,
47 .end = S3C2410_PA_UART1 + 0x3fff,
48 .flags = IORESOURCE_MEM,
49 },
50 [1] = {
51 .start = IRQ_S3CUART_RX1,
52 .end = IRQ_S3CUART_ERR1,
53 .flags = IORESOURCE_IRQ,
54 }
55};
56
57static struct resource s3c2410_uart2_resource[] = {
58 [0] = {
59 .start = S3C2410_PA_UART2,
60 .end = S3C2410_PA_UART2 + 0x3fff,
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64 .start = IRQ_S3CUART_RX2,
65 .end = IRQ_S3CUART_ERR2,
66 .flags = IORESOURCE_IRQ,
67 }
68};
69
70static struct resource s3c2410_uart3_resource[] = {
71 [0] = {
72 .start = S3C2443_PA_UART3,
73 .end = S3C2443_PA_UART3 + 0x3fff,
74 .flags = IORESOURCE_MEM,
75 },
76 [1] = {
77 .start = IRQ_S3CUART_RX3,
78 .end = IRQ_S3CUART_ERR3,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
84 [0] = {
85 .resources = s3c2410_uart0_resource,
86 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
87 },
88 [1] = {
89 .resources = s3c2410_uart1_resource,
90 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
91 },
92 [2] = {
93 .resources = s3c2410_uart2_resource,
94 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
95 },
96 [3] = {
97 .resources = s3c2410_uart3_resource,
98 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
99 },
100};
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index b54e13d09018..f8c571031da8 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -430,6 +430,7 @@ comment "Power management"
430config SAMSUNG_PM_DEBUG 430config SAMSUNG_PM_DEBUG
431 bool "S3C2410 PM Suspend debug" 431 bool "S3C2410 PM Suspend debug"
432 depends on PM 432 depends on PM
433 select DEBUG_LL
433 help 434 help
434 Say Y here if you want verbose debugging from the PM Suspend and 435 Say Y here if you want verbose debugging from the PM Suspend and
435 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 436 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 317e246ffc56..e834c5ef437c 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -18,6 +18,8 @@
18#ifndef __PLAT_S3C_SDHCI_H 18#ifndef __PLAT_S3C_SDHCI_H
19#define __PLAT_S3C_SDHCI_H __FILE__ 19#define __PLAT_S3C_SDHCI_H __FILE__
20 20
21#include <plat/devs.h>
22
21struct platform_device; 23struct platform_device;
22struct mmc_host; 24struct mmc_host;
23struct mmc_card; 25struct mmc_card;
@@ -356,4 +358,30 @@ static inline void exynos4_default_sdhci3(void) { }
356 358
357#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */ 359#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
358 360
361static inline void s3c_sdhci_setname(int id, char *name)
362{
363 switch (id) {
364#ifdef CONFIG_S3C_DEV_HSMMC
365 case 0:
366 s3c_device_hsmmc0.name = name;
367 break;
368#endif
369#ifdef CONFIG_S3C_DEV_HSMMC1
370 case 1:
371 s3c_device_hsmmc1.name = name;
372 break;
373#endif
374#ifdef CONFIG_S3C_DEV_HSMMC2
375 case 2:
376 s3c_device_hsmmc2.name = name;
377 break;
378#endif
379#ifdef CONFIG_S3C_DEV_HSMMC3
380 case 3:
381 s3c_device_hsmmc3.name = name;
382 break;
383#endif
384 }
385}
386
359#endif /* __PLAT_S3C_SDHCI_H */ 387#endif /* __PLAT_S3C_SDHCI_H */
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 858748eaa144..bc683b8219b5 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -17,6 +17,8 @@
17#include <linux/sched.h> 17#include <linux/sched.h>
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/uaccess.h>
21#include <linux/user.h>
20 22
21#include <asm/cp15.h> 23#include <asm/cp15.h>
22#include <asm/cputype.h> 24#include <asm/cputype.h>
@@ -529,6 +531,103 @@ void vfp_flush_hwstate(struct thread_info *thread)
529} 531}
530 532
531/* 533/*
534 * Save the current VFP state into the provided structures and prepare
535 * for entry into a new function (signal handler).
536 */
537int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
538 struct user_vfp_exc __user *ufp_exc)
539{
540 struct thread_info *thread = current_thread_info();
541 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
542 int err = 0;
543
544 /* Ensure that the saved hwstate is up-to-date. */
545 vfp_sync_hwstate(thread);
546
547 /*
548 * Copy the floating point registers. There can be unused
549 * registers see asm/hwcap.h for details.
550 */
551 err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs,
552 sizeof(hwstate->fpregs));
553 /*
554 * Copy the status and control register.
555 */
556 __put_user_error(hwstate->fpscr, &ufp->fpscr, err);
557
558 /*
559 * Copy the exception registers.
560 */
561 __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err);
562 __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
563 __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
564
565 if (err)
566 return -EFAULT;
567
568 /* Ensure that VFP is disabled. */
569 vfp_flush_hwstate(thread);
570
571 /*
572 * As per the PCS, clear the length and stride bits for function
573 * entry.
574 */
575 hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
576
577 /*
578 * Disable VFP in the hwstate so that we can detect if it gets
579 * used.
580 */
581 hwstate->fpexc &= ~FPEXC_EN;
582 return 0;
583}
584
585/* Sanitise and restore the current VFP state from the provided structures. */
586int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
587 struct user_vfp_exc __user *ufp_exc)
588{
589 struct thread_info *thread = current_thread_info();
590 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
591 unsigned long fpexc;
592 int err = 0;
593
594 /*
595 * If VFP has been used, then disable it to avoid corrupting
596 * the new thread state.
597 */
598 if (hwstate->fpexc & FPEXC_EN)
599 vfp_flush_hwstate(thread);
600
601 /*
602 * Copy the floating point registers. There can be unused
603 * registers see asm/hwcap.h for details.
604 */
605 err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs,
606 sizeof(hwstate->fpregs));
607 /*
608 * Copy the status and control register.
609 */
610 __get_user_error(hwstate->fpscr, &ufp->fpscr, err);
611
612 /*
613 * Sanitise and restore the exception registers.
614 */
615 __get_user_error(fpexc, &ufp_exc->fpexc, err);
616
617 /* Ensure the VFP is enabled. */
618 fpexc |= FPEXC_EN;
619
620 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
621 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
622 hwstate->fpexc = fpexc;
623
624 __get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
625 __get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
626
627 return err ? -EFAULT : 0;
628}
629
630/*
532 * VFP hardware can lose all context when a CPU goes offline. 631 * VFP hardware can lose all context when a CPU goes offline.
533 * As we will be running in SMP mode with CPU hotplug, we will save the 632 * As we will be running in SMP mode with CPU hotplug, we will save the
534 * hardware state at every thread switch. We clear our held state when 633 * hardware state at every thread switch. We clear our held state when