Merge branch 'drm-intel-fixes' into drm-intel-next

Grab the latest stabilisation bits from -fixes and some suspend and
resume fixes from linus.

Conflicts:
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/i915/i915_irq.c

88 files changed, 859 insertions, 345 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165b7eb0..26d45e5b636b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1391,7 +1391,7 @@ config AEABI
 
 config OABI_COMPAT
         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
-        depends on AEABI && EXPERIMENTAL
+        depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
         default y
         help
           This option preserves the old syscall interface along with the
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index a101f10bb5b1..721847dc68ab 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -50,6 +50,12 @@
 #define SCPCELLID2              0xFF8
 #define SCPCELLID3              0xFFC
 
+#define SCCTRL_TIMEREN0SEL_REFCLK       (0 << 15)
+#define SCCTRL_TIMEREN0SEL_TIMCLK       (1 << 15)
+
+#define SCCTRL_TIMEREN1SEL_REFCLK       (0 << 17)
+#define SCCTRL_TIMEREN1SEL_TIMCLK       (1 << 17)
+
 static inline void sysctl_soft_reset(void __iomem *base)
 {
         /* writing any value to SCSYSSTAT reg will reset system */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 20e0f7c9e03e..d66605dea55a 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -95,6 +95,15 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
         return (void __iomem *)addr;
 }
 
+/* IO barriers */
+#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
+#define __iormb()               rmb()
+#define __iowmb()               wmb()
+#else
+#define __iormb()               do { } while (0)
+#define __iowmb()               do { } while (0)
+#endif
+
 /*
  * Now, pick up the machine-defined IO definitions
  */
@@ -125,17 +134,17 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  */
 #ifdef __io
-#define outb(v,p)               __raw_writeb(v,__io(p))
-#define outw(v,p)               __raw_writew((__force __u16) \
-                                        cpu_to_le16(v),__io(p))
-#define outl(v,p)               __raw_writel((__force __u32) \
-                                        cpu_to_le32(v),__io(p))
+#define outb(v,p)       ({ __iowmb(); __raw_writeb(v,__io(p)); })
+#define outw(v,p)       ({ __iowmb(); __raw_writew((__force __u16) \
+                                        cpu_to_le16(v),__io(p)); })
+#define outl(v,p)       ({ __iowmb(); __raw_writel((__force __u32) \
+                                        cpu_to_le32(v),__io(p)); })
 
-#define inb(p)  ({ __u8 __v = __raw_readb(__io(p)); __v; })
+#define inb(p)  ({ __u8 __v = __raw_readb(__io(p)); __iormb(); __v; })
 #define inw(p)  ({ __u16 __v = le16_to_cpu((__force __le16) \
-                        __raw_readw(__io(p))); __v; })
+                        __raw_readw(__io(p))); __iormb(); __v; })
 #define inl(p)  ({ __u32 __v = le32_to_cpu((__force __le32) \
-                        __raw_readl(__io(p))); __v; })
+                        __raw_readl(__io(p))); __iormb(); __v; })
 
 #define outsb(p,d,l)            __raw_writesb(__io(p),d,l)
 #define outsw(p,d,l)            __raw_writesw(__io(p),d,l)
@@ -192,14 +201,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define writel_relaxed(v,c)     ((void)__raw_writel((__force u32) \
                                         cpu_to_le32(v),__mem_pci(c)))
 
-#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
-#define __iormb()               rmb()
-#define __iowmb()               wmb()
-#else
-#define __iormb()               do { } while (0)
-#define __iowmb()               do { } while (0)
-#endif
-
 #define readb(c)                ({ u8  __v = readb_relaxed(c); __iormb(); __v; })
 #define readw(c)                ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
 #define readl(c)                ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 23c2e8e5c0fa..d0ee74b7cf86 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -188,7 +188,7 @@
  * translation for translating DMA addresses.  Use the driver
  * DMA support - see dma-mapping.h.
  */
-static inline unsigned long virt_to_phys(void *x)
+static inline unsigned long virt_to_phys(const volatile void *x)
 {
         return __virt_to_phys((unsigned long)(x));
 }
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index f17d9a09e8fb..f06ff9feb0db 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -391,25 +391,24 @@ ENDPROC(__turn_mmu_on)
 
 
 #ifdef CONFIG_SMP_ON_UP
+        __INIT
 __fixup_smp:
-        mov     r4, #0x00070000
-        orr     r3, r4, #0xff000000     @ mask 0xff070000
-        orr     r4, r4, #0x41000000     @ val 0x41070000
-        and     r0, r9, r3
-        teq     r0, r4                  @ ARM CPU and ARMv6/v7?
+        and     r3, r9, #0x000f0000     @ architecture version
+        teq     r3, #0x000f0000         @ CPU ID supported?
         bne     __fixup_smp_on_up       @ no, assume UP
 
-        orr     r3, r3, #0x0000ff00
-        orr     r3, r3, #0x000000f0     @ mask 0xff07fff0
+        bic     r3, r9, #0x00ff0000
+        bic     r3, r3, #0x0000000f     @ mask 0xff00fff0
+        mov     r4, #0x41000000
         orr     r4, r4, #0x0000b000
-        orr     r4, r4, #0x00000020     @ val 0x4107b020
-        and     r0, r9, r3
-        teq     r0, r4                  @ ARM 11MPCore?
+        orr     r4, r4, #0x00000020     @ val 0x4100b020
+        teq     r3, r4                  @ ARM 11MPCore?
         moveq   pc, lr                  @ yes, assume SMP
 
         mrc     p15, 0, r0, c0, c0, 5   @ read MPIDR
-        tst     r0, #1 << 31
-        movne   pc, lr                  @ bit 31 => SMP
+        and     r0, r0, #0xc0000000     @ multiprocessing extensions and
+        teq     r0, #0x80000000         @ not part of a uniprocessor system?
+        moveq   pc, lr                  @ yes, assume SMP
 
 __fixup_smp_on_up:
         adr     r0, 1f
@@ -417,18 +416,7 @@ __fixup_smp_on_up:
         sub     r3, r0, r3
         add     r4, r4, r3
         add     r5, r5, r3
-2:      cmp     r4, r5
-        movhs   pc, lr
-        ldmia   r4!, {r0, r6}
- ARM(   str     r6, [r0, r3]    )
- THUMB( add     r0, r0, r3      )
-#ifdef __ARMEB__
- THUMB( mov     r6, r6, ror #16 )       @ Convert word order for big-endian.
-#endif
- THUMB( strh    r6, [r0], #2    )       @ For Thumb-2, store as two halfwords
- THUMB( mov     r6, r6, lsr #16 )       @ to be robust against misaligned r3.
- THUMB( strh    r6, [r0]        )
-        b       2b
+        b       __do_fixup_smp_on_up
 ENDPROC(__fixup_smp)
 
         .align
@@ -442,7 +430,31 @@ smp_on_up:
         ALT_SMP(.long   1)
         ALT_UP(.long    0)
         .popsection
+#endif
 
+        .text
+__do_fixup_smp_on_up:
+        cmp     r4, r5
+        movhs   pc, lr
+        ldmia   r4!, {r0, r6}
+ ARM(   str     r6, [r0, r3]    )
+ THUMB( add     r0, r0, r3      )
+#ifdef __ARMEB__
+ THUMB( mov     r6, r6, ror #16 )       @ Convert word order for big-endian.
 #endif
+ THUMB( strh    r6, [r0], #2    )       @ For Thumb-2, store as two halfwords
+ THUMB( mov     r6, r6, lsr #16 )       @ to be robust against misaligned r3.
+ THUMB( strh    r6, [r0]        )
+        b       __do_fixup_smp_on_up
+ENDPROC(__do_fixup_smp_on_up)
+
+ENTRY(fixup_smp)
+        stmfd   sp!, {r4 - r6, lr}
+        mov     r4, r0
+        add     r5, r0, r1
+        mov     r3, #0
+        bl      __do_fixup_smp_on_up
+        ldmfd   sp!, {r4 - r6, pc}
+ENDPROC(fixup_smp)
 
 #include "head-common.S"
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index c9f3f0467570..d600bd350704 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -137,11 +137,10 @@ static u8 get_debug_arch(void)
         u32 didr;
 
         /* Do we implement the extended CPUID interface? */
-        if (((read_cpuid_id() >> 16) & 0xf) != 0xf) {
-                pr_warning("CPUID feature registers not supported. "
-                                "Assuming v6 debug is present.\n");
+        if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),
+            "CPUID feature registers not supported. "
+            "Assuming v6 debug is present.\n"))
                 return ARM_DEBUG_ARCH_V6;
-        }
 
         ARM_DBG_READ(c0, 0, didr);
         return (didr >> 16) & 0xf;
@@ -152,6 +151,12 @@ u8 arch_get_debug_arch(void)
         return debug_arch;
 }
 
+static int debug_arch_supported(void)
+{
+        u8 arch = get_debug_arch();
+        return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14;
+}
+
 /* Determine number of BRP register available. */
 static int get_num_brp_resources(void)
 {
@@ -268,6 +273,9 @@ out:
 
 int hw_breakpoint_slots(int type)
 {
+        if (!debug_arch_supported())
+                return 0;
+
         /*
          * We can be called early, so don't rely on
          * our static variables being initialised.
@@ -834,11 +842,11 @@ static void reset_ctrl_regs(void *unused)
 
         /*
          * v7 debug contains save and restore registers so that debug state
-         * can be maintained across low-power modes without leaving
-         * the debug logic powered up. It is IMPLEMENTATION DEFINED whether
-         * we can write to the debug registers out of reset, so we must
-         * unlock the OS Lock Access Register to avoid taking undefined
-         * instruction exceptions later on.
+         * can be maintained across low-power modes without leaving the debug
+         * logic powered up. It is IMPLEMENTATION DEFINED whether we can access
+         * the debug registers out of reset, so we must unlock the OS Lock
+         * Access Register to avoid taking undefined instruction exceptions
+         * later on.
          */
         if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
                 /*
@@ -882,7 +890,7 @@ static int __init arch_hw_breakpoint_init(void)
 
         debug_arch = get_debug_arch();
 
-        if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) {
+        if (!debug_arch_supported()) {
                 pr_info("debug architecture 0x%x unsupported.\n", debug_arch);
                 return 0;
         }
@@ -899,18 +907,18 @@ static int __init arch_hw_breakpoint_init(void)
                 pr_info("%d breakpoint(s) reserved for watchpoint "
                                 "single-step.\n", core_num_reserved_brps);
 
+        /*
+         * Reset the breakpoint resources. We assume that a halting
+         * debugger will leave the world in a nice state for us.
+         */
+        on_each_cpu(reset_ctrl_regs, NULL, 1);
+
         ARM_DBG_READ(c1, 0, dscr);
         if (dscr & ARM_DSCR_HDBGEN) {
+                max_watchpoint_len = 4;
                 pr_warning("halting debug mode enabled. Assuming maximum "
-                                "watchpoint size of 4 bytes.");
+                           "watchpoint size of %u bytes.", max_watchpoint_len);
         } else {
-                /*
-                 * Reset the breakpoint resources. We assume that a halting
-                 * debugger will leave the world in a nice state for us.
-                 */
-                smp_call_function(reset_ctrl_regs, NULL, 1);
-                reset_ctrl_regs(NULL);
-
                 /* Work out the maximum supported watchpoint length. */
                 max_watchpoint_len = get_max_wp_len();
                 pr_info("maximum watchpoint size is %u bytes.\n",
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 2cfe8161b478..6d4105e6872f 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -22,6 +22,7 @@
 
 #include <asm/pgtable.h>
 #include <asm/sections.h>
+#include <asm/smp_plat.h>
 #include <asm/unwind.h>
 
 #ifdef CONFIG_XIP_KERNEL
@@ -268,12 +269,28 @@ struct mod_unwind_map {
         const Elf_Shdr *txt_sec;
 };
 
+static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
+        const Elf_Shdr *sechdrs, const char *name)
+{
+        const Elf_Shdr *s, *se;
+        const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
+
+        for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
+                if (strcmp(name, secstrs + s->sh_name) == 0)
+                        return s;
+
+        return NULL;
+}
+
+extern void fixup_smp(const void *, unsigned long);
+
 int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
                     struct module *mod)
 {
+        const Elf_Shdr * __maybe_unused s = NULL;
 #ifdef CONFIG_ARM_UNWIND
         const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
-        const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
+        const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
         struct mod_unwind_map maps[ARM_SEC_MAX];
         int i;
 
@@ -315,6 +332,9 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
                                                  maps[i].txt_sec->sh_addr,
                                                  maps[i].txt_sec->sh_size);
 #endif
+        s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
+        if (s && !is_smp())
+                fixup_smp((void *)s->sh_addr, s->sh_size);
         return 0;
 }
 
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5efa2647a2fb..d150ad1ccb5d 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -700,7 +700,7 @@ user_backtrace(struct frame_tail __user *tail,
          * Frame pointers should strictly progress back up the stack
          * (towards higher addresses).
          */
-        if (tail >= buftail.fp)
+        if (tail + 1 >= buftail.fp)
                 return NULL;
 
         return buftail.fp - 1;
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fd9156698ab9..60636f499cb3 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -36,6 +36,7 @@ static void twd_set_mode(enum clock_event_mode mode,
                 /* timer load already set up */
                 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
                         | TWD_TIMER_CONTROL_PERIODIC;
+                __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* period set, and timer enabled in 'next_event' hook */
@@ -81,7 +82,7 @@ int twd_timer_ack(void)
 
 static void __cpuinit twd_calibrate_rate(void)
 {
-        unsigned long load, count;
+        unsigned long count;
         u64 waitjiffies;
 
         /*
@@ -116,10 +117,6 @@ static void __cpuinit twd_calibrate_rate(void)
                 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
                         (twd_timer_rate / 1000000) % 100);
         }
-
-        load = twd_timer_rate / HZ;
-
-        __raw_writel(load, twd_base + TWD_TIMER_LOAD);
 }
 
 /*
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index ffdf87be2958..82079545adc4 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
 static struct resource ep93xx_ac97_resources[] = {
         {
                 .start  = EP93XX_AAC_PHYS_BASE,
-                .end    = EP93XX_AAC_PHYS_BASE + 0xb0 - 1,
+                .end    = EP93XX_AAC_PHYS_BASE + 0xac - 1,
                 .flags  = IORESOURCE_MEM,
         },
         {
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index f3dc76fdcea8..bec34b834958 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -427,6 +427,13 @@ void __init ep93xx_gpio_init(void)
 {
         int i;
 
+        /* Set Ports C, D, E, G, and H for GPIO use */
+        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
+                                 EP93XX_SYSCON_DEVCFG_GONK |
+                                 EP93XX_SYSCON_DEVCFG_EONIDE |
+                                 EP93XX_SYSCON_DEVCFG_GONIDE |
+                                 EP93XX_SYSCON_DEVCFG_HONIDE);
+
         for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++)
                 gpiochip_add(&ep93xx_gpio_banks[i].chip);
 }
diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S
index 3c9e0c40c679..30b971d65815 100644
--- a/arch/arm/mach-footbridge/include/mach/debug-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
         /* For NetWinder debugging */
                 .macro  addruart, rp, rv
                 mov     \rp, #0x000003f8
-                orr     \rv, \rp, #0x7c000000   @ physical
-                orr     \rp, \rp, #0xff000000   @ virtual
+                orr     \rv, \rp, #0xff000000   @ virtual
+                orr     \rp, \rp, #0x7c000000   @ physical
                 .endm
 
 #define UART_SHIFT      0
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index aa76cfd9f348..8382e7902078 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
         KEY(3, 3, KEY_POWER),
 };
 
-static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = {
+static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
         .keymap         = mx25pdk_keymap,
         .keymap_size    = ARRAY_SIZE(mx25pdk_keymap),
 };
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 4dc68d6bb6be..9fd894271d5d 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -432,7 +432,7 @@ static struct clocksource clocksource_ixp4xx = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-unsigned long ixp4xx_timer_freq = FREQ;
+unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
 static void __init ixp4xx_clocksource_init(void)
 {
@@ -496,7 +496,7 @@ static struct clock_event_device clockevent_ixp4xx = {
 
 static void __init ixp4xx_clockevent_init(void)
 {
-        clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC,
+        clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
                                         clockevent_ixp4xx.shift);
         clockevent_ixp4xx.max_delta_ns =
                 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
diff --git a/arch/arm/mach-ixp4xx/include/mach/timex.h b/arch/arm/mach-ixp4xx/include/mach/timex.h
index 2c3f93c3eb79..c9e930f29339 100644
--- a/arch/arm/mach-ixp4xx/include/mach/timex.h
+++ b/arch/arm/mach-ixp4xx/include/mach/timex.h
@@ -10,6 +10,7 @@
  * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the
  * timer register ignores the bottom 2 bits of the LATCH value.
  */
-#define FREQ 66666000
-#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
+#define IXP4XX_TIMER_FREQ 66666000
+#define CLOCK_TICK_RATE \
+        (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
 
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index bfdbe4b5a3cc..852f7c9f87d0 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -265,6 +265,11 @@ void qmgr_release_queue(unsigned int queue)
                qmgr_queue_descs[queue], queue);
         qmgr_queue_descs[queue][0] = '\x0';
 #endif
+
+        while ((addr = qmgr_get_entry(queue)))
+                printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
+                       queue, addr);
+
         __raw_writel(0, &qmgr_regs->sram[queue]);
 
         used_sram_bitmap[0] &= ~mask[0];
@@ -275,10 +280,6 @@ void qmgr_release_queue(unsigned int queue)
         spin_unlock_irq(&qmgr_lock);
 
         module_put(THIS_MODULE);
-
-        while ((addr = qmgr_get_entry(queue)))
-                printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
-                       queue, addr);
 }
 
 static int qmgr_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index b1a362ebfded..ca72a05ed9c1 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)		\
         reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);         \
         reg &= ~BM_CLKCTRL_##dr##_DIV;                                  \
         reg |= div << BP_CLKCTRL_##dr##_DIV;                            \
-        if (reg | (1 << clk->enable_shift)) {                           \
+        if (reg & (1 << clk->enable_shift)) {                           \
                 pr_err("%s: clock is gated\n", __func__);               \
                 return -EINVAL;                                         \
         }                                                               \
@@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent)	\
 {                                                                       \
         if (parent != clk->parent) {                                    \
                 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit,            \
-                         HW_CLKCTRL_CLKSEQ_TOG);                        \
+                         CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG);    \
                 clk->parent = parent;                                   \
         }                                                               \
                                                                         \
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 56312c092a9e..fd1c4c54b8e5 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)		\
         } else {                                                        \
                 reg &= ~BM_CLKCTRL_##dr##_DIV;                          \
                 reg |= div << BP_CLKCTRL_##dr##_DIV;                    \
-                if (reg | (1 << clk->enable_shift)) {                   \
+                if (reg & (1 << clk->enable_shift)) {                   \
                         pr_err("%s: clock is gated\n", __func__);       \
                         return -EINVAL;                                 \
                 }                                                       \
         }                                                               \
-        __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU);          \
+        __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);         \
                                                                         \
         for (i = 10000; i; i--)                                         \
                 if (!(__raw_readl(CLKCTRL_BASE_ADDR +                   \
@@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent)	\
 {                                                                       \
         if (parent != clk->parent) {                                    \
                 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit,            \
-                         HW_CLKCTRL_CLKSEQ_TOG);                        \
+                         CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG);    \
                 clk->parent = parent;                                   \
         }                                                               \
                                                                         \
@@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("duart", NULL, uart_clk)
         _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
         _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
-        _REGISTER_CLOCK("fec.0", NULL, fec_clk)
         _REGISTER_CLOCK("rtc", NULL, rtc_clk)
         _REGISTER_CLOCK("pll2", NULL, pll2_clk)
         _REGISTER_CLOCK(NULL, "hclk", hbus_clk)
diff --git a/arch/arm/mach-mxs/clock.c b/arch/arm/mach-mxs/clock.c
index e7d2269cf70e..a7093c88e6a6 100644
--- a/arch/arm/mach-mxs/clock.c
+++ b/arch/arm/mach-mxs/clock.c
@@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
                 if (clk->disable)
                         clk->disable(clk);
                 __clk_disable(clk->parent);
-                __clk_disable(clk->secondary);
         }
 }
 
@@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
 
         if (clk->usecount++ == 0) {
                 __clk_enable(clk->parent);
-                __clk_enable(clk->secondary);
 
                 if (clk->enable)
                         clk->enable(clk);
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
index d7ad7a61366d..cb0c0e83a527 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/arch/arm/mach-mxs/gpio.c
@@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
         struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
         u32 gpio_irq_no_base = port->virtual_irq_start;
 
+        desc->irq_data.chip->irq_ack(&desc->irq_data);
+
         irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
                         __raw_readl(port->base + PINCTRL_IRQEN(port->id));
 
diff --git a/arch/arm/mach-mxs/include/mach/clock.h b/arch/arm/mach-mxs/include/mach/clock.h
index 041e276d8a32..592c9ab5d760 100644
--- a/arch/arm/mach-mxs/include/mach/clock.h
+++ b/arch/arm/mach-mxs/include/mach/clock.h
@@ -29,8 +29,6 @@ struct clk {
         int id;
         /* Source clock this clk depends on */
         struct clk *parent;
-        /* Secondary clock to enable/disable with this clock */
-        struct clk *secondary;
         /* Reference count of clock enable/disable */
         __s8 usecount;
         /* Register bit position for clock's enable/disable control. */
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 8d2f2daba0c0..e0a028161dde 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP730
         depends on ARCH_OMAP1
         bool "OMAP730 Based System"
         select CPU_ARM926T
+        select OMAP_MPU_TIMER
         select ARCH_OMAP_OTG
 
 config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
         default y
         bool "OMAP15xx Based System"
         select CPU_ARM925T
+        select OMAP_MPU_TIMER
 
 config ARCH_OMAP16XX
         depends on ARCH_OMAP1
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 6ee19504845f..ba6009f27677 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,12 +3,11 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
-obj-$(CONFIG_OMAP_MPU_TIMER)    += time.o
 obj-$(CONFIG_OMAP_32K_TIMER)    += timer32k.o
 
 # Power Management
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index c9be6d4d83e2..bfb4fb1d7382 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -14,19 +14,6 @@
 #include <mach/irqs.h>
 #include <asm/hardware/gic.h>
 
-/*
- * We use __glue to avoid errors with multiple definitions of
- * .globl omap_irq_flags as it's included from entry-armv.S but not
- * from entry-common.S.
- */
-#ifdef __glue
-                .pushsection .data
-                .globl  omap_irq_flags
-omap_irq_flags:
-                .word   0
-                .popsection
-#endif
-
                 .macro  disable_fiq
                 .endm
 
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 47701584df35..731dd33bff51 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -57,6 +57,7 @@ struct omap_irq_bank {
         unsigned long wake_enable;
 };
 
+u32 omap_irq_flags;
 static unsigned int irq_bank_count;
 static struct omap_irq_bank *irq_banks;
 
@@ -176,7 +177,6 @@ static struct irq_chip omap_irq_chip = {
 
 void __init omap_init_irq(void)
 {
-        extern unsigned int omap_irq_flags;
         int i, j;
 
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index c9088d85da04..453809359ba6 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
          * On OMAP1510, internal LCD controller will start the transfer
          * when it gets enabled, so assume DMA running if LCD enabled.
          */
-        if (cpu_is_omap1510())
+        if (cpu_is_omap15xx())
                 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
                         return 1;
 
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
 
 void omap_set_lcd_dma_b1_rotation(int rotate)
 {
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap15xx()) {
                 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
                 BUG();
                 return;
@@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
 
 void omap_set_lcd_dma_b1_mirror(int mirror)
 {
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap15xx()) {
                 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
                 BUG();
         }
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
 
 void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
 {
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap15xx()) {
                 printk(KERN_ERR "DMA virtual resulotion is not supported "
                                 "in 1510 mode\n");
                 BUG();
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
 
 void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
 {
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap15xx()) {
                 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
                 BUG();
         }
@@ -177,7 +177,7 @@ static void set_b1_regs(void)
                         bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
                         /* 1510 DMA requires the bottom address to be 2 more
                          * than the actual last memory access location. */
-                        if (cpu_is_omap1510() &&
+                        if (cpu_is_omap15xx() &&
                                 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
                                         bottom += 2;
                         ei = PIXSTEP(0, 0, 1, 0);
@@ -241,7 +241,7 @@ static void set_b1_regs(void)
                 return; /* Suppress warning about uninitialized vars */
         }
 
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap15xx()) {
                 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
                 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
                 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
@@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
                 BUG();
                 return;
         }
-        if (!cpu_is_omap1510())
+        if (!cpu_is_omap15xx())
                 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
                             OMAP1610_DMA_LCD_CCR);
         lcd_dma.reserved = 0;
@@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
          * connected. Otherwise the OMAP internal controller will
          * start the transfer when it gets enabled.
          */
-        if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
+        if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
                 return;
 
         w = omap_readw(OMAP1610_DMA_LCD_CTRL);
@@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
 void omap_setup_lcd_dma(void)
 {
         BUG_ON(lcd_dma.active);
-        if (!cpu_is_omap1510()) {
+        if (!cpu_is_omap15xx()) {
                 /* Set some reasonable defaults */
                 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
                 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
                 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
         }
         set_b1_regs();
-        if (!cpu_is_omap1510()) {
+        if (!cpu_is_omap15xx()) {
                 u16 w;
 
                 w = omap_readw(OMAP1610_DMA_LCD_CCR);
@@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
         u16 w;
 
         lcd_dma.active = 0;
-        if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
+        if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
                 return;
 
         w = omap_readw(OMAP1610_DMA_LCD_CCR);
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61ff916a..6885d2fac183 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -49,11 +49,15 @@
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
+#include <asm/sched_clock.h>
+
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
 #include <plat/common.h>
 
+#ifdef CONFIG_OMAP_MPU_TIMER
+
 #define OMAP_MPU_TIMER_BASE             OMAP_MPU_TIMER1_BASE
 #define OMAP_MPU_TIMER_OFFSET           0x100
 
@@ -67,7 +71,7 @@ typedef struct {
 ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +        \
                                  (n)*OMAP_MPU_TIMER_OFFSET))
 
-static inline unsigned long omap_mpu_timer_read(int nr)
+static inline unsigned long notrace omap_mpu_timer_read(int nr)
 {
         volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
         return timer->read_tim;
@@ -212,6 +216,32 @@ static struct clocksource clocksource_mpu = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+static inline unsigned long long notrace _omap_mpu_sched_clock(void)
+{
+        u32 cyc = mpu_read(&clocksource_mpu);
+        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+}
+
+#ifndef CONFIG_OMAP_32K_TIMER
+unsigned long long notrace sched_clock(void)
+{
+        return _omap_mpu_sched_clock();
+}
+#else
+static unsigned long long notrace omap_mpu_sched_clock(void)
+{
+        return _omap_mpu_sched_clock();
+}
+#endif
+
+static void notrace mpu_update_sched_clock(void)
+{
+        u32 cyc = mpu_read(&clocksource_mpu);
+        update_sched_clock(&cd, cyc, (u32)~0);
+}
+
 static void __init omap_init_clocksource(unsigned long rate)
 {
         static char err[] __initdata = KERN_ERR
@@ -219,17 +249,13 @@ static void __init omap_init_clocksource(unsigned long rate)
 
         setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
         omap_mpu_timer_start(1, ~0, 1);
+        init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
 
         if (clocksource_register_hz(&clocksource_mpu, rate))
                 printk(err, clocksource_mpu.name);
 }
 
-/*
- * ---------------------------------------------------------------------------
- * Timer initialization
- * ---------------------------------------------------------------------------
- */
-static void __init omap_timer_init(void)
+static void __init omap_mpu_timer_init(void)
 {
         struct clk      *ck_ref = clk_get(NULL, "ck_ref");
         unsigned long   rate;
@@ -246,6 +272,66 @@ static void __init omap_timer_init(void)
         omap_init_clocksource(rate);
 }
 
+#else
+static inline void omap_mpu_timer_init(void)
+{
+        pr_err("Bogus timer, should not happen\n");
+}
+#endif  /* CONFIG_OMAP_MPU_TIMER */
+
+#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
+static unsigned long long (*preferred_sched_clock)(void);
+
+unsigned long long notrace sched_clock(void)
+{
+        if (!preferred_sched_clock)
+                return 0;
+
+        return preferred_sched_clock();
+}
+
+static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
+{
+        if (use_32k_sched_clock)
+                preferred_sched_clock = omap_32k_sched_clock;
+        else
+                preferred_sched_clock = omap_mpu_sched_clock;
+}
+#else
+static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
+{
+}
+#endif
+
+static inline int omap_32k_timer_usable(void)
+{
+        int res = false;
+
+        if (cpu_is_omap730() || cpu_is_omap15xx())
+                return res;
+
+#ifdef CONFIG_OMAP_32K_TIMER
+        res = omap_32k_timer_init();
+#endif
+
+        return res;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ * Timer initialization
+ * ---------------------------------------------------------------------------
+ */
+static void __init omap_timer_init(void)
+{
+        if (omap_32k_timer_usable()) {
+                preferred_sched_clock_init(1);
+        } else {
+                omap_mpu_timer_init();
+                preferred_sched_clock_init(0);
+        }
+}
+
 struct sys_timer omap_timer = {
         .init           = omap_timer_init,
 };
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 20cfbcc6c60c..13d7b8f145bd 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,10 +52,9 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <plat/common.h>
 #include <plat/dmtimer.h>
 
-struct sys_timer omap_timer;
-
 /*
  * ---------------------------------------------------------------------------
  * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
  * Timer initialization
  * ---------------------------------------------------------------------------
  */
-static void __init omap_timer_init(void)
+bool __init omap_32k_timer_init(void)
 {
+        omap_init_clocksource_32k();
+
 #ifdef CONFIG_OMAP_DM_TIMER
         omap_dm_timer_init();
 #endif
         omap_init_32k_timer();
-}
 
-struct sys_timer omap_timer = {
-        .init           = omap_timer_init,
-};
+        return true;
+}
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 5b0c77732dfc..8f9a64d650ee 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -124,8 +124,9 @@ static inline void cm_t3517_init_hecc(void) {}
 #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 #define RTC_IO_GPIO             (153)
 #define RTC_WR_GPIO             (154)
-#define RTC_RD_GPIO             (160)
+#define RTC_RD_GPIO             (53)
 #define RTC_CS_GPIO             (163)
+#define RTC_CS_EN_GPIO          (160)
 
 struct v3020_platform_data cm_t3517_v3020_pdata = {
         .use_gpio       = 1,
@@ -145,6 +146,16 @@ static struct platform_device cm_t3517_rtc_device = {
 
 static void __init cm_t3517_init_rtc(void)
 {
+        int err;
+
+        err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en");
+        if (err) {
+                pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
+                return;
+        }
+
+        gpio_direction_output(RTC_CS_EN_GPIO, 1);
+
         platform_device_register(&cm_t3517_rtc_device);
 }
 #else
@@ -214,12 +225,12 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
         },
         {
                 .name           = "linux",
-                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x2A0000 */
                 .size           = 32 * NAND_BLOCK_SIZE,
         },
         {
                 .name           = "rootfs",
-                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x680000 */
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x6A0000 */
                 .size           = MTDPART_SIZ_FULL,
         },
 };
@@ -256,11 +267,19 @@ static void __init cm_t3517_init_irq(void)
 static struct omap_board_mux board_mux[] __initdata = {
         /* GPIO186 - Green LED */
         OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
-        /* RTC GPIOs: IO, WR#, RD#, CS# */
+
+        /* RTC GPIOs: */
+        /* IO - GPIO153 */
         OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* WR# - GPIO154 */
         OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
-        OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* RD# - GPIO53 */
+        OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* CS# - GPIO163 */
         OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+        /* CS EN - GPIO160 */
+        OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+
         /* HSUSB1 RESET */
         OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
         /* HSUSB2 RESET */
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 00bb1fc5e017..9a2a31e011ce 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
 
 static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
 {
-        twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
-        twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
-
         if (gpio_is_valid(dssdev->reset_gpio))
                 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
         return 0;
@@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
 static int devkit8000_twl_gpio_setup(struct device *dev,
                 unsigned gpio, unsigned ngpio)
 {
+        int ret;
+
         omap_mux_init_gpio(29, OMAP_PIN_INPUT);
         /* gpio + 0 is "mmc0_cd" (input/IRQ) */
         mmc[0].gpio_cd = gpio + 0;
@@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
         /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
         gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
 
-        /* gpio + 1 is "LCD_PWREN" (out, active high) */
-        devkit8000_lcd_device.reset_gpio = gpio + 1;
-        gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN");
-        /* Disable until needed */
-        gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0);
+        /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
+        devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
+        ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
+                        GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
+        if (ret < 0) {
+                devkit8000_lcd_device.reset_gpio = -EINVAL;
+                printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
+        }
 
         /* gpio + 7 is "DVI_PD" (out, active low) */
         devkit8000_dvi_device.reset_gpio = gpio + 7;
-        gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown");
-        /* Disable until needed */
-        gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0);
+        ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
+                        GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
+        if (ret < 0) {
+                devkit8000_dvi_device.reset_gpio = -EINVAL;
+                printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
+        }
 
         return 0;
 }
@@ -275,8 +280,7 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
         .irq_end        = TWL4030_GPIO_IRQ_END,
         .use_leds       = true,
-        .pullups        = BIT(1),
-        .pulldowns      = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
+        .pulldowns      = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
                                 | BIT(15) | BIT(16) | BIT(17),
         .setup          = devkit8000_twl_gpio_setup,
 };
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e001a048dc0c..e944025d5ef8 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
         platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
         omap_serial_init();
         omap4_twl6030_hsmmc_init(mmc);
-        /* OMAP4 Panda uses internal transceiver so register nop transceiver */
-        usb_nop_xceiv_register();
         omap4_ehci_init();
         usb_musb_init(&musb_board_data);
 }
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index cb77be7ac44f..39a71bb8a308 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
 static struct regulator_init_data rm680_vemmc = {
         .constraints =  {
                 .name                   = "rm680_vemmc",
-                .min_uV                 = 2900000,
-                .max_uV                 = 2900000,
-                .apply_uV               = 1,
                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
                                         | REGULATOR_MODE_STANDBY,
                 .valid_ops_mask         = REGULATOR_CHANGE_STATUS
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index e8cb32fd7f13..de9ec8ddd2ae 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -34,7 +34,6 @@
 #include "cm2_44xx.h"
 #include "cm-regbits-44xx.h"
 #include "prm44xx.h"
-#include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 #include "control.h"
 #include "scrm44xx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index e20b98636ab4..58e42f76603f 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -423,6 +423,12 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
+                       clkdm1->name, clkdm2->name, __func__);
+                return -EINVAL;
+        }
+
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
@@ -458,6 +464,12 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
+                       clkdm1->name, clkdm2->name, __func__);
+                return -EINVAL;
+        }
+
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
@@ -500,6 +512,12 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
+                       clkdm1->name, clkdm2->name, __func__);
+                return -EINVAL;
+        }
+
         cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
         if (IS_ERR(cd)) {
                 pr_debug("clockdomain: hardware cannot set/clear wake up of "
@@ -527,6 +545,12 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
         struct clkdm_dep *cd;
         u32 mask = 0;
 
+        if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+                pr_err("clockdomain: %s: %s: not yet implemented\n",
+                       clkdm->name, __func__);
+                return -EINVAL;
+        }
+
         if (!clkdm)
                 return -EINVAL;
 
@@ -830,8 +854,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
          * dependency code and data for OMAP4.
          */
         if (cpu_is_omap44xx()) {
-                WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency "
-                          "support is not yet implemented\n");
+                pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
         } else {
                 if (atomic_read(&clkdm->usecount) > 0)
                         _clkdm_add_autodeps(clkdm);
@@ -872,8 +895,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
          * dependency code and data for OMAP4.
          */
         if (cpu_is_omap44xx()) {
-                WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency "
-                          "support is not yet implemented\n");
+                pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
         } else {
                 if (atomic_read(&clkdm->usecount) > 0)
                         _clkdm_del_autodeps(clkdm);
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 51920fc7fc52..10622c914abc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -30,8 +30,6 @@
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 
-#include "cm1_44xx.h"
-#include "cm2_44xx.h"
 #include "cm-regbits-44xx.h"
 #include "prm44xx.h"
 #include "prcm44xx.h"
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index d2f15f5cfd36..34922b2d2e3f 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -264,7 +264,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
         if (IS_ERR(od)) {
                 pr_err("%s: Cant build omap_device for %s:%s.\n",
                         __func__, name, oh->name);
-                return IS_ERR(od);
+                return PTR_ERR(od);
         }
 
         mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index befa321c4c13..81985a665cb3 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -38,20 +38,6 @@
  */
 
 #ifdef MULTI_OMAP2
-
-/*
- * We use __glue to avoid errors with multiple definitions of
- * .globl omap_irq_base as it's included from entry-armv.S but not
- * from entry-common.S.
- */
-#ifdef __glue
-                .pushsection .data
-                .globl  omap_irq_base
-omap_irq_base:
-                .word   0
-                .popsection
-#endif
-
                 /*
                  * Configure the interrupt base on the first interrupt.
                  * See also omap_irq_base_init for setting omap_irq_base.
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e66687b0b9de..c2032041d26f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -314,14 +314,13 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
 
+void __iomem *omap_irq_base;
+
 /*
  * Initialize asm_irq_base for entry-macro.S
  */
 static inline void omap_irq_base_init(void)
 {
-        extern void __iomem *omap_irq_base;
-
-#ifdef MULTI_OMAP2
         if (cpu_is_omap24xx())
                 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
         else if (cpu_is_omap34xx())
@@ -330,7 +329,6 @@ static inline void omap_irq_base_init(void)
                 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
         else
                 pr_err("Could not initialize omap_irq_base\n");
-#endif
 }
 
 void __init omap2_init_common_infrastructure(void)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index df8d2f2872c6..98148b6c36e9 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -160,7 +160,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
         struct omap_mux *mux = NULL;
         struct omap_mux_entry *e;
         const char *mode_name;
-        int found = 0, found_mode, mode0_len = 0;
+        int found = 0, found_mode = 0, mode0_len = 0;
         struct list_head *muxmodes = &partition->muxmodes;
 
         mode_name = strchr(muxname, '.');
@@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
         if (!partition->base) {
                 pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
                         __func__, partition->phys);
+                kfree(partition);
                 return -ENODEV;
         }
 
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 9e5dc8ed51e9..97feb3ab6a69 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -134,7 +134,7 @@ static void omap2_enter_full_retention(void)
 
         /* Block console output in case it is on one of the OMAP UARTs */
         if (!is_suspending())
-                if (try_acquire_console_sem())
+                if (!console_trylock())
                         goto no_sleep;
 
         omap_uart_prepare_idle(0);
@@ -151,7 +151,7 @@ static void omap2_enter_full_retention(void)
         omap_uart_resume_idle(0);
 
         if (!is_suspending())
-                release_console_sem();
+                console_unlock();
 
 no_sleep:
         if (omap2_pm_debug) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8cbbeade4b8a..2f864e4b085d 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
  * once during boot sequence, but this works as we are not using secure
  * services.
  */
-static void omap3_save_secure_ram_context(u32 target_mpu_state)
+static void omap3_save_secure_ram_context(void)
 {
         u32 ret;
+        int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
 
         if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
                 /*
@@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
                 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
                 ret = _omap_save_secure_sram((u32 *)
                                 __pa(omap3_secure_ram_storage));
-                pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state);
+                pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
                 /* Following is for error tracking, it should not happen */
                 if (ret) {
                         printk(KERN_ERR "save_secure_sram() returns %08x\n",
@@ -398,7 +399,7 @@ void omap_sram_idle(void)
         if (!is_suspending())
                 if (per_next_state < PWRDM_POWER_ON ||
                     core_next_state < PWRDM_POWER_ON)
-                        if (try_acquire_console_sem())
+                        if (!console_trylock())
                                 goto console_still_active;
 
         /* PER */
@@ -481,7 +482,7 @@ void omap_sram_idle(void)
         }
 
         if (!is_suspending())
-                release_console_sem();
+                console_unlock();
 
 console_still_active:
         /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
                 local_fiq_disable();
 
                 omap_dma_global_context_save();
-                omap3_save_secure_ram_context(PWRDM_POWER_ON);
+                omap3_save_secure_ram_context();
                 omap_dma_global_context_restore();
 
                 local_irq_enable();
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index d5233890370c..cf600e22bf8e 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -19,7 +19,6 @@
 #include <plat/prcm.h>
 
 #include "powerdomain.h"
-#include "prm-regbits-34xx.h"
 #include "prm.h"
 #include "prm-regbits-24xx.h"
 #include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 302da7403a10..32e91a9c8b6b 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
 
         oh->dev_attr = uart;
 
-        acquire_console_sem(); /* in case the earlycon is on the UART */
+        console_lock(); /* in case the earlycon is on the UART */
 
         /*
          * Because of early UART probing, UART did not get idled
@@ -838,7 +838,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
         omap_uart_block_sleep(uart);
         uart->timeout = DEFAULT_TIMEOUT;
 
-        release_console_sem();
+        console_unlock();
 
         if ((cpu_is_omap34xx() && uart->padconf) ||
             (uart->wk_en && uart->wk_mask)) {
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 77ecebf3fae2..c37e823266d3 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -780,8 +780,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
         struct omap_sr *sr_info = (struct omap_sr *) data;
 
         if (!sr_info) {
-                pr_warning("%s: omap_sr struct for sr_%s not found\n",
-                        __func__, sr_info->voltdm->name);
+                pr_warning("%s: omap_sr struct not found\n", __func__);
                 return -EINVAL;
         }
 
@@ -795,8 +794,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
         struct omap_sr *sr_info = (struct omap_sr *) data;
 
         if (!sr_info) {
-                pr_warning("%s: omap_sr struct for sr_%s not found\n",
-                        __func__, sr_info->voltdm->name);
+                pr_warning("%s: omap_sr struct not found\n", __func__);
                 return -EINVAL;
         }
 
@@ -834,7 +832,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
 
         if (!pdata) {
                 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
-                return -EINVAL;
+                ret = -EINVAL;
+                goto err_free_devinfo;
         }
 
         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -966,7 +965,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
         }
 
         sr_info = _sr_lookup(pdata->voltdm);
-        if (!sr_info) {
+        if (IS_ERR(sr_info)) {
                 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
                         __func__);
                 return -EINVAL;
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e786bec7..7b7c2683ae7b 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
 
 #include "timer-gp.h"
 
+#include <plat/common.h>
+
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID          12
 
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
  * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in see plat-omap/common.c. 
+ * sync counter.  See clocksource setup in plat-omap/counter_32k.c
  */
 
-static inline void __init omap2_gp_clocksource_init(void) {}
+static void __init omap2_gp_clocksource_init(void)
+{
+        omap_init_clocksource_32k();
+}
+
 #else
 /*
  * clocksource
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index ed6079c94c57..12be525b8df4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
         strcat(name, vdd->voltdm.name);
 
         vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
+        kfree(name);
         if (IS_ERR(vdd->debug_dir)) {
                 pr_warning("%s: Unable to create debugfs directory for"
                         " vdd_%s\n", __func__, vdd->voltdm.name);
diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 6b2c800a1133..28f667e52ef9 100644
--- a/arch/arm/mach-pxa/colibri-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -50,7 +50,7 @@ static void __init colibri_mmc_init(void)
                         GPIO0_COLIBRI_PXA270_SD_DETECT;
         if (machine_is_colibri300())    /* PXA300 Colibri */
                 colibri_mci_platform_data.gpio_card_detect =
-                        GPIO39_COLIBRI_PXA300_SD_DETECT;
+                        GPIO13_COLIBRI_PXA300_SD_DETECT;
         else                            /* PXA320 Colibri */
                 colibri_mci_platform_data.gpio_card_detect =
                         GPIO28_COLIBRI_PXA320_SD_DETECT;
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index fddb16d07eb0..66dd81cbc8a0 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -41,7 +41,7 @@ static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
         GPIO4_MMC1_DAT1,
         GPIO5_MMC1_DAT2,
         GPIO6_MMC1_DAT3,
-        GPIO39_GPIO,    /* SD detect */
+        GPIO13_GPIO,    /* GPIO13_COLIBRI_PXA300_SD_DETECT */
 
         /* UHC */
         GPIO0_2_USBH_PEN,
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 388a96f1ef93..cb4236e98a0f 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -60,7 +60,7 @@ static inline void colibri_pxa3xx_init_nand(void) {}
 #define GPIO113_COLIBRI_PXA270_TS_IRQ   113
 
 /* GPIO definitions for Colibri PXA300/310 */
-#define GPIO39_COLIBRI_PXA300_SD_DETECT 39
+#define GPIO13_COLIBRI_PXA300_SD_DETECT 13
 
 /* GPIO definitions for Colibri PXA320 */
 #define GPIO28_COLIBRI_PXA320_SD_DETECT 28
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 405b92a29793..35572c427fa8 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -323,7 +323,7 @@ static struct platform_pwm_backlight_data palm27x_backlight_data = {
         .pwm_id         = 0,
         .max_brightness = 0xfe,
         .dft_brightness = 0x7e,
-        .pwm_period_ns  = 3500,
+        .pwm_period_ns  = 3500 * 1024,
         .init           = palm27x_backlight_init,
         .notify         = palm27x_backlight_notify,
         .exit           = palm27x_backlight_exit,
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 978e1b289544..1807c9abdde0 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -33,7 +33,7 @@ int pxa_pm_enter(suspend_state_t state)
 #endif
 
         /* skip registers saving for standby */
-        if (state != PM_SUSPEND_STANDBY) {
+        if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->save) {
                 pxa_cpu_pm_fns->save(sleep_save);
                 /* before sleeping, calculate and save a checksum */
                 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
@@ -44,7 +44,7 @@ int pxa_pm_enter(suspend_state_t state)
         pxa_cpu_pm_fns->enter(state);
         cpu_init();
 
-        if (state != PM_SUSPEND_STANDBY) {
+        if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->restore) {
                 /* after sleeping, validate the checksum */
                 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
                         checksum += sleep_save[i];
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index b4575ae9648e..7ca138a943a9 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -2,52 +2,56 @@ menu "RealView platform type"
         depends on ARCH_REALVIEW
 
 config MACH_REALVIEW_EB
-        bool "Support RealView/EB platform"
+        bool "Support RealView(R) Emulation Baseboard"
         select ARM_GIC
         help
-          Include support for the ARM(R) RealView Emulation Baseboard platform.
+          Include support for the ARM(R) RealView(R) Emulation Baseboard
+          platform.
 
 config REALVIEW_EB_A9MP
-        bool "Support Multicore Cortex-A9"
+        bool "Support Multicore Cortex-A9 Tile"
         depends on MACH_REALVIEW_EB
         select CPU_V7
         help
-          Enable support for the Cortex-A9MPCore tile on the Realview platform.
+          Enable support for the Cortex-A9MPCore tile fitted to the
+          Realview(R) Emulation Baseboard platform.
 
 config REALVIEW_EB_ARM11MP
-        bool "Support ARM11MPCore tile"
+        bool "Support ARM11MPCore Tile"
         depends on MACH_REALVIEW_EB
         select CPU_V6
         select ARCH_HAS_BARRIERS if SMP
         help
-          Enable support for the ARM11MPCore tile on the Realview platform.
+          Enable support for the ARM11MPCore tile fitted to the Realview(R)
+          Emulation Baseboard platform.
 
 config REALVIEW_EB_ARM11MP_REVB
-        bool "Support ARM11MPCore RevB tile"
+        bool "Support ARM11MPCore RevB Tile"
         depends on REALVIEW_EB_ARM11MP
         help
-          Enable support for the ARM11MPCore RevB tile on the Realview
-          platform. Since there are device address differences, a
-          kernel built with this option enabled is not compatible with
-          other revisions of the ARM11MPCore tile.
+          Enable support for the ARM11MPCore Revision B tile on the
+          Realview(R) Emulation Baseboard platform. Since there are device
+          address differences, a kernel built with this option enabled is
+          not compatible with other revisions of the ARM11MPCore tile.
 
 config MACH_REALVIEW_PB11MP
-        bool "Support RealView/PB11MPCore platform"
+        bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
         select CPU_V6
         select ARM_GIC
         select HAVE_PATA_PLATFORM
         select ARCH_HAS_BARRIERS if SMP
         help
-          Include support for the ARM(R) RealView MPCore Platform Baseboard.
-          PB11MPCore is a platform with an on-board ARM11MPCore and has
+          Include support for the ARM(R) RealView(R) Platform Baseboard for
+          the ARM11MPCore.  This platform has an on-board ARM11MPCore and has
           support for PCI-E and Compact Flash.
 
 config MACH_REALVIEW_PB1176
-        bool "Support RealView/PB1176 platform"
+        bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
         select CPU_V6
         select ARM_GIC
         help
-          Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
+          Include support for the ARM(R) RealView(R) Platform Baseboard for
+          ARM1176JZF-S.
 
 config REALVIEW_PB1176_SECURE_FLASH
         bool "Allow access to the secure flash memory block"
@@ -59,23 +63,24 @@ config REALVIEW_PB1176_SECURE_FLASH
           block (64MB @ 0x3c000000) is required.
 
 config MACH_REALVIEW_PBA8
-        bool "Support RealView/PB-A8 platform"
+        bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
         select CPU_V7
         select ARM_GIC
         select HAVE_PATA_PLATFORM
         help
-          Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
-          PB-A8 is a platform with an on-board Cortex-A8 and has support for
-          PCI-E and Compact Flash.
+          Include support for the ARM(R) RealView Platform Baseboard for
+          Cortex(tm)-A8.  This platform has an on-board Cortex-A8 and has
+          support for PCI-E and Compact Flash.
 
 config MACH_REALVIEW_PBX
-        bool "Support RealView/PBX platform"
+        bool "Support RealView(R) Platform Baseboard Explore"
         select ARM_GIC
         select HAVE_PATA_PLATFORM
         select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
         select ZONE_DMA if SPARSEMEM
         help
-          Include support for the ARM(R) RealView PBX platform.
+          Include support for the ARM(R) RealView(R) Platform Baseboard
+          Explore.
 
 config REALVIEW_HIGH_PHYS_OFFSET
         bool "High physical base address for the RealView platform"
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index a22bf67f2f78..6959d13d908a 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -41,7 +41,7 @@ volatile int __cpuinitdata pen_release = -1;
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void write_pen_release(int val)
+static void __cpuinit write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
index 09c4c21b70cc..b2a9acc5185f 100644
--- a/arch/arm/mach-s5pv310/Kconfig
+++ b/arch/arm/mach-s5pv310/Kconfig
@@ -122,6 +122,7 @@ config MACH_SMDKV310
         select S3C_DEV_HSMMC2
         select S3C_DEV_HSMMC3
         select S5PV310_DEV_PD
+        select S5PV310_DEV_SYSMMU
         select S5PV310_SETUP_I2C1
         select S5PV310_SETUP_SDHCI
         help
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 74d400625a23..3060f78e12ab 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -124,8 +124,6 @@
 #define S5PV310_PA_SYSMMU_TV            0x12E20000
 #define S5PV310_PA_SYSMMU_MFC_L         0x13620000
 #define S5PV310_PA_SYSMMU_MFC_R         0x13630000
-#define S5PV310_SYSMMU_TOTAL_IPNUM      16
-#define S5P_SYSMMU_TOTAL_IPNUM          S5PV310_SYSMMU_TOTAL_IPNUM
 
 /* compatibiltiy defines. */
 #define S3C_PA_UART                     S5PV310_PA_UART
diff --git a/arch/arm/mach-s5pv310/include/mach/sysmmu.h b/arch/arm/mach-s5pv310/include/mach/sysmmu.h
index 662fe85ff4d5..598fc5c9211b 100644
--- a/arch/arm/mach-s5pv310/include/mach/sysmmu.h
+++ b/arch/arm/mach-s5pv310/include/mach/sysmmu.h
@@ -13,6 +13,9 @@
 #ifndef __ASM_ARM_ARCH_SYSMMU_H
 #define __ASM_ARM_ARCH_SYSMMU_H __FILE__
 
+#define S5PV310_SYSMMU_TOTAL_IPNUM      16
+#define S5P_SYSMMU_TOTAL_IPNUM          S5PV310_SYSMMU_TOTAL_IPNUM
+
 enum s5pv310_sysmmu_ips {
         SYSMMU_MDMA,
         SYSMMU_SSS,
@@ -32,7 +35,7 @@ enum s5pv310_sysmmu_ips {
         SYSMMU_MFC_R,
 };
 
-static char *sysmmu_ips_name[S5P_SYSMMU_TOTAL_IPNUM] = {
+static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = {
         "SYSMMU_MDMA"   ,
         "SYSMMU_SSS"    ,
         "SYSMMU_FIMC0"  ,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index d43c5ef58eb6..bd3e1bfdd6aa 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -241,6 +241,9 @@ static struct locomo_platform_data locomo_info = {
 struct platform_device collie_locomo_device = {
         .name           = "locomo",
         .id             = 0,
+        .dev            = {
+                .platform_data  = &locomo_info,
+        },
         .num_resources  = ARRAY_SIZE(locomo_resources),
         .resource       = locomo_resources,
 };
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 4d1b4c5c9389..0c8f6cf3e948 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -60,6 +60,8 @@ endchoice
 
 config MACH_AG5EVM
         bool "AG5EVM board"
+        select ARCH_REQUIRE_GPIOLIB
+        select SH_LCD_MIPI_DSI
         depends on ARCH_SH73A0
 
 config MACH_MACKEREL
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index c18a740a4159..2123b96b5638 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -34,9 +34,10 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
-
+#include <linux/sh_clk.h>
+#include <video/sh_mobile_lcdc.h>
+#include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
-
 #include <mach/hardware.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
@@ -183,11 +184,165 @@ static struct platform_device mmc_device = {
         .resource       = sh_mmcif_resources,
 };
 
+/* IrDA */
+static struct resource irda_resources[] = {
+        [0] = {
+                .start  = 0xE6D00000,
+                .end    = 0xE6D01FD4 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gic_spi(95),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device irda_device = {
+        .name           = "sh_irda",
+        .id             = 0,
+        .resource       = irda_resources,
+        .num_resources  = ARRAY_SIZE(irda_resources),
+};
+
+static unsigned char lcd_backlight_seq[3][2] = {
+        { 0x04, 0x07 },
+        { 0x23, 0x80 },
+        { 0x03, 0x01 },
+};
+
+static void lcd_backlight_on(void)
+{
+        struct i2c_adapter *a;
+        struct i2c_msg msg;
+        int k;
+
+        a = i2c_get_adapter(1);
+        for (k = 0; a && k < 3; k++) {
+                msg.addr = 0x6d;
+                msg.buf = &lcd_backlight_seq[k][0];
+                msg.len = 2;
+                msg.flags = 0;
+                if (i2c_transfer(a, &msg, 1) != 1)
+                        break;
+        }
+}
+
+static void lcd_backlight_reset(void)
+{
+        gpio_set_value(GPIO_PORT235, 0);
+        mdelay(24);
+        gpio_set_value(GPIO_PORT235, 1);
+}
+
+static void lcd_on(void *board_data, struct fb_info *info)
+{
+        lcd_backlight_on();
+}
+
+static void lcd_off(void *board_data)
+{
+        lcd_backlight_reset();
+}
+
+/* LCDC0 */
+static const struct fb_videomode lcdc0_modes[] = {
+        {
+                .name           = "R63302(QHD)",
+                .xres           = 544,
+                .yres           = 961,
+                .left_margin    = 72,
+                .right_margin   = 600,
+                .hsync_len      = 16,
+                .upper_margin   = 8,
+                .lower_margin   = 8,
+                .vsync_len      = 2,
+                .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+        },
+};
+
+static struct sh_mobile_lcdc_info lcdc0_info = {
+        .clock_source = LCDC_CLK_PERIPHERAL,
+        .ch[0] = {
+                .chan = LCDC_CHAN_MAINLCD,
+                .interface_type = RGB24,
+                .clock_divider = 1,
+                .flags = LCDC_FLAGS_DWPOL,
+                .lcd_size_cfg.width = 44,
+                .lcd_size_cfg.height = 79,
+                .bpp = 16,
+                .lcd_cfg = lcdc0_modes,
+                .num_cfg = ARRAY_SIZE(lcdc0_modes),
+                .board_cfg = {
+                        .display_on = lcd_on,
+                        .display_off = lcd_off,
+                },
+        }
+};
+
+static struct resource lcdc0_resources[] = {
+        [0] = {
+                .name   = "LCDC0",
+                .start  = 0xfe940000, /* P4-only space */
+                .end    = 0xfe943fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0x580),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device lcdc0_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(lcdc0_resources),
+        .resource       = lcdc0_resources,
+        .id             = 0,
+        .dev    = {
+                .platform_data  = &lcdc0_info,
+                .coherent_dma_mask = ~0,
+        },
+};
+
+/* MIPI-DSI */
+static struct resource mipidsi0_resources[] = {
+        [0] = {
+                .start  = 0xfeab0000,
+                .end    = 0xfeab3fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 0xfeab4000,
+                .end    = 0xfeab7fff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct sh_mipi_dsi_info mipidsi0_info = {
+        .data_format    = MIPI_RGB888,
+        .lcd_chan       = &lcdc0_info.ch[0],
+        .vsynw_offset   = 20,
+        .clksrc         = 1,
+        .flags          = SH_MIPI_DSI_HSABM,
+};
+
+static struct platform_device mipidsi0_device = {
+        .name           = "sh-mipi-dsi",
+        .num_resources  = ARRAY_SIZE(mipidsi0_resources),
+        .resource       = mipidsi0_resources,
+        .id             = 0,
+        .dev    = {
+                .platform_data  = &mipidsi0_info,
+        },
+};
+
 static struct platform_device *ag5evm_devices[] __initdata = {
         &eth_device,
         &keysc_device,
         &fsi_device,
         &mmc_device,
+        &irda_device,
+        &lcdc0_device,
+        &mipidsi0_device,
 };
 
 static struct map_desc ag5evm_io_desc[] __initdata = {
@@ -224,6 +379,8 @@ void __init ag5evm_init_irq(void)
         __raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
 }
 
+#define DSI0PHYCR       0xe615006c
+
 static void __init ag5evm_init(void)
 {
         sh73a0_pinmux_init();
@@ -287,6 +444,25 @@ static void __init ag5evm_init(void)
         gpio_request(GPIO_FN_FSIAISLD, NULL);
         gpio_request(GPIO_FN_FSIAOSLD, NULL);
 
+        /* IrDA */
+        gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
+        gpio_request(GPIO_FN_PORT242_IRDA_IN,  NULL);
+        gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
+
+        /* LCD panel */
+        gpio_request(GPIO_PORT217, NULL); /* RESET */
+        gpio_direction_output(GPIO_PORT217, 0);
+        mdelay(1);
+        gpio_set_value(GPIO_PORT217, 1);
+
+        /* LCD backlight controller */
+        gpio_request(GPIO_PORT235, NULL); /* RESET */
+        gpio_direction_output(GPIO_PORT235, 0);
+        lcd_backlight_reset();
+
+        /* MIPI-DSI clock setup */
+        __raw_writel(0x2a809010, DSI0PHYCR);
+
 #ifdef CONFIG_CACHE_L2X0
         /* Shared attribute override enable, 64K*8way */
         l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 686b304a7708..ef4613b993a2 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -347,7 +347,6 @@ static void __init g3evm_init(void)
         gpio_request(GPIO_FN_IRDA_OUT, NULL);
         gpio_request(GPIO_FN_IRDA_IN, NULL);
         gpio_request(GPIO_FN_IRDA_FIRSEL, NULL);
-        set_irq_type(evt2irq(0x480), IRQ_TYPE_LEVEL_LOW);
 
         sh7367_add_standard_devices();
 
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7b15d21f0f68..fb4213a4e15a 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -169,9 +169,8 @@
  *      SW1     |       SW33
  *              | bit1 | bit2 | bit3 | bit4
  * -------------+------+------+------+-------
- * MMC0   OFF   |  OFF |  ON  |  ON  |  X
- * MMC1   ON    |  OFF |  ON  |  X   | ON
- * SDHI1  OFF   |  ON  |   X  |  OFF | ON
+ * MMC0   OFF   |  OFF |   X  |  ON  |  X       (Use MMCIF)
+ * SDHI1  OFF   |  ON  |   X  |  OFF |  X       (Use MFD_SH_MOBILE_SDHI)
  *
  */
 
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 9aa8d68d1a9c..e9731b5a73ed 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -234,7 +234,9 @@ static int pllc2_set_rate(struct clk *clk, unsigned long rate)
 
         value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
 
-        __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
+        __raw_writel(value | ((idx + 19) << 24), PLLC2CR);
+
+        clk->rate = clk->freq_table[idx].frequency;
 
         return 0;
 }
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 720a71433be6..ddd4a1b775f0 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -118,8 +118,16 @@ static unsigned long pll_recalc(struct clk *clk)
 {
         unsigned long mult = 1;
 
-        if (__raw_readl(PLLECR) & (1 << clk->enable_bit))
+        if (__raw_readl(PLLECR) & (1 << clk->enable_bit)) {
                 mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1);
+                /* handle CFG bit for PLL1 and PLL2 */
+                switch (clk->enable_bit) {
+                case 1:
+                case 2:
+                        if (__raw_readl(clk->enable_reg) & (1 << 20))
+                                mult *= 2;
+                }
+        }
 
         return clk->parent->rate * mult;
 }
@@ -212,7 +220,7 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
 static struct clk div4_clks[DIV4_NR] = {
         [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT),
         [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT),
-        [DIV4_M3] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
+        [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT),
         [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
         [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0),
         [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0),
@@ -255,10 +263,10 @@ static struct clk div6_clks[DIV6_NR] = {
 };
 
 enum { MSTP001,
-        MSTP125, MSTP116,
+        MSTP125, MSTP118, MSTP116, MSTP100,
         MSTP219,
         MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-        MSTP331, MSTP329, MSTP323, MSTP312,
+        MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
         MSTP411, MSTP410, MSTP403,
         MSTP_NR };
 
@@ -268,7 +276,9 @@ enum { MSTP001,
 static struct clk mstp_clks[MSTP_NR] = {
         [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
         [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
+        [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
         [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
+        [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
         [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
         [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
         [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
@@ -279,6 +289,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
         [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
         [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+        [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
         [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
         [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
         [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
@@ -288,16 +299,25 @@ static struct clk mstp_clks[MSTP_NR] = {
 
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
 
 static struct clk_lookup lookups[] = {
         /* main clocks */
         CLKDEV_CON_ID("r_clk", &r_clk),
 
+        /* DIV6 clocks */
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+        CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+        CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
+        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
         CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
+        CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
         CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
@@ -308,6 +328,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
         CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
         CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
         CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index f78a1ead71a5..ca5f9d17b39a 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -365,6 +365,7 @@ static struct intc_desc intca_desc __initdata = {
 
 enum {
         UNUSED_INTCS = 0,
+        ENABLED_INTCS,
 
         INTCS,
 
@@ -413,7 +414,7 @@ enum {
         CMT4,
         DSITX1_DSITX1_0,
         DSITX1_DSITX1_1,
-        /* MFIS2 */
+        MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */
         CPORTS2R,
         /* CEC */
         JPU6E,
@@ -477,7 +478,7 @@ static struct intc_vect intcs_vectors[] = {
         INTCS_VECT(CMT4, 0x1980),
         INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
         INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
-        /* MFIS2 */
+        INTCS_VECT(MFIS2_INTCS, 0x1a00),
         INTCS_VECT(CPORTS2R, 0x1a20),
         /* CEC */
         INTCS_VECT(JPU6E, 0x1a80),
@@ -543,7 +544,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
           { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
             CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
         { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
-          { 0, CPORTS2R, 0, 0,
+          { MFIS2_INTCS, CPORTS2R, 0, 0,
             JPU6E, 0, 0, 0 } },
         { 0xffd20104, 0, 16, /* INTAMASK */
           { 0, 0, 0, 0, 0, 0, 0, 0,
@@ -571,7 +572,8 @@ static struct intc_prio_reg intcs_prio_registers[] = {
         { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
         { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
                                                DSITX1_DSITX1_1, 0 } },
-        { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } },
+        { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R,
+                                               0, 0 } },
         { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
 };
 
@@ -590,6 +592,7 @@ static struct resource intcs_resources[] __initdata = {
 
 static struct intc_desc intcs_desc __initdata = {
         .name = "sh7372-intcs",
+        .force_enable = ENABLED_INTCS,
         .resource = intcs_resources,
         .num_resources = ARRAY_SIZE(intcs_resources),
         .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 322d8d57cbcf..5d0e1503ece6 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -252,10 +252,11 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
 
 void __init sh73a0_init_irq(void)
 {
-        void __iomem *gic_base = __io(0xf0001000);
+        void __iomem *gic_dist_base = __io(0xf0001000);
+        void __iomem *gic_cpu_base = __io(0xf0000100);
         void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
 
-        gic_init(0, 29, gic_base, gic_base);
+        gic_init(0, 29, gic_dist_base, gic_cpu_base);
 
         register_intc_controller(&intcs_desc);
 
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index bd066206e110..ad8048801513 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -207,9 +207,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
         spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
 
         if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-                __set_irq_handler_unlocked(irq, handle_level_irq);
+                __set_irq_handler_unlocked(d->irq, handle_level_irq);
         else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-                __set_irq_handler_unlocked(irq, handle_edge_irq);
+                __set_irq_handler_unlocked(d->irq, handle_edge_irq);
 
         return 0;
 }
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h
index d7723955dac7..a217f68ba57c 100644
--- a/arch/arm/mach-tegra/include/mach/clk.h
+++ b/arch/arm/mach-tegra/include/mach/clk.h
@@ -20,6 +20,8 @@
 #ifndef __MACH_CLK_H
 #define __MACH_CLK_H
 
+struct clk;
+
 void tegra_periph_reset_deassert(struct clk *c);
 void tegra_periph_reset_assert(struct clk *c);
 
diff --git a/arch/arm/mach-tegra/include/mach/clkdev.h b/arch/arm/mach-tegra/include/mach/clkdev.h
index 412f5c63e65a..66cd3f4fc896 100644
--- a/arch/arm/mach-tegra/include/mach/clkdev.h
+++ b/arch/arm/mach-tegra/include/mach/clkdev.h
@@ -20,6 +20,8 @@
 #ifndef __MACH_CLKDEV_H
 #define __MACH_CLKDEV_H
 
+struct clk;
+
 static inline int __clk_get(struct clk *clk)
 {
         return 1;
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h
new file mode 100644
index 000000000000..66ad2760c621
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/kbc.h
@@ -0,0 +1,61 @@
+/*
+ * Platform definitions for tegra-kbc keyboard input driver
+ *
+ * Copyright (c) 2010-2011, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef ASMARM_ARCH_TEGRA_KBC_H
+#define ASMARM_ARCH_TEGRA_KBC_H
+
+#include <linux/types.h>
+#include <linux/input/matrix_keypad.h>
+
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+#define KBC_MAX_GPIO    24
+#define KBC_MAX_KPENT   8
+#else
+#define KBC_MAX_GPIO    20
+#define KBC_MAX_KPENT   7
+#endif
+
+#define KBC_MAX_ROW     16
+#define KBC_MAX_COL     8
+#define KBC_MAX_KEY     (KBC_MAX_ROW * KBC_MAX_COL)
+
+struct tegra_kbc_pin_cfg {
+        bool is_row;
+        unsigned char num;
+};
+
+struct tegra_kbc_wake_key {
+        u8 row:4;
+        u8 col:4;
+};
+
+struct tegra_kbc_platform_data {
+        unsigned int debounce_cnt;
+        unsigned int repeat_cnt;
+
+        unsigned int wake_cnt; /* 0:wake on any key >1:wake on wake_cfg */
+        const struct tegra_kbc_wake_key *wake_cfg;
+
+        struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
+        const struct matrix_keymap_data *keymap_data;
+
+        bool wakeup;
+};
+#endif
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index de7dfad6f769..17c74d21077c 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -46,24 +46,24 @@
 #define ICTLR_COP_IER_CLR       0x38
 #define ICTLR_COP_IEP_CLASS     0x3c
 
-static void (*gic_mask_irq)(struct irq_data *d);
-static void (*gic_unmask_irq)(struct irq_data *d);
+static void (*tegra_gic_mask_irq)(struct irq_data *d);
+static void (*tegra_gic_unmask_irq)(struct irq_data *d);
 
-#define irq_to_ictlr(irq) (((irq)-32) >> 5)
+#define irq_to_ictlr(irq) (((irq) - 32) >> 5)
 static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE);
-#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100)
+#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr) * 0x100)
 
 static void tegra_mask(struct irq_data *d)
 {
         void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
-        gic_mask_irq(d);
-        writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR);
+        tegra_gic_mask_irq(d);
+        writel(1 << (d->irq & 31), addr+ICTLR_CPU_IER_CLR);
 }
 
 static void tegra_unmask(struct irq_data *d)
 {
         void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
-        gic_unmask_irq(d);
+        tegra_gic_unmask_irq(d);
         writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET);
 }
 
@@ -98,8 +98,8 @@ void __init tegra_init_irq(void)
                  IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
 
         gic = get_irq_chip(29);
-        gic_unmask_irq = gic->irq_unmask;
-        gic_mask_irq = gic->irq_mask;
+        tegra_gic_unmask_irq = gic->irq_unmask;
+        tegra_gic_mask_irq = gic->irq_mask;
         tegra_irq.irq_ack = gic->irq_ack;
 #ifdef CONFIG_SMP
         tegra_irq.irq_set_affinity = gic->irq_set_affinity;
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 3f7b5e9d83c5..9cdec5aa04a0 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -2,17 +2,19 @@ menu "Versatile platform type"
         depends on ARCH_VERSATILE
 
 config ARCH_VERSATILE_PB
-        bool "Support Versatile/PB platform"
+        bool "Support Versatile Platform Baseboard for ARM926EJ-S"
         select CPU_ARM926T
         select MIGHT_HAVE_PCI
         default y
         help
-          Include support for the ARM(R) Versatile/PB platform.
+          Include support for the ARM(R) Versatile Platform Baseboard
+          for the ARM926EJ-S.
 
 config MACH_VERSATILE_AB
-        bool "Support Versatile/AB platform"
+        bool "Support Versatile Application Baseboard for ARM926EJ-S"
         select CPU_ARM926T
         help
-          Include support for the ARM(R) Versatile/AP platform.
+          Include support for the ARM(R) Versatile Application Baseboard
+          for the ARM926EJ-S.
 
 endmenu
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index b1687b6abe63..634bf1d3a311 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -39,7 +39,7 @@ volatile int __cpuinitdata pen_release = -1;
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void write_pen_release(int val)
+static void __cpuinit write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index a9ed3428a2fa..1edae65a0e72 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -19,6 +19,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
+#include <asm/hardware/sp810.h>
 
 #include <mach/motherboard.h>
 
@@ -50,8 +51,16 @@ void __init v2m_map_io(struct map_desc *tile, size_t num)
 
 static void __init v2m_timer_init(void)
 {
+        u32 scctrl;
+
         versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
 
+        /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
+        scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
+        scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
+        scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
+        writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
+
         writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
         writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
 
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9d30c6f804b9..e4509bae8fc4 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -405,7 +405,7 @@ config CPU_V6
 config CPU_32v6K
         bool "Support ARM V6K processor extensions" if !SMP
         depends on CPU_V6 || CPU_V7
-        default y if SMP && !(ARCH_MX3 || ARCH_OMAP2)
+        default y if SMP
         help
           Say Y here if your ARMv6 processor supports the 'K' extension.
           This enables the kernel to use some instructions not present
@@ -416,7 +416,7 @@ config CPU_32v6K
 # ARMv7
 config CPU_V7
         bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
-        select CPU_32v6K if !ARCH_OMAP2
+        select CPU_32v6K
         select CPU_32v7
         select CPU_ABRT_EV7
         select CPU_PABRT_V7
@@ -644,7 +644,7 @@ config ARM_THUMBEE
 
 config SWP_EMULATE
         bool "Emulate SWP/SWPB instructions"
-        depends on CPU_V7 && !CPU_V6
+        depends on !CPU_USE_DOMAINS && CPU_V7 && !CPU_V6
         select HAVE_PROC_CPU if PROC_FS
         default y if SMP
         help
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 5164069ced42..cddd684364da 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -297,6 +297,12 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
         memblock_reserve(__pa(_stext), _end - _stext);
 #endif
 #ifdef CONFIG_BLK_DEV_INITRD
+        if (phys_initrd_size &&
+            memblock_is_region_reserved(phys_initrd_start, phys_initrd_size)) {
+                pr_err("INITRD: 0x%08lx+0x%08lx overlaps in-use memory region - disabling initrd\n",
+                       phys_initrd_start, phys_initrd_size);
+                phys_initrd_start = phys_initrd_size = 0;
+        }
         if (phys_initrd_size) {
                 memblock_reserve(phys_initrd_start, phys_initrd_size);
 
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 8aa974491dfc..c074e66ad224 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -10,8 +10,6 @@
  */
 
 #include <linux/cpumask.h>
-#include <linux/err.h>
-#include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/mutex.h>
 #include <linux/oprofile.h>
@@ -46,6 +44,7 @@ char *op_name_from_perf_id(void)
                 return NULL;
         }
 }
+#endif
 
 static int report_trace(struct stackframe *frame, void *d)
 {
@@ -85,7 +84,7 @@ static struct frame_tail* user_backtrace(struct frame_tail *tail)
 
         /* frame pointers should strictly progress back up the stack
          * (towards higher addresses) */
-        if (tail >= buftail[0].fp)
+        if (tail + 1 >= buftail[0].fp)
                 return NULL;
 
         return buftail[0].fp-1;
@@ -111,6 +110,7 @@ static void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
 
 int __init oprofile_arch_init(struct oprofile_operations *ops)
 {
+        /* provide backtrace support also in timer mode: */
         ops->backtrace          = arm_backtrace;
 
         return oprofile_perf_init(ops);
@@ -120,11 +120,3 @@ void __exit oprofile_arch_exit(void)
 {
         oprofile_perf_exit();
 }
-#else
-int __init oprofile_arch_init(struct oprofile_operations *ops)
-{
-        pr_info("oprofile: hardware counters not available\n");
-        return -ENODEV;
-}
-void __exit oprofile_arch_exit(void) {}
-#endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 3a70ebf0477f..ff469c4f1d76 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
         case MACH_TYPE_MX35_3DS:
         case MACH_TYPE_PCM043:
         case MACH_TYPE_LILLY1131:
+        case MACH_TYPE_VPR200:
                 uart_base = MX3X_UART1_BASE_ADDR;
                 break;
         case MACH_TYPE_MAGX_ZN5:
@@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
                 break;
         case MACH_TYPE_MX51_BABBAGE:
         case MACH_TYPE_EUKREA_CPUIMX51SD:
+        case MACH_TYPE_MX51_3DS:
                 uart_base = MX51_UART1_BASE_ADDR;
                 break;
         case MACH_TYPE_MX50_RDP:
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 18fe3cb195dc..b6333ae3f92a 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -144,12 +144,9 @@ config OMAP_IOMMU_DEBUG
 config OMAP_IOMMU_IVA2
         bool
 
-choice
-        prompt "System timer"
-        default OMAP_32K_TIMER if !ARCH_OMAP15XX
-
 config OMAP_MPU_TIMER
         bool "Use mpu timer"
+        depends on ARCH_OMAP1
         help
           Select this option if you want to use the OMAP mpu timer. This
           timer provides more intra-tick resolution than the 32KHz timer,
@@ -158,6 +155,7 @@ config OMAP_MPU_TIMER
 config OMAP_32K_TIMER
         bool "Use 32KHz timer"
         depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
+        default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
         help
           Select this option if you want to enable the OMAP 32KHz timer.
           This timer saves power compared to the OMAP_MPU_TIMER, and has
@@ -165,8 +163,6 @@ config OMAP_32K_TIMER
           intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
           currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
 
-endchoice
-
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
         bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
         depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea4644021fb9..862dda95d61d 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -36,8 +36,6 @@
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
 
-#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
-
 #include <linux/clocksource.h>
 
 /*
@@ -122,12 +120,24 @@ static DEFINE_CLOCK_DATA(cd);
 #define SC_MULT         4000000000u
 #define SC_SHIFT        17
 
-unsigned long long notrace sched_clock(void)
+static inline unsigned long long notrace _omap_32k_sched_clock(void)
 {
         u32 cyc = clocksource_32k.read(&clocksource_32k);
         return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
 }
 
+#ifndef CONFIG_OMAP_MPU_TIMER
+unsigned long long notrace sched_clock(void)
+{
+        return _omap_32k_sched_clock();
+}
+#else
+unsigned long long notrace omap_32k_sched_clock(void)
+{
+        return _omap_32k_sched_clock();
+}
+#endif
+
 static void notrace omap_update_sched_clock(void)
 {
         u32 cyc = clocksource_32k.read(&clocksource_32k);
@@ -160,7 +170,7 @@ void read_persistent_clock(struct timespec *ts)
         *ts = *tsp;
 }
 
-static int __init omap_init_clocksource_32k(void)
+int __init omap_init_clocksource_32k(void)
 {
         static char err[] __initdata = KERN_ERR
                         "%s: can't register clocksource!\n";
@@ -195,7 +205,3 @@ static int __init omap_init_clocksource_32k(void)
         }
         return 0;
 }
-arch_initcall(omap_init_clocksource_32k);
-
-#endif  /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
-
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c4b2b478b1a5..85363084cc1a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -53,7 +53,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
 #endif
 
 #define OMAP_DMA_ACTIVE                 0x01
-#define OMAP2_DMA_CSR_CLEAR_MASK        0xffe
+#define OMAP2_DMA_CSR_CLEAR_MASK        0xffffffff
 
 #define OMAP_FUNC_MUX_ARM_BASE          (0xfffe1000 + 0xec)
 
@@ -1873,7 +1873,7 @@ static int omap2_dma_handle_ch(int ch)
                 printk(KERN_INFO "DMA misaligned error with device %d\n",
                        dma_chan[ch].dev_id);
 
-        p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, ch);
+        p->dma_write(status, CSR, ch);
         p->dma_write(1 << ch, IRQSTATUS_L0, ch);
         /* read back the register to flush the write */
         p->dma_read(IRQSTATUS_L0, ch);
@@ -1893,10 +1893,9 @@ static int omap2_dma_handle_ch(int ch)
                         OMAP_DMA_CHAIN_INCQHEAD(chain_id);
 
                 status = p->dma_read(CSR, ch);
+                p->dma_write(status, CSR, ch);
         }
 
-        p->dma_write(status, CSR, ch);
-
         if (likely(dma_chan[ch].callback != NULL))
                 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088ec74af..29b2afb4288f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,9 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern bool omap_32k_timer_init(void);
+extern int __init omap_init_clocksource_32k(void);
+extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index b77e018d36c1..a9aa5ad3f4eb 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -139,10 +139,11 @@ static const unsigned long mfpr_edge[] = {
 #define mfp_configured(p)       ((p)->config != -1)
 
 /*
- * perform a read-back of any MFPR register to make sure the
+ * perform a read-back of any valid MFPR register to make sure the
  * previous writings are finished
  */
-#define mfpr_sync()     (void)__raw_readl(mfpr_mmio_base + 0)
+static unsigned long mfpr_off_readback;
+#define mfpr_sync()     (void)__raw_readl(mfpr_mmio_base + mfpr_off_readback)
 
 static inline void __mfp_config_run(struct mfp_pin *p)
 {
@@ -248,6 +249,9 @@ void __init mfp_init_addr(struct mfp_addr_map *map)
 
         spin_lock_irqsave(&mfp_spin_lock, flags);
 
+        /* mfp offset for readback */
+        mfpr_off_readback = map[0].offset;
+
         for (p = map; p->start != MFP_PIN_INVALID; p++) {
                 offset = p->offset;
                 i = p->start;
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index deb39951a22e..557f8c507f6d 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -37,6 +37,14 @@ config S5P_GPIO_INT
         help
           Common code for the GPIO interrupts (other than external interrupts.)
 
+comment "System MMU"
+
+config S5P_SYSTEM_MMU
+        bool "S5P SYSTEM MMU"
+        depends on ARCH_S5PV310
+        help
+          Say Y here if you want to enable System MMU
+
 config S5P_DEV_FIMC0
         bool
         help
@@ -66,19 +74,3 @@ config S5P_DEV_CSIS1
         bool
         help
           Compile in platform device definitions for MIPI-CSIS channel 1
-
-menuconfig S5P_SYSMMU
-        bool "SYSMMU support"
-        depends on ARCH_S5PV310
-        help
-          This is a System MMU driver for Samsung ARM based Soc.
-
-if S5P_SYSMMU
-
-config S5P_SYSMMU_DEBUG
-        bool "Enables debug messages"
-        depends on S5P_SYSMMU
-        help
-          This enables SYSMMU driver debug massages.
-
-endif
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 92efe1adcfd6..4bd5cf908977 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -19,6 +19,7 @@ obj-y				+= clock.o
 obj-y                           += irq.o
 obj-$(CONFIG_S5P_EXT_INT)       += irq-eint.o
 obj-$(CONFIG_S5P_GPIO_INT)      += irq-gpioint.o
+obj-$(CONFIG_S5P_SYSTEM_MMU)    += sysmmu.o
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_PM)                += irq-pm.o
 
@@ -30,4 +31,3 @@ obj-$(CONFIG_S5P_DEV_FIMC2)	+= dev-fimc2.o
 obj-$(CONFIG_S5P_DEV_ONENAND)   += dev-onenand.o
 obj-$(CONFIG_S5P_DEV_CSIS0)     += dev-csis0.o
 obj-$(CONFIG_S5P_DEV_CSIS1)     += dev-csis1.o
-obj-$(CONFIG_S5P_SYSMMU)        += sysmmu.o
diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-s5p/include/plat/sysmmu.h
deleted file mode 100644
index db298fc5438a..000000000000
--- a/arch/arm/plat-s5p/include/plat/sysmmu.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Samsung sysmmu driver
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_PLAT_S5P_SYSMMU_H
-#define __ASM_PLAT_S5P_SYSMMU_H __FILE__
-
-/* debug macro */
-#ifdef CONFIG_S5P_SYSMMU_DEBUG
-#define sysmmu_debug(fmt, arg...)       printk(KERN_INFO "[%s] " fmt, __func__, ## arg)
-#else
-#define sysmmu_debug(fmt, arg...)       do { } while (0)
-#endif
-
-#endif /* __ASM_PLAT_S5P_SYSMMU_H */
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index d804914dc2e2..ffe8a48bc3c1 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -16,8 +16,6 @@
 #include <mach/regs-sysmmu.h>
 #include <mach/sysmmu.h>
 
-#include <plat/sysmmu.h>
-
 struct sysmmu_controller s5p_sysmmu_cntlrs[S5P_SYSMMU_TOTAL_IPNUM];
 
 void s5p_sysmmu_register(struct sysmmu_controller *sysmmuconp)
@@ -123,7 +121,7 @@ static int s5p_sysmmu_set_tablebase(sysmmu_ips ips)
                 : "=r" (pg) : : "cc");          \
                 pg &= ~0x3fff;
 
-        sysmmu_debug("CP15 TTBR0 : 0x%x\n", pg);
+        printk(KERN_INFO "%s: CP15 TTBR0 : 0x%x\n", __func__, pg);
 
         /* Set sysmmu page table base address */
         __raw_writel(pg, sysmmuconp->regs + S5P_PT_BASE_ADDR);
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index d9025e377675..30518cc9a67c 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -17,6 +17,8 @@
 
 #include <linux/irq.h>
 
+struct sys_device;
+
 #ifdef CONFIG_PM
 
 extern __init int s3c_pm_init(void);
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 2fea897ebeb1..9d6feaabbe7d 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Sun Dec 12 23:24:27 2010
+# Last update: Mon Feb 7 08:59:27 2011
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -2240,7 +2240,7 @@ arm_ultimator2		MACH_ARM_ULTIMATOR2	ARM_ULTIMATOR2		2250
 vs_v210                 MACH_VS_V210            VS_V210                 2252
 vs_v212                 MACH_VS_V212            VS_V212                 2253
 hmt                     MACH_HMT                HMT                     2254
-suen3                   MACH_SUEN3              SUEN3                   2255
+km_kirkwood             MACH_KM_KIRKWOOD        KM_KIRKWOOD             2255
 vesper                  MACH_VESPER             VESPER                  2256
 str9                    MACH_STR9               STR9                    2257
 omap3_wl_ff             MACH_OMAP3_WL_FF        OMAP3_WL_FF             2258
@@ -2987,7 +2987,7 @@ pxwnas_500_1000		MACH_PXWNAS_500_1000	PXWNAS_500_1000		3001
 ea20                    MACH_EA20               EA20                    3002
 awm2                    MACH_AWM2               AWM2                    3003
 ti8148evm               MACH_TI8148EVM          TI8148EVM               3004
-tegra_seaboard          MACH_TEGRA_SEABOARD     TEGRA_SEABOARD          3005
+seaboard                MACH_SEABOARD           SEABOARD                3005
 linkstation_chlv2       MACH_LINKSTATION_CHLV2  LINKSTATION_CHLV2       3006
 tera_pro2_rack          MACH_TERA_PRO2_RACK     TERA_PRO2_RACK          3007
 rubys                   MACH_RUBYS              RUBYS                   3008
@@ -3190,7 +3190,7 @@ synergy			MACH_SYNERGY		SYNERGY			3205
 ics_if_voip             MACH_ICS_IF_VOIP        ICS_IF_VOIP             3206
 wlf_cragg_6410          MACH_WLF_CRAGG_6410     WLF_CRAGG_6410          3207
 punica                  MACH_PUNICA             PUNICA                  3208
-sbc_nt250               MACH_SBC_NT250          SBC_NT250               3209
+trimslice               MACH_TRIMSLICE          TRIMSLICE               3209
 mx27_wmultra            MACH_MX27_WMULTRA       MX27_WMULTRA            3210
 mackerel                MACH_MACKEREL           MACKEREL                3211
 fa9x27                  MACH_FA9X27             FA9X27                  3213
@@ -3219,3 +3219,100 @@ pivicc			MACH_PIVICC		PIVICC			3235
 pcm048                  MACH_PCM048             PCM048                  3236
 dds                     MACH_DDS                DDS                     3237
 chalten_xa1             MACH_CHALTEN_XA1        CHALTEN_XA1             3238
+ts48xx                  MACH_TS48XX             TS48XX                  3239
+tonga2_tfttimer         MACH_TONGA2_TFTTIMER    TONGA2_TFTTIMER         3240
+whistler                MACH_WHISTLER           WHISTLER                3241
+asl_phoenix             MACH_ASL_PHOENIX        ASL_PHOENIX             3242
+at91sam9263otlite       MACH_AT91SAM9263OTLITE  AT91SAM9263OTLITE       3243
+ddplug                  MACH_DDPLUG             DDPLUG                  3244
+d2plug                  MACH_D2PLUG             D2PLUG                  3245
+kzm9d                   MACH_KZM9D              KZM9D                   3246
+verdi_lte               MACH_VERDI_LTE          VERDI_LTE               3247
+nanozoom                MACH_NANOZOOM           NANOZOOM                3248
+dm3730_som_lv           MACH_DM3730_SOM_LV      DM3730_SOM_LV           3249
+dm3730_torpedo          MACH_DM3730_TORPEDO     DM3730_TORPEDO          3250
+anchovy                 MACH_ANCHOVY            ANCHOVY                 3251
+re2rev20                MACH_RE2REV20           RE2REV20                3253
+re2rev21                MACH_RE2REV21           RE2REV21                3254
+cns21xx                 MACH_CNS21XX            CNS21XX                 3255
+rider                   MACH_RIDER              RIDER                   3257
+nsk330                  MACH_NSK330             NSK330                  3258
+cns2133evb              MACH_CNS2133EVB         CNS2133EVB              3259
+z3_816x_mod             MACH_Z3_816X_MOD        Z3_816X_MOD             3260
+z3_814x_mod             MACH_Z3_814X_MOD        Z3_814X_MOD             3261
+beect                   MACH_BEECT              BEECT                   3262
+dma_thunderbug          MACH_DMA_THUNDERBUG     DMA_THUNDERBUG          3263
+omn_at91sam9g20         MACH_OMN_AT91SAM9G20    OMN_AT91SAM9G20         3264
+mx25_e2s_uc             MACH_MX25_E2S_UC        MX25_E2S_UC             3265
+mione                   MACH_MIONE              MIONE                   3266
+top9000_tcu             MACH_TOP9000_TCU        TOP9000_TCU             3267
+top9000_bsl             MACH_TOP9000_BSL        TOP9000_BSL             3268
+kingdom                 MACH_KINGDOM            KINGDOM                 3269
+armadillo460            MACH_ARMADILLO460       ARMADILLO460            3270
+lq2                     MACH_LQ2                LQ2                     3271
+sweda_tms2              MACH_SWEDA_TMS2         SWEDA_TMS2              3272
+mx53_loco               MACH_MX53_LOCO          MX53_LOCO               3273
+acer_a8                 MACH_ACER_A8            ACER_A8                 3275
+acer_gauguin            MACH_ACER_GAUGUIN       ACER_GAUGUIN            3276
+guppy                   MACH_GUPPY              GUPPY                   3277
+mx61_ard                MACH_MX61_ARD           MX61_ARD                3278
+tx53                    MACH_TX53               TX53                    3279
+omapl138_case_a3        MACH_OMAPL138_CASE_A3   OMAPL138_CASE_A3        3280
+uemd                    MACH_UEMD               UEMD                    3281
+ccwmx51mut              MACH_CCWMX51MUT         CCWMX51MUT              3282
+rockhopper              MACH_ROCKHOPPER         ROCKHOPPER              3283
+nookcolor               MACH_NOOKCOLOR          NOOKCOLOR               3284
+hkdkc100                MACH_HKDKC100           HKDKC100                3285
+ts42xx                  MACH_TS42XX             TS42XX                  3286
+aebl                    MACH_AEBL               AEBL                    3287
+wario                   MACH_WARIO              WARIO                   3288
+gfs_spm                 MACH_GFS_SPM            GFS_SPM                 3289
+cm_t3730                MACH_CM_T3730           CM_T3730                3290
+isc3                    MACH_ISC3               ISC3                    3291
+rascal                  MACH_RASCAL             RASCAL                  3292
+hrefv60                 MACH_HREFV60            HREFV60                 3293
+tpt_2_0                 MACH_TPT_2_0            TPT_2_0                 3294
+pyramid_td              MACH_PYRAMID_TD         PYRAMID_TD              3295
+splendor                MACH_SPLENDOR           SPLENDOR                3296
+guf_planet              MACH_GUF_PLANET         GUF_PLANET              3297
+msm8x60_qt              MACH_MSM8X60_QT         MSM8X60_QT              3298
+htc_hd_mini             MACH_HTC_HD_MINI        HTC_HD_MINI             3299
+athene                  MACH_ATHENE             ATHENE                  3300
+deep_r_ek_1             MACH_DEEP_R_EK_1        DEEP_R_EK_1             3301
+vivow_ct                MACH_VIVOW_CT           VIVOW_CT                3302
+nery_1000               MACH_NERY_1000          NERY_1000               3303
+rfl109145_ssrv          MACH_RFL109145_SSRV     RFL109145_SSRV          3304
+nmh                     MACH_NMH                NMH                     3305
+wn802t                  MACH_WN802T             WN802T                  3306
+dragonet                MACH_DRAGONET           DRAGONET                3307
+geneva_b                MACH_GENEVA_B           GENEVA_B                3308
+at91sam9263desk16l      MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L      3309
+bcmhana_sv              MACH_BCMHANA_SV         BCMHANA_SV              3310
+bcmhana_tablet          MACH_BCMHANA_TABLET     BCMHANA_TABLET          3311
+koi                     MACH_KOI                KOI                     3312
+ts4800                  MACH_TS4800             TS4800                  3313
+tqma9263                MACH_TQMA9263           TQMA9263                3314
+holiday                 MACH_HOLIDAY            HOLIDAY                 3315
+dma_6410                MACH_DMA6410            DMA6410                 3316
+pcats_overlay           MACH_PCATS_OVERLAY      PCATS_OVERLAY           3317
+hwgw6410                MACH_HWGW6410           HWGW6410                3318
+shenzhou                MACH_SHENZHOU           SHENZHOU                3319
+cwme9210                MACH_CWME9210           CWME9210                3320
+cwme9210js              MACH_CWME9210JS         CWME9210JS              3321
+pgs_v1                  MACH_PGS_SITARA         PGS_SITARA              3322
+colibri_tegra2          MACH_COLIBRI_TEGRA2     COLIBRI_TEGRA2          3323
+w21                     MACH_W21                W21                     3324
+polysat1                MACH_POLYSAT1           POLYSAT1                3325
+dataway                 MACH_DATAWAY            DATAWAY                 3326
+cobral138               MACH_COBRAL138          COBRAL138               3327
+roverpcs8               MACH_ROVERPCS8          ROVERPCS8               3328
+marvelc                 MACH_MARVELC            MARVELC                 3329
+navefihid               MACH_NAVEFIHID          NAVEFIHID               3330
+dm365_cv100             MACH_DM365_CV100        DM365_CV100             3331
+able                    MACH_ABLE               ABLE                    3332
+legacy                  MACH_LEGACY             LEGACY                  3333
+icong                   MACH_ICONG              ICONG                   3334
+rover_g8                MACH_ROVER_G8           ROVER_G8                3335
+t5388p                  MACH_T5388P             T5388P                  3336
+dingo                   MACH_DINGO              DINGO                   3337
+goflexhome              MACH_GOFLEXHOME         GOFLEXHOME              3338