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authorJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:15 -0400
committerJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:59 -0400
commit07f9479a40cc778bc1462ada11f95b01360ae4ff (patch)
tree0676cf38df3844004bb3ebfd99dfa67a4a8998f5 /arch/arm
parent9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf (diff)
parentcd2e49e90f1cae7726c9a2c54488d881d7f1cd1c (diff)
Merge branch 'master' into for-next
Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig18
-rw-r--r--arch/arm/Kconfig-nommu2
-rw-r--r--arch/arm/Kconfig.debug11
-rw-r--r--arch/arm/boot/compressed/Makefile4
-rw-r--r--arch/arm/boot/compressed/head.S10
-rw-r--r--arch/arm/boot/compressed/misc.c12
-rw-r--r--arch/arm/boot/compressed/mmcif-sh7372.c13
-rw-r--r--arch/arm/common/Makefile1
-rw-r--r--arch/arm/common/gic.c15
-rw-r--r--arch/arm/common/it8152.c4
-rw-r--r--arch/arm/common/locomo.c17
-rw-r--r--arch/arm/common/pl330.c4
-rw-r--r--arch/arm/common/sa1111.c24
-rw-r--r--arch/arm/common/vic.c6
-rw-r--r--arch/arm/configs/omap2plus_defconfig11
-rw-r--r--arch/arm/configs/tegra_defconfig29
-rw-r--r--arch/arm/include/asm/bitops.h86
-rw-r--r--arch/arm/include/asm/cputype.h1
-rw-r--r--arch/arm/include/asm/fpstate.h2
-rw-r--r--arch/arm/include/asm/glue-cache.h2
-rw-r--r--arch/arm/include/asm/glue.h4
-rw-r--r--arch/arm/include/asm/hardware/pl080.h2
-rw-r--r--arch/arm/include/asm/hw_irq.h8
-rw-r--r--arch/arm/include/asm/localtimer.h8
-rw-r--r--arch/arm/include/asm/mach/udc_pxa2xx.h2
-rw-r--r--arch/arm/include/asm/outercache.h14
-rw-r--r--arch/arm/include/asm/pgtable.h3
-rw-r--r--arch/arm/include/asm/setup.h2
-rw-r--r--arch/arm/include/asm/system.h2
-rw-r--r--arch/arm/include/asm/thread_notify.h1
-rw-r--r--arch/arm/include/asm/types.h9
-rw-r--r--arch/arm/include/asm/ucontext.h2
-rw-r--r--arch/arm/include/asm/unistd.h4
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/bios32.c25
-rw-r--r--arch/arm/kernel/calls.S4
-rw-r--r--arch/arm/kernel/crash_dump.c3
-rw-r--r--arch/arm/kernel/debug.S19
-rw-r--r--arch/arm/kernel/ecard.c6
-rw-r--r--arch/arm/kernel/elf.c17
-rw-r--r--arch/arm/kernel/etm.c4
-rw-r--r--arch/arm/kernel/hw_breakpoint.c21
-rw-r--r--arch/arm/kernel/irq.c70
-rw-r--r--arch/arm/kernel/kprobes-decode.c10
-rw-r--r--arch/arm/kernel/perf_event.c33
-rw-r--r--arch/arm/kernel/perf_event_v6.c2
-rw-r--r--arch/arm/kernel/perf_event_v7.c26
-rw-r--r--arch/arm/kernel/perf_event_xscale.c4
-rw-r--r--arch/arm/kernel/process.c2
-rw-r--r--arch/arm/kernel/setup.c31
-rw-r--r--arch/arm/kernel/sleep.S14
-rw-r--r--arch/arm/kernel/smp.c7
-rw-r--r--arch/arm/kernel/swp_emulate.c2
-rw-r--r--arch/arm/kernel/traps.c9
-rw-r--r--arch/arm/lib/uaccess_with_memcpy.c7
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c6
-rw-r--r--arch/arm/mach-at91/board-carmeva.c2
-rw-r--r--arch/arm/mach-at91/gpio.c43
-rw-r--r--arch/arm/mach-at91/include/mach/at572d940hf.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_mci.h2
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-at91/irq.c3
-rw-r--r--arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c6
-rw-r--r--arch/arm/mach-bcmring/dma.c4
-rw-r--r--arch/arm/mach-bcmring/include/csp/dmacHw.h6
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h4
-rw-r--r--arch/arm/mach-bcmring/include/mach/reg_umi.h2
-rw-r--r--arch/arm/mach-bcmring/irq.c10
-rw-r--r--arch/arm/mach-clps711x/irq.c8
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c2
-rw-r--r--arch/arm/mach-davinci/cp_intc.c4
-rw-r--r--arch/arm/mach-davinci/cpufreq.c2
-rw-r--r--arch/arm/mach-davinci/da850.c2
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm644x.c2
-rw-r--r--arch/arm/mach-davinci/gpio.c49
-rw-r--r--arch/arm/mach-davinci/include/mach/cputype.h2
-rw-r--r--arch/arm/mach-davinci/irq.c6
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h2
-rw-r--r--arch/arm/mach-dove/irq.c20
-rw-r--r--arch/arm/mach-dove/mpp.c3
-rw-r--r--arch/arm/mach-ebsa110/core.c4
-rw-r--r--arch/arm/mach-ep93xx/gpio.c100
-rw-r--r--arch/arm/mach-exynos4/Kconfig7
-rw-r--r--arch/arm/mach-exynos4/Makefile2
-rw-r--r--arch/arm/mach-exynos4/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-exynos4/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-exynos4/irq-combiner.c13
-rw-r--r--arch/arm/mach-exynos4/irq-eint.c15
-rw-r--r--arch/arm/mach-exynos4/localtimer.c3
-rw-r--r--arch/arm/mach-exynos4/mach-smdkc210.c2
-rw-r--r--arch/arm/mach-exynos4/mach-smdkv310.c2
-rw-r--r--arch/arm/mach-exynos4/mct.c2
-rw-r--r--arch/arm/mach-exynos4/setup-sdhci-gpio.c4
-rw-r--r--arch/arm/mach-exynos4/setup-sdhci.c2
-rw-r--r--arch/arm/mach-footbridge/common.c3
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c2
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c10
-rw-r--r--arch/arm/mach-gemini/gpio.c14
-rw-r--r--arch/arm/mach-gemini/irq.c6
-rw-r--r--arch/arm/mach-h720x/common.c22
-rw-r--r--arch/arm/mach-h720x/cpu-h7202.c17
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c8
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c11
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c10
-rw-r--r--arch/arm/mach-integrator/Kconfig1
-rw-r--r--arch/arm/mach-integrator/common.h1
-rw-r--r--arch/arm/mach-integrator/core.c7
-rw-r--r--arch/arm/mach-integrator/impd1.c5
-rw-r--r--arch/arm/mach-integrator/include/mach/cm.h4
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c44
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c239
-rw-r--r--arch/arm/mach-iop13xx/irq.c10
-rw-r--r--arch/arm/mach-iop13xx/msi.c6
-rw-r--r--arch/arm/mach-iop13xx/pci.c4
-rw-r--r--arch/arm/mach-iop32x/irq.c3
-rw-r--r--arch/arm/mach-iop33x/irq.c5
-rw-r--r--arch/arm/mach-ixp2000/core.c20
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c6
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c6
-rw-r--r--arch/arm/mach-ixp23xx/core.c14
-rw-r--r--arch/arm/mach-ixp23xx/ixdp2351.c12
-rw-r--r--arch/arm/mach-ixp23xx/roadrunner.c4
-rw-r--r--arch/arm/mach-ixp4xx/avila-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/common.c4
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-pci.c12
-rw-r--r--arch/arm/mach-ixp4xx/fsg-pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c12
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c10
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-pci.c4
-rw-r--r--arch/arm/mach-kirkwood/irq.c15
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c7
-rw-r--r--arch/arm/mach-kirkwood/tsx1x-common.c2
-rw-r--r--arch/arm/mach-ks8695/gpio.c2
-rw-r--r--arch/arm/mach-ks8695/irq.c18
-rw-r--r--arch/arm/mach-lpc32xx/irq.c10
-rw-r--r--arch/arm/mach-lpc32xx/pm.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h9
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h2
-rw-r--r--arch/arm/mach-mmp/irq-mmp2.c18
-rw-r--r--arch/arm/mach-mmp/irq-pxa168.c3
-rw-r--r--arch/arm/mach-mmp/time.c2
-rw-r--r--arch/arm/mach-msm/acpuclock-arm11.c2
-rw-r--r--arch/arm/mach-msm/board-msm8960.c2
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c2
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c5
-rw-r--r--arch/arm/mach-msm/board-trout-gpio.c10
-rw-r--r--arch/arm/mach-msm/board-trout-mmc.c2
-rw-r--r--arch/arm/mach-msm/gpio-v2.c49
-rw-r--r--arch/arm/mach-msm/gpio.c18
-rw-r--r--arch/arm/mach-msm/irq-vic.c7
-rw-r--r--arch/arm/mach-msm/irq.c7
-rw-r--r--arch/arm/mach-msm/scm.c2
-rw-r--r--arch/arm/mach-msm/sirc.c11
-rw-r--r--arch/arm/mach-msm/timer.c5
-rw-r--r--arch/arm/mach-mv78xx0/irq.c8
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c14
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c10
-rw-r--r--arch/arm/mach-mx3/mach-mx31ads.c7
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c6
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c12
-rw-r--r--arch/arm/mach-mx5/Kconfig1
-rw-r--r--arch/arm/mach-mx5/Makefile2
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c5
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c9
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c25
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c9
-rw-r--r--arch/arm/mach-mx5/cpu.c59
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c2
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c4
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c7
-rw-r--r--arch/arm/mach-mx5/system.c84
-rw-r--r--arch/arm/mach-mxs/Kconfig2
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c15
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c18
-rw-r--r--arch/arm/mach-mxs/devices-mx23.h4
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h4
-rw-r--r--arch/arm/mach-mxs/devices/Kconfig3
-rw-r--r--arch/arm/mach-mxs/devices/Makefile1
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-mmc.c73
-rw-r--r--arch/arm/mach-mxs/gpio.c10
-rw-r--r--arch/arm/mach-mxs/icoll.c3
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h13
-rw-r--r--arch/arm/mach-mxs/include/mach/dma.h26
-rw-r--r--arch/arm/mach-mxs/include/mach/mmc.h18
-rw-r--r--arch/arm/mach-mxs/mach-mx23evk.c44
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c89
-rw-r--r--arch/arm/mach-mxs/module-tx28.c41
-rw-r--r--arch/arm/mach-mxs/module-tx28.h1
-rw-r--r--arch/arm/mach-netx/generic.c6
-rw-r--r--arch/arm/mach-ns9xxx/board-a9m9750dev.c8
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/board.h2
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/module.h5
-rw-r--r--arch/arm/mach-ns9xxx/irq.c59
-rw-r--r--arch/arm/mach-nuc93x/irq.c4
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S2
-rw-r--r--arch/arm/mach-omap1/board-osk.c6
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c8
-rw-r--r--arch/arm/mach-omap1/board-sx1.c2
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c8
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/fpga.c10
-rw-r--r--arch/arm/mach-omap1/include/mach/ams-delta-fiq.h2
-rw-r--r--arch/arm/mach-omap1/irq.c4
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c82
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c2
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c12
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c12
-rw-r--r--arch/arm/mach-omap2/board-igep0030.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c12
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c12
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c12
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c238
-rw-r--r--arch/arm/mach-omap2/board-overo.c357
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c12
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c8
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c8
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c14
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c15
-rw-r--r--arch/arm/mach-omap2/clockdomain.c2
-rw-r--r--arch/arm/mach-omap2/clockdomain.h2
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c4
-rw-r--r--arch/arm/mach-omap2/devices.c70
-rw-r--r--arch/arm/mach-omap2/devices.h19
-rw-r--r--arch/arm/mach-omap2/display.c80
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/gpio.c2
-rw-r--r--arch/arm/mach-omap2/gpmc.c13
-rw-r--r--arch/arm/mach-omap2/hsmmc.c2
-rw-r--r--arch/arm/mach-omap2/irq.c3
-rw-r--r--arch/arm/mach-omap2/mcbsp.c2
-rw-r--r--arch/arm/mach-omap2/mux.c2
-rw-r--r--arch/arm/mach-omap2/mux2430.h2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c13
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c14
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c23
-rw-r--r--arch/arm/mach-omap2/omap_l3_smx.c11
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c4
-rw-r--r--arch/arm/mach-omap2/omap_twl.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.h2
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/smartreflex.c2
-rw-r--r--arch/arm/mach-omap2/timer-mpu.c7
-rw-r--r--arch/arm/mach-omap2/voltage.c4
-rw-r--r--arch/arm/mach-orion5x/addr-map.c2
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c4
-rw-r--r--arch/arm/mach-orion5x/irq.c8
-rw-r--r--arch/arm/mach-orion5x/net2big-setup.c2
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c4
-rw-r--r--arch/arm/mach-orion5x/terastation_pro2-setup.c2
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c6
-rw-r--r--arch/arm/mach-orion5x/ts409-setup.c2
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c18
-rw-r--r--arch/arm/mach-pnx4008/irq.c10
-rw-r--r--arch/arm/mach-pxa/am200epd.c8
-rw-r--r--arch/arm/mach-pxa/am300epd.c13
-rw-r--r--arch/arm/mach-pxa/balloon3.c13
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c5
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c2
-rw-r--r--arch/arm/mach-pxa/cm-x300.c6
-rw-r--r--arch/arm/mach-pxa/colibri-evalboard.c3
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270-income.c5
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/corgi.c3
-rw-r--r--arch/arm/mach-pxa/csb726.c2
-rw-r--r--arch/arm/mach-pxa/devices.c11
-rw-r--r--arch/arm/mach-pxa/em-x270.c4
-rw-r--r--arch/arm/mach-pxa/eseries.c36
-rw-r--r--arch/arm/mach-pxa/ezx.c14
-rw-r--r--arch/arm/mach-pxa/gumstix.c13
-rw-r--r--arch/arm/mach-pxa/hx4700.c2
-rw-r--r--arch/arm/mach-pxa/idp.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h17
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/z2.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/zeus.h2
-rw-r--r--arch/arm/mach-pxa/irq.c12
-rw-r--r--arch/arm/mach-pxa/littleton.c4
-rw-r--r--arch/arm/mach-pxa/lpd270.c10
-rw-r--r--arch/arm/mach-pxa/lubbock.c10
-rw-r--r--arch/arm/mach-pxa/magician.c4
-rw-r--r--arch/arm/mach-pxa/mainstone.c12
-rw-r--r--arch/arm/mach-pxa/mioa701.c6
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c2
-rw-r--r--arch/arm/mach-pxa/palm27x.c8
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/palmte2.c33
-rw-r--r--arch/arm/mach-pxa/palmz72.c127
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c12
-rw-r--r--arch/arm/mach-pxa/poodle.c5
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c5
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c6
-rw-r--r--arch/arm/mach-pxa/pxa95x.c2
-rw-r--r--arch/arm/mach-pxa/raumfeld.c4
-rw-r--r--arch/arm/mach-pxa/saar.c4
-rw-r--r--arch/arm/mach-pxa/saarb.c3
-rw-r--r--arch/arm/mach-pxa/spitz.c5
-rw-r--r--arch/arm/mach-pxa/stargate2.c2
-rw-r--r--arch/arm/mach-pxa/tavorevb.c2
-rw-r--r--arch/arm/mach-pxa/tavorevb3.c3
-rw-r--r--arch/arm/mach-pxa/time.c5
-rw-r--r--arch/arm/mach-pxa/tosa.c15
-rw-r--r--arch/arm/mach-pxa/trizeps4.c6
-rw-r--r--arch/arm/mach-pxa/viper.c12
-rw-r--r--arch/arm/mach-pxa/vpac270.c5
-rw-r--r--arch/arm/mach-pxa/xcep.c3
-rw-r--r--arch/arm/mach-pxa/z2.c80
-rw-r--r--arch/arm/mach-pxa/zeus.c24
-rw-r--r--arch/arm/mach-pxa/zylonite.c4
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c2
-rw-r--r--arch/arm/mach-realview/Makefile3
-rw-r--r--arch/arm/mach-realview/core.c233
-rw-r--r--arch/arm/mach-realview/core.h2
-rw-r--r--arch/arm/mach-realview/headsmp.S40
-rw-r--r--arch/arm/mach-realview/localtimer.c26
-rw-r--r--arch/arm/mach-realview/platsmp.c98
-rw-r--r--arch/arm/mach-realview/realview_eb.c24
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c22
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c22
-rw-r--r--arch/arm/mach-realview/realview_pba8.c22
-rw-r--r--arch/arm/mach-realview/realview_pbx.c22
-rw-r--r--arch/arm/mach-rpc/irq.c14
-rw-r--r--arch/arm/mach-s3c2410/bast-irq.c6
-rw-r--r--arch/arm/mach-s3c2410/h1940-bluetooth.c11
-rw-r--r--arch/arm/mach-s3c2410/include/mach/dma.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/h1940.h3
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-mem.h2
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c303
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c2
-rw-r--r--arch/arm/mach-s3c2412/irq.c12
-rw-r--r--arch/arm/mach-s3c2416/irq.c8
-rw-r--r--arch/arm/mach-s3c2440/irq.c10
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c5
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c9
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c74
-rw-r--r--arch/arm/mach-s3c2440/s3c244x-irq.c14
-rw-r--r--arch/arm/mach-s3c2443/irq.c8
-rw-r--r--arch/arm/mach-s3c64xx/dma.c2
-rw-r--r--arch/arm/mach-s3c64xx/irq-eint.c13
-rw-r--r--arch/arm/mach-s5p64x0/cpu.c2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-fb.h2
-rw-r--r--arch/arm/mach-s5pc100/setup-sdhci.c2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h6
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c8
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c1
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci-gpio.c4
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c2
-rw-r--r--arch/arm/mach-sa1100/Makefile2
-rw-r--r--arch/arm/mach-sa1100/cerf.c2
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1100.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/SA-1100.h2
-rw-r--r--arch/arm/mach-sa1100/irq.c16
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c4
-rw-r--r--arch/arm/mach-sa1100/neponset.c8
-rw-r--r--arch/arm/mach-sa1100/pleb.c2
-rw-r--r--arch/arm/mach-shark/irq.c3
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c32
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c6
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c49
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h (renamed from arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h)10
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc-mackerel.h (renamed from arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h)11
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc.h (renamed from arch/arm/mach-shmobile/include/mach/mmcif.h)12
-rw-r--r--arch/arm/mach-shmobile/include/mach/zboot.h2
-rw-r--r--arch/arm/mach-shmobile/intc-sh7367.c6
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c6
-rw-r--r--arch/arm/mach-shmobile/intc-sh7377.c6
-rw-r--r--arch/arm/mach-shmobile/localtimer.c3
-rw-r--r--arch/arm/mach-tcc8k/irq.c6
-rw-r--r--arch/arm/mach-tegra/Kconfig5
-rw-r--r--arch/arm/mach-tegra/Makefile4
-rw-r--r--arch/arm/mach-tegra/board-harmony-pcie.c24
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c28
-rw-r--r--arch/arm/mach-tegra/board-harmony-power.c117
-rw-r--r--arch/arm/mach-tegra/board-harmony.c95
-rw-r--r--arch/arm/mach-tegra/board-harmony.h15
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c157
-rw-r--r--arch/arm/mach-tegra/board-paz00.c128
-rw-r--r--arch/arm/mach-tegra/board-paz00.h29
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c11
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c68
-rw-r--r--arch/arm/mach-tegra/board-seaboard.h3
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c9
-rw-r--r--arch/arm/mach-tegra/board-trimslice.c19
-rw-r--r--arch/arm/mach-tegra/board-trimslice.h3
-rw-r--r--arch/arm/mach-tegra/devices.c70
-rw-r--r--arch/arm/mach-tegra/devices.h4
-rw-r--r--arch/arm/mach-tegra/dma.c4
-rw-r--r--arch/arm/mach-tegra/gpio.c45
-rw-r--r--arch/arm/mach-tegra/include/mach/dma.h4
-rw-r--r--arch/arm/mach-tegra/include/mach/iomap.h3
-rw-r--r--arch/arm/mach-tegra/irq.c5
-rw-r--r--arch/arm/mach-tegra/localtimer.c3
-rw-r--r--arch/arm/mach-tegra/tegra2_clocks.c9
-rw-r--r--arch/arm/mach-u300/clock.c6
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c201
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.h3
-rw-r--r--arch/arm/mach-ux500/board-mop500.c55
-rw-r--r--arch/arm/mach-ux500/board-mop500.h4
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h10
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-board-mop500.h15
-rw-r--r--arch/arm/mach-ux500/localtimer.c3
-rw-r--r--arch/arm/mach-ux500/modem-irq-db5500.c3
-rw-r--r--arch/arm/mach-versatile/core.c295
-rw-r--r--arch/arm/mach-versatile/core.h2
-rw-r--r--arch/arm/mach-versatile/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c1
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c6
-rw-r--r--arch/arm/mach-vexpress/Kconfig3
-rw-r--r--arch/arm/mach-vexpress/Makefile3
-rw-r--r--arch/arm/mach-vexpress/core.h5
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c107
-rw-r--r--arch/arm/mach-vexpress/include/mach/ct-ca9x4.h2
-rw-r--r--arch/arm/mach-vexpress/include/mach/motherboard.h22
-rw-r--r--arch/arm/mach-vexpress/platsmp.c125
-rw-r--r--arch/arm/mach-vexpress/v2m.c90
-rw-r--r--arch/arm/mach-vt8500/irq.c14
-rw-r--r--arch/arm/mach-w90x900/irq.c4
-rw-r--r--arch/arm/mm/cache-v4wb.S2
-rw-r--r--arch/arm/mm/cache-v4wt.S2
-rw-r--r--arch/arm/mm/cache-v7.S2
-rw-r--r--arch/arm/mm/dma-mapping.c11
-rw-r--r--arch/arm/mm/fault-armv.c7
-rw-r--r--arch/arm/mm/fault.c39
-rw-r--r--arch/arm/mm/idmap.c35
-rw-r--r--arch/arm/mm/init.c8
-rw-r--r--arch/arm/mm/mm.h2
-rw-r--r--arch/arm/mm/mmap.c4
-rw-r--r--arch/arm/mm/mmu.c71
-rw-r--r--arch/arm/mm/pgd.c24
-rw-r--r--arch/arm/mm/proc-arm1020.S2
-rw-r--r--arch/arm/mm/proc-arm1020e.S2
-rw-r--r--arch/arm/mm/proc-arm1022.S2
-rw-r--r--arch/arm/mm/proc-arm1026.S2
-rw-r--r--arch/arm/mm/proc-arm720.S2
-rw-r--r--arch/arm/mm/proc-arm920.S4
-rw-r--r--arch/arm/mm/proc-arm922.S2
-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-macros.S2
-rw-r--r--arch/arm/mm/proc-sa1100.S2
-rw-r--r--arch/arm/mm/proc-v6.S6
-rw-r--r--arch/arm/mm/proc-v7.S4
-rw-r--r--arch/arm/mm/proc-xsc3.S2
-rw-r--r--arch/arm/mm/proc-xscale.S2
-rw-r--r--arch/arm/plat-mxc/3ds_debugboard.c14
-rw-r--r--arch/arm/plat-mxc/avic.c4
-rw-r--r--arch/arm/plat-mxc/cpufreq.c2
-rw-r--r--arch/arm/plat-mxc/devices/platform-fec.c2
-rw-r--r--arch/arm/plat-mxc/devices/platform-imxdi_rtc.c2
-rw-r--r--arch/arm/plat-mxc/gpio.c24
-rw-r--r--arch/arm/plat-mxc/include/mach/audmux.h10
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S4
-rw-r--r--arch/arm/plat-mxc/include/mach/esdhc.h12
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx2x.h12
-rw-r--r--arch/arm/plat-mxc/include/mach/mx50.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h23
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_nand.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h6
-rw-r--r--arch/arm/plat-mxc/irq-common.c4
-rw-r--r--arch/arm/plat-mxc/time.c25
-rw-r--r--arch/arm/plat-mxc/tzic.c4
-rw-r--r--arch/arm/plat-nomadik/gpio.c102
-rw-r--r--arch/arm/plat-nomadik/include/plat/ste_dma40.h22
-rw-r--r--arch/arm/plat-omap/devices.c2
-rw-r--r--arch/arm/plat-omap/dma.c4
-rw-r--r--arch/arm/plat-omap/gpio.c31
-rw-r--r--arch/arm/plat-omap/include/plat/display.h15
-rw-r--r--arch/arm/plat-omap/include/plat/gpio.h2
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h2
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/plat/omap34xx.h16
-rw-r--r--arch/arm/plat-omap/include/plat/onenand.h1
-rw-r--r--arch/arm/plat-omap/mcbsp.c2
-rw-r--r--arch/arm/plat-orion/gpio.c31
-rw-r--r--arch/arm/plat-orion/irq.c8
-rw-r--r--arch/arm/plat-pxa/gpio.c6
-rw-r--r--arch/arm/plat-pxa/include/plat/i2c.h82
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h2
-rw-r--r--arch/arm/plat-pxa/include/plat/pxa3xx_nand.h2
-rw-r--r--arch/arm/plat-s3c24xx/Makefile2
-rw-r--r--arch/arm/plat-s3c24xx/cpu-freq.c2
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s3c24xx/irq.c43
-rw-r--r--arch/arm/plat-s5p/cpu.c8
-rw-r--r--arch/arm/plat-s5p/irq-eint.c7
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c24
-rw-r--r--arch/arm/plat-s5p/pm.c11
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h4
-rw-r--r--arch/arm/plat-samsung/init.c2
-rw-r--r--arch/arm/plat-samsung/irq-uart.c10
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c11
-rw-r--r--arch/arm/plat-samsung/pm-check.c6
-rw-r--r--arch/arm/plat-samsung/pm.c5
-rw-r--r--arch/arm/plat-samsung/s3c-pl330.c2
-rw-r--r--arch/arm/plat-samsung/wakeup-mask.c8
-rw-r--r--arch/arm/plat-spear/include/plat/clock.h2
-rw-r--r--arch/arm/plat-spear/shirq.c12
-rw-r--r--arch/arm/plat-stmp3xxx/irq.c3
-rw-r--r--arch/arm/plat-stmp3xxx/pinmux.c13
-rw-r--r--arch/arm/plat-versatile/Kconfig17
-rw-r--r--arch/arm/plat-versatile/Makefile13
-rw-r--r--arch/arm/plat-versatile/clcd.c182
-rw-r--r--arch/arm/plat-versatile/fpga-irq.c72
-rw-r--r--arch/arm/plat-versatile/headsmp.S (renamed from arch/arm/mach-vexpress/headsmp.S)8
-rw-r--r--arch/arm/plat-versatile/include/plat/clcd.h9
-rw-r--r--arch/arm/plat-versatile/include/plat/fpga-irq.h12
-rw-r--r--arch/arm/plat-versatile/localtimer.c (renamed from arch/arm/mach-vexpress/localtimer.c)5
-rw-r--r--arch/arm/plat-versatile/platsmp.c104
-rw-r--r--arch/arm/tools/mach-types2395
-rw-r--r--arch/arm/vfp/Makefile4
-rw-r--r--arch/arm/vfp/vfpmodule.c34
540 files changed, 5633 insertions, 5571 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 599e1634840d..377a7a595b08 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -28,6 +28,7 @@ config ARM
28 select HAVE_C_RECORDMCOUNT 28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS 29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ 30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
31 help 32 help
32 The ARM series is a line of low-power-consumption RISC chip designs 33 The ARM series is a line of low-power-consumption RISC chip designs
33 licensed by ARM Ltd and targeted at embedded applications and 34 licensed by ARM Ltd and targeted at embedded applications and
@@ -235,6 +236,7 @@ config ARCH_INTEGRATOR
235 select ICST 236 select ICST
236 select GENERIC_CLOCKEVENTS 237 select GENERIC_CLOCKEVENTS
237 select PLAT_VERSATILE 238 select PLAT_VERSATILE
239 select PLAT_VERSATILE_FPGA_IRQ
238 help 240 help
239 Support for ARM's Integrator platform. 241 Support for ARM's Integrator platform.
240 242
@@ -242,11 +244,11 @@ config ARCH_REALVIEW
242 bool "ARM Ltd. RealView family" 244 bool "ARM Ltd. RealView family"
243 select ARM_AMBA 245 select ARM_AMBA
244 select CLKDEV_LOOKUP 246 select CLKDEV_LOOKUP
245 select HAVE_SCHED_CLOCK
246 select ICST 247 select ICST
247 select GENERIC_CLOCKEVENTS 248 select GENERIC_CLOCKEVENTS
248 select ARCH_WANT_OPTIONAL_GPIOLIB 249 select ARCH_WANT_OPTIONAL_GPIOLIB
249 select PLAT_VERSATILE 250 select PLAT_VERSATILE
251 select PLAT_VERSATILE_CLCD
250 select ARM_TIMER_SP804 252 select ARM_TIMER_SP804
251 select GPIO_PL061 if GPIOLIB 253 select GPIO_PL061 if GPIOLIB
252 help 254 help
@@ -257,11 +259,12 @@ config ARCH_VERSATILE
257 select ARM_AMBA 259 select ARM_AMBA
258 select ARM_VIC 260 select ARM_VIC
259 select CLKDEV_LOOKUP 261 select CLKDEV_LOOKUP
260 select HAVE_SCHED_CLOCK
261 select ICST 262 select ICST
262 select GENERIC_CLOCKEVENTS 263 select GENERIC_CLOCKEVENTS
263 select ARCH_WANT_OPTIONAL_GPIOLIB 264 select ARCH_WANT_OPTIONAL_GPIOLIB
264 select PLAT_VERSATILE 265 select PLAT_VERSATILE
266 select PLAT_VERSATILE_CLCD
267 select PLAT_VERSATILE_FPGA_IRQ
265 select ARM_TIMER_SP804 268 select ARM_TIMER_SP804
266 help 269 help
267 This enables support for ARM Ltd Versatile board. 270 This enables support for ARM Ltd Versatile board.
@@ -274,9 +277,10 @@ config ARCH_VEXPRESS
274 select CLKDEV_LOOKUP 277 select CLKDEV_LOOKUP
275 select GENERIC_CLOCKEVENTS 278 select GENERIC_CLOCKEVENTS
276 select HAVE_CLK 279 select HAVE_CLK
277 select HAVE_SCHED_CLOCK 280 select HAVE_PATA_PLATFORM
278 select ICST 281 select ICST
279 select PLAT_VERSATILE 282 select PLAT_VERSATILE
283 select PLAT_VERSATILE_CLCD
280 help 284 help
281 This enables support for the ARM Ltd Versatile Express boards. 285 This enables support for the ARM Ltd Versatile Express boards.
282 286
@@ -362,6 +366,7 @@ config ARCH_MXC
362 select GENERIC_CLOCKEVENTS 366 select GENERIC_CLOCKEVENTS
363 select ARCH_REQUIRE_GPIOLIB 367 select ARCH_REQUIRE_GPIOLIB
364 select CLKDEV_LOOKUP 368 select CLKDEV_LOOKUP
369 select HAVE_SCHED_CLOCK
365 help 370 help
366 Support for Freescale MXC/iMX-based family of processors 371 Support for Freescale MXC/iMX-based family of processors
367 372
@@ -689,7 +694,7 @@ config ARCH_S3C2410
689 the Samsung SMDK2410 development board (and derivatives). 694 the Samsung SMDK2410 development board (and derivatives).
690 695
691 Note, the S3C2416 and the S3C2450 are so close that they even share 696 Note, the S3C2416 and the S3C2450 are so close that they even share
692 the same SoC ID code. This means that there is no seperate machine 697 the same SoC ID code. This means that there is no separate machine
693 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 698 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
694 699
695config ARCH_S3C64XX 700config ARCH_S3C64XX
@@ -1011,6 +1016,7 @@ source "arch/arm/mach-ux500/Kconfig"
1011source "arch/arm/mach-versatile/Kconfig" 1016source "arch/arm/mach-versatile/Kconfig"
1012 1017
1013source "arch/arm/mach-vexpress/Kconfig" 1018source "arch/arm/mach-vexpress/Kconfig"
1019source "arch/arm/plat-versatile/Kconfig"
1014 1020
1015source "arch/arm/mach-vt8500/Kconfig" 1021source "arch/arm/mach-vt8500/Kconfig"
1016 1022
@@ -1534,7 +1540,6 @@ config HIGHMEM
1534config HIGHPTE 1540config HIGHPTE
1535 bool "Allocate 2nd-level pagetables from highmem" 1541 bool "Allocate 2nd-level pagetables from highmem"
1536 depends on HIGHMEM 1542 depends on HIGHMEM
1537 depends on !OUTER_CACHE
1538 1543
1539config HW_PERF_EVENTS 1544config HW_PERF_EVENTS
1540 bool "Enable hardware performance counter support for perf events" 1545 bool "Enable hardware performance counter support for perf events"
@@ -2005,6 +2010,9 @@ menu "Power management options"
2005source "kernel/power/Kconfig" 2010source "kernel/power/Kconfig"
2006 2011
2007config ARCH_SUSPEND_POSSIBLE 2012config ARCH_SUSPEND_POSSIBLE
2013 depends on !ARCH_S5P64X0 && !ARCH_S5P6442
2014 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2015 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2008 def_bool y 2016 def_bool y
2009 2017
2010endmenu 2018endmenu
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu
index 901e6dff8437..2cef8e13f9f8 100644
--- a/arch/arm/Kconfig-nommu
+++ b/arch/arm/Kconfig-nommu
@@ -34,7 +34,7 @@ config PROCESSOR_ID
34 used instead of the auto-probing which utilizes the register. 34 used instead of the auto-probing which utilizes the register.
35 35
36config REMAP_VECTORS_TO_RAM 36config REMAP_VECTORS_TO_RAM
37 bool 'Install vectors to the begining of RAM' if DRAM_BASE 37 bool 'Install vectors to the beginning of RAM' if DRAM_BASE
38 depends on DRAM_BASE 38 depends on DRAM_BASE
39 help 39 help
40 The kernel needs to change the hardware exception vectors. 40 The kernel needs to change the hardware exception vectors.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 494224a9b459..03d01d783e3b 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -63,17 +63,6 @@ config DEBUG_USER
63 8 - SIGSEGV faults 63 8 - SIGSEGV faults
64 16 - SIGBUS faults 64 16 - SIGBUS faults
65 65
66config DEBUG_ERRORS
67 bool "Verbose kernel error messages"
68 depends on DEBUG_KERNEL
69 help
70 This option controls verbose debugging information which can be
71 printed when the kernel detects an internal error. This debugging
72 information is useful to kernel hackers when tracking down problems,
73 but mostly meaningless to other people. It's safe to say Y unless
74 you are concerned with the code size or don't want to see these
75 messages.
76
77config DEBUG_STACK_USAGE 66config DEBUG_STACK_USAGE
78 bool "Enable stack utilization instrumentation" 67 bool "Enable stack utilization instrumentation"
79 depends on DEBUG_KERNEL 68 depends on DEBUG_KERNEL
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index f9f77c65dff3..8ebbb511c783 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -95,8 +95,8 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS)
95KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) 95KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
96endif 96endif
97 97
98EXTRA_CFLAGS := -fpic -fno-builtin 98ccflags-y := -fpic -fno-builtin
99EXTRA_AFLAGS := -Wa,-march=all 99asflags-y := -Wa,-march=all
100 100
101# Provide size of uncompressed kernel to the decompressor via a linker symbol. 101# Provide size of uncompressed kernel to the decompressor via a linker symbol.
102LDFLAGS_vmlinux = --defsym _image_size=$(shell stat -c "%s" $(obj)/../Image) 102LDFLAGS_vmlinux = --defsym _image_size=$(shell stat -c "%s" $(obj)/../Image)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 84ac4d656310..adf583cd0c35 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -21,20 +21,12 @@
21 21
22#if defined(CONFIG_DEBUG_ICEDCC) 22#if defined(CONFIG_DEBUG_ICEDCC)
23 23
24#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 24#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
25 .macro loadsp, rb, tmp 25 .macro loadsp, rb, tmp
26 .endm 26 .endm
27 .macro writeb, ch, rb 27 .macro writeb, ch, rb
28 mcr p14, 0, \ch, c0, c5, 0 28 mcr p14, 0, \ch, c0, c5, 0
29 .endm 29 .endm
30#elif defined(CONFIG_CPU_V7)
31 .macro loadsp, rb, tmp
32 .endm
33 .macro writeb, ch, rb
34wait: mrc p14, 0, pc, c0, c1, 0
35 bcs wait
36 mcr p14, 0, \ch, c0, c5, 0
37 .endm
38#elif defined(CONFIG_CPU_XSCALE) 30#elif defined(CONFIG_CPU_XSCALE)
39 .macro loadsp, rb, tmp 31 .macro loadsp, rb, tmp
40 .endm 32 .endm
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 4657e877bf8f..2df38263124c 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -36,7 +36,7 @@ extern void error(char *x);
36 36
37#ifdef CONFIG_DEBUG_ICEDCC 37#ifdef CONFIG_DEBUG_ICEDCC
38 38
39#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 39#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
40 40
41static void icedcc_putc(int ch) 41static void icedcc_putc(int ch)
42{ 42{
@@ -52,16 +52,6 @@ static void icedcc_putc(int ch)
52 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); 52 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
53} 53}
54 54
55#elif defined(CONFIG_CPU_V7)
56
57static void icedcc_putc(int ch)
58{
59 asm(
60 "wait: mrc p14, 0, pc, c0, c1, 0 \n\
61 bcs wait \n\
62 mcr p14, 0, %0, c0, c5, 0 "
63 : : "r" (ch));
64}
65 55
66#elif defined(CONFIG_CPU_XSCALE) 56#elif defined(CONFIG_CPU_XSCALE)
67 57
diff --git a/arch/arm/boot/compressed/mmcif-sh7372.c b/arch/arm/boot/compressed/mmcif-sh7372.c
index e6180af241f6..7453c8337b83 100644
--- a/arch/arm/boot/compressed/mmcif-sh7372.c
+++ b/arch/arm/boot/compressed/mmcif-sh7372.c
@@ -10,7 +10,8 @@
10 */ 10 */
11 11
12#include <linux/mmc/sh_mmcif.h> 12#include <linux/mmc/sh_mmcif.h>
13#include <mach/mmcif.h> 13#include <linux/mmc/boot.h>
14#include <mach/mmc.h>
14 15
15#define MMCIF_BASE (void __iomem *)0xe6bd0000 16#define MMCIF_BASE (void __iomem *)0xe6bd0000
16 17
@@ -41,8 +42,8 @@
41 */ 42 */
42asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len) 43asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
43{ 44{
44 mmcif_init_progress(); 45 mmc_init_progress();
45 mmcif_update_progress(MMCIF_PROGRESS_ENTER); 46 mmc_update_progress(MMC_PROGRESS_ENTER);
46 47
47 /* Initialise MMC 48 /* Initialise MMC
48 * registers: PORT84CR-PORT92CR 49 * registers: PORT84CR-PORT92CR
@@ -68,12 +69,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
68 /* Enable clock to MMC hardware block */ 69 /* Enable clock to MMC hardware block */
69 __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3); 70 __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);
70 71
71 mmcif_update_progress(MMCIF_PROGRESS_INIT); 72 mmc_update_progress(MMC_PROGRESS_INIT);
72 73
73 /* setup MMCIF hardware */ 74 /* setup MMCIF hardware */
74 sh_mmcif_boot_init(MMCIF_BASE); 75 sh_mmcif_boot_init(MMCIF_BASE);
75 76
76 mmcif_update_progress(MMCIF_PROGRESS_LOAD); 77 mmc_update_progress(MMC_PROGRESS_LOAD);
77 78
78 /* load kernel via MMCIF interface */ 79 /* load kernel via MMCIF interface */
79 sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */ 80 sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */
@@ -83,5 +84,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len)
83 /* Disable clock to MMC hardware block */ 84 /* Disable clock to MMC hardware block */
84 __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3); 85 __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);
85 86
86 mmcif_update_progress(MMCIF_PROGRESS_DONE); 87 mmc_update_progress(MMC_PROGRESS_DONE);
87} 88}
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e7521bca2c35..6ea9b6f3607a 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -16,5 +16,4 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
16obj-$(CONFIG_ARCH_IXP2000) += uengine.o 16obj-$(CONFIG_ARCH_IXP2000) += uengine.o
17obj-$(CONFIG_ARCH_IXP23XX) += uengine.o 17obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
18obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o 18obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
19obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o
20obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o 19obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index cb6b041c39d2..f70ec7dadebb 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
213 213
214static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 214static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
215{ 215{
216 struct gic_chip_data *chip_data = get_irq_data(irq); 216 struct gic_chip_data *chip_data = irq_get_handler_data(irq);
217 struct irq_chip *chip = get_irq_chip(irq); 217 struct irq_chip *chip = irq_get_chip(irq);
218 unsigned int cascade_irq, gic_irq; 218 unsigned int cascade_irq, gic_irq;
219 unsigned long status; 219 unsigned long status;
220 220
@@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
257{ 257{
258 if (gic_nr >= MAX_GIC_NR) 258 if (gic_nr >= MAX_GIC_NR)
259 BUG(); 259 BUG();
260 if (set_irq_data(irq, &gic_data[gic_nr]) != 0) 260 if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0)
261 BUG(); 261 BUG();
262 set_irq_chained_handler(irq, gic_handle_cascade_irq); 262 irq_set_chained_handler(irq, gic_handle_cascade_irq);
263} 263}
264 264
265static void __init gic_dist_init(struct gic_chip_data *gic, 265static void __init gic_dist_init(struct gic_chip_data *gic,
@@ -319,9 +319,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
319 * Setup the Linux IRQ subsystem. 319 * Setup the Linux IRQ subsystem.
320 */ 320 */
321 for (i = irq_start; i < irq_limit; i++) { 321 for (i = irq_start; i < irq_limit; i++) {
322 set_irq_chip(i, &gic_chip); 322 irq_set_chip_and_handler(i, &gic_chip, handle_level_irq);
323 set_irq_chip_data(i, gic); 323 irq_set_chip_data(i, gic);
324 set_irq_handler(i, handle_level_irq);
325 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 324 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
326 } 325 }
327 326
@@ -382,7 +381,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
382 unsigned long flags; 381 unsigned long flags;
383 382
384 local_irq_save(flags); 383 local_irq_save(flags);
385 irq_to_desc(irq)->status |= IRQ_NOPROBE; 384 irq_set_status_flags(irq, IRQ_NOPROBE);
386 gic_unmask_irq(irq_get_irq_data(irq)); 385 gic_unmask_irq(irq_get_irq_data(irq));
387 local_irq_restore(flags); 386 local_irq_restore(flags);
388} 387}
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index fcddd48fe9da..7a21927c52e1 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -88,8 +88,8 @@ void it8152_init_irq(void)
88 __raw_writel((0), IT8152_INTC_LDCNIRR); 88 __raw_writel((0), IT8152_INTC_LDCNIRR);
89 89
90 for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { 90 for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) {
91 set_irq_chip(irq, &it8152_irq_chip); 91 irq_set_chip_and_handler(irq, &it8152_irq_chip,
92 set_irq_handler(irq, handle_level_irq); 92 handle_level_irq);
93 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 93 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
94 } 94 }
95} 95}
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index a026a6bf4892..b55c3625d7ee 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = {
140 140
141static void locomo_handler(unsigned int irq, struct irq_desc *desc) 141static void locomo_handler(unsigned int irq, struct irq_desc *desc)
142{ 142{
143 struct locomo *lchip = get_irq_chip_data(irq); 143 struct locomo *lchip = irq_get_chip_data(irq);
144 int req, i; 144 int req, i;
145 145
146 /* Acknowledge the parent IRQ */ 146 /* Acknowledge the parent IRQ */
@@ -197,15 +197,14 @@ static void locomo_setup_irq(struct locomo *lchip)
197 /* 197 /*
198 * Install handler for IRQ_LOCOMO_HW. 198 * Install handler for IRQ_LOCOMO_HW.
199 */ 199 */
200 set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); 200 irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
201 set_irq_chip_data(lchip->irq, lchip); 201 irq_set_chip_data(lchip->irq, lchip);
202 set_irq_chained_handler(lchip->irq, locomo_handler); 202 irq_set_chained_handler(lchip->irq, locomo_handler);
203 203
204 /* Install handlers for IRQ_LOCOMO_* */ 204 /* Install handlers for IRQ_LOCOMO_* */
205 for ( ; irq <= lchip->irq_base + 3; irq++) { 205 for ( ; irq <= lchip->irq_base + 3; irq++) {
206 set_irq_chip(irq, &locomo_chip); 206 irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq);
207 set_irq_chip_data(irq, lchip); 207 irq_set_chip_data(irq, lchip);
208 set_irq_handler(irq, handle_level_irq);
209 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 208 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
210 } 209 }
211} 210}
@@ -476,8 +475,8 @@ static void __locomo_remove(struct locomo *lchip)
476 device_for_each_child(lchip->dev, NULL, locomo_remove_child); 475 device_for_each_child(lchip->dev, NULL, locomo_remove_child);
477 476
478 if (lchip->irq != NO_IRQ) { 477 if (lchip->irq != NO_IRQ) {
479 set_irq_chained_handler(lchip->irq, NULL); 478 irq_set_chained_handler(lchip->irq, NULL);
480 set_irq_data(lchip->irq, NULL); 479 irq_set_handler_data(lchip->irq, NULL);
481 } 480 }
482 481
483 iounmap(lchip->base); 482 iounmap(lchip->base);
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 8f0f86db3602..97912fa48782 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1045,7 +1045,7 @@ static inline int _loop(unsigned dry_run, u8 buf[],
1045 unsigned lcnt0, lcnt1, ljmp0, ljmp1; 1045 unsigned lcnt0, lcnt1, ljmp0, ljmp1;
1046 struct _arg_LPEND lpend; 1046 struct _arg_LPEND lpend;
1047 1047
1048 /* Max iterations possibile in DMALP is 256 */ 1048 /* Max iterations possible in DMALP is 256 */
1049 if (*bursts >= 256*256) { 1049 if (*bursts >= 256*256) {
1050 lcnt1 = 256; 1050 lcnt1 = 256;
1051 lcnt0 = 256; 1051 lcnt0 = 256;
@@ -1446,7 +1446,7 @@ int pl330_update(const struct pl330_info *pi)
1446 } 1446 }
1447 1447
1448 for (ev = 0; ev < pi->pcfg.num_events; ev++) { 1448 for (ev = 0; ev < pi->pcfg.num_events; ev++) {
1449 if (val & (1 << ev)) { /* Event occured */ 1449 if (val & (1 << ev)) { /* Event occurred */
1450 struct pl330_thread *thrd; 1450 struct pl330_thread *thrd;
1451 u32 inten = readl(regs + INTEN); 1451 u32 inten = readl(regs + INTEN);
1452 int active; 1452 int active;
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index eb9796b0dab2..a12b33c0dc42 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -202,7 +202,7 @@ static void
202sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 202sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
203{ 203{
204 unsigned int stat0, stat1, i; 204 unsigned int stat0, stat1, i;
205 struct sa1111 *sachip = get_irq_data(irq); 205 struct sa1111 *sachip = irq_get_handler_data(irq);
206 void __iomem *mapbase = sachip->base + SA1111_INTC; 206 void __iomem *mapbase = sachip->base + SA1111_INTC;
207 207
208 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 208 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
@@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
472 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 472 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
473 473
474 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 474 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
475 set_irq_chip(irq, &sa1111_low_chip); 475 irq_set_chip_and_handler(irq, &sa1111_low_chip,
476 set_irq_chip_data(irq, sachip); 476 handle_edge_irq);
477 set_irq_handler(irq, handle_edge_irq); 477 irq_set_chip_data(irq, sachip);
478 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 478 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
479 } 479 }
480 480
481 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 481 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
482 set_irq_chip(irq, &sa1111_high_chip); 482 irq_set_chip_and_handler(irq, &sa1111_high_chip,
483 set_irq_chip_data(irq, sachip); 483 handle_edge_irq);
484 set_irq_handler(irq, handle_edge_irq); 484 irq_set_chip_data(irq, sachip);
485 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 485 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
486 } 486 }
487 487
488 /* 488 /*
489 * Register SA1111 interrupt 489 * Register SA1111 interrupt
490 */ 490 */
491 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 491 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
492 set_irq_data(sachip->irq, sachip); 492 irq_set_handler_data(sachip->irq, sachip);
493 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 493 irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
494} 494}
495 495
496/* 496/*
@@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip)
815 clk_disable(sachip->clk); 815 clk_disable(sachip->clk);
816 816
817 if (sachip->irq != NO_IRQ) { 817 if (sachip->irq != NO_IRQ) {
818 set_irq_chained_handler(sachip->irq, NULL); 818 irq_set_chained_handler(sachip->irq, NULL);
819 set_irq_data(sachip->irq, NULL); 819 irq_set_handler_data(sachip->irq, NULL);
820 820
821 release_mem_region(sachip->phys + SA1111_INTC, 512); 821 release_mem_region(sachip->phys + SA1111_INTC, 512);
822 } 822 }
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index ae5fe7292e0d..113085a77123 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base,
305 if (vic_sources & (1 << i)) { 305 if (vic_sources & (1 << i)) {
306 unsigned int irq = irq_start + i; 306 unsigned int irq = irq_start + i;
307 307
308 set_irq_chip(irq, &vic_chip); 308 irq_set_chip_and_handler(irq, &vic_chip,
309 set_irq_chip_data(irq, base); 309 handle_level_irq);
310 set_irq_handler(irq, handle_level_irq); 310 irq_set_chip_data(irq, base);
311 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 311 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
312 } 312 }
313 } 313 }
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 019fb7c67dc3..076db52ff672 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -193,6 +193,17 @@ CONFIG_FIRMWARE_EDID=y
193CONFIG_FB_MODE_HELPERS=y 193CONFIG_FB_MODE_HELPERS=y
194CONFIG_FB_TILEBLITTING=y 194CONFIG_FB_TILEBLITTING=y
195CONFIG_FB_OMAP_LCD_VGA=y 195CONFIG_FB_OMAP_LCD_VGA=y
196CONFIG_OMAP2_DSS=m
197CONFIG_OMAP2_DSS_RFBI=y
198CONFIG_OMAP2_DSS_SDI=y
199CONFIG_OMAP2_DSS_DSI=y
200CONFIG_FB_OMAP2=m
201CONFIG_PANEL_GENERIC_DPI=m
202CONFIG_PANEL_SHARP_LS037V7DW01=m
203CONFIG_PANEL_NEC_NL8048HL11_01B=m
204CONFIG_PANEL_TAAL=m
205CONFIG_PANEL_TPO_TD043MTEA1=m
206CONFIG_PANEL_ACX565AKM=m
196CONFIG_BACKLIGHT_LCD_SUPPORT=y 207CONFIG_BACKLIGHT_LCD_SUPPORT=y
197CONFIG_LCD_CLASS_DEVICE=y 208CONFIG_LCD_CLASS_DEVICE=y
198CONFIG_LCD_PLATFORM=y 209CONFIG_LCD_PLATFORM=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 7a9267e5da55..8845f1c9925d 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -21,6 +21,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y
21# CONFIG_IOSCHED_CFQ is not set 21# CONFIG_IOSCHED_CFQ is not set
22CONFIG_ARCH_TEGRA=y 22CONFIG_ARCH_TEGRA=y
23CONFIG_MACH_HARMONY=y 23CONFIG_MACH_HARMONY=y
24CONFIG_MACH_KAEN=y
25CONFIG_MACH_PAZ00=y
26CONFIG_MACH_TRIMSLICE=y
27CONFIG_MACH_WARIO=y
24CONFIG_TEGRA_DEBUG_UARTD=y 28CONFIG_TEGRA_DEBUG_UARTD=y
25CONFIG_ARM_ERRATA_742230=y 29CONFIG_ARM_ERRATA_742230=y
26CONFIG_NO_HZ=y 30CONFIG_NO_HZ=y
@@ -40,6 +44,10 @@ CONFIG_PACKET=y
40CONFIG_UNIX=y 44CONFIG_UNIX=y
41CONFIG_NET_KEY=y 45CONFIG_NET_KEY=y
42CONFIG_INET=y 46CONFIG_INET=y
47CONFIG_IP_PNP=y
48CONFIG_IP_PNP_DHCP=y
49CONFIG_IP_PNP_BOOTP=y
50CONFIG_IP_PNP_RARP=y
43CONFIG_INET_ESP=y 51CONFIG_INET_ESP=y
44# CONFIG_INET_XFRM_MODE_TUNNEL is not set 52# CONFIG_INET_XFRM_MODE_TUNNEL is not set
45# CONFIG_INET_XFRM_MODE_BEET is not set 53# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -66,7 +74,7 @@ CONFIG_APDS9802ALS=y
66CONFIG_ISL29003=y 74CONFIG_ISL29003=y
67CONFIG_NETDEVICES=y 75CONFIG_NETDEVICES=y
68CONFIG_DUMMY=y 76CONFIG_DUMMY=y
69# CONFIG_NETDEV_1000 is not set 77CONFIG_R8169=y
70# CONFIG_NETDEV_10000 is not set 78# CONFIG_NETDEV_10000 is not set
71# CONFIG_WLAN is not set 79# CONFIG_WLAN is not set
72# CONFIG_INPUT is not set 80# CONFIG_INPUT is not set
@@ -78,12 +86,23 @@ CONFIG_SERIAL_8250_CONSOLE=y
78# CONFIG_LEGACY_PTYS is not set 86# CONFIG_LEGACY_PTYS is not set
79# CONFIG_HW_RANDOM is not set 87# CONFIG_HW_RANDOM is not set
80CONFIG_I2C=y 88CONFIG_I2C=y
81# CONFIG_HWMON is not set 89# CONFIG_I2C_COMPAT is not set
82# CONFIG_MFD_SUPPORT is not set 90# CONFIG_I2C_HELPER_AUTO is not set
91CONFIG_I2C_TEGRA=y
92CONFIG_SENSORS_LM90=y
93CONFIG_MFD_TPS6586X=y
94CONFIG_REGULATOR=y
95CONFIG_REGULATOR_TPS6586X=y
83# CONFIG_USB_SUPPORT is not set 96# CONFIG_USB_SUPPORT is not set
84CONFIG_MMC=y 97CONFIG_MMC=y
85CONFIG_MMC_SDHCI=y 98CONFIG_MMC_SDHCI=y
86CONFIG_MMC_SDHCI_PLTFM=y 99CONFIG_MMC_SDHCI_PLTFM=y
100CONFIG_MMC_SDHCI_TEGRA=y
101CONFIG_STAGING=y
102# CONFIG_STAGING_EXCLUDE_BUILD is not set
103CONFIG_IIO=y
104CONFIG_SENSORS_ISL29018=y
105CONFIG_SENSORS_AK8975=y
87CONFIG_EXT2_FS=y 106CONFIG_EXT2_FS=y
88CONFIG_EXT2_FS_XATTR=y 107CONFIG_EXT2_FS_XATTR=y
89CONFIG_EXT2_FS_POSIX_ACL=y 108CONFIG_EXT2_FS_POSIX_ACL=y
@@ -95,6 +114,10 @@ CONFIG_EXT3_FS_SECURITY=y
95# CONFIG_DNOTIFY is not set 114# CONFIG_DNOTIFY is not set
96CONFIG_VFAT_FS=y 115CONFIG_VFAT_FS=y
97CONFIG_TMPFS=y 116CONFIG_TMPFS=y
117CONFIG_NFS_FS=y
118CONFIG_ROOT_NFS=y
119CONFIG_PARTITION_ADVANCED=y
120CONFIG_EFI_PARTITION=y
98CONFIG_NLS_CODEPAGE_437=y 121CONFIG_NLS_CODEPAGE_437=y
99CONFIG_NLS_ISO8859_1=y 122CONFIG_NLS_ISO8859_1=y
100CONFIG_PRINTK_TIME=y 123CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index af54ed102f5f..6b7403fd8f54 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -287,41 +287,63 @@ static inline int fls(int x)
287#include <asm-generic/bitops/hweight.h> 287#include <asm-generic/bitops/hweight.h>
288#include <asm-generic/bitops/lock.h> 288#include <asm-generic/bitops/lock.h>
289 289
290/* 290static inline void __set_bit_le(int nr, void *addr)
291 * Ext2 is defined to use little-endian byte ordering. 291{
292 * These do not need to be atomic. 292 __set_bit(WORD_BITOFF_TO_LE(nr), addr);
293 */ 293}
294#define ext2_set_bit(nr,p) \ 294
295 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 295static inline void __clear_bit_le(int nr, void *addr)
296#define ext2_set_bit_atomic(lock,nr,p) \ 296{
297 test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 297 __clear_bit(WORD_BITOFF_TO_LE(nr), addr);
298#define ext2_clear_bit(nr,p) \ 298}
299 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 299
300#define ext2_clear_bit_atomic(lock,nr,p) \ 300static inline int __test_and_set_bit_le(int nr, void *addr)
301 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 301{
302#define ext2_test_bit(nr,p) \ 302 return __test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr);
303 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 303}
304#define ext2_find_first_zero_bit(p,sz) \ 304
305 _find_first_zero_bit_le(p,sz) 305static inline int test_and_set_bit_le(int nr, void *addr)
306#define ext2_find_next_zero_bit(p,sz,off) \ 306{
307 _find_next_zero_bit_le(p,sz,off) 307 return test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr);
308#define ext2_find_next_bit(p, sz, off) \ 308}
309 _find_next_bit_le(p, sz, off) 309
310static inline int __test_and_clear_bit_le(int nr, void *addr)
311{
312 return __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr);
313}
314
315static inline int test_and_clear_bit_le(int nr, void *addr)
316{
317 return test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr);
318}
319
320static inline int test_bit_le(int nr, const void *addr)
321{
322 return test_bit(WORD_BITOFF_TO_LE(nr), addr);
323}
324
325static inline int find_first_zero_bit_le(const void *p, unsigned size)
326{
327 return _find_first_zero_bit_le(p, size);
328}
329
330static inline int find_next_zero_bit_le(const void *p, int size, int offset)
331{
332 return _find_next_zero_bit_le(p, size, offset);
333}
334
335static inline int find_next_bit_le(const void *p, int size, int offset)
336{
337 return _find_next_bit_le(p, size, offset);
338}
310 339
311/* 340/*
312 * Minix is defined to use little-endian byte ordering. 341 * Ext2 is defined to use little-endian byte ordering.
313 * These do not need to be atomic.
314 */ 342 */
315#define minix_set_bit(nr,p) \ 343#define ext2_set_bit_atomic(lock, nr, p) \
316 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 344 test_and_set_bit_le(nr, p)
317#define minix_test_bit(nr,p) \ 345#define ext2_clear_bit_atomic(lock, nr, p) \
318 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) 346 test_and_clear_bit_le(nr, p)
319#define minix_test_and_set_bit(nr,p) \
320 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
321#define minix_test_and_clear_bit(nr,p) \
322 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
323#define minix_find_first_zero_bit(p,sz) \
324 _find_first_zero_bit_le(p,sz)
325 347
326#endif /* __KERNEL__ */ 348#endif /* __KERNEL__ */
327 349
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index ed5bc9e05a4e..cd4458f64171 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -2,6 +2,7 @@
2#define __ASM_ARM_CPUTYPE_H 2#define __ASM_ARM_CPUTYPE_H
3 3
4#include <linux/stringify.h> 4#include <linux/stringify.h>
5#include <linux/kernel.h>
5 6
6#define CPUID_ID 0 7#define CPUID_ID 0
7#define CPUID_CACHETYPE 1 8#define CPUID_CACHETYPE 1
diff --git a/arch/arm/include/asm/fpstate.h b/arch/arm/include/asm/fpstate.h
index ee5e03efc1bb..3ad4c10d0d84 100644
--- a/arch/arm/include/asm/fpstate.h
+++ b/arch/arm/include/asm/fpstate.h
@@ -18,7 +18,7 @@
18 * VFP storage area has: 18 * VFP storage area has:
19 * - FPEXC, FPSCR, FPINST and FPINST2. 19 * - FPEXC, FPSCR, FPINST and FPINST2.
20 * - 16 or 32 double precision data registers 20 * - 16 or 32 double precision data registers
21 * - an implementation-dependant word of state for FLDMX/FSTMX (pre-ARMv6) 21 * - an implementation-dependent word of state for FLDMX/FSTMX (pre-ARMv6)
22 * 22 *
23 * FPEXC will always be non-zero once the VFP has been used in this process. 23 * FPEXC will always be non-zero once the VFP has been used in this process.
24 */ 24 */
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index c7afbc552c7f..7e30874377e6 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -126,7 +126,7 @@
126#endif 126#endif
127 127
128#if !defined(_CACHE) && !defined(MULTI_CACHE) 128#if !defined(_CACHE) && !defined(MULTI_CACHE)
129#error Unknown cache maintainence model 129#error Unknown cache maintenance model
130#endif 130#endif
131 131
132#ifndef MULTI_CACHE 132#ifndef MULTI_CACHE
diff --git a/arch/arm/include/asm/glue.h b/arch/arm/include/asm/glue.h
index 0ec35d1698aa..fbf71d75ec83 100644
--- a/arch/arm/include/asm/glue.h
+++ b/arch/arm/include/asm/glue.h
@@ -10,8 +10,8 @@
10 * 10 *
11 * This file provides the glue to stick the processor-specific bits 11 * This file provides the glue to stick the processor-specific bits
12 * into the kernel in an efficient manner. The idea is to use branches 12 * into the kernel in an efficient manner. The idea is to use branches
13 * when we're only targetting one class of TLB, or indirect calls 13 * when we're only targeting one class of TLB, or indirect calls
14 * when we're targetting multiple classes of TLBs. 14 * when we're targeting multiple classes of TLBs.
15 */ 15 */
16#ifdef __KERNEL__ 16#ifdef __KERNEL__
17 17
diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h
index f35b86e68dd5..e4a04e4e5627 100644
--- a/arch/arm/include/asm/hardware/pl080.h
+++ b/arch/arm/include/asm/hardware/pl080.h
@@ -16,7 +16,7 @@
16 * make it not entierly compatible with the PL080 specification from 16 * make it not entierly compatible with the PL080 specification from
17 * ARM. When in doubt, check the Samsung documentation first. 17 * ARM. When in doubt, check the Samsung documentation first.
18 * 18 *
19 * The Samsung defines are PL080S, and add an extra controll register, 19 * The Samsung defines are PL080S, and add an extra control register,
20 * the ability to move more than 2^11 counts of data and some extra 20 * the ability to move more than 2^11 counts of data and some extra
21 * OneNAND features. 21 * OneNAND features.
22*/ 22*/
diff --git a/arch/arm/include/asm/hw_irq.h b/arch/arm/include/asm/hw_irq.h
index 5586b7c8ef6f..a71b417b1856 100644
--- a/arch/arm/include/asm/hw_irq.h
+++ b/arch/arm/include/asm/hw_irq.h
@@ -10,14 +10,6 @@ static inline void ack_bad_irq(int irq)
10 irq_err_count++; 10 irq_err_count++;
11} 11}
12 12
13/*
14 * Obsolete inline function for calling irq descriptor handlers.
15 */
16static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc)
17{
18 desc->handle_irq(irq, desc);
19}
20
21void set_irq_flags(unsigned int irq, unsigned int flags); 13void set_irq_flags(unsigned int irq, unsigned int flags);
22 14
23#define IRQF_VALID (1 << 0) 15#define IRQF_VALID (1 << 0)
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h
index 6bc63ab498ce..080d74f8128d 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -44,8 +44,14 @@ int local_timer_ack(void);
44/* 44/*
45 * Setup a local timer interrupt for a CPU. 45 * Setup a local timer interrupt for a CPU.
46 */ 46 */
47void local_timer_setup(struct clock_event_device *); 47int local_timer_setup(struct clock_event_device *);
48 48
49#else
50
51static inline int local_timer_setup(struct clock_event_device *evt)
52{
53 return -ENXIO;
54}
49#endif 55#endif
50 56
51#endif 57#endif
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h
index 833306ee9e7f..ea297ac70bc6 100644
--- a/arch/arm/include/asm/mach/udc_pxa2xx.h
+++ b/arch/arm/include/asm/mach/udc_pxa2xx.h
@@ -20,8 +20,6 @@ struct pxa2xx_udc_mach_info {
20 * VBUS IRQ and omit the methods above. Store the GPIO number 20 * VBUS IRQ and omit the methods above. Store the GPIO number
21 * here. Note that sometimes the signals go through inverters... 21 * here. Note that sometimes the signals go through inverters...
22 */ 22 */
23 bool gpio_vbus_inverted;
24 int gpio_vbus; /* high == vbus present */
25 bool gpio_pullup_inverted; 23 bool gpio_pullup_inverted;
26 int gpio_pullup; /* high == pullup activated */ 24 int gpio_pullup; /* high == pullup activated */
27}; 25};
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index 348d513afa92..d8387437ec5a 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -21,6 +21,8 @@
21#ifndef __ASM_OUTERCACHE_H 21#ifndef __ASM_OUTERCACHE_H
22#define __ASM_OUTERCACHE_H 22#define __ASM_OUTERCACHE_H
23 23
24#include <linux/types.h>
25
24struct outer_cache_fns { 26struct outer_cache_fns {
25 void (*inv_range)(unsigned long, unsigned long); 27 void (*inv_range)(unsigned long, unsigned long);
26 void (*clean_range)(unsigned long, unsigned long); 28 void (*clean_range)(unsigned long, unsigned long);
@@ -38,17 +40,17 @@ struct outer_cache_fns {
38 40
39extern struct outer_cache_fns outer_cache; 41extern struct outer_cache_fns outer_cache;
40 42
41static inline void outer_inv_range(unsigned long start, unsigned long end) 43static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
42{ 44{
43 if (outer_cache.inv_range) 45 if (outer_cache.inv_range)
44 outer_cache.inv_range(start, end); 46 outer_cache.inv_range(start, end);
45} 47}
46static inline void outer_clean_range(unsigned long start, unsigned long end) 48static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
47{ 49{
48 if (outer_cache.clean_range) 50 if (outer_cache.clean_range)
49 outer_cache.clean_range(start, end); 51 outer_cache.clean_range(start, end);
50} 52}
51static inline void outer_flush_range(unsigned long start, unsigned long end) 53static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
52{ 54{
53 if (outer_cache.flush_range) 55 if (outer_cache.flush_range)
54 outer_cache.flush_range(start, end); 56 outer_cache.flush_range(start, end);
@@ -74,11 +76,11 @@ static inline void outer_disable(void)
74 76
75#else 77#else
76 78
77static inline void outer_inv_range(unsigned long start, unsigned long end) 79static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
78{ } 80{ }
79static inline void outer_clean_range(unsigned long start, unsigned long end) 81static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
80{ } 82{ }
81static inline void outer_flush_range(unsigned long start, unsigned long end) 83static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
82{ } 84{ }
83static inline void outer_flush_all(void) { } 85static inline void outer_flush_all(void) { }
84static inline void outer_inv_all(void) { } 86static inline void outer_inv_all(void) { }
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index ebcb6432f45f..5750704e0271 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -301,6 +301,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
301#define pgd_present(pgd) (1) 301#define pgd_present(pgd) (1)
302#define pgd_clear(pgdp) do { } while (0) 302#define pgd_clear(pgdp) do { } while (0)
303#define set_pgd(pgd,pgdp) do { } while (0) 303#define set_pgd(pgd,pgdp) do { } while (0)
304#define set_pud(pud,pudp) do { } while (0)
304 305
305 306
306/* Find an entry in the second-level page table.. */ 307/* Find an entry in the second-level page table.. */
@@ -351,7 +352,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
351#define pte_unmap(pte) __pte_unmap(pte) 352#define pte_unmap(pte) __pte_unmap(pte)
352 353
353#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) 354#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
354#define pfn_pte(pfn,prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 355#define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
355 356
356#define pte_page(pte) pfn_to_page(pte_pfn(pte)) 357#define pte_page(pte) pfn_to_page(pte_pfn(pte))
357#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) 358#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index da8b52ec49cf..95176af3df8c 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -195,7 +195,7 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn }
195#define NR_BANKS 8 195#define NR_BANKS 8
196 196
197struct membank { 197struct membank {
198 unsigned long start; 198 phys_addr_t start;
199 unsigned long size; 199 unsigned long size;
200 unsigned int highmem; 200 unsigned int highmem;
201}; 201};
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 9a87823642d0..885be097769d 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -249,7 +249,7 @@ do { \
249 * cache totally. This means that the cache becomes inconsistent, and, 249 * cache totally. This means that the cache becomes inconsistent, and,
250 * since we use normal loads/stores as well, this is really bad. 250 * since we use normal loads/stores as well, this is really bad.
251 * Typically, this causes oopsen in filp_close, but could have other, 251 * Typically, this causes oopsen in filp_close, but could have other,
252 * more disasterous effects. There are two work-arounds: 252 * more disastrous effects. There are two work-arounds:
253 * 1. Disable interrupts and emulate the atomic swap 253 * 1. Disable interrupts and emulate the atomic swap
254 * 2. Clean the cache, perform atomic swap, flush the cache 254 * 2. Clean the cache, perform atomic swap, flush the cache
255 * 255 *
diff --git a/arch/arm/include/asm/thread_notify.h b/arch/arm/include/asm/thread_notify.h
index c4391ba20350..1dc980675894 100644
--- a/arch/arm/include/asm/thread_notify.h
+++ b/arch/arm/include/asm/thread_notify.h
@@ -43,6 +43,7 @@ static inline void thread_notify(unsigned long rc, struct thread_info *thread)
43#define THREAD_NOTIFY_FLUSH 0 43#define THREAD_NOTIFY_FLUSH 0
44#define THREAD_NOTIFY_EXIT 1 44#define THREAD_NOTIFY_EXIT 1
45#define THREAD_NOTIFY_SWITCH 2 45#define THREAD_NOTIFY_SWITCH 2
46#define THREAD_NOTIFY_COPY 3
46 47
47#endif 48#endif
48#endif 49#endif
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
index 345df01534a4..48192ac3a23a 100644
--- a/arch/arm/include/asm/types.h
+++ b/arch/arm/include/asm/types.h
@@ -16,15 +16,6 @@ typedef unsigned short umode_t;
16 16
17#define BITS_PER_LONG 32 17#define BITS_PER_LONG 32
18 18
19#ifndef __ASSEMBLY__
20
21/* Dma addresses are 32-bits wide. */
22
23typedef u32 dma_addr_t;
24typedef u32 dma64_addr_t;
25
26#endif /* __ASSEMBLY__ */
27
28#endif /* __KERNEL__ */ 19#endif /* __KERNEL__ */
29 20
30#endif 21#endif
diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h
index 47f023aa8495..14749aec94bf 100644
--- a/arch/arm/include/asm/ucontext.h
+++ b/arch/arm/include/asm/ucontext.h
@@ -47,7 +47,7 @@ struct crunch_sigframe {
47#endif 47#endif
48 48
49#ifdef CONFIG_IWMMXT 49#ifdef CONFIG_IWMMXT
50/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ 50/* iwmmxt_area is 0x98 bytes long, preceded by 8 bytes of signature */
51#define IWMMXT_MAGIC 0x12ef842a 51#define IWMMXT_MAGIC 0x12ef842a
52#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8) 52#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8)
53 53
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index c891eb76c0e3..87dbe3e21970 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -396,6 +396,10 @@
396#define __NR_fanotify_init (__NR_SYSCALL_BASE+367) 396#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
397#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368) 397#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
398#define __NR_prlimit64 (__NR_SYSCALL_BASE+369) 398#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
399#define __NR_name_to_handle_at (__NR_SYSCALL_BASE+370)
400#define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371)
401#define __NR_clock_adjtime (__NR_SYSCALL_BASE+372)
402#define __NR_syncfs (__NR_SYSCALL_BASE+373)
399 403
400/* 404/*
401 * The following SWIs are ARM private. 405 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 74554f1742d7..8d95446150a3 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_MODULES) += armksyms.o module.o
29obj-$(CONFIG_ARTHUR) += arthur.o 29obj-$(CONFIG_ARTHUR) += arthur.o
30obj-$(CONFIG_ISA_DMA) += dma-isa.o 30obj-$(CONFIG_ISA_DMA) += dma-isa.o
31obj-$(CONFIG_PCI) += bios32.o isa.o 31obj-$(CONFIG_PCI) += bios32.o isa.o
32obj-$(CONFIG_PM) += sleep.o 32obj-$(CONFIG_PM_SLEEP) += sleep.o
33obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o 33obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o
34obj-$(CONFIG_SMP) += smp.o smp_tlb.o 34obj-$(CONFIG_SMP) += smp.o smp_tlb.o
35obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o 35obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index d86fcd44b220..e4ee050aad7d 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -159,31 +159,6 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
159DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285); 159DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285);
160 160
161/* 161/*
162 * Same as above. The PrPMC800 carrier board for the PrPMC1100
163 * card maps the host-bridge @ 00:01:00 for some reason and it
164 * ends up getting scanned. Note that we only want to do this
165 * fixup when we find the IXP4xx on a PrPMC system, which is why
166 * we check the machine type. We could be running on a board
167 * with an IXP4xx target device and we don't want to kill the
168 * resources in that case.
169 */
170static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev)
171{
172 int i;
173
174 if (machine_is_prpmc1100()) {
175 dev->class &= 0xff;
176 dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
177 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
178 dev->resource[i].start = 0;
179 dev->resource[i].end = 0;
180 dev->resource[i].flags = 0;
181 }
182 }
183}
184DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100);
185
186/*
187 * PCI IDE controllers use non-standard I/O port decoding, respect it. 162 * PCI IDE controllers use non-standard I/O port decoding, respect it.
188 */ 163 */
189static void __devinit pci_fixup_ide_bases(struct pci_dev *dev) 164static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 5c26eccef998..7fbf28c35bb2 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -379,6 +379,10 @@
379 CALL(sys_fanotify_init) 379 CALL(sys_fanotify_init)
380 CALL(sys_fanotify_mark) 380 CALL(sys_fanotify_mark)
381 CALL(sys_prlimit64) 381 CALL(sys_prlimit64)
382/* 370 */ CALL(sys_name_to_handle_at)
383 CALL(sys_open_by_handle_at)
384 CALL(sys_clock_adjtime)
385 CALL(sys_syncfs)
382#ifndef syscalls_counted 386#ifndef syscalls_counted
383.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 387.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
384#define syscalls_counted 388#define syscalls_counted
diff --git a/arch/arm/kernel/crash_dump.c b/arch/arm/kernel/crash_dump.c
index cd3b853a8a6d..90c50d4b43f7 100644
--- a/arch/arm/kernel/crash_dump.c
+++ b/arch/arm/kernel/crash_dump.c
@@ -18,9 +18,6 @@
18#include <linux/uaccess.h> 18#include <linux/uaccess.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21/* stores the physical address of elf header of crash image */
22unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
23
24/** 21/**
25 * copy_oldmem_page() - copy one page from old kernel memory 22 * copy_oldmem_page() - copy one page from old kernel memory
26 * @pfn: page frame number to be copied 23 * @pfn: page frame number to be copied
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index d2d983be096d..bcd66e00bdbe 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -25,7 +25,7 @@
25 .macro addruart, rp, rv 25 .macro addruart, rp, rv
26 .endm 26 .endm
27 27
28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
29 29
30 .macro senduart, rd, rx 30 .macro senduart, rd, rx
31 mcr p14, 0, \rd, c0, c5, 0 31 mcr p14, 0, \rd, c0, c5, 0
@@ -49,23 +49,6 @@
491002: 491002:
50 .endm 50 .endm
51 51
52#elif defined(CONFIG_CPU_V7)
53
54 .macro senduart, rd, rx
55 mcr p14, 0, \rd, c0, c5, 0
56 .endm
57
58 .macro busyuart, rd, rx
59busy: mrc p14, 0, pc, c0, c1, 0
60 bcs busy
61 .endm
62
63 .macro waituart, rd, rx
64wait: mrc p14, 0, pc, c0, c1, 0
65 bcs wait
66
67 .endm
68
69#elif defined(CONFIG_CPU_XSCALE) 52#elif defined(CONFIG_CPU_XSCALE)
70 53
71 .macro senduart, rd, rx 54 .macro senduart, rd, rx
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 2ad62df37730..d16500110ee9 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type)
1043 */ 1043 */
1044 if (slot < 8) { 1044 if (slot < 8) {
1045 ec->irq = 32 + slot; 1045 ec->irq = 32 + slot;
1046 set_irq_chip(ec->irq, &ecard_chip); 1046 irq_set_chip_and_handler(ec->irq, &ecard_chip,
1047 set_irq_handler(ec->irq, handle_level_irq); 1047 handle_level_irq);
1048 set_irq_flags(ec->irq, IRQF_VALID); 1048 set_irq_flags(ec->irq, IRQF_VALID);
1049 } 1049 }
1050 1050
@@ -1103,7 +1103,7 @@ static int __init ecard_init(void)
1103 1103
1104 irqhw = ecard_probeirqhw(); 1104 irqhw = ecard_probeirqhw();
1105 1105
1106 set_irq_chained_handler(IRQ_EXPANSIONCARD, 1106 irq_set_chained_handler(IRQ_EXPANSIONCARD,
1107 irqhw ? ecard_irqexp_handler : ecard_irq_handler); 1107 irqhw ? ecard_irqexp_handler : ecard_irq_handler);
1108 1108
1109 ecard_proc_init(); 1109 ecard_proc_init();
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index d4a0da1e48f4..9b05c6a0dcea 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -40,15 +40,22 @@ EXPORT_SYMBOL(elf_check_arch);
40void elf_set_personality(const struct elf32_hdr *x) 40void elf_set_personality(const struct elf32_hdr *x)
41{ 41{
42 unsigned int eflags = x->e_flags; 42 unsigned int eflags = x->e_flags;
43 unsigned int personality = PER_LINUX_32BIT; 43 unsigned int personality = current->personality & ~PER_MASK;
44
45 /*
46 * We only support Linux ELF executables, so always set the
47 * personality to LINUX.
48 */
49 personality |= PER_LINUX;
44 50
45 /* 51 /*
46 * APCS-26 is only valid for OABI executables 52 * APCS-26 is only valid for OABI executables
47 */ 53 */
48 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { 54 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN &&
49 if (eflags & EF_ARM_APCS_26) 55 (eflags & EF_ARM_APCS_26))
50 personality = PER_LINUX; 56 personality &= ~ADDR_LIMIT_32BIT;
51 } 57 else
58 personality |= ADDR_LIMIT_32BIT;
52 59
53 set_personality(personality); 60 set_personality(personality);
54 61
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 052b509e2d5f..1bec8b5f22f0 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -338,7 +338,7 @@ static struct miscdevice etb_miscdev = {
338 .fops = &etb_fops, 338 .fops = &etb_fops,
339}; 339};
340 340
341static int __init etb_probe(struct amba_device *dev, const struct amba_id *id) 341static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id)
342{ 342{
343 struct tracectx *t = &tracer; 343 struct tracectx *t = &tracer;
344 int ret = 0; 344 int ret = 0;
@@ -530,7 +530,7 @@ static ssize_t trace_mode_store(struct kobject *kobj,
530static struct kobj_attribute trace_mode_attr = 530static struct kobj_attribute trace_mode_attr =
531 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); 531 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
532 532
533static int __init etm_probe(struct amba_device *dev, const struct amba_id *id) 533static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id)
534{ 534{
535 struct tracectx *t = &tracer; 535 struct tracectx *t = &tracer;
536 int ret = 0; 536 int ret = 0;
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 44b84fe6e1b0..87acc25d7a3e 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -238,8 +238,8 @@ static int enable_monitor_mode(void)
238 ARM_DBG_READ(c1, 0, dscr); 238 ARM_DBG_READ(c1, 0, dscr);
239 239
240 /* Ensure that halting mode is disabled. */ 240 /* Ensure that halting mode is disabled. */
241 if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, "halting debug mode enabled." 241 if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN,
242 "Unable to access hardware resources.")) { 242 "halting debug mode enabled. Unable to access hardware resources.\n")) {
243 ret = -EPERM; 243 ret = -EPERM;
244 goto out; 244 goto out;
245 } 245 }
@@ -377,7 +377,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
377 } 377 }
378 } 378 }
379 379
380 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) { 380 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) {
381 ret = -EBUSY; 381 ret = -EBUSY;
382 goto out; 382 goto out;
383 } 383 }
@@ -423,7 +423,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp)
423 } 423 }
424 } 424 }
425 425
426 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) 426 if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n"))
427 return; 427 return;
428 428
429 /* Reset the control register. */ 429 /* Reset the control register. */
@@ -635,7 +635,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
635 if (WARN_ONCE(!bp->overflow_handler && 635 if (WARN_ONCE(!bp->overflow_handler &&
636 (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps() 636 (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps()
637 || !bp->hw.bp_target), 637 || !bp->hw.bp_target),
638 "overflow handler required but none found")) { 638 "overflow handler required but none found\n")) {
639 ret = -EINVAL; 639 ret = -EINVAL;
640 } 640 }
641out: 641out:
@@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info)
868 */ 868 */
869 asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); 869 asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0));
870 isb(); 870 isb();
871
872 /*
873 * Clear any configured vector-catch events before
874 * enabling monitor mode.
875 */
876 asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0));
877 isb();
871 } 878 }
872 879
873 if (enable_monitor_mode()) 880 if (enable_monitor_mode())
@@ -936,8 +943,8 @@ static int __init arch_hw_breakpoint_init(void)
936 ARM_DBG_READ(c1, 0, dscr); 943 ARM_DBG_READ(c1, 0, dscr);
937 if (dscr & ARM_DSCR_HDBGEN) { 944 if (dscr & ARM_DSCR_HDBGEN) {
938 max_watchpoint_len = 4; 945 max_watchpoint_len = 4;
939 pr_warning("halting debug mode enabled. Assuming maximum " 946 pr_warning("halting debug mode enabled. Assuming maximum watchpoint size of %u bytes.\n",
940 "watchpoint size of %u bytes.", max_watchpoint_len); 947 max_watchpoint_len);
941 } else { 948 } else {
942 /* Work out the maximum supported watchpoint length. */ 949 /* Work out the maximum supported watchpoint length. */
943 max_watchpoint_len = get_max_wp_len(); 950 max_watchpoint_len = get_max_wp_len();
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 3535d3793e65..83bbad03fcc6 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -51,63 +51,18 @@
51 51
52unsigned long irq_err_count; 52unsigned long irq_err_count;
53 53
54int show_interrupts(struct seq_file *p, void *v) 54int arch_show_interrupts(struct seq_file *p, int prec)
55{ 55{
56 int i = *(loff_t *) v, cpu;
57 struct irq_desc *desc;
58 struct irqaction * action;
59 unsigned long flags;
60 int prec, n;
61
62 for (prec = 3, n = 1000; prec < 10 && n <= nr_irqs; prec++)
63 n *= 10;
64
65#ifdef CONFIG_SMP
66 if (prec < 4)
67 prec = 4;
68#endif
69
70 if (i == 0) {
71 char cpuname[12];
72
73 seq_printf(p, "%*s ", prec, "");
74 for_each_present_cpu(cpu) {
75 sprintf(cpuname, "CPU%d", cpu);
76 seq_printf(p, " %10s", cpuname);
77 }
78 seq_putc(p, '\n');
79 }
80
81 if (i < nr_irqs) {
82 desc = irq_to_desc(i);
83 raw_spin_lock_irqsave(&desc->lock, flags);
84 action = desc->action;
85 if (!action)
86 goto unlock;
87
88 seq_printf(p, "%*d: ", prec, i);
89 for_each_present_cpu(cpu)
90 seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
91 seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-");
92 seq_printf(p, " %s", action->name);
93 for (action = action->next; action; action = action->next)
94 seq_printf(p, ", %s", action->name);
95
96 seq_putc(p, '\n');
97unlock:
98 raw_spin_unlock_irqrestore(&desc->lock, flags);
99 } else if (i == nr_irqs) {
100#ifdef CONFIG_FIQ 56#ifdef CONFIG_FIQ
101 show_fiq_list(p, prec); 57 show_fiq_list(p, prec);
102#endif 58#endif
103#ifdef CONFIG_SMP 59#ifdef CONFIG_SMP
104 show_ipi_list(p, prec); 60 show_ipi_list(p, prec);
105#endif 61#endif
106#ifdef CONFIG_LOCAL_TIMERS 62#ifdef CONFIG_LOCAL_TIMERS
107 show_local_irqs(p, prec); 63 show_local_irqs(p, prec);
108#endif 64#endif
109 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); 65 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
110 }
111 return 0; 66 return 0;
112} 67}
113 68
@@ -144,24 +99,21 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
144 99
145void set_irq_flags(unsigned int irq, unsigned int iflags) 100void set_irq_flags(unsigned int irq, unsigned int iflags)
146{ 101{
147 struct irq_desc *desc; 102 unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
148 unsigned long flags;
149 103
150 if (irq >= nr_irqs) { 104 if (irq >= nr_irqs) {
151 printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); 105 printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq);
152 return; 106 return;
153 } 107 }
154 108
155 desc = irq_to_desc(irq);
156 raw_spin_lock_irqsave(&desc->lock, flags);
157 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
158 if (iflags & IRQF_VALID) 109 if (iflags & IRQF_VALID)
159 desc->status &= ~IRQ_NOREQUEST; 110 clr |= IRQ_NOREQUEST;
160 if (iflags & IRQF_PROBE) 111 if (iflags & IRQF_PROBE)
161 desc->status &= ~IRQ_NOPROBE; 112 clr |= IRQ_NOPROBE;
162 if (!(iflags & IRQF_NOAUTOEN)) 113 if (!(iflags & IRQF_NOAUTOEN))
163 desc->status &= ~IRQ_NOAUTOEN; 114 clr |= IRQ_NOAUTOEN;
164 raw_spin_unlock_irqrestore(&desc->lock, flags); 115 /* Order is clear bits in "clr" then set bits in "set" */
116 irq_modify_status(irq, clr, set & ~clr);
165} 117}
166 118
167void __init init_IRQ(void) 119void __init init_IRQ(void)
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
index 8f6ed43861f1..23891317dc4b 100644
--- a/arch/arm/kernel/kprobes-decode.c
+++ b/arch/arm/kernel/kprobes-decode.c
@@ -594,7 +594,8 @@ static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs)
594 long cpsr = regs->ARM_cpsr; 594 long cpsr = regs->ARM_cpsr;
595 595
596 fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn); 596 fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn);
597 regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */ 597 if (rn != 15)
598 regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */
598 rdv = fnr.r1; 599 rdv = fnr.r1;
599 600
600 if (rd == 15) { 601 if (rd == 15) {
@@ -622,10 +623,11 @@ static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs)
622 long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd]; 623 long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd];
623 long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn]; 624 long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn];
624 long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ 625 long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */
626 long rnv_wb;
625 627
626 /* Save Rn in case of writeback. */ 628 rnv_wb = insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn);
627 regs->uregs[rn] = 629 if (rn != 15)
628 insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn); 630 regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */
629} 631}
630 632
631static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs) 633static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 22e194eb8536..979da3947f42 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -79,6 +79,7 @@ struct arm_pmu {
79 void (*write_counter)(int idx, u32 val); 79 void (*write_counter)(int idx, u32 val);
80 void (*start)(void); 80 void (*start)(void);
81 void (*stop)(void); 81 void (*stop)(void);
82 void (*reset)(void *);
82 const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX] 83 const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX]
83 [PERF_COUNT_HW_CACHE_OP_MAX] 84 [PERF_COUNT_HW_CACHE_OP_MAX]
84 [PERF_COUNT_HW_CACHE_RESULT_MAX]; 85 [PERF_COUNT_HW_CACHE_RESULT_MAX];
@@ -204,11 +205,9 @@ armpmu_event_set_period(struct perf_event *event,
204static u64 205static u64
205armpmu_event_update(struct perf_event *event, 206armpmu_event_update(struct perf_event *event,
206 struct hw_perf_event *hwc, 207 struct hw_perf_event *hwc,
207 int idx) 208 int idx, int overflow)
208{ 209{
209 int shift = 64 - 32; 210 u64 delta, prev_raw_count, new_raw_count;
210 s64 prev_raw_count, new_raw_count;
211 u64 delta;
212 211
213again: 212again:
214 prev_raw_count = local64_read(&hwc->prev_count); 213 prev_raw_count = local64_read(&hwc->prev_count);
@@ -218,8 +217,13 @@ again:
218 new_raw_count) != prev_raw_count) 217 new_raw_count) != prev_raw_count)
219 goto again; 218 goto again;
220 219
221 delta = (new_raw_count << shift) - (prev_raw_count << shift); 220 new_raw_count &= armpmu->max_period;
222 delta >>= shift; 221 prev_raw_count &= armpmu->max_period;
222
223 if (overflow)
224 delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
225 else
226 delta = new_raw_count - prev_raw_count;
223 227
224 local64_add(delta, &event->count); 228 local64_add(delta, &event->count);
225 local64_sub(delta, &hwc->period_left); 229 local64_sub(delta, &hwc->period_left);
@@ -236,7 +240,7 @@ armpmu_read(struct perf_event *event)
236 if (hwc->idx < 0) 240 if (hwc->idx < 0)
237 return; 241 return;
238 242
239 armpmu_event_update(event, hwc, hwc->idx); 243 armpmu_event_update(event, hwc, hwc->idx, 0);
240} 244}
241 245
242static void 246static void
@@ -254,7 +258,7 @@ armpmu_stop(struct perf_event *event, int flags)
254 if (!(hwc->state & PERF_HES_STOPPED)) { 258 if (!(hwc->state & PERF_HES_STOPPED)) {
255 armpmu->disable(hwc, hwc->idx); 259 armpmu->disable(hwc, hwc->idx);
256 barrier(); /* why? */ 260 barrier(); /* why? */
257 armpmu_event_update(event, hwc, hwc->idx); 261 armpmu_event_update(event, hwc, hwc->idx, 0);
258 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; 262 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
259 } 263 }
260} 264}
@@ -624,6 +628,19 @@ static struct pmu pmu = {
624#include "perf_event_v6.c" 628#include "perf_event_v6.c"
625#include "perf_event_v7.c" 629#include "perf_event_v7.c"
626 630
631/*
632 * Ensure the PMU has sane values out of reset.
633 * This requires SMP to be available, so exists as a separate initcall.
634 */
635static int __init
636armpmu_reset(void)
637{
638 if (armpmu && armpmu->reset)
639 return on_each_cpu(armpmu->reset, NULL, 1);
640 return 0;
641}
642arch_initcall(armpmu_reset);
643
627static int __init 644static int __init
628init_hw_perf_events(void) 645init_hw_perf_events(void)
629{ 646{
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 6fc2d228db55..f1e8dd94afe8 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -474,7 +474,7 @@ armv6pmu_handle_irq(int irq_num,
474 continue; 474 continue;
475 475
476 hwc = &event->hw; 476 hwc = &event->hw;
477 armpmu_event_update(event, hwc, idx); 477 armpmu_event_update(event, hwc, idx, 1);
478 data.period = event->hw.last_period; 478 data.period = event->hw.last_period;
479 if (!armpmu_event_set_period(event, hwc, idx)) 479 if (!armpmu_event_set_period(event, hwc, idx))
480 continue; 480 continue;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 2e1402556fa0..4960686afb58 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -466,6 +466,7 @@ static inline unsigned long armv7_pmnc_read(void)
466static inline void armv7_pmnc_write(unsigned long val) 466static inline void armv7_pmnc_write(unsigned long val)
467{ 467{
468 val &= ARMV7_PMNC_MASK; 468 val &= ARMV7_PMNC_MASK;
469 isb();
469 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val)); 470 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val));
470} 471}
471 472
@@ -502,6 +503,7 @@ static inline int armv7_pmnc_select_counter(unsigned int idx)
502 503
503 val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK; 504 val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK;
504 asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val)); 505 asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
506 isb();
505 507
506 return idx; 508 return idx;
507} 509}
@@ -780,7 +782,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
780 continue; 782 continue;
781 783
782 hwc = &event->hw; 784 hwc = &event->hw;
783 armpmu_event_update(event, hwc, idx); 785 armpmu_event_update(event, hwc, idx, 1);
784 data.period = event->hw.last_period; 786 data.period = event->hw.last_period;
785 if (!armpmu_event_set_period(event, hwc, idx)) 787 if (!armpmu_event_set_period(event, hwc, idx))
786 continue; 788 continue;
@@ -847,6 +849,18 @@ static int armv7pmu_get_event_idx(struct cpu_hw_events *cpuc,
847 } 849 }
848} 850}
849 851
852static void armv7pmu_reset(void *info)
853{
854 u32 idx, nb_cnt = armpmu->num_events;
855
856 /* The counter and interrupt enable registers are unknown at reset. */
857 for (idx = 1; idx < nb_cnt; ++idx)
858 armv7pmu_disable_event(NULL, idx);
859
860 /* Initialize & Reset PMNC: C and P bits */
861 armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C);
862}
863
850static struct arm_pmu armv7pmu = { 864static struct arm_pmu armv7pmu = {
851 .handle_irq = armv7pmu_handle_irq, 865 .handle_irq = armv7pmu_handle_irq,
852 .enable = armv7pmu_enable_event, 866 .enable = armv7pmu_enable_event,
@@ -856,17 +870,15 @@ static struct arm_pmu armv7pmu = {
856 .get_event_idx = armv7pmu_get_event_idx, 870 .get_event_idx = armv7pmu_get_event_idx,
857 .start = armv7pmu_start, 871 .start = armv7pmu_start,
858 .stop = armv7pmu_stop, 872 .stop = armv7pmu_stop,
873 .reset = armv7pmu_reset,
859 .raw_event_mask = 0xFF, 874 .raw_event_mask = 0xFF,
860 .max_period = (1LLU << 32) - 1, 875 .max_period = (1LLU << 32) - 1,
861}; 876};
862 877
863static u32 __init armv7_reset_read_pmnc(void) 878static u32 __init armv7_read_num_pmnc_events(void)
864{ 879{
865 u32 nb_cnt; 880 u32 nb_cnt;
866 881
867 /* Initialize & Reset PMNC: C and P bits */
868 armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C);
869
870 /* Read the nb of CNTx counters supported from PMNC */ 882 /* Read the nb of CNTx counters supported from PMNC */
871 nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK; 883 nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK;
872 884
@@ -880,7 +892,7 @@ static const struct arm_pmu *__init armv7_a8_pmu_init(void)
880 armv7pmu.name = "ARMv7 Cortex-A8"; 892 armv7pmu.name = "ARMv7 Cortex-A8";
881 armv7pmu.cache_map = &armv7_a8_perf_cache_map; 893 armv7pmu.cache_map = &armv7_a8_perf_cache_map;
882 armv7pmu.event_map = &armv7_a8_perf_map; 894 armv7pmu.event_map = &armv7_a8_perf_map;
883 armv7pmu.num_events = armv7_reset_read_pmnc(); 895 armv7pmu.num_events = armv7_read_num_pmnc_events();
884 return &armv7pmu; 896 return &armv7pmu;
885} 897}
886 898
@@ -890,7 +902,7 @@ static const struct arm_pmu *__init armv7_a9_pmu_init(void)
890 armv7pmu.name = "ARMv7 Cortex-A9"; 902 armv7pmu.name = "ARMv7 Cortex-A9";
891 armv7pmu.cache_map = &armv7_a9_perf_cache_map; 903 armv7pmu.cache_map = &armv7_a9_perf_cache_map;
892 armv7pmu.event_map = &armv7_a9_perf_map; 904 armv7pmu.event_map = &armv7_a9_perf_map;
893 armv7pmu.num_events = armv7_reset_read_pmnc(); 905 armv7pmu.num_events = armv7_read_num_pmnc_events();
894 return &armv7pmu; 906 return &armv7pmu;
895} 907}
896#else 908#else
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 28cd3b025bc3..39affbe4fdb2 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -246,7 +246,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
246 continue; 246 continue;
247 247
248 hwc = &event->hw; 248 hwc = &event->hw;
249 armpmu_event_update(event, hwc, idx); 249 armpmu_event_update(event, hwc, idx, 1);
250 data.period = event->hw.last_period; 250 data.period = event->hw.last_period;
251 if (!armpmu_event_set_period(event, hwc, idx)) 251 if (!armpmu_event_set_period(event, hwc, idx))
252 continue; 252 continue;
@@ -578,7 +578,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
578 continue; 578 continue;
579 579
580 hwc = &event->hw; 580 hwc = &event->hw;
581 armpmu_event_update(event, hwc, idx); 581 armpmu_event_update(event, hwc, idx, 1);
582 data.period = event->hw.last_period; 582 data.period = event->hw.last_period;
583 if (!armpmu_event_set_period(event, hwc, idx)) 583 if (!armpmu_event_set_period(event, hwc, idx))
584 continue; 584 continue;
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 94bbedbed639..5e1e54197227 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -372,6 +372,8 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
372 if (clone_flags & CLONE_SETTLS) 372 if (clone_flags & CLONE_SETTLS)
373 thread->tp_value = regs->ARM_r3; 373 thread->tp_value = regs->ARM_r3;
374 374
375 thread_notify(THREAD_NOTIFY_COPY, thread);
376
375 return 0; 377 return 0;
376} 378}
377 379
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d1da92174277..006c1e884eaf 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -466,13 +466,13 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
466 /* can't use cpu_relax() here as it may require MMU setup */; 466 /* can't use cpu_relax() here as it may require MMU setup */;
467} 467}
468 468
469static int __init arm_add_memory(unsigned long start, unsigned long size) 469static int __init arm_add_memory(phys_addr_t start, unsigned long size)
470{ 470{
471 struct membank *bank = &meminfo.bank[meminfo.nr_banks]; 471 struct membank *bank = &meminfo.bank[meminfo.nr_banks];
472 472
473 if (meminfo.nr_banks >= NR_BANKS) { 473 if (meminfo.nr_banks >= NR_BANKS) {
474 printk(KERN_CRIT "NR_BANKS too low, " 474 printk(KERN_CRIT "NR_BANKS too low, "
475 "ignoring memory at %#lx\n", start); 475 "ignoring memory at 0x%08llx\n", (long long)start);
476 return -EINVAL; 476 return -EINVAL;
477 } 477 }
478 478
@@ -502,7 +502,8 @@ static int __init arm_add_memory(unsigned long start, unsigned long size)
502static int __init early_mem(char *p) 502static int __init early_mem(char *p)
503{ 503{
504 static int usermem __initdata = 0; 504 static int usermem __initdata = 0;
505 unsigned long size, start; 505 unsigned long size;
506 phys_addr_t start;
506 char *endp; 507 char *endp;
507 508
508 /* 509 /*
@@ -788,30 +789,6 @@ static void __init reserve_crashkernel(void)
788static inline void reserve_crashkernel(void) {} 789static inline void reserve_crashkernel(void) {}
789#endif /* CONFIG_KEXEC */ 790#endif /* CONFIG_KEXEC */
790 791
791/*
792 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
793 * is_kdump_kernel() to determine if we are booting after a panic. Hence
794 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
795 */
796
797#ifdef CONFIG_CRASH_DUMP
798/*
799 * elfcorehdr= specifies the location of elf core header stored by the crashed
800 * kernel. This option will be passed by kexec loader to the capture kernel.
801 */
802static int __init setup_elfcorehdr(char *arg)
803{
804 char *end;
805
806 if (!arg)
807 return -EINVAL;
808
809 elfcorehdr_addr = memparse(arg, &end);
810 return end > arg ? 0 : -EINVAL;
811}
812early_param("elfcorehdr", setup_elfcorehdr);
813#endif /* CONFIG_CRASH_DUMP */
814
815static void __init squash_mem_tags(struct tag *tag) 792static void __init squash_mem_tags(struct tag *tag)
816{ 793{
817 for (; tag->hdr.size; tag = tag_next(tag)) 794 for (; tag->hdr.size; tag = tag_next(tag))
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index bfad698a02e7..6398ead9d1c0 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -119,11 +119,19 @@ ENTRY(cpu_resume)
119#else 119#else
120 ldr r0, sleep_save_sp @ stack phys addr 120 ldr r0, sleep_save_sp @ stack phys addr
121#endif 121#endif
122 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off 122 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
123#ifdef MULTI_CPU 123#ifdef MULTI_CPU
124 ldmia r0!, {r1, sp, lr, pc} @ load v:p, stack, return fn, resume fn 124 @ load v:p, stack, return fn, resume fn
125 ARM( ldmia r0!, {r1, sp, lr, pc} )
126THUMB( ldmia r0!, {r1, r2, r3, r4} )
127THUMB( mov sp, r2 )
128THUMB( mov lr, r3 )
129THUMB( bx r4 )
125#else 130#else
126 ldmia r0!, {r1, sp, lr} @ load v:p, stack, return fn 131 @ load v:p, stack, return fn
132 ARM( ldmia r0!, {r1, sp, lr} )
133THUMB( ldmia r0!, {r1, r2, lr} )
134THUMB( mov sp, r2 )
127 b cpu_do_resume 135 b cpu_do_resume
128#endif 136#endif
129ENDPROC(cpu_resume) 137ENDPROC(cpu_resume)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 4539ebcb089f..8fe05ad932e4 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -474,13 +474,12 @@ static void smp_timer_broadcast(const struct cpumask *mask)
474#define smp_timer_broadcast NULL 474#define smp_timer_broadcast NULL
475#endif 475#endif
476 476
477#ifndef CONFIG_LOCAL_TIMERS
478static void broadcast_timer_set_mode(enum clock_event_mode mode, 477static void broadcast_timer_set_mode(enum clock_event_mode mode,
479 struct clock_event_device *evt) 478 struct clock_event_device *evt)
480{ 479{
481} 480}
482 481
483static void local_timer_setup(struct clock_event_device *evt) 482static void broadcast_timer_setup(struct clock_event_device *evt)
484{ 483{
485 evt->name = "dummy_timer"; 484 evt->name = "dummy_timer";
486 evt->features = CLOCK_EVT_FEAT_ONESHOT | 485 evt->features = CLOCK_EVT_FEAT_ONESHOT |
@@ -492,7 +491,6 @@ static void local_timer_setup(struct clock_event_device *evt)
492 491
493 clockevents_register_device(evt); 492 clockevents_register_device(evt);
494} 493}
495#endif
496 494
497void __cpuinit percpu_timer_setup(void) 495void __cpuinit percpu_timer_setup(void)
498{ 496{
@@ -502,7 +500,8 @@ void __cpuinit percpu_timer_setup(void)
502 evt->cpumask = cpumask_of(cpu); 500 evt->cpumask = cpumask_of(cpu);
503 evt->broadcast = smp_timer_broadcast; 501 evt->broadcast = smp_timer_broadcast;
504 502
505 local_timer_setup(evt); 503 if (local_timer_setup(evt))
504 broadcast_timer_setup(evt);
506} 505}
507 506
508#ifdef CONFIG_HOTPLUG_CPU 507#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 7a5760922914..40ee7e5045e4 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -158,7 +158,7 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
158 158
159 if (res == 0) { 159 if (res == 0) {
160 /* 160 /*
161 * Barrier also required between aquiring a lock for a 161 * Barrier also required between acquiring a lock for a
162 * protected resource and accessing the resource. Inserted for 162 * protected resource and accessing the resource. Inserted for
163 * same reason as above. 163 * same reason as above.
164 */ 164 */
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 21ac43f1c2d0..3b54ad19d489 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -410,8 +410,7 @@ static int bad_syscall(int n, struct pt_regs *regs)
410 struct thread_info *thread = current_thread_info(); 410 struct thread_info *thread = current_thread_info();
411 siginfo_t info; 411 siginfo_t info;
412 412
413 if (current->personality != PER_LINUX && 413 if ((current->personality & PER_MASK) != PER_LINUX &&
414 current->personality != PER_LINUX_32BIT &&
415 thread->exec_domain->handler) { 414 thread->exec_domain->handler) {
416 thread->exec_domain->handler(n, regs); 415 thread->exec_domain->handler(n, regs);
417 return regs->ARM_r0; 416 return regs->ARM_r0;
@@ -712,17 +711,17 @@ EXPORT_SYMBOL(__readwrite_bug);
712 711
713void __pte_error(const char *file, int line, pte_t pte) 712void __pte_error(const char *file, int line, pte_t pte)
714{ 713{
715 printk("%s:%d: bad pte %08lx.\n", file, line, pte_val(pte)); 714 printk("%s:%d: bad pte %08llx.\n", file, line, (long long)pte_val(pte));
716} 715}
717 716
718void __pmd_error(const char *file, int line, pmd_t pmd) 717void __pmd_error(const char *file, int line, pmd_t pmd)
719{ 718{
720 printk("%s:%d: bad pmd %08lx.\n", file, line, pmd_val(pmd)); 719 printk("%s:%d: bad pmd %08llx.\n", file, line, (long long)pmd_val(pmd));
721} 720}
722 721
723void __pgd_error(const char *file, int line, pgd_t pgd) 722void __pgd_error(const char *file, int line, pgd_t pgd)
724{ 723{
725 printk("%s:%d: bad pgd %08lx.\n", file, line, pgd_val(pgd)); 724 printk("%s:%d: bad pgd %08llx.\n", file, line, (long long)pgd_val(pgd));
726} 725}
727 726
728asmlinkage void __div0(void) 727asmlinkage void __div0(void)
diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c
index e2d2f2cd0c4f..8b9b13649f81 100644
--- a/arch/arm/lib/uaccess_with_memcpy.c
+++ b/arch/arm/lib/uaccess_with_memcpy.c
@@ -27,13 +27,18 @@ pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp)
27 pgd_t *pgd; 27 pgd_t *pgd;
28 pmd_t *pmd; 28 pmd_t *pmd;
29 pte_t *pte; 29 pte_t *pte;
30 pud_t *pud;
30 spinlock_t *ptl; 31 spinlock_t *ptl;
31 32
32 pgd = pgd_offset(current->mm, addr); 33 pgd = pgd_offset(current->mm, addr);
33 if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd))) 34 if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd)))
34 return 0; 35 return 0;
35 36
36 pmd = pmd_offset(pgd, addr); 37 pud = pud_offset(pgd, addr);
38 if (unlikely(pud_none(*pud) || pud_bad(*pud)))
39 return 0;
40
41 pmd = pmd_offset(pud, addr);
37 if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd))) 42 if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd)))
38 return 0; 43 return 0;
39 44
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 308ce7a87edd..21020ceb2f3a 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 return; 72 return;
73 73
74 if (cpu_is_at91cap9_revB()) 74 if (cpu_is_at91cap9_revB())
75 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); 75 irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
76 76
77 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
78 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
@@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = {
157void __init at91_add_device_usba(struct usba_platform_data *data) 157void __init at91_add_device_usba(struct usba_platform_data *data)
158{ 158{
159 if (cpu_is_at91cap9_revB()) { 159 if (cpu_is_at91cap9_revB()) {
160 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); 160 irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
161 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | 161 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
162 AT91_MATRIX_UDPHS_BYPASS_LOCK); 162 AT91_MATRIX_UDPHS_BYPASS_LOCK);
163 } 163 }
@@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
861 return; 861 return;
862 862
863 if (cpu_is_at91cap9_revB()) 863 if (cpu_is_at91cap9_revB())
864 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); 864 irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
865 865
866 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ 866 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
867 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ 867 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 2e74a19874d1..295e1e77fa60 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -76,7 +76,7 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
76 .pullup_pin = AT91_PIN_PD9, 76 .pullup_pin = AT91_PIN_PD9,
77}; 77};
78 78
79/* FIXME: user dependant */ 79/* FIXME: user dependent */
80// static struct at91_cf_data __initdata carmeva_cf_data = { 80// static struct at91_cf_data __initdata carmeva_cf_data = {
81// .det_pin = AT91_PIN_PB0, 81// .det_pin = AT91_PIN_PB0,
82// .rst_pin = AT91_PIN_PC5, 82// .rst_pin = AT91_PIN_PC5,
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index af818a21587c..4615528205c8 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
287 else 287 else
288 wakeups[bank] &= ~mask; 288 wakeups[bank] &= ~mask;
289 289
290 set_irq_wake(gpio_chip[bank].bank->id, state); 290 irq_set_irq_wake(gpio_chip[bank].bank->id, state);
291 291
292 return 0; 292 return 0;
293} 293}
@@ -375,6 +375,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
375 375
376static struct irq_chip gpio_irqchip = { 376static struct irq_chip gpio_irqchip = {
377 .name = "GPIO", 377 .name = "GPIO",
378 .irq_disable = gpio_irq_mask,
378 .irq_mask = gpio_irq_mask, 379 .irq_mask = gpio_irq_mask,
379 .irq_unmask = gpio_irq_unmask, 380 .irq_unmask = gpio_irq_unmask,
380 .irq_set_type = gpio_irq_type, 381 .irq_set_type = gpio_irq_type,
@@ -384,16 +385,14 @@ static struct irq_chip gpio_irqchip = {
384static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 385static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
385{ 386{
386 unsigned pin; 387 unsigned pin;
387 struct irq_desc *gpio; 388 struct irq_data *idata = irq_desc_get_irq_data(desc);
388 struct at91_gpio_chip *at91_gpio; 389 struct irq_chip *chip = irq_data_get_irq_chip(idata);
389 void __iomem *pio; 390 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
391 void __iomem *pio = at91_gpio->regbase;
390 u32 isr; 392 u32 isr;
391 393
392 at91_gpio = get_irq_chip_data(irq);
393 pio = at91_gpio->regbase;
394
395 /* temporarily mask (level sensitive) parent IRQ */ 394 /* temporarily mask (level sensitive) parent IRQ */
396 desc->irq_data.chip->irq_ack(&desc->irq_data); 395 chip->irq_ack(idata);
397 for (;;) { 396 for (;;) {
398 /* Reading ISR acks pending (edge triggered) GPIO interrupts. 397 /* Reading ISR acks pending (edge triggered) GPIO interrupts.
399 * When there none are pending, we're finished unless we need 398 * When there none are pending, we're finished unless we need
@@ -409,27 +408,15 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
409 } 408 }
410 409
411 pin = at91_gpio->chip.base; 410 pin = at91_gpio->chip.base;
412 gpio = &irq_desc[pin];
413 411
414 while (isr) { 412 while (isr) {
415 if (isr & 1) { 413 if (isr & 1)
416 if (unlikely(gpio->depth)) { 414 generic_handle_irq(pin);
417 /*
418 * The core ARM interrupt handler lazily disables IRQs so
419 * another IRQ must be generated before it actually gets
420 * here to be disabled on the GPIO controller.
421 */
422 gpio_irq_mask(irq_get_irq_data(pin));
423 }
424 else
425 generic_handle_irq(pin);
426 }
427 pin++; 415 pin++;
428 gpio++;
429 isr >>= 1; 416 isr >>= 1;
430 } 417 }
431 } 418 }
432 desc->irq_data.chip->irq_unmask(&desc->irq_data); 419 chip->irq_unmask(idata);
433 /* now it may re-trigger */ 420 /* now it may re-trigger */
434} 421}
435 422
@@ -518,14 +505,14 @@ void __init at91_gpio_irq_setup(void)
518 __raw_writel(~0, this->regbase + PIO_IDR); 505 __raw_writel(~0, this->regbase + PIO_IDR);
519 506
520 for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { 507 for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
521 lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class); 508 irq_set_lockdep_class(pin, &gpio_lock_class);
522 509
523 /* 510 /*
524 * Can use the "simple" and not "edge" handler since it's 511 * Can use the "simple" and not "edge" handler since it's
525 * shorter, and the AIC handles interrupts sanely. 512 * shorter, and the AIC handles interrupts sanely.
526 */ 513 */
527 set_irq_chip(pin, &gpio_irqchip); 514 irq_set_chip_and_handler(pin, &gpio_irqchip,
528 set_irq_handler(pin, handle_simple_irq); 515 handle_simple_irq);
529 set_irq_flags(pin, IRQF_VALID); 516 set_irq_flags(pin, IRQF_VALID);
530 } 517 }
531 518
@@ -536,8 +523,8 @@ void __init at91_gpio_irq_setup(void)
536 if (prev && prev->next == this) 523 if (prev && prev->next == this)
537 continue; 524 continue;
538 525
539 set_irq_chip_data(id, this); 526 irq_set_chip_data(id, this);
540 set_irq_chained_handler(id, gpio_irq_handler); 527 irq_set_chained_handler(id, gpio_irq_handler);
541 } 528 }
542 pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); 529 pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
543} 530}
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf.h b/arch/arm/mach-at91/include/mach/at572d940hf.h
index 2d9b0af9c4d5..be510cfc56be 100644
--- a/arch/arm/mach-at91/include/mach/at572d940hf.h
+++ b/arch/arm/mach-at91/include/mach/at572d940hf.h
@@ -89,7 +89,7 @@
89/* 89/*
90 * System Peripherals (offset from AT91_BASE_SYS) 90 * System Peripherals (offset from AT91_BASE_SYS)
91 */ 91 */
92#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) 92#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
93#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) 93#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
94#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 94#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
95#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 95#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
index 27ac6f550fe3..02182c16a022 100644
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -102,7 +102,7 @@
102#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ 102#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */
103#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ 103#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */
104#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ 104#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */
105#define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ 105#define AT91_MCI_RTOE (1 << 20) /* Response Time-out Error */
106#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ 106#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */
107#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ 107#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */
108#define AT91_MCI_OVRE (1 << 30) /* Overrun */ 108#define AT91_MCI_OVRE (1 << 30) /* Overrun */
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index ddeb64536756..056dc6674b6b 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -208,7 +208,7 @@ extern void at91_gpio_resume(void);
208 208
209/*-------------------------------------------------------------------------*/ 209/*-------------------------------------------------------------------------*/
210 210
211/* wrappers for "new style" GPIO calls. the old AT91-specfic ones should 211/* wrappers for "new style" GPIO calls. the old AT91-specific ones should
212 * eventually be removed (along with this errno.h inclusion), and the 212 * eventually be removed (along with this errno.h inclusion), and the
213 * gpio request/free calls should probably be implemented. 213 * gpio request/free calls should probably be implemented.
214 */ 214 */
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index b56d6b3a4087..9665265ec757 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -143,8 +143,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
143 /* Active Low interrupt, with the specified priority */ 143 /* Active Low interrupt, with the specified priority */
144 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 144 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
145 145
146 set_irq_chip(i, &at91_aic_chip); 146 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
147 set_irq_handler(i, handle_level_irq);
148 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 147 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
149 148
150 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ 149 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
index 77f84b40dda9..a1f328357aa4 100644
--- a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
+++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
@@ -551,7 +551,7 @@ int dmacHw_calculateDescriptorCount(dmacHw_CONFIG_t *pConfig, /* [ IN ] Config
551 551
552/****************************************************************************/ 552/****************************************************************************/
553/** 553/**
554* @brief Check the existance of pending descriptor 554* @brief Check the existence of pending descriptor
555* 555*
556* This function confirmes if there is any pending descriptor in the chain 556* This function confirmes if there is any pending descriptor in the chain
557* to program the channel 557* to program the channel
@@ -775,7 +775,7 @@ int dmacHw_setVariableDataDescriptor(dmacHw_HANDLE_t handle, /* [ IN ] DMA Cha
775/** 775/**
776* @brief Read data DMAed to memory 776* @brief Read data DMAed to memory
777* 777*
778* This function will read data that has been DMAed to memory while transfering from: 778* This function will read data that has been DMAed to memory while transferring from:
779* - Memory to memory 779* - Memory to memory
780* - Peripheral to memory 780* - Peripheral to memory
781* 781*
@@ -941,7 +941,7 @@ int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configurat
941/** 941/**
942* @brief Sets channel specific user data 942* @brief Sets channel specific user data
943* 943*
944* This function associates user data to a specif DMA channel 944* This function associates user data to a specific DMA channel
945* 945*
946*/ 946*/
947/****************************************************************************/ 947/****************************************************************************/
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 8d1baf3f4683..d87ad30dda35 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -629,7 +629,7 @@ EXPORT_SYMBOL(dma_get_device_descriptor_ring);
629* Configures a DMA channel. 629* Configures a DMA channel.
630* 630*
631* @return 631* @return
632* >= 0 - Initialization was successfull. 632* >= 0 - Initialization was successful.
633* 633*
634* -EBUSY - Device is currently being used. 634* -EBUSY - Device is currently being used.
635* -ENODEV - Device handed in is invalid. 635* -ENODEV - Device handed in is invalid.
@@ -673,7 +673,7 @@ static int ConfigChannel(DMA_Handle_t handle)
673/** 673/**
674* Initializes all of the data structures associated with the DMA. 674* Initializes all of the data structures associated with the DMA.
675* @return 675* @return
676* >= 0 - Initialization was successfull. 676* >= 0 - Initialization was successful.
677* 677*
678* -EBUSY - Device is currently being used. 678* -EBUSY - Device is currently being used.
679* -ENODEV - Device handed in is invalid. 679* -ENODEV - Device handed in is invalid.
diff --git a/arch/arm/mach-bcmring/include/csp/dmacHw.h b/arch/arm/mach-bcmring/include/csp/dmacHw.h
index 6c8da2b9fc1f..e6a1dc484ca7 100644
--- a/arch/arm/mach-bcmring/include/csp/dmacHw.h
+++ b/arch/arm/mach-bcmring/include/csp/dmacHw.h
@@ -362,7 +362,7 @@ int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configurati
362/** 362/**
363* @brief Read data DMA transferred to memory 363* @brief Read data DMA transferred to memory
364* 364*
365* This function will read data that has been DMAed to memory while transfering from: 365* This function will read data that has been DMAed to memory while transferring from:
366* - Memory to memory 366* - Memory to memory
367* - Peripheral to memory 367* - Peripheral to memory
368* 368*
@@ -446,7 +446,7 @@ void dmacHw_stopTransfer(dmacHw_HANDLE_t handle /* [ IN ] DMA Channel handle *
446 446
447/****************************************************************************/ 447/****************************************************************************/
448/** 448/**
449* @brief Check the existance of pending descriptor 449* @brief Check the existence of pending descriptor
450* 450*
451* This function confirmes if there is any pending descriptor in the chain 451* This function confirmes if there is any pending descriptor in the chain
452* to program the channel 452* to program the channel
@@ -542,7 +542,7 @@ dmacHw_HANDLE_t dmacHw_getInterruptSource(void);
542/** 542/**
543* @brief Sets channel specific user data 543* @brief Sets channel specific user data
544* 544*
545* This function associates user data to a specif DMA channel 545* This function associates user data to a specific DMA channel
546* 546*
547*/ 547*/
548/****************************************************************************/ 548/****************************************************************************/
diff --git a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
index 70eaea866cfe..161973385faf 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
@@ -180,7 +180,7 @@ typedef enum {
180 180
181#define chipcHw_XTAL_FREQ_Hz 25000000 /* Reference clock frequency in Hz */ 181#define chipcHw_XTAL_FREQ_Hz 25000000 /* Reference clock frequency in Hz */
182 182
183/* Programable pin defines */ 183/* Programmable pin defines */
184#define chipcHw_PIN_GPIO(n) ((((n) >= 0) && ((n) < (chipcHw_GPIO_COUNT))) ? (n) : 0xFFFFFFFF) 184#define chipcHw_PIN_GPIO(n) ((((n) >= 0) && ((n) < (chipcHw_GPIO_COUNT))) ? (n) : 0xFFFFFFFF)
185 /* GPIO pin 0 - 60 */ 185 /* GPIO pin 0 - 60 */
186#define chipcHw_PIN_UARTTXD (chipcHw_GPIO_COUNT + 0) /* UART Transmit */ 186#define chipcHw_PIN_UARTTXD (chipcHw_GPIO_COUNT + 0) /* UART Transmit */
diff --git a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
index c78833acb37a..03238c299001 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
@@ -832,7 +832,7 @@ static inline void chipcHw_setUsbDevice(void)
832 832
833/****************************************************************************/ 833/****************************************************************************/
834/** 834/**
835* @brief Lower layer funtion to enable/disable a clock of a certain device 835* @brief Lower layer function to enable/disable a clock of a certain device
836* 836*
837* This function enables/disables a core clock 837* This function enables/disables a core clock
838* 838*
diff --git a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
index e01fc4607c91..0aeb6a6fe7f8 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
@@ -109,9 +109,9 @@
109#define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM) 109#define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM)
110 110
111/* INTC1 - interrupt controller 1 */ 111/* INTC1 - interrupt controller 1 */
112#define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interupt (Not for A0) */ 112#define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interrupt (Not for A0) */
113#define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */ 113#define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */
114#define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interupt (For A0 only)) */ 114#define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interrupt (For A0 only)) */
115#define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */ 115#define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */
116#define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */ 116#define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */
117/* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */ 117/* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */
diff --git a/arch/arm/mach-bcmring/include/mach/reg_umi.h b/arch/arm/mach-bcmring/include/mach/reg_umi.h
index 06a355481ea6..0992842caa77 100644
--- a/arch/arm/mach-bcmring/include/mach/reg_umi.h
+++ b/arch/arm/mach-bcmring/include/mach/reg_umi.h
@@ -88,7 +88,7 @@
88/* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */ 88/* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */
89/* Enable wait pin during burst write or read */ 89/* Enable wait pin during burst write or read */
90#define REG_UMI_TCR_WAITEN 0x80000000 90#define REG_UMI_TCR_WAITEN 0x80000000
91/* Enable mem ctrlr to work iwth ext mem of lower freq than AHB clk */ 91/* Enable mem ctrlr to work with ext mem of lower freq than AHB clk */
92#define REG_UMI_TCR_LOWFREQ 0x40000000 92#define REG_UMI_TCR_LOWFREQ 0x40000000
93/* 1=synch write, 0=async write */ 93/* 1=synch write, 0=async write */
94#define REG_UMI_TCR_MEMTYPE_SYNCWRITE 0x20000000 94#define REG_UMI_TCR_MEMTYPE_SYNCWRITE 0x20000000
diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c
index 84dcda0d1d9a..c48feaf4e8e9 100644
--- a/arch/arm/mach-bcmring/irq.c
+++ b/arch/arm/mach-bcmring/irq.c
@@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip,
93 unsigned int i; 93 unsigned int i;
94 for (i = 0; i < 32; i++) { 94 for (i = 0; i < 32; i++) {
95 unsigned int irq = irq_start + i; 95 unsigned int irq = irq_start + i;
96 set_irq_chip(irq, chip); 96 irq_set_chip(irq, chip);
97 set_irq_chip_data(irq, base); 97 irq_set_chip_data(irq, base);
98 98
99 if (vic_sources & (1 << i)) { 99 if (vic_sources & (1 << i)) {
100 set_irq_handler(irq, handle_level_irq); 100 irq_set_handler(irq, handle_level_irq);
101 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 101 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
102 } 102 }
103 } 103 }
@@ -119,9 +119,9 @@ void __init bcmring_init_irq(void)
119 119
120 /* special cases */ 120 /* special cases */
121 if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) { 121 if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
122 set_irq_handler(IRQ_GPIO0, handle_simple_irq); 122 irq_set_handler(IRQ_GPIO0, handle_simple_irq);
123 } 123 }
124 if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) { 124 if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
125 set_irq_handler(IRQ_GPIO1, handle_simple_irq); 125 irq_set_handler(IRQ_GPIO1, handle_simple_irq);
126 } 126 }
127} 127}
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c
index 86da7a1b2bbe..c2eceee645e3 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/irq.c
@@ -112,13 +112,13 @@ void __init clps711x_init_irq(void)
112 112
113 for (i = 0; i < NR_IRQS; i++) { 113 for (i = 0; i < NR_IRQS; i++) {
114 if (INT1_IRQS & (1 << i)) { 114 if (INT1_IRQS & (1 << i)) {
115 set_irq_handler(i, handle_level_irq); 115 irq_set_chip_and_handler(i, &int1_chip,
116 set_irq_chip(i, &int1_chip); 116 handle_level_irq);
117 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 117 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
118 } 118 }
119 if (INT2_IRQS & (1 << i)) { 119 if (INT2_IRQS & (1 << i)) {
120 set_irq_handler(i, handle_level_irq); 120 irq_set_chip_and_handler(i, &int2_chip,
121 set_irq_chip(i, &int2_chip); 121 handle_level_irq);
122 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 122 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
123 } 123 }
124 } 124 }
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 6c389ff1020e..3e7be2de96de 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -11,7 +11,7 @@
11 * DM644X-EVM board. It has: 11 * DM644X-EVM board. It has:
12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC, 12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video. 13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
14 * Additionaly realtime clock, IR remote control receiver, 14 * Additionally realtime clock, IR remote control receiver,
15 * IR Blaster based on MSP430 (firmware although is different 15 * IR Blaster based on MSP430 (firmware although is different
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive 16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds. 17 * with PATA interface, two muxed red-green leds.
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 9abc80a86a22..f83152d643c5 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -167,9 +167,9 @@ void __init cp_intc_init(void)
167 167
168 /* Set up genirq dispatching for cp_intc */ 168 /* Set up genirq dispatching for cp_intc */
169 for (i = 0; i < num_irq; i++) { 169 for (i = 0; i < num_irq; i++) {
170 set_irq_chip(i, &cp_intc_irq_chip); 170 irq_set_chip(i, &cp_intc_irq_chip);
171 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 171 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
172 set_irq_handler(i, handle_edge_irq); 172 irq_set_handler(i, handle_edge_irq);
173 } 173 }
174 174
175 /* Enable global interrupt */ 175 /* Enable global interrupt */
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index 4a68c2b1ec11..0a95be1512bb 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -167,7 +167,7 @@ static int davinci_cpu_init(struct cpufreq_policy *policy)
167 /* 167 /*
168 * Time measurement across the target() function yields ~1500-1800us 168 * Time measurement across the target() function yields ~1500-1800us
169 * time taken with no drivers on notification list. 169 * time taken with no drivers on notification list.
170 * Setting the latency to 2000 us to accomodate addition of drivers 170 * Setting the latency to 2000 us to accommodate addition of drivers
171 * to pre/post change notification list. 171 * to pre/post change notification list.
172 */ 172 */
173 policy->cpuinfo.transition_latency = 2000 * 1000; 173 policy->cpuinfo.transition_latency = 2000 * 1000;
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c289d77..b95b9196deed 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1123,7 +1123,7 @@ void __init da850_init(void)
1123 * This helps keeping the peripherals on this domain insulated 1123 * This helps keeping the peripherals on this domain insulated
1124 * from CPU frequency changes caused by DVFS. The firmware sets 1124 * from CPU frequency changes caused by DVFS. The firmware sets
1125 * both PLL0 and PLL1 to the same frequency so, there should not 1125 * both PLL0 and PLL1 to the same frequency so, there should not
1126 * be any noticible change even in non-DVFS use cases. 1126 * be any noticeable change even in non-DVFS use cases.
1127 */ 1127 */
1128 da850_set_async3_src(1); 1128 da850_set_async3_src(1);
1129 1129
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 76364d1345df..f68012239641 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -314,7 +314,7 @@ static struct clk timer2_clk = {
314 .name = "timer2", 314 .name = "timer2",
315 .parent = &pll1_aux_clk, 315 .parent = &pll1_aux_clk,
316 .lpsc = DAVINCI_LPSC_TIMER2, 316 .lpsc = DAVINCI_LPSC_TIMER2,
317 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 317 .usecount = 1, /* REVISIT: why can't' this be disabled? */
318}; 318};
319 319
320static struct clk timer3_clk = { 320static struct clk timer3_clk = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 9a2376b3137c..5f8a65424184 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -274,7 +274,7 @@ static struct clk timer2_clk = {
274 .name = "timer2", 274 .name = "timer2",
275 .parent = &pll1_aux_clk, 275 .parent = &pll1_aux_clk,
276 .lpsc = DAVINCI_LPSC_TIMER2, 276 .lpsc = DAVINCI_LPSC_TIMER2,
277 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 277 .usecount = 1, /* REVISIT: why can't' this be disabled? */
278}; 278};
279 279
280static struct clk_lookup dm644x_clks[] = { 280static struct clk_lookup dm644x_clks[] = {
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 20d66e5e4663..a0b838894ac9 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
62{ 62{
63 struct davinci_gpio_regs __iomem *g; 63 struct davinci_gpio_regs __iomem *g;
64 64
65 g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq); 65 g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq);
66 66
67 return g; 67 return g;
68} 68}
@@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup);
208static void gpio_irq_disable(struct irq_data *d) 208static void gpio_irq_disable(struct irq_data *d)
209{ 209{
210 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); 210 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
211 u32 mask = (u32) irq_data_get_irq_data(d); 211 u32 mask = (u32) irq_data_get_irq_handler_data(d);
212 212
213 __raw_writel(mask, &g->clr_falling); 213 __raw_writel(mask, &g->clr_falling);
214 __raw_writel(mask, &g->clr_rising); 214 __raw_writel(mask, &g->clr_rising);
@@ -217,8 +217,8 @@ static void gpio_irq_disable(struct irq_data *d)
217static void gpio_irq_enable(struct irq_data *d) 217static void gpio_irq_enable(struct irq_data *d)
218{ 218{
219 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); 219 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
220 u32 mask = (u32) irq_data_get_irq_data(d); 220 u32 mask = (u32) irq_data_get_irq_handler_data(d);
221 unsigned status = irq_desc[d->irq].status; 221 unsigned status = irqd_get_trigger_type(d);
222 222
223 status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; 223 status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
224 if (!status) 224 if (!status)
@@ -233,21 +233,11 @@ static void gpio_irq_enable(struct irq_data *d)
233static int gpio_irq_type(struct irq_data *d, unsigned trigger) 233static int gpio_irq_type(struct irq_data *d, unsigned trigger)
234{ 234{
235 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); 235 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
236 u32 mask = (u32) irq_data_get_irq_data(d); 236 u32 mask = (u32) irq_data_get_irq_handler_data(d);
237 237
238 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 238 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
239 return -EINVAL; 239 return -EINVAL;
240 240
241 irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
242 irq_desc[d->irq].status |= trigger;
243
244 /* don't enable the IRQ if it's currently disabled */
245 if (irq_desc[d->irq].depth == 0) {
246 __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
247 ? &g->set_falling : &g->clr_falling);
248 __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
249 ? &g->set_rising : &g->clr_rising);
250 }
251 return 0; 241 return 0;
252} 242}
253 243
@@ -256,6 +246,7 @@ static struct irq_chip gpio_irqchip = {
256 .irq_enable = gpio_irq_enable, 246 .irq_enable = gpio_irq_enable,
257 .irq_disable = gpio_irq_disable, 247 .irq_disable = gpio_irq_disable,
258 .irq_set_type = gpio_irq_type, 248 .irq_set_type = gpio_irq_type,
249 .flags = IRQCHIP_SET_TYPE_MASKED,
259}; 250};
260 251
261static void 252static void
@@ -285,7 +276,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
285 status >>= 16; 276 status >>= 16;
286 277
287 /* now demux them to the right lowlevel handler */ 278 /* now demux them to the right lowlevel handler */
288 n = (int)get_irq_data(irq); 279 n = (int)irq_get_handler_data(irq);
289 while (status) { 280 while (status) {
290 res = ffs(status); 281 res = ffs(status);
291 n += res; 282 n += res;
@@ -323,7 +314,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
323static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) 314static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
324{ 315{
325 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); 316 struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
326 u32 mask = (u32) irq_data_get_irq_data(d); 317 u32 mask = (u32) irq_data_get_irq_handler_data(d);
327 318
328 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 319 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
329 return -EINVAL; 320 return -EINVAL;
@@ -395,7 +386,7 @@ static int __init davinci_gpio_irq_setup(void)
395 386
396 /* AINTC handles mask/unmask; GPIO handles triggering */ 387 /* AINTC handles mask/unmask; GPIO handles triggering */
397 irq = bank_irq; 388 irq = bank_irq;
398 gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); 389 gpio_irqchip_unbanked = *irq_get_chip(irq);
399 gpio_irqchip_unbanked.name = "GPIO-AINTC"; 390 gpio_irqchip_unbanked.name = "GPIO-AINTC";
400 gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; 391 gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
401 392
@@ -406,10 +397,10 @@ static int __init davinci_gpio_irq_setup(void)
406 397
407 /* set the direct IRQs up to use that irqchip */ 398 /* set the direct IRQs up to use that irqchip */
408 for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { 399 for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
409 set_irq_chip(irq, &gpio_irqchip_unbanked); 400 irq_set_chip(irq, &gpio_irqchip_unbanked);
410 set_irq_data(irq, (void *) __gpio_mask(gpio)); 401 irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
411 set_irq_chip_data(irq, (__force void *) g); 402 irq_set_chip_data(irq, (__force void *)g);
412 irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH; 403 irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
413 } 404 }
414 405
415 goto done; 406 goto done;
@@ -430,15 +421,15 @@ static int __init davinci_gpio_irq_setup(void)
430 __raw_writel(~0, &g->clr_rising); 421 __raw_writel(~0, &g->clr_rising);
431 422
432 /* set up all irqs in this bank */ 423 /* set up all irqs in this bank */
433 set_irq_chained_handler(bank_irq, gpio_irq_handler); 424 irq_set_chained_handler(bank_irq, gpio_irq_handler);
434 set_irq_chip_data(bank_irq, (__force void *) g); 425 irq_set_chip_data(bank_irq, (__force void *)g);
435 set_irq_data(bank_irq, (void *) irq); 426 irq_set_handler_data(bank_irq, (void *)irq);
436 427
437 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { 428 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
438 set_irq_chip(irq, &gpio_irqchip); 429 irq_set_chip(irq, &gpio_irqchip);
439 set_irq_chip_data(irq, (__force void *) g); 430 irq_set_chip_data(irq, (__force void *)g);
440 set_irq_data(irq, (void *) __gpio_mask(gpio)); 431 irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
441 set_irq_handler(irq, handle_simple_irq); 432 irq_set_handler(irq, handle_simple_irq);
442 set_irq_flags(irq, IRQF_VALID); 433 set_irq_flags(irq, IRQF_VALID);
443 } 434 }
444 435
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h
index cea6b8972043..957fb87e832e 100644
--- a/arch/arm/mach-davinci/include/mach/cputype.h
+++ b/arch/arm/mach-davinci/include/mach/cputype.h
@@ -4,7 +4,7 @@
4 * Author: Kevin Hilman, Deep Root Systems, LLC 4 * Author: Kevin Hilman, Deep Root Systems, LLC
5 * 5 *
6 * Defines the cpu_is_*() macros for runtime detection of DaVinci 6 * Defines the cpu_is_*() macros for runtime detection of DaVinci
7 * device type. In addtion, if support for a given device is not 7 * device type. In addition, if support for a given device is not
8 * compiled in to the kernel, the macros return 0 so that 8 * compiled in to the kernel, the macros return 0 so that
9 * resulting code can be optimized out. 9 * resulting code can be optimized out.
10 * 10 *
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 5e05c9b64e1f..e6269a6e0014 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -154,11 +154,11 @@ void __init davinci_irq_init(void)
154 154
155 /* set up genirq dispatch for ARM INTC */ 155 /* set up genirq dispatch for ARM INTC */
156 for (i = 0; i < davinci_soc_info.intc_irq_num; i++) { 156 for (i = 0; i < davinci_soc_info.intc_irq_num; i++) {
157 set_irq_chip(i, &davinci_irq_chip_0); 157 irq_set_chip(i, &davinci_irq_chip_0);
158 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 158 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
159 if (i != IRQ_TINT1_TINT34) 159 if (i != IRQ_TINT1_TINT34)
160 set_irq_handler(i, handle_edge_irq); 160 irq_set_handler(i, handle_edge_irq);
161 else 161 else
162 set_irq_handler(i, handle_level_irq); 162 irq_set_handler(i, handle_level_irq);
163 } 163 }
164} 164}
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index e5fcdd3f5bf5..b20ec9af7882 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -136,7 +136,7 @@
136#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) 136#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
137#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) 137#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
138#define DOVE_NAND_GPIO_EN (1 << 0) 138#define DOVE_NAND_GPIO_EN (1 << 0)
139#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40) 139#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_LO_VIRT_BASE + 0x40)
140#define DOVE_SPI_GPIO_SEL (1 << 5) 140#define DOVE_SPI_GPIO_SEL (1 << 5)
141#define DOVE_UART1_GPIO_SEL (1 << 4) 141#define DOVE_UART1_GPIO_SEL (1 << 4)
142#define DOVE_AU1_GPIO_SEL (1 << 3) 142#define DOVE_AU1_GPIO_SEL (1 << 3)
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 101707fa2e2c..f07fd16e0c9b 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -86,8 +86,7 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
86 if (!(cause & (1 << irq))) 86 if (!(cause & (1 << irq)))
87 continue; 87 continue;
88 irq = pmu_to_irq(irq); 88 irq = pmu_to_irq(irq);
89 desc = irq_desc + irq; 89 generic_handle_irq(irq);
90 desc_handle_irq(irq, desc);
91 } 90 }
92} 91}
93 92
@@ -103,14 +102,14 @@ void __init dove_init_irq(void)
103 */ 102 */
104 orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, 103 orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
105 IRQ_DOVE_GPIO_START); 104 IRQ_DOVE_GPIO_START);
106 set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); 105 irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
107 set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); 106 irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
108 set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); 107 irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
109 set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); 108 irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
110 109
111 orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, 110 orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
112 IRQ_DOVE_GPIO_START + 32); 111 IRQ_DOVE_GPIO_START + 32);
113 set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); 112 irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
114 113
115 orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0, 114 orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
116 IRQ_DOVE_GPIO_START + 64); 115 IRQ_DOVE_GPIO_START + 64);
@@ -122,10 +121,9 @@ void __init dove_init_irq(void)
122 writel(0, PMU_INTERRUPT_CAUSE); 121 writel(0, PMU_INTERRUPT_CAUSE);
123 122
124 for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { 123 for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
125 set_irq_chip(i, &pmu_irq_chip); 124 irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq);
126 set_irq_handler(i, handle_level_irq); 125 irq_set_status_flags(i, IRQ_LEVEL);
127 irq_desc[i].status |= IRQ_LEVEL;
128 set_irq_flags(i, IRQF_VALID); 126 set_irq_flags(i, IRQF_VALID);
129 } 127 }
130 set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); 128 irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
131} 129}
diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c
index 71db2bdf2f28..c66c76346904 100644
--- a/arch/arm/mach-dove/mpp.c
+++ b/arch/arm/mach-dove/mpp.c
@@ -147,9 +147,6 @@ void __init dove_mpp_conf(unsigned int *mpp_list)
147 u32 pmu_sig_ctrl[PMU_SIG_REGS]; 147 u32 pmu_sig_ctrl[PMU_SIG_REGS];
148 int i; 148 int i;
149 149
150 /* Initialize gpiolib. */
151 orion_gpio_init();
152
153 for (i = 0; i < MPP_NR_REGS; i++) 150 for (i = 0; i < MPP_NR_REGS; i++)
154 mpp_ctrl[i] = readl(MPP_CTRL(i)); 151 mpp_ctrl[i] = readl(MPP_CTRL(i));
155 152
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 7df083f37fa7..087bc771ac23 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -66,8 +66,8 @@ static void __init ebsa110_init_irq(void)
66 local_irq_restore(flags); 66 local_irq_restore(flags);
67 67
68 for (irq = 0; irq < NR_IRQS; irq++) { 68 for (irq = 0; irq < NR_IRQS; irq++) {
69 set_irq_chip(irq, &ebsa110_irq_chip); 69 irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
70 set_irq_handler(irq, handle_level_irq); 70 handle_level_irq);
71 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 71 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
72 } 72 }
73} 73}
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index a889fa7c3ba1..a5a9ff70b198 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -101,7 +101,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
101static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) 101static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
102{ 102{
103 /* 103 /*
104 * map discontiguous hw irq range to continous sw irq range: 104 * map discontiguous hw irq range to continuous sw irq range:
105 * 105 *
106 * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7}) 106 * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7})
107 */ 107 */
@@ -117,7 +117,7 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d)
117 int port = line >> 3; 117 int port = line >> 3;
118 int port_mask = 1 << (line & 7); 118 int port_mask = 1 << (line & 7);
119 119
120 if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { 120 if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
121 gpio_int_type2[port] ^= port_mask; /* switch edge direction */ 121 gpio_int_type2[port] ^= port_mask; /* switch edge direction */
122 ep93xx_gpio_update_int_params(port); 122 ep93xx_gpio_update_int_params(port);
123 } 123 }
@@ -131,7 +131,7 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
131 int port = line >> 3; 131 int port = line >> 3;
132 int port_mask = 1 << (line & 7); 132 int port_mask = 1 << (line & 7);
133 133
134 if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) 134 if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH)
135 gpio_int_type2[port] ^= port_mask; /* switch edge direction */ 135 gpio_int_type2[port] ^= port_mask; /* switch edge direction */
136 136
137 gpio_int_unmasked[port] &= ~port_mask; 137 gpio_int_unmasked[port] &= ~port_mask;
@@ -165,10 +165,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d)
165 */ 165 */
166static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) 166static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
167{ 167{
168 struct irq_desc *desc = irq_desc + d->irq;
169 const int gpio = irq_to_gpio(d->irq); 168 const int gpio = irq_to_gpio(d->irq);
170 const int port = gpio >> 3; 169 const int port = gpio >> 3;
171 const int port_mask = 1 << (gpio & 7); 170 const int port_mask = 1 << (gpio & 7);
171 irq_flow_handler_t handler;
172 172
173 gpio_direction_input(gpio); 173 gpio_direction_input(gpio);
174 174
@@ -176,22 +176,22 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
176 case IRQ_TYPE_EDGE_RISING: 176 case IRQ_TYPE_EDGE_RISING:
177 gpio_int_type1[port] |= port_mask; 177 gpio_int_type1[port] |= port_mask;
178 gpio_int_type2[port] |= port_mask; 178 gpio_int_type2[port] |= port_mask;
179 desc->handle_irq = handle_edge_irq; 179 handler = handle_edge_irq;
180 break; 180 break;
181 case IRQ_TYPE_EDGE_FALLING: 181 case IRQ_TYPE_EDGE_FALLING:
182 gpio_int_type1[port] |= port_mask; 182 gpio_int_type1[port] |= port_mask;
183 gpio_int_type2[port] &= ~port_mask; 183 gpio_int_type2[port] &= ~port_mask;
184 desc->handle_irq = handle_edge_irq; 184 handler = handle_edge_irq;
185 break; 185 break;
186 case IRQ_TYPE_LEVEL_HIGH: 186 case IRQ_TYPE_LEVEL_HIGH:
187 gpio_int_type1[port] &= ~port_mask; 187 gpio_int_type1[port] &= ~port_mask;
188 gpio_int_type2[port] |= port_mask; 188 gpio_int_type2[port] |= port_mask;
189 desc->handle_irq = handle_level_irq; 189 handler = handle_level_irq;
190 break; 190 break;
191 case IRQ_TYPE_LEVEL_LOW: 191 case IRQ_TYPE_LEVEL_LOW:
192 gpio_int_type1[port] &= ~port_mask; 192 gpio_int_type1[port] &= ~port_mask;
193 gpio_int_type2[port] &= ~port_mask; 193 gpio_int_type2[port] &= ~port_mask;
194 desc->handle_irq = handle_level_irq; 194 handler = handle_level_irq;
195 break; 195 break;
196 case IRQ_TYPE_EDGE_BOTH: 196 case IRQ_TYPE_EDGE_BOTH:
197 gpio_int_type1[port] |= port_mask; 197 gpio_int_type1[port] |= port_mask;
@@ -200,17 +200,16 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
200 gpio_int_type2[port] &= ~port_mask; /* falling */ 200 gpio_int_type2[port] &= ~port_mask; /* falling */
201 else 201 else
202 gpio_int_type2[port] |= port_mask; /* rising */ 202 gpio_int_type2[port] |= port_mask; /* rising */
203 desc->handle_irq = handle_edge_irq; 203 handler = handle_edge_irq;
204 break; 204 break;
205 default: 205 default:
206 pr_err("failed to set irq type %d for gpio %d\n", type, gpio); 206 pr_err("failed to set irq type %d for gpio %d\n", type, gpio);
207 return -EINVAL; 207 return -EINVAL;
208 } 208 }
209 209
210 gpio_int_enabled[port] |= port_mask; 210 __irq_set_handler_locked(d->irq, handler);
211 211
212 desc->status &= ~IRQ_TYPE_SENSE_MASK; 212 gpio_int_enabled[port] |= port_mask;
213 desc->status |= type & IRQ_TYPE_SENSE_MASK;
214 213
215 ep93xx_gpio_update_int_params(port); 214 ep93xx_gpio_update_int_params(port);
216 215
@@ -232,20 +231,29 @@ void __init ep93xx_gpio_init_irq(void)
232 231
233 for (gpio_irq = gpio_to_irq(0); 232 for (gpio_irq = gpio_to_irq(0);
234 gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { 233 gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) {
235 set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip); 234 irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip,
236 set_irq_handler(gpio_irq, handle_level_irq); 235 handle_level_irq);
237 set_irq_flags(gpio_irq, IRQF_VALID); 236 set_irq_flags(gpio_irq, IRQF_VALID);
238 } 237 }
239 238
240 set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); 239 irq_set_chained_handler(IRQ_EP93XX_GPIO_AB,
241 set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler); 240 ep93xx_gpio_ab_irq_handler);
242 set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler); 241 irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX,
243 set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler); 242 ep93xx_gpio_f_irq_handler);
244 set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler); 243 irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX,
245 set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler); 244 ep93xx_gpio_f_irq_handler);
246 set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler); 245 irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX,
247 set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler); 246 ep93xx_gpio_f_irq_handler);
248 set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler); 247 irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX,
248 ep93xx_gpio_f_irq_handler);
249 irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX,
250 ep93xx_gpio_f_irq_handler);
251 irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX,
252 ep93xx_gpio_f_irq_handler);
253 irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX,
254 ep93xx_gpio_f_irq_handler);
255 irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX,
256 ep93xx_gpio_f_irq_handler);
249} 257}
250 258
251 259
@@ -360,52 +368,14 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
360 gpio = ep93xx_chip->chip.base; 368 gpio = ep93xx_chip->chip.base;
361 for (i = 0; i < chip->ngpio; i++, gpio++) { 369 for (i = 0; i < chip->ngpio; i++, gpio++) {
362 int is_out = data_dir_reg & (1 << i); 370 int is_out = data_dir_reg & (1 << i);
371 int irq = gpio_to_irq(gpio);
363 372
364 seq_printf(s, " %s%d gpio-%-3d (%-12s) %s %s", 373 seq_printf(s, " %s%d gpio-%-3d (%-12s) %s %s %s\n",
365 chip->label, i, gpio, 374 chip->label, i, gpio,
366 gpiochip_is_requested(chip, i) ? : "", 375 gpiochip_is_requested(chip, i) ? : "",
367 is_out ? "out" : "in ", 376 is_out ? "out" : "in ",
368 (data_reg & (1 << i)) ? "hi" : "lo"); 377 (data_reg & (1<< i)) ? "hi" : "lo",
369 378 (!is_out && irq>= 0) ? "(interrupt)" : "");
370 if (!is_out) {
371 int irq = gpio_to_irq(gpio);
372 struct irq_desc *desc = irq_desc + irq;
373
374 if (irq >= 0 && desc->action) {
375 char *trigger;
376
377 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
378 case IRQ_TYPE_NONE:
379 trigger = "(default)";
380 break;
381 case IRQ_TYPE_EDGE_FALLING:
382 trigger = "edge-falling";
383 break;
384 case IRQ_TYPE_EDGE_RISING:
385 trigger = "edge-rising";
386 break;
387 case IRQ_TYPE_EDGE_BOTH:
388 trigger = "edge-both";
389 break;
390 case IRQ_TYPE_LEVEL_HIGH:
391 trigger = "level-high";
392 break;
393 case IRQ_TYPE_LEVEL_LOW:
394 trigger = "level-low";
395 break;
396 default:
397 trigger = "?trigger?";
398 break;
399 }
400
401 seq_printf(s, " irq-%d %s%s",
402 irq, trigger,
403 (desc->status & IRQ_WAKEUP)
404 ? " wakeup" : "");
405 }
406 }
407
408 seq_printf(s, "\n");
409 } 379 }
410} 380}
411 381
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index a021b5240bba..e849f67be47d 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -20,6 +20,11 @@ config EXYNOS4_MCT
20 help 20 help
21 Use MCT (Multi Core Timer) as kernel timers 21 Use MCT (Multi Core Timer) as kernel timers
22 22
23config EXYNOS4_DEV_AHCI
24 bool
25 help
26 Compile in platform device definitions for AHCI
27
23config EXYNOS4_DEV_PD 28config EXYNOS4_DEV_PD
24 bool 29 bool
25 help 30 help
@@ -134,9 +139,9 @@ config MACH_ARMLEX4210
134 select S3C_DEV_HSMMC 139 select S3C_DEV_HSMMC
135 select S3C_DEV_HSMMC2 140 select S3C_DEV_HSMMC2
136 select S3C_DEV_HSMMC3 141 select S3C_DEV_HSMMC3
142 select EXYNOS4_DEV_AHCI
137 select EXYNOS4_DEV_SYSMMU 143 select EXYNOS4_DEV_SYSMMU
138 select EXYNOS4_SETUP_SDHCI 144 select EXYNOS4_SETUP_SDHCI
139 select SATA_AHCI_PLATFORM
140 help 145 help
141 Machine support for Samsung ARMLEX4210 based on EXYNOS4210 146 Machine support for Samsung ARMLEX4210 based on EXYNOS4210
142 147
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index b8f0e7d82d7e..9be104f63c0b 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_MACH_NURI) += mach-nuri.o
39# device support 39# device support
40 40
41obj-y += dev-audio.o 41obj-y += dev-audio.o
42obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
42obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o 43obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
43obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o 44obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
44 45
@@ -53,4 +54,3 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
53obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o 54obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
54obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o 55obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
55obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 56obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
56obj-$(CONFIG_SATA_AHCI_PLATFORM) += dev-ahci.o
diff --git a/arch/arm/mach-exynos4/include/mach/debug-macro.S b/arch/arm/mach-exynos4/include/mach/debug-macro.S
index 58bbd049a6c4..a442ef861167 100644
--- a/arch/arm/mach-exynos4/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/debug-macro.S
@@ -21,8 +21,8 @@
21 */ 21 */
22 22
23 .macro addruart, rp, rv 23 .macro addruart, rp, rv
24 ldreq \rp, = S3C_PA_UART 24 ldr \rp, = S3C_PA_UART
25 ldrne \rv, = S3C_VA_UART 25 ldr \rv, = S3C_VA_UART
26#if CONFIG_DEBUG_S3C_UART != 0 26#if CONFIG_DEBUG_S3C_UART != 0
27 add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART) 27 add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
28 add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART) 28 add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
diff --git a/arch/arm/mach-exynos4/include/mach/gpio.h b/arch/arm/mach-exynos4/include/mach/gpio.h
index 939728b38d48..be9266b10fdb 100644
--- a/arch/arm/mach-exynos4/include/mach/gpio.h
+++ b/arch/arm/mach-exynos4/include/mach/gpio.h
@@ -18,7 +18,7 @@
18#define gpio_cansleep __gpio_cansleep 18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq 19#define gpio_to_irq __gpio_to_irq
20 20
21/* Practically, GPIO banks upto GPZ are the configurable gpio banks */ 21/* Practically, GPIO banks up to GPZ are the configurable gpio banks */
22 22
23/* GPIO bank sizes */ 23/* GPIO bank sizes */
24#define EXYNOS4_GPIO_A0_NR (8) 24#define EXYNOS4_GPIO_A0_NR (8)
diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c
index 31618d91ce15..f488b66d6806 100644
--- a/arch/arm/mach-exynos4/irq-combiner.c
+++ b/arch/arm/mach-exynos4/irq-combiner.c
@@ -54,8 +54,8 @@ static void combiner_unmask_irq(struct irq_data *data)
54 54
55static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 55static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
56{ 56{
57 struct combiner_chip_data *chip_data = get_irq_data(irq); 57 struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
58 struct irq_chip *chip = get_irq_chip(irq); 58 struct irq_chip *chip = irq_get_chip(irq);
59 unsigned int cascade_irq, combiner_irq; 59 unsigned int cascade_irq, combiner_irq;
60 unsigned long status; 60 unsigned long status;
61 61
@@ -93,9 +93,9 @@ void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
93{ 93{
94 if (combiner_nr >= MAX_COMBINER_NR) 94 if (combiner_nr >= MAX_COMBINER_NR)
95 BUG(); 95 BUG();
96 if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0) 96 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
97 BUG(); 97 BUG();
98 set_irq_chained_handler(irq, combiner_handle_cascade_irq); 98 irq_set_chained_handler(irq, combiner_handle_cascade_irq);
99} 99}
100 100
101void __init combiner_init(unsigned int combiner_nr, void __iomem *base, 101void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
@@ -119,9 +119,8 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
119 119
120 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset 120 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
121 + MAX_IRQ_IN_COMBINER; i++) { 121 + MAX_IRQ_IN_COMBINER; i++) {
122 set_irq_chip(i, &combiner_chip); 122 irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
123 set_irq_chip_data(i, &combiner_data[combiner_nr]); 123 irq_set_chip_data(i, &combiner_data[combiner_nr]);
124 set_irq_handler(i, handle_level_irq);
125 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 124 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
126 } 125 }
127} 126}
diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 4f7ad4a796e4..9d87d2ac7f68 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -190,8 +190,8 @@ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
190 190
191static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) 191static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
192{ 192{
193 u32 *irq_data = get_irq_data(irq); 193 u32 *irq_data = irq_get_handler_data(irq);
194 struct irq_chip *chip = get_irq_chip(irq); 194 struct irq_chip *chip = irq_get_chip(irq);
195 195
196 chip->irq_mask(&desc->irq_data); 196 chip->irq_mask(&desc->irq_data);
197 197
@@ -208,18 +208,19 @@ int __init exynos4_init_irq_eint(void)
208 int irq; 208 int irq;
209 209
210 for (irq = 0 ; irq <= 31 ; irq++) { 210 for (irq = 0 ; irq <= 31 ; irq++) {
211 set_irq_chip(IRQ_EINT(irq), &exynos4_irq_eint); 211 irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
212 set_irq_handler(IRQ_EINT(irq), handle_level_irq); 212 handle_level_irq);
213 set_irq_flags(IRQ_EINT(irq), IRQF_VALID); 213 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
214 } 214 }
215 215
216 set_irq_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); 216 irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
217 217
218 for (irq = 0 ; irq <= 15 ; irq++) { 218 for (irq = 0 ; irq <= 15 ; irq++) {
219 eint0_15_data[irq] = IRQ_EINT(irq); 219 eint0_15_data[irq] = IRQ_EINT(irq);
220 220
221 set_irq_data(exynos4_get_irq_nr(irq), &eint0_15_data[irq]); 221 irq_set_handler_data(exynos4_get_irq_nr(irq),
222 set_irq_chained_handler(exynos4_get_irq_nr(irq), 222 &eint0_15_data[irq]);
223 irq_set_chained_handler(exynos4_get_irq_nr(irq),
223 exynos4_irq_eint0_15); 224 exynos4_irq_eint0_15);
224 } 225 }
225 226
diff --git a/arch/arm/mach-exynos4/localtimer.c b/arch/arm/mach-exynos4/localtimer.c
index 2a2993ae8d86..6bf3d0ab9627 100644
--- a/arch/arm/mach-exynos4/localtimer.c
+++ b/arch/arm/mach-exynos4/localtimer.c
@@ -18,8 +18,9 @@
18/* 18/*
19 * Setup the local clock events for a CPU. 19 * Setup the local clock events for a CPU.
20 */ 20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt) 21int __cpuinit local_timer_setup(struct clock_event_device *evt)
22{ 22{
23 evt->irq = IRQ_LOCALTIMER; 23 evt->irq = IRQ_LOCALTIMER;
24 twd_timer_setup(evt); 24 twd_timer_setup(evt);
25 return 0;
25} 26}
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
index 25a256818122..e645f7a955f0 100644
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ b/arch/arm/mach-exynos4/mach-smdkc210.c
@@ -125,7 +125,7 @@ static struct resource smdkc210_smsc911x_resources[] = {
125}; 125};
126 126
127static struct smsc911x_platform_config smsc9215_config = { 127static struct smsc911x_platform_config smsc9215_config = {
128 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, 128 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
129 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, 129 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
130 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, 130 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
131 .phy_interface = PHY_INTERFACE_MODE_MII, 131 .phy_interface = PHY_INTERFACE_MODE_MII,
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index 88e0275143be..152676471b67 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -127,7 +127,7 @@ static struct resource smdkv310_smsc911x_resources[] = {
127}; 127};
128 128
129static struct smsc911x_platform_config smsc9215_config = { 129static struct smsc911x_platform_config smsc9215_config = {
130 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, 130 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
131 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, 131 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
132 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, 132 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
133 .phy_interface = PHY_INTERFACE_MODE_MII, 133 .phy_interface = PHY_INTERFACE_MODE_MII,
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c
index af82a8fbb68b..14ac10b7ec02 100644
--- a/arch/arm/mach-exynos4/mct.c
+++ b/arch/arm/mach-exynos4/mct.c
@@ -276,7 +276,7 @@ static void exynos4_mct_tick_start(unsigned long cycles,
276 /* update interrupt count buffer */ 276 /* update interrupt count buffer */
277 exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET); 277 exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET);
278 278
279 /* enable MCT tick interupt */ 279 /* enable MCT tick interrupt */
280 exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET); 280 exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET);
281 281
282 tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET); 282 tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET);
diff --git a/arch/arm/mach-exynos4/setup-sdhci-gpio.c b/arch/arm/mach-exynos4/setup-sdhci-gpio.c
index 1b3d3a2de95c..e8d08bf8965a 100644
--- a/arch/arm/mach-exynos4/setup-sdhci-gpio.c
+++ b/arch/arm/mach-exynos4/setup-sdhci-gpio.c
@@ -38,14 +38,14 @@ void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
38 switch (width) { 38 switch (width) {
39 case 8: 39 case 8:
40 for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { 40 for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) {
41 /* Data pin GPK1[3:6] to special-funtion 3 */ 41 /* Data pin GPK1[3:6] to special-function 3 */
42 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); 42 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
43 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); 43 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
44 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); 44 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
45 } 45 }
46 case 4: 46 case 4:
47 for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { 47 for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) {
48 /* Data pin GPK0[3:6] to special-funtion 2 */ 48 /* Data pin GPK0[3:6] to special-function 2 */
49 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); 49 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
50 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); 50 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
51 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); 51 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
diff --git a/arch/arm/mach-exynos4/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c
index 85f9433d4836..1e83f8cf236d 100644
--- a/arch/arm/mach-exynos4/setup-sdhci.c
+++ b/arch/arm/mach-exynos4/setup-sdhci.c
@@ -35,7 +35,7 @@ void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
35{ 35{
36 u32 ctrl2, ctrl3; 36 u32 ctrl2, ctrl3;
37 37
38 /* don't need to alter anything acording to card-type */ 38 /* don't need to alter anything according to card-type */
39 39
40 ctrl2 = readl(r + S3C_SDHCI_CONTROL2); 40 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
41 41
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 84c5f258f2d8..38a44f9b9da2 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -102,8 +102,7 @@ static void __init __fb_init_irq(void)
102 *CSR_FIQ_DISABLE = -1; 102 *CSR_FIQ_DISABLE = -1;
103 103
104 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { 104 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
105 set_irq_chip(irq, &fb_chip); 105 irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq);
106 set_irq_handler(irq, handle_level_irq);
107 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 106 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
108 } 107 }
109} 108}
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index a921fe92b858..5f1f9867fc70 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -30,7 +30,7 @@ static int cksrc_dc21285_enable(struct clocksource *cs)
30 return 0; 30 return 0;
31} 31}
32 32
33static int cksrc_dc21285_disable(struct clocksource *cs) 33static void cksrc_dc21285_disable(struct clocksource *cs)
34{ 34{
35 *CSR_TIMER2_CNTL = 0; 35 *CSR_TIMER2_CNTL = 0;
36} 36}
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index de7a5cb5dbe1..c3a0abbc9049 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -151,14 +151,14 @@ void __init isa_init_irq(unsigned int host_irq)
151 151
152 if (host_irq != (unsigned int)-1) { 152 if (host_irq != (unsigned int)-1) {
153 for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { 153 for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) {
154 set_irq_chip(irq, &isa_lo_chip); 154 irq_set_chip_and_handler(irq, &isa_lo_chip,
155 set_irq_handler(irq, handle_level_irq); 155 handle_level_irq);
156 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 156 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
157 } 157 }
158 158
159 for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { 159 for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) {
160 set_irq_chip(irq, &isa_hi_chip); 160 irq_set_chip_and_handler(irq, &isa_hi_chip,
161 set_irq_handler(irq, handle_level_irq); 161 handle_level_irq);
162 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 162 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
163 } 163 }
164 164
@@ -166,7 +166,7 @@ void __init isa_init_irq(unsigned int host_irq)
166 request_resource(&ioport_resource, &pic2_resource); 166 request_resource(&ioport_resource, &pic2_resource);
167 setup_irq(IRQ_ISA_CASCADE, &irq_cascade); 167 setup_irq(IRQ_ISA_CASCADE, &irq_cascade);
168 168
169 set_irq_chained_handler(host_irq, isa_irq_handler); 169 irq_set_chained_handler(host_irq, isa_irq_handler);
170 170
171 /* 171 /*
172 * On the NetWinder, don't automatically 172 * On the NetWinder, don't automatically
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index fa3d333f21e1..fdc7ef1391d3 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -127,8 +127,8 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
127 127
128static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 128static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
129{ 129{
130 unsigned int port = (unsigned int)irq_desc_get_handler_data(desc);
130 unsigned int gpio_irq_no, irq_stat; 131 unsigned int gpio_irq_no, irq_stat;
131 unsigned int port = (unsigned int)get_irq_data(irq);
132 132
133 irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT); 133 irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT);
134 134
@@ -138,9 +138,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
138 if ((irq_stat & 1) == 0) 138 if ((irq_stat & 1) == 0)
139 continue; 139 continue;
140 140
141 BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); 141 generic_handle_irq(gpio_irq_no);
142 irq_desc[gpio_irq_no].handle_irq(gpio_irq_no,
143 &irq_desc[gpio_irq_no]);
144 } 142 }
145} 143}
146 144
@@ -219,13 +217,13 @@ void __init gemini_gpio_init(void)
219 217
220 for (j = GPIO_IRQ_BASE + i * 32; 218 for (j = GPIO_IRQ_BASE + i * 32;
221 j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { 219 j < GPIO_IRQ_BASE + (i + 1) * 32; j++) {
222 set_irq_chip(j, &gpio_irq_chip); 220 irq_set_chip_and_handler(j, &gpio_irq_chip,
223 set_irq_handler(j, handle_edge_irq); 221 handle_edge_irq);
224 set_irq_flags(j, IRQF_VALID); 222 set_irq_flags(j, IRQF_VALID);
225 } 223 }
226 224
227 set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler); 225 irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler);
228 set_irq_data(IRQ_GPIO(i), (void *)i); 226 irq_set_handler_data(IRQ_GPIO(i), (void *)i);
229 } 227 }
230 228
231 BUG_ON(gpiochip_add(&gemini_gpio_chip)); 229 BUG_ON(gpiochip_add(&gemini_gpio_chip));
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 96bc227dd849..9485a8fdf851 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -81,13 +81,13 @@ void __init gemini_init_irq(void)
81 request_resource(&iomem_resource, &irq_resource); 81 request_resource(&iomem_resource, &irq_resource);
82 82
83 for (i = 0; i < NR_IRQS; i++) { 83 for (i = 0; i < NR_IRQS; i++) {
84 set_irq_chip(i, &gemini_irq_chip); 84 irq_set_chip(i, &gemini_irq_chip);
85 if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) { 85 if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) {
86 set_irq_handler(i, handle_edge_irq); 86 irq_set_handler(i, handle_edge_irq);
87 mode |= 1 << i; 87 mode |= 1 << i;
88 level |= 1 << i; 88 level |= 1 << i;
89 } else { 89 } else {
90 set_irq_handler(i, handle_level_irq); 90 irq_set_handler(i, handle_level_irq);
91 } 91 }
92 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 92 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
93 } 93 }
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 1f28c90932c7..51d4e44ab973 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -199,29 +199,29 @@ void __init h720x_init_irq (void)
199 199
200 /* Initialize global IRQ's, fast path */ 200 /* Initialize global IRQ's, fast path */
201 for (irq = 0; irq < NR_GLBL_IRQS; irq++) { 201 for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
202 set_irq_chip(irq, &h720x_global_chip); 202 irq_set_chip_and_handler(irq, &h720x_global_chip,
203 set_irq_handler(irq, handle_level_irq); 203 handle_level_irq);
204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
205 } 205 }
206 206
207 /* Initialize multiplexed IRQ's, slow path */ 207 /* Initialize multiplexed IRQ's, slow path */
208 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { 208 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
209 set_irq_chip(irq, &h720x_gpio_chip); 209 irq_set_chip_and_handler(irq, &h720x_gpio_chip,
210 set_irq_handler(irq, handle_edge_irq); 210 handle_edge_irq);
211 set_irq_flags(irq, IRQF_VALID ); 211 set_irq_flags(irq, IRQF_VALID );
212 } 212 }
213 set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); 213 irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
214 set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); 214 irq_set_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler);
215 set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); 215 irq_set_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler);
216 set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); 216 irq_set_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler);
217 217
218#ifdef CONFIG_CPU_H7202 218#ifdef CONFIG_CPU_H7202
219 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { 219 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
220 set_irq_chip(irq, &h720x_gpio_chip); 220 irq_set_chip_and_handler(irq, &h720x_gpio_chip,
221 set_irq_handler(irq, handle_edge_irq); 221 handle_edge_irq);
222 set_irq_flags(irq, IRQF_VALID ); 222 set_irq_flags(irq, IRQF_VALID );
223 } 223 }
224 set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); 224 irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
225#endif 225#endif
226 226
227 /* Enable multiplexed irq's */ 227 /* Enable multiplexed irq's */
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index ac3f91442376..c37d570b852d 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -141,13 +141,18 @@ h7202_timer_interrupt(int irq, void *dev_id)
141/* 141/*
142 * mask multiplexed timer IRQs 142 * mask multiplexed timer IRQs
143 */ 143 */
144static void inline mask_timerx_irq(struct irq_data *d) 144static void inline __mask_timerx_irq(unsigned int irq)
145{ 145{
146 unsigned int bit; 146 unsigned int bit;
147 bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1)); 147 bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
148 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; 148 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
149} 149}
150 150
151static void inline mask_timerx_irq(struct irq_data *d)
152{
153 __mask_timerx_irq(d->irq);
154}
155
151/* 156/*
152 * unmask multiplexed timer IRQs 157 * unmask multiplexed timer IRQs
153 */ 158 */
@@ -196,12 +201,12 @@ void __init h7202_init_irq (void)
196 201
197 for (irq = IRQ_TIMER1; 202 for (irq = IRQ_TIMER1;
198 irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { 203 irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
199 mask_timerx_irq(irq); 204 __mask_timerx_irq(irq);
200 set_irq_chip(irq, &h7202_timerx_chip); 205 irq_set_chip_and_handler(irq, &h7202_timerx_chip,
201 set_irq_handler(irq, handle_edge_irq); 206 handle_edge_irq);
202 set_irq_flags(irq, IRQF_VALID ); 207 set_irq_flags(irq, IRQF_VALID );
203 } 208 }
204 set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); 209 irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);
205 210
206 h720x_init_irq(); 211 h720x_init_irq();
207} 212}
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5eec099e0c72..56b930a13443 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -255,6 +255,7 @@ config MACH_IMX27_VISSTRIM_M10
255 bool "Vista Silicon i.MX27 Visstrim_m10" 255 bool "Vista Silicon i.MX27 Visstrim_m10"
256 select SOC_IMX27 256 select SOC_IMX27
257 select IMX_HAVE_PLATFORM_IMX_I2C 257 select IMX_HAVE_PLATFORM_IMX_I2C
258 select IMX_HAVE_PLATFORM_IMX_SSI
258 select IMX_HAVE_PLATFORM_IMX_UART 259 select IMX_HAVE_PLATFORM_IMX_UART
259 select IMX_HAVE_PLATFORM_MXC_MMC 260 select IMX_HAVE_PLATFORM_MXC_MMC
260 select IMX_HAVE_PLATFORM_MXC_EHCI 261 select IMX_HAVE_PLATFORM_MXC_EHCI
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index cb705c28de02..6269053505f7 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -34,6 +34,7 @@
34#include <mach/mx25.h> 34#include <mach/mx25.h>
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/audmux.h> 36#include <mach/audmux.h>
37#include <mach/esdhc.h>
37 38
38#include "devices-imx25.h" 39#include "devices-imx25.h"
39 40
@@ -242,6 +243,11 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
242 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 243 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
243}; 244};
244 245
246static struct esdhc_platform_data sd1_pdata = {
247 .cd_gpio = GPIO_SD1CD,
248 .wp_gpio = -EINVAL,
249};
250
245/* 251/*
246 * system init for baseboard usage. Will be called by cpuimx25 init. 252 * system init for baseboard usage. Will be called by cpuimx25 init.
247 * 253 *
@@ -275,7 +281,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
275 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 281 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
276 282
277 imx25_add_flexcan1(NULL); 283 imx25_add_flexcan1(NULL);
278 imx25_add_sdhci_esdhc_imx(0, NULL); 284 imx25_add_sdhci_esdhc_imx(0, &sd1_pdata);
279 285
280 gpio_request(GPIO_LED1, "LED1"); 286 gpio_request(GPIO_LED1, "LED1");
281 gpio_direction_output(GPIO_LED1, 1); 287 gpio_direction_output(GPIO_LED1, 1);
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 614b3c00c4a0..6e1accf93f81 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -232,10 +232,13 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
232}; 232};
233 233
234/* MC13783 */ 234/* MC13783 */
235static struct mc13xxx_platform_data mc13783_pdata __initdata = { 235static struct mc13xxx_platform_data mc13783_pdata = {
236 .regulators = mx27_3ds_regulators, 236 .regulators = {
237 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), 237 .regulators = mx27_3ds_regulators,
238 .flags = MC13XXX_USE_REGULATOR, 238 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
239
240 },
241 .flags = MC13783_USE_REGULATOR,
239}; 242};
240 243
241/* SPI */ 244/* SPI */
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 38c77084b615..4cbce6d0fef1 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -263,10 +263,12 @@ static struct mc13xxx_regulator_init_data pcm038_regulators[] = {
263}; 263};
264 264
265static struct mc13xxx_platform_data pcm038_pmic = { 265static struct mc13xxx_platform_data pcm038_pmic = {
266 .regulators = pcm038_regulators, 266 .regulators = {
267 .num_regulators = ARRAY_SIZE(pcm038_regulators), 267 .regulators = pcm038_regulators,
268 .flags = MC13XXX_USE_ADC | MC13XXX_USE_REGULATOR | 268 .num_regulators = ARRAY_SIZE(pcm038_regulators),
269 MC13XXX_USE_TOUCHSCREEN, 269 },
270 .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
271 MC13783_USE_TOUCHSCREEN,
270}; 272};
271 273
272static struct spi_board_info pcm038_spi_board_info[] __initdata = { 274static struct spi_board_info pcm038_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index 769b0f10c834..d701d32a07f1 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -13,6 +13,7 @@ config ARCH_INTEGRATOR_CP
13 bool "Support Integrator/CP platform" 13 bool "Support Integrator/CP platform"
14 select ARCH_CINTEGRATOR 14 select ARCH_CINTEGRATOR
15 select ARM_TIMER_SP804 15 select ARM_TIMER_SP804
16 select PLAT_VERSATILE_CLCD
16 help 17 help
17 Include support for the ARM(R) Integrator CP platform. 18 Include support for the ARM(R) Integrator CP platform.
18 19
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index 5f96e1518aa9..a08f9b0299df 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1 +1,2 @@
1void integrator_init_early(void);
1void integrator_reserve(void); 2void integrator_reserve(void);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index b8e884b450da..77315b995681 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -144,12 +144,15 @@ static struct clk_lookup lookups[] = {
144 } 144 }
145}; 145};
146 146
147void __init integrator_init_early(void)
148{
149 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
150}
151
147static int __init integrator_init(void) 152static int __init integrator_init(void)
148{ 153{
149 int i; 154 int i;
150 155
151 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
152
153 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 156 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
154 struct amba_device *d = amba_devs[i]; 157 struct amba_device *d = amba_devs[i];
155 amba_device_register(d, &iomem_resource); 158 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 5db574f8ae3f..8cbb75a96bd4 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -121,6 +121,7 @@ static struct clcd_panel vga = {
121 .height = -1, 121 .height = -1,
122 .tim2 = TIM2_BCD | TIM2_IPC, 122 .tim2 = TIM2_BCD | TIM2_IPC,
123 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 123 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
124 .caps = CLCD_CAP_5551,
124 .connector = IMPD1_CTRL_DISP_VGA, 125 .connector = IMPD1_CTRL_DISP_VGA,
125 .bpp = 16, 126 .bpp = 16,
126 .grayscale = 0, 127 .grayscale = 0,
@@ -149,6 +150,7 @@ static struct clcd_panel svga = {
149 .tim2 = TIM2_BCD, 150 .tim2 = TIM2_BCD,
150 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 151 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
151 .connector = IMPD1_CTRL_DISP_VGA, 152 .connector = IMPD1_CTRL_DISP_VGA,
153 .caps = CLCD_CAP_5551,
152 .bpp = 16, 154 .bpp = 16,
153 .grayscale = 0, 155 .grayscale = 0,
154}; 156};
@@ -175,6 +177,7 @@ static struct clcd_panel prospector = {
175 .height = -1, 177 .height = -1,
176 .tim2 = TIM2_BCD, 178 .tim2 = TIM2_BCD,
177 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 179 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
180 .caps = CLCD_CAP_5551,
178 .fixedtimings = 1, 181 .fixedtimings = 1,
179 .connector = IMPD1_CTRL_DISP_LCD, 182 .connector = IMPD1_CTRL_DISP_LCD,
180 .bpp = 16, 183 .bpp = 16,
@@ -206,6 +209,7 @@ static struct clcd_panel ltm10c209 = {
206 .height = -1, 209 .height = -1,
207 .tim2 = TIM2_BCD, 210 .tim2 = TIM2_BCD,
208 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 211 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
212 .caps = CLCD_CAP_5551,
209 .fixedtimings = 1, 213 .fixedtimings = 1,
210 .connector = IMPD1_CTRL_DISP_LCD, 214 .connector = IMPD1_CTRL_DISP_LCD,
211 .bpp = 16, 215 .bpp = 16,
@@ -279,6 +283,7 @@ static void impd1fb_clcd_remove(struct clcd_fb *fb)
279 283
280static struct clcd_board impd1_clcd_data = { 284static struct clcd_board impd1_clcd_data = {
281 .name = "IM-PD/1", 285 .name = "IM-PD/1",
286 .caps = CLCD_CAP_5551 | CLCD_CAP_888,
282 .check = clcdfb_check, 287 .check = clcdfb_check,
283 .decode = clcdfb_decode, 288 .decode = clcdfb_decode,
284 .disable = impd1fb_clcd_disable, 289 .disable = impd1fb_clcd_disable,
diff --git a/arch/arm/mach-integrator/include/mach/cm.h b/arch/arm/mach-integrator/include/mach/cm.h
index 1ab353e23595..445d57adb043 100644
--- a/arch/arm/mach-integrator/include/mach/cm.h
+++ b/arch/arm/mach-integrator/include/mach/cm.h
@@ -24,9 +24,9 @@ void cm_control(u32, u32);
24#define CM_CTRL_LCDBIASDN (1 << 10) 24#define CM_CTRL_LCDBIASDN (1 << 10)
25#define CM_CTRL_LCDMUXSEL_MASK (7 << 11) 25#define CM_CTRL_LCDMUXSEL_MASK (7 << 11)
26#define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11) 26#define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11)
27#define CM_CTRL_LCDMUXSEL_VGA_16BPP (2 << 11) 27#define CM_CTRL_LCDMUXSEL_VGA565_TFT555 (2 << 11)
28#define CM_CTRL_LCDMUXSEL_SHARPLCD (3 << 11) 28#define CM_CTRL_LCDMUXSEL_SHARPLCD (3 << 11)
29#define CM_CTRL_LCDMUXSEL_VGA_8421BPP (4 << 11) 29#define CM_CTRL_LCDMUXSEL_VGA555_TFT555 (4 << 11)
30#define CM_CTRL_LCDEN0 (1 << 14) 30#define CM_CTRL_LCDEN0 (1 << 14)
31#define CM_CTRL_LCDEN1 (1 << 15) 31#define CM_CTRL_LCDEN1 (1 << 15)
32#define CM_CTRL_STATIC1 (1 << 16) 32#define CM_CTRL_STATIC1 (1 << 16)
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index b666443b5cbb..980803ff348c 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -48,6 +48,8 @@
48#include <asm/mach/map.h> 48#include <asm/mach/map.h>
49#include <asm/mach/time.h> 49#include <asm/mach/time.h>
50 50
51#include <plat/fpga-irq.h>
52
51#include "common.h" 53#include "common.h"
52 54
53/* 55/*
@@ -57,10 +59,10 @@
57 * Setup a VA for the Integrator interrupt controller (for header #0, 59 * Setup a VA for the Integrator interrupt controller (for header #0,
58 * just for now). 60 * just for now).
59 */ 61 */
60#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 62#define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE)
61#define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE) 63#define VA_SC_BASE __io_address(INTEGRATOR_SC_BASE)
62#define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE) 64#define VA_EBI_BASE __io_address(INTEGRATOR_EBI_BASE)
63#define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_IC) 65#define VA_CMIC_BASE __io_address(INTEGRATOR_HDR_IC)
64 66
65/* 67/*
66 * Logical Physical 68 * Logical Physical
@@ -156,27 +158,14 @@ static void __init ap_map_io(void)
156 158
157#define INTEGRATOR_SC_VALID_INT 0x003fffff 159#define INTEGRATOR_SC_VALID_INT 0x003fffff
158 160
159static void sc_mask_irq(struct irq_data *d) 161static struct fpga_irq_data sc_irq_data = {
160{ 162 .base = VA_IC_BASE,
161 writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR); 163 .irq_start = 0,
162} 164 .chip.name = "SC",
163
164static void sc_unmask_irq(struct irq_data *d)
165{
166 writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET);
167}
168
169static struct irq_chip sc_chip = {
170 .name = "SC",
171 .irq_ack = sc_mask_irq,
172 .irq_mask = sc_mask_irq,
173 .irq_unmask = sc_unmask_irq,
174}; 165};
175 166
176static void __init ap_init_irq(void) 167static void __init ap_init_irq(void)
177{ 168{
178 unsigned int i;
179
180 /* Disable all interrupts initially. */ 169 /* Disable all interrupts initially. */
181 /* Do the core module ones */ 170 /* Do the core module ones */
182 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR); 171 writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
@@ -185,13 +174,7 @@ static void __init ap_init_irq(void)
185 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR); 174 writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
186 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR); 175 writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
187 176
188 for (i = 0; i < NR_IRQS; i++) { 177 fpga_irq_init(-1, INTEGRATOR_SC_VALID_INT, &sc_irq_data);
189 if (((1 << i) & INTEGRATOR_SC_VALID_INT) != 0) {
190 set_irq_chip(i, &sc_chip);
191 set_irq_handler(i, handle_level_irq);
192 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
193 }
194 }
195} 178}
196 179
197#ifdef CONFIG_PM 180#ifdef CONFIG_PM
@@ -282,7 +265,7 @@ static void ap_flash_exit(void)
282 265
283static void ap_flash_set_vpp(int on) 266static void ap_flash_set_vpp(int on)
284{ 267{
285 unsigned long reg = on ? SC_CTRLS : SC_CTRLC; 268 void __iomem *reg = on ? SC_CTRLS : SC_CTRLC;
286 269
287 writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg); 270 writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
288} 271}
@@ -499,8 +482,9 @@ static struct sys_timer ap_timer = {
499MACHINE_START(INTEGRATOR, "ARM-Integrator") 482MACHINE_START(INTEGRATOR, "ARM-Integrator")
500 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 483 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
501 .boot_params = 0x00000100, 484 .boot_params = 0x00000100,
502 .map_io = ap_map_io,
503 .reserve = integrator_reserve, 485 .reserve = integrator_reserve,
486 .map_io = ap_map_io,
487 .init_early = integrator_init_early,
504 .init_irq = ap_init_irq, 488 .init_irq = ap_init_irq,
505 .timer = &ap_timer, 489 .timer = &ap_timer,
506 .init_machine = ap_init, 490 .init_machine = ap_init,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index e9327da1382e..9e3ce26023e8 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -42,6 +42,10 @@
42 42
43#include <asm/hardware/timer-sp.h> 43#include <asm/hardware/timer-sp.h>
44 44
45#include <plat/clcd.h>
46#include <plat/fpga-irq.h>
47#include <plat/sched_clock.h>
48
45#include "common.h" 49#include "common.h"
46 50
47#define INTCP_PA_FLASH_BASE 0x24000000 51#define INTCP_PA_FLASH_BASE 0x24000000
@@ -49,9 +53,9 @@
49 53
50#define INTCP_PA_CLCD_BASE 0xc0000000 54#define INTCP_PA_CLCD_BASE 0xc0000000
51 55
52#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE + 0x40) 56#define INTCP_VA_CIC_BASE __io_address(INTEGRATOR_HDR_BASE + 0x40)
53#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 57#define INTCP_VA_PIC_BASE __io_address(INTEGRATOR_IC_BASE)
54#define INTCP_VA_SIC_BASE IO_ADDRESS(INTEGRATOR_CP_SIC_BASE) 58#define INTCP_VA_SIC_BASE __io_address(INTEGRATOR_CP_SIC_BASE)
55 59
56#define INTCP_ETH_SIZE 0x10 60#define INTCP_ETH_SIZE 0x10
57 61
@@ -139,129 +143,48 @@ static void __init intcp_map_io(void)
139 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc)); 143 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
140} 144}
141 145
142#define cic_writel __raw_writel 146static struct fpga_irq_data cic_irq_data = {
143#define cic_readl __raw_readl 147 .base = INTCP_VA_CIC_BASE,
144#define pic_writel __raw_writel 148 .irq_start = IRQ_CIC_START,
145#define pic_readl __raw_readl 149 .chip.name = "CIC",
146#define sic_writel __raw_writel
147#define sic_readl __raw_readl
148
149static void cic_mask_irq(struct irq_data *d)
150{
151 unsigned int irq = d->irq - IRQ_CIC_START;
152 cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
153}
154
155static void cic_unmask_irq(struct irq_data *d)
156{
157 unsigned int irq = d->irq - IRQ_CIC_START;
158 cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
159}
160
161static struct irq_chip cic_chip = {
162 .name = "CIC",
163 .irq_ack = cic_mask_irq,
164 .irq_mask = cic_mask_irq,
165 .irq_unmask = cic_unmask_irq,
166}; 150};
167 151
168static void pic_mask_irq(struct irq_data *d) 152static struct fpga_irq_data pic_irq_data = {
169{ 153 .base = INTCP_VA_PIC_BASE,
170 unsigned int irq = d->irq - IRQ_PIC_START; 154 .irq_start = IRQ_PIC_START,
171 pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); 155 .chip.name = "PIC",
172}
173
174static void pic_unmask_irq(struct irq_data *d)
175{
176 unsigned int irq = d->irq - IRQ_PIC_START;
177 pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
178}
179
180static struct irq_chip pic_chip = {
181 .name = "PIC",
182 .irq_ack = pic_mask_irq,
183 .irq_mask = pic_mask_irq,
184 .irq_unmask = pic_unmask_irq,
185}; 156};
186 157
187static void sic_mask_irq(struct irq_data *d) 158static struct fpga_irq_data sic_irq_data = {
188{ 159 .base = INTCP_VA_SIC_BASE,
189 unsigned int irq = d->irq - IRQ_SIC_START; 160 .irq_start = IRQ_SIC_START,
190 sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); 161 .chip.name = "SIC",
191}
192
193static void sic_unmask_irq(struct irq_data *d)
194{
195 unsigned int irq = d->irq - IRQ_SIC_START;
196 sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
197}
198
199static struct irq_chip sic_chip = {
200 .name = "SIC",
201 .irq_ack = sic_mask_irq,
202 .irq_mask = sic_mask_irq,
203 .irq_unmask = sic_unmask_irq,
204}; 162};
205 163
206static void
207sic_handle_irq(unsigned int irq, struct irq_desc *desc)
208{
209 unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS);
210
211 if (status == 0) {
212 do_bad_IRQ(irq, desc);
213 return;
214 }
215
216 do {
217 irq = ffs(status) - 1;
218 status &= ~(1 << irq);
219
220 irq += IRQ_SIC_START;
221
222 generic_handle_irq(irq);
223 } while (status);
224}
225
226static void __init intcp_init_irq(void) 164static void __init intcp_init_irq(void)
227{ 165{
228 unsigned int i; 166 u32 pic_mask, sic_mask;
167
168 pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
169 pic_mask |= (~((~0u) << (29 - 22))) << 22;
170 sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
229 171
230 /* 172 /*
231 * Disable all interrupt sources 173 * Disable all interrupt sources
232 */ 174 */
233 pic_writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); 175 writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
234 pic_writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR); 176 writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
235 177 writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
236 for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) { 178 writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
237 if (i == 11) 179 writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
238 i = 22; 180 writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
239 if (i == 29)
240 break;
241 set_irq_chip(i, &pic_chip);
242 set_irq_handler(i, handle_level_irq);
243 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
244 }
245 181
246 cic_writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR); 182 fpga_irq_init(-1, pic_mask, &pic_irq_data);
247 cic_writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
248 183
249 for (i = IRQ_CIC_START; i <= IRQ_CIC_END; i++) { 184 fpga_irq_init(-1, ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START)),
250 set_irq_chip(i, &cic_chip); 185 &cic_irq_data);
251 set_irq_handler(i, handle_level_irq);
252 set_irq_flags(i, IRQF_VALID);
253 }
254
255 sic_writel(0x00000fff, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
256 sic_writel(0x00000fff, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
257
258 for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) {
259 set_irq_chip(i, &sic_chip);
260 set_irq_handler(i, handle_level_irq);
261 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
262 }
263 186
264 set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq); 187 fpga_irq_init(IRQ_CP_CPPLDINT, sic_mask, &sic_irq_data);
265} 188}
266 189
267/* 190/*
@@ -449,43 +372,21 @@ static struct amba_device aaci_device = {
449/* 372/*
450 * CLCD support 373 * CLCD support
451 */ 374 */
452static struct clcd_panel vga = {
453 .mode = {
454 .name = "VGA",
455 .refresh = 60,
456 .xres = 640,
457 .yres = 480,
458 .pixclock = 39721,
459 .left_margin = 40,
460 .right_margin = 24,
461 .upper_margin = 32,
462 .lower_margin = 11,
463 .hsync_len = 96,
464 .vsync_len = 2,
465 .sync = 0,
466 .vmode = FB_VMODE_NONINTERLACED,
467 },
468 .width = -1,
469 .height = -1,
470 .tim2 = TIM2_BCD | TIM2_IPC,
471 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
472 .bpp = 16,
473 .grayscale = 0,
474};
475
476/* 375/*
477 * Ensure VGA is selected. 376 * Ensure VGA is selected.
478 */ 377 */
479static void cp_clcd_enable(struct clcd_fb *fb) 378static void cp_clcd_enable(struct clcd_fb *fb)
480{ 379{
481 u32 val; 380 struct fb_var_screeninfo *var = &fb->fb.var;
381 u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
482 382
483 if (fb->fb.var.bits_per_pixel <= 8) 383 if (var->bits_per_pixel <= 8 ||
484 val = CM_CTRL_LCDMUXSEL_VGA_8421BPP; 384 (var->bits_per_pixel == 16 && var->green.length == 5))
385 /* Pseudocolor, RGB555, BGR555 */
386 val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;
485 else if (fb->fb.var.bits_per_pixel <= 16) 387 else if (fb->fb.var.bits_per_pixel <= 16)
486 val = CM_CTRL_LCDMUXSEL_VGA_16BPP 388 /* truecolor RGB565 */
487 | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1 389 val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;
488 | CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
489 else 390 else
490 val = 0; /* no idea for this, don't trust the docs */ 391 val = 0; /* no idea for this, don't trust the docs */
491 392
@@ -498,49 +399,24 @@ static void cp_clcd_enable(struct clcd_fb *fb)
498 CM_CTRL_n24BITEN, val); 399 CM_CTRL_n24BITEN, val);
499} 400}
500 401
501static unsigned long framesize = SZ_1M;
502
503static int cp_clcd_setup(struct clcd_fb *fb) 402static int cp_clcd_setup(struct clcd_fb *fb)
504{ 403{
505 dma_addr_t dma; 404 fb->panel = versatile_clcd_get_panel("VGA");
506 405 if (!fb->panel)
507 fb->panel = &vga; 406 return -EINVAL;
508
509 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
510 &dma, GFP_KERNEL);
511 if (!fb->fb.screen_base) {
512 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
513 return -ENOMEM;
514 }
515
516 fb->fb.fix.smem_start = dma;
517 fb->fb.fix.smem_len = framesize;
518
519 return 0;
520}
521
522static int cp_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
523{
524 return dma_mmap_writecombine(&fb->dev->dev, vma,
525 fb->fb.screen_base,
526 fb->fb.fix.smem_start,
527 fb->fb.fix.smem_len);
528}
529 407
530static void cp_clcd_remove(struct clcd_fb *fb) 408 return versatile_clcd_setup_dma(fb, SZ_1M);
531{
532 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
533 fb->fb.screen_base, fb->fb.fix.smem_start);
534} 409}
535 410
536static struct clcd_board clcd_data = { 411static struct clcd_board clcd_data = {
537 .name = "Integrator/CP", 412 .name = "Integrator/CP",
413 .caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,
538 .check = clcdfb_check, 414 .check = clcdfb_check,
539 .decode = clcdfb_decode, 415 .decode = clcdfb_decode,
540 .enable = cp_clcd_enable, 416 .enable = cp_clcd_enable,
541 .setup = cp_clcd_setup, 417 .setup = cp_clcd_setup,
542 .mmap = cp_clcd_mmap, 418 .mmap = versatile_clcd_mmap_dma,
543 .remove = cp_clcd_remove, 419 .remove = versatile_clcd_remove_dma,
544}; 420};
545 421
546static struct amba_device clcd_device = { 422static struct amba_device clcd_device = {
@@ -565,11 +441,23 @@ static struct amba_device *amba_devs[] __initdata = {
565 &clcd_device, 441 &clcd_device,
566}; 442};
567 443
444#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
445
446static void __init intcp_init_early(void)
447{
448 clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups));
449
450 integrator_init_early();
451
452#ifdef CONFIG_PLAT_VERSATILE_SCHED_CLOCK
453 versatile_sched_clock_init(REFCOUNTER, 24000000);
454#endif
455}
456
568static void __init intcp_init(void) 457static void __init intcp_init(void)
569{ 458{
570 int i; 459 int i;
571 460
572 clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups));
573 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs)); 461 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
574 462
575 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 463 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
@@ -599,8 +487,9 @@ static struct sys_timer cp_timer = {
599MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") 487MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
600 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 488 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
601 .boot_params = 0x00000100, 489 .boot_params = 0x00000100,
602 .map_io = intcp_map_io,
603 .reserve = integrator_reserve, 490 .reserve = integrator_reserve,
491 .map_io = intcp_map_io,
492 .init_early = intcp_init_early,
604 .init_irq = intcp_init_irq, 493 .init_irq = intcp_init_irq,
605 .timer = &cp_timer, 494 .timer = &cp_timer,
606 .init_machine = intcp_init, 495 .init_machine = intcp_init,
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index a233470dd10c..bc739701c301 100644
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -224,15 +224,15 @@ void __init iop13xx_init_irq(void)
224 224
225 for(i = 0; i <= IRQ_IOP13XX_HPI; i++) { 225 for(i = 0; i <= IRQ_IOP13XX_HPI; i++) {
226 if (i < 32) 226 if (i < 32)
227 set_irq_chip(i, &iop13xx_irqchip1); 227 irq_set_chip(i, &iop13xx_irqchip1);
228 else if (i < 64) 228 else if (i < 64)
229 set_irq_chip(i, &iop13xx_irqchip2); 229 irq_set_chip(i, &iop13xx_irqchip2);
230 else if (i < 96) 230 else if (i < 96)
231 set_irq_chip(i, &iop13xx_irqchip3); 231 irq_set_chip(i, &iop13xx_irqchip3);
232 else 232 else
233 set_irq_chip(i, &iop13xx_irqchip4); 233 irq_set_chip(i, &iop13xx_irqchip4);
234 234
235 set_irq_handler(i, handle_level_irq); 235 irq_set_handler(i, handle_level_irq);
236 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 236 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
237 } 237 }
238 238
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index c9c02e3698bc..560d5b2dec22 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -118,7 +118,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
118 118
119void __init iop13xx_msi_init(void) 119void __init iop13xx_msi_init(void)
120{ 120{
121 set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler); 121 irq_set_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler);
122} 122}
123 123
124/* 124/*
@@ -178,7 +178,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
178 if (irq < 0) 178 if (irq < 0)
179 return irq; 179 return irq;
180 180
181 set_irq_msi(irq, desc); 181 irq_set_msi_desc(irq, desc);
182 182
183 msg.address_hi = 0x0; 183 msg.address_hi = 0x0;
184 msg.address_lo = IOP13XX_MU_MIMR_PCI; 184 msg.address_lo = IOP13XX_MU_MIMR_PCI;
@@ -187,7 +187,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
187 msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f); 187 msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f);
188 188
189 write_msi_msg(irq, &msg); 189 write_msi_msg(irq, &msg);
190 set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); 190 irq_set_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
191 191
192 return 0; 192 return 0;
193} 193}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 773ea0c95b9f..ba3dae352a2d 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -225,7 +225,7 @@ static u32 iop13xx_atue_cfg_address(struct pci_bus *bus, int devfn, int where)
225/* This routine checks the status of the last configuration cycle. If an error 225/* This routine checks the status of the last configuration cycle. If an error
226 * was detected it returns >0, else it returns a 0. The errors being checked 226 * was detected it returns >0, else it returns a 0. The errors being checked
227 * are parity, master abort, target abort (master and target). These types of 227 * are parity, master abort, target abort (master and target). These types of
228 * errors occure during a config cycle where there is no device, like during 228 * errors occur during a config cycle where there is no device, like during
229 * the discovery stage. 229 * the discovery stage.
230 */ 230 */
231static int iop13xx_atux_pci_status(int clear) 231static int iop13xx_atux_pci_status(int clear)
@@ -332,7 +332,7 @@ static struct pci_ops iop13xx_atux_ops = {
332/* This routine checks the status of the last configuration cycle. If an error 332/* This routine checks the status of the last configuration cycle. If an error
333 * was detected it returns >0, else it returns a 0. The errors being checked 333 * was detected it returns >0, else it returns a 0. The errors being checked
334 * are parity, master abort, target abort (master and target). These types of 334 * are parity, master abort, target abort (master and target). These types of
335 * errors occure during a config cycle where there is no device, like during 335 * errors occur during a config cycle where there is no device, like during
336 * the discovery stage. 336 * the discovery stage.
337 */ 337 */
338static int iop13xx_atue_pci_status(int clear) 338static int iop13xx_atue_pci_status(int clear)
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index d3426a120599..d7ee2789d890 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -68,8 +68,7 @@ void __init iop32x_init_irq(void)
68 *IOP3XX_PCIIRSR = 0x0f; 68 *IOP3XX_PCIIRSR = 0x0f;
69 69
70 for (i = 0; i < NR_IRQS; i++) { 70 for (i = 0; i < NR_IRQS; i++) {
71 set_irq_chip(i, &ext_chip); 71 irq_set_chip_and_handler(i, &ext_chip, handle_level_irq);
72 set_irq_handler(i, handle_level_irq);
73 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 72 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
74 } 73 }
75} 74}
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index 0ff2f74363a5..f7f5d3e451c7 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -110,8 +110,9 @@ void __init iop33x_init_irq(void)
110 *IOP3XX_PCIIRSR = 0x0f; 110 *IOP3XX_PCIIRSR = 0x0f;
111 111
112 for (i = 0; i < NR_IRQS; i++) { 112 for (i = 0; i < NR_IRQS; i++) {
113 set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2); 113 irq_set_chip_and_handler(i,
114 set_irq_handler(i, handle_level_irq); 114 (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2,
115 handle_level_irq);
115 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 116 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
116 } 117 }
117} 118}
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 5fc4e064b650..4068166c8993 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -476,8 +476,8 @@ void __init ixp2000_init_irq(void)
476 */ 476 */
477 for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { 477 for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) {
478 if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { 478 if ((1 << irq) & IXP2000_VALID_IRQ_MASK) {
479 set_irq_chip(irq, &ixp2000_irq_chip); 479 irq_set_chip_and_handler(irq, &ixp2000_irq_chip,
480 set_irq_handler(irq, handle_level_irq); 480 handle_level_irq);
481 set_irq_flags(irq, IRQF_VALID); 481 set_irq_flags(irq, IRQF_VALID);
482 } else set_irq_flags(irq, 0); 482 } else set_irq_flags(irq, 0);
483 } 483 }
@@ -485,21 +485,21 @@ void __init ixp2000_init_irq(void)
485 for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { 485 for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) {
486 if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & 486 if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) &
487 IXP2000_VALID_ERR_IRQ_MASK) { 487 IXP2000_VALID_ERR_IRQ_MASK) {
488 set_irq_chip(irq, &ixp2000_err_irq_chip); 488 irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip,
489 set_irq_handler(irq, handle_level_irq); 489 handle_level_irq);
490 set_irq_flags(irq, IRQF_VALID); 490 set_irq_flags(irq, IRQF_VALID);
491 } 491 }
492 else 492 else
493 set_irq_flags(irq, 0); 493 set_irq_flags(irq, 0);
494 } 494 }
495 set_irq_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); 495 irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);
496 496
497 for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { 497 for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) {
498 set_irq_chip(irq, &ixp2000_GPIO_irq_chip); 498 irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip,
499 set_irq_handler(irq, handle_level_irq); 499 handle_level_irq);
500 set_irq_flags(irq, IRQF_VALID); 500 set_irq_flags(irq, IRQF_VALID);
501 } 501 }
502 set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); 502 irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
503 503
504 /* 504 /*
505 * Enable PCI irqs. The actual PCI[AB] decoding is done in 505 * Enable PCI irqs. The actual PCI[AB] decoding is done in
@@ -508,8 +508,8 @@ void __init ixp2000_init_irq(void)
508 */ 508 */
509 ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI)); 509 ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
510 for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) { 510 for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {
511 set_irq_chip(irq, &ixp2000_pci_irq_chip); 511 irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip,
512 set_irq_handler(irq, handle_level_irq); 512 handle_level_irq);
513 set_irq_flags(irq, IRQF_VALID); 513 set_irq_flags(irq, IRQF_VALID);
514 } 514 }
515} 515}
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 7d90d3f13ee8..235638f800e5 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -158,13 +158,13 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne
158 *board_irq_mask = 0xffffffff; 158 *board_irq_mask = 0xffffffff;
159 159
160 for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) { 160 for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
161 set_irq_chip(irq, &ixdp2x00_cpld_irq_chip); 161 irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip,
162 set_irq_handler(irq, handle_level_irq); 162 handle_level_irq);
163 set_irq_flags(irq, IRQF_VALID); 163 set_irq_flags(irq, IRQF_VALID);
164 } 164 }
165 165
166 /* Hook into PCI interrupt */ 166 /* Hook into PCI interrupt */
167 set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); 167 irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
168} 168}
169 169
170/************************************************************************* 170/*************************************************************************
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 34b1b2af37c8..84835b209557 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -115,8 +115,8 @@ void __init ixdp2x01_init_irq(void)
115 115
116 for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { 116 for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
117 if (irq & valid_irq_mask) { 117 if (irq & valid_irq_mask) {
118 set_irq_chip(irq, &ixdp2x01_irq_chip); 118 irq_set_chip_and_handler(irq, &ixdp2x01_irq_chip,
119 set_irq_handler(irq, handle_level_irq); 119 handle_level_irq);
120 set_irq_flags(irq, IRQF_VALID); 120 set_irq_flags(irq, IRQF_VALID);
121 } else { 121 } else {
122 set_irq_flags(irq, 0); 122 set_irq_flags(irq, 0);
@@ -124,7 +124,7 @@ void __init ixdp2x01_init_irq(void)
124 } 124 }
125 125
126 /* Hook into PCI interrupts */ 126 /* Hook into PCI interrupts */
127 set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); 127 irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
128} 128}
129 129
130 130
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 9c8a33903216..a1bee33d183e 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -289,12 +289,12 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
289{ 289{
290 switch (type) { 290 switch (type) {
291 case IXP23XX_IRQ_LEVEL: 291 case IXP23XX_IRQ_LEVEL:
292 set_irq_chip(irq, &ixp23xx_irq_level_chip); 292 irq_set_chip_and_handler(irq, &ixp23xx_irq_level_chip,
293 set_irq_handler(irq, handle_level_irq); 293 handle_level_irq);
294 break; 294 break;
295 case IXP23XX_IRQ_EDGE: 295 case IXP23XX_IRQ_EDGE:
296 set_irq_chip(irq, &ixp23xx_irq_edge_chip); 296 irq_set_chip_and_handler(irq, &ixp23xx_irq_edge_chip,
297 set_irq_handler(irq, handle_edge_irq); 297 handle_edge_irq);
298 break; 298 break;
299 } 299 }
300 set_irq_flags(irq, IRQF_VALID); 300 set_irq_flags(irq, IRQF_VALID);
@@ -324,12 +324,12 @@ void __init ixp23xx_init_irq(void)
324 } 324 }
325 325
326 for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) { 326 for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) {
327 set_irq_chip(irq, &ixp23xx_pci_irq_chip); 327 irq_set_chip_and_handler(irq, &ixp23xx_pci_irq_chip,
328 set_irq_handler(irq, handle_level_irq); 328 handle_level_irq);
329 set_irq_flags(irq, IRQF_VALID); 329 set_irq_flags(irq, IRQF_VALID);
330 } 330 }
331 331
332 set_irq_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler); 332 irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);
333} 333}
334 334
335 335
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 181116aa6591..8dcba17c81e7 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -136,8 +136,8 @@ void __init ixdp2351_init_irq(void)
136 irq++) { 136 irq++) {
137 if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) { 137 if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) {
138 set_irq_flags(irq, IRQF_VALID); 138 set_irq_flags(irq, IRQF_VALID);
139 set_irq_handler(irq, handle_level_irq); 139 irq_set_chip_and_handler(irq, &ixdp2351_inta_chip,
140 set_irq_chip(irq, &ixdp2351_inta_chip); 140 handle_level_irq);
141 } 141 }
142 } 142 }
143 143
@@ -147,13 +147,13 @@ void __init ixdp2351_init_irq(void)
147 irq++) { 147 irq++) {
148 if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) { 148 if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) {
149 set_irq_flags(irq, IRQF_VALID); 149 set_irq_flags(irq, IRQF_VALID);
150 set_irq_handler(irq, handle_level_irq); 150 irq_set_chip_and_handler(irq, &ixdp2351_intb_chip,
151 set_irq_chip(irq, &ixdp2351_intb_chip); 151 handle_level_irq);
152 } 152 }
153 } 153 }
154 154
155 set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); 155 irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
156 set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); 156 irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
157} 157}
158 158
159/* 159/*
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 76c61ba73218..8fe0c6273262 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
110 110
111static void __init roadrunner_pci_preinit(void) 111static void __init roadrunner_pci_preinit(void)
112{ 112{
113 set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW); 113 irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
114 set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW); 114 irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
115 115
116 ixp23xx_pci_preinit(); 116 ixp23xx_pci_preinit();
117} 117}
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 845e1b500548..162043ff29ff 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -39,10 +39,10 @@
39 39
40void __init avila_pci_preinit(void) 40void __init avila_pci_preinit(void)
41{ 41{
42 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
43 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 43 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
44 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 44 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
45 set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); 45 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
46 ixp4xx_pci_preinit(); 46 ixp4xx_pci_preinit();
47} 47}
48 48
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 9fd894271d5d..ed19bc314318 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -252,8 +252,8 @@ void __init ixp4xx_init_irq(void)
252 252
253 /* Default to all level triggered */ 253 /* Default to all level triggered */
254 for(i = 0; i < NR_IRQS; i++) { 254 for(i = 0; i < NR_IRQS; i++) {
255 set_irq_chip(i, &ixp4xx_irq_chip); 255 irq_set_chip_and_handler(i, &ixp4xx_irq_chip,
256 set_irq_handler(i, handle_level_irq); 256 handle_level_irq);
257 set_irq_flags(i, IRQF_VALID); 257 set_irq_flags(i, IRQF_VALID);
258 } 258 }
259} 259}
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index b978ea8bd6f0..37fda7d6e83d 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -32,8 +32,8 @@
32 32
33void __init coyote_pci_preinit(void) 33void __init coyote_pci_preinit(void)
34{ 34{
35 set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW); 35 irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
36 set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW); 36 irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
37 ixp4xx_pci_preinit(); 37 ixp4xx_pci_preinit();
38} 38}
39 39
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index fa70fed462ba..c7612010b3fc 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -35,12 +35,12 @@
35 35
36void __init dsmg600_pci_preinit(void) 36void __init dsmg600_pci_preinit(void)
37{ 37{
38 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 38 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
39 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 39 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
40 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
41 set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); 41 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
42 set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); 42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
43 set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW); 43 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW);
44 ixp4xx_pci_preinit(); 44 ixp4xx_pci_preinit();
45} 45}
46 46
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index 5a810c930624..44ccde9d4879 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -32,9 +32,9 @@
32 32
33void __init fsg_pci_preinit(void) 33void __init fsg_pci_preinit(void)
34{ 34{
35 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 35 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
36 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 36 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
37 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 37 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
38 ixp4xx_pci_preinit(); 38 ixp4xx_pci_preinit();
39} 39}
40 40
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index 7e93a0975c4d..fc1124168874 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -29,8 +29,8 @@
29 29
30void __init gateway7001_pci_preinit(void) 30void __init gateway7001_pci_preinit(void)
31{ 31{
32 set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); 32 irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
33 set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); 33 irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
34 34
35 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
36} 36}
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index d0e4861ac03d..3e8c0e33b59c 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -420,8 +420,8 @@ static void __init gmlr_init(void)
420 gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT); 420 gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT);
421 gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN); 421 gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN);
422 gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN); 422 gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN);
423 set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); 423 irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH);
424 set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); 424 irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH);
425 425
426 set_control(CONTROL_HSS0_DTR_N, 1); 426 set_control(CONTROL_HSS0_DTR_N, 1);
427 set_control(CONTROL_HSS1_DTR_N, 1); 427 set_control(CONTROL_HSS1_DTR_N, 1);
@@ -441,10 +441,10 @@ static void __init gmlr_init(void)
441#ifdef CONFIG_PCI 441#ifdef CONFIG_PCI
442static void __init gmlr_pci_preinit(void) 442static void __init gmlr_pci_preinit(void)
443{ 443{
444 set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW); 444 irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW);
445 set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW); 445 irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW);
446 set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW); 446 irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW);
447 set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW); 447 irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW);
448 ixp4xx_pci_preinit(); 448 ixp4xx_pci_preinit();
449} 449}
450 450
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index 25d2c333c204..38cc0725dbd8 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -43,8 +43,8 @@
43 */ 43 */
44void __init gtwx5715_pci_preinit(void) 44void __init gtwx5715_pci_preinit(void)
45{ 45{
46 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 46 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
47 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 47 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
48 ixp4xx_pci_preinit(); 48 ixp4xx_pci_preinit();
49} 49}
50 50
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 1ba165a6edac..58f400417eaf 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -36,10 +36,10 @@
36 36
37void __init ixdp425_pci_preinit(void) 37void __init ixdp425_pci_preinit(void)
38{ 38{
39 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 39 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
40 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
41 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 41 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
42 set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); 42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
43 ixp4xx_pci_preinit(); 43 ixp4xx_pci_preinit();
44} 44}
45 45
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index 4ed7ac614920..e64f6d041488 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -25,8 +25,8 @@
25 25
26void __init ixdpg425_pci_preinit(void) 26void __init ixdpg425_pci_preinit(void)
27{ 27{
28 set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); 28 irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
29 set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); 29 irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
30 30
31 ixp4xx_pci_preinit(); 31 ixp4xx_pci_preinit();
32} 32}
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index d0cea34cf61e..428d1202b799 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -33,11 +33,11 @@
33 33
34void __init nas100d_pci_preinit(void) 34void __init nas100d_pci_preinit(void)
35{ 35{
36 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 36 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
37 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 37 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
38 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 38 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
39 set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); 39 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
40 set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); 40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
41 ixp4xx_pci_preinit(); 41 ixp4xx_pci_preinit();
42} 42}
43 43
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 1eb5a90470bc..2e85f76b950d 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -32,9 +32,9 @@
32 32
33void __init nslu2_pci_preinit(void) 33void __init nslu2_pci_preinit(void)
34{ 34{
35 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 35 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
36 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 36 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
37 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 37 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
38 ixp4xx_pci_preinit(); 38 ixp4xx_pci_preinit();
39} 39}
40 40
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
index f3111c6840ef..03bdec5140a7 100644
--- a/arch/arm/mach-ixp4xx/vulcan-pci.c
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -38,8 +38,8 @@ void __init vulcan_pci_preinit(void)
38 pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n", 38 pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
39 (int)(pci_cardbus_mem_size >> 20)); 39 (int)(pci_cardbus_mem_size >> 20));
40#endif 40#endif
41 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 41 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
42 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
43 ixp4xx_pci_preinit(); 43 ixp4xx_pci_preinit();
44} 44}
45 45
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index 9b59ed03b151..17f3cf59a31b 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -29,8 +29,8 @@
29 29
30void __init wg302v2_pci_preinit(void) 30void __init wg302v2_pci_preinit(void)
31{ 31{
32 set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); 32 irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
33 set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); 33 irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
34 34
35 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
36} 36}
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index cbdb5863d13b..05d193a25b25 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -35,14 +35,15 @@ void __init kirkwood_init_irq(void)
35 */ 35 */
36 orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0, 36 orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0,
37 IRQ_KIRKWOOD_GPIO_START); 37 IRQ_KIRKWOOD_GPIO_START);
38 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); 38 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
39 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); 39 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
40 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler); 40 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
41 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler); 41 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
42 42
43 orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0, 43 orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0,
44 IRQ_KIRKWOOD_GPIO_START + 32); 44 IRQ_KIRKWOOD_GPIO_START + 32);
45 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler); 45 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
46 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler); 46 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
47 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler); 47 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23,
48 gpio_irq_handler);
48} 49}
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 0a95063f6d32..17de0bf53c08 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -58,6 +58,12 @@ static struct mvsdio_platform_data sheeva_esata_mvsdio_data = {
58 58
59static struct gpio_led sheevaplug_led_pins[] = { 59static struct gpio_led sheevaplug_led_pins[] = {
60 { 60 {
61 .name = "plug:red:misc",
62 .default_trigger = "none",
63 .gpio = 46,
64 .active_low = 1,
65 },
66 {
61 .name = "plug:green:health", 67 .name = "plug:green:health",
62 .default_trigger = "default-on", 68 .default_trigger = "default-on",
63 .gpio = 49, 69 .gpio = 49,
@@ -80,6 +86,7 @@ static struct platform_device sheevaplug_leds = {
80 86
81static unsigned int sheevaplug_mpp_config[] __initdata = { 87static unsigned int sheevaplug_mpp_config[] __initdata = {
82 MPP29_GPIO, /* USB Power Enable */ 88 MPP29_GPIO, /* USB Power Enable */
89 MPP46_GPIO, /* LED Red */
83 MPP49_GPIO, /* LED */ 90 MPP49_GPIO, /* LED */
84 0 91 0
85}; 92};
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c
index f781164e623f..24294b2bc469 100644
--- a/arch/arm/mach-kirkwood/tsx1x-common.c
+++ b/arch/arm/mach-kirkwood/tsx1x-common.c
@@ -15,7 +15,7 @@
15 15
16/**************************************************************************** 16/****************************************************************************
17 * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the 17 * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the
18 * partitions on the device because we want to keep compatability with 18 * partitions on the device because we want to keep compatibility with
19 * the QNAP firmware. 19 * the QNAP firmware.
20 * Layout as used by QNAP: 20 * Layout as used by QNAP:
21 * 0x00000000-0x00080000 : "U-Boot" 21 * 0x00000000-0x00080000 : "U-Boot"
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
index 55fbf7111a5b..31e456508a6f 100644
--- a/arch/arm/mach-ks8695/gpio.c
+++ b/arch/arm/mach-ks8695/gpio.c
@@ -80,7 +80,7 @@ int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
80 local_irq_restore(flags); 80 local_irq_restore(flags);
81 81
82 /* Set IRQ triggering type */ 82 /* Set IRQ triggering type */
83 set_irq_type(gpio_irq[pin], type); 83 irq_set_irq_type(gpio_irq[pin], type);
84 84
85 /* enable interrupt mode */ 85 /* enable interrupt mode */
86 ks8695_gpio_mode(pin, 0); 86 ks8695_gpio_mode(pin, 0);
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index 7998ccaa6333..a78092dcd6fb 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -115,12 +115,12 @@ static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
115 } 115 }
116 116
117 if (level_triggered) { 117 if (level_triggered) {
118 set_irq_chip(d->irq, &ks8695_irq_level_chip); 118 irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip,
119 set_irq_handler(d->irq, handle_level_irq); 119 handle_level_irq);
120 } 120 }
121 else { 121 else {
122 set_irq_chip(d->irq, &ks8695_irq_edge_chip); 122 irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip,
123 set_irq_handler(d->irq, handle_edge_irq); 123 handle_edge_irq);
124 } 124 }
125 125
126 __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); 126 __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
@@ -158,16 +158,18 @@ void __init ks8695_init_irq(void)
158 case KS8695_IRQ_UART_RX: 158 case KS8695_IRQ_UART_RX:
159 case KS8695_IRQ_COMM_TX: 159 case KS8695_IRQ_COMM_TX:
160 case KS8695_IRQ_COMM_RX: 160 case KS8695_IRQ_COMM_RX:
161 set_irq_chip(irq, &ks8695_irq_level_chip); 161 irq_set_chip_and_handler(irq,
162 set_irq_handler(irq, handle_level_irq); 162 &ks8695_irq_level_chip,
163 handle_level_irq);
163 break; 164 break;
164 165
165 /* Edge-triggered interrupts */ 166 /* Edge-triggered interrupts */
166 default: 167 default:
167 /* clear pending bit */ 168 /* clear pending bit */
168 ks8695_irq_ack(irq_get_irq_data(irq)); 169 ks8695_irq_ack(irq_get_irq_data(irq));
169 set_irq_chip(irq, &ks8695_irq_edge_chip); 170 irq_set_chip_and_handler(irq,
170 set_irq_handler(irq, handle_edge_irq); 171 &ks8695_irq_edge_chip,
172 handle_edge_irq);
171 } 173 }
172 174
173 set_irq_flags(irq, IRQF_VALID); 175 set_irq_flags(irq, IRQF_VALID);
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 316ecbf6c586..4eae566dfdc7 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -290,7 +290,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
290 } 290 }
291 291
292 /* Ok to use the level handler for all types */ 292 /* Ok to use the level handler for all types */
293 set_irq_handler(d->irq, handle_level_irq); 293 irq_set_handler(d->irq, handle_level_irq);
294 294
295 return 0; 295 return 0;
296} 296}
@@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void)
390 390
391 /* Configure supported IRQ's */ 391 /* Configure supported IRQ's */
392 for (i = 0; i < NR_IRQS; i++) { 392 for (i = 0; i < NR_IRQS; i++) {
393 set_irq_chip(i, &lpc32xx_irq_chip); 393 irq_set_chip_and_handler(i, &lpc32xx_irq_chip,
394 set_irq_handler(i, handle_level_irq); 394 handle_level_irq);
395 set_irq_flags(i, IRQF_VALID); 395 set_irq_flags(i, IRQF_VALID);
396 } 396 }
397 397
@@ -406,8 +406,8 @@ void __init lpc32xx_init_irq(void)
406 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); 406 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
407 407
408 /* MIC SUBIRQx interrupts will route handling to the chain handlers */ 408 /* MIC SUBIRQx interrupts will route handling to the chain handlers */
409 set_irq_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); 409 irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
410 set_irq_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); 410 irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
411 411
412 /* Initially disable all wake events */ 412 /* Initially disable all wake events */
413 __raw_writel(0, LPC32XX_CLKPWR_P01_ER); 413 __raw_writel(0, LPC32XX_CLKPWR_P01_ER);
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c
index e76d41bb7056..b9c80597b7bf 100644
--- a/arch/arm/mach-lpc32xx/pm.c
+++ b/arch/arm/mach-lpc32xx/pm.c
@@ -41,7 +41,7 @@
41 * DRAM clocking and refresh are slightly different for systems with DDR 41 * DRAM clocking and refresh are slightly different for systems with DDR
42 * DRAM or regular SDRAM devices. If SDRAM is used in the system, the 42 * DRAM or regular SDRAM devices. If SDRAM is used in the system, the
43 * SDRAM will still be accessible in direct-run mode. In DDR based systems, 43 * SDRAM will still be accessible in direct-run mode. In DDR based systems,
44 * a transistion to direct-run mode will stop all DDR accesses (no clocks). 44 * a transition to direct-run mode will stop all DDR accesses (no clocks).
45 * Because of this, the code to switch power modes and the code to enter 45 * Because of this, the code to switch power modes and the code to enter
46 * and exit DRAM self-refresh modes must not be executed in DRAM. A small 46 * and exit DRAM self-refresh modes must not be executed in DRAM. A small
47 * section of IRAM is used instead for this. 47 * section of IRAM is used instead for this.
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index ee8b02ed8011..7bfb827f3fe3 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -10,7 +10,7 @@
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) 11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
12 12
13#define NR_BUILTIN_GPIO (192) 13#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
14 14
15#define gpio_to_bank(gpio) ((gpio) >> 5) 15#define gpio_to_bank(gpio) ((gpio) >> 5)
16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index 4621067c7720..713be155a44d 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -8,6 +8,15 @@
8#define MFP_DRIVE_MEDIUM (0x2 << 13) 8#define MFP_DRIVE_MEDIUM (0x2 << 13)
9#define MFP_DRIVE_FAST (0x3 << 13) 9#define MFP_DRIVE_FAST (0x3 << 13)
10 10
11#undef MFP_CFG
12#undef MFP_CFG_DRV
13
14#define MFP_CFG(pin, af) \
15 (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM)
16
17#define MFP_CFG_DRV(pin, af, drv) \
18 (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
19
11/* GPIO */ 20/* GPIO */
12#define GPIO0_GPIO MFP_CFG(GPIO0, AF5) 21#define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
13#define GPIO1_GPIO MFP_CFG(GPIO1, AF5) 22#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 4aec493640b4..2cbf6df09b82 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -11,8 +11,8 @@ extern void __init mmp2_init_irq(void);
11extern void mmp2_clear_pmic_int(void); 11extern void mmp2_clear_pmic_int(void);
12 12
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/i2c/pxa-i2c.h>
14#include <mach/devices.h> 15#include <mach/devices.h>
15#include <plat/i2c.h>
16 16
17extern struct pxa_device_desc mmp2_device_uart1; 17extern struct pxa_device_desc mmp2_device_uart1;
18extern struct pxa_device_desc mmp2_device_uart2; 18extern struct pxa_device_desc mmp2_device_uart2;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 1801e4206232..a52b3d2f325c 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -8,8 +8,8 @@ extern void __init pxa168_init_irq(void);
8extern void pxa168_clear_keypad_wakeup(void); 8extern void pxa168_clear_keypad_wakeup(void);
9 9
10#include <linux/i2c.h> 10#include <linux/i2c.h>
11#include <linux/i2c/pxa-i2c.h>
11#include <mach/devices.h> 12#include <mach/devices.h>
12#include <plat/i2c.h>
13#include <plat/pxa3xx_nand.h> 13#include <plat/pxa3xx_nand.h>
14#include <video/pxa168fb.h> 14#include <video/pxa168fb.h>
15#include <plat/pxa27x_keypad.h> 15#include <plat/pxa27x_keypad.h>
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index f13c49d6f8dc..91be75591398 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -7,8 +7,8 @@ extern struct sys_timer pxa910_timer;
7extern void __init pxa910_init_irq(void); 7extern void __init pxa910_init_irq(void);
8 8
9#include <linux/i2c.h> 9#include <linux/i2c.h>
10#include <linux/i2c/pxa-i2c.h>
10#include <mach/devices.h> 11#include <mach/devices.h>
11#include <plat/i2c.h>
12#include <plat/pxa3xx_nand.h> 12#include <plat/pxa3xx_nand.h>
13 13
14extern struct pxa_device_desc pxa910_device_uart1; 14extern struct pxa_device_desc pxa910_device_uart1;
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index fa037038e7b8..d21c5441a3d0 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -110,9 +110,9 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
110 if (chip->irq_ack) 110 if (chip->irq_ack)
111 chip->irq_ack(d); 111 chip->irq_ack(d);
112 112
113 set_irq_chip(irq, chip); 113 irq_set_chip(irq, chip);
114 set_irq_flags(irq, IRQF_VALID); 114 set_irq_flags(irq, IRQF_VALID);
115 set_irq_handler(irq, handle_level_irq); 115 irq_set_handler(irq, handle_level_irq);
116 } 116 }
117} 117}
118 118
@@ -122,7 +122,7 @@ void __init mmp2_init_icu(void)
122 122
123 for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) { 123 for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
124 icu_mask_irq(irq_get_irq_data(irq)); 124 icu_mask_irq(irq_get_irq_data(irq));
125 set_irq_chip(irq, &icu_irq_chip); 125 irq_set_chip(irq, &icu_irq_chip);
126 set_irq_flags(irq, IRQF_VALID); 126 set_irq_flags(irq, IRQF_VALID);
127 127
128 switch (irq) { 128 switch (irq) {
@@ -133,7 +133,7 @@ void __init mmp2_init_icu(void)
133 case IRQ_MMP2_SSP_MUX: 133 case IRQ_MMP2_SSP_MUX:
134 break; 134 break;
135 default: 135 default:
136 set_irq_handler(irq, handle_level_irq); 136 irq_set_handler(irq, handle_level_irq);
137 break; 137 break;
138 } 138 }
139 } 139 }
@@ -149,9 +149,9 @@ void __init mmp2_init_icu(void)
149 init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15); 149 init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
150 init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2); 150 init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
151 151
152 set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux); 152 irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
153 set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux); 153 irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
154 set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); 154 irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
155 set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); 155 irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
156 set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); 156 irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
157} 157}
diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c
index f86b450cb93c..89706a0d08f1 100644
--- a/arch/arm/mach-mmp/irq-pxa168.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
@@ -48,8 +48,7 @@ void __init icu_init_irq(void)
48 48
49 for (irq = 0; irq < 64; irq++) { 49 for (irq = 0; irq < 64; irq++) {
50 icu_mask_irq(irq_get_irq_data(irq)); 50 icu_mask_irq(irq_get_irq_data(irq));
51 set_irq_chip(irq, &icu_irq_chip); 51 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
52 set_irq_handler(irq, handle_level_irq);
53 set_irq_flags(irq, IRQF_VALID); 52 set_irq_flags(irq, IRQF_VALID);
54 } 53 }
55} 54}
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index aeb9ae23e6ce..99833b9485cf 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -9,7 +9,7 @@
9 * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com> 9 * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com>
10 * 2008-10-08: Bin Yang <bin.yang@marvell.com> 10 * 2008-10-08: Bin Yang <bin.yang@marvell.com>
11 * 11 *
12 * The timers module actually includes three timers, each timer with upto 12 * The timers module actually includes three timers, each timer with up to
13 * three match comparators. Timer #0 is used here in free-running mode as 13 * three match comparators. Timer #0 is used here in free-running mode as
14 * the clock source, and match comparator #1 used as clock event device. 14 * the clock source, and match comparator #1 used as clock event device.
15 * 15 *
diff --git a/arch/arm/mach-msm/acpuclock-arm11.c b/arch/arm/mach-msm/acpuclock-arm11.c
index 7ffbd987eb5d..805d4ee53f7e 100644
--- a/arch/arm/mach-msm/acpuclock-arm11.c
+++ b/arch/arm/mach-msm/acpuclock-arm11.c
@@ -343,7 +343,7 @@ int acpuclk_set_rate(unsigned long rate, int for_power_collapse)
343 } 343 }
344 } 344 }
345 345
346 /* Set wait states for CPU inbetween frequency changes */ 346 /* Set wait states for CPU between frequency changes */
347 reg_clkctl = readl(A11S_CLK_CNTL_ADDR); 347 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
348 reg_clkctl |= (100 << 16); /* set WT_ST_CNT */ 348 reg_clkctl |= (100 << 16); /* set WT_ST_CNT */
349 writel(reg_clkctl, A11S_CLK_CNTL_ADDR); 349 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 1993721d472e..35c7ceeb3f29 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -53,7 +53,7 @@ static void __init msm8960_init_irq(void)
53 */ 53 */
54 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { 54 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
55 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) 55 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
56 set_irq_handler(i, handle_percpu_irq); 56 irq_set_handler(i, handle_percpu_irq);
57 } 57 }
58} 58}
59 59
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index b3c55f138fce..1163b6fd05d2 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -56,7 +56,7 @@ static void __init msm8x60_init_irq(void)
56 */ 56 */
57 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { 57 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
58 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) 58 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
59 set_irq_handler(i, handle_percpu_irq); 59 irq_set_handler(i, handle_percpu_irq);
60 } 60 }
61} 61}
62 62
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 7f568611547e..6a96911b0ad5 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -160,10 +160,7 @@ static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
160 160
161static void __init qsd8x50_init_mmc(void) 161static void __init qsd8x50_init_mmc(void)
162{ 162{
163 if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) 163 vreg_mmc = vreg_get(NULL, "gp5");
164 vreg_mmc = vreg_get(NULL, "gp6");
165 else
166 vreg_mmc = vreg_get(NULL, "gp5");
167 164
168 if (IS_ERR(vreg_mmc)) { 165 if (IS_ERR(vreg_mmc)) {
169 pr_err("vreg get for vreg_mmc failed (%ld)\n", 166 pr_err("vreg get for vreg_mmc failed (%ld)\n",
diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c
index 31117a4499c4..87e1d01edecc 100644
--- a/arch/arm/mach-msm/board-trout-gpio.c
+++ b/arch/arm/mach-msm/board-trout-gpio.c
@@ -214,17 +214,17 @@ int __init trout_init_gpio(void)
214{ 214{
215 int i; 215 int i;
216 for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { 216 for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
217 set_irq_chip(i, &trout_gpio_irq_chip); 217 irq_set_chip_and_handler(i, &trout_gpio_irq_chip,
218 set_irq_handler(i, handle_edge_irq); 218 handle_edge_irq);
219 set_irq_flags(i, IRQF_VALID); 219 set_irq_flags(i, IRQF_VALID);
220 } 220 }
221 221
222 for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++) 222 for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
223 gpiochip_add(&msm_gpio_banks[i].chip); 223 gpiochip_add(&msm_gpio_banks[i].chip);
224 224
225 set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); 225 irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
226 set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); 226 irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
227 set_irq_wake(MSM_GPIO_TO_INT(17), 1); 227 irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1);
228 228
229 return 0; 229 return 0;
230} 230}
diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c
index 44be8464657b..f7a9724788b0 100644
--- a/arch/arm/mach-msm/board-trout-mmc.c
+++ b/arch/arm/mach-msm/board-trout-mmc.c
@@ -174,7 +174,7 @@ int __init trout_init_mmc(unsigned int sys_rev)
174 if (IS_ERR(vreg_sdslot)) 174 if (IS_ERR(vreg_sdslot))
175 return PTR_ERR(vreg_sdslot); 175 return PTR_ERR(vreg_sdslot);
176 176
177 set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); 177 irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
178 178
179 if (!opt_disable_sdcard) 179 if (!opt_disable_sdcard)
180 msm_add_sdcc(2, &trout_sdslot_data, 180 msm_add_sdcc(2, &trout_sdslot_data,
diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
index 0de19ec74e34..56a964e52ad3 100644
--- a/arch/arm/mach-msm/gpio-v2.c
+++ b/arch/arm/mach-msm/gpio-v2.c
@@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio)
230 val, val2); 230 val, val2);
231} 231}
232 232
233static void msm_gpio_irq_ack(unsigned int irq) 233static void msm_gpio_irq_ack(struct irq_data *d)
234{ 234{
235 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); 235 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
236 236
237 writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); 237 writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio));
238 if (test_bit(gpio, msm_gpio.dual_edge_irqs)) 238 if (test_bit(gpio, msm_gpio.dual_edge_irqs))
239 msm_gpio_update_dual_edge_pos(gpio); 239 msm_gpio_update_dual_edge_pos(gpio);
240} 240}
241 241
242static void msm_gpio_irq_mask(unsigned int irq) 242static void msm_gpio_irq_mask(struct irq_data *d)
243{ 243{
244 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); 244 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
245 unsigned long irq_flags; 245 unsigned long irq_flags;
246 246
247 spin_lock_irqsave(&tlmm_lock, irq_flags); 247 spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(unsigned int irq)
251 spin_unlock_irqrestore(&tlmm_lock, irq_flags); 251 spin_unlock_irqrestore(&tlmm_lock, irq_flags);
252} 252}
253 253
254static void msm_gpio_irq_unmask(unsigned int irq) 254static void msm_gpio_irq_unmask(struct irq_data *d)
255{ 255{
256 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); 256 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
257 unsigned long irq_flags; 257 unsigned long irq_flags;
258 258
259 spin_lock_irqsave(&tlmm_lock, irq_flags); 259 spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(unsigned int irq)
263 spin_unlock_irqrestore(&tlmm_lock, irq_flags); 263 spin_unlock_irqrestore(&tlmm_lock, irq_flags);
264} 264}
265 265
266static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) 266static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
267{ 267{
268 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); 268 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
269 unsigned long irq_flags; 269 unsigned long irq_flags;
270 uint32_t bits; 270 uint32_t bits;
271 271
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
275 275
276 if (flow_type & IRQ_TYPE_EDGE_BOTH) { 276 if (flow_type & IRQ_TYPE_EDGE_BOTH) {
277 bits |= BIT(INTR_DECT_CTL); 277 bits |= BIT(INTR_DECT_CTL);
278 irq_desc[irq].handle_irq = handle_edge_irq; 278 __irq_set_handler_locked(d->irq, handle_edge_irq);
279 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) 279 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
280 __set_bit(gpio, msm_gpio.dual_edge_irqs); 280 __set_bit(gpio, msm_gpio.dual_edge_irqs);
281 else 281 else
282 __clear_bit(gpio, msm_gpio.dual_edge_irqs); 282 __clear_bit(gpio, msm_gpio.dual_edge_irqs);
283 } else { 283 } else {
284 bits &= ~BIT(INTR_DECT_CTL); 284 bits &= ~BIT(INTR_DECT_CTL);
285 irq_desc[irq].handle_irq = handle_level_irq; 285 __irq_set_handler_locked(d->irq, handle_level_irq);
286 __clear_bit(gpio, msm_gpio.dual_edge_irqs); 286 __clear_bit(gpio, msm_gpio.dual_edge_irqs);
287 } 287 }
288 288
@@ -309,6 +309,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
309 */ 309 */
310static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) 310static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
311{ 311{
312 struct irq_data *data = irq_desc_get_irq_data(desc);
312 unsigned long i; 313 unsigned long i;
313 314
314 for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); 315 for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
@@ -318,21 +319,21 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
318 generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip, 319 generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
319 i)); 320 i));
320 } 321 }
321 desc->chip->ack(irq); 322 data->chip->irq_ack(data);
322} 323}
323 324
324static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) 325static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
325{ 326{
326 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); 327 int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
327 328
328 if (on) { 329 if (on) {
329 if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) 330 if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
330 set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); 331 irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
331 set_bit(gpio, msm_gpio.wake_irqs); 332 set_bit(gpio, msm_gpio.wake_irqs);
332 } else { 333 } else {
333 clear_bit(gpio, msm_gpio.wake_irqs); 334 clear_bit(gpio, msm_gpio.wake_irqs);
334 if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) 335 if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
335 set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); 336 irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
336 } 337 }
337 338
338 return 0; 339 return 0;
@@ -340,11 +341,11 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
340 341
341static struct irq_chip msm_gpio_irq_chip = { 342static struct irq_chip msm_gpio_irq_chip = {
342 .name = "msmgpio", 343 .name = "msmgpio",
343 .mask = msm_gpio_irq_mask, 344 .irq_mask = msm_gpio_irq_mask,
344 .unmask = msm_gpio_irq_unmask, 345 .irq_unmask = msm_gpio_irq_unmask,
345 .ack = msm_gpio_irq_ack, 346 .irq_ack = msm_gpio_irq_ack,
346 .set_type = msm_gpio_irq_set_type, 347 .irq_set_type = msm_gpio_irq_set_type,
347 .set_wake = msm_gpio_irq_set_wake, 348 .irq_set_wake = msm_gpio_irq_set_wake,
348}; 349};
349 350
350static int __devinit msm_gpio_probe(struct platform_device *dev) 351static int __devinit msm_gpio_probe(struct platform_device *dev)
@@ -361,12 +362,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)
361 362
362 for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) { 363 for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
363 irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i); 364 irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
364 set_irq_chip(irq, &msm_gpio_irq_chip); 365 irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
365 set_irq_handler(irq, handle_level_irq); 366 handle_level_irq);
366 set_irq_flags(irq, IRQF_VALID); 367 set_irq_flags(irq, IRQF_VALID);
367 } 368 }
368 369
369 set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ, 370 irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
370 msm_summary_irq_handler); 371 msm_summary_irq_handler);
371 return 0; 372 return 0;
372} 373}
@@ -378,7 +379,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev)
378 if (ret < 0) 379 if (ret < 0)
379 return ret; 380 return ret;
380 381
381 set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); 382 irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
382 383
383 return 0; 384 return 0;
384} 385}
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 176af9dcb8ee..5ea273b00da8 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
293 val = readl(msm_chip->regs.int_edge); 293 val = readl(msm_chip->regs.int_edge);
294 if (flow_type & IRQ_TYPE_EDGE_BOTH) { 294 if (flow_type & IRQ_TYPE_EDGE_BOTH) {
295 writel(val | mask, msm_chip->regs.int_edge); 295 writel(val | mask, msm_chip->regs.int_edge);
296 irq_desc[d->irq].handle_irq = handle_edge_irq; 296 __irq_set_handler_locked(d->irq, handle_edge_irq);
297 } else { 297 } else {
298 writel(val & ~mask, msm_chip->regs.int_edge); 298 writel(val & ~mask, msm_chip->regs.int_edge);
299 irq_desc[d->irq].handle_irq = handle_level_irq; 299 __irq_set_handler_locked(d->irq, handle_level_irq);
300 } 300 }
301 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { 301 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
302 msm_chip->both_edge_detect |= mask; 302 msm_chip->both_edge_detect |= mask;
@@ -354,9 +354,9 @@ static int __init msm_init_gpio(void)
354 msm_gpio_chips[j].chip.base + 354 msm_gpio_chips[j].chip.base +
355 msm_gpio_chips[j].chip.ngpio) 355 msm_gpio_chips[j].chip.ngpio)
356 j++; 356 j++;
357 set_irq_chip_data(i, &msm_gpio_chips[j]); 357 irq_set_chip_data(i, &msm_gpio_chips[j]);
358 set_irq_chip(i, &msm_gpio_irq_chip); 358 irq_set_chip_and_handler(i, &msm_gpio_irq_chip,
359 set_irq_handler(i, handle_edge_irq); 359 handle_edge_irq);
360 set_irq_flags(i, IRQF_VALID); 360 set_irq_flags(i, IRQF_VALID);
361 } 361 }
362 362
@@ -366,10 +366,10 @@ static int __init msm_init_gpio(void)
366 gpiochip_add(&msm_gpio_chips[i].chip); 366 gpiochip_add(&msm_gpio_chips[i].chip);
367 } 367 }
368 368
369 set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); 369 irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
370 set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); 370 irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
371 set_irq_wake(INT_GPIO_GROUP1, 1); 371 irq_set_irq_wake(INT_GPIO_GROUP1, 1);
372 set_irq_wake(INT_GPIO_GROUP2, 2); 372 irq_set_irq_wake(INT_GPIO_GROUP2, 2);
373 return 0; 373 return 0;
374} 374}
375 375
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
index 68c28bbdc969..1b54f807c2d0 100644
--- a/arch/arm/mach-msm/irq-vic.c
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
313 type = msm_irq_shadow_reg[index].int_type; 313 type = msm_irq_shadow_reg[index].int_type;
314 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { 314 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
315 type |= b; 315 type |= b;
316 irq_desc[d->irq].handle_irq = handle_edge_irq; 316 __irq_set_handler_locked(d->irq, handle_edge_irq);
317 } 317 }
318 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { 318 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
319 type &= ~b; 319 type &= ~b;
320 irq_desc[d->irq].handle_irq = handle_level_irq; 320 __irq_set_handler_locked(d->irq, handle_level_irq);
321 } 321 }
322 writel(type, treg); 322 writel(type, treg);
323 msm_irq_shadow_reg[index].int_type = type; 323 msm_irq_shadow_reg[index].int_type = type;
@@ -357,8 +357,7 @@ void __init msm_init_irq(void)
357 writel(3, VIC_INT_MASTEREN); 357 writel(3, VIC_INT_MASTEREN);
358 358
359 for (n = 0; n < NR_MSM_IRQS; n++) { 359 for (n = 0; n < NR_MSM_IRQS; n++) {
360 set_irq_chip(n, &msm_irq_chip); 360 irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
361 set_irq_handler(n, handle_level_irq);
362 set_irq_flags(n, IRQF_VALID); 361 set_irq_flags(n, IRQF_VALID);
363 } 362 }
364} 363}
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 0b27d899f40e..ea514be390c6 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
100 100
101 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { 101 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
102 writel(readl(treg) | b, treg); 102 writel(readl(treg) | b, treg);
103 irq_desc[d->irq].handle_irq = handle_edge_irq; 103 __irq_set_handler_locked(d->irq, handle_edge_irq);
104 } 104 }
105 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { 105 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
106 writel(readl(treg) & (~b), treg); 106 writel(readl(treg) & (~b), treg);
107 irq_desc[d->irq].handle_irq = handle_level_irq; 107 __irq_set_handler_locked(d->irq, handle_level_irq);
108 } 108 }
109 return 0; 109 return 0;
110} 110}
@@ -145,8 +145,7 @@ void __init msm_init_irq(void)
145 writel(1, VIC_INT_MASTEREN); 145 writel(1, VIC_INT_MASTEREN);
146 146
147 for (n = 0; n < NR_MSM_IRQS; n++) { 147 for (n = 0; n < NR_MSM_IRQS; n++) {
148 set_irq_chip(n, &msm_irq_chip); 148 irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
149 set_irq_handler(n, handle_level_irq);
150 set_irq_flags(n, IRQF_VALID); 149 set_irq_flags(n, IRQF_VALID);
151 } 150 }
152} 151}
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index cfa808dd4897..232f97a04504 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -46,7 +46,7 @@ static DEFINE_MUTEX(scm_lock);
46 * @id: command to be executed 46 * @id: command to be executed
47 * @buf: buffer returned from scm_get_command_buffer() 47 * @buf: buffer returned from scm_get_command_buffer()
48 * 48 *
49 * An SCM command is layed out in memory as follows: 49 * An SCM command is laid out in memory as follows:
50 * 50 *
51 * ------------------- <--- struct scm_command 51 * ------------------- <--- struct scm_command
52 * | command header | 52 * | command header |
diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
index 11b54c7aeb09..689e78c95f38 100644
--- a/arch/arm/mach-msm/sirc.c
+++ b/arch/arm/mach-msm/sirc.c
@@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
105 val = readl(sirc_regs.int_type); 105 val = readl(sirc_regs.int_type);
106 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { 106 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
107 val |= mask; 107 val |= mask;
108 irq_desc[d->irq].handle_irq = handle_edge_irq; 108 __irq_set_handler_locked(d->irq, handle_edge_irq);
109 } else { 109 } else {
110 val &= ~mask; 110 val &= ~mask;
111 irq_desc[d->irq].handle_irq = handle_level_irq; 111 __irq_set_handler_locked(d->irq, handle_level_irq);
112 } 112 }
113 113
114 writel(val, sirc_regs.int_type); 114 writel(val, sirc_regs.int_type);
@@ -158,15 +158,14 @@ void __init msm_init_sirc(void)
158 wake_enable = 0; 158 wake_enable = 0;
159 159
160 for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) { 160 for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) {
161 set_irq_chip(i, &sirc_irq_chip); 161 irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq);
162 set_irq_handler(i, handle_edge_irq);
163 set_irq_flags(i, IRQF_VALID); 162 set_irq_flags(i, IRQF_VALID);
164 } 163 }
165 164
166 for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) { 165 for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) {
167 set_irq_chained_handler(sirc_reg_table[i].cascade_irq, 166 irq_set_chained_handler(sirc_reg_table[i].cascade_irq,
168 sirc_irq_handler); 167 sirc_irq_handler);
169 set_irq_wake(sirc_reg_table[i].cascade_irq, 1); 168 irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
170 } 169 }
171 return; 170 return;
172} 171}
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index e7f8e5a4d48f..38b95e949d13 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -263,13 +263,13 @@ static void __init msm_timer_init(void)
263} 263}
264 264
265#ifdef CONFIG_SMP 265#ifdef CONFIG_SMP
266void __cpuinit local_timer_setup(struct clock_event_device *evt) 266int __cpuinit local_timer_setup(struct clock_event_device *evt)
267{ 267{
268 struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; 268 struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
269 269
270 /* Use existing clock_event for cpu 0 */ 270 /* Use existing clock_event for cpu 0 */
271 if (!smp_processor_id()) 271 if (!smp_processor_id())
272 return; 272 return 0;
273 273
274 writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); 274 writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
275 275
@@ -295,6 +295,7 @@ void __cpuinit local_timer_setup(struct clock_event_device *evt)
295 gic_enable_ppi(clock->irq.irq); 295 gic_enable_ppi(clock->irq.irq);
296 296
297 clockevents_register_device(evt); 297 clockevents_register_device(evt);
298 return 0;
298} 299}
299 300
300inline int local_timer_ack(void) 301inline int local_timer_ack(void)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 08da497c39c2..3e24431bb5ea 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -38,8 +38,8 @@ void __init mv78xx0_init_irq(void)
38 orion_gpio_init(0, 32, GPIO_VIRT_BASE, 38 orion_gpio_init(0, 32, GPIO_VIRT_BASE,
39 mv78xx0_core_index() ? 0x18 : 0, 39 mv78xx0_core_index() ? 0x18 : 0,
40 IRQ_MV78XX0_GPIO_START); 40 IRQ_MV78XX0_GPIO_START);
41 set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); 41 irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
42 set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); 42 irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
43 set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); 43 irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
44 set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler); 44 irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
45} 45}
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 80761474c0f8..2e288b38b4ad 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -43,6 +43,7 @@
43#include <mach/ipu.h> 43#include <mach/ipu.h>
44#include <mach/mx3fb.h> 44#include <mach/mx3fb.h>
45#include <mach/audmux.h> 45#include <mach/audmux.h>
46#include <mach/esdhc.h>
46 47
47#include "devices-imx35.h" 48#include "devices-imx35.h"
48#include "devices.h" 49#include "devices.h"
@@ -163,11 +164,14 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
163 MX35_PAD_SD1_DATA1__ESDHC1_DAT1, 164 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
164 MX35_PAD_SD1_DATA2__ESDHC1_DAT2, 165 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
165 MX35_PAD_SD1_DATA3__ESDHC1_DAT3, 166 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
167 /* SD1 CD */
168 MX35_PAD_LD18__GPIO3_24,
166}; 169};
167 170
168#define GPIO_LED1 IMX_GPIO_NR(3, 29) 171#define GPIO_LED1 IMX_GPIO_NR(3, 29)
169#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25) 172#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
170#define GPIO_LCDPWR (4) 173#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
174#define GPIO_SD1CD IMX_GPIO_NR(3, 24)
171 175
172static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd, 176static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
173 unsigned int power) 177 unsigned int power)
@@ -254,6 +258,11 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
254 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 258 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
255}; 259};
256 260
261static struct esdhc_platform_data sd1_pdata = {
262 .cd_gpio = GPIO_SD1CD,
263 .wp_gpio = -EINVAL,
264};
265
257/* 266/*
258 * system init for baseboard usage. Will be called by cpuimx35 init. 267 * system init for baseboard usage. Will be called by cpuimx35 init.
259 * 268 *
@@ -289,7 +298,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
289 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 298 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
290 299
291 imx35_add_flexcan1(NULL); 300 imx35_add_flexcan1(NULL);
292 imx35_add_sdhci_esdhc_imx(0, NULL); 301 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
293 302
294 gpio_request(GPIO_LED1, "LED1"); 303 gpio_request(GPIO_LED1, "LED1");
295 gpio_direction_output(GPIO_LED1, 1); 304 gpio_direction_output(GPIO_LED1, 1);
@@ -301,7 +310,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
301 310
302 gpio_request(GPIO_LCDPWR, "LCDPWR"); 311 gpio_request(GPIO_LCDPWR, "LCDPWR");
303 gpio_direction_output(GPIO_LCDPWR, 1); 312 gpio_direction_output(GPIO_LCDPWR, 1);
304 gpio_free(GPIO_LCDPWR);
305 313
306 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, 314 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
307 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); 315 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 544d3e414f58..034be624d35c 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -488,10 +488,12 @@ static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
488}; 488};
489 489
490/* MC13783 */ 490/* MC13783 */
491static struct mc13xxx_platform_data mc13783_pdata __initdata = { 491static struct mc13xxx_platform_data mc13783_pdata = {
492 .regulators = mx31_3ds_regulators, 492 .regulators = {
493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), 493 .regulators = mx31_3ds_regulators,
494 .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_TOUCHSCREEN 494 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
495 },
496 .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN,
495}; 497};
496 498
497/* SPI */ 499/* SPI */
diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 4e4b780c481d..3d095d69bc68 100644
--- a/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -199,12 +199,11 @@ static void __init mx31ads_init_expio(void)
199 __raw_writew(0xFFFF, PBC_INTSTATUS_REG); 199 __raw_writew(0xFFFF, PBC_INTSTATUS_REG);
200 for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); 200 for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
201 i++) { 201 i++) {
202 set_irq_chip(i, &expio_irq_chip); 202 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
203 set_irq_handler(i, handle_level_irq);
204 set_irq_flags(i, IRQF_VALID); 203 set_irq_flags(i, IRQF_VALID);
205 } 204 }
206 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); 205 irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
207 set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); 206 irq_set_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
208} 207}
209 208
210#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 209#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index 6f3692bccb8a..3a021b01161d 100644
--- a/arch/arm/mach-mx3/mach-mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -268,8 +268,10 @@ static struct mc13783_leds_platform_data moboard_leds = {
268}; 268};
269 269
270static struct mc13xxx_platform_data moboard_pmic = { 270static struct mc13xxx_platform_data moboard_pmic = {
271 .regulators = moboard_regulators, 271 .regulators = {
272 .num_regulators = ARRAY_SIZE(moboard_regulators), 272 .regulators = moboard_regulators,
273 .num_regulators = ARRAY_SIZE(moboard_regulators),
274 },
273 .leds = &moboard_leds, 275 .leds = &moboard_leds,
274 .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC | 276 .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC |
275 MC13XXX_USE_ADC | MC13XXX_USE_LED, 277 MC13XXX_USE_ADC | MC13XXX_USE_LED,
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index b3ecfb22d241..036ba1a4704b 100644
--- a/arch/arm/mach-mx3/mach-pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -40,6 +40,7 @@
40#include <mach/mx3fb.h> 40#include <mach/mx3fb.h>
41#include <mach/ulpi.h> 41#include <mach/ulpi.h>
42#include <mach/audmux.h> 42#include <mach/audmux.h>
43#include <mach/esdhc.h>
43 44
44#include "devices-imx35.h" 45#include "devices-imx35.h"
45#include "devices.h" 46#include "devices.h"
@@ -217,11 +218,15 @@ static iomux_v3_cfg_t pcm043_pads[] = {
217 MX35_PAD_SD1_DATA1__ESDHC1_DAT1, 218 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
218 MX35_PAD_SD1_DATA2__ESDHC1_DAT2, 219 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
219 MX35_PAD_SD1_DATA3__ESDHC1_DAT3, 220 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
221 MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */
222 MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */
220}; 223};
221 224
222#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31) 225#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31)
223#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28) 226#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28)
224#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0) 227#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0)
228#define SD1_GPIO_WP IMX_GPIO_NR(2, 23)
229#define SD1_GPIO_CD IMX_GPIO_NR(2, 24)
225 230
226static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97) 231static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
227{ 232{
@@ -346,6 +351,11 @@ static int __init pcm043_otg_mode(char *options)
346} 351}
347__setup("otg_mode=", pcm043_otg_mode); 352__setup("otg_mode=", pcm043_otg_mode);
348 353
354static struct esdhc_platform_data sd1_pdata = {
355 .wp_gpio = SD1_GPIO_WP,
356 .cd_gpio = SD1_GPIO_CD,
357};
358
349/* 359/*
350 * Board specific initialization. 360 * Board specific initialization.
351 */ 361 */
@@ -395,7 +405,7 @@ static void __init pcm043_init(void)
395 imx35_add_fsl_usb2_udc(&otg_device_pdata); 405 imx35_add_fsl_usb2_udc(&otg_device_pdata);
396 406
397 imx35_add_flexcan1(NULL); 407 imx35_add_flexcan1(NULL);
398 imx35_add_sdhci_esdhc_imx(0, NULL); 408 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
399} 409}
400 410
401static void __init pcm043_timer_init(void) 411static void __init pcm043_timer_init(void)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 83ee08847d4d..159340da9191 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -165,6 +165,7 @@ config MACH_MX53_LOCO
165 select IMX_HAVE_PLATFORM_IMX_I2C 165 select IMX_HAVE_PLATFORM_IMX_I2C
166 select IMX_HAVE_PLATFORM_IMX_UART 166 select IMX_HAVE_PLATFORM_IMX_UART
167 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 167 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
168 select IMX_HAVE_PLATFORM_GPIO_KEYS
168 help 169 help
169 Include support for MX53 LOCO platform. This includes specific 170 Include support for MX53 LOCO platform. This includes specific
170 configurations for the board and its peripherals. 171 configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 4f63048be3ca..0b9338cec516 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Object file lists. 5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o 7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 8
9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index b2ecd194e76d..bea4e4135f9d 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -228,13 +228,12 @@ static inline void babbage_fec_reset(void)
228 int ret; 228 int ret;
229 229
230 /* reset FEC PHY */ 230 /* reset FEC PHY */
231 ret = gpio_request(BABBAGE_FEC_PHY_RESET, "fec-phy-reset"); 231 ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
232 GPIOF_OUT_INIT_LOW, "fec-phy-reset");
232 if (ret) { 233 if (ret) {
233 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); 234 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
234 return; 235 return;
235 } 236 }
236 gpio_direction_output(BABBAGE_FEC_PHY_RESET, 0);
237 gpio_set_value(BABBAGE_FEC_PHY_RESET, 0);
238 msleep(1); 237 msleep(1);
239 gpio_set_value(BABBAGE_FEC_PHY_RESET, 1); 238 gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
240} 239}
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 7b5735c5ea59..2af3f43f74db 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -34,7 +34,7 @@
34#include <mach/imx-uart.h> 34#include <mach/imx-uart.h>
35#include <mach/iomux-mx53.h> 35#include <mach/iomux-mx53.h>
36 36
37#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) 37#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6)
38#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) 38#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
39#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) 39#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
40 40
@@ -82,15 +82,14 @@ static inline void mx53_evk_fec_reset(void)
82 int ret; 82 int ret;
83 83
84 /* reset FEC PHY */ 84 /* reset FEC PHY */
85 ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); 85 ret = gpio_request_one(MX53_EVK_FEC_PHY_RST, GPIOF_OUT_INIT_LOW,
86 "fec-phy-reset");
86 if (ret) { 87 if (ret) {
87 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); 88 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
88 return; 89 return;
89 } 90 }
90 gpio_direction_output(SMD_FEC_PHY_RST, 0);
91 gpio_set_value(SMD_FEC_PHY_RST, 0);
92 msleep(1); 91 msleep(1);
93 gpio_set_value(SMD_FEC_PHY_RST, 1); 92 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
94} 93}
95 94
96static struct fec_platform_data mx53_evk_fec_pdata = { 95static struct fec_platform_data mx53_evk_fec_pdata = {
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 0a18f8d23eb0..10a1bea10548 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -36,6 +36,9 @@
36#include "crm_regs.h" 36#include "crm_regs.h"
37#include "devices-imx53.h" 37#include "devices-imx53.h"
38 38
39#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8)
40#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14)
41#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15)
39#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) 42#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
40 43
41static iomux_v3_cfg_t mx53_loco_pads[] = { 44static iomux_v3_cfg_t mx53_loco_pads[] = {
@@ -180,6 +183,27 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
180 MX53_PAD_GPIO_8__GPIO1_8, 183 MX53_PAD_GPIO_8__GPIO1_8,
181}; 184};
182 185
186#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
187{ \
188 .gpio = gpio_num, \
189 .type = EV_KEY, \
190 .code = ev_code, \
191 .active_low = act_low, \
192 .desc = "btn " descr, \
193 .wakeup = wake, \
194}
195
196static const struct gpio_keys_button loco_buttons[] __initconst = {
197 GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0),
198 GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0),
199 GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0),
200};
201
202static const struct gpio_keys_platform_data loco_button_data __initconst = {
203 .buttons = loco_buttons,
204 .nbuttons = ARRAY_SIZE(loco_buttons),
205};
206
183static inline void mx53_loco_fec_reset(void) 207static inline void mx53_loco_fec_reset(void)
184{ 208{
185 int ret; 209 int ret;
@@ -215,6 +239,7 @@ static void __init mx53_loco_board_init(void)
215 imx53_add_imx_i2c(1, &mx53_loco_i2c_data); 239 imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
216 imx53_add_sdhci_esdhc_imx(0, NULL); 240 imx53_add_sdhci_esdhc_imx(0, NULL);
217 imx53_add_sdhci_esdhc_imx(2, NULL); 241 imx53_add_sdhci_esdhc_imx(2, NULL);
242 imx_add_gpio_keys(&loco_button_data);
218} 243}
219 244
220static void __init mx53_loco_timer_init(void) 245static void __init mx53_loco_timer_init(void)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 652ace413825..fdbc05ed5513 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -865,6 +865,13 @@ static struct clk aips_tz2_clk = {
865 .disable = _clk_ccgr_disable_inwait, 865 .disable = _clk_ccgr_disable_inwait,
866}; 866};
867 867
868static struct clk gpc_dvfs_clk = {
869 .enable_reg = MXC_CCM_CCGR5,
870 .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
871 .enable = _clk_ccgr_enable,
872 .disable = _clk_ccgr_disable,
873};
874
868static struct clk gpt_32k_clk = { 875static struct clk gpt_32k_clk = {
869 .id = 0, 876 .id = 0,
870 .parent = &ckil_clk, 877 .parent = &ckil_clk,
@@ -1448,6 +1455,7 @@ static struct clk_lookup mx51_lookups[] = {
1448 _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk) 1455 _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
1449 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk) 1456 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
1450 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk) 1457 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
1458 _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
1451}; 1459};
1452 1460
1453static struct clk_lookup mx53_lookups[] = { 1461static struct clk_lookup mx53_lookups[] = {
@@ -1511,6 +1519,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
1511 clk_enable(&iim_clk); 1519 clk_enable(&iim_clk);
1512 mx51_revision(); 1520 mx51_revision();
1513 clk_disable(&iim_clk); 1521 clk_disable(&iim_clk);
1522 mx51_display_revision();
1514 1523
1515 /* move usb_phy_clk to 24MHz */ 1524 /* move usb_phy_clk to 24MHz */
1516 clk_set_parent(&usb_phy1_clk, &osc_clk); 1525 clk_set_parent(&usb_phy1_clk, &osc_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index df46b5e60857..472bdfab2e55 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -21,6 +21,7 @@
21static int cpu_silicon_rev = -1; 21static int cpu_silicon_rev = -1;
22 22
23#define IIM_SREV 0x24 23#define IIM_SREV 0x24
24#define MX50_HW_ADADIG_DIGPROG 0xB0
24 25
25static int get_mx51_srev(void) 26static int get_mx51_srev(void)
26{ 27{
@@ -51,6 +52,26 @@ int mx51_revision(void)
51} 52}
52EXPORT_SYMBOL(mx51_revision); 53EXPORT_SYMBOL(mx51_revision);
53 54
55void mx51_display_revision(void)
56{
57 int rev;
58 char *srev;
59 rev = mx51_revision();
60
61 switch (rev) {
62 case IMX_CHIP_REVISION_2_0:
63 srev = IMX_CHIP_REVISION_2_0_STRING;
64 break;
65 case IMX_CHIP_REVISION_3_0:
66 srev = IMX_CHIP_REVISION_3_0_STRING;
67 break;
68 default:
69 srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
70 }
71 printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
72}
73EXPORT_SYMBOL(mx51_display_revision);
74
54#ifdef CONFIG_NEON 75#ifdef CONFIG_NEON
55 76
56/* 77/*
@@ -107,6 +128,44 @@ int mx53_revision(void)
107} 128}
108EXPORT_SYMBOL(mx53_revision); 129EXPORT_SYMBOL(mx53_revision);
109 130
131static int get_mx50_srev(void)
132{
133 void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
134 u32 rev;
135
136 if (!anatop) {
137 cpu_silicon_rev = -EINVAL;
138 return 0;
139 }
140
141 rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
142 rev &= 0xff;
143
144 iounmap(anatop);
145 if (rev == 0x0)
146 return IMX_CHIP_REVISION_1_0;
147 else if (rev == 0x1)
148 return IMX_CHIP_REVISION_1_1;
149 return 0;
150}
151
152/*
153 * Returns:
154 * the silicon revision of the cpu
155 * -EINVAL - not a mx50
156 */
157int mx50_revision(void)
158{
159 if (!cpu_is_mx50())
160 return -EINVAL;
161
162 if (cpu_silicon_rev == -1)
163 cpu_silicon_rev = get_mx50_srev();
164
165 return cpu_silicon_rev;
166}
167EXPORT_SYMBOL(mx50_revision);
168
110static int __init post_cpu_init(void) 169static int __init post_cpu_init(void)
111{ 170{
112 unsigned int reg; 171 unsigned int reg;
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index e83ffadb65f8..4a8550529b04 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -212,7 +212,7 @@ void __init eukrea_mbimx51_baseboard_init(void)
212 212
213 gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); 213 gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
214 gpio_direction_input(MBIMX51_TSC2007_GPIO); 214 gpio_direction_input(MBIMX51_TSC2007_GPIO);
215 set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); 215 irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
216 i2c_register_board_info(1, mbimx51_i2c_devices, 216 i2c_register_board_info(1, mbimx51_i2c_devices,
217 ARRAY_SIZE(mbimx51_i2c_devices)); 217 ARRAY_SIZE(mbimx51_i2c_devices));
218 218
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index c372a4373691..e6c1119c20ae 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -67,6 +67,10 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
67 MX51_PAD_SD1_DATA1__SD1_DATA1, 67 MX51_PAD_SD1_DATA1__SD1_DATA1,
68 MX51_PAD_SD1_DATA2__SD1_DATA2, 68 MX51_PAD_SD1_DATA2__SD1_DATA2,
69 MX51_PAD_SD1_DATA3__SD1_DATA3, 69 MX51_PAD_SD1_DATA3__SD1_DATA3,
70 /* SD1 CD */
71 _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP |
72 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
73 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
70}; 74};
71 75
72#define GPIO_LED1 IMX_GPIO_NR(3, 30) 76#define GPIO_LED1 IMX_GPIO_NR(3, 30)
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 51a67fc7f0ef..d0c7075937cf 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -42,7 +42,6 @@
42#include <asm/mach-types.h> 42#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
44#include <asm/mach/time.h> 44#include <asm/mach/time.h>
45#include <asm/mach-types.h>
46 45
47#include "devices-imx51.h" 46#include "devices-imx51.h"
48#include "devices.h" 47#include "devices.h"
@@ -572,8 +571,10 @@ static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = {
572 571
573static struct mc13xxx_platform_data mx51_efika_mc13892_data = { 572static struct mc13xxx_platform_data mx51_efika_mc13892_data = {
574 .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR, 573 .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR,
575 .num_regulators = ARRAY_SIZE(mx51_efika_regulators), 574 .regulators = {
576 .regulators = mx51_efika_regulators, 575 .num_regulators = ARRAY_SIZE(mx51_efika_regulators),
576 .regulators = mx51_efika_regulators,
577 },
577}; 578};
578 579
579static struct spi_board_info mx51_efika_spi_board_info[] __initdata = { 580static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
new file mode 100644
index 000000000000..76ae8dc33e00
--- /dev/null
+++ b/arch/arm/mach-mx5/system.c
@@ -0,0 +1,84 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <mach/hardware.h>
16#include "crm_regs.h"
17
18/* set cpu low power mode before WFI instruction. This function is called
19 * mx5 because it can be used for mx50, mx51, and mx53.*/
20void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
21{
22 u32 plat_lpc, arm_srpgcr, ccm_clpcr;
23 u32 empgc0, empgc1;
24 int stop_mode = 0;
25
26 /* always allow platform to issue a deep sleep mode request */
27 plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
28 ~(MXC_CORTEXA8_PLAT_LPC_DSM);
29 ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
30 arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
31 empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
32 empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
33
34 switch (mode) {
35 case WAIT_CLOCKED:
36 break;
37 case WAIT_UNCLOCKED:
38 ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
39 break;
40 case WAIT_UNCLOCKED_POWER_OFF:
41 case STOP_POWER_OFF:
42 plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
43 | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
44 if (mode == WAIT_UNCLOCKED_POWER_OFF) {
45 ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
46 ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
47 ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
48 stop_mode = 0;
49 } else {
50 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
51 ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET;
52 ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
53 ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
54 stop_mode = 1;
55 }
56 arm_srpgcr |= MXC_SRPGCR_PCR;
57
58 if (tzic_enable_wake(1) != 0)
59 return;
60 break;
61 case STOP_POWER_ON:
62 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
63 break;
64 default:
65 printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
66 return;
67 }
68
69 __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
70 __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
71 __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
72
73 /* Enable NEON SRPG for all but MX50TO1.0. */
74 if (mx50_revision() != IMX_CHIP_REVISION_1_0)
75 __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
76
77 if (stop_mode) {
78 empgc0 |= MXC_SRPGCR_PCR;
79 empgc1 |= MXC_SRPGCR_PCR;
80
81 __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
82 __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
83 }
84}
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 4f6f174af6c8..4522fbb235d5 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -22,6 +22,7 @@ config MACH_MX23EVK
22 select SOC_IMX23 22 select SOC_IMX23
23 select MXS_HAVE_AMBA_DUART 23 select MXS_HAVE_AMBA_DUART
24 select MXS_HAVE_PLATFORM_AUART 24 select MXS_HAVE_PLATFORM_AUART
25 select MXS_HAVE_PLATFORM_MXS_MMC
25 select MXS_HAVE_PLATFORM_MXSFB 26 select MXS_HAVE_PLATFORM_MXSFB
26 default y 27 default y
27 help 28 help
@@ -35,6 +36,7 @@ config MACH_MX28EVK
35 select MXS_HAVE_PLATFORM_AUART 36 select MXS_HAVE_PLATFORM_AUART
36 select MXS_HAVE_PLATFORM_FEC 37 select MXS_HAVE_PLATFORM_FEC
37 select MXS_HAVE_PLATFORM_FLEXCAN 38 select MXS_HAVE_PLATFORM_FLEXCAN
39 select MXS_HAVE_PLATFORM_MXS_MMC
38 select MXS_HAVE_PLATFORM_MXSFB 40 select MXS_HAVE_PLATFORM_MXSFB
39 select MXS_OCOTP 41 select MXS_OCOTP
40 default y 42 default y
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index d133c7f30940..c3577ea789ac 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -521,6 +521,15 @@ static int clk_misc_init(void)
521 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT, 521 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,
522 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET); 522 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);
523 523
524 /*
525 * 480 MHz seems too high to be ssp clock source directly,
526 * so set frac to get a 288 MHz ref_io.
527 */
528 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);
529 reg &= ~BM_CLKCTRL_FRAC_IOFRAC;
530 reg |= 30 << BP_CLKCTRL_FRAC_IOFRAC;
531 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);
532
524 return 0; 533 return 0;
525} 534}
526 535
@@ -528,6 +537,12 @@ int __init mx23_clocks_init(void)
528{ 537{
529 clk_misc_init(); 538 clk_misc_init();
530 539
540 /*
541 * source ssp clock from ref_io than ref_xtal,
542 * as ref_xtal only provides 24 MHz as maximum.
543 */
544 clk_set_parent(&ssp_clk, &ref_io_clk);
545
531 clk_enable(&cpu_clk); 546 clk_enable(&cpu_clk);
532 clk_enable(&hbus_clk); 547 clk_enable(&hbus_clk);
533 clk_enable(&xbus_clk); 548 clk_enable(&xbus_clk);
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 5e489a2b2023..1ad97fed1e94 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -618,6 +618,8 @@ static struct clk_lookup lookups[] = {
618 _REGISTER_CLOCK("pll2", NULL, pll2_clk) 618 _REGISTER_CLOCK("pll2", NULL, pll2_clk)
619 _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk) 619 _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
620 _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk) 620 _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
621 _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk)
622 _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)
621 _REGISTER_CLOCK("flexcan.0", NULL, can0_clk) 623 _REGISTER_CLOCK("flexcan.0", NULL, can0_clk)
622 _REGISTER_CLOCK("flexcan.1", NULL, can1_clk) 624 _REGISTER_CLOCK("flexcan.1", NULL, can1_clk)
623 _REGISTER_CLOCK(NULL, "usb0", usb0_clk) 625 _REGISTER_CLOCK(NULL, "usb0", usb0_clk)
@@ -737,6 +739,15 @@ static int clk_misc_init(void)
737 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN; 739 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
738 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); 740 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
739 741
742 /*
743 * 480 MHz seems too high to be ssp clock source directly,
744 * so set frac0 to get a 288 MHz ref_io0.
745 */
746 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);
747 reg &= ~BM_CLKCTRL_FRAC0_IO0FRAC;
748 reg |= 30 << BP_CLKCTRL_FRAC0_IO0FRAC;
749 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);
750
740 return 0; 751 return 0;
741} 752}
742 753
@@ -744,6 +755,13 @@ int __init mx28_clocks_init(void)
744{ 755{
745 clk_misc_init(); 756 clk_misc_init();
746 757
758 /*
759 * source ssp clock from ref_io0 than ref_xtal,
760 * as ref_xtal only provides 24 MHz as maximum.
761 */
762 clk_set_parent(&ssp0_clk, &ref_io0_clk);
763 clk_set_parent(&ssp1_clk, &ref_io0_clk);
764
747 clk_enable(&cpu_clk); 765 clk_enable(&cpu_clk);
748 clk_enable(&hbus_clk); 766 clk_enable(&hbus_clk);
749 clk_enable(&xbus_clk); 767 clk_enable(&xbus_clk);
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h
index c7e14f4e3669..c6f345febd39 100644
--- a/arch/arm/mach-mxs/devices-mx23.h
+++ b/arch/arm/mach-mxs/devices-mx23.h
@@ -21,6 +21,10 @@ extern const struct mxs_auart_data mx23_auart_data[] __initconst;
21#define mx23_add_auart0() mx23_add_auart(0) 21#define mx23_add_auart0() mx23_add_auart(0)
22#define mx23_add_auart1() mx23_add_auart(1) 22#define mx23_add_auart1() mx23_add_auart(1)
23 23
24extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst;
25#define mx23_add_mxs_mmc(id, pdata) \
26 mxs_add_mxs_mmc(&mx23_mxs_mmc_data[id], pdata)
27
24#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id) 28#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id)
25 29
26struct platform_device *__init mx23_add_mxsfb( 30struct platform_device *__init mx23_add_mxsfb(
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index 9d08555c4cf0..c473eddce8cf 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -37,6 +37,10 @@ extern const struct mxs_flexcan_data mx28_flexcan_data[] __initconst;
37extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst; 37extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst;
38#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id]) 38#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id])
39 39
40extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst;
41#define mx28_add_mxs_mmc(id, pdata) \
42 mxs_add_mxs_mmc(&mx28_mxs_mmc_data[id], pdata)
43
40#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id) 44#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id)
41 45
42struct platform_device *__init mx28_add_mxsfb( 46struct platform_device *__init mx28_add_mxsfb(
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig
index 1451ad060d82..acf9eea124c0 100644
--- a/arch/arm/mach-mxs/devices/Kconfig
+++ b/arch/arm/mach-mxs/devices/Kconfig
@@ -15,6 +15,9 @@ config MXS_HAVE_PLATFORM_FLEXCAN
15config MXS_HAVE_PLATFORM_MXS_I2C 15config MXS_HAVE_PLATFORM_MXS_I2C
16 bool 16 bool
17 17
18config MXS_HAVE_PLATFORM_MXS_MMC
19 bool
20
18config MXS_HAVE_PLATFORM_MXS_PWM 21config MXS_HAVE_PLATFORM_MXS_PWM
19 bool 22 bool
20 23
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
index 0d9bea30b0a2..324f2824d38d 100644
--- a/arch/arm/mach-mxs/devices/Makefile
+++ b/arch/arm/mach-mxs/devices/Makefile
@@ -4,5 +4,6 @@ obj-y += platform-dma.o
4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o 4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
5obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o 5obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o 6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o 8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o 9obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
new file mode 100644
index 000000000000..382dacbeca21
--- /dev/null
+++ b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11
12#include <linux/compiler.h>
13#include <linux/err.h>
14#include <linux/init.h>
15
16#include <mach/mx23.h>
17#include <mach/mx28.h>
18#include <mach/devices-common.h>
19
20#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid) \
21 { \
22 .id = _id, \
23 .iobase = soc ## _SSP ## hwid ## _BASE_ADDR, \
24 .dma = soc ## _DMA_SSP ## hwid, \
25 .irq_err = soc ## _INT_SSP ## hwid ## _ERROR, \
26 .irq_dma = soc ## _INT_SSP ## hwid ## _DMA, \
27 }
28
29#define mxs_mxs_mmc_data_entry(soc, _id, hwid) \
30 [_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid)
31
32
33#ifdef CONFIG_SOC_IMX23
34const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = {
35 mxs_mxs_mmc_data_entry(MX23, 0, 1),
36 mxs_mxs_mmc_data_entry(MX23, 1, 2),
37};
38#endif
39
40#ifdef CONFIG_SOC_IMX28
41const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = {
42 mxs_mxs_mmc_data_entry(MX28, 0, 0),
43 mxs_mxs_mmc_data_entry(MX28, 1, 1),
44};
45#endif
46
47struct platform_device *__init mxs_add_mxs_mmc(
48 const struct mxs_mxs_mmc_data *data,
49 const struct mxs_mmc_platform_data *pdata)
50{
51 struct resource res[] = {
52 {
53 .start = data->iobase,
54 .end = data->iobase + SZ_8K - 1,
55 .flags = IORESOURCE_MEM,
56 }, {
57 .start = data->dma,
58 .end = data->dma,
59 .flags = IORESOURCE_DMA,
60 }, {
61 .start = data->irq_err,
62 .end = data->irq_err,
63 .flags = IORESOURCE_IRQ,
64 }, {
65 .start = data->irq_dma,
66 .end = data->irq_dma,
67 .flags = IORESOURCE_IRQ,
68 },
69 };
70
71 return mxs_add_platform_device("mxs-mmc", data->id,
72 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
73}
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
index 56fa2ed15222..2c950fef71a8 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/arch/arm/mach-mxs/gpio.c
@@ -136,7 +136,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
136static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) 136static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
137{ 137{
138 u32 irq_stat; 138 u32 irq_stat;
139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); 139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
140 u32 gpio_irq_no_base = port->virtual_irq_start; 140 u32 gpio_irq_no_base = port->virtual_irq_start;
141 141
142 desc->irq_data.chip->irq_ack(&desc->irq_data); 142 desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -265,14 +265,14 @@ int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
265 265
266 for (j = port[i].virtual_irq_start; 266 for (j = port[i].virtual_irq_start;
267 j < port[i].virtual_irq_start + 32; j++) { 267 j < port[i].virtual_irq_start + 32; j++) {
268 set_irq_chip(j, &gpio_irq_chip); 268 irq_set_chip_and_handler(j, &gpio_irq_chip,
269 set_irq_handler(j, handle_level_irq); 269 handle_level_irq);
270 set_irq_flags(j, IRQF_VALID); 270 set_irq_flags(j, IRQF_VALID);
271 } 271 }
272 272
273 /* setup one handler for each entry */ 273 /* setup one handler for each entry */
274 set_irq_chained_handler(port[i].irq, mxs_gpio_irq_handler); 274 irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
275 set_irq_data(port[i].irq, &port[i]); 275 irq_set_handler_data(port[i].irq, &port[i]);
276 276
277 /* register gpio chip */ 277 /* register gpio chip */
278 port[i].chip.direction_input = mxs_gpio_direction_input; 278 port[i].chip.direction_input = mxs_gpio_direction_input;
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c
index 0f4c120fc169..23ca9d083b2c 100644
--- a/arch/arm/mach-mxs/icoll.c
+++ b/arch/arm/mach-mxs/icoll.c
@@ -74,8 +74,7 @@ void __init icoll_init_irq(void)
74 mxs_reset_block(icoll_base + HW_ICOLL_CTRL); 74 mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
75 75
76 for (i = 0; i < MXS_INTERNAL_IRQS; i++) { 76 for (i = 0; i < MXS_INTERNAL_IRQS; i++) {
77 set_irq_chip(i, &mxs_icoll_chip); 77 irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq);
78 set_irq_handler(i, handle_level_irq);
79 set_irq_flags(i, IRQF_VALID); 78 set_irq_flags(i, IRQF_VALID);
80 } 79 }
81} 80}
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index 71f24484b044..c5137f14c364 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -73,6 +73,19 @@ struct mxs_i2c_data {
73}; 73};
74struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data); 74struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data);
75 75
76/* mmc */
77#include <mach/mmc.h>
78struct mxs_mxs_mmc_data {
79 int id;
80 resource_size_t iobase;
81 resource_size_t dma;
82 resource_size_t irq_err;
83 resource_size_t irq_dma;
84};
85struct platform_device *__init mxs_add_mxs_mmc(
86 const struct mxs_mxs_mmc_data *data,
87 const struct mxs_mmc_platform_data *pdata);
88
76/* pwm */ 89/* pwm */
77struct platform_device *__init mxs_add_mxs_pwm( 90struct platform_device *__init mxs_add_mxs_pwm(
78 resource_size_t iobase, int id); 91 resource_size_t iobase, int id);
diff --git a/arch/arm/mach-mxs/include/mach/dma.h b/arch/arm/mach-mxs/include/mach/dma.h
new file mode 100644
index 000000000000..7f4aeeaba8df
--- /dev/null
+++ b/arch/arm/mach-mxs/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MACH_MXS_DMA_H__
10#define __MACH_MXS_DMA_H__
11
12struct mxs_dma_data {
13 int chan_irq;
14};
15
16static inline int mxs_dma_is_apbh(struct dma_chan *chan)
17{
18 return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbh");
19}
20
21static inline int mxs_dma_is_apbx(struct dma_chan *chan)
22{
23 return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbx");
24}
25
26#endif /* __MACH_MXS_DMA_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/mmc.h b/arch/arm/mach-mxs/include/mach/mmc.h
new file mode 100644
index 000000000000..211547a05564
--- /dev/null
+++ b/arch/arm/mach-mxs/include/mach/mmc.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MACH_MXS_MMC_H__
10#define __MACH_MXS_MMC_H__
11
12struct mxs_mmc_platform_data {
13 int wp_gpio; /* write protect pin */
14 unsigned int flags;
15#define SLOTF_4_BIT_CAPABLE (1 << 0)
16#define SLOTF_8_BIT_CAPABLE (1 << 1)
17};
18#endif /* __MACH_MXS_MMC_H__ */
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index a66994f0518f..214e5b641bbc 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -28,6 +28,8 @@
28 28
29#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18) 29#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18)
30#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28) 30#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28)
31#define MX23EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(1, 30)
32#define MX23EVK_MMC0_SLOT_POWER MXS_GPIO_NR(1, 29)
31 33
32static const iomux_cfg_t mx23evk_pads[] __initconst = { 34static const iomux_cfg_t mx23evk_pads[] __initconst = {
33 /* duart */ 35 /* duart */
@@ -73,6 +75,36 @@ static const iomux_cfg_t mx23evk_pads[] __initconst = {
73 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL, 75 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL,
74 /* backlight control */ 76 /* backlight control */
75 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL, 77 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL,
78
79 /* mmc */
80 MX23_PAD_SSP1_DATA0__SSP1_DATA0 |
81 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
82 MX23_PAD_SSP1_DATA1__SSP1_DATA1 |
83 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
84 MX23_PAD_SSP1_DATA2__SSP1_DATA2 |
85 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
86 MX23_PAD_SSP1_DATA3__SSP1_DATA3 |
87 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
88 MX23_PAD_GPMI_D08__SSP1_DATA4 |
89 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
90 MX23_PAD_GPMI_D09__SSP1_DATA5 |
91 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
92 MX23_PAD_GPMI_D10__SSP1_DATA6 |
93 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
94 MX23_PAD_GPMI_D11__SSP1_DATA7 |
95 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
96 MX23_PAD_SSP1_CMD__SSP1_CMD |
97 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
98 MX23_PAD_SSP1_DETECT__SSP1_DETECT |
99 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
100 MX23_PAD_SSP1_SCK__SSP1_SCK |
101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
102 /* write protect */
103 MX23_PAD_PWM4__GPIO_1_30 |
104 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
105 /* slot power enable */
106 MX23_PAD_PWM3__GPIO_1_29 |
107 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
76}; 108};
77 109
78/* mxsfb (lcdif) */ 110/* mxsfb (lcdif) */
@@ -101,6 +133,11 @@ static const struct mxsfb_platform_data mx23evk_mxsfb_pdata __initconst = {
101 .ld_intf_width = STMLCDIF_24BIT, 133 .ld_intf_width = STMLCDIF_24BIT,
102}; 134};
103 135
136static struct mxs_mmc_platform_data mx23evk_mmc_pdata __initdata = {
137 .wp_gpio = MX23EVK_MMC0_WRITE_PROTECT,
138 .flags = SLOTF_8_BIT_CAPABLE,
139};
140
104static void __init mx23evk_init(void) 141static void __init mx23evk_init(void)
105{ 142{
106 int ret; 143 int ret;
@@ -110,6 +147,13 @@ static void __init mx23evk_init(void)
110 mx23_add_duart(); 147 mx23_add_duart();
111 mx23_add_auart0(); 148 mx23_add_auart0();
112 149
150 /* power on mmc slot by writing 0 to the gpio */
151 ret = gpio_request_one(MX23EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT,
152 "mmc0-slot-power");
153 if (ret)
154 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
155 mx23_add_mxs_mmc(0, &mx23evk_mmc_pdata);
156
113 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); 157 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
114 if (ret) 158 if (ret)
115 pr_warn("failed to request gpio lcd-enable: %d\n", ret); 159 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 08002d02267a..bb329b9a2608 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -34,6 +34,11 @@
34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) 34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
35#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) 35#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
36 36
37#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
38#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
39#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
40#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
41
37static const iomux_cfg_t mx28evk_pads[] __initconst = { 42static const iomux_cfg_t mx28evk_pads[] __initconst = {
38 /* duart */ 43 /* duart */
39 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, 44 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
@@ -115,6 +120,65 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = {
115 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, 120 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
116 /* backlight control */ 121 /* backlight control */
117 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, 122 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
123 /* mmc0 */
124 MX28_PAD_SSP0_DATA0__SSP0_D0 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA1__SSP0_D1 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA2__SSP0_D2 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA3__SSP0_D3 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA4__SSP0_D4 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA5__SSP0_D5 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA6__SSP0_D6 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA7__SSP0_D7 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_CMD__SSP0_CMD |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144 MX28_PAD_SSP0_SCK__SSP0_SCK |
145 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
146 /* write protect */
147 MX28_PAD_SSP1_SCK__GPIO_2_12 |
148 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
149 /* slot power enable */
150 MX28_PAD_PWM3__GPIO_3_28 |
151 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
152
153 /* mmc1 */
154 MX28_PAD_GPMI_D00__SSP1_D0 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D01__SSP1_D1 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D02__SSP1_D2 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D03__SSP1_D3 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D04__SSP1_D4 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D05__SSP1_D5 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D06__SSP1_D6 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D07__SSP1_D7 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_RDY1__SSP1_CMD |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174 MX28_PAD_GPMI_WRN__SSP1_SCK |
175 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
176 /* write protect */
177 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
178 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
179 /* slot power enable */
180 MX28_PAD_PWM4__GPIO_3_29 |
181 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
118}; 182};
119 183
120/* fec */ 184/* fec */
@@ -258,6 +322,18 @@ static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
258 .ld_intf_width = STMLCDIF_24BIT, 322 .ld_intf_width = STMLCDIF_24BIT,
259}; 323};
260 324
325static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
326 {
327 /* mmc0 */
328 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
329 .flags = SLOTF_8_BIT_CAPABLE,
330 }, {
331 /* mmc1 */
332 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
333 .flags = SLOTF_8_BIT_CAPABLE,
334 },
335};
336
261static void __init mx28evk_init(void) 337static void __init mx28evk_init(void)
262{ 338{
263 int ret; 339 int ret;
@@ -297,6 +373,19 @@ static void __init mx28evk_init(void)
297 gpio_set_value(MX28EVK_BL_ENABLE, 1); 373 gpio_set_value(MX28EVK_BL_ENABLE, 1);
298 374
299 mx28_add_mxsfb(&mx28evk_mxsfb_pdata); 375 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
376
377 /* power on mmc slot by writing 0 to the gpio */
378 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT,
379 "mmc0-slot-power");
380 if (ret)
381 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
382 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
383
384 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_DIR_OUT,
385 "mmc1-slot-power");
386 if (ret)
387 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
388 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
300} 389}
301 390
302static void __init mx28evk_timer_init(void) 391static void __init mx28evk_timer_init(void)
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index fa0b154da67b..0fcff47009cf 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -45,7 +45,7 @@ static const iomux_cfg_t tx28_fec_gpio_pads[] __initconst = {
45}; 45};
46 46
47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3) 47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3)
48static const iomux_cfg_t tx28_fec_pads[] __initconst = { 48static const iomux_cfg_t tx28_fec0_pads[] __initconst = {
49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE, 49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE,
50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE, 50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE,
51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE, 51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE,
@@ -57,7 +57,20 @@ static const iomux_cfg_t tx28_fec_pads[] __initconst = {
57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE, 57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE,
58}; 58};
59 59
60static const struct fec_platform_data tx28_fec_data __initconst = { 60static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
61 MX28_PAD_ENET0_RXD2__ENET1_RXD0,
62 MX28_PAD_ENET0_RXD3__ENET1_RXD1,
63 MX28_PAD_ENET0_TXD2__ENET1_TXD0,
64 MX28_PAD_ENET0_TXD3__ENET1_TXD1,
65 MX28_PAD_ENET0_COL__ENET1_TX_EN,
66 MX28_PAD_ENET0_CRS__ENET1_RX_EN,
67};
68
69static struct fec_platform_data tx28_fec0_data = {
70 .phy = PHY_INTERFACE_MODE_RMII,
71};
72
73static struct fec_platform_data tx28_fec1_data = {
61 .phy = PHY_INTERFACE_MODE_RMII, 74 .phy = PHY_INTERFACE_MODE_RMII,
62}; 75};
63 76
@@ -108,15 +121,15 @@ int __init tx28_add_fec0(void)
108 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__); 121 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__);
109 gpio_set_value(TX28_FEC_PHY_RESET, 1); 122 gpio_set_value(TX28_FEC_PHY_RESET, 1);
110 123
111 ret = mxs_iomux_setup_multiple_pads(tx28_fec_pads, 124 ret = mxs_iomux_setup_multiple_pads(tx28_fec0_pads,
112 ARRAY_SIZE(tx28_fec_pads)); 125 ARRAY_SIZE(tx28_fec0_pads));
113 if (ret) { 126 if (ret) {
114 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n", 127 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
115 __func__, ret); 128 __func__, ret);
116 goto free_gpios; 129 goto free_gpios;
117 } 130 }
118 pr_debug("%s: Registering FEC device\n", __func__); 131 pr_debug("%s: Registering FEC0 device\n", __func__);
119 mx28_add_fec(0, &tx28_fec_data); 132 mx28_add_fec(0, &tx28_fec0_data);
120 return 0; 133 return 0;
121 134
122free_gpios: 135free_gpios:
@@ -129,3 +142,19 @@ free_gpios:
129 142
130 return ret; 143 return ret;
131} 144}
145
146int __init tx28_add_fec1(void)
147{
148 int ret;
149
150 ret = mxs_iomux_setup_multiple_pads(tx28_fec1_pads,
151 ARRAY_SIZE(tx28_fec1_pads));
152 if (ret) {
153 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
154 __func__, ret);
155 return ret;
156 }
157 pr_debug("%s: Registering FEC1 device\n", __func__);
158 mx28_add_fec(1, &tx28_fec1_data);
159 return 0;
160}
diff --git a/arch/arm/mach-mxs/module-tx28.h b/arch/arm/mach-mxs/module-tx28.h
index df9e1b6e81bf..8ed425457d30 100644
--- a/arch/arm/mach-mxs/module-tx28.h
+++ b/arch/arm/mach-mxs/module-tx28.h
@@ -7,3 +7,4 @@
7 * Free Software Foundation. 7 * Free Software Foundation.
8 */ 8 */
9int __init tx28_add_fec0(void); 9int __init tx28_add_fec0(void);
10int __init tx28_add_fec1(void);
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 29ffa750fbe6..00023b5cf12b 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -171,13 +171,13 @@ void __init netx_init_irq(void)
171 vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); 171 vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0);
172 172
173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { 173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
174 set_irq_chip(irq, &netx_hif_chip); 174 irq_set_chip_and_handler(irq, &netx_hif_chip,
175 set_irq_handler(irq, handle_level_irq); 175 handle_level_irq);
176 set_irq_flags(irq, IRQF_VALID); 176 set_irq_flags(irq, IRQF_VALID);
177 } 177 }
178 178
179 writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); 179 writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
180 set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); 180 irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
181} 181}
182 182
183static int __init netx_init(void) 183static int __init netx_init(void)
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 0c0d5248c368..e27687d53504 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -107,8 +107,8 @@ void __init board_a9m9750dev_init_irq(void)
107 __func__); 107 __func__);
108 108
109 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { 109 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
110 set_irq_chip(i, &a9m9750dev_fpga_chip); 110 irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip,
111 set_irq_handler(i, handle_level_irq); 111 handle_level_irq);
112 set_irq_flags(i, IRQF_VALID); 112 set_irq_flags(i, IRQF_VALID);
113 } 113 }
114 114
@@ -118,8 +118,8 @@ void __init board_a9m9750dev_init_irq(void)
118 REGSET(eic, SYS_EIC, LVEDG, LEVEL); 118 REGSET(eic, SYS_EIC, LVEDG, LEVEL);
119 __raw_writel(eic, SYS_EIC(2)); 119 __raw_writel(eic, SYS_EIC(2));
120 120
121 set_irq_chained_handler(IRQ_NS9XXX_EXT2, 121 irq_set_chained_handler(IRQ_NS9XXX_EXT2,
122 a9m9750dev_fpga_demux_handler); 122 a9m9750dev_fpga_demux_handler);
123} 123}
124 124
125void __init board_a9m9750dev_init_machine(void) 125void __init board_a9m9750dev_init_machine(void)
diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h
index f7e9196eb9ab..19ca6de46a45 100644
--- a/arch/arm/mach-ns9xxx/include/mach/board.h
+++ b/arch/arm/mach-ns9xxx/include/mach/board.h
@@ -14,12 +14,10 @@
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15 15
16#define board_is_a9m9750dev() (0 \ 16#define board_is_a9m9750dev() (0 \
17 || machine_is_cc9p9360dev() \
18 || machine_is_cc9p9750dev() \ 17 || machine_is_cc9p9750dev() \
19 ) 18 )
20 19
21#define board_is_a9mvali() (0 \ 20#define board_is_a9mvali() (0 \
22 || machine_is_cc9p9360val() \
23 || machine_is_cc9p9750val() \ 21 || machine_is_cc9p9750val() \
24 ) 22 )
25 23
diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h
index f851a6b7da6c..628e9752589b 100644
--- a/arch/arm/mach-ns9xxx/include/mach/module.h
+++ b/arch/arm/mach-ns9xxx/include/mach/module.h
@@ -18,7 +18,6 @@
18 ) 18 )
19 19
20#define module_is_cc9c() (0 \ 20#define module_is_cc9c() (0 \
21 || machine_is_cc9c() \
22 ) 21 )
23 22
24#define module_is_cc9p9210() (0 \ 23#define module_is_cc9p9210() (0 \
@@ -32,21 +31,17 @@
32 ) 31 )
33 32
34#define module_is_cc9p9360() (0 \ 33#define module_is_cc9p9360() (0 \
35 || machine_is_a9m9360() \
36 || machine_is_cc9p9360dev() \ 34 || machine_is_cc9p9360dev() \
37 || machine_is_cc9p9360js() \ 35 || machine_is_cc9p9360js() \
38 || machine_is_cc9p9360val() \
39 ) 36 )
40 37
41#define module_is_cc9p9750() (0 \ 38#define module_is_cc9p9750() (0 \
42 || machine_is_a9m9750() \ 39 || machine_is_a9m9750() \
43 || machine_is_cc9p9750dev() \
44 || machine_is_cc9p9750js() \ 40 || machine_is_cc9p9750js() \
45 || machine_is_cc9p9750val() \ 41 || machine_is_cc9p9750val() \
46 ) 42 )
47 43
48#define module_is_ccw9c() (0 \ 44#define module_is_ccw9c() (0 \
49 || machine_is_ccw9c() \
50 ) 45 )
51 46
52#define module_is_inc20otter() (0 \ 47#define module_is_inc20otter() (0 \
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 389fa5c669de..37ab0a2b83ad 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -31,17 +31,11 @@ static void ns9xxx_mask_irq(struct irq_data *d)
31 __raw_writel(ic, SYS_IC(prio / 4)); 31 __raw_writel(ic, SYS_IC(prio / 4));
32} 32}
33 33
34static void ns9xxx_ack_irq(struct irq_data *d) 34static void ns9xxx_eoi_irq(struct irq_data *d)
35{ 35{
36 __raw_writel(0, SYS_ISRADDR); 36 __raw_writel(0, SYS_ISRADDR);
37} 37}
38 38
39static void ns9xxx_maskack_irq(struct irq_data *d)
40{
41 ns9xxx_mask_irq(d);
42 ns9xxx_ack_irq(d);
43}
44
45static void ns9xxx_unmask_irq(struct irq_data *d) 39static void ns9xxx_unmask_irq(struct irq_data *d)
46{ 40{
47 /* XXX: better use cpp symbols */ 41 /* XXX: better use cpp symbols */
@@ -52,56 +46,11 @@ static void ns9xxx_unmask_irq(struct irq_data *d)
52} 46}
53 47
54static struct irq_chip ns9xxx_chip = { 48static struct irq_chip ns9xxx_chip = {
55 .irq_ack = ns9xxx_ack_irq, 49 .irq_eoi = ns9xxx_eoi_irq,
56 .irq_mask = ns9xxx_mask_irq, 50 .irq_mask = ns9xxx_mask_irq,
57 .irq_mask_ack = ns9xxx_maskack_irq,
58 .irq_unmask = ns9xxx_unmask_irq, 51 .irq_unmask = ns9xxx_unmask_irq,
59}; 52};
60 53
61#if 0
62#define handle_irq handle_level_irq
63#else
64static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
65{
66 struct irqaction *action;
67 irqreturn_t action_ret;
68
69 raw_spin_lock(&desc->lock);
70
71 BUG_ON(desc->status & IRQ_INPROGRESS);
72
73 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
74 kstat_incr_irqs_this_cpu(irq, desc);
75
76 action = desc->action;
77 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
78 goto out_mask;
79
80 desc->status |= IRQ_INPROGRESS;
81 raw_spin_unlock(&desc->lock);
82
83 action_ret = handle_IRQ_event(irq, action);
84
85 /* XXX: There is no direct way to access noirqdebug, so check
86 * unconditionally for spurious irqs...
87 * Maybe this function should go to kernel/irq/chip.c? */
88 note_interrupt(irq, desc, action_ret);
89
90 raw_spin_lock(&desc->lock);
91 desc->status &= ~IRQ_INPROGRESS;
92
93 if (desc->status & IRQ_DISABLED)
94out_mask:
95 desc->irq_data.chip->irq_mask(&desc->irq_data);
96
97 /* ack unconditionally to unmask lower prio irqs */
98 desc->irq_data.chip->irq_ack(&desc->irq_data);
99
100 raw_spin_unlock(&desc->lock);
101}
102#define handle_irq handle_prio_irq
103#endif
104
105void __init ns9xxx_init_irq(void) 54void __init ns9xxx_init_irq(void)
106{ 55{
107 int i; 56 int i;
@@ -118,8 +67,8 @@ void __init ns9xxx_init_irq(void)
118 __raw_writel(prio2irq(i), SYS_IVA(i)); 67 __raw_writel(prio2irq(i), SYS_IVA(i));
119 68
120 for (i = 0; i <= 31; ++i) { 69 for (i = 0; i <= 31; ++i) {
121 set_irq_chip(i, &ns9xxx_chip); 70 irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq);
122 set_irq_handler(i, handle_irq);
123 set_irq_flags(i, IRQF_VALID); 71 set_irq_flags(i, IRQF_VALID);
72 irq_set_status_flags(i, IRQ_LEVEL);
124 } 73 }
125} 74}
diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c
index 1f8a05a22834..aa279f23e342 100644
--- a/arch/arm/mach-nuc93x/irq.c
+++ b/arch/arm/mach-nuc93x/irq.c
@@ -59,8 +59,8 @@ void __init nuc93x_init_irq(void)
59 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); 59 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
60 60
61 for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) { 61 for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) {
62 set_irq_chip(irqno, &nuc93x_irq_chip); 62 irq_set_chip_and_handler(irqno, &nuc93x_irq_chip,
63 set_irq_handler(irqno, handle_level_irq); 63 handle_level_irq);
64 set_irq_flags(irqno, IRQF_VALID); 64 set_irq_flags(irqno, IRQF_VALID);
65 } 65 }
66} 66}
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index 927d5a181760..c1c5fb6a5b4c 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -79,7 +79,7 @@
79 79
80 80
81/* 81/*
82 * Register useage 82 * Register usage
83 * r8 - temporary 83 * r8 - temporary
84 * r9 - the driver buffer 84 * r9 - the driver buffer
85 * r10 - temporary 85 * r10 - temporary
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 7c5e2112c776..e68dfde1918e 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -276,7 +276,7 @@ static void __init osk_init_cf(void)
276 return; 276 return;
277 } 277 }
278 /* the CF I/O IRQ is really active-low */ 278 /* the CF I/O IRQ is really active-low */
279 set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); 279 irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
280} 280}
281 281
282static void __init osk_init_irq(void) 282static void __init osk_init_irq(void)
@@ -482,7 +482,7 @@ static void __init osk_mistral_init(void)
482 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ 482 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */
483 gpio_request(4, "ts_int"); 483 gpio_request(4, "ts_int");
484 gpio_direction_input(4); 484 gpio_direction_input(4);
485 set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); 485 irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
486 486
487 spi_register_board_info(mistral_boardinfo, 487 spi_register_board_info(mistral_boardinfo,
488 ARRAY_SIZE(mistral_boardinfo)); 488 ARRAY_SIZE(mistral_boardinfo));
@@ -500,7 +500,7 @@ static void __init osk_mistral_init(void)
500 int irq = gpio_to_irq(OMAP_MPUIO(2)); 500 int irq = gpio_to_irq(OMAP_MPUIO(2));
501 501
502 gpio_direction_input(OMAP_MPUIO(2)); 502 gpio_direction_input(OMAP_MPUIO(2));
503 set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 503 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
504#ifdef CONFIG_PM 504#ifdef CONFIG_PM
505 /* share the IRQ in case someone wants to use the 505 /* share the IRQ in case someone wants to use the
506 * button for more than wakeup from system sleep. 506 * button for more than wakeup from system sleep.
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index d7bbbe721a75..45f01d2c3a7a 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -256,12 +256,12 @@ palmz71_powercable(int irq, void *dev_id)
256{ 256{
257 if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) { 257 if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) {
258 printk(KERN_INFO "PM: Power cable connected\n"); 258 printk(KERN_INFO "PM: Power cable connected\n");
259 set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 259 irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
260 IRQ_TYPE_EDGE_FALLING); 260 IRQ_TYPE_EDGE_FALLING);
261 } else { 261 } else {
262 printk(KERN_INFO "PM: Power cable disconnected\n"); 262 printk(KERN_INFO "PM: Power cable disconnected\n");
263 set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 263 irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
264 IRQ_TYPE_EDGE_RISING); 264 IRQ_TYPE_EDGE_RISING);
265 } 265 }
266 return IRQ_HANDLED; 266 return IRQ_HANDLED;
267} 267}
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index d41fe2d0616a..0ad781db4e66 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -399,7 +399,7 @@ static void __init omap_sx1_init(void)
399 sx1_mmc_init(); 399 sx1_mmc_init();
400 400
401 /* turn on USB power */ 401 /* turn on USB power */
402 /* sx1_setusbpower(1); cant do it here because i2c is not ready */ 402 /* sx1_setusbpower(1); can't do it here because i2c is not ready */
403 gpio_request(1, "A_IRDA_OFF"); 403 gpio_request(1, "A_IRDA_OFF");
404 gpio_request(11, "A_SWITCH"); 404 gpio_request(11, "A_SWITCH");
405 gpio_request(15, "A_USB_ON"); 405 gpio_request(15, "A_USB_ON");
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index bdc0ac8dc21f..65d24204937a 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -279,10 +279,10 @@ static void __init voiceblue_init(void)
279 gpio_request(13, "16C554 irq"); 279 gpio_request(13, "16C554 irq");
280 gpio_request(14, "16C554 irq"); 280 gpio_request(14, "16C554 irq");
281 gpio_request(15, "16C554 irq"); 281 gpio_request(15, "16C554 irq");
282 set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING); 282 irq_set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
283 set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); 283 irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
284 set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING); 284 irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
285 set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING); 285 irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
286 286
287 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); 287 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
288 omap_board_config = voiceblue_config; 288 omap_board_config = voiceblue_config;
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index b0f4c231595f..36f26c3fa25e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -281,7 +281,7 @@ static inline void omap_init_audio(void) {}
281 * Claiming GPIOs, and setting their direction and initial values, is the 281 * Claiming GPIOs, and setting their direction and initial values, is the
282 * responsibility of the device drivers. So is responding to probe(). 282 * responsibility of the device drivers. So is responding to probe().
283 * 283 *
284 * Board-specific knowlege like creating devices or pin setup is to be 284 * Board-specific knowledge like creating devices or pin setup is to be
285 * kept out of drivers as much as possible. In particular, pin setup 285 * kept out of drivers as much as possible. In particular, pin setup
286 * may be handled by the boot loader, and drivers should expect it will 286 * may be handled by the boot loader, and drivers should expect it will
287 * normally have been done by the time they're probed. 287 * normally have been done by the time they're probed.
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 0ace7998aaa5..cddbf8b089ce 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -156,17 +156,17 @@ void omap1510_fpga_init_irq(void)
156 * The touchscreen interrupt is level-sensitive, so 156 * The touchscreen interrupt is level-sensitive, so
157 * we'll use the regular mask_ack routine for it. 157 * we'll use the regular mask_ack routine for it.
158 */ 158 */
159 set_irq_chip(i, &omap_fpga_irq_ack); 159 irq_set_chip(i, &omap_fpga_irq_ack);
160 } 160 }
161 else { 161 else {
162 /* 162 /*
163 * All FPGA interrupts except the touchscreen are 163 * All FPGA interrupts except the touchscreen are
164 * edge-sensitive, so we won't mask them. 164 * edge-sensitive, so we won't mask them.
165 */ 165 */
166 set_irq_chip(i, &omap_fpga_irq); 166 irq_set_chip(i, &omap_fpga_irq);
167 } 167 }
168 168
169 set_irq_handler(i, handle_edge_irq); 169 irq_set_handler(i, handle_edge_irq);
170 set_irq_flags(i, IRQF_VALID); 170 set_irq_flags(i, IRQF_VALID);
171 } 171 }
172 172
@@ -183,6 +183,6 @@ void omap1510_fpga_init_irq(void)
183 return; 183 return;
184 } 184 }
185 gpio_direction_input(13); 185 gpio_direction_input(13);
186 set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); 186 irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
187 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); 187 irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
188} 188}
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
index 7a2df29400ca..23eed0035ed8 100644
--- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
+++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
@@ -31,7 +31,7 @@
31#endif 31#endif
32 32
33/* 33/*
34 * These are the offsets from the begining of the fiq_buffer. They are put here 34 * These are the offsets from the beginning of the fiq_buffer. They are put here
35 * since the buffer and header need to be accessed by drivers servicing devices 35 * since the buffer and header need to be accessed by drivers servicing devices
36 * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. 36 * which generate GPIO interrupts - e.g. keyboard, modem, hook switch.
37 */ 37 */
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 731dd33bff51..5d3da7a63af3 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -230,8 +230,8 @@ void __init omap_init_irq(void)
230 irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); 230 irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j);
231 omap_irq_set_cfg(j, 0, 0, irq_trigger); 231 omap_irq_set_cfg(j, 0, 0, irq_trigger);
232 232
233 set_irq_chip(j, &omap_irq_chip); 233 irq_set_chip_and_handler(j, &omap_irq_chip,
234 set_irq_handler(j, handle_level_irq); 234 handle_level_irq);
235 set_irq_flags(j, IRQF_VALID); 235 set_irq_flags(j, IRQF_VALID);
236 } 236 }
237 } 237 }
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index eeab35dea07e..b997a35830fc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -44,6 +44,7 @@ config ARCH_OMAP4
44 depends on ARCH_OMAP2PLUS 44 depends on ARCH_OMAP2PLUS
45 select CPU_V7 45 select CPU_V7
46 select ARM_GIC 46 select ARM_GIC
47 select LOCAL_TIMERS if SMP
47 select PL310_ERRATA_588369 48 select PL310_ERRATA_588369
48 select PL310_ERRATA_727915 49 select PL310_ERRATA_727915
49 select ARM_ERRATA_720789 50 select ARM_ERRATA_720789
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index c06eb423c4e4..9afd087cc29c 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -307,9 +307,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
307 .default_device = &sdp3430_lcd_device, 307 .default_device = &sdp3430_lcd_device,
308}; 308};
309 309
310static struct regulator_consumer_supply sdp3430_vdda_dac_supply =
311 REGULATOR_SUPPLY("vdda_dac", "omapdss");
312
313static struct omap_board_config_kernel sdp3430_config[] __initdata = { 310static struct omap_board_config_kernel sdp3430_config[] __initdata = {
314}; 311};
315 312
@@ -398,12 +395,13 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
398}; 395};
399 396
400static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { 397static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
401 REGULATOR_SUPPLY("vdda_dac", "omapdss"), 398 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
402}; 399};
403 400
404/* VPLL2 for digital video outputs */ 401/* VPLL2 for digital video outputs */
405static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { 402static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
406 REGULATOR_SUPPLY("vdds_dsi", "omapdss"), 403 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
404 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
407}; 405};
408 406
409static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { 407static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 333ceb2c8fb0..56702c5e577f 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -36,6 +36,7 @@
36#include <plat/usb.h> 36#include <plat/usb.h>
37#include <plat/mmc.h> 37#include <plat/mmc.h>
38#include <plat/omap4-keypad.h> 38#include <plat/omap4-keypad.h>
39#include <plat/display.h>
39 40
40#include "mux.h" 41#include "mux.h"
41#include "hsmmc.h" 42#include "hsmmc.h"
@@ -47,6 +48,8 @@
47#define ETH_KS8851_QUART 138 48#define ETH_KS8851_QUART 138
48#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 49#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
49#define OMAP4_SFH7741_ENABLE_GPIO 188 50#define OMAP4_SFH7741_ENABLE_GPIO 188
51#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
52#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
50 53
51static const int sdp4430_keymap[] = { 54static const int sdp4430_keymap[] = {
52 KEY(0, 0, KEY_E), 55 KEY(0, 0, KEY_E),
@@ -547,6 +550,12 @@ static struct regulator_init_data sdp4430_vusb = {
547 }, 550 },
548}; 551};
549 552
553static struct regulator_init_data sdp4430_clk32kg = {
554 .constraints = {
555 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
556 },
557};
558
550static struct twl4030_platform_data sdp4430_twldata = { 559static struct twl4030_platform_data sdp4430_twldata = {
551 .irq_base = TWL6030_IRQ_BASE, 560 .irq_base = TWL6030_IRQ_BASE,
552 .irq_end = TWL6030_IRQ_END, 561 .irq_end = TWL6030_IRQ_END,
@@ -562,6 +571,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
562 .vaux1 = &sdp4430_vaux1, 571 .vaux1 = &sdp4430_vaux1,
563 .vaux2 = &sdp4430_vaux2, 572 .vaux2 = &sdp4430_vaux2,
564 .vaux3 = &sdp4430_vaux3, 573 .vaux3 = &sdp4430_vaux3,
574 .clk32kg = &sdp4430_clk32kg,
565 .usb = &omap4_usbphy_data 575 .usb = &omap4_usbphy_data
566}; 576};
567 577
@@ -621,6 +631,76 @@ static void __init omap_sfh7741prox_init(void)
621 } 631 }
622} 632}
623 633
634static void sdp4430_hdmi_mux_init(void)
635{
636 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
637 omap_mux_init_signal("hdmi_hpd",
638 OMAP_PIN_INPUT_PULLUP);
639 omap_mux_init_signal("hdmi_cec",
640 OMAP_PIN_INPUT_PULLUP);
641 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
642 omap_mux_init_signal("hdmi_ddc_scl",
643 OMAP_PIN_INPUT_PULLUP);
644 omap_mux_init_signal("hdmi_ddc_sda",
645 OMAP_PIN_INPUT_PULLUP);
646}
647
648static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
649{
650 int status;
651
652 status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH,
653 "hdmi_gpio_hpd");
654 if (status) {
655 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD);
656 return status;
657 }
658 status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,
659 "hdmi_gpio_ls_oe");
660 if (status) {
661 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE);
662 goto error1;
663 }
664
665 return 0;
666
667error1:
668 gpio_free(HDMI_GPIO_HPD);
669
670 return status;
671}
672
673static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
674{
675 gpio_free(HDMI_GPIO_LS_OE);
676 gpio_free(HDMI_GPIO_HPD);
677}
678
679static struct omap_dss_device sdp4430_hdmi_device = {
680 .name = "hdmi",
681 .driver_name = "hdmi_panel",
682 .type = OMAP_DISPLAY_TYPE_HDMI,
683 .platform_enable = sdp4430_panel_enable_hdmi,
684 .platform_disable = sdp4430_panel_disable_hdmi,
685 .channel = OMAP_DSS_CHANNEL_DIGIT,
686};
687
688static struct omap_dss_device *sdp4430_dss_devices[] = {
689 &sdp4430_hdmi_device,
690};
691
692static struct omap_dss_board_info sdp4430_dss_data = {
693 .num_devices = ARRAY_SIZE(sdp4430_dss_devices),
694 .devices = sdp4430_dss_devices,
695 .default_device = &sdp4430_hdmi_device,
696};
697
698void omap_4430sdp_display_init(void)
699{
700 sdp4430_hdmi_mux_init();
701 omap_display_init(&sdp4430_dss_data);
702}
703
624#ifdef CONFIG_OMAP_MUX 704#ifdef CONFIG_OMAP_MUX
625static struct omap_board_mux board_mux[] __initdata = { 705static struct omap_board_mux board_mux[] __initdata = {
626 OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 706 OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
@@ -729,6 +809,8 @@ static void __init omap_4430sdp_init(void)
729 status = omap4_keyboard_init(&sdp4430_keypad_data); 809 status = omap4_keyboard_init(&sdp4430_keypad_data);
730 if (status) 810 if (status)
731 pr_err("Keypad initialization failed: %d\n", status); 811 pr_err("Keypad initialization failed: %d\n", status);
812
813 omap_4430sdp_display_init();
732} 814}
733 815
734static void __init omap_4430sdp_map_io(void) 816static void __init omap_4430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 7b5647954c13..02a12b41c0ff 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -488,7 +488,7 @@ static struct regulator_consumer_supply cm_t35_vsim_supply = {
488}; 488};
489 489
490static struct regulator_consumer_supply cm_t35_vdac_supply = 490static struct regulator_consumer_supply cm_t35_vdac_supply =
491 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 491 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
492 492
493static struct regulator_consumer_supply cm_t35_vdvi_supply = 493static struct regulator_consumer_supply cm_t35_vdvi_supply =
494 REGULATOR_SUPPLY("vdvi", "omapdss"); 494 REGULATOR_SUPPLY("vdvi", "omapdss");
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index aa27483c493e..65f9fde2c567 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -196,7 +196,7 @@ static struct omap_dss_board_info devkit8000_dss_data = {
196}; 196};
197 197
198static struct regulator_consumer_supply devkit8000_vdda_dac_supply = 198static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
199 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 199 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
200 200
201static uint32_t board_keymap[] = { 201static uint32_t board_keymap[] = {
202 KEY(0, 0, KEY_1), 202 KEY(0, 0, KEY_1),
@@ -277,8 +277,10 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
277 .setup = devkit8000_twl_gpio_setup, 277 .setup = devkit8000_twl_gpio_setup,
278}; 278};
279 279
280static struct regulator_consumer_supply devkit8000_vpll1_supply = 280static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
281 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 281 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
282 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
283};
282 284
283/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 285/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
284static struct regulator_init_data devkit8000_vmmc1 = { 286static struct regulator_init_data devkit8000_vmmc1 = {
@@ -319,8 +321,8 @@ static struct regulator_init_data devkit8000_vpll1 = {
319 .valid_ops_mask = REGULATOR_CHANGE_MODE 321 .valid_ops_mask = REGULATOR_CHANGE_MODE
320 | REGULATOR_CHANGE_STATUS, 322 | REGULATOR_CHANGE_STATUS,
321 }, 323 },
322 .num_consumer_supplies = 1, 324 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
323 .consumer_supplies = &devkit8000_vpll1_supply, 325 .consumer_supplies = devkit8000_vpll1_supplies,
324}; 326};
325 327
326/* VAUX4 for ads7846 and nubs */ 328/* VAUX4 for ads7846 and nubs */
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index d3199b4ecdb6..34cf982b9679 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -485,8 +485,10 @@ static struct omap_dss_board_info igep2_dss_data = {
485 .default_device = &igep2_dvi_device, 485 .default_device = &igep2_dvi_device,
486}; 486};
487 487
488static struct regulator_consumer_supply igep2_vpll2_supply = 488static struct regulator_consumer_supply igep2_vpll2_supplies[] = {
489 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 489 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
490 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
491};
490 492
491static struct regulator_init_data igep2_vpll2 = { 493static struct regulator_init_data igep2_vpll2 = {
492 .constraints = { 494 .constraints = {
@@ -499,8 +501,8 @@ static struct regulator_init_data igep2_vpll2 = {
499 .valid_ops_mask = REGULATOR_CHANGE_MODE 501 .valid_ops_mask = REGULATOR_CHANGE_MODE
500 | REGULATOR_CHANGE_STATUS, 502 | REGULATOR_CHANGE_STATUS,
501 }, 503 },
502 .num_consumer_supplies = 1, 504 .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies),
503 .consumer_supplies = &igep2_vpll2_supply, 505 .consumer_supplies = igep2_vpll2_supplies,
504}; 506};
505 507
506static void __init igep2_display_init(void) 508static void __init igep2_display_init(void)
@@ -694,7 +696,7 @@ static void __init igep2_init(void)
694 igep2_init_smsc911x(); 696 igep2_init_smsc911x();
695 697
696 /* 698 /*
697 * WLAN-BT combo module from MuRata wich has a Marvell WLAN 699 * WLAN-BT combo module from MuRata which has a Marvell WLAN
698 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. 700 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
699 */ 701 */
700 igep2_wlan_bt_init(); 702 igep2_wlan_bt_init();
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c
index b10db0e6ee62..2cf86c3cb1a3 100644
--- a/arch/arm/mach-omap2/board-igep0030.c
+++ b/arch/arm/mach-omap2/board-igep0030.c
@@ -440,7 +440,7 @@ static void __init igep3_init(void)
440 igep3_leds_init(); 440 igep3_leds_init();
441 441
442 /* 442 /*
443 * WLAN-BT combo module from MuRata wich has a Marvell WLAN 443 * WLAN-BT combo module from MuRata which has a Marvell WLAN
444 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. 444 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
445 */ 445 */
446 igep3_wifi_bt_init(); 446 igep3_wifi_bt_init();
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 7640c054f43b..33007fd4a083 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -232,10 +232,12 @@ static struct omap_dss_board_info beagle_dss_data = {
232}; 232};
233 233
234static struct regulator_consumer_supply beagle_vdac_supply = 234static struct regulator_consumer_supply beagle_vdac_supply =
235 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 235 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
236 236
237static struct regulator_consumer_supply beagle_vdvi_supply = 237static struct regulator_consumer_supply beagle_vdvi_supplies[] = {
238 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 238 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
239 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
240};
239 241
240static void __init beagle_display_init(void) 242static void __init beagle_display_init(void)
241{ 243{
@@ -422,8 +424,8 @@ static struct regulator_init_data beagle_vpll2 = {
422 .valid_ops_mask = REGULATOR_CHANGE_MODE 424 .valid_ops_mask = REGULATOR_CHANGE_MODE
423 | REGULATOR_CHANGE_STATUS, 425 | REGULATOR_CHANGE_STATUS,
424 }, 426 },
425 .num_consumer_supplies = 1, 427 .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies),
426 .consumer_supplies = &beagle_vdvi_supply, 428 .consumer_supplies = beagle_vdvi_supplies,
427}; 429};
428 430
429static struct twl4030_usb_data beagle_usb_data = { 431static struct twl4030_usb_data beagle_usb_data = {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 0fa2c7b208b1..5a1a916e5cc8 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -542,7 +542,7 @@ static struct twl4030_codec_data omap3evm_codec_data = {
542}; 542};
543 543
544static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = 544static struct regulator_consumer_supply omap3_evm_vdda_dac_supply =
545 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 545 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
546 546
547/* VDAC for DSS driving S-Video */ 547/* VDAC for DSS driving S-Video */
548static struct regulator_init_data omap3_evm_vdac = { 548static struct regulator_init_data omap3_evm_vdac = {
@@ -560,8 +560,10 @@ static struct regulator_init_data omap3_evm_vdac = {
560}; 560};
561 561
562/* VPLL2 for digital video outputs */ 562/* VPLL2 for digital video outputs */
563static struct regulator_consumer_supply omap3_evm_vpll2_supply = 563static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = {
564 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 564 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
565 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
566};
565 567
566static struct regulator_init_data omap3_evm_vpll2 = { 568static struct regulator_init_data omap3_evm_vpll2 = {
567 .constraints = { 569 .constraints = {
@@ -573,8 +575,8 @@ static struct regulator_init_data omap3_evm_vpll2 = {
573 .valid_ops_mask = REGULATOR_CHANGE_MODE 575 .valid_ops_mask = REGULATOR_CHANGE_MODE
574 | REGULATOR_CHANGE_STATUS, 576 | REGULATOR_CHANGE_STATUS,
575 }, 577 },
576 .num_consumer_supplies = 1, 578 .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies),
577 .consumer_supplies = &omap3_evm_vpll2_supply, 579 .consumer_supplies = omap3_evm_vpll2_supplies,
578}; 580};
579 581
580/* ads7846 on SPI */ 582/* ads7846 on SPI */
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 2e5dc21e3477..07dba888f450 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -342,11 +342,12 @@ static struct regulator_consumer_supply pandora_vmmc3_supply =
342 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); 342 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2");
343 343
344static struct regulator_consumer_supply pandora_vdda_dac_supply = 344static struct regulator_consumer_supply pandora_vdda_dac_supply =
345 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 345 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
346 346
347static struct regulator_consumer_supply pandora_vdds_supplies[] = { 347static struct regulator_consumer_supply pandora_vdds_supplies[] = {
348 REGULATOR_SUPPLY("vdds_sdi", "omapdss"), 348 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
349 REGULATOR_SUPPLY("vdds_dsi", "omapdss"), 349 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
350 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
350}; 351};
351 352
352static struct regulator_consumer_supply pandora_vcc_lcd_supply = 353static struct regulator_consumer_supply pandora_vcc_lcd_supply =
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 8ebdbc38b9de..a6e0b9161c99 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -439,7 +439,7 @@ static struct twl4030_codec_data omap3stalker_codec_data = {
439}; 439};
440 440
441static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = 441static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply =
442 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 442 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
443 443
444/* VDAC for DSS driving S-Video */ 444/* VDAC for DSS driving S-Video */
445static struct regulator_init_data omap3_stalker_vdac = { 445static struct regulator_init_data omap3_stalker_vdac = {
@@ -457,8 +457,10 @@ static struct regulator_init_data omap3_stalker_vdac = {
457}; 457};
458 458
459/* VPLL2 for digital video outputs */ 459/* VPLL2 for digital video outputs */
460static struct regulator_consumer_supply omap3_stalker_vpll2_supply = 460static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = {
461 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 461 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
462 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
463};
462 464
463static struct regulator_init_data omap3_stalker_vpll2 = { 465static struct regulator_init_data omap3_stalker_vpll2 = {
464 .constraints = { 466 .constraints = {
@@ -471,8 +473,8 @@ static struct regulator_init_data omap3_stalker_vpll2 = {
471 .valid_ops_mask = REGULATOR_CHANGE_MODE 473 .valid_ops_mask = REGULATOR_CHANGE_MODE
472 | REGULATOR_CHANGE_STATUS, 474 | REGULATOR_CHANGE_STATUS,
473 }, 475 },
474 .num_consumer_supplies = 1, 476 .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies),
475 .consumer_supplies = &omap3_stalker_vpll2_supply, 477 .consumer_supplies = omap3_stalker_vpll2_supplies,
476}; 478};
477 479
478static struct twl4030_platform_data omap3stalker_twldata = { 480static struct twl4030_platform_data omap3stalker_twldata = {
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 0f4d8a762a70..f3a7b1011914 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -34,11 +34,13 @@
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 36#include <asm/mach/map.h>
37#include <plat/display.h>
37 38
38#include <plat/board.h> 39#include <plat/board.h>
39#include <plat/common.h> 40#include <plat/common.h>
40#include <plat/usb.h> 41#include <plat/usb.h>
41#include <plat/mmc.h> 42#include <plat/mmc.h>
43#include <plat/panel-generic-dpi.h>
42#include "timer-gp.h" 44#include "timer-gp.h"
43 45
44#include "hsmmc.h" 46#include "hsmmc.h"
@@ -49,6 +51,8 @@
49#define GPIO_HUB_NRESET 62 51#define GPIO_HUB_NRESET 62
50#define GPIO_WIFI_PMENA 43 52#define GPIO_WIFI_PMENA 43
51#define GPIO_WIFI_IRQ 53 53#define GPIO_WIFI_IRQ 53
54#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
55#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
52 56
53/* wl127x BT, FM, GPS connectivity chip */ 57/* wl127x BT, FM, GPS connectivity chip */
54static int wl1271_gpios[] = {46, -1, -1}; 58static int wl1271_gpios[] = {46, -1, -1};
@@ -281,19 +285,6 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
281 return 0; 285 return 0;
282} 286}
283 287
284static struct regulator_init_data omap4_panda_vaux1 = {
285 .constraints = {
286 .min_uV = 1000000,
287 .max_uV = 3000000,
288 .apply_uV = true,
289 .valid_modes_mask = REGULATOR_MODE_NORMAL
290 | REGULATOR_MODE_STANDBY,
291 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
292 | REGULATOR_CHANGE_MODE
293 | REGULATOR_CHANGE_STATUS,
294 },
295};
296
297static struct regulator_init_data omap4_panda_vaux2 = { 288static struct regulator_init_data omap4_panda_vaux2 = {
298 .constraints = { 289 .constraints = {
299 .min_uV = 1200000, 290 .min_uV = 1200000,
@@ -349,19 +340,6 @@ static struct regulator_init_data omap4_panda_vpp = {
349 }, 340 },
350}; 341};
351 342
352static struct regulator_init_data omap4_panda_vusim = {
353 .constraints = {
354 .min_uV = 1200000,
355 .max_uV = 2900000,
356 .apply_uV = true,
357 .valid_modes_mask = REGULATOR_MODE_NORMAL
358 | REGULATOR_MODE_STANDBY,
359 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
360 | REGULATOR_CHANGE_MODE
361 | REGULATOR_CHANGE_STATUS,
362 },
363};
364
365static struct regulator_init_data omap4_panda_vana = { 343static struct regulator_init_data omap4_panda_vana = {
366 .constraints = { 344 .constraints = {
367 .min_uV = 2100000, 345 .min_uV = 2100000,
@@ -407,6 +385,12 @@ static struct regulator_init_data omap4_panda_vusb = {
407 }, 385 },
408}; 386};
409 387
388static struct regulator_init_data omap4_panda_clk32kg = {
389 .constraints = {
390 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
391 },
392};
393
410static struct twl4030_platform_data omap4_panda_twldata = { 394static struct twl4030_platform_data omap4_panda_twldata = {
411 .irq_base = TWL6030_IRQ_BASE, 395 .irq_base = TWL6030_IRQ_BASE,
412 .irq_end = TWL6030_IRQ_END, 396 .irq_end = TWL6030_IRQ_END,
@@ -414,14 +398,13 @@ static struct twl4030_platform_data omap4_panda_twldata = {
414 /* Regulators */ 398 /* Regulators */
415 .vmmc = &omap4_panda_vmmc, 399 .vmmc = &omap4_panda_vmmc,
416 .vpp = &omap4_panda_vpp, 400 .vpp = &omap4_panda_vpp,
417 .vusim = &omap4_panda_vusim,
418 .vana = &omap4_panda_vana, 401 .vana = &omap4_panda_vana,
419 .vcxio = &omap4_panda_vcxio, 402 .vcxio = &omap4_panda_vcxio,
420 .vdac = &omap4_panda_vdac, 403 .vdac = &omap4_panda_vdac,
421 .vusb = &omap4_panda_vusb, 404 .vusb = &omap4_panda_vusb,
422 .vaux1 = &omap4_panda_vaux1,
423 .vaux2 = &omap4_panda_vaux2, 405 .vaux2 = &omap4_panda_vaux2,
424 .vaux3 = &omap4_panda_vaux3, 406 .vaux3 = &omap4_panda_vaux3,
407 .clk32kg = &omap4_panda_clk32kg,
425 .usb = &omap4_usbphy_data, 408 .usb = &omap4_usbphy_data,
426}; 409};
427 410
@@ -433,6 +416,17 @@ static struct i2c_board_info __initdata omap4_panda_i2c_boardinfo[] = {
433 .platform_data = &omap4_panda_twldata, 416 .platform_data = &omap4_panda_twldata,
434 }, 417 },
435}; 418};
419
420/*
421 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
422 * is connected as I2C slave device, and can be accessed at address 0x50
423 */
424static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
425 {
426 I2C_BOARD_INFO("eeprom", 0x50),
427 },
428};
429
436static int __init omap4_panda_i2c_init(void) 430static int __init omap4_panda_i2c_init(void)
437{ 431{
438 /* 432 /*
@@ -442,7 +436,12 @@ static int __init omap4_panda_i2c_init(void)
442 omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo, 436 omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo,
443 ARRAY_SIZE(omap4_panda_i2c_boardinfo)); 437 ARRAY_SIZE(omap4_panda_i2c_boardinfo));
444 omap_register_i2c_bus(2, 400, NULL, 0); 438 omap_register_i2c_bus(2, 400, NULL, 0);
445 omap_register_i2c_bus(3, 400, NULL, 0); 439 /*
440 * Bus 3 is attached to the DVI port where devices like the pico DLP
441 * projector don't work reliably with 400kHz
442 */
443 omap_register_i2c_bus(3, 100, panda_i2c_eeprom,
444 ARRAY_SIZE(panda_i2c_eeprom));
446 omap_register_i2c_bus(4, 400, NULL, 0); 445 omap_register_i2c_bus(4, 400, NULL, 0);
447 return 0; 446 return 0;
448} 447}
@@ -462,6 +461,64 @@ static struct omap_board_mux board_mux[] __initdata = {
462 OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), 461 OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
463 OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), 462 OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
464 OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), 463 OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
464 /* gpio 0 - TFP410 PD */
465 OMAP4_MUX(KPD_COL1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
466 /* dispc2_data23 */
467 OMAP4_MUX(USBB2_ULPITLL_STP, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
468 /* dispc2_data22 */
469 OMAP4_MUX(USBB2_ULPITLL_DIR, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
470 /* dispc2_data21 */
471 OMAP4_MUX(USBB2_ULPITLL_NXT, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
472 /* dispc2_data20 */
473 OMAP4_MUX(USBB2_ULPITLL_DAT0, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
474 /* dispc2_data19 */
475 OMAP4_MUX(USBB2_ULPITLL_DAT1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
476 /* dispc2_data18 */
477 OMAP4_MUX(USBB2_ULPITLL_DAT2, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
478 /* dispc2_data15 */
479 OMAP4_MUX(USBB2_ULPITLL_DAT3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
480 /* dispc2_data14 */
481 OMAP4_MUX(USBB2_ULPITLL_DAT4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
482 /* dispc2_data13 */
483 OMAP4_MUX(USBB2_ULPITLL_DAT5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
484 /* dispc2_data12 */
485 OMAP4_MUX(USBB2_ULPITLL_DAT6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
486 /* dispc2_data11 */
487 OMAP4_MUX(USBB2_ULPITLL_DAT7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
488 /* dispc2_data10 */
489 OMAP4_MUX(DPM_EMU3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
490 /* dispc2_data9 */
491 OMAP4_MUX(DPM_EMU4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
492 /* dispc2_data16 */
493 OMAP4_MUX(DPM_EMU5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
494 /* dispc2_data17 */
495 OMAP4_MUX(DPM_EMU6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
496 /* dispc2_hsync */
497 OMAP4_MUX(DPM_EMU7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
498 /* dispc2_pclk */
499 OMAP4_MUX(DPM_EMU8, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
500 /* dispc2_vsync */
501 OMAP4_MUX(DPM_EMU9, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
502 /* dispc2_de */
503 OMAP4_MUX(DPM_EMU10, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
504 /* dispc2_data8 */
505 OMAP4_MUX(DPM_EMU11, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
506 /* dispc2_data7 */
507 OMAP4_MUX(DPM_EMU12, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
508 /* dispc2_data6 */
509 OMAP4_MUX(DPM_EMU13, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
510 /* dispc2_data5 */
511 OMAP4_MUX(DPM_EMU14, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
512 /* dispc2_data4 */
513 OMAP4_MUX(DPM_EMU15, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
514 /* dispc2_data3 */
515 OMAP4_MUX(DPM_EMU16, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
516 /* dispc2_data2 */
517 OMAP4_MUX(DPM_EMU17, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
518 /* dispc2_data1 */
519 OMAP4_MUX(DPM_EMU18, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
520 /* dispc2_data0 */
521 OMAP4_MUX(DPM_EMU19, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
465 { .reg_offset = OMAP_MUX_TERMINATOR }, 522 { .reg_offset = OMAP_MUX_TERMINATOR },
466}; 523};
467 524
@@ -535,6 +592,128 @@ static inline void board_serial_init(void)
535} 592}
536#endif 593#endif
537 594
595/* Display DVI */
596#define PANDA_DVI_TFP410_POWER_DOWN_GPIO 0
597
598static int omap4_panda_enable_dvi(struct omap_dss_device *dssdev)
599{
600 gpio_set_value(dssdev->reset_gpio, 1);
601 return 0;
602}
603
604static void omap4_panda_disable_dvi(struct omap_dss_device *dssdev)
605{
606 gpio_set_value(dssdev->reset_gpio, 0);
607}
608
609/* Using generic display panel */
610static struct panel_generic_dpi_data omap4_dvi_panel = {
611 .name = "generic",
612 .platform_enable = omap4_panda_enable_dvi,
613 .platform_disable = omap4_panda_disable_dvi,
614};
615
616struct omap_dss_device omap4_panda_dvi_device = {
617 .type = OMAP_DISPLAY_TYPE_DPI,
618 .name = "dvi",
619 .driver_name = "generic_dpi_panel",
620 .data = &omap4_dvi_panel,
621 .phy.dpi.data_lines = 24,
622 .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO,
623 .channel = OMAP_DSS_CHANNEL_LCD2,
624};
625
626int __init omap4_panda_dvi_init(void)
627{
628 int r;
629
630 /* Requesting TFP410 DVI GPIO and disabling it, at bootup */
631 r = gpio_request_one(omap4_panda_dvi_device.reset_gpio,
632 GPIOF_OUT_INIT_LOW, "DVI PD");
633 if (r)
634 pr_err("Failed to get DVI powerdown GPIO\n");
635
636 return r;
637}
638
639
640static void omap4_panda_hdmi_mux_init(void)
641{
642 /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
643 omap_mux_init_signal("hdmi_hpd",
644 OMAP_PIN_INPUT_PULLUP);
645 omap_mux_init_signal("hdmi_cec",
646 OMAP_PIN_INPUT_PULLUP);
647 /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */
648 omap_mux_init_signal("hdmi_ddc_scl",
649 OMAP_PIN_INPUT_PULLUP);
650 omap_mux_init_signal("hdmi_ddc_sda",
651 OMAP_PIN_INPUT_PULLUP);
652}
653
654static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
655{
656 int status;
657
658 status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH,
659 "hdmi_gpio_hpd");
660 if (status) {
661 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD);
662 return status;
663 }
664 status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,
665 "hdmi_gpio_ls_oe");
666 if (status) {
667 pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE);
668 goto error1;
669 }
670
671 return 0;
672
673error1:
674 gpio_free(HDMI_GPIO_HPD);
675
676 return status;
677}
678
679static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
680{
681 gpio_free(HDMI_GPIO_LS_OE);
682 gpio_free(HDMI_GPIO_HPD);
683}
684
685static struct omap_dss_device omap4_panda_hdmi_device = {
686 .name = "hdmi",
687 .driver_name = "hdmi_panel",
688 .type = OMAP_DISPLAY_TYPE_HDMI,
689 .platform_enable = omap4_panda_panel_enable_hdmi,
690 .platform_disable = omap4_panda_panel_disable_hdmi,
691 .channel = OMAP_DSS_CHANNEL_DIGIT,
692};
693
694static struct omap_dss_device *omap4_panda_dss_devices[] = {
695 &omap4_panda_dvi_device,
696 &omap4_panda_hdmi_device,
697};
698
699static struct omap_dss_board_info omap4_panda_dss_data = {
700 .num_devices = ARRAY_SIZE(omap4_panda_dss_devices),
701 .devices = omap4_panda_dss_devices,
702 .default_device = &omap4_panda_dvi_device,
703};
704
705void omap4_panda_display_init(void)
706{
707 int r;
708
709 r = omap4_panda_dvi_init();
710 if (r)
711 pr_err("error initializing panda DVI\n");
712
713 omap4_panda_hdmi_mux_init();
714 omap_display_init(&omap4_panda_dss_data);
715}
716
538static void __init omap4_panda_init(void) 717static void __init omap4_panda_init(void)
539{ 718{
540 int package = OMAP_PACKAGE_CBS; 719 int package = OMAP_PACKAGE_CBS;
@@ -553,6 +732,7 @@ static void __init omap4_panda_init(void)
553 omap4_twl6030_hsmmc_init(mmc); 732 omap4_twl6030_hsmmc_init(mmc);
554 omap4_ehci_init(); 733 omap4_ehci_init();
555 usb_musb_init(&musb_board_data); 734 usb_musb_init(&musb_board_data);
735 omap4_panda_display_init();
556} 736}
557 737
558static void __init omap4_panda_map_io(void) 738static void __init omap4_panda_map_io(void)
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index d0961945c65a..59ca33326b8c 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -28,6 +28,8 @@
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/i2c/twl.h> 29#include <linux/i2c/twl.h>
30#include <linux/regulator/machine.h> 30#include <linux/regulator/machine.h>
31#include <linux/regulator/fixed.h>
32#include <linux/spi/spi.h>
31 33
32#include <linux/mtd/mtd.h> 34#include <linux/mtd/mtd.h>
33#include <linux/mtd/nand.h> 35#include <linux/mtd/nand.h>
@@ -41,10 +43,14 @@
41 43
42#include <plat/board.h> 44#include <plat/board.h>
43#include <plat/common.h> 45#include <plat/common.h>
46#include <plat/display.h>
47#include <plat/panel-generic-dpi.h>
44#include <mach/gpio.h> 48#include <mach/gpio.h>
45#include <plat/gpmc.h> 49#include <plat/gpmc.h>
46#include <mach/hardware.h> 50#include <mach/hardware.h>
47#include <plat/nand.h> 51#include <plat/nand.h>
52#include <plat/mcspi.h>
53#include <plat/mux.h>
48#include <plat/usb.h> 54#include <plat/usb.h>
49 55
50#include "mux.h" 56#include "mux.h"
@@ -68,8 +74,6 @@
68#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ 74#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
69 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 75 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
70 76
71#include <plat/mcspi.h>
72#include <linux/spi/spi.h>
73#include <linux/spi/ads7846.h> 77#include <linux/spi/ads7846.h>
74 78
75static struct omap2_mcspi_device_config ads7846_mcspi_config = { 79static struct omap2_mcspi_device_config ads7846_mcspi_config = {
@@ -94,16 +98,32 @@ static struct ads7846_platform_data ads7846_config = {
94 .keep_vref_on = 1, 98 .keep_vref_on = 1,
95}; 99};
96 100
97static struct spi_board_info overo_spi_board_info[] __initdata = { 101/* fixed regulator for ads7846 */
98 { 102static struct regulator_consumer_supply ads7846_supply =
99 .modalias = "ads7846", 103 REGULATOR_SUPPLY("vcc", "spi1.0");
100 .bus_num = 1, 104
101 .chip_select = 0, 105static struct regulator_init_data vads7846_regulator = {
102 .max_speed_hz = 1500000, 106 .constraints = {
103 .controller_data = &ads7846_mcspi_config, 107 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
104 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), 108 },
105 .platform_data = &ads7846_config, 109 .num_consumer_supplies = 1,
106 } 110 .consumer_supplies = &ads7846_supply,
111};
112
113static struct fixed_voltage_config vads7846 = {
114 .supply_name = "vads7846",
115 .microvolts = 3300000, /* 3.3V */
116 .gpio = -EINVAL,
117 .startup_delay = 0,
118 .init_data = &vads7846_regulator,
119};
120
121static struct platform_device vads7846_device = {
122 .name = "reg-fixed-voltage",
123 .id = 1,
124 .dev = {
125 .platform_data = &vads7846,
126 },
107}; 127};
108 128
109static void __init overo_ads7846_init(void) 129static void __init overo_ads7846_init(void)
@@ -116,8 +136,7 @@ static void __init overo_ads7846_init(void)
116 return; 136 return;
117 } 137 }
118 138
119 spi_register_board_info(overo_spi_board_info, 139 platform_device_register(&vads7846_device);
120 ARRAY_SIZE(overo_spi_board_info));
121} 140}
122 141
123#else 142#else
@@ -233,6 +252,137 @@ static inline void __init overo_init_smsc911x(void)
233static inline void __init overo_init_smsc911x(void) { return; } 252static inline void __init overo_init_smsc911x(void) { return; }
234#endif 253#endif
235 254
255/* DSS */
256static int lcd_enabled;
257static int dvi_enabled;
258
259#define OVERO_GPIO_LCD_EN 144
260#define OVERO_GPIO_LCD_BL 145
261
262static void __init overo_display_init(void)
263{
264 if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) &&
265 (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0))
266 gpio_export(OVERO_GPIO_LCD_EN, 0);
267 else
268 printk(KERN_ERR "could not obtain gpio for "
269 "OVERO_GPIO_LCD_EN\n");
270
271 if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) &&
272 (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0))
273 gpio_export(OVERO_GPIO_LCD_BL, 0);
274 else
275 printk(KERN_ERR "could not obtain gpio for "
276 "OVERO_GPIO_LCD_BL\n");
277}
278
279static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)
280{
281 if (lcd_enabled) {
282 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
283 return -EINVAL;
284 }
285 dvi_enabled = 1;
286
287 return 0;
288}
289
290static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)
291{
292 dvi_enabled = 0;
293}
294
295static struct panel_generic_dpi_data dvi_panel = {
296 .name = "generic",
297 .platform_enable = overo_panel_enable_dvi,
298 .platform_disable = overo_panel_disable_dvi,
299};
300
301static struct omap_dss_device overo_dvi_device = {
302 .name = "dvi",
303 .type = OMAP_DISPLAY_TYPE_DPI,
304 .driver_name = "generic_dpi_panel",
305 .data = &dvi_panel,
306 .phy.dpi.data_lines = 24,
307};
308
309static struct omap_dss_device overo_tv_device = {
310 .name = "tv",
311 .driver_name = "venc",
312 .type = OMAP_DISPLAY_TYPE_VENC,
313 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
314};
315
316static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
317{
318 if (dvi_enabled) {
319 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
320 return -EINVAL;
321 }
322
323 gpio_set_value(OVERO_GPIO_LCD_EN, 1);
324 gpio_set_value(OVERO_GPIO_LCD_BL, 1);
325 lcd_enabled = 1;
326 return 0;
327}
328
329static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
330{
331 gpio_set_value(OVERO_GPIO_LCD_EN, 0);
332 gpio_set_value(OVERO_GPIO_LCD_BL, 0);
333 lcd_enabled = 0;
334}
335
336static struct panel_generic_dpi_data lcd43_panel = {
337 .name = "samsung_lte430wq_f0c",
338 .platform_enable = overo_panel_enable_lcd,
339 .platform_disable = overo_panel_disable_lcd,
340};
341
342static struct omap_dss_device overo_lcd43_device = {
343 .name = "lcd43",
344 .type = OMAP_DISPLAY_TYPE_DPI,
345 .driver_name = "generic_dpi_panel",
346 .data = &lcd43_panel,
347 .phy.dpi.data_lines = 24,
348};
349
350#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
351 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
352static struct omap_dss_device overo_lcd35_device = {
353 .type = OMAP_DISPLAY_TYPE_DPI,
354 .name = "lcd35",
355 .driver_name = "lgphilips_lb035q02_panel",
356 .phy.dpi.data_lines = 24,
357 .platform_enable = overo_panel_enable_lcd,
358 .platform_disable = overo_panel_disable_lcd,
359};
360#endif
361
362static struct omap_dss_device *overo_dss_devices[] = {
363 &overo_dvi_device,
364 &overo_tv_device,
365#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
366 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
367 &overo_lcd35_device,
368#endif
369 &overo_lcd43_device,
370};
371
372static struct omap_dss_board_info overo_dss_data = {
373 .num_devices = ARRAY_SIZE(overo_dss_devices),
374 .devices = overo_dss_devices,
375 .default_device = &overo_dvi_device,
376};
377
378static struct regulator_consumer_supply overo_vdda_dac_supply =
379 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
380
381static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
382 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
383 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
384};
385
236static struct mtd_partition overo_nand_partitions[] = { 386static struct mtd_partition overo_nand_partitions[] = {
237 { 387 {
238 .name = "xloader", 388 .name = "xloader",
@@ -323,6 +473,93 @@ static struct regulator_consumer_supply overo_vmmc1_supply = {
323 .supply = "vmmc", 473 .supply = "vmmc",
324}; 474};
325 475
476#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
477#include <linux/leds.h>
478
479static struct gpio_led gpio_leds[] = {
480 {
481 .name = "overo:red:gpio21",
482 .default_trigger = "heartbeat",
483 .gpio = 21,
484 .active_low = true,
485 },
486 {
487 .name = "overo:blue:gpio22",
488 .default_trigger = "none",
489 .gpio = 22,
490 .active_low = true,
491 },
492 {
493 .name = "overo:blue:COM",
494 .default_trigger = "mmc0",
495 .gpio = -EINVAL, /* gets replaced */
496 .active_low = true,
497 },
498};
499
500static struct gpio_led_platform_data gpio_leds_pdata = {
501 .leds = gpio_leds,
502 .num_leds = ARRAY_SIZE(gpio_leds),
503};
504
505static struct platform_device gpio_leds_device = {
506 .name = "leds-gpio",
507 .id = -1,
508 .dev = {
509 .platform_data = &gpio_leds_pdata,
510 },
511};
512
513static void __init overo_init_led(void)
514{
515 platform_device_register(&gpio_leds_device);
516}
517
518#else
519static inline void __init overo_init_led(void) { return; }
520#endif
521
522#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
523#include <linux/input.h>
524#include <linux/gpio_keys.h>
525
526static struct gpio_keys_button gpio_buttons[] = {
527 {
528 .code = BTN_0,
529 .gpio = 23,
530 .desc = "button0",
531 .wakeup = 1,
532 },
533 {
534 .code = BTN_1,
535 .gpio = 14,
536 .desc = "button1",
537 .wakeup = 1,
538 },
539};
540
541static struct gpio_keys_platform_data gpio_keys_pdata = {
542 .buttons = gpio_buttons,
543 .nbuttons = ARRAY_SIZE(gpio_buttons),
544};
545
546static struct platform_device gpio_keys_device = {
547 .name = "gpio-keys",
548 .id = -1,
549 .dev = {
550 .platform_data = &gpio_keys_pdata,
551 },
552};
553
554static void __init overo_init_keys(void)
555{
556 platform_device_register(&gpio_keys_device);
557}
558
559#else
560static inline void __init overo_init_keys(void) { return; }
561#endif
562
326static int overo_twl_gpio_setup(struct device *dev, 563static int overo_twl_gpio_setup(struct device *dev,
327 unsigned gpio, unsigned ngpio) 564 unsigned gpio, unsigned ngpio)
328{ 565{
@@ -330,6 +567,11 @@ static int overo_twl_gpio_setup(struct device *dev,
330 567
331 overo_vmmc1_supply.dev = mmc[0].dev; 568 overo_vmmc1_supply.dev = mmc[0].dev;
332 569
570#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
571 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
572 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
573#endif
574
333 return 0; 575 return 0;
334} 576}
335 577
@@ -337,6 +579,7 @@ static struct twl4030_gpio_platform_data overo_gpio_data = {
337 .gpio_base = OMAP_MAX_GPIO_LINES, 579 .gpio_base = OMAP_MAX_GPIO_LINES,
338 .irq_base = TWL4030_GPIO_IRQ_BASE, 580 .irq_base = TWL4030_GPIO_IRQ_BASE,
339 .irq_end = TWL4030_GPIO_IRQ_END, 581 .irq_end = TWL4030_GPIO_IRQ_END,
582 .use_leds = true,
340 .setup = overo_twl_gpio_setup, 583 .setup = overo_twl_gpio_setup,
341}; 584};
342 585
@@ -358,6 +601,35 @@ static struct regulator_init_data overo_vmmc1 = {
358 .consumer_supplies = &overo_vmmc1_supply, 601 .consumer_supplies = &overo_vmmc1_supply,
359}; 602};
360 603
604/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
605static struct regulator_init_data overo_vdac = {
606 .constraints = {
607 .min_uV = 1800000,
608 .max_uV = 1800000,
609 .valid_modes_mask = REGULATOR_MODE_NORMAL
610 | REGULATOR_MODE_STANDBY,
611 .valid_ops_mask = REGULATOR_CHANGE_MODE
612 | REGULATOR_CHANGE_STATUS,
613 },
614 .num_consumer_supplies = 1,
615 .consumer_supplies = &overo_vdda_dac_supply,
616};
617
618/* VPLL2 for digital video outputs */
619static struct regulator_init_data overo_vpll2 = {
620 .constraints = {
621 .name = "VDVI",
622 .min_uV = 1800000,
623 .max_uV = 1800000,
624 .valid_modes_mask = REGULATOR_MODE_NORMAL
625 | REGULATOR_MODE_STANDBY,
626 .valid_ops_mask = REGULATOR_CHANGE_MODE
627 | REGULATOR_CHANGE_STATUS,
628 },
629 .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
630 .consumer_supplies = overo_vdds_dsi_supply,
631};
632
361static struct twl4030_codec_audio_data overo_audio_data; 633static struct twl4030_codec_audio_data overo_audio_data;
362 634
363static struct twl4030_codec_data overo_codec_data = { 635static struct twl4030_codec_data overo_codec_data = {
@@ -365,8 +637,6 @@ static struct twl4030_codec_data overo_codec_data = {
365 .audio = &overo_audio_data, 637 .audio = &overo_audio_data,
366}; 638};
367 639
368/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */
369
370static struct twl4030_platform_data overo_twldata = { 640static struct twl4030_platform_data overo_twldata = {
371 .irq_base = TWL4030_IRQ_BASE, 641 .irq_base = TWL4030_IRQ_BASE,
372 .irq_end = TWL4030_IRQ_END, 642 .irq_end = TWL4030_IRQ_END,
@@ -374,6 +644,8 @@ static struct twl4030_platform_data overo_twldata = {
374 .usb = &overo_usb_data, 644 .usb = &overo_usb_data,
375 .codec = &overo_codec_data, 645 .codec = &overo_codec_data,
376 .vmmc1 = &overo_vmmc1, 646 .vmmc1 = &overo_vmmc1,
647 .vdac = &overo_vdac,
648 .vpll2 = &overo_vpll2,
377}; 649};
378 650
379static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { 651static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
@@ -394,18 +666,38 @@ static int __init overo_i2c_init(void)
394 return 0; 666 return 0;
395} 667}
396 668
397static struct platform_device overo_lcd_device = { 669static struct spi_board_info overo_spi_board_info[] __initdata = {
398 .name = "overo_lcd", 670#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
399 .id = -1, 671 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
400}; 672 {
401 673 .modalias = "ads7846",
402static struct omap_lcd_config overo_lcd_config __initdata = { 674 .bus_num = 1,
403 .ctrl_name = "internal", 675 .chip_select = 0,
676 .max_speed_hz = 1500000,
677 .controller_data = &ads7846_mcspi_config,
678 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
679 .platform_data = &ads7846_config,
680 },
681#endif
682#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
683 defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
684 {
685 .modalias = "lgphilips_lb035q02_panel-spi",
686 .bus_num = 1,
687 .chip_select = 1,
688 .max_speed_hz = 500000,
689 .mode = SPI_MODE_3,
690 },
691#endif
404}; 692};
405 693
406static struct omap_board_config_kernel overo_config[] __initdata = { 694static int __init overo_spi_init(void)
407 { OMAP_TAG_LCD, &overo_lcd_config }, 695{
408}; 696 overo_ads7846_init();
697 spi_register_board_info(overo_spi_board_info,
698 ARRAY_SIZE(overo_spi_board_info));
699 return 0;
700}
409 701
410static void __init overo_init_early(void) 702static void __init overo_init_early(void)
411{ 703{
@@ -414,15 +706,10 @@ static void __init overo_init_early(void)
414 mt46h32m32lf6_sdrc_params); 706 mt46h32m32lf6_sdrc_params);
415} 707}
416 708
417static struct platform_device *overo_devices[] __initdata = {
418 &overo_lcd_device,
419};
420
421static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 709static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
422 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, 710 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
423 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 711 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
424 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 712 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
425
426 .phy_reset = true, 713 .phy_reset = true,
427 .reset_gpio_port[0] = -EINVAL, 714 .reset_gpio_port[0] = -EINVAL,
428 .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET, 715 .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET,
@@ -444,16 +731,18 @@ static struct omap_musb_board_data musb_board_data = {
444static void __init overo_init(void) 731static void __init overo_init(void)
445{ 732{
446 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 733 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
447 omap_board_config = overo_config;
448 omap_board_config_size = ARRAY_SIZE(overo_config);
449 overo_i2c_init(); 734 overo_i2c_init();
450 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); 735 omap_display_init(&overo_dss_data);
451 omap_serial_init(); 736 omap_serial_init();
452 overo_flash_init(); 737 overo_flash_init();
453 usb_musb_init(&musb_board_data); 738 usb_musb_init(&musb_board_data);
454 usbhs_init(&usbhs_bdata); 739 usbhs_init(&usbhs_bdata);
740 overo_spi_init();
455 overo_ads7846_init(); 741 overo_ads7846_init();
456 overo_init_smsc911x(); 742 overo_init_smsc911x();
743 overo_display_init();
744 overo_init_led();
745 overo_init_keys();
457 746
458 /* Ensure SDRC pins are mux'd for self-refresh */ 747 /* Ensure SDRC pins are mux'd for self-refresh */
459 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 748 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 5f1900c532ec..bbcb6775a6a3 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -372,7 +372,7 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
372}; 372};
373 373
374static struct regulator_consumer_supply rx51_vdac_supply[] = { 374static struct regulator_consumer_supply rx51_vdac_supply[] = {
375 REGULATOR_SUPPLY("vdda_dac", "omapdss"), 375 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
376}; 376};
377 377
378static struct regulator_init_data rx51_vaux1 = { 378static struct regulator_init_data rx51_vaux1 = {
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 448ab60195d5..8dee7549fbdf 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -226,11 +226,13 @@ static struct omap2_hsmmc_info mmc[] = {
226 {} /* Terminator */ 226 {} /* Terminator */
227}; 227};
228 228
229static struct regulator_consumer_supply zoom_vpll2_supply = 229static struct regulator_consumer_supply zoom_vpll2_supplies[] = {
230 REGULATOR_SUPPLY("vdds_dsi", "omapdss"); 230 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
231 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
232};
231 233
232static struct regulator_consumer_supply zoom_vdda_dac_supply = 234static struct regulator_consumer_supply zoom_vdda_dac_supply =
233 REGULATOR_SUPPLY("vdda_dac", "omapdss"); 235 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
234 236
235static struct regulator_init_data zoom_vpll2 = { 237static struct regulator_init_data zoom_vpll2 = {
236 .constraints = { 238 .constraints = {
@@ -241,8 +243,8 @@ static struct regulator_init_data zoom_vpll2 = {
241 .valid_ops_mask = REGULATOR_CHANGE_MODE 243 .valid_ops_mask = REGULATOR_CHANGE_MODE
242 | REGULATOR_CHANGE_STATUS, 244 | REGULATOR_CHANGE_STATUS,
243 }, 245 },
244 .num_consumer_supplies = 1, 246 .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies),
245 .consumer_supplies = &zoom_vpll2_supply, 247 .consumer_supplies = zoom_vpll2_supplies,
246}; 248};
247 249
248static struct regulator_init_data zoom_vdac = { 250static struct regulator_init_data zoom_vdac = {
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index b6f65d4ac97d..2926d028b6e9 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1804,10 +1804,10 @@ static struct omap_clk omap2420_clks[] = {
1804 CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_242X), 1804 CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_242X),
1805 CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), 1805 CLK(NULL, "gfx_ick", &gfx_ick, CK_242X),
1806 /* DSS domain clocks */ 1806 /* DSS domain clocks */
1807 CLK("omapdss", "ick", &dss_ick, CK_242X), 1807 CLK("omapdss_dss", "ick", &dss_ick, CK_242X),
1808 CLK("omapdss", "dss1_fck", &dss1_fck, CK_242X), 1808 CLK("omapdss_dss", "fck", &dss1_fck, CK_242X),
1809 CLK("omapdss", "dss2_fck", &dss2_fck, CK_242X), 1809 CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X),
1810 CLK("omapdss", "tv_fck", &dss_54m_fck, CK_242X), 1810 CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X),
1811 /* L3 domain clocks */ 1811 /* L3 domain clocks */
1812 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), 1812 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X),
1813 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), 1813 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index bba018331a71..0c79d39e3021 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1894,10 +1894,10 @@ static struct omap_clk omap2430_clks[] = {
1894 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), 1894 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
1895 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), 1895 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
1896 /* DSS domain clocks */ 1896 /* DSS domain clocks */
1897 CLK("omapdss", "ick", &dss_ick, CK_243X), 1897 CLK("omapdss_dss", "ick", &dss_ick, CK_243X),
1898 CLK("omapdss", "dss1_fck", &dss1_fck, CK_243X), 1898 CLK("omapdss_dss", "fck", &dss1_fck, CK_243X),
1899 CLK("omapdss", "dss2_fck", &dss2_fck, CK_243X), 1899 CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X),
1900 CLK("omapdss", "tv_fck", &dss_54m_fck, CK_243X), 1900 CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X),
1901 /* L3 domain clocks */ 1901 /* L3 domain clocks */
1902 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), 1902 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X),
1903 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), 1903 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index fcb321a64f13..75b119bd9cda 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3356,13 +3356,13 @@ static struct omap_clk omap3xxx_clks[] = {
3356 CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), 3356 CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX),
3357 CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), 3357 CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX),
3358 CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), 3358 CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX),
3359 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), 3359 CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1),
3360 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3360 CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3361 CLK("omapdss", "tv_fck", &dss_tv_fck, CK_3XXX), 3361 CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX),
3362 CLK("omapdss", "video_fck", &dss_96m_fck, CK_3XXX), 3362 CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX),
3363 CLK("omapdss", "dss2_fck", &dss2_alwon_fck, CK_3XXX), 3363 CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX),
3364 CLK("omapdss", "ick", &dss_ick_3430es1, CK_3430ES1), 3364 CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1),
3365 CLK("omapdss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3365 CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3366 CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), 3366 CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX),
3367 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), 3367 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX),
3368 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), 3368 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index d32ed979a8da..276992d3b7fb 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3114,11 +3114,16 @@ static struct omap_clk omap44xx_clks[] = {
3114 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), 3114 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
3115 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), 3115 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
3116 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), 3116 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
3117 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), 3117 CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
3118 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), 3118 CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
3119 CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), 3119 CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X),
3120 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), 3120 CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
3121 CLK(NULL, "dss_fck", &dss_fck, CK_443X), 3121 CLK("omapdss_dss", "fck", &dss_fck, CK_443X),
3122 /*
3123 * On OMAP4, DSS ick is a dummy clock; this is needed for compatibility
3124 * with OMAP2/3.
3125 */
3126 CLK("omapdss_dss", "ick", &dummy_ck, CK_443X),
3122 CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), 3127 CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
3123 CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), 3128 CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
3124 CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), 3129 CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index ab878545bd9b..6cb6c03293df 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -258,7 +258,7 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm,
258 * clkdm_init - set up the clockdomain layer 258 * clkdm_init - set up the clockdomain layer
259 * @clkdms: optional pointer to an array of clockdomains to register 259 * @clkdms: optional pointer to an array of clockdomains to register
260 * @init_autodeps: optional pointer to an array of autodeps to register 260 * @init_autodeps: optional pointer to an array of autodeps to register
261 * @custom_funcs: func pointers for arch specfic implementations 261 * @custom_funcs: func pointers for arch specific implementations
262 * 262 *
263 * Set up internal state. If a pointer to an array of clockdomains 263 * Set up internal state. If a pointer to an array of clockdomains
264 * @clkdms was supplied, loop through the list of clockdomains, 264 * @clkdms was supplied, loop through the list of clockdomains,
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 85b3dce65640..5823584d9cd7 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -125,7 +125,7 @@ struct clockdomain {
125}; 125};
126 126
127/** 127/**
128 * struct clkdm_ops - Arch specfic function implementations 128 * struct clkdm_ops - Arch specific function implementations
129 * @clkdm_add_wkdep: Add a wakeup dependency between clk domains 129 * @clkdm_add_wkdep: Add a wakeup dependency between clk domains
130 * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains 130 * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains
131 * @clkdm_read_wkdep: Read wakeup dependency state between clk domains 131 * @clkdm_read_wkdep: Read wakeup dependency state between clk domains
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index a44c52303405..1c240eff3918 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -297,8 +297,8 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
297 297
298/** 298/**
299 * omap3_cpuidle_update_states() - Update the cpuidle states 299 * omap3_cpuidle_update_states() - Update the cpuidle states
300 * @mpu_deepest_state: Enable states upto and including this for mpu domain 300 * @mpu_deepest_state: Enable states up to and including this for mpu domain
301 * @core_deepest_state: Enable states upto and including this for core domain 301 * @core_deepest_state: Enable states up to and including this for core domain
302 * 302 *
303 * This goes through the list of states available and enables and disables the 303 * This goes through the list of states available and enables and disables the
304 * validity of C states based on deepest state that can be achieved for the 304 * validity of C states based on deepest state that can be achieved for the
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0d2d6a9c303c..7b8558564591 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -35,6 +35,7 @@
35 35
36#include "mux.h" 36#include "mux.h"
37#include "control.h" 37#include "control.h"
38#include "devices.h"
38 39
39#define L3_MODULES_MAX_LEN 12 40#define L3_MODULES_MAX_LEN 12
40#define L3_MODULES 3 41#define L3_MODULES 3
@@ -65,7 +66,7 @@ static int __init omap3_l3_init(void)
65 66
66 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); 67 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
67 68
68 return PTR_ERR(od); 69 return IS_ERR(od) ? PTR_ERR(od) : 0;
69} 70}
70postcore_initcall(omap3_l3_init); 71postcore_initcall(omap3_l3_init);
71 72
@@ -102,7 +103,7 @@ postcore_initcall(omap4_l3_init);
102 103
103#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) 104#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
104 105
105static struct resource cam_resources[] = { 106static struct resource omap2cam_resources[] = {
106 { 107 {
107 .start = OMAP24XX_CAMERA_BASE, 108 .start = OMAP24XX_CAMERA_BASE,
108 .end = OMAP24XX_CAMERA_BASE + 0xfff, 109 .end = OMAP24XX_CAMERA_BASE + 0xfff,
@@ -114,19 +115,13 @@ static struct resource cam_resources[] = {
114 } 115 }
115}; 116};
116 117
117static struct platform_device omap_cam_device = { 118static struct platform_device omap2cam_device = {
118 .name = "omap24xxcam", 119 .name = "omap24xxcam",
119 .id = -1, 120 .id = -1,
120 .num_resources = ARRAY_SIZE(cam_resources), 121 .num_resources = ARRAY_SIZE(omap2cam_resources),
121 .resource = cam_resources, 122 .resource = omap2cam_resources,
122}; 123};
123 124#endif
124static inline void omap_init_camera(void)
125{
126 platform_device_register(&omap_cam_device);
127}
128
129#elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
130 125
131static struct resource omap3isp_resources[] = { 126static struct resource omap3isp_resources[] = {
132 { 127 {
@@ -135,11 +130,6 @@ static struct resource omap3isp_resources[] = {
135 .flags = IORESOURCE_MEM, 130 .flags = IORESOURCE_MEM,
136 }, 131 },
137 { 132 {
138 .start = OMAP3430_ISP_CBUFF_BASE,
139 .end = OMAP3430_ISP_CBUFF_END,
140 .flags = IORESOURCE_MEM,
141 },
142 {
143 .start = OMAP3430_ISP_CCP2_BASE, 133 .start = OMAP3430_ISP_CCP2_BASE,
144 .end = OMAP3430_ISP_CCP2_END, 134 .end = OMAP3430_ISP_CCP2_END,
145 .flags = IORESOURCE_MEM, 135 .flags = IORESOURCE_MEM,
@@ -175,13 +165,33 @@ static struct resource omap3isp_resources[] = {
175 .flags = IORESOURCE_MEM, 165 .flags = IORESOURCE_MEM,
176 }, 166 },
177 { 167 {
178 .start = OMAP3430_ISP_CSI2A_BASE, 168 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
179 .end = OMAP3430_ISP_CSI2A_END, 169 .end = OMAP3430_ISP_CSI2A_REGS1_END,
180 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
181 }, 171 },
182 { 172 {
183 .start = OMAP3430_ISP_CSI2PHY_BASE, 173 .start = OMAP3430_ISP_CSIPHY2_BASE,
184 .end = OMAP3430_ISP_CSI2PHY_END, 174 .end = OMAP3430_ISP_CSIPHY2_END,
175 .flags = IORESOURCE_MEM,
176 },
177 {
178 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
179 .end = OMAP3630_ISP_CSI2A_REGS2_END,
180 .flags = IORESOURCE_MEM,
181 },
182 {
183 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
184 .end = OMAP3630_ISP_CSI2C_REGS1_END,
185 .flags = IORESOURCE_MEM,
186 },
187 {
188 .start = OMAP3630_ISP_CSIPHY1_BASE,
189 .end = OMAP3630_ISP_CSIPHY1_END,
190 .flags = IORESOURCE_MEM,
191 },
192 {
193 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
194 .end = OMAP3630_ISP_CSI2C_REGS2_END,
185 .flags = IORESOURCE_MEM, 195 .flags = IORESOURCE_MEM,
186 }, 196 },
187 { 197 {
@@ -197,15 +207,19 @@ static struct platform_device omap3isp_device = {
197 .resource = omap3isp_resources, 207 .resource = omap3isp_resources,
198}; 208};
199 209
200static inline void omap_init_camera(void) 210int omap3_init_camera(struct isp_platform_data *pdata)
201{ 211{
202 platform_device_register(&omap3isp_device); 212 omap3isp_device.dev.platform_data = pdata;
213 return platform_device_register(&omap3isp_device);
203} 214}
204#else 215
205static inline void omap_init_camera(void) 216static inline void omap_init_camera(void)
206{ 217{
207} 218#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
219 if (cpu_is_omap24xx())
220 platform_device_register(&omap2cam_device);
208#endif 221#endif
222}
209 223
210struct omap_device_pm_latency omap_keyboard_latency[] = { 224struct omap_device_pm_latency omap_keyboard_latency[] = {
211 { 225 {
@@ -239,7 +253,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
239 ARRAY_SIZE(omap_keyboard_latency), 0); 253 ARRAY_SIZE(omap_keyboard_latency), 0);
240 254
241 if (IS_ERR(od)) { 255 if (IS_ERR(od)) {
242 WARN(1, "Cant build omap_device for %s:%s.\n", 256 WARN(1, "Can't build omap_device for %s:%s.\n",
243 name, oh->name); 257 name, oh->name);
244 return PTR_ERR(od); 258 return PTR_ERR(od);
245 } 259 }
@@ -359,7 +373,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
359 od = omap_device_build(name, spi_num, oh, pdata, 373 od = omap_device_build(name, spi_num, oh, pdata,
360 sizeof(*pdata), omap_mcspi_latency, 374 sizeof(*pdata), omap_mcspi_latency,
361 ARRAY_SIZE(omap_mcspi_latency), 0); 375 ARRAY_SIZE(omap_mcspi_latency), 0);
362 WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", 376 WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
363 name, oh->name); 377 name, oh->name);
364 kfree(pdata); 378 kfree(pdata);
365 return 0; 379 return 0;
@@ -711,7 +725,7 @@ static int __init omap_init_wdt(void)
711 od = omap_device_build(dev_name, id, oh, NULL, 0, 725 od = omap_device_build(dev_name, id, oh, NULL, 0,
712 omap_wdt_latency, 726 omap_wdt_latency,
713 ARRAY_SIZE(omap_wdt_latency), 0); 727 ARRAY_SIZE(omap_wdt_latency), 0);
714 WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", 728 WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
715 dev_name, oh->name); 729 dev_name, oh->name);
716 return 0; 730 return 0;
717} 731}
diff --git a/arch/arm/mach-omap2/devices.h b/arch/arm/mach-omap2/devices.h
new file mode 100644
index 000000000000..f61eb6e5d136
--- /dev/null
+++ b/arch/arm/mach-omap2/devices.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-omap2/devices.h
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __ARCH_ARM_MACH_OMAP_DEVICES_H
13#define __ARCH_ARM_MACH_OMAP_DEVICES_H
14
15struct isp_platform_data;
16
17int omap3_init_camera(struct isp_platform_data *pdata);
18
19#endif
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index b18db84b0349..256d23fb79ab 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -23,6 +23,8 @@
23#include <linux/err.h> 23#include <linux/err.h>
24 24
25#include <plat/display.h> 25#include <plat/display.h>
26#include <plat/omap_hwmod.h>
27#include <plat/omap_device.h>
26 28
27static struct platform_device omap_display_device = { 29static struct platform_device omap_display_device = {
28 .name = "omapdss", 30 .name = "omapdss",
@@ -32,9 +34,87 @@ static struct platform_device omap_display_device = {
32 }, 34 },
33}; 35};
34 36
37static struct omap_device_pm_latency omap_dss_latency[] = {
38 [0] = {
39 .deactivate_func = omap_device_idle_hwmods,
40 .activate_func = omap_device_enable_hwmods,
41 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
42 },
43};
44
45/* oh_core is used for getting opt-clocks */
46static struct omap_hwmod *oh_core;
47
48static bool opt_clock_available(const char *clk_role)
49{
50 int i;
51
52 for (i = 0; i < oh_core->opt_clks_cnt; i++) {
53 if (!strcmp(oh_core->opt_clks[i].role, clk_role))
54 return true;
55 }
56 return false;
57}
58
35int __init omap_display_init(struct omap_dss_board_info *board_data) 59int __init omap_display_init(struct omap_dss_board_info *board_data)
36{ 60{
37 int r = 0; 61 int r = 0;
62 struct omap_hwmod *oh;
63 struct omap_device *od;
64 int i;
65 struct omap_display_platform_data pdata;
66
67 /*
68 * omap: valid DSS hwmod names
69 * omap2,3,4: dss_core, dss_dispc, dss_rfbi, dss_venc
70 * omap3,4: dss_dsi1
71 * omap4: dss_dsi2, dss_hdmi
72 */
73 char *oh_name[] = { "dss_core", "dss_dispc", "dss_rfbi", "dss_venc",
74 "dss_dsi1", "dss_dsi2", "dss_hdmi" };
75 char *dev_name[] = { "omapdss_dss", "omapdss_dispc", "omapdss_rfbi",
76 "omapdss_venc", "omapdss_dsi1", "omapdss_dsi2",
77 "omapdss_hdmi" };
78 int oh_count;
79
80 memset(&pdata, 0, sizeof(pdata));
81
82 if (cpu_is_omap24xx())
83 oh_count = ARRAY_SIZE(oh_name) - 3;
84 /* last 3 hwmod dev in oh_name are not available for omap2 */
85 else if (cpu_is_omap44xx())
86 oh_count = ARRAY_SIZE(oh_name);
87 else
88 oh_count = ARRAY_SIZE(oh_name) - 2;
89 /* last 2 hwmod dev in oh_name are not available for omap3 */
90
91 /* opt_clks are always associated with dss hwmod */
92 oh_core = omap_hwmod_lookup("dss_core");
93 if (!oh_core) {
94 pr_err("Could not look up dss_core.\n");
95 return -ENODEV;
96 }
97
98 pdata.board_data = board_data;
99 pdata.board_data->get_last_off_on_transaction_id = NULL;
100 pdata.opt_clock_available = opt_clock_available;
101
102 for (i = 0; i < oh_count; i++) {
103 oh = omap_hwmod_lookup(oh_name[i]);
104 if (!oh) {
105 pr_err("Could not look up %s\n", oh_name[i]);
106 return -ENODEV;
107 }
108
109 od = omap_device_build(dev_name[i], -1, oh, &pdata,
110 sizeof(struct omap_display_platform_data),
111 omap_dss_latency,
112 ARRAY_SIZE(omap_dss_latency), 0);
113
114 if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n",
115 oh_name[i]))
116 return -ENODEV;
117 }
38 omap_display_device.dev.platform_data = board_data; 118 omap_display_device.dev.platform_data = board_data;
39 119
40 r = platform_device_register(&omap_display_device); 120 r = platform_device_register(&omap_display_device);
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 34922b2d2e3f..c9ff0e79703d 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -262,7 +262,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); 262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0);
263 kfree(p); 263 kfree(p);
264 if (IS_ERR(od)) { 264 if (IS_ERR(od)) {
265 pr_err("%s: Cant build omap_device for %s:%s.\n", 265 pr_err("%s: Can't build omap_device for %s:%s.\n",
266 __func__, name, oh->name); 266 __func__, name, oh->name);
267 return PTR_ERR(od); 267 return PTR_ERR(od);
268 } 268 }
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 413de18c1d2b..9529842ae054 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -82,7 +82,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
82 kfree(pdata); 82 kfree(pdata);
83 83
84 if (IS_ERR(od)) { 84 if (IS_ERR(od)) {
85 WARN(1, "Cant build omap_device for %s:%s.\n", 85 WARN(1, "Can't build omap_device for %s:%s.\n",
86 name, oh->name); 86 name, oh->name);
87 return PTR_ERR(od); 87 return PTR_ERR(od);
88 } 88 }
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 674174365f78..130034bf01d5 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -693,6 +693,7 @@ static int __init gpmc_init(void)
693{ 693{
694 u32 l, irq; 694 u32 l, irq;
695 int cs, ret = -EINVAL; 695 int cs, ret = -EINVAL;
696 int gpmc_irq;
696 char *ck = NULL; 697 char *ck = NULL;
697 698
698 if (cpu_is_omap24xx()) { 699 if (cpu_is_omap24xx()) {
@@ -701,12 +702,15 @@ static int __init gpmc_init(void)
701 l = OMAP2420_GPMC_BASE; 702 l = OMAP2420_GPMC_BASE;
702 else 703 else
703 l = OMAP34XX_GPMC_BASE; 704 l = OMAP34XX_GPMC_BASE;
705 gpmc_irq = INT_34XX_GPMC_IRQ;
704 } else if (cpu_is_omap34xx()) { 706 } else if (cpu_is_omap34xx()) {
705 ck = "gpmc_fck"; 707 ck = "gpmc_fck";
706 l = OMAP34XX_GPMC_BASE; 708 l = OMAP34XX_GPMC_BASE;
709 gpmc_irq = INT_34XX_GPMC_IRQ;
707 } else if (cpu_is_omap44xx()) { 710 } else if (cpu_is_omap44xx()) {
708 ck = "gpmc_ck"; 711 ck = "gpmc_ck";
709 l = OMAP44XX_GPMC_BASE; 712 l = OMAP44XX_GPMC_BASE;
713 gpmc_irq = OMAP44XX_IRQ_GPMC;
710 } 714 }
711 715
712 if (WARN_ON(!ck)) 716 if (WARN_ON(!ck))
@@ -739,16 +743,17 @@ static int __init gpmc_init(void)
739 /* initalize the irq_chained */ 743 /* initalize the irq_chained */
740 irq = OMAP_GPMC_IRQ_BASE; 744 irq = OMAP_GPMC_IRQ_BASE;
741 for (cs = 0; cs < GPMC_CS_NUM; cs++) { 745 for (cs = 0; cs < GPMC_CS_NUM; cs++) {
742 set_irq_handler(irq, handle_simple_irq); 746 irq_set_chip_and_handler(irq, &dummy_irq_chip,
747 handle_simple_irq);
743 set_irq_flags(irq, IRQF_VALID); 748 set_irq_flags(irq, IRQF_VALID);
744 irq++; 749 irq++;
745 } 750 }
746 751
747 ret = request_irq(INT_34XX_GPMC_IRQ, 752 ret = request_irq(gpmc_irq,
748 gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base); 753 gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base);
749 if (ret) 754 if (ret)
750 pr_err("gpmc: irq-%d could not claim: err %d\n", 755 pr_err("gpmc: irq-%d could not claim: err %d\n",
751 INT_34XX_GPMC_IRQ, ret); 756 gpmc_irq, ret);
752 return ret; 757 return ret;
753} 758}
754postcore_initcall(gpmc_init); 759postcore_initcall(gpmc_init);
@@ -757,8 +762,6 @@ static irqreturn_t gpmc_handle_irq(int irq, void *dev)
757{ 762{
758 u8 cs; 763 u8 cs;
759 764
760 if (irq != INT_34XX_GPMC_IRQ)
761 return IRQ_HANDLED;
762 /* check cs to invoke the irq */ 765 /* check cs to invoke the irq */
763 cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7; 766 cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
764 if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END) 767 if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 137e1a5f3d85..b2f30bed5a20 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -465,7 +465,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
465 od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, 465 od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
466 sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); 466 sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
467 if (IS_ERR(od)) { 467 if (IS_ERR(od)) {
468 WARN(1, "Cant build omap_device for %s:%s.\n", name, oh->name); 468 WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name);
469 kfree(mmc_data->slots[0].name); 469 kfree(mmc_data->slots[0].name);
470 goto done; 470 goto done;
471 } 471 }
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index bc524b94fd59..237e4530abf2 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -223,8 +223,7 @@ void __init omap_init_irq(void)
223 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); 223 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
224 224
225 for (i = 0; i < nr_of_irqs; i++) { 225 for (i = 0; i < nr_of_irqs; i++) {
226 set_irq_chip(i, &omap_irq_chip); 226 irq_set_chip_and_handler(i, &omap_irq_chip, handle_level_irq);
227 set_irq_handler(i, handle_level_irq);
228 set_irq_flags(i, IRQF_VALID); 227 set_irq_flags(i, IRQF_VALID);
229 } 228 }
230} 229}
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 565b9064a328..4a6ef6ab8458 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -149,7 +149,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
149 ARRAY_SIZE(omap2_mcbsp_latency), false); 149 ARRAY_SIZE(omap2_mcbsp_latency), false);
150 kfree(pdata); 150 kfree(pdata);
151 if (IS_ERR(od)) { 151 if (IS_ERR(od)) {
152 pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, 152 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
153 name, oh->name); 153 name, oh->name);
154 return PTR_ERR(od); 154 return PTR_ERR(od);
155 } 155 }
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index bb043cbb3886..a4ab1e364313 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -518,7 +518,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
518 seq_printf(s, "/* %s */\n", m->muxnames[mode]); 518 seq_printf(s, "/* %s */\n", m->muxnames[mode]);
519 519
520 /* 520 /*
521 * XXX: Might be revisited to support differences accross 521 * XXX: Might be revisited to support differences across
522 * same OMAP generation. 522 * same OMAP generation.
523 */ 523 */
524 seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); 524 seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def);
diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h
index adbea0d03e08..9fd93149ebd9 100644
--- a/arch/arm/mach-omap2/mux2430.h
+++ b/arch/arm/mach-omap2/mux2430.h
@@ -22,7 +22,7 @@
22 * absolute addresses. The name in the macro is the mode-0 name of 22 * absolute addresses. The name in the macro is the mode-0 name of
23 * the pin. NOTE: These registers are 8-bits wide. 23 * the pin. NOTE: These registers are 8-bits wide.
24 * 24 *
25 * Note that these defines use SDMMC instead of MMC for compability 25 * Note that these defines use SDMMC instead of MMC for compatibility
26 * with signal names used in 3630. 26 * with signal names used in 3630.
27 */ 27 */
28#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 28#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 62823467163b..8eb3ce1bbfbe 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1168,11 +1168,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = {
1168 .sysc = &omap2420_dss_sysc, 1168 .sysc = &omap2420_dss_sysc,
1169}; 1169};
1170 1170
1171/* dss */
1172static struct omap_hwmod_irq_info omap2420_dss_irqs[] = {
1173 { .irq = 25 },
1174};
1175
1176static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { 1171static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = {
1177 { .name = "dispc", .dma_req = 5 }, 1172 { .name = "dispc", .dma_req = 5 },
1178}; 1173};
@@ -1221,8 +1216,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
1221 .name = "dss_core", 1216 .name = "dss_core",
1222 .class = &omap2420_dss_hwmod_class, 1217 .class = &omap2420_dss_hwmod_class,
1223 .main_clk = "dss1_fck", /* instead of dss_fck */ 1218 .main_clk = "dss1_fck", /* instead of dss_fck */
1224 .mpu_irqs = omap2420_dss_irqs,
1225 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dss_irqs),
1226 .sdma_reqs = omap2420_dss_sdma_chs, 1219 .sdma_reqs = omap2420_dss_sdma_chs,
1227 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), 1220 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs),
1228 .prcm = { 1221 .prcm = {
@@ -1265,6 +1258,10 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
1265 .sysc = &omap2420_dispc_sysc, 1258 .sysc = &omap2420_dispc_sysc,
1266}; 1259};
1267 1260
1261static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
1262 { .irq = 25 },
1263};
1264
1268static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { 1265static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = {
1269 { 1266 {
1270 .pa_start = 0x48050400, 1267 .pa_start = 0x48050400,
@@ -1297,6 +1294,8 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
1297static struct omap_hwmod omap2420_dss_dispc_hwmod = { 1294static struct omap_hwmod omap2420_dss_dispc_hwmod = {
1298 .name = "dss_dispc", 1295 .name = "dss_dispc",
1299 .class = &omap2420_dispc_hwmod_class, 1296 .class = &omap2420_dispc_hwmod_class,
1297 .mpu_irqs = omap2420_dispc_irqs,
1298 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs),
1300 .main_clk = "dss1_fck", 1299 .main_clk = "dss1_fck",
1301 .prcm = { 1300 .prcm = {
1302 .omap2 = { 1301 .omap2 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 0fdf2cabfb12..e6e3810db77f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1268,10 +1268,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = {
1268 .sysc = &omap2430_dss_sysc, 1268 .sysc = &omap2430_dss_sysc,
1269}; 1269};
1270 1270
1271/* dss */
1272static struct omap_hwmod_irq_info omap2430_dss_irqs[] = {
1273 { .irq = 25 },
1274};
1275static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { 1271static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = {
1276 { .name = "dispc", .dma_req = 5 }, 1272 { .name = "dispc", .dma_req = 5 },
1277}; 1273};
@@ -1314,8 +1310,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
1314 .name = "dss_core", 1310 .name = "dss_core",
1315 .class = &omap2430_dss_hwmod_class, 1311 .class = &omap2430_dss_hwmod_class,
1316 .main_clk = "dss1_fck", /* instead of dss_fck */ 1312 .main_clk = "dss1_fck", /* instead of dss_fck */
1317 .mpu_irqs = omap2430_dss_irqs,
1318 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dss_irqs),
1319 .sdma_reqs = omap2430_dss_sdma_chs, 1313 .sdma_reqs = omap2430_dss_sdma_chs,
1320 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), 1314 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs),
1321 .prcm = { 1315 .prcm = {
@@ -1358,6 +1352,10 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
1358 .sysc = &omap2430_dispc_sysc, 1352 .sysc = &omap2430_dispc_sysc,
1359}; 1353};
1360 1354
1355static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
1356 { .irq = 25 },
1357};
1358
1361static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { 1359static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = {
1362 { 1360 {
1363 .pa_start = 0x48050400, 1361 .pa_start = 0x48050400,
@@ -1384,6 +1382,8 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
1384static struct omap_hwmod omap2430_dss_dispc_hwmod = { 1382static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1385 .name = "dss_dispc", 1383 .name = "dss_dispc",
1386 .class = &omap2430_dispc_hwmod_class, 1384 .class = &omap2430_dispc_hwmod_class,
1385 .mpu_irqs = omap2430_dispc_irqs,
1386 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs),
1387 .main_clk = "dss1_fck", 1387 .main_clk = "dss1_fck",
1388 .prcm = { 1388 .prcm = {
1389 .omap2 = { 1389 .omap2 = {
@@ -1559,7 +1559,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1559 * I2CHS IP's do not follow the usual pattern. 1559 * I2CHS IP's do not follow the usual pattern.
1560 * prcm_reg_id alone cannot be used to program 1560 * prcm_reg_id alone cannot be used to program
1561 * the iclk and fclk. Needs to be handled using 1561 * the iclk and fclk. Needs to be handled using
1562 * additonal flags when clk handling is moved 1562 * additional flags when clk handling is moved
1563 * to hwmod framework. 1563 * to hwmod framework.
1564 */ 1564 */
1565 .module_offs = CORE_MOD, 1565 .module_offs = CORE_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c819c306693a..b98e2dfcba28 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1480,11 +1480,6 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = {
1480 .sysc = &omap3xxx_dss_sysc, 1480 .sysc = &omap3xxx_dss_sysc,
1481}; 1481};
1482 1482
1483/* dss */
1484static struct omap_hwmod_irq_info omap3xxx_dss_irqs[] = {
1485 { .irq = 25 },
1486};
1487
1488static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { 1483static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
1489 { .name = "dispc", .dma_req = 5 }, 1484 { .name = "dispc", .dma_req = 5 },
1490 { .name = "dsi1", .dma_req = 74 }, 1485 { .name = "dsi1", .dma_req = 74 },
@@ -1548,7 +1543,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
1548 1543
1549static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1544static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1550 { .role = "tv_clk", .clk = "dss_tv_fck" }, 1545 { .role = "tv_clk", .clk = "dss_tv_fck" },
1551 { .role = "dssclk", .clk = "dss_96m_fck" }, 1546 { .role = "video_clk", .clk = "dss_96m_fck" },
1552 { .role = "sys_clk", .clk = "dss2_alwon_fck" }, 1547 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1553}; 1548};
1554 1549
@@ -1556,8 +1551,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1556 .name = "dss_core", 1551 .name = "dss_core",
1557 .class = &omap3xxx_dss_hwmod_class, 1552 .class = &omap3xxx_dss_hwmod_class,
1558 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1553 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1559 .mpu_irqs = omap3xxx_dss_irqs,
1560 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs),
1561 .sdma_reqs = omap3xxx_dss_sdma_chs, 1554 .sdma_reqs = omap3xxx_dss_sdma_chs,
1562 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), 1555 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
1563 1556
@@ -1584,8 +1577,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1584 .name = "dss_core", 1577 .name = "dss_core",
1585 .class = &omap3xxx_dss_hwmod_class, 1578 .class = &omap3xxx_dss_hwmod_class,
1586 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1579 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1587 .mpu_irqs = omap3xxx_dss_irqs,
1588 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs),
1589 .sdma_reqs = omap3xxx_dss_sdma_chs, 1580 .sdma_reqs = omap3xxx_dss_sdma_chs,
1590 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), 1581 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
1591 1582
@@ -1631,6 +1622,10 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
1631 .sysc = &omap3xxx_dispc_sysc, 1622 .sysc = &omap3xxx_dispc_sysc,
1632}; 1623};
1633 1624
1625static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
1626 { .irq = 25 },
1627};
1628
1634static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { 1629static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = {
1635 { 1630 {
1636 .pa_start = 0x48050400, 1631 .pa_start = 0x48050400,
@@ -1664,6 +1659,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
1664static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { 1659static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1665 .name = "dss_dispc", 1660 .name = "dss_dispc",
1666 .class = &omap3xxx_dispc_hwmod_class, 1661 .class = &omap3xxx_dispc_hwmod_class,
1662 .mpu_irqs = omap3xxx_dispc_irqs,
1663 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs),
1667 .main_clk = "dss1_alwon_fck", 1664 .main_clk = "dss1_alwon_fck",
1668 .prcm = { 1665 .prcm = {
1669 .omap2 = { 1666 .omap2 = {
@@ -1689,6 +1686,10 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
1689 .name = "dsi", 1686 .name = "dsi",
1690}; 1687};
1691 1688
1689static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
1690 { .irq = 25 },
1691};
1692
1692/* dss_dsi1 */ 1693/* dss_dsi1 */
1693static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { 1694static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
1694 { 1695 {
@@ -1722,6 +1723,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
1722static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { 1723static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1723 .name = "dss_dsi1", 1724 .name = "dss_dsi1",
1724 .class = &omap3xxx_dsi_hwmod_class, 1725 .class = &omap3xxx_dsi_hwmod_class,
1726 .mpu_irqs = omap3xxx_dsi1_irqs,
1727 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs),
1725 .main_clk = "dss1_alwon_fck", 1728 .main_clk = "dss1_alwon_fck",
1726 .prcm = { 1729 .prcm = {
1727 .omap2 = { 1730 .omap2 = {
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index 265bff3acb9e..5f2da7565b68 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -226,7 +226,6 @@ static int __init omap3_l3_probe(struct platform_device *pdev)
226 struct omap3_l3 *l3; 226 struct omap3_l3 *l3;
227 struct resource *res; 227 struct resource *res;
228 int ret; 228 int ret;
229 int irq;
230 229
231 l3 = kzalloc(sizeof(*l3), GFP_KERNEL); 230 l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
232 if (!l3) { 231 if (!l3) {
@@ -249,18 +248,17 @@ static int __init omap3_l3_probe(struct platform_device *pdev)
249 goto err2; 248 goto err2;
250 } 249 }
251 250
252 irq = platform_get_irq(pdev, 0); 251 l3->debug_irq = platform_get_irq(pdev, 0);
253 ret = request_irq(irq, omap3_l3_app_irq, 252 ret = request_irq(l3->debug_irq, omap3_l3_app_irq,
254 IRQF_DISABLED | IRQF_TRIGGER_RISING, 253 IRQF_DISABLED | IRQF_TRIGGER_RISING,
255 "l3-debug-irq", l3); 254 "l3-debug-irq", l3);
256 if (ret) { 255 if (ret) {
257 dev_err(&pdev->dev, "couldn't request debug irq\n"); 256 dev_err(&pdev->dev, "couldn't request debug irq\n");
258 goto err3; 257 goto err3;
259 } 258 }
260 l3->debug_irq = irq;
261 259
262 irq = platform_get_irq(pdev, 1); 260 l3->app_irq = platform_get_irq(pdev, 1);
263 ret = request_irq(irq, omap3_l3_app_irq, 261 ret = request_irq(l3->app_irq, omap3_l3_app_irq,
264 IRQF_DISABLED | IRQF_TRIGGER_RISING, 262 IRQF_DISABLED | IRQF_TRIGGER_RISING,
265 "l3-app-irq", l3); 263 "l3-app-irq", l3);
266 264
@@ -269,7 +267,6 @@ static int __init omap3_l3_probe(struct platform_device *pdev)
269 goto err4; 267 goto err4;
270 } 268 }
271 269
272 l3->app_irq = irq;
273 goto err0; 270 goto err0;
274 271
275err4: 272err4:
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index e2e605fe9138..05f6abc96b0d 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -112,12 +112,12 @@ int omap4430_phy_power(struct device *dev, int ID, int on)
112 else 112 else
113 /* 113 /*
114 * Enable VBUS Valid, AValid and IDDIG 114 * Enable VBUS Valid, AValid and IDDIG
115 * high impedence 115 * high impedance
116 */ 116 */
117 __raw_writel(IDDIG | AVALID | VBUSVALID, 117 __raw_writel(IDDIG | AVALID | VBUSVALID,
118 ctrl_base + USBOTGHS_CONTROL); 118 ctrl_base + USBOTGHS_CONTROL);
119 } else { 119 } else {
120 /* Enable session END and IDIG to high impedence. */ 120 /* Enable session END and IDIG to high impedance. */
121 __raw_writel(SESSEND | IDDIG, ctrl_base + 121 __raw_writel(SESSEND | IDDIG, ctrl_base +
122 USBOTGHS_CONTROL); 122 USBOTGHS_CONTROL);
123 } 123 }
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 0a8e74e3e811..07d6140baa9d 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -308,7 +308,7 @@ int __init omap3_twl_init(void)
308 * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, 308 * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages,
309 * in those scenarios this bit is to be cleared (enable = false). 309 * in those scenarios this bit is to be cleared (enable = false).
310 * 310 *
311 * Returns 0 on sucess, error is returned if I2C read/write fails. 311 * Returns 0 on success, error is returned if I2C read/write fails.
312 */ 312 */
313int __init omap3_twl_set_sr_bit(bool enable) 313int __init omap3_twl_set_sr_bit(bool enable)
314{ 314{
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 49c6513e90d8..9af08473bf10 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -196,7 +196,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
196/** 196/**
197 * pwrdm_init - set up the powerdomain layer 197 * pwrdm_init - set up the powerdomain layer
198 * @pwrdm_list: array of struct powerdomain pointers to register 198 * @pwrdm_list: array of struct powerdomain pointers to register
199 * @custom_funcs: func pointers for arch specfic implementations 199 * @custom_funcs: func pointers for arch specific implementations
200 * 200 *
201 * Loop through the array of powerdomains @pwrdm_list, registering all 201 * Loop through the array of powerdomains @pwrdm_list, registering all
202 * that are available on the current CPU. If pwrdm_list is supplied 202 * that are available on the current CPU. If pwrdm_list is supplied
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 027f40bd235d..d23d979b9c34 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -121,7 +121,7 @@ struct powerdomain {
121}; 121};
122 122
123/** 123/**
124 * struct pwrdm_ops - Arch specfic function implementations 124 * struct pwrdm_ops - Arch specific function implementations
125 * @pwrdm_set_next_pwrst: Set the target power state for a pd 125 * @pwrdm_set_next_pwrst: Set the target power state for a pd
126 * @pwrdm_read_next_pwrst: Read the target power state set for a pd 126 * @pwrdm_read_next_pwrst: Read the target power state set for a pd
127 * @pwrdm_read_pwrst: Read the current power state of a pd 127 * @pwrdm_read_pwrst: Read the current power state of a pd
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 9c9c113788b9..469a920a74dc 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -72,7 +72,7 @@ static struct powerdomain mpu_3xxx_pwrdm = {
72 72
73/* 73/*
74 * The USBTLL Save-and-Restore mechanism is broken on 74 * The USBTLL Save-and-Restore mechanism is broken on
75 * 3430s upto ES3.0 and 3630ES1.0. Hence this feature 75 * 3430s up to ES3.0 and 3630ES1.0. Hence this feature
76 * needs to be disabled on these chips. 76 * needs to be disabled on these chips.
77 * Refer: 3430 errata ID i459 and 3630 errata ID i579 77 * Refer: 3430 errata ID i459 and 3630 errata ID i579
78 * 78 *
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 8f674c9442bf..13e24f913dd4 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
247 * driver register and sr device intializtion API's. Only one call 247 * driver register and sr device intializtion API's. Only one call
248 * will ultimately succeed. 248 * will ultimately succeed.
249 * 249 *
250 * Currenly this function registers interrrupt handler for a particular SR 250 * Currently this function registers interrrupt handler for a particular SR
251 * if smartreflex class driver is already registered and has 251 * if smartreflex class driver is already registered and has
252 * requested for interrupts and the SR interrupt line in present. 252 * requested for interrupts and the SR interrupt line in present.
253 */ 253 */
diff --git a/arch/arm/mach-omap2/timer-mpu.c b/arch/arm/mach-omap2/timer-mpu.c
index 954682e64399..31c0ac4cd66a 100644
--- a/arch/arm/mach-omap2/timer-mpu.c
+++ b/arch/arm/mach-omap2/timer-mpu.c
@@ -26,9 +26,14 @@
26/* 26/*
27 * Setup the local clock events for a CPU. 27 * Setup the local clock events for a CPU.
28 */ 28 */
29void __cpuinit local_timer_setup(struct clock_event_device *evt) 29int __cpuinit local_timer_setup(struct clock_event_device *evt)
30{ 30{
31 /* Local timers are not supprted on OMAP4430 ES1.0 */
32 if (omap_rev() == OMAP4430_REV_ES1_0)
33 return -ENXIO;
34
31 evt->irq = OMAP44XX_IRQ_LOCALTIMER; 35 evt->irq = OMAP44XX_IRQ_LOCALTIMER;
32 twd_timer_setup(evt); 36 twd_timer_setup(evt);
37 return 0;
33} 38}
34 39
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index c6facf7becf8..6fb520999b6e 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -851,7 +851,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
851 * @voltdm: pointer to the VDD whose voltage is to be reset. 851 * @voltdm: pointer to the VDD whose voltage is to be reset.
852 * 852 *
853 * This API finds out the correct voltage the voltage domain is supposed 853 * This API finds out the correct voltage the voltage domain is supposed
854 * to be at and resets the voltage to that level. Should be used expecially 854 * to be at and resets the voltage to that level. Should be used especially
855 * while disabling any voltage compensation modules. 855 * while disabling any voltage compensation modules.
856 */ 856 */
857void omap_voltage_reset(struct voltagedomain *voltdm) 857void omap_voltage_reset(struct voltagedomain *voltdm)
@@ -912,7 +912,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm,
912 * This API searches only through the non-compensated voltages int the 912 * This API searches only through the non-compensated voltages int the
913 * voltage table. 913 * voltage table.
914 * Returns pointer to the voltage table entry corresponding to volt on 914 * Returns pointer to the voltage table entry corresponding to volt on
915 * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage 915 * success. Returns -ENODATA if no voltage table exisits for the passed voltage
916 * domain or if there is no matching entry. 916 * domain or if there is no matching entry.
917 */ 917 */
918struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, 918struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 1a5d6a0e2602..5ceafdccc456 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -19,7 +19,7 @@
19#include "common.h" 19#include "common.h"
20 20
21/* 21/*
22 * The Orion has fully programable address map. There's a separate address 22 * The Orion has fully programmable address map. There's a separate address
23 * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, 23 * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB,
24 * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own 24 * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own
25 * address decode windows that allow it to access any of the Orion resources. 25 * address decode windows that allow it to access any of the Orion resources.
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index c10a11715376..b7d4591214e0 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN; 213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
214 if (gpio_request(pin, "PCI Int1") == 0) { 214 if (gpio_request(pin, "PCI Int1") == 0) {
215 if (gpio_direction_input(pin) == 0) { 215 if (gpio_direction_input(pin) == 0) {
216 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 216 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
217 } else { 217 } else {
218 printk(KERN_ERR "db88f5281_pci_preinit faield to " 218 printk(KERN_ERR "db88f5281_pci_preinit faield to "
219 "set_irq_type pin %d\n", pin); 219 "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; 226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
227 if (gpio_request(pin, "PCI Int2") == 0) { 227 if (gpio_request(pin, "PCI Int2") == 0) {
228 if (gpio_direction_input(pin) == 0) { 228 if (gpio_direction_input(pin) == 0) {
229 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 229 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
230 } else { 230 } else {
231 printk(KERN_ERR "db88f5281_pci_preinit faield " 231 printk(KERN_ERR "db88f5281_pci_preinit faield "
232 "to set_irq_type pin %d\n", pin); 232 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index ed85891f8699..43cf8bc9767b 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -34,8 +34,8 @@ void __init orion5x_init_irq(void)
34 * Initialize gpiolib for GPIOs 0-31. 34 * Initialize gpiolib for GPIOs 0-31.
35 */ 35 */
36 orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START); 36 orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START);
37 set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); 37 irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
38 set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); 38 irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
39 set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); 39 irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
40 set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); 40 irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
41} 41}
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 429ecafe9fdd..a5930f83958b 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -190,7 +190,7 @@ err_free_1:
190 * The power front LEDs (blue and red) and SATA red LEDs are controlled via a 190 * The power front LEDs (blue and red) and SATA red LEDs are controlled via a
191 * single GPIO line and are compatible with the leds-gpio driver. 191 * single GPIO line and are compatible with the leds-gpio driver.
192 * 192 *
193 * The SATA blue LEDs have some hardware blink capabilities which are detailled 193 * The SATA blue LEDs have some hardware blink capabilities which are detailed
194 * in the following array: 194 * in the following array:
195 * 195 *
196 * SATAx blue LED | SATAx activity | LED state 196 * SATAx blue LED | SATAx activity | LED state
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 67ec6959b267..4fc46772a087 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; 148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
149 if (gpio_request(pin, "PCI IntA") == 0) { 149 if (gpio_request(pin, "PCI IntA") == 0) {
150 if (gpio_direction_input(pin) == 0) { 150 if (gpio_direction_input(pin) == 0) {
151 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 151 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
152 } else { 152 } else {
153 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 153 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
154 "set_irq_type pin %d\n", pin); 154 "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; 161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
162 if (gpio_request(pin, "PCI IntB") == 0) { 162 if (gpio_request(pin, "PCI IntB") == 0) {
163 if (gpio_direction_input(pin) == 0) { 163 if (gpio_direction_input(pin) == 0) {
164 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 164 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
165 } else { 165 } else {
166 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 166 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
167 "set_irq_type pin %d\n", pin); 167 "set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 5653ee6c71d8..616004143912 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -88,7 +88,7 @@ void __init tsp2_pci_preinit(void)
88 pin = TSP2_PCI_SLOT0_IRQ_PIN; 88 pin = TSP2_PCI_SLOT0_IRQ_PIN;
89 if (gpio_request(pin, "PCI Int1") == 0) { 89 if (gpio_request(pin, "PCI Int1") == 0) {
90 if (gpio_direction_input(pin) == 0) { 90 if (gpio_direction_input(pin) == 0) {
91 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 91 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
92 } else { 92 } else {
93 printk(KERN_ERR "tsp2_pci_preinit failed " 93 printk(KERN_ERR "tsp2_pci_preinit failed "
94 "to set_irq_type pin %d\n", pin); 94 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 8bbd27ea6735..e6d64494d3de 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -36,7 +36,7 @@
36 36
37/**************************************************************************** 37/****************************************************************************
38 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the 38 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the
39 * partitions on the device because we want to keep compatability with 39 * partitions on the device because we want to keep compatibility with
40 * existing QNAP firmware. 40 * existing QNAP firmware.
41 * 41 *
42 * Layout as used by QNAP: 42 * Layout as used by QNAP:
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; 117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
118 if (gpio_request(pin, "PCI Int1") == 0) { 118 if (gpio_request(pin, "PCI Int1") == 0) {
119 if (gpio_direction_input(pin) == 0) { 119 if (gpio_direction_input(pin) == 0) {
120 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 120 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
121 } else { 121 } else {
122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to " 122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
123 "set_irq_type pin %d\n", pin); 123 "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; 131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
132 if (gpio_request(pin, "PCI Int2") == 0) { 132 if (gpio_request(pin, "PCI Int2") == 0) {
133 if (gpio_direction_input(pin) == 0) { 133 if (gpio_direction_input(pin) == 0) {
134 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 134 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
135 } else { 135 } else {
136 printk(KERN_ERR "qnap_ts209_pci_preinit failed " 136 printk(KERN_ERR "qnap_ts209_pci_preinit failed "
137 "to set_irq_type pin %d\n", pin); 137 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 92f393f08fa4..9eac8192d923 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -56,7 +56,7 @@
56 56
57/**************************************************************************** 57/****************************************************************************
58 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the 58 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the
59 * partitions on the device because we want to keep compatability with 59 * partitions on the device because we want to keep compatibility with
60 * existing QNAP firmware. 60 * existing QNAP firmware.
61 * 61 *
62 * Layout as used by QNAP: 62 * Layout as used by QNAP:
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 8554707d20a9..edb1dd2d1611 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -402,7 +402,7 @@ static void ts78xx_fpga_supports(void)
402 /* enable devices if magic matches */ 402 /* enable devices if magic matches */
403 switch ((ts78xx_fpga.id >> 8) & 0xffffff) { 403 switch ((ts78xx_fpga.id >> 8) & 0xffffff) {
404 case TS7800_FPGA_MAGIC: 404 case TS7800_FPGA_MAGIC:
405 printk(KERN_WARNING "TS-7800 FPGA: unrecognized revision 0x%.2x\n", 405 pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n",
406 ts78xx_fpga.id & 0xff); 406 ts78xx_fpga.id & 0xff);
407 ts78xx_fpga.supports.ts_rtc.present = 1; 407 ts78xx_fpga.supports.ts_rtc.present = 1;
408 ts78xx_fpga.supports.ts_nand.present = 1; 408 ts78xx_fpga.supports.ts_nand.present = 1;
@@ -423,7 +423,7 @@ static int ts78xx_fpga_load_devices(void)
423 if (ts78xx_fpga.supports.ts_rtc.present == 1) { 423 if (ts78xx_fpga.supports.ts_rtc.present == 1) {
424 tmp = ts78xx_ts_rtc_load(); 424 tmp = ts78xx_ts_rtc_load();
425 if (tmp) { 425 if (tmp) {
426 printk(KERN_INFO "TS-78xx: RTC not registered\n"); 426 pr_info("TS-78xx: RTC not registered\n");
427 ts78xx_fpga.supports.ts_rtc.present = 0; 427 ts78xx_fpga.supports.ts_rtc.present = 0;
428 } 428 }
429 ret |= tmp; 429 ret |= tmp;
@@ -431,7 +431,7 @@ static int ts78xx_fpga_load_devices(void)
431 if (ts78xx_fpga.supports.ts_nand.present == 1) { 431 if (ts78xx_fpga.supports.ts_nand.present == 1) {
432 tmp = ts78xx_ts_nand_load(); 432 tmp = ts78xx_ts_nand_load();
433 if (tmp) { 433 if (tmp) {
434 printk(KERN_INFO "TS-78xx: NAND not registered\n"); 434 pr_info("TS-78xx: NAND not registered\n");
435 ts78xx_fpga.supports.ts_nand.present = 0; 435 ts78xx_fpga.supports.ts_nand.present = 0;
436 } 436 }
437 ret |= tmp; 437 ret |= tmp;
@@ -439,7 +439,7 @@ static int ts78xx_fpga_load_devices(void)
439 if (ts78xx_fpga.supports.ts_rng.present == 1) { 439 if (ts78xx_fpga.supports.ts_rng.present == 1) {
440 tmp = ts78xx_ts_rng_load(); 440 tmp = ts78xx_ts_rng_load();
441 if (tmp) { 441 if (tmp) {
442 printk(KERN_INFO "TS-78xx: RNG not registered\n"); 442 pr_info("TS-78xx: RNG not registered\n");
443 ts78xx_fpga.supports.ts_rng.present = 0; 443 ts78xx_fpga.supports.ts_rng.present = 0;
444 } 444 }
445 ret |= tmp; 445 ret |= tmp;
@@ -466,7 +466,7 @@ static int ts78xx_fpga_load(void)
466{ 466{
467 ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE); 467 ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
468 468
469 printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", 469 pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",
470 (ts78xx_fpga.id >> 8) & 0xffffff, 470 (ts78xx_fpga.id >> 8) & 0xffffff,
471 ts78xx_fpga.id & 0xff); 471 ts78xx_fpga.id & 0xff);
472 472
@@ -494,7 +494,7 @@ static int ts78xx_fpga_unload(void)
494 * UrJTAG SVN since r1381 can be used to reprogram the FPGA 494 * UrJTAG SVN since r1381 can be used to reprogram the FPGA
495 */ 495 */
496 if (ts78xx_fpga.id != fpga_id) { 496 if (ts78xx_fpga.id != fpga_id) {
497 printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n" 497 pr_err("TS-78xx FPGA: magic/rev mismatch\n"
498 "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n", 498 "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
499 (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff, 499 (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
500 (fpga_id >> 8) & 0xffffff, fpga_id & 0xff); 500 (fpga_id >> 8) & 0xffffff, fpga_id & 0xff);
@@ -525,7 +525,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
525 int value, ret; 525 int value, ret;
526 526
527 if (ts78xx_fpga.state < 0) { 527 if (ts78xx_fpga.state < 0) {
528 printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n"); 528 pr_err("TS-78xx FPGA: borked, you must powercycle asap\n");
529 return -EBUSY; 529 return -EBUSY;
530 } 530 }
531 531
@@ -534,7 +534,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
534 else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0) 534 else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)
535 value = 0; 535 value = 0;
536 else { 536 else {
537 printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n"); 537 pr_err("ts78xx_fpga_store: Invalid value\n");
538 return -EINVAL; 538 return -EINVAL;
539 } 539 }
540 540
@@ -616,7 +616,7 @@ static void __init ts78xx_init(void)
616 ret = ts78xx_fpga_load(); 616 ret = ts78xx_fpga_load();
617 ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr); 617 ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr);
618 if (ret) 618 if (ret)
619 printk(KERN_ERR "sysfs_create_file failed: %d\n", ret); 619 pr_err("sysfs_create_file failed: %d\n", ret);
620} 620}
621 621
622MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") 622MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index c69c180aec76..7608c7a288cf 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -58,22 +58,22 @@ static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type)
58 case IRQ_TYPE_EDGE_RISING: 58 case IRQ_TYPE_EDGE_RISING:
59 __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ 59 __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */
60 __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /*rising edge */ 60 __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /*rising edge */
61 set_irq_handler(d->irq, handle_edge_irq); 61 irq_set_handler(d->irq, handle_edge_irq);
62 break; 62 break;
63 case IRQ_TYPE_EDGE_FALLING: 63 case IRQ_TYPE_EDGE_FALLING:
64 __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ 64 __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */
65 __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*falling edge */ 65 __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*falling edge */
66 set_irq_handler(d->irq, handle_edge_irq); 66 irq_set_handler(d->irq, handle_edge_irq);
67 break; 67 break;
68 case IRQ_TYPE_LEVEL_LOW: 68 case IRQ_TYPE_LEVEL_LOW:
69 __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ 69 __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */
70 __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*low level */ 70 __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*low level */
71 set_irq_handler(d->irq, handle_level_irq); 71 irq_set_handler(d->irq, handle_level_irq);
72 break; 72 break;
73 case IRQ_TYPE_LEVEL_HIGH: 73 case IRQ_TYPE_LEVEL_HIGH:
74 __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ 74 __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */
75 __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /* high level */ 75 __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /* high level */
76 set_irq_handler(d->irq, handle_level_irq); 76 irq_set_handler(d->irq, handle_level_irq);
77 break; 77 break;
78 78
79 /* IRQ_TYPE_EDGE_BOTH is not supported */ 79 /* IRQ_TYPE_EDGE_BOTH is not supported */
@@ -98,7 +98,7 @@ void __init pnx4008_init_irq(void)
98 /* configure IRQ's */ 98 /* configure IRQ's */
99 for (i = 0; i < NR_IRQS; i++) { 99 for (i = 0; i < NR_IRQS; i++) {
100 set_irq_flags(i, IRQF_VALID); 100 set_irq_flags(i, IRQF_VALID);
101 set_irq_chip(i, &pnx4008_irq_chip); 101 irq_set_chip(i, &pnx4008_irq_chip);
102 pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]); 102 pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]);
103 } 103 }
104 104
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 3499fada73ae..4cb069fd9af2 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -128,8 +128,8 @@ static int am200_init_gpio_regs(struct metronomefb_par *par)
128 return 0; 128 return 0;
129 129
130err_req_gpio: 130err_req_gpio:
131 while (i > 0) 131 while (--i >= 0)
132 gpio_free(gpios[i--]); 132 gpio_free(gpios[i]);
133 133
134 return err; 134 return err;
135} 135}
@@ -194,7 +194,7 @@ static struct notifier_block am200_fb_notif = {
194}; 194};
195 195
196/* this gets called as part of our init. these steps must be done now so 196/* this gets called as part of our init. these steps must be done now so
197 * that we can use set_pxa_fb_info */ 197 * that we can use pxa_set_fb_info */
198static void __init am200_presetup_fb(void) 198static void __init am200_presetup_fb(void)
199{ 199{
200 int fw; 200 int fw;
@@ -249,7 +249,7 @@ static void __init am200_presetup_fb(void)
249 /* we divide since we told the LCD controller we're 16bpp */ 249 /* we divide since we told the LCD controller we're 16bpp */
250 am200_fb_info.modes->xres /= 2; 250 am200_fb_info.modes->xres /= 2;
251 251
252 set_pxa_fb_info(&am200_fb_info); 252 pxa_set_fb_info(NULL, &am200_fb_info);
253 253
254} 254}
255 255
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 993d75e66390..fa8bad235d9f 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -125,10 +125,7 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
125 if (err) { 125 if (err) {
126 dev_err(&am300_device->dev, "failed requesting " 126 dev_err(&am300_device->dev, "failed requesting "
127 "gpio %d, err=%d\n", i, err); 127 "gpio %d, err=%d\n", i, err);
128 while (i >= DB0_GPIO_PIN) 128 goto err_req_gpio2;
129 gpio_free(i--);
130 i = ARRAY_SIZE(gpios) - 1;
131 goto err_req_gpio;
132 } 129 }
133 } 130 }
134 131
@@ -159,9 +156,13 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
159 156
160 return 0; 157 return 0;
161 158
159err_req_gpio2:
160 while (--i >= DB0_GPIO_PIN)
161 gpio_free(i);
162 i = ARRAY_SIZE(gpios);
162err_req_gpio: 163err_req_gpio:
163 while (i > 0) 164 while (--i >= 0)
164 gpio_free(gpios[i--]); 165 gpio_free(gpios[i]);
165 166
166 return err; 167 return err;
167} 168}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index e194d928cdaa..bfbecec6d05f 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -27,6 +27,7 @@
27#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/i2c/pcf857x.h> 29#include <linux/i2c/pcf857x.h>
30#include <linux/i2c/pxa-i2c.h>
30#include <linux/mtd/nand.h> 31#include <linux/mtd/nand.h>
31#include <linux/mtd/physmap.h> 32#include <linux/mtd/physmap.h>
32#include <linux/regulator/max1586.h> 33#include <linux/regulator/max1586.h>
@@ -51,8 +52,6 @@
51#include <mach/irda.h> 52#include <mach/irda.h>
52#include <mach/ohci.h> 53#include <mach/ohci.h>
53 54
54#include <plat/i2c.h>
55
56#include "generic.h" 55#include "generic.h"
57#include "devices.h" 56#include "devices.h"
58 57
@@ -264,7 +263,7 @@ static void __init balloon3_lcd_init(void)
264 } 263 }
265 264
266 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; 265 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
267 set_pxa_fb_info(&balloon3_lcd_screen); 266 pxa_set_fb_info(NULL, &balloon3_lcd_screen);
268 return; 267 return;
269 268
270err2: 269err2:
@@ -528,13 +527,13 @@ static void __init balloon3_init_irq(void)
528 pxa27x_init_irq(); 527 pxa27x_init_irq();
529 /* setup extra Balloon3 irqs */ 528 /* setup extra Balloon3 irqs */
530 for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { 529 for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
531 set_irq_chip(irq, &balloon3_irq_chip); 530 irq_set_chip_and_handler(irq, &balloon3_irq_chip,
532 set_irq_handler(irq, handle_level_irq); 531 handle_level_irq);
533 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 532 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
534 } 533 }
535 534
536 set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); 535 irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
537 set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); 536 irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
538 537
539 pr_debug("%s: chained handler installed - irq %d automatically " 538 pr_debug("%s: chained handler installed - irq %d automatically "
540 "enabled\n", __func__, BALLOON3_AUX_NIRQ); 539 "enabled\n", __func__, BALLOON3_AUX_NIRQ);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index a2380cd76f80..8b1a30959fae 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -70,9 +70,10 @@ void __cmx2xx_pci_init_irq(int irq_gpio)
70 70
71 cmx2xx_it8152_irq_gpio = irq_gpio; 71 cmx2xx_it8152_irq_gpio = irq_gpio;
72 72
73 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); 73 irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
74 74
75 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux); 75 irq_set_chained_handler(gpio_to_irq(irq_gpio),
76 cmx2xx_it8152_irq_demux);
76} 77}
77 78
78#ifdef CONFIG_PM 79#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index b734d8468168..8225e2e58c6e 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -379,7 +379,7 @@ __setup("monitor=", cmx2xx_set_display);
379 379
380static void __init cmx2xx_init_display(void) 380static void __init cmx2xx_init_display(void)
381{ 381{
382 set_pxa_fb_info(cmx2xx_display); 382 pxa_set_fb_info(NULL, cmx2xx_display);
383} 383}
384#else 384#else
385static inline void cmx2xx_init_display(void) {} 385static inline void cmx2xx_init_display(void) {}
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 7984268508b6..b2248e76ec8b 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -29,6 +29,7 @@
29 29
30#include <linux/i2c.h> 30#include <linux/i2c.h>
31#include <linux/i2c/pca953x.h> 31#include <linux/i2c/pca953x.h>
32#include <linux/i2c/pxa-i2c.h>
32 33
33#include <linux/mfd/da903x.h> 34#include <linux/mfd/da903x.h>
34#include <linux/regulator/machine.h> 35#include <linux/regulator/machine.h>
@@ -48,7 +49,6 @@
48#include <mach/pxafb.h> 49#include <mach/pxafb.h>
49#include <mach/mmc.h> 50#include <mach/mmc.h>
50#include <mach/ohci.h> 51#include <mach/ohci.h>
51#include <plat/i2c.h>
52#include <plat/pxa3xx_nand.h> 52#include <plat/pxa3xx_nand.h>
53#include <mach/audio.h> 53#include <mach/audio.h>
54#include <mach/pxa3xx-u2d.h> 54#include <mach/pxa3xx-u2d.h>
@@ -296,7 +296,7 @@ static struct pxafb_mach_info cm_x300_lcd = {
296 296
297static void __init cm_x300_init_lcd(void) 297static void __init cm_x300_init_lcd(void)
298{ 298{
299 set_pxa_fb_info(&cm_x300_lcd); 299 pxa_set_fb_info(NULL, &cm_x300_lcd);
300} 300}
301#else 301#else
302static inline void cm_x300_init_lcd(void) {} 302static inline void cm_x300_init_lcd(void) {}
@@ -765,7 +765,7 @@ static void __init cm_x300_init_da9030(void)
765{ 765{
766 pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); 766 pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
767 i2c_register_board_info(1, &cm_x300_pmic_info, 1); 767 i2c_register_board_info(1, &cm_x300_pmic_info, 1);
768 set_irq_wake(IRQ_WAKEUP0, 1); 768 irq_set_irq_wake(IRQ_WAKEUP0, 1);
769} 769}
770 770
771static void __init cm_x300_init_wi2wi(void) 771static void __init cm_x300_init_wi2wi(void)
diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 28f667e52ef9..81c3c433e2d6 100644
--- a/arch/arm/mach-pxa/colibri-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -20,6 +20,7 @@
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/i2c/pxa-i2c.h>
23 24
24#include <mach/pxa27x.h> 25#include <mach/pxa27x.h>
25#include <mach/colibri.h> 26#include <mach/colibri.h>
@@ -27,8 +28,6 @@
27#include <mach/ohci.h> 28#include <mach/ohci.h>
28#include <mach/pxa27x-udc.h> 29#include <mach/pxa27x-udc.h>
29 30
30#include <plat/i2c.h>
31
32#include "generic.h" 31#include "generic.h"
33#include "devices.h" 32#include "devices.h"
34 33
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index 07b62a096f17..44c1b77ece67 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -21,6 +21,7 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/pwm_backlight.h> 23#include <linux/pwm_backlight.h>
24#include <linux/i2c/pxa-i2c.h>
24#include <linux/sysdev.h> 25#include <linux/sysdev.h>
25 26
26#include <asm/irq.h> 27#include <asm/irq.h>
@@ -33,8 +34,6 @@
33#include <mach/pxa27x-udc.h> 34#include <mach/pxa27x-udc.h>
34#include <mach/pxafb.h> 35#include <mach/pxafb.h>
35 36
36#include <plat/i2c.h>
37
38#include "devices.h" 37#include "devices.h"
39#include "generic.h" 38#include "generic.h"
40 39
@@ -176,7 +175,7 @@ static struct pxafb_mach_info income_lcd_screen = {
176 175
177static void __init income_lcd_init(void) 176static void __init income_lcd_init(void)
178{ 177{
179 set_pxa_fb_info(&income_lcd_screen); 178 pxa_set_fb_info(NULL, &income_lcd_screen);
180} 179}
181#else 180#else
182static inline void income_lcd_init(void) {} 181static inline void income_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 96b2d9fbfef0..3f9be419959d 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -105,7 +105,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
105 lcd_bl_pin = bl_pin; 105 lcd_bl_pin = bl_pin;
106 gpio_request(bl_pin, "lcd backlight"); 106 gpio_request(bl_pin, "lcd backlight");
107 gpio_direction_output(bl_pin, 0); 107 gpio_direction_output(bl_pin, 0);
108 set_pxa_fb_info(&sharp_lq43_info); 108 pxa_set_fb_info(NULL, &sharp_lq43_info);
109} 109}
110#endif 110#endif
111 111
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index a5452a3a276d..3a5507e31919 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -24,6 +24,7 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/backlight.h> 25#include <linux/backlight.h>
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/i2c/pxa-i2c.h>
27#include <linux/io.h> 28#include <linux/io.h>
28#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h> 30#include <linux/spi/ads7846.h>
@@ -45,7 +46,6 @@
45#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
46 47
47#include <mach/pxa25x.h> 48#include <mach/pxa25x.h>
48#include <plat/i2c.h>
49#include <mach/irda.h> 49#include <mach/irda.h>
50#include <mach/mmc.h> 50#include <mach/mmc.h>
51#include <mach/udc.h> 51#include <mach/udc.h>
@@ -462,7 +462,6 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
462 * USB Device Controller 462 * USB Device Controller
463 */ 463 */
464static struct pxa2xx_udc_mach_info udc_info __initdata = { 464static struct pxa2xx_udc_mach_info udc_info __initdata = {
465 .gpio_vbus = -1,
466 /* no connect GPIO; corgi can't tell connection status */ 465 /* no connect GPIO; corgi can't tell connection status */
467 .gpio_pullup = CORGI_GPIO_USB_PULLUP, 466 .gpio_pullup = CORGI_GPIO_USB_PULLUP,
468}; 467};
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index a305424a967d..0481c29a70e8 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -17,12 +17,12 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/sm501.h> 18#include <linux/sm501.h>
19#include <linux/smsc911x.h> 19#include <linux/smsc911x.h>
20#include <linux/i2c/pxa-i2c.h>
20 21
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23#include <mach/csb726.h> 24#include <mach/csb726.h>
24#include <mach/mfp-pxa27x.h> 25#include <mach/mfp-pxa27x.h>
25#include <plat/i2c.h>
26#include <mach/mmc.h> 26#include <mach/mmc.h>
27#include <mach/ohci.h> 27#include <mach/ohci.h>
28#include <mach/pxa2xx-regs.h> 28#include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 4c766e3b4af3..2e0425404de5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -4,6 +4,7 @@
4#include <linux/platform_device.h> 4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h> 5#include <linux/dma-mapping.h>
6#include <linux/spi/pxa2xx_spi.h> 6#include <linux/spi/pxa2xx_spi.h>
7#include <linux/i2c/pxa-i2c.h>
7 8
8#include <asm/pmu.h> 9#include <asm/pmu.h>
9#include <mach/udc.h> 10#include <mach/udc.h>
@@ -16,7 +17,6 @@
16#include <mach/camera.h> 17#include <mach/camera.h>
17#include <mach/audio.h> 18#include <mach/audio.h>
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <plat/i2c.h>
20#include <plat/pxa3xx_nand.h> 20#include <plat/pxa3xx_nand.h>
21 21
22#include "devices.h" 22#include "devices.h"
@@ -90,7 +90,6 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
90 90
91static struct pxa2xx_udc_mach_info pxa_udc_info = { 91static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1, 92 .gpio_pullup = -1,
93 .gpio_vbus = -1,
94}; 93};
95 94
96void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
@@ -188,16 +187,12 @@ struct platform_device pxa_device_fb = {
188 .resource = pxafb_resources, 187 .resource = pxafb_resources,
189}; 188};
190 189
191void __init set_pxa_fb_info(struct pxafb_mach_info *info) 190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192{ 191{
192 pxa_device_fb.dev.parent = parent;
193 pxa_register_device(&pxa_device_fb, info); 193 pxa_register_device(&pxa_device_fb, info);
194} 194}
195 195
196void __init set_pxa_fb_parent(struct device *parent_dev)
197{
198 pxa_device_fb.dev.parent = parent_dev;
199}
200
201static struct resource pxa_resource_ffuart[] = { 196static struct resource pxa_resource_ffuart[] = {
202 { 197 {
203 .start = 0x40100000, 198 .start = 0x40100000,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index a78bb3097739..f8a6e9d79a3a 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -31,6 +31,7 @@
31#include <linux/apm-emulation.h> 31#include <linux/apm-emulation.h>
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/i2c/pca953x.h> 33#include <linux/i2c/pca953x.h>
34#include <linux/i2c/pxa-i2c.h>
34#include <linux/regulator/userspace-consumer.h> 35#include <linux/regulator/userspace-consumer.h>
35 36
36#include <media/soc_camera.h> 37#include <media/soc_camera.h>
@@ -45,7 +46,6 @@
45#include <mach/ohci.h> 46#include <mach/ohci.h>
46#include <mach/mmc.h> 47#include <mach/mmc.h>
47#include <plat/pxa27x_keypad.h> 48#include <plat/pxa27x_keypad.h>
48#include <plat/i2c.h>
49#include <mach/camera.h> 49#include <mach/camera.h>
50 50
51#include "generic.h" 51#include "generic.h"
@@ -689,7 +689,7 @@ static struct pxafb_mach_info em_x270_lcd = {
689 689
690static void __init em_x270_init_lcd(void) 690static void __init em_x270_init_lcd(void)
691{ 691{
692 set_pxa_fb_info(&em_x270_lcd); 692 pxa_set_fb_info(NULL, &em_x270_lcd);
693} 693}
694#else 694#else
695static inline void em_x270_init_lcd(void) {} 695static inline void em_x270_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index edca0a043293..2e3970fdde0b 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/t7l66xb.h> 20#include <linux/mfd/t7l66xb.h>
21#include <linux/mtd/nand.h> 21#include <linux/mtd/nand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/usb/gpio_vbus.h>
23 24
24#include <video/w100fb.h> 25#include <video/w100fb.h>
25 26
@@ -51,12 +52,20 @@ void __init eseries_fixup(struct machine_desc *desc,
51 mi->bank[0].size = (64*1024*1024); 52 mi->bank[0].size = (64*1024*1024);
52} 53}
53 54
54struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { 55struct gpio_vbus_mach_info e7xx_udc_info = {
55 .gpio_vbus = GPIO_E7XX_USB_DISC, 56 .gpio_vbus = GPIO_E7XX_USB_DISC,
56 .gpio_pullup = GPIO_E7XX_USB_PULLUP, 57 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
57 .gpio_pullup_inverted = 1 58 .gpio_pullup_inverted = 1
58}; 59};
59 60
61static struct platform_device e7xx_gpio_vbus = {
62 .name = "gpio-vbus",
63 .id = -1,
64 .dev = {
65 .platform_data = &e7xx_udc_info,
66 },
67};
68
60struct pxaficp_platform_data e7xx_ficp_platform_data = { 69struct pxaficp_platform_data e7xx_ficp_platform_data = {
61 .gpio_pwdown = GPIO_E7XX_IR_OFF, 70 .gpio_pwdown = GPIO_E7XX_IR_OFF,
62 .transceiver_cap = IR_SIRMODE | IR_OFF, 71 .transceiver_cap = IR_SIRMODE | IR_OFF,
@@ -165,6 +174,7 @@ static struct platform_device e330_tc6387xb_device = {
165 174
166static struct platform_device *e330_devices[] __initdata = { 175static struct platform_device *e330_devices[] __initdata = {
167 &e330_tc6387xb_device, 176 &e330_tc6387xb_device,
177 &e7xx_gpio_vbus,
168}; 178};
169 179
170static void __init e330_init(void) 180static void __init e330_init(void)
@@ -175,7 +185,6 @@ static void __init e330_init(void)
175 eseries_register_clks(); 185 eseries_register_clks();
176 eseries_get_tmio_gpios(); 186 eseries_get_tmio_gpios();
177 platform_add_devices(ARRAY_AND_SIZE(e330_devices)); 187 platform_add_devices(ARRAY_AND_SIZE(e330_devices));
178 pxa_set_udc_info(&e7xx_udc_mach_info);
179} 188}
180 189
181MACHINE_START(E330, "Toshiba e330") 190MACHINE_START(E330, "Toshiba e330")
@@ -214,6 +223,7 @@ static struct platform_device e350_t7l66xb_device = {
214 223
215static struct platform_device *e350_devices[] __initdata = { 224static struct platform_device *e350_devices[] __initdata = {
216 &e350_t7l66xb_device, 225 &e350_t7l66xb_device,
226 &e7xx_gpio_vbus,
217}; 227};
218 228
219static void __init e350_init(void) 229static void __init e350_init(void)
@@ -224,7 +234,6 @@ static void __init e350_init(void)
224 eseries_register_clks(); 234 eseries_register_clks();
225 eseries_get_tmio_gpios(); 235 eseries_get_tmio_gpios();
226 platform_add_devices(ARRAY_AND_SIZE(e350_devices)); 236 platform_add_devices(ARRAY_AND_SIZE(e350_devices));
227 pxa_set_udc_info(&e7xx_udc_mach_info);
228} 237}
229 238
230MACHINE_START(E350, "Toshiba e350") 239MACHINE_START(E350, "Toshiba e350")
@@ -333,6 +342,7 @@ static struct platform_device e400_t7l66xb_device = {
333 342
334static struct platform_device *e400_devices[] __initdata = { 343static struct platform_device *e400_devices[] __initdata = {
335 &e400_t7l66xb_device, 344 &e400_t7l66xb_device,
345 &e7xx_gpio_vbus,
336}; 346};
337 347
338static void __init e400_init(void) 348static void __init e400_init(void)
@@ -344,9 +354,8 @@ static void __init e400_init(void)
344 /* Fixme - e400 may have a switched clock */ 354 /* Fixme - e400 may have a switched clock */
345 eseries_register_clks(); 355 eseries_register_clks();
346 eseries_get_tmio_gpios(); 356 eseries_get_tmio_gpios();
347 set_pxa_fb_info(&e400_pxafb_mach_info); 357 pxa_set_fb_info(NULL, &e400_pxafb_mach_info);
348 platform_add_devices(ARRAY_AND_SIZE(e400_devices)); 358 platform_add_devices(ARRAY_AND_SIZE(e400_devices));
349 pxa_set_udc_info(&e7xx_udc_mach_info);
350} 359}
351 360
352MACHINE_START(E400, "Toshiba e400") 361MACHINE_START(E400, "Toshiba e400")
@@ -519,6 +528,7 @@ static struct platform_device e740_t7l66xb_device = {
519static struct platform_device *e740_devices[] __initdata = { 528static struct platform_device *e740_devices[] __initdata = {
520 &e740_fb_device, 529 &e740_fb_device,
521 &e740_t7l66xb_device, 530 &e740_t7l66xb_device,
531 &e7xx_gpio_vbus,
522}; 532};
523 533
524static void __init e740_init(void) 534static void __init e740_init(void)
@@ -532,7 +542,6 @@ static void __init e740_init(void)
532 "UDCCLK", &pxa25x_device_udc.dev), 542 "UDCCLK", &pxa25x_device_udc.dev),
533 eseries_get_tmio_gpios(); 543 eseries_get_tmio_gpios();
534 platform_add_devices(ARRAY_AND_SIZE(e740_devices)); 544 platform_add_devices(ARRAY_AND_SIZE(e740_devices));
535 pxa_set_udc_info(&e7xx_udc_mach_info);
536 pxa_set_ac97_info(NULL); 545 pxa_set_ac97_info(NULL);
537 pxa_set_ficp_info(&e7xx_ficp_platform_data); 546 pxa_set_ficp_info(&e7xx_ficp_platform_data);
538} 547}
@@ -711,6 +720,7 @@ static struct platform_device e750_tc6393xb_device = {
711static struct platform_device *e750_devices[] __initdata = { 720static struct platform_device *e750_devices[] __initdata = {
712 &e750_fb_device, 721 &e750_fb_device,
713 &e750_tc6393xb_device, 722 &e750_tc6393xb_device,
723 &e7xx_gpio_vbus,
714}; 724};
715 725
716static void __init e750_init(void) 726static void __init e750_init(void)
@@ -723,7 +733,6 @@ static void __init e750_init(void)
723 "GPIO11_CLK", NULL), 733 "GPIO11_CLK", NULL),
724 eseries_get_tmio_gpios(); 734 eseries_get_tmio_gpios();
725 platform_add_devices(ARRAY_AND_SIZE(e750_devices)); 735 platform_add_devices(ARRAY_AND_SIZE(e750_devices));
726 pxa_set_udc_info(&e7xx_udc_mach_info);
727 pxa_set_ac97_info(NULL); 736 pxa_set_ac97_info(NULL);
728 pxa_set_ficp_info(&e7xx_ficp_platform_data); 737 pxa_set_ficp_info(&e7xx_ficp_platform_data);
729} 738}
@@ -873,12 +882,21 @@ static struct platform_device e800_fb_device = {
873 882
874/* --------------------------- UDC definitions --------------------------- */ 883/* --------------------------- UDC definitions --------------------------- */
875 884
876static struct pxa2xx_udc_mach_info e800_udc_mach_info = { 885static struct gpio_vbus_mach_info e800_udc_info = {
877 .gpio_vbus = GPIO_E800_USB_DISC, 886 .gpio_vbus = GPIO_E800_USB_DISC,
878 .gpio_pullup = GPIO_E800_USB_PULLUP, 887 .gpio_pullup = GPIO_E800_USB_PULLUP,
879 .gpio_pullup_inverted = 1 888 .gpio_pullup_inverted = 1
880}; 889};
881 890
891static struct platform_device e800_gpio_vbus = {
892 .name = "gpio-vbus",
893 .id = -1,
894 .dev = {
895 .platform_data = &e800_udc_info,
896 },
897};
898
899
882/* ----------------- e800 tc6393xb parameters ------------------ */ 900/* ----------------- e800 tc6393xb parameters ------------------ */
883 901
884static struct tc6393xb_platform_data e800_tc6393xb_info = { 902static struct tc6393xb_platform_data e800_tc6393xb_info = {
@@ -907,6 +925,7 @@ static struct platform_device e800_tc6393xb_device = {
907static struct platform_device *e800_devices[] __initdata = { 925static struct platform_device *e800_devices[] __initdata = {
908 &e800_fb_device, 926 &e800_fb_device,
909 &e800_tc6393xb_device, 927 &e800_tc6393xb_device,
928 &e800_gpio_vbus,
910}; 929};
911 930
912static void __init e800_init(void) 931static void __init e800_init(void)
@@ -919,7 +938,6 @@ static void __init e800_init(void)
919 "GPIO11_CLK", NULL), 938 "GPIO11_CLK", NULL),
920 eseries_get_tmio_gpios(); 939 eseries_get_tmio_gpios();
921 platform_add_devices(ARRAY_AND_SIZE(e800_devices)); 940 platform_add_devices(ARRAY_AND_SIZE(e800_devices));
922 pxa_set_udc_info(&e800_udc_mach_info);
923 pxa_set_ac97_info(NULL); 941 pxa_set_ac97_info(NULL);
924} 942}
925 943
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 87cec0abe5b0..d88aed8fbe15 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -20,6 +20,7 @@
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/gpio_keys.h> 21#include <linux/gpio_keys.h>
22#include <linux/leds-lp3944.h> 22#include <linux/leds-lp3944.h>
23#include <linux/i2c/pxa-i2c.h>
23 24
24#include <media/soc_camera.h> 25#include <media/soc_camera.h>
25 26
@@ -30,7 +31,6 @@
30#include <mach/pxa27x.h> 31#include <mach/pxa27x.h>
31#include <mach/pxafb.h> 32#include <mach/pxafb.h>
32#include <mach/ohci.h> 33#include <mach/ohci.h>
33#include <plat/i2c.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <plat/pxa27x_keypad.h> 35#include <plat/pxa27x_keypad.h>
36#include <mach/camera.h> 36#include <mach/camera.h>
@@ -783,7 +783,7 @@ static void __init a780_init(void)
783 783
784 pxa_set_i2c_info(NULL); 784 pxa_set_i2c_info(NULL);
785 785
786 set_pxa_fb_info(&ezx_fb_info_1); 786 pxa_set_fb_info(NULL, &ezx_fb_info_1);
787 787
788 pxa_set_keypad_info(&a780_keypad_platform_data); 788 pxa_set_keypad_info(&a780_keypad_platform_data);
789 789
@@ -853,7 +853,7 @@ static void __init e680_init(void)
853 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); 854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
855 855
856 set_pxa_fb_info(&ezx_fb_info_1); 856 pxa_set_fb_info(NULL, &ezx_fb_info_1);
857 857
858 pxa_set_keypad_info(&e680_keypad_platform_data); 858 pxa_set_keypad_info(&e680_keypad_platform_data);
859 859
@@ -918,7 +918,7 @@ static void __init a1200_init(void)
918 pxa_set_i2c_info(NULL); 918 pxa_set_i2c_info(NULL);
919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); 919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
920 920
921 set_pxa_fb_info(&ezx_fb_info_2); 921 pxa_set_fb_info(NULL, &ezx_fb_info_2);
922 922
923 pxa_set_keypad_info(&a1200_keypad_platform_data); 923 pxa_set_keypad_info(&a1200_keypad_platform_data);
924 924
@@ -1103,7 +1103,7 @@ static void __init a910_init(void)
1103 pxa_set_i2c_info(NULL); 1103 pxa_set_i2c_info(NULL);
1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info)); 1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info));
1105 1105
1106 set_pxa_fb_info(&ezx_fb_info_2); 1106 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1107 1107
1108 pxa_set_keypad_info(&a910_keypad_platform_data); 1108 pxa_set_keypad_info(&a910_keypad_platform_data);
1109 1109
@@ -1173,7 +1173,7 @@ static void __init e6_init(void)
1173 pxa_set_i2c_info(NULL); 1173 pxa_set_i2c_info(NULL);
1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); 1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
1175 1175
1176 set_pxa_fb_info(&ezx_fb_info_2); 1176 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1177 1177
1178 pxa_set_keypad_info(&e6_keypad_platform_data); 1178 pxa_set_keypad_info(&e6_keypad_platform_data);
1179 1179
@@ -1212,7 +1212,7 @@ static void __init e2_init(void)
1212 pxa_set_i2c_info(NULL); 1212 pxa_set_i2c_info(NULL);
1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); 1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));
1214 1214
1215 set_pxa_fb_info(&ezx_fb_info_2); 1215 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1216 1216
1217 pxa_set_keypad_info(&e2_keypad_platform_data); 1217 pxa_set_keypad_info(&e2_keypad_platform_data);
1218 1218
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 6fd319ea5284..d65e4bde9b91 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -26,6 +26,7 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/usb/gpio_vbus.h>
29 30
30#include <asm/setup.h> 31#include <asm/setup.h>
31#include <asm/memory.h> 32#include <asm/memory.h>
@@ -106,14 +107,22 @@ static void __init gumstix_mmc_init(void)
106#endif 107#endif
107 108
108#ifdef CONFIG_USB_GADGET_PXA25X 109#ifdef CONFIG_USB_GADGET_PXA25X
109static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { 110static struct gpio_vbus_mach_info gumstix_udc_info = {
110 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
111 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
112}; 113};
113 114
115static struct platform_device gumstix_gpio_vbus = {
116 .name = "gpio-vbus",
117 .id = -1,
118 .dev = {
119 .platform_data = &gumstix_udc_info,
120 },
121};
122
114static void __init gumstix_udc_init(void) 123static void __init gumstix_udc_init(void)
115{ 124{
116 pxa_set_udc_info(&gumstix_udc_info); 125 platform_device_register(&gumstix_gpio_vbus);
117} 126}
118#else 127#else
119static void gumstix_udc_init(void) 128static void gumstix_udc_init(void)
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index a908e0a5f396..6de0ad0eea65 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -35,6 +35,7 @@
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/pxa2xx_spi.h> 36#include <linux/spi/pxa2xx_spi.h>
37#include <linux/usb/gpio_vbus.h> 37#include <linux/usb/gpio_vbus.h>
38#include <linux/i2c/pxa-i2c.h>
38 39
39#include <mach/hardware.h> 40#include <mach/hardware.h>
40#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -42,7 +43,6 @@
42 43
43#include <mach/pxa27x.h> 44#include <mach/pxa27x.h>
44#include <mach/hx4700.h> 45#include <mach/hx4700.h>
45#include <plat/i2c.h>
46#include <mach/irda.h> 46#include <mach/irda.h>
47 47
48#include <video/platform_lcd.h> 48#include <video/platform_lcd.h>
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index dd40e4a9291c..f7fb64f11a7d 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -167,7 +167,7 @@ static void __init idp_init(void)
167 167
168 platform_device_register(&smc91x_device); 168 platform_device_register(&smc91x_device);
169 //platform_device_register(&mst_audio_device); 169 //platform_device_register(&mst_audio_device);
170 set_pxa_fb_info(&sharp_lm8v31); 170 pxa_set_fb_info(NULL, &sharp_lm8v31);
171 pxa_set_mci_info(&idp_mci_platform_data); 171 pxa_set_mci_info(&idp_mci_platform_data);
172} 172}
173 173
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index b024a8b37439..c4639502efca 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -99,11 +99,24 @@
99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) 99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
100 100
101 101
102#define NR_BUILTIN_GPIO 128 102#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
103 103
104#define gpio_to_bank(gpio) ((gpio) >> 5) 104#define gpio_to_bank(gpio) ((gpio) >> 5)
105#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 105#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
106#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) 106
107static inline int irq_to_gpio(unsigned int irq)
108{
109 int gpio;
110
111 if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
112 return irq - IRQ_GPIO0;
113
114 gpio = irq - PXA_GPIO_IRQ_BASE;
115 if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
116 return gpio;
117
118 return -1;
119}
107 120
108#ifdef CONFIG_CPU_PXA26x 121#ifdef CONFIG_CPU_PXA26x
109/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, 122/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index a4285fc00878..038402404e39 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -93,9 +93,6 @@
93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) 93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) 94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
95 95
96#define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE)
97#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
98
99/* 96/*
100 * The following interrupts are for board specific purposes. Since 97 * The following interrupts are for board specific purposes. Since
101 * the kernel can only run on one machine at a time, we can re-use 98 * the kernel can only run on one machine at a time, we can re-use
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 2bbcf70dd935..0d4700a79612 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -44,6 +44,11 @@
44#define GPIO_NR_PALMZ72_BT_POWER 17 44#define GPIO_NR_PALMZ72_BT_POWER 17
45#define GPIO_NR_PALMZ72_BT_RESET 83 45#define GPIO_NR_PALMZ72_BT_RESET 83
46 46
47/* Camera */
48#define GPIO_NR_PALMZ72_CAM_PWDN 56
49#define GPIO_NR_PALMZ72_CAM_RESET 57
50#define GPIO_NR_PALMZ72_CAM_POWER 91
51
47/** Initial values **/ 52/** Initial values **/
48 53
49/* Battery */ 54/* Battery */
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index e4fb4668c26e..207ecb49a61b 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -38,7 +38,7 @@
38#define PCMD(x) __REG(0x40F50110 + ((x) << 2)) 38#define PCMD(x) __REG(0x40F50110 + ((x) << 2))
39 39
40/* 40/*
41 * Slave Power Managment Unit 41 * Slave Power Management Unit
42 */ 42 */
43#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */ 43#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */
44#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */ 44#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 160ec83f51a6..01a45ac48114 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -154,8 +154,8 @@ struct pxafb_mach_info {
154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); 154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
155 void (*smart_update)(struct fb_info *); 155 void (*smart_update)(struct fb_info *);
156}; 156};
157void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); 157
158void set_pxa_fb_parent(struct device *parent_dev); 158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev); 159unsigned long pxafb_get_hsync_time(struct device *dev);
160 160
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); 161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
index 8835c16bc82f..7b0f71ef3167 100644
--- a/arch/arm/mach-pxa/include/mach/z2.h
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -25,8 +25,7 @@
25#define GPIO98_ZIPITZ2_LID_BUTTON 98 25#define GPIO98_ZIPITZ2_LID_BUTTON 98
26 26
27/* Libertas GSPI8686 WiFi */ 27/* Libertas GSPI8686 WiFi */
28#define GPIO14_ZIPITZ2_WIFI_RESET 14 28#define GPIO14_ZIPITZ2_WIFI_POWER 14
29#define GPIO15_ZIPITZ2_WIFI_POWER 15
30#define GPIO24_ZIPITZ2_WIFI_CS 24 29#define GPIO24_ZIPITZ2_WIFI_CS 24
31#define GPIO36_ZIPITZ2_WIFI_IRQ 36 30#define GPIO36_ZIPITZ2_WIFI_IRQ 36
32 31
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index faa408ab7ad7..0641f31a56b7 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -64,7 +64,7 @@
64 64
65/* 65/*
66 * CPLD registers: 66 * CPLD registers:
67 * Only 4 registers, but spreaded over a 32MB address space. 67 * Only 4 registers, but spread over a 32MB address space.
68 * Be gentle, and remap that over 32kB... 68 * Be gentle, and remap that over 32kB...
69 */ 69 */
70 70
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 2693e3c3776f..6251e3f5c62c 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -137,9 +137,9 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
137 GEDR0 = 0x3; 137 GEDR0 = 0x3;
138 138
139 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { 139 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
140 set_irq_chip(irq, &pxa_low_gpio_chip); 140 irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
141 set_irq_chip_data(irq, irq_base(0)); 141 handle_edge_irq);
142 set_irq_handler(irq, handle_edge_irq); 142 irq_set_chip_data(irq, irq_base(0));
143 set_irq_flags(irq, IRQF_VALID); 143 set_irq_flags(irq, IRQF_VALID);
144 } 144 }
145 145
@@ -165,9 +165,9 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
165 __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i)); 165 __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i));
166 166
167 irq = PXA_IRQ(i); 167 irq = PXA_IRQ(i);
168 set_irq_chip(irq, &pxa_internal_irq_chip); 168 irq_set_chip_and_handler(irq, &pxa_internal_irq_chip,
169 set_irq_chip_data(irq, base); 169 handle_level_irq);
170 set_irq_handler(irq, handle_level_irq); 170 irq_set_chip_data(irq, base);
171 set_irq_flags(irq, IRQF_VALID); 171 set_irq_flags(irq, IRQF_VALID);
172 } 172 }
173 } 173 }
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index ccb7bfad17ca..e5e326d2cdc9 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -28,6 +28,7 @@
28#include <linux/leds.h> 28#include <linux/leds.h>
29#include <linux/mfd/da903x.h> 29#include <linux/mfd/da903x.h>
30#include <linux/i2c/max732x.h> 30#include <linux/i2c/max732x.h>
31#include <linux/i2c/pxa-i2c.h>
31 32
32#include <asm/types.h> 33#include <asm/types.h>
33#include <asm/setup.h> 34#include <asm/setup.h>
@@ -45,7 +46,6 @@
45#include <mach/mmc.h> 46#include <mach/mmc.h>
46#include <plat/pxa27x_keypad.h> 47#include <plat/pxa27x_keypad.h>
47#include <mach/littleton.h> 48#include <mach/littleton.h>
48#include <plat/i2c.h>
49#include <plat/pxa3xx_nand.h> 49#include <plat/pxa3xx_nand.h>
50 50
51#include "generic.h" 51#include "generic.h"
@@ -185,7 +185,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
185 185
186static void littleton_init_lcd(void) 186static void littleton_init_lcd(void)
187{ 187{
188 set_pxa_fb_info(&littleton_lcd_info); 188 pxa_set_fb_info(NULL, &littleton_lcd_info);
189} 189}
190#else 190#else
191static inline void littleton_init_lcd(void) {}; 191static inline void littleton_init_lcd(void) {};
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index c9a3e775c2de..f5de541725b1 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -149,12 +149,12 @@ static void __init lpd270_init_irq(void)
149 149
150 /* setup extra LogicPD PXA270 irqs */ 150 /* setup extra LogicPD PXA270 irqs */
151 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { 151 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
152 set_irq_chip(irq, &lpd270_irq_chip); 152 irq_set_chip_and_handler(irq, &lpd270_irq_chip,
153 set_irq_handler(irq, handle_level_irq); 153 handle_level_irq);
154 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 154 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
155 } 155 }
156 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); 156 irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
157 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 157 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
158} 158}
159 159
160 160
@@ -480,7 +480,7 @@ static void __init lpd270_init(void)
480 pxa_set_ac97_info(NULL); 480 pxa_set_ac97_info(NULL);
481 481
482 if (lpd270_lcd_to_use != NULL) 482 if (lpd270_lcd_to_use != NULL)
483 set_pxa_fb_info(lpd270_lcd_to_use); 483 pxa_set_fb_info(NULL, lpd270_lcd_to_use);
484 484
485 pxa_set_ohci_info(&lpd270_ohci_platform_data); 485 pxa_set_ohci_info(&lpd270_ohci_platform_data);
486} 486}
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index dca20de306bb..3ede978c83d9 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -165,13 +165,13 @@ static void __init lubbock_init_irq(void)
165 165
166 /* setup extra lubbock irqs */ 166 /* setup extra lubbock irqs */
167 for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { 167 for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
168 set_irq_chip(irq, &lubbock_irq_chip); 168 irq_set_chip_and_handler(irq, &lubbock_irq_chip,
169 set_irq_handler(irq, handle_level_irq); 169 handle_level_irq);
170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
171 } 171 }
172 172
173 set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); 173 irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
174 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 174 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
175} 175}
176 176
177#ifdef CONFIG_PM 177#ifdef CONFIG_PM
@@ -521,7 +521,7 @@ static void __init lubbock_init(void)
521 521
522 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); 522 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
523 pxa_set_udc_info(&udc_info); 523 pxa_set_udc_info(&udc_info);
524 set_pxa_fb_info(&sharp_lm8v31); 524 pxa_set_fb_info(NULL, &sharp_lm8v31);
525 pxa_set_mci_info(&lubbock_mci_platform_data); 525 pxa_set_mci_info(&lubbock_mci_platform_data);
526 pxa_set_ficp_info(&lubbock_ficp_platform_data); 526 pxa_set_ficp_info(&lubbock_ficp_platform_data);
527 pxa_set_ac97_info(NULL); 527 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 41198f0dc3ac..a72993dde2b3 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -28,6 +28,7 @@
28#include <linux/regulator/bq24022.h> 28#include <linux/regulator/bq24022.h>
29#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
30#include <linux/usb/gpio_vbus.h> 30#include <linux/usb/gpio_vbus.h>
31#include <linux/i2c/pxa-i2c.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
@@ -36,7 +37,6 @@
36#include <mach/pxa27x.h> 37#include <mach/pxa27x.h>
37#include <mach/magician.h> 38#include <mach/magician.h>
38#include <mach/pxafb.h> 39#include <mach/pxafb.h>
39#include <plat/i2c.h>
40#include <mach/mmc.h> 40#include <mach/mmc.h>
41#include <mach/irda.h> 41#include <mach/irda.h>
42#include <mach/ohci.h> 42#include <mach/ohci.h>
@@ -757,7 +757,7 @@ static void __init magician_init(void)
757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0); 757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0); 758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0); 759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
760 set_pxa_fb_info(lcd_select ? &samsung_info : &toppoly_info); 760 pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info);
761 } else 761 } else
762 pr_err("LCD detection: CPLD mapping failed\n"); 762 pr_err("LCD detection: CPLD mapping failed\n");
763} 763}
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d4b6f2375f2c..95163baca29e 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -27,6 +27,7 @@
27#include <linux/gpio_keys.h> 27#include <linux/gpio_keys.h>
28#include <linux/pwm_backlight.h> 28#include <linux/pwm_backlight.h>
29#include <linux/smc91x.h> 29#include <linux/smc91x.h>
30#include <linux/i2c/pxa-i2c.h>
30 31
31#include <asm/types.h> 32#include <asm/types.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -46,7 +47,6 @@
46#include <mach/mainstone.h> 47#include <mach/mainstone.h>
47#include <mach/audio.h> 48#include <mach/audio.h>
48#include <mach/pxafb.h> 49#include <mach/pxafb.h>
49#include <plat/i2c.h>
50#include <mach/mmc.h> 50#include <mach/mmc.h>
51#include <mach/irda.h> 51#include <mach/irda.h>
52#include <mach/ohci.h> 52#include <mach/ohci.h>
@@ -166,8 +166,8 @@ static void __init mainstone_init_irq(void)
166 166
167 /* setup extra Mainstone irqs */ 167 /* setup extra Mainstone irqs */
168 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { 168 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
169 set_irq_chip(irq, &mainstone_irq_chip); 169 irq_set_chip_and_handler(irq, &mainstone_irq_chip,
170 set_irq_handler(irq, handle_level_irq); 170 handle_level_irq);
171 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) 171 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
172 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); 172 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
173 else 173 else
@@ -179,8 +179,8 @@ static void __init mainstone_init_irq(void)
179 MST_INTMSKENA = 0; 179 MST_INTMSKENA = 0;
180 MST_INTSETCLR = 0; 180 MST_INTSETCLR = 0;
181 181
182 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 182 irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
183 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 183 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
184} 184}
185 185
186#ifdef CONFIG_PM 186#ifdef CONFIG_PM
@@ -592,7 +592,7 @@ static void __init mainstone_init(void)
592 else 592 else
593 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; 593 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
594 594
595 set_pxa_fb_info(&mainstone_pxafb_info); 595 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
596 mainstone_backlight_register(); 596 mainstone_backlight_register();
597 597
598 pxa_set_mci_info(&mainstone_mci_platform_data); 598 pxa_set_mci_info(&mainstone_mci_platform_data);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index faafea3542fb..23925db8ff74 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -39,6 +39,7 @@
39#include <linux/usb/gpio_vbus.h> 39#include <linux/usb/gpio_vbus.h>
40#include <linux/regulator/max1586.h> 40#include <linux/regulator/max1586.h>
41#include <linux/slab.h> 41#include <linux/slab.h>
42#include <linux/i2c/pxa-i2c.h>
42 43
43#include <asm/mach-types.h> 44#include <asm/mach-types.h>
44#include <asm/mach/arch.h> 45#include <asm/mach/arch.h>
@@ -50,7 +51,6 @@
50#include <mach/mmc.h> 51#include <mach/mmc.h>
51#include <mach/udc.h> 52#include <mach/udc.h>
52#include <mach/pxa27x-udc.h> 53#include <mach/pxa27x-udc.h>
53#include <plat/i2c.h>
54#include <mach/camera.h> 54#include <mach/camera.h>
55#include <mach/audio.h> 55#include <mach/audio.h>
56#include <media/soc_camera.h> 56#include <media/soc_camera.h>
@@ -458,7 +458,7 @@ static struct platform_device strataflash = {
458/* 458/*
459 * Suspend/Resume bootstrap management 459 * Suspend/Resume bootstrap management
460 * 460 *
461 * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled, 461 * MIO A701 reboot sequence is highly ROM dependent. From the one dissassembled,
462 * this sequence is as follows : 462 * this sequence is as follows :
463 * - disables interrupts 463 * - disables interrupts
464 * - initialize SDRAM (self refresh RAM into active RAM) 464 * - initialize SDRAM (self refresh RAM into active RAM)
@@ -795,7 +795,7 @@ static void __init mioa701_machine_init(void)
795 pxa_set_stuart_info(NULL); 795 pxa_set_stuart_info(NULL);
796 mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); 796 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
797 bootstrap_init(); 797 bootstrap_init();
798 set_pxa_fb_info(&mioa701_pxafb_info); 798 pxa_set_fb_info(NULL, &mioa701_pxafb_info);
799 pxa_set_mci_info(&mioa701_mci_info); 799 pxa_set_mci_info(&mioa701_mci_info);
800 pxa_set_keypad_info(&mioa701_keypad_info); 800 pxa_set_keypad_info(&mioa701_keypad_info);
801 pxa_set_udc_info(&mioa701_udc_info); 801 pxa_set_udc_info(&mioa701_udc_info);
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index cdf7f41e2bb3..b5a8fd3fce04 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -22,8 +22,8 @@
22#include <linux/serial_8250.h> 22#include <linux/serial_8250.h>
23#include <linux/dm9000.h> 23#include <linux/dm9000.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/i2c/pxa-i2c.h>
25 26
26#include <plat/i2c.h>
27#include <plat/pxa3xx_nand.h> 27#include <plat/pxa3xx_nand.h>
28 28
29#include <mach/pxafb.h> 29#include <mach/pxafb.h>
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 35572c427fa8..325c245c0a0d 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -1,8 +1,7 @@
1/* 1/*
2 * Common code for Palm LD, T5, TX, Z72 2 * Common code for Palm LD, T5, TX, Z72
3 * 3 *
4 * Copyright (C) 2010 4 * Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com>
5 * Marek Vasut <marek.vasut@gmail.com>
6 * 5 *
7 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -22,6 +21,7 @@
22#include <linux/power_supply.h> 21#include <linux/power_supply.h>
23#include <linux/usb/gpio_vbus.h> 22#include <linux/usb/gpio_vbus.h>
24#include <linux/regulator/max1586.h> 23#include <linux/regulator/max1586.h>
24#include <linux/i2c/pxa-i2c.h>
25 25
26#include <asm/mach-types.h> 26#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -36,8 +36,6 @@
36#include <mach/palmasoc.h> 36#include <mach/palmasoc.h>
37#include <mach/palm27x.h> 37#include <mach/palm27x.h>
38 38
39#include <plat/i2c.h>
40
41#include "generic.h" 39#include "generic.h"
42#include "devices.h" 40#include "devices.h"
43 41
@@ -159,7 +157,7 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
159 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl; 157 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
160 } 158 }
161 159
162 set_pxa_fb_info(&palm27x_lcd_screen); 160 pxa_set_fb_info(NULL, &palm27x_lcd_screen);
163} 161}
164#endif 162#endif
165 163
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index a09a2374697b..fb06bd047272 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -507,7 +507,7 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
507 507
508static void __init palmtc_lcd_init(void) 508static void __init palmtc_lcd_init(void)
509{ 509{
510 set_pxa_fb_info(&palmtc_lcd_screen); 510 pxa_set_fb_info(NULL, &palmtc_lcd_screen);
511} 511}
512#else 512#else
513static inline void palmtc_lcd_init(void) {} 513static inline void palmtc_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 3f25014a136c..726f5b98dcd3 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -136,30 +136,14 @@ static struct platform_device palmte2_pxa_keys = {
136/****************************************************************************** 136/******************************************************************************
137 * Backlight 137 * Backlight
138 ******************************************************************************/ 138 ******************************************************************************/
139static struct gpio palmte_bl_gpios[] = {
140 { GPIO_NR_PALMTE2_BL_POWER, GPIOF_INIT_LOW, "Backlight power" },
141 { GPIO_NR_PALMTE2_LCD_POWER, GPIOF_INIT_LOW, "LCD power" },
142};
143
139static int palmte2_backlight_init(struct device *dev) 144static int palmte2_backlight_init(struct device *dev)
140{ 145{
141 int ret; 146 return gpio_request_array(ARRAY_AND_SIZE(palmte_bl_gpios));
142
143 ret = gpio_request(GPIO_NR_PALMTE2_BL_POWER, "BL POWER");
144 if (ret)
145 goto err;
146 ret = gpio_direction_output(GPIO_NR_PALMTE2_BL_POWER, 0);
147 if (ret)
148 goto err2;
149 ret = gpio_request(GPIO_NR_PALMTE2_LCD_POWER, "LCD POWER");
150 if (ret)
151 goto err2;
152 ret = gpio_direction_output(GPIO_NR_PALMTE2_LCD_POWER, 0);
153 if (ret)
154 goto err3;
155
156 return 0;
157err3:
158 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
159err2:
160 gpio_free(GPIO_NR_PALMTE2_BL_POWER);
161err:
162 return ret;
163} 147}
164 148
165static int palmte2_backlight_notify(struct device *dev, int brightness) 149static int palmte2_backlight_notify(struct device *dev, int brightness)
@@ -171,8 +155,7 @@ static int palmte2_backlight_notify(struct device *dev, int brightness)
171 155
172static void palmte2_backlight_exit(struct device *dev) 156static void palmte2_backlight_exit(struct device *dev)
173{ 157{
174 gpio_free(GPIO_NR_PALMTE2_BL_POWER); 158 gpio_free_array(ARRAY_AND_SIZE(palmte_bl_gpios));
175 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
176} 159}
177 160
178static struct platform_pwm_backlight_data palmte2_backlight_data = { 161static struct platform_pwm_backlight_data palmte2_backlight_data = {
@@ -363,7 +346,7 @@ static void __init palmte2_init(void)
363 pxa_set_btuart_info(NULL); 346 pxa_set_btuart_info(NULL);
364 pxa_set_stuart_info(NULL); 347 pxa_set_stuart_info(NULL);
365 348
366 set_pxa_fb_info(&palmte2_lcd_screen); 349 pxa_set_fb_info(NULL, &palmte2_lcd_screen);
367 pxa_set_mci_info(&palmte2_mci_platform_data); 350 pxa_set_mci_info(&palmte2_mci_platform_data);
368 palmte2_udc_init(); 351 palmte2_udc_init();
369 pxa_set_ac97_info(&palmte2_ac97_pdata); 352 pxa_set_ac97_info(&palmte2_ac97_pdata);
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 3010193b081e..3b8a4f37dbbe 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -30,6 +30,7 @@
30#include <linux/wm97xx.h> 30#include <linux/wm97xx.h>
31#include <linux/power_supply.h> 31#include <linux/power_supply.h>
32#include <linux/usb/gpio_vbus.h> 32#include <linux/usb/gpio_vbus.h>
33#include <linux/i2c-gpio.h>
33 34
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -47,6 +48,9 @@
47#include <mach/palm27x.h> 48#include <mach/palm27x.h>
48 49
49#include <mach/pm.h> 50#include <mach/pm.h>
51#include <mach/camera.h>
52
53#include <media/soc_camera.h>
50 54
51#include "generic.h" 55#include "generic.h"
52#include "devices.h" 56#include "devices.h"
@@ -103,6 +107,28 @@ static unsigned long palmz72_pin_config[] __initdata = {
103 GPIO22_GPIO, /* LCD border color */ 107 GPIO22_GPIO, /* LCD border color */
104 GPIO96_GPIO, /* lcd power */ 108 GPIO96_GPIO, /* lcd power */
105 109
110 /* PXA Camera */
111 GPIO81_CIF_DD_0,
112 GPIO48_CIF_DD_5,
113 GPIO50_CIF_DD_3,
114 GPIO51_CIF_DD_2,
115 GPIO52_CIF_DD_4,
116 GPIO53_CIF_MCLK,
117 GPIO54_CIF_PCLK,
118 GPIO55_CIF_DD_1,
119 GPIO84_CIF_FV,
120 GPIO85_CIF_LV,
121 GPIO93_CIF_DD_6,
122 GPIO108_CIF_DD_7,
123
124 GPIO56_GPIO, /* OV9640 Powerdown */
125 GPIO57_GPIO, /* OV9640 Reset */
126 GPIO91_GPIO, /* OV9640 Power */
127
128 /* I2C */
129 GPIO117_GPIO, /* I2C_SCL */
130 GPIO118_GPIO, /* I2C_SDA */
131
106 /* Misc. */ 132 /* Misc. */
107 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ 133 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
108 GPIO88_GPIO, /* green led */ 134 GPIO88_GPIO, /* green led */
@@ -254,6 +280,106 @@ device_initcall(palmz72_pm_init);
254#endif 280#endif
255 281
256/****************************************************************************** 282/******************************************************************************
283 * SoC Camera
284 ******************************************************************************/
285#if defined(CONFIG_SOC_CAMERA_OV9640) || \
286 defined(CONFIG_SOC_CAMERA_OV9640_MODULE)
287static struct pxacamera_platform_data palmz72_pxacamera_platform_data = {
288 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
289 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
290 .mclk_10khz = 2600,
291};
292
293/* Board I2C devices. */
294static struct i2c_board_info palmz72_i2c_device[] = {
295 {
296 I2C_BOARD_INFO("ov9640", 0x30),
297 }
298};
299
300static int palmz72_camera_power(struct device *dev, int power)
301{
302 gpio_set_value(GPIO_NR_PALMZ72_CAM_PWDN, !power);
303 mdelay(50);
304 return 0;
305}
306
307static int palmz72_camera_reset(struct device *dev)
308{
309 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 1);
310 mdelay(50);
311 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 0);
312 mdelay(50);
313 return 0;
314}
315
316static struct soc_camera_link palmz72_iclink = {
317 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
318 .board_info = &palmz72_i2c_device[0],
319 .i2c_adapter_id = 0,
320 .module_name = "ov96xx",
321 .power = &palmz72_camera_power,
322 .reset = &palmz72_camera_reset,
323 .flags = SOCAM_DATAWIDTH_8,
324};
325
326static struct i2c_gpio_platform_data palmz72_i2c_bus_data = {
327 .sda_pin = 118,
328 .scl_pin = 117,
329 .udelay = 10,
330 .timeout = 100,
331};
332
333static struct platform_device palmz72_i2c_bus_device = {
334 .name = "i2c-gpio",
335 .id = 0, /* we use this as a replacement for i2c-pxa */
336 .dev = {
337 .platform_data = &palmz72_i2c_bus_data,
338 }
339};
340
341static struct platform_device palmz72_camera = {
342 .name = "soc-camera-pdrv",
343 .id = -1,
344 .dev = {
345 .platform_data = &palmz72_iclink,
346 },
347};
348
349/* Here we request the camera GPIOs and configure them. We power up the camera
350 * module, deassert the reset pin, but put it into powerdown (low to no power
351 * consumption) mode. This allows us to later bring the module up fast. */
352static struct gpio palmz72_camera_gpios[] = {
353 { GPIO_NR_PALMZ72_CAM_POWER, GPIOF_INIT_HIGH,"Camera DVDD" },
354 { GPIO_NR_PALMZ72_CAM_RESET, GPIOF_INIT_LOW, "Camera RESET" },
355 { GPIO_NR_PALMZ72_CAM_PWDN, GPIOF_INIT_LOW, "Camera PWDN" },
356};
357
358static inline void __init palmz72_cam_gpio_init(void)
359{
360 int ret;
361
362 ret = gpio_request_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
363 if (!ret)
364 gpio_free_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
365 else
366 printk(KERN_ERR "Camera GPIO init failed!\n");
367
368 return;
369}
370
371static void __init palmz72_camera_init(void)
372{
373 palmz72_cam_gpio_init();
374 pxa_set_camera_info(&palmz72_pxacamera_platform_data);
375 platform_device_register(&palmz72_i2c_bus_device);
376 platform_device_register(&palmz72_camera);
377}
378#else
379static inline void palmz72_camera_init(void) {}
380#endif
381
382/******************************************************************************
257 * Machine init 383 * Machine init
258 ******************************************************************************/ 384 ******************************************************************************/
259static void __init palmz72_init(void) 385static void __init palmz72_init(void)
@@ -276,6 +402,7 @@ static void __init palmz72_init(void)
276 palm27x_pmic_init(); 402 palm27x_pmic_init();
277 palmz72_kpc_init(); 403 palmz72_kpc_init();
278 palmz72_leds_init(); 404 palmz72_leds_init();
405 palmz72_camera_init();
279} 406}
280 407
281MACHINE_START(PALMZ72, "Palm Zire72") 408MACHINE_START(PALMZ72, "Palm Zire72")
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 90820faa711a..6d5b7e062124 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -23,12 +23,12 @@
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/i2c/pxa-i2c.h>
26#include <linux/pwm_backlight.h> 27#include <linux/pwm_backlight.h>
27 28
28#include <media/soc_camera.h> 29#include <media/soc_camera.h>
29 30
30#include <asm/gpio.h> 31#include <asm/gpio.h>
31#include <plat/i2c.h>
32#include <mach/camera.h> 32#include <mach/camera.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34#include <mach/pxa27x.h> 34#include <mach/pxa27x.h>
@@ -281,16 +281,16 @@ static void __init pcm990_init_irq(void)
281 281
282 /* setup extra PCM990 irqs */ 282 /* setup extra PCM990 irqs */
283 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { 283 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
284 set_irq_chip(irq, &pcm990_irq_chip); 284 irq_set_chip_and_handler(irq, &pcm990_irq_chip,
285 set_irq_handler(irq, handle_level_irq); 285 handle_level_irq);
286 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 286 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
287 } 287 }
288 288
289 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ 289 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
290 PCM990_INTSETCLR = 0xFF; 290 PCM990_INTSETCLR = 0xFF;
291 291
292 set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); 292 irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
293 set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); 293 irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
294} 294}
295 295
296static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, 296static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
@@ -515,7 +515,7 @@ void __init pcm990_baseboard_init(void)
515 pcm990_init_irq(); 515 pcm990_init_irq();
516 516
517#ifndef CONFIG_PCM990_DISPLAY_NONE 517#ifndef CONFIG_PCM990_DISPLAY_NONE
518 set_pxa_fb_info(&pcm990_fbinfo); 518 pxa_set_fb_info(NULL, &pcm990_fbinfo);
519#endif 519#endif
520 platform_device_register(&pcm990_backlight_device); 520 platform_device_register(&pcm990_backlight_device);
521 521
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 4f0ff1ab623d..16d14fd79b4b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -23,6 +23,7 @@
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/i2c/pxa-i2c.h>
26#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
27#include <linux/spi/ads7846.h> 28#include <linux/spi/ads7846.h>
28#include <linux/spi/pxa2xx_spi.h> 29#include <linux/spi/pxa2xx_spi.h>
@@ -44,7 +45,6 @@
44#include <mach/irda.h> 45#include <mach/irda.h>
45#include <mach/poodle.h> 46#include <mach/poodle.h>
46#include <mach/pxafb.h> 47#include <mach/pxafb.h>
47#include <plat/i2c.h>
48 48
49#include <asm/hardware/scoop.h> 49#include <asm/hardware/scoop.h>
50#include <asm/hardware/locomo.h> 50#include <asm/hardware/locomo.h>
@@ -445,8 +445,7 @@ static void __init poodle_init(void)
445 if (ret) 445 if (ret)
446 pr_warning("poodle: Unable to register LoCoMo device\n"); 446 pr_warning("poodle: Unable to register LoCoMo device\n");
447 447
448 set_pxa_fb_parent(&poodle_locomo_device.dev); 448 pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info);
449 set_pxa_fb_info(&poodle_fb_info);
450 pxa_set_udc_info(&udc_info); 449 pxa_set_udc_info(&udc_info);
451 pxa_set_mci_info(&poodle_mci_platform_data); 450 pxa_set_mci_info(&poodle_mci_platform_data);
452 pxa_set_ficp_info(&poodle_ficp_platform_data); 451 pxa_set_ficp_info(&poodle_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 6bde5956358d..a4af8c52d7ee 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -285,7 +285,7 @@ static inline void pxa25x_init_pm(void) {}
285 285
286static int pxa25x_set_wake(struct irq_data *d, unsigned int on) 286static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
287{ 287{
288 int gpio = IRQ_TO_GPIO(d->irq); 288 int gpio = irq_to_gpio(d->irq);
289 uint32_t mask = 0; 289 uint32_t mask = 0;
290 290
291 if (gpio >= 0 && gpio < 85) 291 if (gpio >= 0 && gpio < 85)
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 28b11be00b3f..909756eaf4b7 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -19,6 +19,7 @@
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/i2c/pxa-i2c.h>
22 23
23#include <asm/mach/map.h> 24#include <asm/mach/map.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
@@ -32,8 +33,6 @@
32#include <mach/dma.h> 33#include <mach/dma.h>
33#include <mach/smemc.h> 34#include <mach/smemc.h>
34 35
35#include <plat/i2c.h>
36
37#include "generic.h" 36#include "generic.h"
38#include "devices.h" 37#include "devices.h"
39#include "clock.h" 38#include "clock.h"
@@ -346,7 +345,7 @@ static inline void pxa27x_init_pm(void) {}
346 */ 345 */
347static int pxa27x_set_wake(struct irq_data *d, unsigned int on) 346static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
348{ 347{
349 int gpio = IRQ_TO_GPIO(d->irq); 348 int gpio = irq_to_gpio(d->irq);
350 uint32_t mask; 349 uint32_t mask;
351 350
352 if (gpio >= 0 && gpio < 128) 351 if (gpio >= 0 && gpio < 128)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 1230343d9c70..8dd107391157 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -21,6 +21,7 @@
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/sysdev.h> 23#include <linux/sysdev.h>
24#include <linux/i2c/pxa-i2c.h>
24 25
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
@@ -32,7 +33,6 @@
32#include <mach/dma.h> 33#include <mach/dma.h>
33#include <mach/regs-intc.h> 34#include <mach/regs-intc.h>
34#include <mach/smemc.h> 35#include <mach/smemc.h>
35#include <plat/i2c.h>
36 36
37#include "generic.h" 37#include "generic.h"
38#include "devices.h" 38#include "devices.h"
@@ -362,8 +362,8 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
362 int irq; 362 int irq;
363 363
364 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) { 364 for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
365 set_irq_chip(irq, &pxa_ext_wakeup_chip); 365 irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip,
366 set_irq_handler(irq, handle_edge_irq); 366 handle_edge_irq);
367 set_irq_flags(irq, IRQF_VALID); 367 set_irq_flags(irq, IRQF_VALID);
368 } 368 }
369 369
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 437980f72710..23b229bd06e9 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/pm.h> 16#include <linux/pm.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/i2c/pxa-i2c.h>
18#include <linux/irq.h> 19#include <linux/irq.h>
19#include <linux/io.h> 20#include <linux/io.h>
20#include <linux/sysdev.h> 21#include <linux/sysdev.h>
@@ -27,7 +28,6 @@
27#include <mach/pm.h> 28#include <mach/pm.h>
28#include <mach/dma.h> 29#include <mach/dma.h>
29#include <mach/regs-intc.h> 30#include <mach/regs-intc.h>
30#include <plat/i2c.h>
31 31
32#include "generic.h" 32#include "generic.h"
33#include "devices.h" 33#include "devices.h"
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 8361151be054..cd1861351f75 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -32,6 +32,7 @@
32#include <linux/sched.h> 32#include <linux/sched.h>
33#include <linux/pwm_backlight.h> 33#include <linux/pwm_backlight.h>
34#include <linux/i2c.h> 34#include <linux/i2c.h>
35#include <linux/i2c/pxa-i2c.h>
35#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
36#include <linux/spi/spi_gpio.h> 37#include <linux/spi/spi_gpio.h>
37#include <linux/lis3lv02d.h> 38#include <linux/lis3lv02d.h>
@@ -53,7 +54,6 @@
53#include <mach/ohci.h> 54#include <mach/ohci.h>
54#include <mach/pxafb.h> 55#include <mach/pxafb.h>
55#include <mach/mmc.h> 56#include <mach/mmc.h>
56#include <plat/i2c.h>
57#include <plat/pxa3xx_nand.h> 57#include <plat/pxa3xx_nand.h>
58 58
59#include "generic.h" 59#include "generic.h"
@@ -597,7 +597,7 @@ static void __init raumfeld_lcd_init(void)
597{ 597{
598 int ret; 598 int ret;
599 599
600 set_pxa_fb_info(&raumfeld_sharp_lcd_info); 600 pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
601 601
602 /* Earlier devices had the backlight regulator controlled 602 /* Earlier devices had the backlight regulator controlled
603 * via PWM, later versions use another controller for that */ 603 * via PWM, later versions use another controller for that */
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index c1ca8cb467fc..fee97a935122 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/fb.h> 21#include <linux/fb.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/i2c/pxa-i2c.h>
23#include <linux/smc91x.h> 24#include <linux/smc91x.h>
24#include <linux/mfd/da903x.h> 25#include <linux/mfd/da903x.h>
25#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
@@ -31,7 +32,6 @@
31#include <asm/mach/flash.h> 32#include <asm/mach/flash.h>
32 33
33#include <mach/pxa930.h> 34#include <mach/pxa930.h>
34#include <plat/i2c.h>
35#include <mach/pxafb.h> 35#include <mach/pxafb.h>
36 36
37#include "devices.h" 37#include "devices.h"
@@ -473,7 +473,7 @@ static struct pxafb_mach_info saar_lcd_info = {
473 473
474static void __init saar_init_lcd(void) 474static void __init saar_init_lcd(void)
475{ 475{
476 set_pxa_fb_info(&saar_lcd_info); 476 pxa_set_fb_info(NULL, &saar_lcd_info);
477} 477}
478#else 478#else
479static inline void saar_init_lcd(void) {} 479static inline void saar_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index e497922f761a..9322fe527c7f 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/i2c/pxa-i2c.h>
16#include <linux/mfd/88pm860x.h> 17#include <linux/mfd/88pm860x.h>
17 18
18#include <asm/mach-types.h> 19#include <asm/mach-types.h>
@@ -24,8 +25,6 @@
24#include <mach/mfp-pxa930.h> 25#include <mach/mfp-pxa930.h>
25#include <mach/gpio.h> 26#include <mach/gpio.h>
26 27
27#include <plat/i2c.h>
28
29#include "generic.h" 28#include "generic.h"
30 29
31#define SAARB_NR_IRQS (IRQ_BOARD_START + 40) 30#define SAARB_NR_IRQS (IRQ_BOARD_START + 40)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index b49a2c21124c..01c576963e94 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -19,6 +19,7 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/leds.h> 20#include <linux/leds.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/i2c/pxa-i2c.h>
22#include <linux/i2c/pca953x.h> 23#include <linux/i2c/pca953x.h>
23#include <linux/spi/spi.h> 24#include <linux/spi/spi.h>
24#include <linux/spi/ads7846.h> 25#include <linux/spi/ads7846.h>
@@ -47,8 +48,6 @@
47#include <mach/sharpsl_pm.h> 48#include <mach/sharpsl_pm.h>
48#include <mach/smemc.h> 49#include <mach/smemc.h>
49 50
50#include <plat/i2c.h>
51
52#include "generic.h" 51#include "generic.h"
53#include "devices.h" 52#include "devices.h"
54 53
@@ -725,7 +724,7 @@ static struct pxafb_mach_info spitz_pxafb_info = {
725 724
726static void __init spitz_lcd_init(void) 725static void __init spitz_lcd_init(void)
727{ 726{
728 set_pxa_fb_info(&spitz_pxafb_info); 727 pxa_set_fb_info(NULL, &spitz_pxafb_info);
729} 728}
730#else 729#else
731static inline void spitz_lcd_init(void) {} 730static inline void spitz_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 9a14fdb83c82..cb5611daf5fe 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -25,6 +25,7 @@
25#include <linux/mtd/plat-ram.h> 25#include <linux/mtd/plat-ram.h>
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27 27
28#include <linux/i2c/pxa-i2c.h>
28#include <linux/i2c/pcf857x.h> 29#include <linux/i2c/pcf857x.h>
29#include <linux/i2c/at24.h> 30#include <linux/i2c/at24.h>
30#include <linux/smc91x.h> 31#include <linux/smc91x.h>
@@ -43,7 +44,6 @@
43#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
44 45
45#include <mach/pxa27x.h> 46#include <mach/pxa27x.h>
46#include <plat/i2c.h>
47#include <mach/mmc.h> 47#include <mach/mmc.h>
48#include <mach/udc.h> 48#include <mach/udc.h>
49#include <mach/pxa27x-udc.h> 49#include <mach/pxa27x-udc.h>
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 9cecf8366db8..53d4a472b699 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -466,7 +466,7 @@ static void __init tavorevb_init_lcd(void)
466{ 466{
467 platform_device_register(&tavorevb_backlight_devices[0]); 467 platform_device_register(&tavorevb_backlight_devices[0]);
468 platform_device_register(&tavorevb_backlight_devices[1]); 468 platform_device_register(&tavorevb_backlight_devices[1]);
469 set_pxa_fb_info(&tavorevb_lcd_info); 469 pxa_set_fb_info(NULL, &tavorevb_lcd_info);
470} 470}
471#else 471#else
472static inline void tavorevb_init_lcd(void) {} 472static inline void tavorevb_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index 70191a9450eb..79f4422f12f4 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -15,6 +15,7 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/i2c/pxa-i2c.h>
18#include <linux/gpio.h> 19#include <linux/gpio.h>
19#include <linux/mfd/88pm860x.h> 20#include <linux/mfd/88pm860x.h>
20 21
@@ -23,8 +24,6 @@
23 24
24#include <mach/pxa930.h> 25#include <mach/pxa930.h>
25 26
26#include <plat/i2c.h>
27
28#include "devices.h" 27#include "devices.h"
29#include "generic.h" 28#include "generic.h"
30 29
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index e7f64d9b4f2d..428da3ff33a5 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -100,7 +100,6 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
100static struct clock_event_device ckevt_pxa_osmr0 = { 100static struct clock_event_device ckevt_pxa_osmr0 = {
101 .name = "osmr0", 101 .name = "osmr0",
102 .features = CLOCK_EVT_FEAT_ONESHOT, 102 .features = CLOCK_EVT_FEAT_ONESHOT,
103 .shift = 32,
104 .rating = 200, 103 .rating = 200,
105 .set_next_event = pxa_osmr0_set_next_event, 104 .set_next_event = pxa_osmr0_set_next_event,
106 .set_mode = pxa_osmr0_set_mode, 105 .set_mode = pxa_osmr0_set_mode,
@@ -135,8 +134,8 @@ static void __init pxa_timer_init(void)
135 134
136 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); 135 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
137 136
138 ckevt_pxa_osmr0.mult = 137 clocksource_calc_mult_shift(&cksrc_pxa_oscr0, clock_tick_rate, 4);
139 div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); 138 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
140 ckevt_pxa_osmr0.max_delta_ns = 139 ckevt_pxa_osmr0.max_delta_ns =
141 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); 140 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
142 ckevt_pxa_osmr0.min_delta_ns = 141 ckevt_pxa_osmr0.min_delta_ns =
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index f2582ec300d9..5fa145778e7d 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -34,6 +34,8 @@
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/pxa2xx_spi.h> 35#include <linux/spi/pxa2xx_spi.h>
36#include <linux/input/matrix_keypad.h> 36#include <linux/input/matrix_keypad.h>
37#include <linux/i2c/pxa-i2c.h>
38#include <linux/usb/gpio_vbus.h>
37 39
38#include <asm/setup.h> 40#include <asm/setup.h>
39#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -41,7 +43,6 @@
41#include <mach/pxa25x.h> 43#include <mach/pxa25x.h>
42#include <mach/reset.h> 44#include <mach/reset.h>
43#include <mach/irda.h> 45#include <mach/irda.h>
44#include <plat/i2c.h>
45#include <mach/mmc.h> 46#include <mach/mmc.h>
46#include <mach/udc.h> 47#include <mach/udc.h>
47#include <mach/tosa_bt.h> 48#include <mach/tosa_bt.h>
@@ -240,12 +241,20 @@ static struct scoop_pcmcia_config tosa_pcmcia_config = {
240/* 241/*
241 * USB Device Controller 242 * USB Device Controller
242 */ 243 */
243static struct pxa2xx_udc_mach_info udc_info __initdata = { 244static struct gpio_vbus_mach_info tosa_udc_info = {
244 .gpio_pullup = TOSA_GPIO_USB_PULLUP, 245 .gpio_pullup = TOSA_GPIO_USB_PULLUP,
245 .gpio_vbus = TOSA_GPIO_USB_IN, 246 .gpio_vbus = TOSA_GPIO_USB_IN,
246 .gpio_vbus_inverted = 1, 247 .gpio_vbus_inverted = 1,
247}; 248};
248 249
250static struct platform_device tosa_gpio_vbus = {
251 .name = "gpio-vbus",
252 .id = -1,
253 .dev = {
254 .platform_data = &tosa_udc_info,
255 },
256};
257
249/* 258/*
250 * MMC/SD Device 259 * MMC/SD Device
251 */ 260 */
@@ -891,6 +900,7 @@ static struct platform_device *devices[] __initdata = {
891 &tosa_bt_device, 900 &tosa_bt_device,
892 &sharpsl_rom_device, 901 &sharpsl_rom_device,
893 &wm9712_device, 902 &wm9712_device,
903 &tosa_gpio_vbus,
894}; 904};
895 905
896static void tosa_poweroff(void) 906static void tosa_poweroff(void)
@@ -937,7 +947,6 @@ static void __init tosa_init(void)
937 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16); 947 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
938 948
939 pxa_set_mci_info(&tosa_mci_platform_data); 949 pxa_set_mci_info(&tosa_mci_platform_data);
940 pxa_set_udc_info(&udc_info);
941 pxa_set_ficp_info(&tosa_ficp_platform_data); 950 pxa_set_ficp_info(&tosa_ficp_platform_data);
942 pxa_set_i2c_info(NULL); 951 pxa_set_i2c_info(NULL);
943 pxa_set_ac97_info(NULL); 952 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 423261d63d07..b9cfbebdfe9c 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -26,6 +26,7 @@
26#include <linux/dm9000.h> 26#include <linux/dm9000.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29#include <linux/i2c/pxa-i2c.h>
29 30
30#include <asm/types.h> 31#include <asm/types.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
@@ -47,7 +48,6 @@
47#include <mach/irda.h> 48#include <mach/irda.h>
48#include <mach/ohci.h> 49#include <mach/ohci.h>
49#include <mach/smemc.h> 50#include <mach/smemc.h>
50#include <plat/i2c.h>
51 51
52#include "generic.h" 52#include "generic.h"
53#include "devices.h" 53#include "devices.h"
@@ -516,9 +516,9 @@ static void __init trizeps4_init(void)
516 pxa_set_stuart_info(NULL); 516 pxa_set_stuart_info(NULL);
517 517
518 if (0) /* dont know how to determine LCD */ 518 if (0) /* dont know how to determine LCD */
519 set_pxa_fb_info(&sharp_lcd); 519 pxa_set_fb_info(NULL, &sharp_lcd);
520 else 520 else
521 set_pxa_fb_info(&toshiba_lcd); 521 pxa_set_fb_info(NULL, &toshiba_lcd);
522 522
523 pxa_set_mci_info(&trizeps4_mci_platform_data); 523 pxa_set_mci_info(&trizeps4_mci_platform_data);
524#ifndef STATUS_LEDS_ON_STUART_PINS 524#ifndef STATUS_LEDS_ON_STUART_PINS
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 49eeeab23689..b523f119e0f0 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -36,6 +36,7 @@
36#include <linux/gpio.h> 36#include <linux/gpio.h>
37#include <linux/jiffies.h> 37#include <linux/jiffies.h>
38#include <linux/i2c-gpio.h> 38#include <linux/i2c-gpio.h>
39#include <linux/i2c/pxa-i2c.h>
39#include <linux/serial_8250.h> 40#include <linux/serial_8250.h>
40#include <linux/smc91x.h> 41#include <linux/smc91x.h>
41#include <linux/pwm_backlight.h> 42#include <linux/pwm_backlight.h>
@@ -47,7 +48,6 @@
47#include <mach/pxa25x.h> 48#include <mach/pxa25x.h>
48#include <mach/audio.h> 49#include <mach/audio.h>
49#include <mach/pxafb.h> 50#include <mach/pxafb.h>
50#include <plat/i2c.h>
51#include <mach/regs-uart.h> 51#include <mach/regs-uart.h>
52#include <mach/arcom-pcmcia.h> 52#include <mach/arcom-pcmcia.h>
53#include <mach/viper.h> 53#include <mach/viper.h>
@@ -310,14 +310,14 @@ static void __init viper_init_irq(void)
310 /* setup ISA IRQs */ 310 /* setup ISA IRQs */
311 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { 311 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
312 isa_irq = viper_bit_to_irq(level); 312 isa_irq = viper_bit_to_irq(level);
313 set_irq_chip(isa_irq, &viper_irq_chip); 313 irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
314 set_irq_handler(isa_irq, handle_edge_irq); 314 handle_edge_irq);
315 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 315 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
316 } 316 }
317 317
318 set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), 318 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
319 viper_irq_handler); 319 viper_irq_handler);
320 set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); 320 irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
321} 321}
322 322
323/* Flat Panel */ 323/* Flat Panel */
@@ -932,7 +932,7 @@ static void __init viper_init(void)
932 /* Wake-up serial console */ 932 /* Wake-up serial console */
933 viper_init_serial_gpio(); 933 viper_init_serial_gpio();
934 934
935 set_pxa_fb_info(&fb_info); 935 pxa_set_fb_info(NULL, &fb_info);
936 936
937 /* v1 hardware cannot use the datacs line */ 937 /* v1 hardware cannot use the datacs line */
938 version = viper_hw_version(); 938 version = viper_hw_version();
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index b9b579715ff6..f71d377c8640 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -26,6 +26,7 @@
26#include <linux/ucb1400.h> 26#include <linux/ucb1400.h>
27#include <linux/ata_platform.h> 27#include <linux/ata_platform.h>
28#include <linux/regulator/max1586.h> 28#include <linux/regulator/max1586.h>
29#include <linux/i2c/pxa-i2c.h>
29 30
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -40,8 +41,6 @@
40#include <mach/udc.h> 41#include <mach/udc.h>
41#include <mach/pata_pxa.h> 42#include <mach/pata_pxa.h>
42 43
43#include <plat/i2c.h>
44
45#include "generic.h" 44#include "generic.h"
46#include "devices.h" 45#include "devices.h"
47 46
@@ -573,7 +572,7 @@ static void __init vpac270_lcd_init(void)
573 } 572 }
574 573
575 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power; 574 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
576 set_pxa_fb_info(&vpac270_lcd_screen); 575 pxa_set_fb_info(NULL, &vpac270_lcd_screen);
577 return; 576 return;
578 577
579err2: 578err2:
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 51c0281c6e0a..f55f8f2e0db3 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -16,6 +16,7 @@
16 16
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/i2c/pxa-i2c.h>
19#include <linux/smc91x.h> 20#include <linux/smc91x.h>
20#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
21#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
@@ -26,8 +27,6 @@
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28 29
29#include <plat/i2c.h>
30
31#include <mach/hardware.h> 30#include <mach/hardware.h>
32#include <mach/pxa2xx-regs.h> 31#include <mach/pxa2xx-regs.h>
33#include <mach/mfp-pxa25x.h> 32#include <mach/mfp-pxa25x.h>
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index a323e076129e..fbe9e02e2f9f 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -29,6 +29,7 @@
29#include <linux/gpio_keys.h> 29#include <linux/gpio_keys.h>
30#include <linux/delay.h> 30#include <linux/delay.h>
31#include <linux/regulator/machine.h> 31#include <linux/regulator/machine.h>
32#include <linux/i2c/pxa-i2c.h>
32 33
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
@@ -40,8 +41,6 @@
40#include <mach/mmc.h> 41#include <mach/mmc.h>
41#include <plat/pxa27x_keypad.h> 42#include <plat/pxa27x_keypad.h>
42 43
43#include <plat/i2c.h>
44
45#include "generic.h" 44#include "generic.h"
46#include "devices.h" 45#include "devices.h"
47 46
@@ -92,13 +91,13 @@ static unsigned long z2_pin_config[] = {
92 GPIO47_STUART_TXD, 91 GPIO47_STUART_TXD,
93 92
94 /* Keypad */ 93 /* Keypad */
95 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 94 GPIO100_KP_MKIN_0,
96 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, 95 GPIO101_KP_MKIN_1,
97 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, 96 GPIO102_KP_MKIN_2,
98 GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, 97 GPIO34_KP_MKIN_3,
99 GPIO38_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, 98 GPIO38_KP_MKIN_4,
100 GPIO16_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, 99 GPIO16_KP_MKIN_5,
101 GPIO17_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH, 100 GPIO17_KP_MKIN_6,
102 GPIO103_KP_MKOUT_0, 101 GPIO103_KP_MKOUT_0,
103 GPIO104_KP_MKOUT_1, 102 GPIO104_KP_MKOUT_1,
104 GPIO105_KP_MKOUT_2, 103 GPIO105_KP_MKOUT_2,
@@ -139,8 +138,7 @@ static unsigned long z2_pin_config[] = {
139 GPIO1_GPIO, /* Power button */ 138 GPIO1_GPIO, /* Power button */
140 GPIO37_GPIO, /* Headphone detect */ 139 GPIO37_GPIO, /* Headphone detect */
141 GPIO98_GPIO, /* Lid switch */ 140 GPIO98_GPIO, /* Lid switch */
142 GPIO14_GPIO, /* WiFi Reset */ 141 GPIO14_GPIO, /* WiFi Power */
143 GPIO15_GPIO, /* WiFi Power */
144 GPIO24_GPIO, /* WiFi CS */ 142 GPIO24_GPIO, /* WiFi CS */
145 GPIO36_GPIO, /* WiFi IRQ */ 143 GPIO36_GPIO, /* WiFi IRQ */
146 GPIO88_GPIO, /* LCD CS */ 144 GPIO88_GPIO, /* LCD CS */
@@ -205,7 +203,7 @@ static struct platform_pwm_backlight_data z2_backlight_data[] = {
205 /* Keypad Backlight */ 203 /* Keypad Backlight */
206 .pwm_id = 1, 204 .pwm_id = 1,
207 .max_brightness = 1023, 205 .max_brightness = 1023,
208 .dft_brightness = 512, 206 .dft_brightness = 0,
209 .pwm_period_ns = 1260320, 207 .pwm_period_ns = 1260320,
210 }, 208 },
211 [1] = { 209 [1] = {
@@ -272,7 +270,7 @@ static struct pxafb_mach_info z2_lcd_screen = {
272 270
273static void __init z2_lcd_init(void) 271static void __init z2_lcd_init(void)
274{ 272{
275 set_pxa_fb_info(&z2_lcd_screen); 273 pxa_set_fb_info(NULL, &z2_lcd_screen);
276} 274}
277#else 275#else
278static inline void z2_lcd_init(void) {} 276static inline void z2_lcd_init(void) {}
@@ -310,12 +308,12 @@ struct gpio_led z2_gpio_leds[] = {
310 .active_low = 1, 308 .active_low = 1,
311}, { 309}, {
312 .name = "z2:green:charged", 310 .name = "z2:green:charged",
313 .default_trigger = "none", 311 .default_trigger = "mmc0",
314 .gpio = GPIO85_ZIPITZ2_LED_CHARGED, 312 .gpio = GPIO85_ZIPITZ2_LED_CHARGED,
315 .active_low = 1, 313 .active_low = 1,
316}, { 314}, {
317 .name = "z2:amber:charging", 315 .name = "z2:amber:charging",
318 .default_trigger = "none", 316 .default_trigger = "Z2-charging-or-full",
319 .gpio = GPIO83_ZIPITZ2_LED_CHARGING, 317 .gpio = GPIO83_ZIPITZ2_LED_CHARGING,
320 .active_low = 1, 318 .active_low = 1,
321}, 319},
@@ -428,8 +426,22 @@ static inline void z2_mkp_init(void) {}
428 ******************************************************************************/ 426 ******************************************************************************/
429#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 427#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
430static struct gpio_keys_button z2_pxa_buttons[] = { 428static struct gpio_keys_button z2_pxa_buttons[] = {
431 {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" }, 429 {
432 {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" }, 430 .code = KEY_POWER,
431 .gpio = GPIO1_ZIPITZ2_POWER_BUTTON,
432 .active_low = 0,
433 .desc = "Power Button",
434 .wakeup = 1,
435 .type = EV_KEY,
436 },
437 {
438 .code = SW_LID,
439 .gpio = GPIO98_ZIPITZ2_LID_BUTTON,
440 .active_low = 1,
441 .desc = "Lid Switch",
442 .wakeup = 0,
443 .type = EV_SW,
444 },
433}; 445};
434 446
435static struct gpio_keys_platform_data z2_pxa_keys_data = { 447static struct gpio_keys_platform_data z2_pxa_keys_data = {
@@ -462,9 +474,9 @@ static struct z2_battery_info batt_chip_info = {
462 .batt_I2C_addr = 0x55, 474 .batt_I2C_addr = 0x55,
463 .batt_I2C_reg = 2, 475 .batt_I2C_reg = 2,
464 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT, 476 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT,
465 .min_voltage = 2400000, 477 .min_voltage = 3475000,
466 .max_voltage = 3700000, 478 .max_voltage = 4190000,
467 .batt_div = 69, 479 .batt_div = 59,
468 .batt_mult = 1000000, 480 .batt_mult = 1000000,
469 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, 481 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION,
470 .batt_name = "Z2", 482 .batt_name = "Z2",
@@ -498,26 +510,16 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
498{ 510{
499 int ret = 0; 511 int ret = 0;
500 512
501 ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power"); 513 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_POWER, "WiFi Power");
502 if (ret) 514 if (ret)
503 goto err; 515 goto err;
504 516
505 ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1); 517 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_POWER, 1);
506 if (ret) 518 if (ret)
507 goto err2; 519 goto err2;
508 520
509 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset"); 521 /* Wait until card is powered on */
510 if (ret)
511 goto err2;
512
513 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
514 if (ret)
515 goto err3;
516
517 /* Reset the card */
518 mdelay(180); 522 mdelay(180);
519 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
520 mdelay(20);
521 523
522 spi->bits_per_word = 16; 524 spi->bits_per_word = 16;
523 spi->mode = SPI_MODE_2, 525 spi->mode = SPI_MODE_2,
@@ -526,22 +528,18 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
526 528
527 return 0; 529 return 0;
528 530
529err3:
530 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
531err2: 531err2:
532 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER); 532 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
533err: 533err:
534 return ret; 534 return ret;
535}; 535};
536 536
537static int z2_lbs_spi_teardown(struct spi_device *spi) 537static int z2_lbs_spi_teardown(struct spi_device *spi)
538{ 538{
539 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0); 539 gpio_set_value(GPIO14_ZIPITZ2_WIFI_POWER, 0);
540 gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0); 540 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
541 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
542 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
543 return 0;
544 541
542 return 0;
545}; 543};
546 544
547static struct pxa2xx_spi_chip z2_lbs_chip_info = { 545static struct pxa2xx_spi_chip z2_lbs_chip_info = {
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index b92aa3b8c4f7..00363c7ac182 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -25,6 +25,7 @@
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include <linux/i2c/pxa-i2c.h>
28#include <linux/i2c/pca953x.h> 29#include <linux/i2c/pca953x.h>
29#include <linux/apm-emulation.h> 30#include <linux/apm-emulation.h>
30#include <linux/can/platform/mcp251x.h> 31#include <linux/can/platform/mcp251x.h>
@@ -33,8 +34,6 @@
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
35 36
36#include <plat/i2c.h>
37
38#include <mach/pxa2xx-regs.h> 37#include <mach/pxa2xx-regs.h>
39#include <mach/regs-uart.h> 38#include <mach/regs-uart.h>
40#include <mach/ohci.h> 39#include <mach/ohci.h>
@@ -137,22 +136,23 @@ static void __init zeus_init_irq(void)
137 136
138 /* Peripheral IRQs. It would be nice to move those inside driver 137 /* Peripheral IRQs. It would be nice to move those inside driver
139 configuration, but it is not supported at the moment. */ 138 configuration, but it is not supported at the moment. */
140 set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING); 139 irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
141 set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING); 140 irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
142 set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING); 141 irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
143 set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO), IRQ_TYPE_EDGE_FALLING); 142 irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
144 set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING); 143 IRQ_TYPE_EDGE_FALLING);
144 irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
145 145
146 /* Setup ISA IRQs */ 146 /* Setup ISA IRQs */
147 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) { 147 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
148 isa_irq = zeus_bit_to_irq(level); 148 isa_irq = zeus_bit_to_irq(level);
149 set_irq_chip(isa_irq, &zeus_irq_chip); 149 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
150 set_irq_handler(isa_irq, handle_edge_irq); 150 handle_edge_irq);
151 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 151 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
152 } 152 }
153 153
154 set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING); 154 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
155 set_irq_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler); 155 irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
156} 156}
157 157
158 158
@@ -847,7 +847,7 @@ static void __init zeus_init(void)
847 if (zeus_setup_fb_gpios()) 847 if (zeus_setup_fb_gpios())
848 pr_err("Failed to setup fb gpios\n"); 848 pr_err("Failed to setup fb gpios\n");
849 else 849 else
850 set_pxa_fb_info(&zeus_fb_info); 850 pxa_set_fb_info(NULL, &zeus_fb_info);
851 851
852 pxa_set_mci_info(&zeus_mci_platform_data); 852 pxa_set_mci_info(&zeus_mci_platform_data);
853 pxa_set_udc_info(&zeus_udc_info); 853 pxa_set_udc_info(&zeus_udc_info);
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index a4c784aab764..5821185f77ab 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -208,7 +208,7 @@ static void __init zylonite_init_lcd(void)
208 platform_device_register(&zylonite_backlight_device); 208 platform_device_register(&zylonite_backlight_device);
209 209
210 if (lcd_id & 0x20) { 210 if (lcd_id & 0x20) {
211 set_pxa_fb_info(&zylonite_sharp_lcd_info); 211 pxa_set_fb_info(NULL, &zylonite_sharp_lcd_info);
212 return; 212 return;
213 } 213 }
214 214
@@ -220,7 +220,7 @@ static void __init zylonite_init_lcd(void)
220 else 220 else
221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode; 221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode;
222 222
223 set_pxa_fb_info(&zylonite_toshiba_lcd_info); 223 pxa_set_fb_info(NULL, &zylonite_toshiba_lcd_info);
224} 224}
225#else 225#else
226static inline void zylonite_init_lcd(void) {} 226static inline void zylonite_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 3aa73b3e33f2..93c64d8d7de9 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -17,11 +17,11 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/i2c/pxa-i2c.h>
20#include <linux/i2c/pca953x.h> 21#include <linux/i2c/pca953x.h>
21#include <linux/gpio.h> 22#include <linux/gpio.h>
22 23
23#include <mach/pxa300.h> 24#include <mach/pxa300.h>
24#include <plat/i2c.h>
25#include <mach/zylonite.h> 25#include <mach/zylonite.h>
26 26
27#include "generic.h" 27#include "generic.h"
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index a01b76b7c956..541fa4c109ef 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -8,6 +8,5 @@ obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o 9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
10obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o 10obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o 11obj-$(CONFIG_SMP) += platsmp.o
12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
13obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 1c6602cf50e4..75dbc8791d05 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -51,6 +51,7 @@
51#include <mach/irqs.h> 51#include <mach/irqs.h>
52#include <asm/hardware/timer-sp.h> 52#include <asm/hardware/timer-sp.h>
53 53
54#include <plat/clcd.h>
54#include <plat/sched_clock.h> 55#include <plat/sched_clock.h>
55 56
56#include "core.h" 57#include "core.h"
@@ -359,18 +360,19 @@ static struct clk_lookup lookups[] = {
359 } 360 }
360}; 361};
361 362
362static int __init clk_init(void) 363void __init realview_init_early(void)
363{ 364{
365 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
366
364 if (machine_is_realview_pb1176()) 367 if (machine_is_realview_pb1176())
365 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET; 368 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC0_OFFSET;
366 else 369 else
367 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET; 370 oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC4_OFFSET;
368 371
369 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 372 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
370 373
371 return 0; 374 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
372} 375}
373core_initcall(clk_init);
374 376
375/* 377/*
376 * CLCD support. 378 * CLCD support.
@@ -385,157 +387,6 @@ core_initcall(clk_init);
385#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) 387#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
386#define SYS_CLCD_ID_VGA (0x1f << 8) 388#define SYS_CLCD_ID_VGA (0x1f << 8)
387 389
388static struct clcd_panel vga = {
389 .mode = {
390 .name = "VGA",
391 .refresh = 60,
392 .xres = 640,
393 .yres = 480,
394 .pixclock = 39721,
395 .left_margin = 40,
396 .right_margin = 24,
397 .upper_margin = 32,
398 .lower_margin = 11,
399 .hsync_len = 96,
400 .vsync_len = 2,
401 .sync = 0,
402 .vmode = FB_VMODE_NONINTERLACED,
403 },
404 .width = -1,
405 .height = -1,
406 .tim2 = TIM2_BCD | TIM2_IPC,
407 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
408 .bpp = 16,
409};
410
411static struct clcd_panel xvga = {
412 .mode = {
413 .name = "XVGA",
414 .refresh = 60,
415 .xres = 1024,
416 .yres = 768,
417 .pixclock = 15748,
418 .left_margin = 152,
419 .right_margin = 48,
420 .upper_margin = 23,
421 .lower_margin = 3,
422 .hsync_len = 104,
423 .vsync_len = 4,
424 .sync = 0,
425 .vmode = FB_VMODE_NONINTERLACED,
426 },
427 .width = -1,
428 .height = -1,
429 .tim2 = TIM2_BCD | TIM2_IPC,
430 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
431 .bpp = 16,
432};
433
434static struct clcd_panel sanyo_3_8_in = {
435 .mode = {
436 .name = "Sanyo QVGA",
437 .refresh = 116,
438 .xres = 320,
439 .yres = 240,
440 .pixclock = 100000,
441 .left_margin = 6,
442 .right_margin = 6,
443 .upper_margin = 5,
444 .lower_margin = 5,
445 .hsync_len = 6,
446 .vsync_len = 6,
447 .sync = 0,
448 .vmode = FB_VMODE_NONINTERLACED,
449 },
450 .width = -1,
451 .height = -1,
452 .tim2 = TIM2_BCD,
453 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
454 .bpp = 16,
455};
456
457static struct clcd_panel sanyo_2_5_in = {
458 .mode = {
459 .name = "Sanyo QVGA Portrait",
460 .refresh = 116,
461 .xres = 240,
462 .yres = 320,
463 .pixclock = 100000,
464 .left_margin = 20,
465 .right_margin = 10,
466 .upper_margin = 2,
467 .lower_margin = 2,
468 .hsync_len = 10,
469 .vsync_len = 2,
470 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
471 .vmode = FB_VMODE_NONINTERLACED,
472 },
473 .width = -1,
474 .height = -1,
475 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
476 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
477 .bpp = 16,
478};
479
480static struct clcd_panel epson_2_2_in = {
481 .mode = {
482 .name = "Epson QCIF",
483 .refresh = 390,
484 .xres = 176,
485 .yres = 220,
486 .pixclock = 62500,
487 .left_margin = 3,
488 .right_margin = 2,
489 .upper_margin = 1,
490 .lower_margin = 0,
491 .hsync_len = 3,
492 .vsync_len = 2,
493 .sync = 0,
494 .vmode = FB_VMODE_NONINTERLACED,
495 },
496 .width = -1,
497 .height = -1,
498 .tim2 = TIM2_BCD | TIM2_IPC,
499 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
500 .bpp = 16,
501};
502
503/*
504 * Detect which LCD panel is connected, and return the appropriate
505 * clcd_panel structure. Note: we do not have any information on
506 * the required timings for the 8.4in panel, so we presently assume
507 * VGA timings.
508 */
509static struct clcd_panel *realview_clcd_panel(void)
510{
511 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
512 struct clcd_panel *vga_panel;
513 struct clcd_panel *panel;
514 u32 val;
515
516 if (machine_is_realview_eb())
517 vga_panel = &vga;
518 else
519 vga_panel = &xvga;
520
521 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
522 if (val == SYS_CLCD_ID_SANYO_3_8)
523 panel = &sanyo_3_8_in;
524 else if (val == SYS_CLCD_ID_SANYO_2_5)
525 panel = &sanyo_2_5_in;
526 else if (val == SYS_CLCD_ID_EPSON_2_2)
527 panel = &epson_2_2_in;
528 else if (val == SYS_CLCD_ID_VGA)
529 panel = vga_panel;
530 else {
531 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
532 val);
533 panel = vga_panel;
534 }
535
536 return panel;
537}
538
539/* 390/*
540 * Disable all display connectors on the interface module. 391 * Disable all display connectors on the interface module.
541 */ 392 */
@@ -565,56 +416,60 @@ static void realview_clcd_enable(struct clcd_fb *fb)
565 writel(val, sys_clcd); 416 writel(val, sys_clcd);
566} 417}
567 418
419/*
420 * Detect which LCD panel is connected, and return the appropriate
421 * clcd_panel structure. Note: we do not have any information on
422 * the required timings for the 8.4in panel, so we presently assume
423 * VGA timings.
424 */
568static int realview_clcd_setup(struct clcd_fb *fb) 425static int realview_clcd_setup(struct clcd_fb *fb)
569{ 426{
427 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
428 const char *panel_name, *vga_panel_name;
570 unsigned long framesize; 429 unsigned long framesize;
571 dma_addr_t dma; 430 u32 val;
572 431
573 if (machine_is_realview_eb()) 432 if (machine_is_realview_eb()) {
574 /* VGA, 16bpp */ 433 /* VGA, 16bpp */
575 framesize = 640 * 480 * 2; 434 framesize = 640 * 480 * 2;
576 else 435 vga_panel_name = "VGA";
436 } else {
577 /* XVGA, 16bpp */ 437 /* XVGA, 16bpp */
578 framesize = 1024 * 768 * 2; 438 framesize = 1024 * 768 * 2;
579 439 vga_panel_name = "XVGA";
580 fb->panel = realview_clcd_panel();
581
582 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
583 &dma, GFP_KERNEL | GFP_DMA);
584 if (!fb->fb.screen_base) {
585 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
586 return -ENOMEM;
587 } 440 }
588 441
589 fb->fb.fix.smem_start = dma; 442 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
590 fb->fb.fix.smem_len = framesize; 443 if (val == SYS_CLCD_ID_SANYO_3_8)
591 444 panel_name = "Sanyo TM38QV67A02A";
592 return 0; 445 else if (val == SYS_CLCD_ID_SANYO_2_5)
593} 446 panel_name = "Sanyo QVGA Portrait";
447 else if (val == SYS_CLCD_ID_EPSON_2_2)
448 panel_name = "Epson L2F50113T00";
449 else if (val == SYS_CLCD_ID_VGA)
450 panel_name = vga_panel_name;
451 else {
452 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
453 panel_name = vga_panel_name;
454 }
594 455
595static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) 456 fb->panel = versatile_clcd_get_panel(panel_name);
596{ 457 if (!fb->panel)
597 return dma_mmap_writecombine(&fb->dev->dev, vma, 458 return -EINVAL;
598 fb->fb.screen_base,
599 fb->fb.fix.smem_start,
600 fb->fb.fix.smem_len);
601}
602 459
603static void realview_clcd_remove(struct clcd_fb *fb) 460 return versatile_clcd_setup_dma(fb, framesize);
604{
605 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
606 fb->fb.screen_base, fb->fb.fix.smem_start);
607} 461}
608 462
609struct clcd_board clcd_plat_data = { 463struct clcd_board clcd_plat_data = {
610 .name = "RealView", 464 .name = "RealView",
465 .caps = CLCD_CAP_ALL,
611 .check = clcdfb_check, 466 .check = clcdfb_check,
612 .decode = clcdfb_decode, 467 .decode = clcdfb_decode,
613 .disable = realview_clcd_disable, 468 .disable = realview_clcd_disable,
614 .enable = realview_clcd_enable, 469 .enable = realview_clcd_enable,
615 .setup = realview_clcd_setup, 470 .setup = realview_clcd_setup,
616 .mmap = realview_clcd_mmap, 471 .mmap = versatile_clcd_mmap_dma,
617 .remove = realview_clcd_remove, 472 .remove = versatile_clcd_remove_dma,
618}; 473};
619 474
620#ifdef CONFIG_LEDS 475#ifdef CONFIG_LEDS
@@ -656,12 +511,6 @@ void realview_leds_event(led_event_t ledevt)
656#endif /* CONFIG_LEDS */ 511#endif /* CONFIG_LEDS */
657 512
658/* 513/*
659 * The sched_clock counter
660 */
661#define REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + \
662 REALVIEW_SYS_24MHz_OFFSET)
663
664/*
665 * Where is the timer (VA)? 514 * Where is the timer (VA)?
666 */ 515 */
667void __iomem *timer0_va_base; 516void __iomem *timer0_va_base;
@@ -676,8 +525,6 @@ void __init realview_timer_init(unsigned int timer_irq)
676{ 525{
677 u32 val; 526 u32 val;
678 527
679 versatile_sched_clock_init(REFCOUNTER, 24000000);
680
681 /* 528 /*
682 * set clock frequency: 529 * set clock frequency:
683 * REALVIEW_REFCLK is 32KHz 530 * REALVIEW_REFCLK is 32KHz
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 693239ddc39e..5c83d1e87a03 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -42,7 +42,6 @@ static struct amba_device name##_device = { \
42 }, \ 42 }, \
43 .dma_mask = ~0, \ 43 .dma_mask = ~0, \
44 .irq = base##_IRQ, \ 44 .irq = base##_IRQ, \
45 /* .dma = base##_DMA,*/ \
46} 45}
47 46
48struct machine_desc; 47struct machine_desc;
@@ -63,6 +62,7 @@ extern void realview_timer_init(unsigned int timer_irq);
63extern int realview_flash_register(struct resource *res, u32 num); 62extern int realview_flash_register(struct resource *res, u32 num);
64extern int realview_eth_register(const char *name, struct resource *res); 63extern int realview_eth_register(const char *name, struct resource *res);
65extern int realview_usb_register(struct resource *res); 64extern int realview_usb_register(struct resource *res);
65extern void realview_init_early(void);
66extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags, 66extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags,
67 char **from, struct meminfo *meminfo); 67 char **from, struct meminfo *meminfo);
68extern void (*realview_reset)(char); 68extern void (*realview_reset)(char);
diff --git a/arch/arm/mach-realview/headsmp.S b/arch/arm/mach-realview/headsmp.S
deleted file mode 100644
index b34be4554d40..000000000000
--- a/arch/arm/mach-realview/headsmp.S
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * linux/arch/arm/mach-realview/headsmp.S
3 *
4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13
14 __INIT
15
16/*
17 * Realview specific entry point for secondary CPUs. This provides
18 * a "holding pen" into which all secondary cores are held until we're
19 * ready for them to initialise.
20 */
21ENTRY(realview_secondary_startup)
22 mrc p15, 0, r0, c0, c0, 5
23 and r0, r0, #15
24 adr r4, 1f
25 ldmia r4, {r5, r6}
26 sub r4, r4, r5
27 add r6, r6, r4
28pen: ldr r7, [r6]
29 cmp r7, r0
30 bne pen
31
32 /*
33 * we've been released from the holding pen: secondary_stack
34 * should now contain the SVC stack for this core
35 */
36 b secondary_startup
37
38 .align
391: .long .
40 .long pen_release
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
deleted file mode 100644
index 60b4e111f459..000000000000
--- a/arch/arm/mach-realview/localtimer.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/arch/arm/mach-realview/localtimer.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/smp.h>
13#include <linux/clockchips.h>
14
15#include <asm/irq.h>
16#include <asm/smp_twd.h>
17#include <asm/localtimer.h>
18
19/*
20 * Setup the local clock events for a CPU.
21 */
22void __cpuinit local_timer_setup(struct clock_event_device *evt)
23{
24 evt->irq = IRQ_LOCALTIMER;
25 twd_timer_setup(evt);
26}
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 6959d13d908a..23919229e12d 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -10,44 +10,21 @@
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h> 13#include <linux/smp.h>
17#include <linux/io.h> 14#include <linux/io.h>
18 15
19#include <asm/cacheflush.h>
20#include <mach/hardware.h> 16#include <mach/hardware.h>
21#include <asm/mach-types.h> 17#include <asm/mach-types.h>
18#include <asm/smp_scu.h>
22#include <asm/unified.h> 19#include <asm/unified.h>
23 20
24#include <mach/board-eb.h> 21#include <mach/board-eb.h>
25#include <mach/board-pb11mp.h> 22#include <mach/board-pb11mp.h>
26#include <mach/board-pbx.h> 23#include <mach/board-pbx.h>
27#include <asm/smp_scu.h>
28 24
29#include "core.h" 25#include "core.h"
30 26
31extern void realview_secondary_startup(void); 27extern void versatile_secondary_startup(void);
32
33/*
34 * control for which core is the next to come out of the secondary
35 * boot "holding pen"
36 */
37volatile int __cpuinitdata pen_release = -1;
38
39/*
40 * Write pen_release in a way that is guaranteed to be visible to all
41 * observers, irrespective of whether they're taking part in coherency
42 * or not. This is necessary for the hotplug code to work reliably.
43 */
44static void __cpuinit write_pen_release(int val)
45{
46 pen_release = val;
47 smp_wmb();
48 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
49 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
50}
51 28
52static void __iomem *scu_base_addr(void) 29static void __iomem *scu_base_addr(void)
53{ 30{
@@ -62,75 +39,6 @@ static void __iomem *scu_base_addr(void)
62 return (void __iomem *)0; 39 return (void __iomem *)0;
63} 40}
64 41
65static DEFINE_SPINLOCK(boot_lock);
66
67void __cpuinit platform_secondary_init(unsigned int cpu)
68{
69 /*
70 * if any interrupts are already enabled for the primary
71 * core (e.g. timer irq), then they will not have been enabled
72 * for us: do so
73 */
74 gic_secondary_init(0);
75
76 /*
77 * let the primary processor know we're out of the
78 * pen, then head off into the C entry point
79 */
80 write_pen_release(-1);
81
82 /*
83 * Synchronise with the boot thread.
84 */
85 spin_lock(&boot_lock);
86 spin_unlock(&boot_lock);
87}
88
89int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
90{
91 unsigned long timeout;
92
93 /*
94 * set synchronisation state between this boot processor
95 * and the secondary one
96 */
97 spin_lock(&boot_lock);
98
99 /*
100 * The secondary processor is waiting to be released from
101 * the holding pen - release it, then wait for it to flag
102 * that it has been released by resetting pen_release.
103 *
104 * Note that "pen_release" is the hardware CPU ID, whereas
105 * "cpu" is Linux's internal ID.
106 */
107 write_pen_release(cpu);
108
109 /*
110 * Send the secondary CPU a soft interrupt, thereby causing
111 * the boot monitor to read the system wide flags register,
112 * and branch to the address found there.
113 */
114 smp_cross_call(cpumask_of(cpu), 1);
115
116 timeout = jiffies + (1 * HZ);
117 while (time_before(jiffies, timeout)) {
118 smp_rmb();
119 if (pen_release == -1)
120 break;
121
122 udelay(10);
123 }
124
125 /*
126 * now the secondary core is starting up let it run its
127 * calibrations, then wait for it to finish
128 */
129 spin_unlock(&boot_lock);
130
131 return pen_release != -1 ? -ENOSYS : 0;
132}
133
134/* 42/*
135 * Initialise the CPU possible map early - this describes the CPUs 43 * Initialise the CPU possible map early - this describes the CPUs
136 * which may be present or become present in the system. 44 * which may be present or become present in the system.
@@ -174,6 +82,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
174 * until it receives a soft interrupt, and then the 82 * until it receives a soft interrupt, and then the
175 * secondary CPU branches to this address. 83 * secondary CPU branches to this address.
176 */ 84 */
177 __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)), 85 __raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)),
178 __io_address(REALVIEW_SYS_FLAGSSET)); 86 __io_address(REALVIEW_SYS_FLAGSSET));
179} 87}
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 8ede983b861c..10e75faba4c9 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -144,60 +144,39 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * These devices are connected via the core APB bridge 144 * These devices are connected via the core APB bridge
145 */ 145 */
146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
147#define GPIO2_DMA { 0, 0 }
148#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 147#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
149#define GPIO3_DMA { 0, 0 }
150 148
151#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
152#define AACI_DMA { 0x80, 0x81 }
153#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 150#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
154#define MMCI0_DMA { 0x84, 0 }
155#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
156#define KMI0_DMA { 0, 0 }
157#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
158#define KMI1_DMA { 0, 0 }
159 153
160/* 154/*
161 * These devices are connected directly to the multi-layer AHB switch 155 * These devices are connected directly to the multi-layer AHB switch
162 */ 156 */
163#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 157#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
164#define EB_SMC_DMA { 0, 0 }
165#define MPMC_IRQ { NO_IRQ, NO_IRQ } 158#define MPMC_IRQ { NO_IRQ, NO_IRQ }
166#define MPMC_DMA { 0, 0 }
167#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 159#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
168#define EB_CLCD_DMA { 0, 0 }
169#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 160#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
170#define DMAC_DMA { 0, 0 }
171 161
172/* 162/*
173 * These devices are connected via the core APB bridge 163 * These devices are connected via the core APB bridge
174 */ 164 */
175#define SCTL_IRQ { NO_IRQ, NO_IRQ } 165#define SCTL_IRQ { NO_IRQ, NO_IRQ }
176#define SCTL_DMA { 0, 0 }
177#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 166#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
178#define EB_WATCHDOG_DMA { 0, 0 }
179#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 167#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
180#define EB_GPIO0_DMA { 0, 0 }
181#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 168#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
182#define GPIO1_DMA { 0, 0 }
183#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 169#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
184#define EB_RTC_DMA { 0, 0 }
185 170
186/* 171/*
187 * These devices are connected via the DMA APB bridge 172 * These devices are connected via the DMA APB bridge
188 */ 173 */
189#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 174#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
190#define SCI_DMA { 7, 6 }
191#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 175#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
192#define EB_UART0_DMA { 15, 14 }
193#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 176#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
194#define EB_UART1_DMA { 13, 12 }
195#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 177#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
196#define EB_UART2_DMA { 11, 10 }
197#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 178#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
198#define EB_UART3_DMA { 0x86, 0x87 }
199#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 179#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
200#define EB_SSP_DMA { 9, 8 }
201 180
202/* FPGA Primecells */ 181/* FPGA Primecells */
203AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 182AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -369,7 +348,7 @@ static void __init gic_init_irq(void)
369 348
370#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB 349#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
371 /* board GIC, secondary */ 350 /* board GIC, secondary */
372 gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE), 351 gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
373 __io_address(REALVIEW_EB_GIC_CPU_BASE)); 352 __io_address(REALVIEW_EB_GIC_CPU_BASE));
374 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); 353 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
375#endif 354#endif
@@ -487,6 +466,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
487 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 466 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
488 .fixup = realview_fixup, 467 .fixup = realview_fixup,
489 .map_io = realview_eb_map_io, 468 .map_io = realview_eb_map_io,
469 .init_early = realview_init_early,
490 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
491 .timer = &realview_eb_timer, 471 .timer = &realview_eb_timer,
492 .init_machine = realview_eb_init, 472 .init_machine = realview_eb_init,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 9f26369555c7..eab6070f66d0 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -134,47 +134,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
134 * RealView PB1176 AMBA devices 134 * RealView PB1176 AMBA devices
135 */ 135 */
136#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } 136#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
137#define GPIO2_DMA { 0, 0 }
138#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } 137#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
139#define GPIO3_DMA { 0, 0 }
140#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } 138#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
141#define AACI_DMA { 0x80, 0x81 }
142#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } 139#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
143#define MMCI0_DMA { 0x84, 0 }
144#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } 140#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
145#define KMI0_DMA { 0, 0 }
146#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } 141#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
147#define KMI1_DMA { 0, 0 }
148#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } 142#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
149#define PB1176_SMC_DMA { 0, 0 }
150#define MPMC_IRQ { NO_IRQ, NO_IRQ } 143#define MPMC_IRQ { NO_IRQ, NO_IRQ }
151#define MPMC_DMA { 0, 0 }
152#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } 144#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
153#define PB1176_CLCD_DMA { 0, 0 }
154#define SCTL_IRQ { NO_IRQ, NO_IRQ } 145#define SCTL_IRQ { NO_IRQ, NO_IRQ }
155#define SCTL_DMA { 0, 0 }
156#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } 146#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
157#define PB1176_WATCHDOG_DMA { 0, 0 }
158#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } 147#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
159#define PB1176_GPIO0_DMA { 0, 0 }
160#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } 148#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
161#define GPIO1_DMA { 0, 0 }
162#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } 149#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
163#define PB1176_RTC_DMA { 0, 0 }
164#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } 150#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
165#define SCI_DMA { 7, 6 }
166#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } 151#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
167#define PB1176_UART0_DMA { 15, 14 }
168#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } 152#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
169#define PB1176_UART1_DMA { 13, 12 }
170#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } 153#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
171#define PB1176_UART2_DMA { 11, 10 }
172#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } 154#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
173#define PB1176_UART3_DMA { 0x86, 0x87 }
174#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } 155#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ }
175#define PB1176_UART4_DMA { 0, 0 }
176#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } 156#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ }
177#define PB1176_SSP_DMA { 9, 8 }
178 157
179/* FPGA Primecells */ 158/* FPGA Primecells */
180AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 159AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -382,6 +361,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
382 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 361 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
383 .fixup = realview_pb1176_fixup, 362 .fixup = realview_pb1176_fixup,
384 .map_io = realview_pb1176_map_io, 363 .map_io = realview_pb1176_map_io,
364 .init_early = realview_init_early,
385 .init_irq = gic_init_irq, 365 .init_irq = gic_init_irq,
386 .timer = &realview_pb1176_timer, 366 .timer = &realview_pb1176_timer,
387 .init_machine = realview_pb1176_init, 367 .init_machine = realview_pb1176_init,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index dea06b2da3a2..b2985fc7cd4e 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -136,47 +136,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
136 */ 136 */
137 137
138#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } 138#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
139#define GPIO2_DMA { 0, 0 }
140#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } 139#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
141#define GPIO3_DMA { 0, 0 }
142#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } 140#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
143#define AACI_DMA { 0x80, 0x81 }
144#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } 141#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
145#define MMCI0_DMA { 0x84, 0 }
146#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } 142#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
147#define KMI0_DMA { 0, 0 }
148#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } 143#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
149#define KMI1_DMA { 0, 0 }
150#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } 144#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
151#define PB11MP_SMC_DMA { 0, 0 }
152#define MPMC_IRQ { NO_IRQ, NO_IRQ } 145#define MPMC_IRQ { NO_IRQ, NO_IRQ }
153#define MPMC_DMA { 0, 0 }
154#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } 146#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
155#define PB11MP_CLCD_DMA { 0, 0 }
156#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } 147#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
157#define DMAC_DMA { 0, 0 }
158#define SCTL_IRQ { NO_IRQ, NO_IRQ } 148#define SCTL_IRQ { NO_IRQ, NO_IRQ }
159#define SCTL_DMA { 0, 0 }
160#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } 149#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
161#define PB11MP_WATCHDOG_DMA { 0, 0 }
162#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } 150#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
163#define PB11MP_GPIO0_DMA { 0, 0 }
164#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } 151#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
165#define GPIO1_DMA { 0, 0 }
166#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } 152#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
167#define PB11MP_RTC_DMA { 0, 0 }
168#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } 153#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
169#define SCI_DMA { 7, 6 }
170#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } 154#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
171#define PB11MP_UART0_DMA { 15, 14 }
172#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } 155#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
173#define PB11MP_UART1_DMA { 13, 12 }
174#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } 156#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
175#define PB11MP_UART2_DMA { 11, 10 }
176#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } 157#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
177#define PB11MP_UART3_DMA { 0x86, 0x87 }
178#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } 158#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
179#define PB11MP_SSP_DMA { 9, 8 }
180 159
181/* FPGA Primecells */ 160/* FPGA Primecells */
182AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 161AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -384,6 +363,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
384 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 363 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
385 .fixup = realview_fixup, 364 .fixup = realview_fixup,
386 .map_io = realview_pb11mp_map_io, 365 .map_io = realview_pb11mp_map_io,
366 .init_early = realview_init_early,
387 .init_irq = gic_init_irq, 367 .init_irq = gic_init_irq,
388 .timer = &realview_pb11mp_timer, 368 .timer = &realview_pb11mp_timer,
389 .init_machine = realview_pb11mp_init, 369 .init_machine = realview_pb11mp_init,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 7d0f1734a217..fb6866558760 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -126,47 +126,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
126 */ 126 */
127 127
128#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 128#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
129#define GPIO2_DMA { 0, 0 }
130#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 129#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
131#define GPIO3_DMA { 0, 0 }
132#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 130#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
133#define AACI_DMA { 0x80, 0x81 }
134#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 131#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
135#define MMCI0_DMA { 0x84, 0 }
136#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 132#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
137#define KMI0_DMA { 0, 0 }
138#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 133#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
139#define KMI1_DMA { 0, 0 }
140#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 134#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
141#define PBA8_SMC_DMA { 0, 0 }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 135#define MPMC_IRQ { NO_IRQ, NO_IRQ }
143#define MPMC_DMA { 0, 0 }
144#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 136#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
145#define PBA8_CLCD_DMA { 0, 0 }
146#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 137#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
147#define DMAC_DMA { 0, 0 }
148#define SCTL_IRQ { NO_IRQ, NO_IRQ } 138#define SCTL_IRQ { NO_IRQ, NO_IRQ }
149#define SCTL_DMA { 0, 0 }
150#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 139#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
151#define PBA8_WATCHDOG_DMA { 0, 0 }
152#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 140#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
153#define PBA8_GPIO0_DMA { 0, 0 }
154#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 141#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
155#define GPIO1_DMA { 0, 0 }
156#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 142#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
157#define PBA8_RTC_DMA { 0, 0 }
158#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 143#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
159#define SCI_DMA { 7, 6 }
160#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 144#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
161#define PBA8_UART0_DMA { 15, 14 }
162#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 145#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
163#define PBA8_UART1_DMA { 13, 12 }
164#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 146#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
165#define PBA8_UART2_DMA { 11, 10 }
166#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 147#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
167#define PBA8_UART3_DMA { 0x86, 0x87 }
168#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 148#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
169#define PBA8_SSP_DMA { 9, 8 }
170 149
171/* FPGA Primecells */ 150/* FPGA Primecells */
172AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 151AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -334,6 +313,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
334 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 313 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
335 .fixup = realview_fixup, 314 .fixup = realview_fixup,
336 .map_io = realview_pba8_map_io, 315 .map_io = realview_pba8_map_io,
316 .init_early = realview_init_early,
337 .init_irq = gic_init_irq, 317 .init_irq = gic_init_irq,
338 .timer = &realview_pba8_timer, 318 .timer = &realview_pba8_timer,
339 .init_machine = realview_pba8_init, 319 .init_machine = realview_pba8_init,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index b89e28f8853e..92ace2cf2b2c 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -148,47 +148,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
148 */ 148 */
149 149
150#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } 150#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ }
151#define GPIO2_DMA { 0, 0 }
152#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } 151#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ }
153#define GPIO3_DMA { 0, 0 }
154#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } 152#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ }
155#define AACI_DMA { 0x80, 0x81 }
156#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } 153#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
157#define MMCI0_DMA { 0x84, 0 }
158#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } 154#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ }
159#define KMI0_DMA { 0, 0 }
160#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } 155#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ }
161#define KMI1_DMA { 0, 0 }
162#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } 156#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ }
163#define PBX_SMC_DMA { 0, 0 }
164#define MPMC_IRQ { NO_IRQ, NO_IRQ } 157#define MPMC_IRQ { NO_IRQ, NO_IRQ }
165#define MPMC_DMA { 0, 0 }
166#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } 158#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ }
167#define PBX_CLCD_DMA { 0, 0 }
168#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } 159#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ }
169#define DMAC_DMA { 0, 0 }
170#define SCTL_IRQ { NO_IRQ, NO_IRQ } 160#define SCTL_IRQ { NO_IRQ, NO_IRQ }
171#define SCTL_DMA { 0, 0 }
172#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } 161#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ }
173#define PBX_WATCHDOG_DMA { 0, 0 }
174#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } 162#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ }
175#define PBX_GPIO0_DMA { 0, 0 }
176#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } 163#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ }
177#define GPIO1_DMA { 0, 0 }
178#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } 164#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ }
179#define PBX_RTC_DMA { 0, 0 }
180#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } 165#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ }
181#define SCI_DMA { 7, 6 }
182#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } 166#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ }
183#define PBX_UART0_DMA { 15, 14 }
184#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } 167#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ }
185#define PBX_UART1_DMA { 13, 12 }
186#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } 168#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ }
187#define PBX_UART2_DMA { 11, 10 }
188#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } 169#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ }
189#define PBX_UART3_DMA { 0x86, 0x87 }
190#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } 170#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ }
191#define PBX_SSP_DMA { 9, 8 }
192 171
193/* FPGA Primecells */ 172/* FPGA Primecells */
194AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 173AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -417,6 +396,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
417 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 396 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
418 .fixup = realview_pbx_fixup, 397 .fixup = realview_pbx_fixup,
419 .map_io = realview_pbx_map_io, 398 .map_io = realview_pbx_map_io,
399 .init_early = realview_init_early,
420 .init_irq = gic_init_irq, 400 .init_irq = gic_init_irq,
421 .timer = &realview_pbx_timer, 401 .timer = &realview_pbx_timer,
422 .init_machine = realview_pbx_init, 402 .init_machine = realview_pbx_init,
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index d29cd9b737fc..2e1b5309fbab 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -133,25 +133,25 @@ void __init rpc_init_irq(void)
133 133
134 switch (irq) { 134 switch (irq) {
135 case 0 ... 7: 135 case 0 ... 7:
136 set_irq_chip(irq, &iomd_a_chip); 136 irq_set_chip_and_handler(irq, &iomd_a_chip,
137 set_irq_handler(irq, handle_level_irq); 137 handle_level_irq);
138 set_irq_flags(irq, flags); 138 set_irq_flags(irq, flags);
139 break; 139 break;
140 140
141 case 8 ... 15: 141 case 8 ... 15:
142 set_irq_chip(irq, &iomd_b_chip); 142 irq_set_chip_and_handler(irq, &iomd_b_chip,
143 set_irq_handler(irq, handle_level_irq); 143 handle_level_irq);
144 set_irq_flags(irq, flags); 144 set_irq_flags(irq, flags);
145 break; 145 break;
146 146
147 case 16 ... 21: 147 case 16 ... 21:
148 set_irq_chip(irq, &iomd_dma_chip); 148 irq_set_chip_and_handler(irq, &iomd_dma_chip,
149 set_irq_handler(irq, handle_level_irq); 149 handle_level_irq);
150 set_irq_flags(irq, flags); 150 set_irq_flags(irq, flags);
151 break; 151 break;
152 152
153 case 64 ... 71: 153 case 64 ... 71:
154 set_irq_chip(irq, &iomd_fiq_chip); 154 irq_set_chip(irq, &iomd_fiq_chip);
155 set_irq_flags(irq, IRQF_VALID); 155 set_irq_flags(irq, IRQF_VALID);
156 break; 156 break;
157 } 157 }
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 606cb6b1cc47..bc53d2d16d1a 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -147,15 +147,15 @@ static __init int bast_irq_init(void)
147 147
148 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); 148 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
149 149
150 set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux); 150 irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux);
151 151
152 /* register our IRQs */ 152 /* register our IRQs */
153 153
154 for (i = 0; i < 4; i++) { 154 for (i = 0; i < 4; i++) {
155 unsigned int irqno = bast_pc104_irqs[i]; 155 unsigned int irqno = bast_pc104_irqs[i];
156 156
157 set_irq_chip(irqno, &bast_pc104_chip); 157 irq_set_chip_and_handler(irqno, &bast_pc104_chip,
158 set_irq_handler(irqno, handle_level_irq); 158 handle_level_irq);
159 set_irq_flags(irqno, IRQF_VALID); 159 set_irq_flags(irqno, IRQF_VALID);
160 } 160 }
161 } 161 }
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
index 6b86a722a7db..2c126bbca08d 100644
--- a/arch/arm/mach-s3c2410/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -18,12 +18,14 @@
18#include <linux/leds.h> 18#include <linux/leds.h>
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/rfkill.h> 20#include <linux/rfkill.h>
21#include <linux/leds.h>
21 22
22#include <mach/regs-gpio.h> 23#include <mach/regs-gpio.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <mach/h1940-latch.h> 25#include <mach/h1940-latch.h>
26#include <mach/h1940.h>
25 27
26#define DRV_NAME "h1940-bt" 28#define DRV_NAME "h1940-bt"
27 29
28/* Bluetooth control */ 30/* Bluetooth control */
29static void h1940bt_enable(int on) 31static void h1940bt_enable(int on)
@@ -37,6 +39,8 @@ static void h1940bt_enable(int on)
37 gpio_set_value(S3C2410_GPH(1), 1); 39 gpio_set_value(S3C2410_GPH(1), 1);
38 mdelay(10); 40 mdelay(10);
39 gpio_set_value(S3C2410_GPH(1), 0); 41 gpio_set_value(S3C2410_GPH(1), 0);
42
43 h1940_led_blink_set(-EINVAL, GPIO_LED_BLINK, NULL, NULL);
40 } 44 }
41 else { 45 else {
42 gpio_set_value(S3C2410_GPH(1), 1); 46 gpio_set_value(S3C2410_GPH(1), 1);
@@ -44,6 +48,8 @@ static void h1940bt_enable(int on)
44 gpio_set_value(S3C2410_GPH(1), 0); 48 gpio_set_value(S3C2410_GPH(1), 0);
45 mdelay(10); 49 mdelay(10);
46 gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0); 50 gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0);
51
52 h1940_led_blink_set(-EINVAL, GPIO_LED_NO_BLINK_LOW, NULL, NULL);
47 } 53 }
48} 54}
49 55
@@ -85,7 +91,6 @@ static int __devinit h1940bt_probe(struct platform_device *pdev)
85 s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); 91 s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0);
86 s3c_gpio_setpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); 92 s3c_gpio_setpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE);
87 93
88
89 rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, 94 rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH,
90 &h1940bt_rfkill_ops, NULL); 95 &h1940bt_rfkill_ops, NULL);
91 if (!rfk) { 96 if (!rfk) {
@@ -93,8 +98,6 @@ static int __devinit h1940bt_probe(struct platform_device *pdev)
93 goto err_rfk_alloc; 98 goto err_rfk_alloc;
94 } 99 }
95 100
96 rfkill_set_led_trigger_name(rfk, "h1940-bluetooth");
97
98 ret = rfkill_register(rfk); 101 ret = rfkill_register(rfk);
99 if (ret) 102 if (ret)
100 goto err_rfkill; 103 goto err_rfkill;
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index cf68136cc668..b2b2a5bb275e 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -19,7 +19,7 @@
19#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ 19#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
20 20
21/* We use `virtual` dma channels to hide the fact we have only a limited 21/* We use `virtual` dma channels to hide the fact we have only a limited
22 * number of DMA channels, and not of all of them (dependant on the device) 22 * number of DMA channels, and not of all of them (dependent on the device)
23 * can be attached to any DMA source. We therefore let the DMA core handle 23 * can be attached to any DMA source. We therefore let the DMA core handle
24 * the allocation of hardware channels to clients. 24 * the allocation of hardware channels to clients.
25*/ 25*/
diff --git a/arch/arm/mach-s3c2410/include/mach/h1940.h b/arch/arm/mach-s3c2410/include/mach/h1940.h
index 4559784129c0..2aa683c8d3d6 100644
--- a/arch/arm/mach-s3c2410/include/mach/h1940.h
+++ b/arch/arm/mach-s3c2410/include/mach/h1940.h
@@ -17,5 +17,8 @@
17#define H1940_SUSPEND_CHECK (0x30080000) 17#define H1940_SUSPEND_CHECK (0x30080000)
18 18
19extern void h1940_pm_return(void); 19extern void h1940_pm_return(void);
20extern int h1940_led_blink_set(unsigned gpio, int state,
21 unsigned long *delay_on, unsigned long *delay_off);
22
20 23
21#endif /* __ASM_ARCH_H1940_H */ 24#endif /* __ASM_ARCH_H1940_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
index 7f7c52947963..988a6863e54b 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
@@ -101,7 +101,7 @@
101#define S3C2410_BANKCON_PMC16 (0x03) 101#define S3C2410_BANKCON_PMC16 (0x03)
102 102
103/* bank configurations for banks 0..7, note banks 103/* bank configurations for banks 0..7, note banks
104 * 6 and 7 have differnt configurations depending on 104 * 6 and 7 have different configurations depending on
105 * the memory type bits */ 105 * the memory type bits */
106 106
107#define S3C2410_BANKCON_Tacp2 (0x0 << 2) 107#define S3C2410_BANKCON_Tacp2 (0x0 << 2)
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 1e93f176c1de..2a2fa0620133 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -23,8 +23,15 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/input.h>
27#include <linux/gpio_keys.h>
26#include <linux/pwm_backlight.h> 28#include <linux/pwm_backlight.h>
27#include <linux/i2c.h> 29#include <linux/i2c.h>
30#include <linux/leds.h>
31#include <linux/pda_power.h>
32#include <linux/s3c_adc_battery.h>
33#include <linux/delay.h>
34
28#include <video/platform_lcd.h> 35#include <video/platform_lcd.h>
29 36
30#include <linux/mmc/host.h> 37#include <linux/mmc/host.h>
@@ -203,20 +210,239 @@ static struct s3c2410fb_mach_info h1940_fb_info __initdata = {
203 .num_displays = 1, 210 .num_displays = 1,
204 .default_display = 0, 211 .default_display = 0,
205 212
206 .lpcsel= 0x02, 213 .lpcsel = 0x02,
207 .gpccon= 0xaa940659, 214 .gpccon = 0xaa940659,
208 .gpccon_mask= 0xffffffff, 215 .gpccon_mask = 0xffffc0f0,
209 .gpcup= 0x0000ffff, 216 .gpcup = 0x0000ffff,
210 .gpcup_mask= 0xffffffff, 217 .gpcup_mask = 0xffffffff,
211 .gpdcon= 0xaa84aaa0, 218 .gpdcon = 0xaa84aaa0,
212 .gpdcon_mask= 0xffffffff, 219 .gpdcon_mask = 0xffffffff,
213 .gpdup= 0x0000faff, 220 .gpdup = 0x0000faff,
214 .gpdup_mask= 0xffffffff, 221 .gpdup_mask = 0xffffffff,
215}; 222};
216 223
217static struct platform_device h1940_device_leds = { 224static int power_supply_init(struct device *dev)
218 .name = "h1940-leds", 225{
226 return gpio_request(S3C2410_GPF(2), "cable plugged");
227}
228
229static int h1940_is_ac_online(void)
230{
231 return !gpio_get_value(S3C2410_GPF(2));
232}
233
234static void power_supply_exit(struct device *dev)
235{
236 gpio_free(S3C2410_GPF(2));
237}
238
239static char *h1940_supplicants[] = {
240 "main-battery",
241 "backup-battery",
242};
243
244static struct pda_power_pdata power_supply_info = {
245 .init = power_supply_init,
246 .is_ac_online = h1940_is_ac_online,
247 .exit = power_supply_exit,
248 .supplied_to = h1940_supplicants,
249 .num_supplicants = ARRAY_SIZE(h1940_supplicants),
250};
251
252static struct resource power_supply_resources[] = {
253 [0] = {
254 .name = "ac",
255 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |
256 IORESOURCE_IRQ_HIGHEDGE,
257 .start = IRQ_EINT2,
258 .end = IRQ_EINT2,
259 },
260};
261
262static struct platform_device power_supply = {
263 .name = "pda-power",
264 .id = -1,
265 .dev = {
266 .platform_data =
267 &power_supply_info,
268 },
269 .resource = power_supply_resources,
270 .num_resources = ARRAY_SIZE(power_supply_resources),
271};
272
273static const struct s3c_adc_bat_thresh bat_lut_noac[] = {
274 { .volt = 4070, .cur = 162, .level = 100},
275 { .volt = 4040, .cur = 165, .level = 95},
276 { .volt = 4016, .cur = 164, .level = 90},
277 { .volt = 3996, .cur = 166, .level = 85},
278 { .volt = 3971, .cur = 168, .level = 80},
279 { .volt = 3951, .cur = 168, .level = 75},
280 { .volt = 3931, .cur = 170, .level = 70},
281 { .volt = 3903, .cur = 172, .level = 65},
282 { .volt = 3886, .cur = 172, .level = 60},
283 { .volt = 3858, .cur = 176, .level = 55},
284 { .volt = 3842, .cur = 176, .level = 50},
285 { .volt = 3818, .cur = 176, .level = 45},
286 { .volt = 3789, .cur = 180, .level = 40},
287 { .volt = 3769, .cur = 180, .level = 35},
288 { .volt = 3749, .cur = 184, .level = 30},
289 { .volt = 3732, .cur = 184, .level = 25},
290 { .volt = 3716, .cur = 184, .level = 20},
291 { .volt = 3708, .cur = 184, .level = 15},
292 { .volt = 3716, .cur = 96, .level = 10},
293 { .volt = 3700, .cur = 96, .level = 5},
294 { .volt = 3684, .cur = 96, .level = 0},
295};
296
297static const struct s3c_adc_bat_thresh bat_lut_acin[] = {
298 { .volt = 4130, .cur = 0, .level = 100},
299 { .volt = 3982, .cur = 0, .level = 50},
300 { .volt = 3854, .cur = 0, .level = 10},
301 { .volt = 3841, .cur = 0, .level = 0},
302};
303
304int h1940_bat_init(void)
305{
306 int ret;
307
308 ret = gpio_request(H1940_LATCH_SM803_ENABLE, "h1940-charger-enable");
309 if (ret)
310 return ret;
311 gpio_direction_output(H1940_LATCH_SM803_ENABLE, 0);
312
313 return 0;
314
315}
316
317void h1940_bat_exit(void)
318{
319 gpio_free(H1940_LATCH_SM803_ENABLE);
320}
321
322void h1940_enable_charger(void)
323{
324 gpio_set_value(H1940_LATCH_SM803_ENABLE, 1);
325}
326
327void h1940_disable_charger(void)
328{
329 gpio_set_value(H1940_LATCH_SM803_ENABLE, 0);
330}
331
332static struct s3c_adc_bat_pdata h1940_bat_cfg = {
333 .init = h1940_bat_init,
334 .exit = h1940_bat_exit,
335 .enable_charger = h1940_enable_charger,
336 .disable_charger = h1940_disable_charger,
337 .gpio_charge_finished = S3C2410_GPF(3),
338 .gpio_inverted = 1,
339 .lut_noac = bat_lut_noac,
340 .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac),
341 .lut_acin = bat_lut_acin,
342 .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin),
343 .volt_channel = 0,
344 .current_channel = 1,
345 .volt_mult = 4056,
346 .current_mult = 1893,
347 .internal_impedance = 200,
348 .backup_volt_channel = 3,
349 /* TODO Check backup volt multiplier */
350 .backup_volt_mult = 4056,
351 .backup_volt_min = 0,
352 .backup_volt_max = 4149288
353};
354
355static struct platform_device h1940_battery = {
356 .name = "s3c-adc-battery",
219 .id = -1, 357 .id = -1,
358 .dev = {
359 .parent = &s3c_device_adc.dev,
360 .platform_data = &h1940_bat_cfg,
361 },
362};
363
364DEFINE_SPINLOCK(h1940_blink_spin);
365
366int h1940_led_blink_set(unsigned gpio, int state,
367 unsigned long *delay_on, unsigned long *delay_off)
368{
369 int blink_gpio, check_gpio1, check_gpio2;
370
371 switch (gpio) {
372 case H1940_LATCH_LED_GREEN:
373 blink_gpio = S3C2410_GPA(7);
374 check_gpio1 = S3C2410_GPA(1);
375 check_gpio2 = S3C2410_GPA(3);
376 break;
377 case H1940_LATCH_LED_RED:
378 blink_gpio = S3C2410_GPA(1);
379 check_gpio1 = S3C2410_GPA(7);
380 check_gpio2 = S3C2410_GPA(3);
381 break;
382 default:
383 blink_gpio = S3C2410_GPA(3);
384 check_gpio1 = S3C2410_GPA(1);
385 check_gpio1 = S3C2410_GPA(7);
386 break;
387 }
388
389 if (delay_on && delay_off && !*delay_on && !*delay_off)
390 *delay_on = *delay_off = 500;
391
392 spin_lock(&h1940_blink_spin);
393
394 switch (state) {
395 case GPIO_LED_NO_BLINK_LOW:
396 case GPIO_LED_NO_BLINK_HIGH:
397 if (!gpio_get_value(check_gpio1) &&
398 !gpio_get_value(check_gpio2))
399 gpio_set_value(H1940_LATCH_LED_FLASH, 0);
400 gpio_set_value(blink_gpio, 0);
401 if (gpio_is_valid(gpio))
402 gpio_set_value(gpio, state);
403 break;
404 case GPIO_LED_BLINK:
405 if (gpio_is_valid(gpio))
406 gpio_set_value(gpio, 0);
407 gpio_set_value(H1940_LATCH_LED_FLASH, 1);
408 gpio_set_value(blink_gpio, 1);
409 break;
410 }
411
412 spin_unlock(&h1940_blink_spin);
413
414 return 0;
415}
416EXPORT_SYMBOL(h1940_led_blink_set);
417
418static struct gpio_led h1940_leds_desc[] = {
419 {
420 .name = "Green",
421 .default_trigger = "main-battery-full",
422 .gpio = H1940_LATCH_LED_GREEN,
423 .retain_state_suspended = 1,
424 },
425 {
426 .name = "Red",
427 .default_trigger
428 = "main-battery-charging-blink-full-solid",
429 .gpio = H1940_LATCH_LED_RED,
430 .retain_state_suspended = 1,
431 },
432};
433
434static struct gpio_led_platform_data h1940_leds_pdata = {
435 .num_leds = ARRAY_SIZE(h1940_leds_desc),
436 .leds = h1940_leds_desc,
437 .gpio_blink_set = h1940_led_blink_set,
438};
439
440static struct platform_device h1940_device_leds = {
441 .name = "leds-gpio",
442 .id = -1,
443 .dev = {
444 .platform_data = &h1940_leds_pdata,
445 },
220}; 446};
221 447
222static struct platform_device h1940_device_bluetooth = { 448static struct platform_device h1940_device_bluetooth = {
@@ -302,14 +528,14 @@ static struct platform_device h1940_backlight = {
302static void h1940_lcd_power_set(struct plat_lcd_data *pd, 528static void h1940_lcd_power_set(struct plat_lcd_data *pd,
303 unsigned int power) 529 unsigned int power)
304{ 530{
305 int value; 531 int value, retries = 100;
306 532
307 if (!power) { 533 if (!power) {
308 gpio_set_value(S3C2410_GPC(0), 0); 534 gpio_set_value(S3C2410_GPC(0), 0);
309 /* wait for 3ac */ 535 /* wait for 3ac */
310 do { 536 do {
311 value = gpio_get_value(S3C2410_GPC(6)); 537 value = gpio_get_value(S3C2410_GPC(6));
312 } while (value); 538 } while (value && retries--);
313 539
314 gpio_set_value(H1940_LATCH_LCD_P2, 0); 540 gpio_set_value(H1940_LATCH_LCD_P2, 0);
315 gpio_set_value(H1940_LATCH_LCD_P3, 0); 541 gpio_set_value(H1940_LATCH_LCD_P3, 0);
@@ -327,6 +553,9 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd,
327 gpio_set_value(H1940_LATCH_LCD_P0, 1); 553 gpio_set_value(H1940_LATCH_LCD_P0, 1);
328 gpio_set_value(H1940_LATCH_LCD_P1, 1); 554 gpio_set_value(H1940_LATCH_LCD_P1, 1);
329 555
556 gpio_direction_input(S3C2410_GPC(1));
557 gpio_direction_input(S3C2410_GPC(4));
558 mdelay(10);
330 s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2)); 559 s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2));
331 s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2)); 560 s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2));
332 561
@@ -362,7 +591,44 @@ static struct i2c_board_info h1940_i2c_devices[] = {
362 }, 591 },
363}; 592};
364 593
594#define DECLARE_BUTTON(p, k, n, w) \
595 { \
596 .gpio = p, \
597 .code = k, \
598 .desc = n, \
599 .wakeup = w, \
600 .active_low = 1, \
601 }
602
603static struct gpio_keys_button h1940_buttons[] = {
604 DECLARE_BUTTON(S3C2410_GPF(0), KEY_POWER, "Power", 1),
605 DECLARE_BUTTON(S3C2410_GPF(6), KEY_ENTER, "Select", 1),
606 DECLARE_BUTTON(S3C2410_GPF(7), KEY_RECORD, "Record", 0),
607 DECLARE_BUTTON(S3C2410_GPG(0), KEY_F11, "Calendar", 0),
608 DECLARE_BUTTON(S3C2410_GPG(2), KEY_F12, "Contacts", 0),
609 DECLARE_BUTTON(S3C2410_GPG(3), KEY_MAIL, "Mail", 0),
610 DECLARE_BUTTON(S3C2410_GPG(6), KEY_LEFT, "Left_arrow", 0),
611 DECLARE_BUTTON(S3C2410_GPG(7), KEY_HOMEPAGE, "Home", 0),
612 DECLARE_BUTTON(S3C2410_GPG(8), KEY_RIGHT, "Right_arrow", 0),
613 DECLARE_BUTTON(S3C2410_GPG(9), KEY_UP, "Up_arrow", 0),
614 DECLARE_BUTTON(S3C2410_GPG(10), KEY_DOWN, "Down_arrow", 0),
615};
616
617static struct gpio_keys_platform_data h1940_buttons_data = {
618 .buttons = h1940_buttons,
619 .nbuttons = ARRAY_SIZE(h1940_buttons),
620};
621
622static struct platform_device h1940_dev_buttons = {
623 .name = "gpio-keys",
624 .id = -1,
625 .dev = {
626 .platform_data = &h1940_buttons_data,
627 }
628};
629
365static struct platform_device *h1940_devices[] __initdata = { 630static struct platform_device *h1940_devices[] __initdata = {
631 &h1940_dev_buttons,
366 &s3c_device_ohci, 632 &s3c_device_ohci,
367 &s3c_device_lcd, 633 &s3c_device_lcd,
368 &s3c_device_wdt, 634 &s3c_device_wdt,
@@ -379,6 +645,8 @@ static struct platform_device *h1940_devices[] __initdata = {
379 &h1940_lcd_powerdev, 645 &h1940_lcd_powerdev,
380 &s3c_device_adc, 646 &s3c_device_adc,
381 &s3c_device_ts, 647 &s3c_device_ts,
648 &power_supply,
649 &h1940_battery,
382}; 650};
383 651
384static void __init h1940_map_io(void) 652static void __init h1940_map_io(void)
@@ -461,6 +729,15 @@ static void __init h1940_init(void)
461 729
462 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); 730 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
463 731
732 gpio_request(S3C2410_GPA(1), "Red LED blink");
733 gpio_request(S3C2410_GPA(3), "Blue LED blink");
734 gpio_request(S3C2410_GPA(7), "Green LED blink");
735 gpio_request(H1940_LATCH_LED_FLASH, "LED blink");
736 gpio_direction_output(S3C2410_GPA(1), 0);
737 gpio_direction_output(S3C2410_GPA(3), 0);
738 gpio_direction_output(S3C2410_GPA(7), 0);
739 gpio_direction_output(H1940_LATCH_LED_FLASH, 0);
740
464 i2c_register_board_info(0, h1940_i2c_devices, 741 i2c_register_board_info(0, h1940_i2c_devices,
465 ARRAY_SIZE(h1940_i2c_devices)); 742 ARRAY_SIZE(h1940_i2c_devices));
466} 743}
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 66f44440d5d3..079dcaa602d3 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -252,7 +252,7 @@ static struct s3c24xx_led_platdata n30_blue_led_pdata = {
252 .def_trigger = "", 252 .def_trigger = "",
253}; 253};
254 254
255/* This is the blue LED on the device. Originaly used to indicate GPS activity 255/* This is the blue LED on the device. Originally used to indicate GPS activity
256 * by flashing. */ 256 * by flashing. */
257static struct s3c24xx_led_platdata n35_blue_led_pdata = { 257static struct s3c24xx_led_platdata n35_blue_led_pdata = {
258 .name = "blue_led", 258 .name = "blue_led",
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index eddb52ba5b65..f3355d2ec634 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -175,18 +175,18 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
175 unsigned int irqno; 175 unsigned int irqno;
176 176
177 for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { 177 for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
178 set_irq_chip(irqno, &s3c2412_irq_eint0t4); 178 irq_set_chip_and_handler(irqno, &s3c2412_irq_eint0t4,
179 set_irq_handler(irqno, handle_edge_irq); 179 handle_edge_irq);
180 set_irq_flags(irqno, IRQF_VALID); 180 set_irq_flags(irqno, IRQF_VALID);
181 } 181 }
182 182
183 /* add demux support for CF/SDI */ 183 /* add demux support for CF/SDI */
184 184
185 set_irq_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi); 185 irq_set_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi);
186 186
187 for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) { 187 for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) {
188 set_irq_chip(irqno, &s3c2412_irq_cfsdi); 188 irq_set_chip_and_handler(irqno, &s3c2412_irq_cfsdi,
189 set_irq_handler(irqno, handle_level_irq); 189 handle_level_irq);
190 set_irq_flags(irqno, IRQF_VALID); 190 set_irq_flags(irqno, IRQF_VALID);
191 } 191 }
192 192
@@ -195,7 +195,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
195 s3c2412_irq_rtc_chip = s3c_irq_chip; 195 s3c2412_irq_rtc_chip = s3c_irq_chip;
196 s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake; 196 s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake;
197 197
198 set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); 198 irq_set_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
199 199
200 return 0; 200 return 0;
201} 201}
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
index 680fe386aca5..77b38f2381c1 100644
--- a/arch/arm/mach-s3c2416/irq.c
+++ b/arch/arm/mach-s3c2416/irq.c
@@ -202,13 +202,11 @@ static int __init s3c2416_add_sub(unsigned int base,
202{ 202{
203 unsigned int irqno; 203 unsigned int irqno;
204 204
205 set_irq_chip(base, &s3c_irq_level_chip); 205 irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
206 set_irq_handler(base, handle_level_irq); 206 irq_set_chained_handler(base, demux);
207 set_irq_chained_handler(base, demux);
208 207
209 for (irqno = start; irqno <= end; irqno++) { 208 for (irqno = start; irqno <= end; irqno++) {
210 set_irq_chip(irqno, chip); 209 irq_set_chip_and_handler(irqno, chip, handle_level_irq);
211 set_irq_handler(irqno, handle_level_irq);
212 set_irq_flags(irqno, IRQF_VALID); 210 set_irq_flags(irqno, IRQF_VALID);
213 } 211 }
214 212
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index acad4428bef0..eb1cc0f0705e 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -100,13 +100,13 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
100 100
101 /* add new chained handler for wdt, ac7 */ 101 /* add new chained handler for wdt, ac7 */
102 102
103 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); 103 irq_set_chip_and_handler(IRQ_WDT, &s3c_irq_level_chip,
104 set_irq_handler(IRQ_WDT, handle_level_irq); 104 handle_level_irq);
105 set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); 105 irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
106 106
107 for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) { 107 for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
108 set_irq_chip(irqno, &s3c_irq_wdtac97); 108 irq_set_chip_and_handler(irqno, &s3c_irq_wdtac97,
109 set_irq_handler(irqno, handle_level_irq); 109 handle_level_irq);
110 set_irq_flags(irqno, IRQF_VALID); 110 set_irq_flags(irqno, IRQF_VALID);
111 } 111 }
112 112
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 0db2411ef4bb..716662008ce2 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -409,6 +409,10 @@ struct platform_device s3c24xx_pwm_device = {
409 .num_resources = 0, 409 .num_resources = 0,
410}; 410};
411 411
412static struct platform_device gta02_dfbmcs320_device = {
413 .name = "dfbmcs320",
414};
415
412static struct i2c_board_info gta02_i2c_devs[] __initdata = { 416static struct i2c_board_info gta02_i2c_devs[] __initdata = {
413 { 417 {
414 I2C_BOARD_INFO("pcf50633", 0x73), 418 I2C_BOARD_INFO("pcf50633", 0x73),
@@ -523,6 +527,7 @@ static struct platform_device *gta02_devices[] __initdata = {
523 &s3c_device_iis, 527 &s3c_device_iis,
524 &samsung_asoc_dma, 528 &samsung_asoc_dma,
525 &s3c_device_i2c0, 529 &s3c_device_i2c0,
530 &gta02_dfbmcs320_device,
526 &gta02_buttons_device, 531 &gta02_buttons_device,
527 &s3c_device_adc, 532 &s3c_device_adc,
528 &s3c_device_ts, 533 &s3c_device_ts,
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index d80f129bca94..dd3120df09fe 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -155,7 +155,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
155 * the same timings, however, anything smaller than 1024x768 155 * the same timings, however, anything smaller than 1024x768
156 * will only be displayed in the top left corner of a 1024x768 156 * will only be displayed in the top left corner of a 1024x768
157 * XGA output unless you add optional dip switches to the shield. 157 * XGA output unless you add optional dip switches to the shield.
158 * Therefore timings for other resolutions have been ommited here. 158 * Therefore timings for other resolutions have been omitted here.
159 */ 159 */
160 [2] = { 160 [2] = {
161 _LCD_DECLARE( 161 _LCD_DECLARE(
@@ -488,6 +488,11 @@ static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
488 }, 488 },
489}; 489};
490 490
491static struct platform_device uda1340_codec = {
492 .name = "uda134x-codec",
493 .id = -1,
494};
495
491static struct platform_device *mini2440_devices[] __initdata = { 496static struct platform_device *mini2440_devices[] __initdata = {
492 &s3c_device_ohci, 497 &s3c_device_ohci,
493 &s3c_device_wdt, 498 &s3c_device_wdt,
@@ -503,7 +508,9 @@ static struct platform_device *mini2440_devices[] __initdata = {
503 &s3c_device_nand, 508 &s3c_device_nand,
504 &s3c_device_sdi, 509 &s3c_device_sdi,
505 &s3c_device_iis, 510 &s3c_device_iis,
511 &uda1340_codec,
506 &mini2440_audio, 512 &mini2440_audio,
513 &samsung_asoc_dma,
507}; 514};
508 515
509static void __init mini2440_map_io(void) 516static void __init mini2440_map_io(void)
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 86bbc233b31c..27ea95096fe1 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -263,27 +263,78 @@ void rx1950_disable_charger(void)
263 gpio_direction_output(S3C2410_GPJ(3), 0); 263 gpio_direction_output(S3C2410_GPJ(3), 0);
264} 264}
265 265
266DEFINE_SPINLOCK(rx1950_blink_spin);
267
268static int rx1950_led_blink_set(unsigned gpio, int state,
269 unsigned long *delay_on, unsigned long *delay_off)
270{
271 int blink_gpio, check_gpio;
272
273 switch (gpio) {
274 case S3C2410_GPA(6):
275 blink_gpio = S3C2410_GPA(4);
276 check_gpio = S3C2410_GPA(3);
277 break;
278 case S3C2410_GPA(7):
279 blink_gpio = S3C2410_GPA(3);
280 check_gpio = S3C2410_GPA(4);
281 break;
282 default:
283 return -EINVAL;
284 break;
285 }
286
287 if (delay_on && delay_off && !*delay_on && !*delay_off)
288 *delay_on = *delay_off = 500;
289
290 spin_lock(&rx1950_blink_spin);
291
292 switch (state) {
293 case GPIO_LED_NO_BLINK_LOW:
294 case GPIO_LED_NO_BLINK_HIGH:
295 if (!gpio_get_value(check_gpio))
296 gpio_set_value(S3C2410_GPJ(6), 0);
297 gpio_set_value(blink_gpio, 0);
298 gpio_set_value(gpio, state);
299 break;
300 case GPIO_LED_BLINK:
301 gpio_set_value(gpio, 0);
302 gpio_set_value(S3C2410_GPJ(6), 1);
303 gpio_set_value(blink_gpio, 1);
304 break;
305 }
306
307 spin_unlock(&rx1950_blink_spin);
308
309 return 0;
310}
311
266static struct gpio_led rx1950_leds_desc[] = { 312static struct gpio_led rx1950_leds_desc[] = {
267 { 313 {
268 .name = "Green", 314 .name = "Green",
269 .default_trigger = "main-battery-charging-or-full", 315 .default_trigger = "main-battery-full",
270 .gpio = S3C2410_GPA(6), 316 .gpio = S3C2410_GPA(6),
317 .retain_state_suspended = 1,
271 }, 318 },
272 { 319 {
273 .name = "Red", 320 .name = "Red",
274 .default_trigger = "main-battery-full", 321 .default_trigger
275 .gpio = S3C2410_GPA(7), 322 = "main-battery-charging-blink-full-solid",
323 .gpio = S3C2410_GPA(7),
324 .retain_state_suspended = 1,
276 }, 325 },
277 { 326 {
278 .name = "Blue", 327 .name = "Blue",
279 .default_trigger = "rx1950-acx-mem", 328 .default_trigger = "rx1950-acx-mem",
280 .gpio = S3C2410_GPA(11), 329 .gpio = S3C2410_GPA(11),
330 .retain_state_suspended = 1,
281 }, 331 },
282}; 332};
283 333
284static struct gpio_led_platform_data rx1950_leds_pdata = { 334static struct gpio_led_platform_data rx1950_leds_pdata = {
285 .num_leds = ARRAY_SIZE(rx1950_leds_desc), 335 .num_leds = ARRAY_SIZE(rx1950_leds_desc),
286 .leds = rx1950_leds_desc, 336 .leds = rx1950_leds_desc,
337 .gpio_blink_set = rx1950_led_blink_set,
287}; 338};
288 339
289static struct platform_device rx1950_leds = { 340static struct platform_device rx1950_leds = {
@@ -752,6 +803,13 @@ static void __init rx1950_init_machine(void)
752 803
753 WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power")); 804 WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power"));
754 805
806 WARN_ON(gpio_request(S3C2410_GPA(3), "Red blink"));
807 WARN_ON(gpio_request(S3C2410_GPA(4), "Green blink"));
808 WARN_ON(gpio_request(S3C2410_GPJ(6), "LED blink"));
809 gpio_direction_output(S3C2410_GPA(3), 0);
810 gpio_direction_output(S3C2410_GPA(4), 0);
811 gpio_direction_output(S3C2410_GPJ(6), 0);
812
755 platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); 813 platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices));
756 814
757 i2c_register_board_info(0, rx1950_i2c_devices, 815 i2c_register_board_info(0, rx1950_i2c_devices,
diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index 83daf4ece764..de07c2feaa32 100644
--- a/arch/arm/mach-s3c2440/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
@@ -95,19 +95,19 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
95{ 95{
96 unsigned int irqno; 96 unsigned int irqno;
97 97
98 set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); 98 irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
99 set_irq_handler(IRQ_NFCON, handle_level_irq); 99 handle_level_irq);
100 set_irq_flags(IRQ_NFCON, IRQF_VALID); 100 set_irq_flags(IRQ_NFCON, IRQF_VALID);
101 101
102 /* add chained handler for camera */ 102 /* add chained handler for camera */
103 103
104 set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); 104 irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
105 set_irq_handler(IRQ_CAM, handle_level_irq); 105 handle_level_irq);
106 set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); 106 irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
107 107
108 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { 108 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
109 set_irq_chip(irqno, &s3c_irq_cam); 109 irq_set_chip_and_handler(irqno, &s3c_irq_cam,
110 set_irq_handler(irqno, handle_level_irq); 110 handle_level_irq);
111 set_irq_flags(irqno, IRQF_VALID); 111 set_irq_flags(irqno, IRQF_VALID);
112 } 112 }
113 113
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index c7820f9c1352..83ecb1173fb1 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -230,13 +230,11 @@ static int __init s3c2443_add_sub(unsigned int base,
230{ 230{
231 unsigned int irqno; 231 unsigned int irqno;
232 232
233 set_irq_chip(base, &s3c_irq_level_chip); 233 irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
234 set_irq_handler(base, handle_level_irq); 234 irq_set_chained_handler(base, demux);
235 set_irq_chained_handler(base, demux);
236 235
237 for (irqno = start; irqno <= end; irqno++) { 236 for (irqno = start; irqno <= end; irqno++) {
238 set_irq_chip(irqno, chip); 237 irq_set_chip_and_handler(irqno, chip, handle_level_irq);
239 set_irq_handler(irqno, handle_level_irq);
240 set_irq_flags(irqno, IRQF_VALID); 238 set_irq_flags(irqno, IRQF_VALID);
241 } 239 }
242 240
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index c35585cf8c4f..b197171e7d03 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -315,7 +315,7 @@ int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op)
315 case S3C2410_DMAOP_FLUSH: 315 case S3C2410_DMAOP_FLUSH:
316 return s3c64xx_dma_flush(chan); 316 return s3c64xx_dma_flush(chan);
317 317
318 /* belive PAUSE/RESUME are no-ops */ 318 /* believe PAUSE/RESUME are no-ops */
319 case S3C2410_DMAOP_PAUSE: 319 case S3C2410_DMAOP_PAUSE:
320 case S3C2410_DMAOP_RESUME: 320 case S3C2410_DMAOP_RESUME:
321 case S3C2410_DMAOP_STARTED: 321 case S3C2410_DMAOP_STARTED:
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index 2ead8189da74..4d203be1f4c3 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -197,16 +197,15 @@ static int __init s3c64xx_init_irq_eint(void)
197 int irq; 197 int irq;
198 198
199 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { 199 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
200 set_irq_chip(irq, &s3c_irq_eint); 200 irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
201 set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq)); 201 irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
202 set_irq_handler(irq, handle_level_irq);
203 set_irq_flags(irq, IRQF_VALID); 202 set_irq_flags(irq, IRQF_VALID);
204 } 203 }
205 204
206 set_irq_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3); 205 irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
207 set_irq_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11); 206 irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
208 set_irq_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19); 207 irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
209 set_irq_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27); 208 irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
210 209
211 return 0; 210 return 0;
212} 211}
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
index b8d02eb4cf30..a5c00952ea35 100644
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ b/arch/arm/mach-s5p64x0/cpu.c
@@ -119,7 +119,7 @@ void __init s5p6450_map_io(void)
119 s3c_adc_setname("s3c64xx-adc"); 119 s3c_adc_setname("s3c64xx-adc");
120 120
121 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); 121 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
122 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc)); 122 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
123} 123}
124 124
125/* 125/*
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
index 4be4cc9abf75..07aa4d6054fe 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
@@ -29,7 +29,7 @@
29#define WPALCON_H (0x19c) 29#define WPALCON_H (0x19c)
30#define WPALCON_L (0x1a0) 30#define WPALCON_L (0x1a0)
31 31
32/* Pallete contro for WPAL0 and WPAL1 is the same as in S3C64xx, but 32/* Palette control for WPAL0 and WPAL1 is the same as in S3C64xx, but
33 * different for WPAL2-4 33 * different for WPAL2-4
34 */ 34 */
35/* In WPALCON_L (aka WPALCON) */ 35/* In WPALCON_L (aka WPALCON) */
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index f16946e456e9..be25879bb2ee 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -40,7 +40,7 @@ void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
40{ 40{
41 u32 ctrl2, ctrl3; 41 u32 ctrl2, ctrl3;
42 42
43 /* don't need to alter anything acording to card-type */ 43 /* don't need to alter anything according to card-type */
44 44
45 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); 45 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
46 46
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index 1f4b595534c2..a5a1e331f8ed 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -18,7 +18,7 @@
18#define gpio_cansleep __gpio_cansleep 18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq 19#define gpio_to_irq __gpio_to_irq
20 20
21/* Practically, GPIO banks upto MP03 are the configurable gpio banks */ 21/* Practically, GPIO banks up to MP03 are the configurable gpio banks */
22 22
23/* GPIO bank sizes */ 23/* GPIO bank sizes */
24#define S5PV210_GPIO_A0_NR (8) 24#define S5PV210_GPIO_A0_NR (8)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 26710b35ef87..b9f9ec33384d 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -99,9 +99,9 @@
99#define IRQ_TC IRQ_PENDN 99#define IRQ_TC IRQ_PENDN
100#define IRQ_KEYPAD S5P_IRQ_VIC2(25) 100#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
101#define IRQ_CG S5P_IRQ_VIC2(26) 101#define IRQ_CG S5P_IRQ_VIC2(26)
102#define IRQ_SEC S5P_IRQ_VIC2(27) 102#define IRQ_SSS_INT S5P_IRQ_VIC2(27)
103#define IRQ_SECRX S5P_IRQ_VIC2(28) 103#define IRQ_SSS_HASH S5P_IRQ_VIC2(28)
104#define IRQ_SECTX S5P_IRQ_VIC2(29) 104#define IRQ_PCM2 S5P_IRQ_VIC2(29)
105#define IRQ_SDMIRQ S5P_IRQ_VIC2(30) 105#define IRQ_SDMIRQ S5P_IRQ_VIC2(30)
106#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) 106#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
107 107
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 243291722c66..31d5aa769753 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -15,7 +15,7 @@
15#include <linux/fb.h> 15#include <linux/fb.h>
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h> 17#include <linux/i2c-gpio.h>
18#include <linux/i2c/qt602240_ts.h> 18#include <linux/i2c/atmel_mxt_ts.h>
19#include <linux/mfd/max8998.h> 19#include <linux/mfd/max8998.h>
20#include <linux/mfd/wm8994/pdata.h> 20#include <linux/mfd/wm8994/pdata.h>
21#include <linux/regulator/fixed.h> 21#include <linux/regulator/fixed.h>
@@ -25,6 +25,7 @@
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/interrupt.h>
28 29
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -225,7 +226,7 @@ static void __init goni_radio_init(void)
225} 226}
226 227
227/* TSP */ 228/* TSP */
228static struct qt602240_platform_data qt602240_platform_data = { 229static struct mxt_platform_data qt602240_platform_data = {
229 .x_line = 17, 230 .x_line = 17,
230 .y_line = 11, 231 .y_line = 11,
231 .x_size = 800, 232 .x_size = 800,
@@ -233,7 +234,8 @@ static struct qt602240_platform_data qt602240_platform_data = {
233 .blen = 0x21, 234 .blen = 0x21,
234 .threshold = 0x28, 235 .threshold = 0x28,
235 .voltage = 2800000, /* 2.8V */ 236 .voltage = 2800000, /* 2.8V */
236 .orient = QT602240_DIAGONAL, 237 .orient = MXT_DIAGONAL,
238 .irqflags = IRQF_TRIGGER_FALLING,
237}; 239};
238 240
239static struct s3c2410_platform_i2c i2c2_data __initdata = { 241static struct s3c2410_platform_i2c i2c2_data __initdata = {
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index bc08ac42e7cc..c6a9e86c2d5c 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -44,7 +44,6 @@
44#include <plat/keypad.h> 44#include <plat/keypad.h>
45#include <plat/pm.h> 45#include <plat/pm.h>
46#include <plat/fb.h> 46#include <plat/fb.h>
47#include <plat/gpio-cfg.h>
48#include <plat/s5p-time.h> 47#include <plat/s5p-time.h>
49 48
50/* Following are default values for UCON, ULCON and UFCON UART registers */ 49/* Following are default values for UCON, ULCON and UFCON UART registers */
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index 746777d56df9..3e3ac05bb7b1 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -32,10 +32,10 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
32 32
33 switch (width) { 33 switch (width) {
34 case 8: 34 case 8:
35 /* GPG1[3:6] special-funtion 3 */ 35 /* GPG1[3:6] special-function 3 */
36 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); 36 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3));
37 case 4: 37 case 4:
38 /* GPG0[3:6] special-funtion 2 */ 38 /* GPG0[3:6] special-function 2 */
39 s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); 39 s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2));
40 default: 40 default:
41 break; 41 break;
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index c32e202731c1..a83b6c909f6b 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -38,7 +38,7 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
38{ 38{
39 u32 ctrl2, ctrl3; 39 u32 ctrl2, ctrl3;
40 40
41 /* don't need to alter anything acording to card-type */ 41 /* don't need to alter anything according to card-type */
42 42
43 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); 43 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
44 44
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index e697691eed28..41252d22e659 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -50,7 +50,7 @@ led-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o
50# LEDs support 50# LEDs support
51obj-$(CONFIG_LEDS) += $(led-y) 51obj-$(CONFIG_LEDS) += $(led-y)
52 52
53# Miscelaneous functions 53# Miscellaneous functions
54obj-$(CONFIG_PM) += pm.o sleep.o 54obj-$(CONFIG_PM) += pm.o sleep.o
55obj-$(CONFIG_SA1100_SSP) += ssp.o 55obj-$(CONFIG_SA1100_SSP) += ssp.o
56 56
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 98d780608c7e..7f3da4b11ec9 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -96,7 +96,7 @@ static struct resource cerf_flash_resource = {
96static void __init cerf_init_irq(void) 96static void __init cerf_init_irq(void)
97{ 97{
98 sa1100_init_irq(); 98 sa1100_init_irq();
99 set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING); 99 irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
100} 100}
101 101
102static struct map_desc cerf_io_desc[] __initdata = { 102static struct map_desc cerf_io_desc[] __initdata = {
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index 07d4e8ba3719..aaa8acf76b7b 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -68,7 +68,7 @@
68 * clock change in ROM and jump to that code from the kernel. The main 68 * clock change in ROM and jump to that code from the kernel. The main
69 * disadvantage is that the ROM has to be modified, which is not 69 * disadvantage is that the ROM has to be modified, which is not
70 * possible on all SA-1100 platforms. Another disadvantage is that 70 * possible on all SA-1100 platforms. Another disadvantage is that
71 * jumping to ROM makes clock switching unecessary complicated. 71 * jumping to ROM makes clock switching unnecessary complicated.
72 * 72 *
73 * The idea behind this driver is that the memory configuration can be 73 * The idea behind this driver is that the memory configuration can be
74 * changed while running from DRAM (even with interrupts turned on!) 74 * changed while running from DRAM (even with interrupts turned on!)
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h
index 4f7ea012e1e5..bae8296f5dbf 100644
--- a/arch/arm/mach-sa1100/include/mach/SA-1100.h
+++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h
@@ -1794,7 +1794,7 @@
1794 (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ 1794 (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \
1795 DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR))) 1795 DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR)))
1796 1796
1797#define DCSR_RUN 0x00000001 /* DMA RUNing */ 1797#define DCSR_RUN 0x00000001 /* DMA running */
1798#define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ 1798#define DCSR_IE 0x00000002 /* DMA Interrupt Enable */
1799#define DCSR_ERROR 0x00000004 /* DMA ERROR */ 1799#define DCSR_ERROR 0x00000004 /* DMA ERROR */
1800#define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */ 1800#define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 3d85dfad9c1f..423ddb3d65e9 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -323,28 +323,28 @@ void __init sa1100_init_irq(void)
323 ICCR = 1; 323 ICCR = 1;
324 324
325 for (irq = 0; irq <= 10; irq++) { 325 for (irq = 0; irq <= 10; irq++) {
326 set_irq_chip(irq, &sa1100_low_gpio_chip); 326 irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip,
327 set_irq_handler(irq, handle_edge_irq); 327 handle_edge_irq);
328 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 328 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
329 } 329 }
330 330
331 for (irq = 12; irq <= 31; irq++) { 331 for (irq = 12; irq <= 31; irq++) {
332 set_irq_chip(irq, &sa1100_normal_chip); 332 irq_set_chip_and_handler(irq, &sa1100_normal_chip,
333 set_irq_handler(irq, handle_level_irq); 333 handle_level_irq);
334 set_irq_flags(irq, IRQF_VALID); 334 set_irq_flags(irq, IRQF_VALID);
335 } 335 }
336 336
337 for (irq = 32; irq <= 48; irq++) { 337 for (irq = 32; irq <= 48; irq++) {
338 set_irq_chip(irq, &sa1100_high_gpio_chip); 338 irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip,
339 set_irq_handler(irq, handle_edge_irq); 339 handle_edge_irq);
340 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 340 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
341 } 341 }
342 342
343 /* 343 /*
344 * Install handler for GPIO 11-27 edge detect interrupts 344 * Install handler for GPIO 11-27 edge detect interrupts
345 */ 345 */
346 set_irq_chip(IRQ_GPIO11_27, &sa1100_normal_chip); 346 irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
347 set_irq_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler); 347 irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
348 348
349 sa1100_init_gpio(); 349 sa1100_init_gpio();
350} 350}
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 9d490c66891c..f50b00bd18a0 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -29,7 +29,7 @@ static unsigned long jornada_ssp_flags;
29/** 29/**
30 * jornada_ssp_reverse - reverses input byte 30 * jornada_ssp_reverse - reverses input byte
31 * 31 *
32 * we need to reverse all data we recieve from the mcu due to its physical location 32 * we need to reverse all data we receive from the mcu due to its physical location
33 * returns : 01110111 -> 11101110 33 * returns : 01110111 -> 11101110
34 */ 34 */
35u8 inline jornada_ssp_reverse(u8 byte) 35u8 inline jornada_ssp_reverse(u8 byte)
@@ -179,7 +179,7 @@ static int __devinit jornada_ssp_probe(struct platform_device *dev)
179 179
180static int jornada_ssp_remove(struct platform_device *dev) 180static int jornada_ssp_remove(struct platform_device *dev)
181{ 181{
182 /* Note that this doesnt actually remove the driver, since theres nothing to remove 182 /* Note that this doesn't actually remove the driver, since theres nothing to remove
183 * It just makes sure everything is turned off */ 183 * It just makes sure everything is turned off */
184 GPSR = GPIO_GPIO25; 184 GPSR = GPIO_GPIO25;
185 ssp_exit(); 185 ssp_exit();
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 4aad01f73660..b4fa53a1427e 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -145,8 +145,8 @@ static int __devinit neponset_probe(struct platform_device *dev)
145 /* 145 /*
146 * Install handler for GPIO25. 146 * Install handler for GPIO25.
147 */ 147 */
148 set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING); 148 irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
149 set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler); 149 irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler);
150 150
151 /* 151 /*
152 * We would set IRQ_GPIO25 to be a wake-up IRQ, but 152 * We would set IRQ_GPIO25 to be a wake-up IRQ, but
@@ -161,9 +161,9 @@ static int __devinit neponset_probe(struct platform_device *dev)
161 * Setup other Neponset IRQs. SA1111 will be done by the 161 * Setup other Neponset IRQs. SA1111 will be done by the
162 * generic SA1111 code. 162 * generic SA1111 code.
163 */ 163 */
164 set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq); 164 irq_set_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
165 set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); 165 set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
166 set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq); 166 irq_set_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
167 set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); 167 set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
168 168
169 /* 169 /*
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 42b80400c100..65161f2bea29 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -142,7 +142,7 @@ static void __init pleb_map_io(void)
142 142
143 GPDR &= ~GPIO_ETH0_IRQ; 143 GPDR &= ~GPIO_ETH0_IRQ;
144 144
145 set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING); 145 irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
146} 146}
147 147
148MACHINE_START(PLEB, "PLEB") 148MACHINE_START(PLEB, "PLEB")
diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c
index 831fc66dfa4d..5dce13e429f3 100644
--- a/arch/arm/mach-shark/irq.c
+++ b/arch/arm/mach-shark/irq.c
@@ -80,8 +80,7 @@ void __init shark_init_irq(void)
80 int irq; 80 int irq;
81 81
82 for (irq = 0; irq < NR_IRQS; irq++) { 82 for (irq = 0; irq < NR_IRQS; irq++) {
83 set_irq_chip(irq, &fb_chip); 83 irq_set_chip_and_handler(irq, &fb_chip, handle_edge_irq);
84 set_irq_handler(irq, handle_edge_irq);
85 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 84 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
86 } 85 }
87 86
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 1a8118c929be..1e35fa976d64 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -24,9 +24,9 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/mfd/sh_mobile_sdhi.h>
28#include <linux/mfd/tmio.h> 27#include <linux/mfd/tmio.h>
29#include <linux/mmc/host.h> 28#include <linux/mmc/host.h>
29#include <linux/mmc/sh_mobile_sdhi.h>
30#include <linux/mtd/mtd.h> 30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h> 31#include <linux/mtd/partitions.h>
32#include <linux/mtd/physmap.h> 32#include <linux/mtd/physmap.h>
@@ -312,7 +312,7 @@ static struct resource sdhi0_resources[] = {
312 [0] = { 312 [0] = {
313 .name = "SDHI0", 313 .name = "SDHI0",
314 .start = 0xe6850000, 314 .start = 0xe6850000,
315 .end = 0xe68501ff, 315 .end = 0xe68500ff,
316 .flags = IORESOURCE_MEM, 316 .flags = IORESOURCE_MEM,
317 }, 317 },
318 [1] = { 318 [1] = {
@@ -345,7 +345,7 @@ static struct resource sdhi1_resources[] = {
345 [0] = { 345 [0] = {
346 .name = "SDHI1", 346 .name = "SDHI1",
347 .start = 0xe6860000, 347 .start = 0xe6860000,
348 .end = 0xe68601ff, 348 .end = 0xe68600ff,
349 .flags = IORESOURCE_MEM, 349 .flags = IORESOURCE_MEM,
350 }, 350 },
351 [1] = { 351 [1] = {
@@ -923,7 +923,8 @@ static struct platform_device ceu_device = {
923 .num_resources = ARRAY_SIZE(ceu_resources), 923 .num_resources = ARRAY_SIZE(ceu_resources),
924 .resource = ceu_resources, 924 .resource = ceu_resources,
925 .dev = { 925 .dev = {
926 .platform_data = &sh_mobile_ceu_info, 926 .platform_data = &sh_mobile_ceu_info,
927 .coherent_dma_mask = 0xffffffff,
927 }, 928 },
928}; 929};
929 930
@@ -946,7 +947,7 @@ static struct platform_device *ap4evb_devices[] __initdata = {
946 &ap4evb_camera, 947 &ap4evb_camera,
947}; 948};
948 949
949static int __init hdmi_init_pm_clock(void) 950static void __init hdmi_init_pm_clock(void)
950{ 951{
951 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); 952 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
952 int ret; 953 int ret;
@@ -987,20 +988,15 @@ static int __init hdmi_init_pm_clock(void)
987 pr_debug("PLLC2 set frequency %lu\n", rate); 988 pr_debug("PLLC2 set frequency %lu\n", rate);
988 989
989 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); 990 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
990 if (ret < 0) { 991 if (ret < 0)
991 pr_err("Cannot set HDMI parent: %d\n", ret); 992 pr_err("Cannot set HDMI parent: %d\n", ret);
992 goto out;
993 }
994 993
995out: 994out:
996 if (!IS_ERR(hdmi_ick)) 995 if (!IS_ERR(hdmi_ick))
997 clk_put(hdmi_ick); 996 clk_put(hdmi_ick);
998 return ret;
999} 997}
1000 998
1001device_initcall(hdmi_init_pm_clock); 999static void __init fsi_init_pm_clock(void)
1002
1003static int __init fsi_init_pm_clock(void)
1004{ 1000{
1005 struct clk *fsia_ick; 1001 struct clk *fsia_ick;
1006 int ret; 1002 int ret;
@@ -1009,7 +1005,7 @@ static int __init fsi_init_pm_clock(void)
1009 if (IS_ERR(fsia_ick)) { 1005 if (IS_ERR(fsia_ick)) {
1010 ret = PTR_ERR(fsia_ick); 1006 ret = PTR_ERR(fsia_ick);
1011 pr_err("Cannot get FSI ICK: %d\n", ret); 1007 pr_err("Cannot get FSI ICK: %d\n", ret);
1012 return ret; 1008 return;
1013 } 1009 }
1014 1010
1015 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); 1011 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
@@ -1017,10 +1013,7 @@ static int __init fsi_init_pm_clock(void)
1017 pr_err("Cannot set FSI-A parent: %d\n", ret); 1013 pr_err("Cannot set FSI-A parent: %d\n", ret);
1018 1014
1019 clk_put(fsia_ick); 1015 clk_put(fsia_ick);
1020
1021 return ret;
1022} 1016}
1023device_initcall(fsi_init_pm_clock);
1024 1017
1025/* 1018/*
1026 * FIXME !! 1019 * FIXME !!
@@ -1254,7 +1247,7 @@ static void __init ap4evb_init(void)
1254 gpio_request(GPIO_FN_KEYIN4, NULL); 1247 gpio_request(GPIO_FN_KEYIN4, NULL);
1255 1248
1256 /* enable TouchScreen */ 1249 /* enable TouchScreen */
1257 set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW); 1250 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1258 1251
1259 tsc_device.irq = IRQ28; 1252 tsc_device.irq = IRQ28;
1260 i2c_register_board_info(1, &tsc_device, 1); 1253 i2c_register_board_info(1, &tsc_device, 1);
@@ -1310,7 +1303,7 @@ static void __init ap4evb_init(void)
1310 lcdc_info.ch[0].lcd_size_cfg.height = 91; 1303 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1311 1304
1312 /* enable TouchScreen */ 1305 /* enable TouchScreen */
1313 set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); 1306 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1314 1307
1315 tsc_device.irq = IRQ7; 1308 tsc_device.irq = IRQ7;
1316 i2c_register_board_info(0, &tsc_device, 1); 1309 i2c_register_board_info(0, &tsc_device, 1);
@@ -1347,6 +1340,9 @@ static void __init ap4evb_init(void)
1347 __raw_writel(srcr4 & ~(1 << 13), SRCR4); 1340 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1348 1341
1349 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); 1342 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1343
1344 hdmi_init_pm_clock();
1345 fsi_init_pm_clock();
1350} 1346}
1351 1347
1352static void __init ap4evb_timer_init(void) 1348static void __init ap4evb_timer_init(void)
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index dee3e9231fb9..c87a7b7c5832 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -31,7 +31,7 @@
31#include <linux/input.h> 31#include <linux/input.h>
32#include <linux/input/sh_keysc.h> 32#include <linux/input/sh_keysc.h>
33#include <linux/mmc/host.h> 33#include <linux/mmc/host.h>
34#include <linux/mfd/sh_mobile_sdhi.h> 34#include <linux/mmc/sh_mobile_sdhi.h>
35#include <linux/gpio.h> 35#include <linux/gpio.h>
36#include <mach/sh7377.h> 36#include <mach/sh7377.h>
37#include <mach/common.h> 37#include <mach/common.h>
@@ -205,7 +205,7 @@ static struct resource sdhi0_resources[] = {
205 [0] = { 205 [0] = {
206 .name = "SDHI0", 206 .name = "SDHI0",
207 .start = 0xe6d50000, 207 .start = 0xe6d50000,
208 .end = 0xe6d501ff, 208 .end = 0xe6d50nff,
209 .flags = IORESOURCE_MEM, 209 .flags = IORESOURCE_MEM,
210 }, 210 },
211 [1] = { 211 [1] = {
@@ -232,7 +232,7 @@ static struct resource sdhi1_resources[] = {
232 [0] = { 232 [0] = {
233 .name = "SDHI1", 233 .name = "SDHI1",
234 .start = 0xe6d60000, 234 .start = 0xe6d60000,
235 .end = 0xe6d601ff, 235 .end = 0xe6d600ff,
236 .flags = IORESOURCE_MEM, 236 .flags = IORESOURCE_MEM,
237 }, 237 },
238 [1] = { 238 [1] = {
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 1a63c213e45d..7da2ca24229d 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -32,10 +32,10 @@
32#include <linux/io.h> 32#include <linux/io.h>
33#include <linux/i2c.h> 33#include <linux/i2c.h>
34#include <linux/leds.h> 34#include <linux/leds.h>
35#include <linux/mfd/sh_mobile_sdhi.h>
36#include <linux/mfd/tmio.h> 35#include <linux/mfd/tmio.h>
37#include <linux/mmc/host.h> 36#include <linux/mmc/host.h>
38#include <linux/mmc/sh_mmcif.h> 37#include <linux/mmc/sh_mmcif.h>
38#include <linux/mmc/sh_mobile_sdhi.h>
39#include <linux/mtd/mtd.h> 39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h> 40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h> 41#include <linux/mtd/physmap.h>
@@ -295,6 +295,18 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
295 }, 295 },
296}; 296};
297 297
298static int mackerel_set_brightness(void *board_data, int brightness)
299{
300 gpio_set_value(GPIO_PORT31, brightness);
301
302 return 0;
303}
304
305static int mackerel_get_brightness(void *board_data)
306{
307 return gpio_get_value(GPIO_PORT31);
308}
309
298static struct sh_mobile_lcdc_info lcdc_info = { 310static struct sh_mobile_lcdc_info lcdc_info = {
299 .clock_source = LCDC_CLK_BUS, 311 .clock_source = LCDC_CLK_BUS,
300 .ch[0] = { 312 .ch[0] = {
@@ -307,6 +319,14 @@ static struct sh_mobile_lcdc_info lcdc_info = {
307 .flags = 0, 319 .flags = 0,
308 .lcd_size_cfg.width = 152, 320 .lcd_size_cfg.width = 152,
309 .lcd_size_cfg.height = 91, 321 .lcd_size_cfg.height = 91,
322 .board_cfg = {
323 .set_brightness = mackerel_set_brightness,
324 .get_brightness = mackerel_get_brightness,
325 },
326 .bl_info = {
327 .name = "sh_mobile_lcdc_bl",
328 .max_brightness = 1,
329 },
310 } 330 }
311}; 331};
312 332
@@ -403,7 +423,7 @@ static struct platform_device fsi_hdmi_device = {
403 .name = "sh_fsi2_b_hdmi", 423 .name = "sh_fsi2_b_hdmi",
404}; 424};
405 425
406static int __init hdmi_init_pm_clock(void) 426static void __init hdmi_init_pm_clock(void)
407{ 427{
408 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); 428 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
409 int ret; 429 int ret;
@@ -447,17 +467,13 @@ static int __init hdmi_init_pm_clock(void)
447 pr_debug("PLLC2 set frequency %lu\n", rate); 467 pr_debug("PLLC2 set frequency %lu\n", rate);
448 468
449 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); 469 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
450 if (ret < 0) { 470 if (ret < 0)
451 pr_err("Cannot set HDMI parent: %d\n", ret); 471 pr_err("Cannot set HDMI parent: %d\n", ret);
452 goto out;
453 }
454 472
455out: 473out:
456 if (!IS_ERR(hdmi_ick)) 474 if (!IS_ERR(hdmi_ick))
457 clk_put(hdmi_ick); 475 clk_put(hdmi_ick);
458 return ret;
459} 476}
460device_initcall(hdmi_init_pm_clock);
461 477
462/* USB1 (Host) */ 478/* USB1 (Host) */
463static void usb1_host_port_power(int port, int power) 479static void usb1_host_port_power(int port, int power)
@@ -670,7 +686,7 @@ static struct resource sdhi0_resources[] = {
670 [0] = { 686 [0] = {
671 .name = "SDHI0", 687 .name = "SDHI0",
672 .start = 0xe6850000, 688 .start = 0xe6850000,
673 .end = 0xe68501ff, 689 .end = 0xe68500ff,
674 .flags = IORESOURCE_MEM, 690 .flags = IORESOURCE_MEM,
675 }, 691 },
676 [1] = { 692 [1] = {
@@ -705,7 +721,7 @@ static struct resource sdhi1_resources[] = {
705 [0] = { 721 [0] = {
706 .name = "SDHI1", 722 .name = "SDHI1",
707 .start = 0xe6860000, 723 .start = 0xe6860000,
708 .end = 0xe68601ff, 724 .end = 0xe68600ff,
709 .flags = IORESOURCE_MEM, 725 .flags = IORESOURCE_MEM,
710 }, 726 },
711 [1] = { 727 [1] = {
@@ -748,7 +764,7 @@ static struct resource sdhi2_resources[] = {
748 [0] = { 764 [0] = {
749 .name = "SDHI2", 765 .name = "SDHI2",
750 .start = 0xe6870000, 766 .start = 0xe6870000,
751 .end = 0xe68701ff, 767 .end = 0xe68700ff,
752 .flags = IORESOURCE_MEM, 768 .flags = IORESOURCE_MEM,
753 }, 769 },
754 [1] = { 770 [1] = {
@@ -901,7 +917,8 @@ static struct platform_device ceu_device = {
901 .num_resources = ARRAY_SIZE(ceu_resources), 917 .num_resources = ARRAY_SIZE(ceu_resources),
902 .resource = ceu_resources, 918 .resource = ceu_resources,
903 .dev = { 919 .dev = {
904 .platform_data = &sh_mobile_ceu_info, 920 .platform_data = &sh_mobile_ceu_info,
921 .coherent_dma_mask = 0xffffffff,
905 }, 922 },
906}; 923};
907 924
@@ -1059,7 +1076,7 @@ static void __init mackerel_init(void)
1059 gpio_request(GPIO_FN_LCDDCK, NULL); 1076 gpio_request(GPIO_FN_LCDDCK, NULL);
1060 1077
1061 gpio_request(GPIO_PORT31, NULL); /* backlight */ 1078 gpio_request(GPIO_PORT31, NULL); /* backlight */
1062 gpio_direction_output(GPIO_PORT31, 1); 1079 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
1063 1080
1064 gpio_request(GPIO_PORT151, NULL); /* LCDDON */ 1081 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1065 gpio_direction_output(GPIO_PORT151, 1); 1082 gpio_direction_output(GPIO_PORT151, 1);
@@ -1103,15 +1120,15 @@ static void __init mackerel_init(void)
1103 1120
1104 /* enable Keypad */ 1121 /* enable Keypad */
1105 gpio_request(GPIO_FN_IRQ9_42, NULL); 1122 gpio_request(GPIO_FN_IRQ9_42, NULL);
1106 set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH); 1123 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
1107 1124
1108 /* enable Touchscreen */ 1125 /* enable Touchscreen */
1109 gpio_request(GPIO_FN_IRQ7_40, NULL); 1126 gpio_request(GPIO_FN_IRQ7_40, NULL);
1110 set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); 1127 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1111 1128
1112 /* enable Accelerometer */ 1129 /* enable Accelerometer */
1113 gpio_request(GPIO_FN_IRQ21, NULL); 1130 gpio_request(GPIO_FN_IRQ21, NULL);
1114 set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); 1131 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1115 1132
1116 /* enable SDHI0 */ 1133 /* enable SDHI0 */
1117 gpio_request(GPIO_FN_SDHICD0, NULL); 1134 gpio_request(GPIO_FN_SDHICD0, NULL);
@@ -1197,6 +1214,8 @@ static void __init mackerel_init(void)
1197 sh7372_add_standard_devices(); 1214 sh7372_add_standard_devices();
1198 1215
1199 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices)); 1216 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
1217
1218 hdmi_init_pm_clock();
1200} 1219}
1201 1220
1202static void __init mackerel_timer_init(void) 1221static void __init mackerel_timer_init(void)
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
index a8d02be8d2b6..db59fdbda860 100644
--- a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
@@ -1,5 +1,5 @@
1#ifndef MMCIF_AP4EB_H 1#ifndef MMC_AP4EB_H
2#define MMCIF_AP4EB_H 2#define MMC_AP4EB_H
3 3
4#define PORT185CR (void __iomem *)0xe60520b9 4#define PORT185CR (void __iomem *)0xe60520b9
5#define PORT186CR (void __iomem *)0xe60520ba 5#define PORT186CR (void __iomem *)0xe60520ba
@@ -8,7 +8,7 @@
8 8
9#define PORTR191_160DR (void __iomem *)0xe6056014 9#define PORTR191_160DR (void __iomem *)0xe6056014
10 10
11static inline void mmcif_init_progress(void) 11static inline void mmc_init_progress(void)
12{ 12{
13 /* Initialise LEDS1-4 13 /* Initialise LEDS1-4
14 * registers: PORT185CR-PORT188CR (LED1-LED4 Control) 14 * registers: PORT185CR-PORT188CR (LED1-LED4 Control)
@@ -20,10 +20,10 @@ static inline void mmcif_init_progress(void)
20 __raw_writeb(0x10, PORT188CR); 20 __raw_writeb(0x10, PORT188CR);
21} 21}
22 22
23static inline void mmcif_update_progress(int n) 23static inline void mmc_update_progress(int n)
24{ 24{
25 __raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) | 25 __raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) |
26 (1 << (25 + n)), PORTR191_160DR); 26 (1 << (25 + n)), PORTR191_160DR);
27} 27}
28 28
29#endif /* MMCIF_AP4EB_H */ 29#endif /* MMC_AP4EB_H */
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h
index 4b4f6949a868..15d3a9efdec2 100644
--- a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h
@@ -1,5 +1,5 @@
1#ifndef MMCIF_MACKEREL_H 1#ifndef MMC_MACKEREL_H
2#define MMCIF_MACKEREL_H 2#define MMC_MACKEREL_H
3 3
4#define PORT0CR (void __iomem *)0xe6051000 4#define PORT0CR (void __iomem *)0xe6051000
5#define PORT1CR (void __iomem *)0xe6051001 5#define PORT1CR (void __iomem *)0xe6051001
@@ -9,7 +9,7 @@
9#define PORTR031_000DR (void __iomem *)0xe6055000 9#define PORTR031_000DR (void __iomem *)0xe6055000
10#define PORTL159_128DR (void __iomem *)0xe6054010 10#define PORTL159_128DR (void __iomem *)0xe6054010
11 11
12static inline void mmcif_init_progress(void) 12static inline void mmc_init_progress(void)
13{ 13{
14 /* Initialise LEDS0-3 14 /* Initialise LEDS0-3
15 * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control) 15 * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control)
@@ -21,7 +21,7 @@ static inline void mmcif_init_progress(void)
21 __raw_writeb(0x10, PORT159CR); 21 __raw_writeb(0x10, PORT159CR);
22} 22}
23 23
24static inline void mmcif_update_progress(int n) 24static inline void mmc_update_progress(int n)
25{ 25{
26 unsigned a = 0, b = 0; 26 unsigned a = 0, b = 0;
27 27
@@ -35,5 +35,4 @@ static inline void mmcif_update_progress(int n)
35 __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b, 35 __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b,
36 PORTL159_128DR); 36 PORTL159_128DR);
37} 37}
38 38#endif /* MMC_MACKEREL_H */
39#endif /* MMCIF_MACKEREL_H */
diff --git a/arch/arm/mach-shmobile/include/mach/mmcif.h b/arch/arm/mach-shmobile/include/mach/mmc.h
index f4dc3279cf03..21a59db638bb 100644
--- a/arch/arm/mach-shmobile/include/mach/mmcif.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc.h
@@ -1,5 +1,5 @@
1#ifndef MMCIF_H 1#ifndef MMC_H
2#define MMCIF_H 2#define MMC_H
3 3
4/************************************************** 4/**************************************************
5 * 5 *
@@ -8,11 +8,11 @@
8 **************************************************/ 8 **************************************************/
9 9
10#ifdef CONFIG_MACH_AP4EVB 10#ifdef CONFIG_MACH_AP4EVB
11#include "mach/mmcif-ap4eb.h" 11#include "mach/mmc-ap4eb.h"
12#elif CONFIG_MACH_MACKEREL 12#elif defined(CONFIG_MACH_MACKEREL)
13#include "mach/mmcif-mackerel.h" 13#include "mach/mmc-mackerel.h"
14#else 14#else
15#error "unsupported board." 15#error "unsupported board."
16#endif 16#endif
17 17
18#endif /* MMCIF_H */ 18#endif /* MMC_H */
diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h
index 6d6a205bcf90..9320aff0a20f 100644
--- a/arch/arm/mach-shmobile/include/mach/zboot.h
+++ b/arch/arm/mach-shmobile/include/mach/zboot.h
@@ -13,7 +13,7 @@
13#ifdef CONFIG_MACH_AP4EVB 13#ifdef CONFIG_MACH_AP4EVB
14#define MACH_TYPE MACH_TYPE_AP4EVB 14#define MACH_TYPE MACH_TYPE_AP4EVB
15#include "mach/head-ap4evb.txt" 15#include "mach/head-ap4evb.txt"
16#elif CONFIG_MACH_MACKEREL 16#elif defined(CONFIG_MACH_MACKEREL)
17#define MACH_TYPE MACH_TYPE_MACKEREL 17#define MACH_TYPE MACH_TYPE_MACKEREL
18#include "mach/head-mackerel.txt" 18#include "mach/head-mackerel.txt"
19#else 19#else
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
index 2fe9704d5ea1..cc442d198cdc 100644
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -421,7 +421,7 @@ static struct intc_desc intcs_desc __initdata = {
421 421
422static void intcs_demux(unsigned int irq, struct irq_desc *desc) 422static void intcs_demux(unsigned int irq, struct irq_desc *desc)
423{ 423{
424 void __iomem *reg = (void *)get_irq_data(irq); 424 void __iomem *reg = (void *)irq_get_handler_data(irq);
425 unsigned int evtcodeas = ioread32(reg); 425 unsigned int evtcodeas = ioread32(reg);
426 426
427 generic_handle_irq(intcs_evt2irq(evtcodeas)); 427 generic_handle_irq(intcs_evt2irq(evtcodeas));
@@ -435,6 +435,6 @@ void __init sh7367_init_irq(void)
435 register_intc_controller(&intcs_desc); 435 register_intc_controller(&intcs_desc);
436 436
437 /* demux using INTEVTSA */ 437 /* demux using INTEVTSA */
438 set_irq_data(evt2irq(0xf80), (void *)intevtsa); 438 irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
439 set_irq_chained_handler(evt2irq(0xf80), intcs_demux); 439 irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
440} 440}
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index ca5f9d17b39a..7a4960f9c1e3 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -601,7 +601,7 @@ static struct intc_desc intcs_desc __initdata = {
601 601
602static void intcs_demux(unsigned int irq, struct irq_desc *desc) 602static void intcs_demux(unsigned int irq, struct irq_desc *desc)
603{ 603{
604 void __iomem *reg = (void *)get_irq_data(irq); 604 void __iomem *reg = (void *)irq_get_handler_data(irq);
605 unsigned int evtcodeas = ioread32(reg); 605 unsigned int evtcodeas = ioread32(reg);
606 606
607 generic_handle_irq(intcs_evt2irq(evtcodeas)); 607 generic_handle_irq(intcs_evt2irq(evtcodeas));
@@ -615,6 +615,6 @@ void __init sh7372_init_irq(void)
615 register_intc_controller(&intcs_desc); 615 register_intc_controller(&intcs_desc);
616 616
617 /* demux using INTEVTSA */ 617 /* demux using INTEVTSA */
618 set_irq_data(evt2irq(0xf80), (void *)intevtsa); 618 irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
619 set_irq_chained_handler(evt2irq(0xf80), intcs_demux); 619 irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
620} 620}
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
index dd568382cc9f..fe45154ce660 100644
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -626,7 +626,7 @@ static struct intc_desc intcs_desc __initdata = {
626 626
627static void intcs_demux(unsigned int irq, struct irq_desc *desc) 627static void intcs_demux(unsigned int irq, struct irq_desc *desc)
628{ 628{
629 void __iomem *reg = (void *)get_irq_data(irq); 629 void __iomem *reg = (void *)irq_get_handler_data(irq);
630 unsigned int evtcodeas = ioread32(reg); 630 unsigned int evtcodeas = ioread32(reg);
631 631
632 generic_handle_irq(intcs_evt2irq(evtcodeas)); 632 generic_handle_irq(intcs_evt2irq(evtcodeas));
@@ -641,6 +641,6 @@ void __init sh7377_init_irq(void)
641 register_intc_controller(&intcs_desc); 641 register_intc_controller(&intcs_desc);
642 642
643 /* demux using INTEVTSA */ 643 /* demux using INTEVTSA */
644 set_irq_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); 644 irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa);
645 set_irq_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); 645 irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux);
646} 646}
diff --git a/arch/arm/mach-shmobile/localtimer.c b/arch/arm/mach-shmobile/localtimer.c
index 2111c28b724e..ad9ccc9900c8 100644
--- a/arch/arm/mach-shmobile/localtimer.c
+++ b/arch/arm/mach-shmobile/localtimer.c
@@ -18,8 +18,9 @@
18/* 18/*
19 * Setup the local clock events for a CPU. 19 * Setup the local clock events for a CPU.
20 */ 20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt) 21int __cpuinit local_timer_setup(struct clock_event_device *evt)
22{ 22{
23 evt->irq = 29; 23 evt->irq = 29;
24 twd_timer_setup(evt); 24 twd_timer_setup(evt);
25 return 0;
25} 26}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
index aa9231f4fc6e..209fa5c65d4c 100644
--- a/arch/arm/mach-tcc8k/irq.c
+++ b/arch/arm/mach-tcc8k/irq.c
@@ -102,10 +102,10 @@ void __init tcc8k_init_irq(void)
102 102
103 for (irqno = 0; irqno < NR_IRQS; irqno++) { 103 for (irqno = 0; irqno < NR_IRQS; irqno++) {
104 if (irqno < 32) 104 if (irqno < 32)
105 set_irq_chip(irqno, &tcc8000_irq_chip0); 105 irq_set_chip(irqno, &tcc8000_irq_chip0);
106 else 106 else
107 set_irq_chip(irqno, &tcc8000_irq_chip1); 107 irq_set_chip(irqno, &tcc8000_irq_chip1);
108 set_irq_handler(irqno, handle_level_irq); 108 irq_set_handler(irqno, handle_level_irq);
109 set_irq_flags(irqno, IRQF_VALID); 109 set_irq_flags(irqno, IRQF_VALID);
110 } 110 }
111} 111}
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 622a9ec1ff08..3cdeffc97b44 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -36,6 +36,11 @@ config MACH_KAEN
36 help 36 help
37 Support for the Kaen version of Seaboard 37 Support for the Kaen version of Seaboard
38 38
39config MACH_PAZ00
40 bool "Paz00 board"
41 help
42 Support for the Toshiba AC100/Dynabook AZ netbook
43
39config MACH_SEABOARD 44config MACH_SEABOARD
40 bool "Seaboard board" 45 bool "Seaboard board"
41 help 46 help
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9f7a7e1e0c38..1afe05038c27 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -22,6 +22,10 @@ obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony.o 22obj-${CONFIG_MACH_HARMONY} += board-harmony.o
23obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 23obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
24obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o 24obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o
25obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o
26
27obj-${CONFIG_MACH_PAZ00} += board-paz00.o
28obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o
25 29
26obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 30obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
27obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 31obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index f7e7d4514b6a..9c27b95b8d86 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -27,13 +27,29 @@
27 27
28#ifdef CONFIG_TEGRA_PCI 28#ifdef CONFIG_TEGRA_PCI
29 29
30/* GPIO 3 of the PMIC */
31#define EN_VDD_1V05_GPIO (TEGRA_NR_GPIOS + 2)
32
30static int __init harmony_pcie_init(void) 33static int __init harmony_pcie_init(void)
31{ 34{
35 struct regulator *regulator = NULL;
32 int err; 36 int err;
33 37
34 if (!machine_is_harmony()) 38 if (!machine_is_harmony())
35 return 0; 39 return 0;
36 40
41 err = gpio_request(EN_VDD_1V05_GPIO, "EN_VDD_1V05");
42 if (err)
43 return err;
44
45 gpio_direction_output(EN_VDD_1V05_GPIO, 1);
46
47 regulator = regulator_get(NULL, "pex_clk");
48 if (IS_ERR_OR_NULL(regulator))
49 goto err_reg;
50
51 regulator_enable(regulator);
52
37 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL); 53 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
38 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL); 54 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
39 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL); 55 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
@@ -49,9 +65,15 @@ err_pcie:
49 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE); 65 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
50 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE); 66 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
51 67
68 regulator_disable(regulator);
69 regulator_put(regulator);
70err_reg:
71 gpio_free(EN_VDD_1V05_GPIO);
72
52 return err; 73 return err;
53} 74}
54 75
55subsys_initcall(harmony_pcie_init); 76/* PCI should be initialized after I2C, mfd and regulators */
77subsys_initcall_sync(harmony_pcie_init);
56 78
57#endif 79#endif
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 98368d947be3..4d63e2e97a8d 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -27,11 +27,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
27 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 27 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
28 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 28 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
29 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 30 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 31 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
32 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 32 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
33 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 33 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 34 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 35 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -114,13 +114,13 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
114 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 114 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
115 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 115 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 117 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
118 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 118 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
119 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 119 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
120 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 120 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
121 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 121 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
122 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 122 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
123 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 123 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 124 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
125 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 125 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
126 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 126 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@@ -141,12 +141,16 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
141}; 141};
142 142
143static struct tegra_gpio_table gpio_table[] = { 143static struct tegra_gpio_table gpio_table[] = {
144 { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */ 144 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
145 { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */ 145 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
146 { .gpio = TEGRA_GPIO_PT3, .enable = true }, /* mmc2 pwr */ 146 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
147 { .gpio = TEGRA_GPIO_PH2, .enable = true }, /* mmc4 cd */ 147 { .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
148 { .gpio = TEGRA_GPIO_PH3, .enable = true }, /* mmc4 wp */ 148 { .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149 { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc4 pwr */ 149 { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
151 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
152 { .gpio = TEGRA_GPIO_INT_MIC_EN, .enable = true },
153 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
150}; 154};
151 155
152void harmony_pinmux_init(void) 156void harmony_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
new file mode 100644
index 000000000000..c84442cabe07
--- /dev/null
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -0,0 +1,117 @@
1/*
2 * Copyright (C) 2010 NVIDIA, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
16 * 02111-1307, USA
17 */
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/gpio.h>
21
22#include <linux/regulator/machine.h>
23#include <linux/mfd/tps6586x.h>
24
25#include <mach/irqs.h>
26
27#define PMC_CTRL 0x0
28#define PMC_CTRL_INTR_LOW (1 << 17)
29
30static struct regulator_consumer_supply tps658621_ldo0_supply[] = {
31 REGULATOR_SUPPLY("pex_clk", NULL),
32};
33
34static struct regulator_init_data ldo0_data = {
35 .constraints = {
36 .min_uV = 1250 * 1000,
37 .max_uV = 3300 * 1000,
38 .valid_modes_mask = (REGULATOR_MODE_NORMAL |
39 REGULATOR_MODE_STANDBY),
40 .valid_ops_mask = (REGULATOR_CHANGE_MODE |
41 REGULATOR_CHANGE_STATUS |
42 REGULATOR_CHANGE_VOLTAGE),
43 },
44 .num_consumer_supplies = ARRAY_SIZE(tps658621_ldo0_supply),
45 .consumer_supplies = tps658621_ldo0_supply,
46};
47
48#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \
49 static struct regulator_init_data _id##_data = { \
50 .constraints = { \
51 .min_uV = (_minmv)*1000, \
52 .max_uV = (_maxmv)*1000, \
53 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
54 REGULATOR_MODE_STANDBY), \
55 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
56 REGULATOR_CHANGE_STATUS | \
57 REGULATOR_CHANGE_VOLTAGE), \
58 }, \
59 }
60
61HARMONY_REGULATOR_INIT(sm0, 725, 1500);
62HARMONY_REGULATOR_INIT(sm1, 725, 1500);
63HARMONY_REGULATOR_INIT(sm2, 3000, 4550);
64HARMONY_REGULATOR_INIT(ldo1, 725, 1500);
65HARMONY_REGULATOR_INIT(ldo2, 725, 1500);
66HARMONY_REGULATOR_INIT(ldo3, 1250, 3300);
67HARMONY_REGULATOR_INIT(ldo4, 1700, 2475);
68HARMONY_REGULATOR_INIT(ldo5, 1250, 3300);
69HARMONY_REGULATOR_INIT(ldo6, 1250, 3300);
70HARMONY_REGULATOR_INIT(ldo7, 1250, 3300);
71HARMONY_REGULATOR_INIT(ldo8, 1250, 3300);
72HARMONY_REGULATOR_INIT(ldo9, 1250, 3300);
73
74#define TPS_REG(_id, _data) \
75 { \
76 .id = TPS6586X_ID_##_id, \
77 .name = "tps6586x-regulator", \
78 .platform_data = _data, \
79 }
80
81static struct tps6586x_subdev_info tps_devs[] = {
82 TPS_REG(SM_0, &sm0_data),
83 TPS_REG(SM_1, &sm1_data),
84 TPS_REG(SM_2, &sm2_data),
85 TPS_REG(LDO_0, &ldo0_data),
86 TPS_REG(LDO_1, &ldo1_data),
87 TPS_REG(LDO_2, &ldo2_data),
88 TPS_REG(LDO_3, &ldo3_data),
89 TPS_REG(LDO_4, &ldo4_data),
90 TPS_REG(LDO_5, &ldo5_data),
91 TPS_REG(LDO_6, &ldo6_data),
92 TPS_REG(LDO_7, &ldo7_data),
93 TPS_REG(LDO_8, &ldo8_data),
94 TPS_REG(LDO_9, &ldo9_data),
95};
96
97static struct tps6586x_platform_data tps_platform = {
98 .irq_base = TEGRA_NR_IRQS,
99 .num_subdevs = ARRAY_SIZE(tps_devs),
100 .subdevs = tps_devs,
101 .gpio_base = TEGRA_NR_GPIOS,
102};
103
104static struct i2c_board_info __initdata harmony_regulators[] = {
105 {
106 I2C_BOARD_INFO("tps6586x", 0x34),
107 .irq = INT_EXTERNAL_PMU,
108 .platform_data = &tps_platform,
109 },
110};
111
112int __init harmony_regulator_init(void)
113{
114 i2c_register_board_info(3, harmony_regulators, 1);
115
116 return 0;
117}
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 49224e936eb4..75c918a86a31 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -2,6 +2,7 @@
2 * arch/arm/mach-tegra/board-harmony.c 2 * arch/arm/mach-tegra/board-harmony.c
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2011 NVIDIA, Inc.
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 8 * License version 2, as published by the Free Software Foundation, and
@@ -22,12 +23,18 @@
22#include <linux/dma-mapping.h> 23#include <linux/dma-mapping.h>
23#include <linux/pda_power.h> 24#include <linux/pda_power.h>
24#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/gpio.h>
27#include <linux/i2c.h>
28#include <linux/i2c-tegra.h>
29
30#include <sound/wm8903.h>
25 31
26#include <asm/mach-types.h> 32#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
28#include <asm/mach/time.h> 34#include <asm/mach/time.h>
29#include <asm/setup.h> 35#include <asm/setup.h>
30 36
37#include <mach/harmony_audio.h>
31#include <mach/iomap.h> 38#include <mach/iomap.h>
32#include <mach/irqs.h> 39#include <mach/irqs.h>
33#include <mach/sdhci.h> 40#include <mach/sdhci.h>
@@ -60,11 +67,81 @@ static struct platform_device debug_uart = {
60 }, 67 },
61}; 68};
62 69
70static struct harmony_audio_platform_data harmony_audio_pdata = {
71 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
72 .gpio_hp_det = TEGRA_GPIO_HP_DET,
73 .gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN,
74 .gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN,
75};
76
77static struct platform_device harmony_audio_device = {
78 .name = "tegra-snd-harmony",
79 .id = 0,
80 .dev = {
81 .platform_data = &harmony_audio_pdata,
82 },
83};
84
85static struct tegra_i2c_platform_data harmony_i2c1_platform_data = {
86 .bus_clk_rate = 400000,
87};
88
89static struct tegra_i2c_platform_data harmony_i2c2_platform_data = {
90 .bus_clk_rate = 400000,
91};
92
93static struct tegra_i2c_platform_data harmony_i2c3_platform_data = {
94 .bus_clk_rate = 400000,
95};
96
97static struct tegra_i2c_platform_data harmony_dvc_platform_data = {
98 .bus_clk_rate = 400000,
99};
100
101static struct wm8903_platform_data harmony_wm8903_pdata = {
102 .irq_active_low = 0,
103 .micdet_cfg = 0,
104 .micdet_delay = 100,
105 .gpio_base = HARMONY_GPIO_WM8903(0),
106 .gpio_cfg = {
107 WM8903_GPIO_NO_CONFIG,
108 WM8903_GPIO_NO_CONFIG,
109 0,
110 WM8903_GPIO_NO_CONFIG,
111 WM8903_GPIO_NO_CONFIG,
112 },
113};
114
115static struct i2c_board_info __initdata wm8903_board_info = {
116 I2C_BOARD_INFO("wm8903", 0x1a),
117 .platform_data = &harmony_wm8903_pdata,
118 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
119};
120
121static void __init harmony_i2c_init(void)
122{
123 tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data;
124 tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data;
125 tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data;
126 tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data;
127
128 platform_device_register(&tegra_i2c_device1);
129 platform_device_register(&tegra_i2c_device2);
130 platform_device_register(&tegra_i2c_device3);
131 platform_device_register(&tegra_i2c_device4);
132
133 i2c_register_board_info(0, &wm8903_board_info, 1);
134}
135
63static struct platform_device *harmony_devices[] __initdata = { 136static struct platform_device *harmony_devices[] __initdata = {
64 &debug_uart, 137 &debug_uart,
65 &tegra_sdhci_device1, 138 &tegra_sdhci_device1,
66 &tegra_sdhci_device2, 139 &tegra_sdhci_device2,
67 &tegra_sdhci_device4, 140 &tegra_sdhci_device4,
141 &tegra_i2s_device1,
142 &tegra_das_device,
143 &tegra_pcm_device,
144 &harmony_audio_device,
68}; 145};
69 146
70static void __init tegra_harmony_fixup(struct machine_desc *desc, 147static void __init tegra_harmony_fixup(struct machine_desc *desc,
@@ -80,6 +157,10 @@ static void __init tegra_harmony_fixup(struct machine_desc *desc,
80static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = { 157static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
81 /* name parent rate enabled */ 158 /* name parent rate enabled */
82 { "uartd", "pll_p", 216000000, true }, 159 { "uartd", "pll_p", 216000000, true },
160 { "pll_a", "pll_p_out1", 56448000, true },
161 { "pll_a_out0", "pll_a", 11289600, true },
162 { "cdev1", NULL, 0, true },
163 { "i2s1", "pll_a_out0", 11289600, false},
83 { NULL, NULL, 0, 0}, 164 { NULL, NULL, 0, 0},
84}; 165};
85 166
@@ -91,15 +172,15 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = {
91}; 172};
92 173
93static struct tegra_sdhci_platform_data sdhci_pdata2 = { 174static struct tegra_sdhci_platform_data sdhci_pdata2 = {
94 .cd_gpio = TEGRA_GPIO_PI5, 175 .cd_gpio = TEGRA_GPIO_SD2_CD,
95 .wp_gpio = TEGRA_GPIO_PH1, 176 .wp_gpio = TEGRA_GPIO_SD2_WP,
96 .power_gpio = TEGRA_GPIO_PT3, 177 .power_gpio = TEGRA_GPIO_SD2_POWER,
97}; 178};
98 179
99static struct tegra_sdhci_platform_data sdhci_pdata4 = { 180static struct tegra_sdhci_platform_data sdhci_pdata4 = {
100 .cd_gpio = TEGRA_GPIO_PH2, 181 .cd_gpio = TEGRA_GPIO_SD4_CD,
101 .wp_gpio = TEGRA_GPIO_PH3, 182 .wp_gpio = TEGRA_GPIO_SD4_WP,
102 .power_gpio = TEGRA_GPIO_PI6, 183 .power_gpio = TEGRA_GPIO_SD4_POWER,
103 .is_8bit = 1, 184 .is_8bit = 1,
104}; 185};
105 186
@@ -114,6 +195,8 @@ static void __init tegra_harmony_init(void)
114 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; 195 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
115 196
116 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices)); 197 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
198 harmony_i2c_init();
199 harmony_regulator_init();
117} 200}
118 201
119MACHINE_START(HARMONY, "harmony") 202MACHINE_START(HARMONY, "harmony")
diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h
index 09ca7755dd55..1e57b071f52d 100644
--- a/arch/arm/mach-tegra/board-harmony.h
+++ b/arch/arm/mach-tegra/board-harmony.h
@@ -17,6 +17,21 @@
17#ifndef _MACH_TEGRA_BOARD_HARMONY_H 17#ifndef _MACH_TEGRA_BOARD_HARMONY_H
18#define _MACH_TEGRA_BOARD_HARMONY_H 18#define _MACH_TEGRA_BOARD_HARMONY_H
19 19
20#define HARMONY_GPIO_WM8903(_x_) (TEGRA_NR_GPIOS + (_x_))
21
22#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
23#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
24#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3
25#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
26#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
27#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
28#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3
29#define TEGRA_GPIO_SPKR_EN HARMONY_GPIO_WM8903(2)
30#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PW2
31#define TEGRA_GPIO_INT_MIC_EN TEGRA_GPIO_PX0
32#define TEGRA_GPIO_EXT_MIC_EN TEGRA_GPIO_PX1
33
20void harmony_pinmux_init(void); 34void harmony_pinmux_init(void);
35int harmony_regulator_init(void);
21 36
22#endif 37#endif
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
new file mode 100644
index 000000000000..2643d1bd568b
--- /dev/null
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -0,0 +1,157 @@
1/*
2 * arch/arm/mach-tegra/board-paz00-pinmux.c
3 *
4 * Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/gpio.h>
19#include <mach/pinmux.h>
20
21#include "gpio-names.h"
22#include "board-paz00.h"
23
24static struct tegra_pingroup_config paz00_pinmux[] = {
25 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
26 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
27 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
28 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
29 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
31 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
32 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
33 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
38 {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
39 {TEGRA_PINGROUP_DTA, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
40 {TEGRA_PINGROUP_DTB, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
41 {TEGRA_PINGROUP_DTC, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
42 {TEGRA_PINGROUP_DTD, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
43 {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
44 {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
45 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47 {TEGRA_PINGROUP_GMC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
48 {TEGRA_PINGROUP_GMD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
49 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
50 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
51 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
52 {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
53 {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
54 {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
55 {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_IRTX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
57 {TEGRA_PINGROUP_KBCA, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_KBCB, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
59 {TEGRA_PINGROUP_KBCC, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_KBCD, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
61 {TEGRA_PINGROUP_KBCE, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
62 {TEGRA_PINGROUP_KBCF, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
63 {TEGRA_PINGROUP_LCSN, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
64 {TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
65 {TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
67 {TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
70 {TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
71 {TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
72 {TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
73 {TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
74 {TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
75 {TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
76 {TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
77 {TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
78 {TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
79 {TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
80 {TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
81 {TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
82 {TEGRA_PINGROUP_LDC, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
83 {TEGRA_PINGROUP_LDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
84 {TEGRA_PINGROUP_LHP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
85 {TEGRA_PINGROUP_LHP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
86 {TEGRA_PINGROUP_LHP2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
87 {TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
88 {TEGRA_PINGROUP_LM0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
89 {TEGRA_PINGROUP_LM1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
90 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
91 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
92 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
93 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
94 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
95 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
96 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
97 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
98 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
99 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
100 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
101 {TEGRA_PINGROUP_LVP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
102 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
103 {TEGRA_PINGROUP_OWC, TEGRA_MUX_OWR, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
104 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
105 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
106 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
107 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
108 {TEGRA_PINGROUP_SDC, TEGRA_MUX_TWC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
109 {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
112 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
114 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
117 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
119 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_SPID, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
121 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
122 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_RSVD4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
123 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
124 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
125 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_UAD, TEGRA_MUX_SPDIF, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
129 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
130 {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
131 {TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
132 {TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
133 {TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135 {TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136 {TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137 {TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
138 {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
139 {TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
140 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
141};
142
143static struct tegra_gpio_table gpio_table[] = {
144 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
145 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
146 { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true },
147 { .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
148 { .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149 { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150};
151
152void paz00_pinmux_init(void)
153{
154 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
155
156 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
157}
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
new file mode 100644
index 000000000000..57e50a823eec
--- /dev/null
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -0,0 +1,128 @@
1/*
2 * arch/arm/mach-tegra/board-paz00.c
3 *
4 * Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
5 *
6 * Based on board-harmony.c
7 * Copyright (C) 2010 Google, Inc.
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/serial_8250.h>
24#include <linux/clk.h>
25#include <linux/dma-mapping.h>
26#include <linux/pda_power.h>
27#include <linux/io.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/time.h>
32#include <asm/setup.h>
33
34#include <mach/iomap.h>
35#include <mach/irqs.h>
36#include <mach/sdhci.h>
37
38#include "board.h"
39#include "board-paz00.h"
40#include "clock.h"
41#include "devices.h"
42#include "gpio-names.h"
43
44static struct plat_serial8250_port debug_uart_platform_data[] = {
45 {
46 .membase = IO_ADDRESS(TEGRA_UARTD_BASE),
47 .mapbase = TEGRA_UARTD_BASE,
48 .irq = INT_UARTD,
49 .flags = UPF_BOOT_AUTOCONF,
50 .iotype = UPIO_MEM,
51 .regshift = 2,
52 .uartclk = 216000000,
53 }, {
54 .flags = 0
55 }
56};
57
58static struct platform_device debug_uart = {
59 .name = "serial8250",
60 .id = PLAT8250_DEV_PLATFORM,
61 .dev = {
62 .platform_data = debug_uart_platform_data,
63 },
64};
65
66static struct platform_device *paz00_devices[] __initdata = {
67 &debug_uart,
68 &tegra_sdhci_device1,
69 &tegra_sdhci_device2,
70 &tegra_sdhci_device4,
71};
72
73static void __init tegra_paz00_fixup(struct machine_desc *desc,
74 struct tag *tags, char **cmdline, struct meminfo *mi)
75{
76 mi->nr_banks = 1;
77 mi->bank[0].start = PHYS_OFFSET;
78 mi->bank[0].size = 448 * SZ_1M;
79}
80
81static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
82 /* name parent rate enabled */
83 { "uartd", "pll_p", 216000000, true },
84 { NULL, NULL, 0, 0},
85};
86
87
88static struct tegra_sdhci_platform_data sdhci_pdata1 = {
89 .cd_gpio = TEGRA_GPIO_SD1_CD,
90 .wp_gpio = TEGRA_GPIO_SD1_WP,
91 .power_gpio = TEGRA_GPIO_SD1_POWER,
92};
93
94static struct tegra_sdhci_platform_data sdhci_pdata2 = {
95 .cd_gpio = -1,
96 .wp_gpio = -1,
97 .power_gpio = -1,
98};
99
100static struct tegra_sdhci_platform_data sdhci_pdata4 = {
101 .cd_gpio = TEGRA_GPIO_SD4_CD,
102 .wp_gpio = TEGRA_GPIO_SD4_WP,
103 .power_gpio = TEGRA_GPIO_SD4_POWER,
104 .is_8bit = 1,
105};
106
107static void __init tegra_paz00_init(void)
108{
109 tegra_clk_init_from_table(paz00_clk_init_table);
110
111 paz00_pinmux_init();
112
113 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
114 tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
115 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
116
117 platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
118}
119
120MACHINE_START(PAZ00, "paz00")
121 .boot_params = 0x00000100,
122 .fixup = tegra_paz00_fixup,
123 .map_io = tegra_map_common_io,
124 .init_early = tegra_init_early,
125 .init_irq = tegra_init_irq,
126 .timer = &tegra_timer,
127 .init_machine = tegra_paz00_init,
128MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
new file mode 100644
index 000000000000..da193ca76d3b
--- /dev/null
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -0,0 +1,29 @@
1/*
2 * arch/arm/mach-tegra/board-paz00.h
3 *
4 * Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef _MACH_TEGRA_BOARD_PAZ00_H
18#define _MACH_TEGRA_BOARD_PAZ00_H
19
20#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
21#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
22#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3
23#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
24#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
25#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
26
27void paz00_pinmux_init(void);
28
29#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index 2d6ad83ed4b2..0bda495e9742 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -161,11 +161,12 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
161 161
162 162
163static struct tegra_gpio_table gpio_table[] = { 163static struct tegra_gpio_table gpio_table[] = {
164 { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */ 164 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
165 { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */ 165 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
166 { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc2 pwr */ 166 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
167 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, /* lid switch */ 167 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
168 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, /* power key */ 168 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
169 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
169}; 170};
170 171
171void __init seaboard_pinmux_init(void) 172void __init seaboard_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index 6ca9e61f6cd0..a8d7ace9f958 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -18,9 +18,12 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/serial_8250.h> 20#include <linux/serial_8250.h>
21#include <linux/i2c.h>
22#include <linux/i2c-tegra.h>
21#include <linux/delay.h> 23#include <linux/delay.h>
22#include <linux/input.h> 24#include <linux/input.h>
23#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/gpio.h>
24#include <linux/gpio_keys.h> 27#include <linux/gpio_keys.h>
25 28
26#include <mach/iomap.h> 29#include <mach/iomap.h>
@@ -63,6 +66,22 @@ static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
63 { NULL, NULL, 0, 0}, 66 { NULL, NULL, 0, 0},
64}; 67};
65 68
69static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = {
70 .bus_clk_rate = 400000.
71};
72
73static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = {
74 .bus_clk_rate = 400000,
75};
76
77static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = {
78 .bus_clk_rate = 400000,
79};
80
81static struct tegra_i2c_platform_data seaboard_dvc_platform_data = {
82 .bus_clk_rate = 400000,
83};
84
66static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { 85static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
67 { 86 {
68 .code = SW_LID, 87 .code = SW_LID,
@@ -103,9 +122,9 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = {
103}; 122};
104 123
105static struct tegra_sdhci_platform_data sdhci_pdata3 = { 124static struct tegra_sdhci_platform_data sdhci_pdata3 = {
106 .cd_gpio = TEGRA_GPIO_PI5, 125 .cd_gpio = TEGRA_GPIO_SD2_CD,
107 .wp_gpio = TEGRA_GPIO_PH1, 126 .wp_gpio = TEGRA_GPIO_SD2_WP,
108 .power_gpio = TEGRA_GPIO_PI6, 127 .power_gpio = TEGRA_GPIO_SD2_POWER,
109}; 128};
110 129
111static struct tegra_sdhci_platform_data sdhci_pdata4 = { 130static struct tegra_sdhci_platform_data sdhci_pdata4 = {
@@ -124,7 +143,36 @@ static struct platform_device *seaboard_devices[] __initdata = {
124 &seaboard_gpio_keys_device, 143 &seaboard_gpio_keys_device,
125}; 144};
126 145
127static void __init __tegra_seaboard_init(void) 146static struct i2c_board_info __initdata isl29018_device = {
147 I2C_BOARD_INFO("isl29018", 0x44),
148 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ),
149};
150
151static struct i2c_board_info __initdata adt7461_device = {
152 I2C_BOARD_INFO("adt7461", 0x4c),
153};
154
155static void __init seaboard_i2c_init(void)
156{
157 gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
158 gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
159
160 i2c_register_board_info(0, &isl29018_device, 1);
161
162 i2c_register_board_info(4, &adt7461_device, 1);
163
164 tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data;
165 tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data;
166 tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data;
167 tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data;
168
169 platform_device_register(&tegra_i2c_device1);
170 platform_device_register(&tegra_i2c_device2);
171 platform_device_register(&tegra_i2c_device3);
172 platform_device_register(&tegra_i2c_device4);
173}
174
175static void __init seaboard_common_init(void)
128{ 176{
129 seaboard_pinmux_init(); 177 seaboard_pinmux_init();
130 178
@@ -144,7 +192,9 @@ static void __init tegra_seaboard_init(void)
144 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE; 192 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
145 debug_uart_platform_data[0].irq = INT_UARTD; 193 debug_uart_platform_data[0].irq = INT_UARTD;
146 194
147 __tegra_seaboard_init(); 195 seaboard_common_init();
196
197 seaboard_i2c_init();
148} 198}
149 199
150static void __init tegra_kaen_init(void) 200static void __init tegra_kaen_init(void)
@@ -154,7 +204,9 @@ static void __init tegra_kaen_init(void)
154 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; 204 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
155 debug_uart_platform_data[0].irq = INT_UARTB; 205 debug_uart_platform_data[0].irq = INT_UARTB;
156 206
157 __tegra_seaboard_init(); 207 seaboard_common_init();
208
209 seaboard_i2c_init();
158} 210}
159 211
160static void __init tegra_wario_init(void) 212static void __init tegra_wario_init(void)
@@ -164,7 +216,9 @@ static void __init tegra_wario_init(void)
164 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; 216 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
165 debug_uart_platform_data[0].irq = INT_UARTB; 217 debug_uart_platform_data[0].irq = INT_UARTB;
166 218
167 __tegra_seaboard_init(); 219 seaboard_common_init();
220
221 seaboard_i2c_init();
168} 222}
169 223
170 224
diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
index a098e3599731..d8415e1a8434 100644
--- a/arch/arm/mach-tegra/board-seaboard.h
+++ b/arch/arm/mach-tegra/board-seaboard.h
@@ -17,6 +17,9 @@
17#ifndef _MACH_TEGRA_BOARD_SEABOARD_H 17#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
18#define _MACH_TEGRA_BOARD_SEABOARD_H 18#define _MACH_TEGRA_BOARD_SEABOARD_H
19 19
20#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
21#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
22#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6
20#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7 23#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
21#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0 24#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
22#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2 25#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 6d4fc9f7f1fb..13534fa08abf 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -16,8 +16,11 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19
19#include <mach/pinmux.h> 20#include <mach/pinmux.h>
21#include <mach/gpio.h>
20 22
23#include "gpio-names.h"
21#include "board-trimslice.h" 24#include "board-trimslice.h"
22 25
23static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { 26static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
@@ -139,7 +142,13 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
139 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 142 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
140}; 143};
141 144
145static struct tegra_gpio_table gpio_table[] = {
146 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
147 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
148};
149
142void __init trimslice_pinmux_init(void) 150void __init trimslice_pinmux_init(void)
143{ 151{
144 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); 152 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
153 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
145} 154}
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 7be7d4acd02f..cda4cfd78e84 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -29,9 +29,12 @@
29#include <asm/setup.h> 29#include <asm/setup.h>
30 30
31#include <mach/iomap.h> 31#include <mach/iomap.h>
32#include <mach/sdhci.h>
32 33
33#include "board.h" 34#include "board.h"
34#include "clock.h" 35#include "clock.h"
36#include "devices.h"
37#include "gpio-names.h"
35 38
36#include "board-trimslice.h" 39#include "board-trimslice.h"
37 40
@@ -56,9 +59,22 @@ static struct platform_device debug_uart = {
56 .platform_data = debug_uart_platform_data, 59 .platform_data = debug_uart_platform_data,
57 }, 60 },
58}; 61};
62static struct tegra_sdhci_platform_data sdhci_pdata1 = {
63 .cd_gpio = -1,
64 .wp_gpio = -1,
65 .power_gpio = -1,
66};
67
68static struct tegra_sdhci_platform_data sdhci_pdata4 = {
69 .cd_gpio = TRIMSLICE_GPIO_SD4_CD,
70 .wp_gpio = TRIMSLICE_GPIO_SD4_WP,
71 .power_gpio = -1,
72};
59 73
60static struct platform_device *trimslice_devices[] __initdata = { 74static struct platform_device *trimslice_devices[] __initdata = {
61 &debug_uart, 75 &debug_uart,
76 &tegra_sdhci_device1,
77 &tegra_sdhci_device4,
62}; 78};
63 79
64static void __init tegra_trimslice_fixup(struct machine_desc *desc, 80static void __init tegra_trimslice_fixup(struct machine_desc *desc,
@@ -92,6 +108,9 @@ static void __init tegra_trimslice_init(void)
92 108
93 trimslice_pinmux_init(); 109 trimslice_pinmux_init();
94 110
111 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
112 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
113
95 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); 114 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
96} 115}
97 116
diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
index 16ec0f0d3bb1..e8ef6291c6f1 100644
--- a/arch/arm/mach-tegra/board-trimslice.h
+++ b/arch/arm/mach-tegra/board-trimslice.h
@@ -17,6 +17,9 @@
17#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H 17#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
18#define _MACH_TEGRA_BOARD_TRIMSLICE_H 18#define _MACH_TEGRA_BOARD_TRIMSLICE_H
19 19
20#define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */
21#define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */
22
20void trimslice_pinmux_init(void); 23void trimslice_pinmux_init(void);
21 24
22#endif 25#endif
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 682e6d33108c..1528f9daef1f 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -503,3 +503,73 @@ struct platform_device tegra_uarte_device = {
503 .coherent_dma_mask = DMA_BIT_MASK(32), 503 .coherent_dma_mask = DMA_BIT_MASK(32),
504 }, 504 },
505}; 505};
506
507static struct resource i2s_resource1[] = {
508 [0] = {
509 .start = INT_I2S1,
510 .end = INT_I2S1,
511 .flags = IORESOURCE_IRQ
512 },
513 [1] = {
514 .start = TEGRA_DMA_REQ_SEL_I2S_1,
515 .end = TEGRA_DMA_REQ_SEL_I2S_1,
516 .flags = IORESOURCE_DMA
517 },
518 [2] = {
519 .start = TEGRA_I2S1_BASE,
520 .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
521 .flags = IORESOURCE_MEM
522 }
523};
524
525static struct resource i2s_resource2[] = {
526 [0] = {
527 .start = INT_I2S2,
528 .end = INT_I2S2,
529 .flags = IORESOURCE_IRQ
530 },
531 [1] = {
532 .start = TEGRA_DMA_REQ_SEL_I2S2_1,
533 .end = TEGRA_DMA_REQ_SEL_I2S2_1,
534 .flags = IORESOURCE_DMA
535 },
536 [2] = {
537 .start = TEGRA_I2S2_BASE,
538 .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
539 .flags = IORESOURCE_MEM
540 }
541};
542
543struct platform_device tegra_i2s_device1 = {
544 .name = "tegra-i2s",
545 .id = 0,
546 .resource = i2s_resource1,
547 .num_resources = ARRAY_SIZE(i2s_resource1),
548};
549
550struct platform_device tegra_i2s_device2 = {
551 .name = "tegra-i2s",
552 .id = 1,
553 .resource = i2s_resource2,
554 .num_resources = ARRAY_SIZE(i2s_resource2),
555};
556
557static struct resource tegra_das_resources[] = {
558 [0] = {
559 .start = TEGRA_APB_MISC_DAS_BASE,
560 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
561 .flags = IORESOURCE_MEM,
562 },
563};
564
565struct platform_device tegra_das_device = {
566 .name = "tegra-das",
567 .id = -1,
568 .num_resources = ARRAY_SIZE(tegra_das_resources),
569 .resource = tegra_das_resources,
570};
571
572struct platform_device tegra_pcm_device = {
573 .name = "tegra-pcm-audio",
574 .id = -1,
575};
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
index 888810c37ee9..4a7dc0a097d6 100644
--- a/arch/arm/mach-tegra/devices.h
+++ b/arch/arm/mach-tegra/devices.h
@@ -42,5 +42,9 @@ extern struct platform_device tegra_uartc_device;
42extern struct platform_device tegra_uartd_device; 42extern struct platform_device tegra_uartd_device;
43extern struct platform_device tegra_uarte_device; 43extern struct platform_device tegra_uarte_device;
44extern struct platform_device tegra_pmu_device; 44extern struct platform_device tegra_pmu_device;
45extern struct platform_device tegra_i2s_device1;
46extern struct platform_device tegra_i2s_device2;
47extern struct platform_device tegra_das_device;
48extern struct platform_device tegra_pcm_device;
45 49
46#endif 50#endif
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index e945ae28ee77..f4ef5eb317bd 100644
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -223,7 +223,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
223 * - Change the source selector to invalid to stop the DMA from 223 * - Change the source selector to invalid to stop the DMA from
224 * FIFO to memory. 224 * FIFO to memory.
225 * - Read the status register to know the number of pending 225 * - Read the status register to know the number of pending
226 * bytes to be transfered. 226 * bytes to be transferred.
227 * - Finally stop or program the DMA to the next buffer in the 227 * - Finally stop or program the DMA to the next buffer in the
228 * list. 228 * list.
229 */ 229 */
@@ -244,7 +244,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
244 if (status & STA_BUSY) 244 if (status & STA_BUSY)
245 req->bytes_transferred -= to_transfer; 245 req->bytes_transferred -= to_transfer;
246 246
247 /* In continous transfer mode, DMA only tracks the count of the 247 /* In continuous transfer mode, DMA only tracks the count of the
248 * half DMA buffer. So, if the DMA already finished half the DMA 248 * half DMA buffer. So, if the DMA already finished half the DMA
249 * then add the half buffer to the completed count. 249 * then add the half buffer to the completed count.
250 * 250 *
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index 12090a2cf3e0..65a1aba6823d 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -208,9 +208,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
208 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 208 spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
209 209
210 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 210 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
211 __set_irq_handler_unlocked(d->irq, handle_level_irq); 211 __irq_set_handler_locked(d->irq, handle_level_irq);
212 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 212 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
213 __set_irq_handler_unlocked(d->irq, handle_edge_irq); 213 __irq_set_handler_locked(d->irq, handle_edge_irq);
214 214
215 return 0; 215 return 0;
216} 216}
@@ -224,7 +224,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
224 224
225 desc->irq_data.chip->irq_ack(&desc->irq_data); 225 desc->irq_data.chip->irq_ack(&desc->irq_data);
226 226
227 bank = get_irq_data(irq); 227 bank = irq_get_handler_data(irq);
228 228
229 for (port = 0; port < 4; port++) { 229 for (port = 0; port < 4; port++) {
230 int gpio = tegra_gpio_compose(bank->bank, port, 0); 230 int gpio = tegra_gpio_compose(bank->bank, port, 0);
@@ -257,7 +257,8 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
257void tegra_gpio_resume(void) 257void tegra_gpio_resume(void)
258{ 258{
259 unsigned long flags; 259 unsigned long flags;
260 int b, p, i; 260 int b;
261 int p;
261 262
262 local_irq_save(flags); 263 local_irq_save(flags);
263 264
@@ -275,31 +276,13 @@ void tegra_gpio_resume(void)
275 } 276 }
276 277
277 local_irq_restore(flags); 278 local_irq_restore(flags);
278
279 for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
280 struct irq_desc *desc = irq_to_desc(i);
281 if (!desc || (desc->status & IRQ_WAKEUP))
282 continue;
283 enable_irq(i);
284 }
285} 279}
286 280
287void tegra_gpio_suspend(void) 281void tegra_gpio_suspend(void)
288{ 282{
289 unsigned long flags; 283 unsigned long flags;
290 int b, p, i; 284 int b;
291 285 int p;
292 for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
293 struct irq_desc *desc = irq_to_desc(i);
294 if (!desc)
295 continue;
296 if (desc->status & IRQ_WAKEUP) {
297 int gpio = i - INT_GPIO_BASE;
298 pr_debug("gpio %d.%d is wakeup\n", gpio/8, gpio&7);
299 continue;
300 }
301 disable_irq(i);
302 }
303 286
304 local_irq_save(flags); 287 local_irq_save(flags);
305 for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { 288 for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) {
@@ -320,7 +303,7 @@ void tegra_gpio_suspend(void)
320static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable) 303static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
321{ 304{
322 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); 305 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
323 return set_irq_wake(bank->irq, enable); 306 return irq_set_irq_wake(bank->irq, enable);
324} 307}
325#endif 308#endif
326 309
@@ -359,18 +342,18 @@ static int __init tegra_gpio_init(void)
359 for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { 342 for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
360 bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; 343 bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))];
361 344
362 lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class); 345 irq_set_lockdep_class(i, &gpio_lock_class);
363 set_irq_chip_data(i, bank); 346 irq_set_chip_data(i, bank);
364 set_irq_chip(i, &tegra_gpio_irq_chip); 347 irq_set_chip_and_handler(i, &tegra_gpio_irq_chip,
365 set_irq_handler(i, handle_simple_irq); 348 handle_simple_irq);
366 set_irq_flags(i, IRQF_VALID); 349 set_irq_flags(i, IRQF_VALID);
367 } 350 }
368 351
369 for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { 352 for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) {
370 bank = &tegra_gpio_banks[i]; 353 bank = &tegra_gpio_banks[i];
371 354
372 set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler); 355 irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler);
373 set_irq_data(bank->irq, bank); 356 irq_set_handler_data(bank->irq, bank);
374 357
375 for (j = 0; j < 4; j++) 358 for (j = 0; j < 4; j++)
376 spin_lock_init(&bank->lvl_lock[j]); 359 spin_lock_init(&bank->lvl_lock[j]);
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
index 39011bd9a925..d0132e8031a1 100644
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ b/arch/arm/mach-tegra/include/mach/dma.h
@@ -92,11 +92,11 @@ struct tegra_dma_req {
92 /* This is a called from the DMA ISR context when the DMA is still in 92 /* This is a called from the DMA ISR context when the DMA is still in
93 * progress and is actively filling same buffer. 93 * progress and is actively filling same buffer.
94 * 94 *
95 * In case of continous mode receive, this threshold is 1/2 the buffer 95 * In case of continuous mode receive, this threshold is 1/2 the buffer
96 * size. In other cases, this will not even be called as there is no 96 * size. In other cases, this will not even be called as there is no
97 * hardware support for it. 97 * hardware support for it.
98 * 98 *
99 * In the case of continous mode receive, if there is next req already 99 * In the case of continuous mode receive, if there is next req already
100 * queued, DMA programs the HW to use that req when this req is 100 * queued, DMA programs the HW to use that req when this req is
101 * completed. If there is no "next req" queued, then DMA ISR doesn't do 101 * completed. If there is no "next req" queued, then DMA ISR doesn't do
102 * anything before calling this callback. 102 * anything before calling this callback.
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index 691cdabd69cf..19dec3ac0854 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -122,6 +122,9 @@
122#define TEGRA_APB_MISC_BASE 0x70000000 122#define TEGRA_APB_MISC_BASE 0x70000000
123#define TEGRA_APB_MISC_SIZE SZ_4K 123#define TEGRA_APB_MISC_SIZE SZ_4K
124 124
125#define TEGRA_APB_MISC_DAS_BASE 0x70000c00
126#define TEGRA_APB_MISC_DAS_SIZE SZ_128
127
125#define TEGRA_AC97_BASE 0x70002000 128#define TEGRA_AC97_BASE 0x70002000
126#define TEGRA_AC97_SIZE SZ_512 129#define TEGRA_AC97_SIZE SZ_512
127 130
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index dfbc219ea492..4330d8995b27 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -144,7 +144,7 @@ void __init tegra_init_irq(void)
144 gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 144 gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
145 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 145 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
146 146
147 gic = get_irq_chip(29); 147 gic = irq_get_chip(29);
148 tegra_gic_unmask_irq = gic->irq_unmask; 148 tegra_gic_unmask_irq = gic->irq_unmask;
149 tegra_gic_mask_irq = gic->irq_mask; 149 tegra_gic_mask_irq = gic->irq_mask;
150 tegra_gic_ack_irq = gic->irq_ack; 150 tegra_gic_ack_irq = gic->irq_ack;
@@ -154,8 +154,7 @@ void __init tegra_init_irq(void)
154 154
155 for (i = 0; i < INT_MAIN_NR; i++) { 155 for (i = 0; i < INT_MAIN_NR; i++) {
156 irq = INT_PRI_BASE + i; 156 irq = INT_PRI_BASE + i;
157 set_irq_chip(irq, &tegra_irq); 157 irq_set_chip_and_handler(irq, &tegra_irq, handle_level_irq);
158 set_irq_handler(irq, handle_level_irq);
159 set_irq_flags(irq, IRQF_VALID); 158 set_irq_flags(irq, IRQF_VALID);
160 } 159 }
161} 160}
diff --git a/arch/arm/mach-tegra/localtimer.c b/arch/arm/mach-tegra/localtimer.c
index f81ca7cbbc1f..e91d681d45a2 100644
--- a/arch/arm/mach-tegra/localtimer.c
+++ b/arch/arm/mach-tegra/localtimer.c
@@ -18,8 +18,9 @@
18/* 18/*
19 * Setup the local clock events for a CPU. 19 * Setup the local clock events for a CPU.
20 */ 20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt) 21int __cpuinit local_timer_setup(struct clock_event_device *evt)
22{ 22{
23 evt->irq = IRQ_LOCALTIMER; 23 evt->irq = IRQ_LOCALTIMER;
24 twd_timer_setup(evt); 24 twd_timer_setup(evt);
25 return 0;
25} 26}
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 3b6f290fde4c..bb618075fab6 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -1362,14 +1362,15 @@ static int tegra_clk_shared_bus_set_rate(struct clk *c, unsigned long rate)
1362{ 1362{
1363 unsigned long flags; 1363 unsigned long flags;
1364 int ret; 1364 int ret;
1365 long new_rate = rate;
1365 1366
1366 rate = clk_round_rate(c->parent, rate); 1367 new_rate = clk_round_rate(c->parent, new_rate);
1367 if (rate < 0) 1368 if (new_rate < 0)
1368 return rate; 1369 return new_rate;
1369 1370
1370 spin_lock_irqsave(&c->parent->spinlock, flags); 1371 spin_lock_irqsave(&c->parent->spinlock, flags);
1371 1372
1372 c->u.shared_bus_user.rate = rate; 1373 c->u.shared_bus_user.rate = new_rate;
1373 ret = tegra_clk_shared_bus_update(c->parent); 1374 ret = tegra_clk_shared_bus_update(c->parent);
1374 1375
1375 spin_unlock_irqrestore(&c->parent->spinlock, flags); 1376 spin_unlock_irqrestore(&c->parent->spinlock, flags);
diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c
index fabcc49abe80..5535dd0a78c9 100644
--- a/arch/arm/mach-u300/clock.c
+++ b/arch/arm/mach-u300/clock.c
@@ -263,7 +263,7 @@ static void disable_i2s0_vcxo(void)
263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); 263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
264 val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO; 264 val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO;
265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
266 /* Deactivate VCXO if noone else is using VCXO */ 266 /* Deactivate VCXO if no one else is using VCXO */
267 if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO)) 267 if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO))
268 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; 268 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON;
269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
@@ -283,7 +283,7 @@ static void disable_i2s1_vcxo(void)
283 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); 283 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
284 val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO; 284 val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO;
285 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 285 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
286 /* Deactivate VCXO if noone else is using VCXO */ 286 /* Deactivate VCXO if no one else is using VCXO */
287 if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO)) 287 if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO))
288 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; 288 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON;
289 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 289 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
@@ -649,7 +649,7 @@ static unsigned long clk_round_rate_cpuclk(struct clk *clk, unsigned long rate)
649 */ 649 */
650long clk_round_rate(struct clk *clk, unsigned long rate) 650long clk_round_rate(struct clk *clk, unsigned long rate)
651{ 651{
652 /* TODO: get apropriate switches for EMIFCLK, AHBCLK and MCLK */ 652 /* TODO: get appropriate switches for EMIFCLK, AHBCLK and MCLK */
653 /* Else default to fixed value */ 653 /* Else default to fixed value */
654 654
655 if (clk->round_rate) { 655 if (clk->round_rate) {
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 203b986280f5..58626013aa32 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -23,6 +23,7 @@ menu "Ux500 target platform"
23config MACH_U8500 23config MACH_U8500
24 bool "U8500 Development platform" 24 bool "U8500 Development platform"
25 depends on UX500_SOC_DB8500 25 depends on UX500_SOC_DB8500
26 select TPS6105X
26 help 27 help
27 Include support for the mop500 development platform. 28 Include support for the mop500 development platform.
28 29
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 875c91b2f8a4..9ed0f90cfe23 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -13,6 +13,30 @@
13#include <linux/regulator/ab8500.h> 13#include <linux/regulator/ab8500.h>
14#include "board-mop500-regulators.h" 14#include "board-mop500-regulators.h"
15 15
16/*
17 * TPS61052 regulator
18 */
19static struct regulator_consumer_supply tps61052_vaudio_consumers[] = {
20 /*
21 * Boost converter supply to raise voltage on audio speaker, this
22 * is actually connected to three pins, VInVhfL (left amplifier)
23 * VInVhfR (right amplifier) and VIntDClassInt - all three must
24 * be connected to the same voltage.
25 */
26 REGULATOR_SUPPLY("vintdclassint", "ab8500-codec.0"),
27};
28
29struct regulator_init_data tps61052_regulator = {
30 .constraints = {
31 .name = "vaudio-hf",
32 .min_uV = 4500000,
33 .max_uV = 4500000,
34 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
35 },
36 .num_consumer_supplies = ARRAY_SIZE(tps61052_vaudio_consumers),
37 .consumer_supplies = tps61052_vaudio_consumers,
38};
39
16static struct regulator_consumer_supply ab8500_vaux1_consumers[] = { 40static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
17 /* External displays, connector on board 2v5 power supply */ 41 /* External displays, connector on board 2v5 power supply */
18 REGULATOR_SUPPLY("vaux12v5", "mcde.0"), 42 REGULATOR_SUPPLY("vaux12v5", "mcde.0"),
@@ -62,6 +86,182 @@ static struct regulator_consumer_supply ab8500_vana_consumers[] = {
62 REGULATOR_SUPPLY("vsmps2", "mcde.0"), 86 REGULATOR_SUPPLY("vsmps2", "mcde.0"),
63}; 87};
64 88
89/* ab8500 regulator register initialization */
90struct ab8500_regulator_reg_init
91ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
92 /*
93 * VanaRequestCtrl = HP/LP depending on VxRequest
94 * VextSupply1RequestCtrl = HP/LP depending on VxRequest
95 */
96 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
97 /*
98 * VextSupply2RequestCtrl = HP/LP depending on VxRequest
99 * VextSupply3RequestCtrl = HP/LP depending on VxRequest
100 * Vaux1RequestCtrl = HP/LP depending on VxRequest
101 * Vaux2RequestCtrl = HP/LP depending on VxRequest
102 */
103 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
104 /*
105 * Vaux3RequestCtrl = HP/LP depending on VxRequest
106 * SwHPReq = Control through SWValid disabled
107 */
108 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
109 /*
110 * VanaSysClkReq1HPValid = disabled
111 * Vaux1SysClkReq1HPValid = disabled
112 * Vaux2SysClkReq1HPValid = disabled
113 * Vaux3SysClkReq1HPValid = disabled
114 */
115 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00),
116 /*
117 * VextSupply1SysClkReq1HPValid = disabled
118 * VextSupply2SysClkReq1HPValid = disabled
119 * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
120 */
121 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
122 /*
123 * VanaHwHPReq1Valid = disabled
124 * Vaux1HwHPreq1Valid = disabled
125 * Vaux2HwHPReq1Valid = disabled
126 * Vaux3HwHPReqValid = disabled
127 */
128 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
129 /*
130 * VextSupply1HwHPReq1Valid = disabled
131 * VextSupply2HwHPReq1Valid = disabled
132 * VextSupply3HwHPReq1Valid = disabled
133 */
134 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
135 /*
136 * VanaHwHPReq2Valid = disabled
137 * Vaux1HwHPReq2Valid = disabled
138 * Vaux2HwHPReq2Valid = disabled
139 * Vaux3HwHPReq2Valid = disabled
140 */
141 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
142 /*
143 * VextSupply1HwHPReq2Valid = disabled
144 * VextSupply2HwHPReq2Valid = disabled
145 * VextSupply3HwHPReq2Valid = HWReq2 controlled
146 */
147 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
148 /*
149 * VanaSwHPReqValid = disabled
150 * Vaux1SwHPReqValid = disabled
151 */
152 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
153 /*
154 * Vaux2SwHPReqValid = disabled
155 * Vaux3SwHPReqValid = disabled
156 * VextSupply1SwHPReqValid = disabled
157 * VextSupply2SwHPReqValid = disabled
158 * VextSupply3SwHPReqValid = disabled
159 */
160 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
161 /*
162 * SysClkReq2Valid1 = SysClkReq2 controlled
163 * SysClkReq3Valid1 = disabled
164 * SysClkReq4Valid1 = SysClkReq4 controlled
165 * SysClkReq5Valid1 = disabled
166 * SysClkReq6Valid1 = SysClkReq6 controlled
167 * SysClkReq7Valid1 = disabled
168 * SysClkReq8Valid1 = disabled
169 */
170 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
171 /*
172 * SysClkReq2Valid2 = disabled
173 * SysClkReq3Valid2 = disabled
174 * SysClkReq4Valid2 = disabled
175 * SysClkReq5Valid2 = disabled
176 * SysClkReq6Valid2 = SysClkReq6 controlled
177 * SysClkReq7Valid2 = disabled
178 * SysClkReq8Valid2 = disabled
179 */
180 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
181 /*
182 * VTVoutEna = disabled
183 * Vintcore12Ena = disabled
184 * Vintcore12Sel = 1.25 V
185 * Vintcore12LP = inactive (HP)
186 * VTVoutLP = inactive (HP)
187 */
188 INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
189 /*
190 * VaudioEna = disabled
191 * VdmicEna = disabled
192 * Vamic1Ena = disabled
193 * Vamic2Ena = disabled
194 */
195 INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
196 /*
197 * Vamic1_dzout = high-Z when Vamic1 is disabled
198 * Vamic2_dzout = high-Z when Vamic2 is disabled
199 */
200 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
201 /*
202 * VPll = Hw controlled
203 * VanaRegu = force off
204 */
205 INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
206 /*
207 * VrefDDREna = disabled
208 * VrefDDRSleepMode = inactive (no pulldown)
209 */
210 INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
211 /*
212 * VextSupply1Regu = HW control
213 * VextSupply2Regu = HW control
214 * VextSupply3Regu = HW control
215 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
216 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
217 */
218 INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
219 /*
220 * Vaux1Regu = force HP
221 * Vaux2Regu = force off
222 */
223 INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
224 /*
225 * Vaux3regu = force off
226 */
227 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
228 /*
229 * Vsmps1 = 1.15V
230 */
231 INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
232 /*
233 * Vaux1Sel = 2.5 V
234 */
235 INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
236 /*
237 * Vaux2Sel = 2.9 V
238 */
239 INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
240 /*
241 * Vaux3Sel = 2.91 V
242 */
243 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
244 /*
245 * VextSupply12LP = disabled (no LP)
246 */
247 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
248 /*
249 * Vaux1Disch = short discharge time
250 * Vaux2Disch = short discharge time
251 * Vaux3Disch = short discharge time
252 * Vintcore12Disch = short discharge time
253 * VTVoutDisch = short discharge time
254 * VaudioDisch = short discharge time
255 */
256 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
257 /*
258 * VanaDisch = short discharge time
259 * VdmicPullDownEna = pulldown disabled when Vdmic is disabled
260 * VdmicDisch = short discharge time
261 */
262 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
263};
264
65/* AB8500 regulators */ 265/* AB8500 regulators */
66struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { 266struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
67 /* supplies to the display/camera */ 267 /* supplies to the display/camera */
@@ -72,6 +272,7 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
72 .max_uV = 2900000, 272 .max_uV = 2900000,
73 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 273 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
74 REGULATOR_CHANGE_STATUS, 274 REGULATOR_CHANGE_STATUS,
275 .boot_on = 1, /* must be on for display */
75 }, 276 },
76 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), 277 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
77 .consumer_supplies = ab8500_vaux1_consumers, 278 .consumer_supplies = ab8500_vaux1_consumers,
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index 2675fae52537..94992158d962 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -14,6 +14,9 @@
14#include <linux/regulator/machine.h> 14#include <linux/regulator/machine.h>
15#include <linux/regulator/ab8500.h> 15#include <linux/regulator/ab8500.h>
16 16
17extern struct ab8500_regulator_reg_init
18ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS];
17extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS]; 19extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
20extern struct regulator_init_data tps61052_regulator;
18 21
19#endif 22#endif
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 8790d984cac8..6e1907fa94f0 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -20,7 +20,10 @@
20#include <linux/amba/serial.h> 20#include <linux/amba/serial.h>
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/mfd/ab8500.h> 22#include <linux/mfd/ab8500.h>
23#include <linux/regulator/ab8500.h>
23#include <linux/mfd/tc3589x.h> 24#include <linux/mfd/tc3589x.h>
25#include <linux/mfd/tps6105x.h>
26#include <linux/mfd/ab8500/gpio.h>
24#include <linux/leds-lp5521.h> 27#include <linux/leds-lp5521.h>
25#include <linux/input.h> 28#include <linux/input.h>
26#include <linux/gpio_keys.h> 29#include <linux/gpio_keys.h>
@@ -41,10 +44,35 @@
41#include "board-mop500.h" 44#include "board-mop500.h"
42#include "board-mop500-regulators.h" 45#include "board-mop500-regulators.h"
43 46
47static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
48 .gpio_base = MOP500_AB8500_GPIO(0),
49 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
50 /* config_reg is the initial configuration of ab8500 pins.
51 * The pins can be configured as GPIO or alt functions based
52 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
53 * register. This is the array of 7 configuration settings.
54 * One has to compile time decide these settings. Below is the
55 * explanation of these setting
56 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
57 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
58 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
59 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
60 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
61 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
62 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
63 * as GPIO then this register selectes the alternate fucntions
64 */
65 .config_reg = {0x00, 0x1E, 0x80, 0x01,
66 0x7A, 0x00, 0x00},
67};
68
44static struct ab8500_platform_data ab8500_platdata = { 69static struct ab8500_platform_data ab8500_platdata = {
45 .irq_base = MOP500_AB8500_IRQ_BASE, 70 .irq_base = MOP500_AB8500_IRQ_BASE,
71 .regulator_reg_init = ab8500_regulator_reg_init,
72 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
46 .regulator = ab8500_regulators, 73 .regulator = ab8500_regulators,
47 .num_regulator = ARRAY_SIZE(ab8500_regulators), 74 .num_regulator = ARRAY_SIZE(ab8500_regulators),
75 .gpio = &ab8500_gpio_pdata,
48}; 76};
49 77
50static struct resource ab8500_resources[] = { 78static struct resource ab8500_resources[] = {
@@ -66,6 +94,15 @@ struct platform_device ab8500_device = {
66}; 94};
67 95
68/* 96/*
97 * TPS61052
98 */
99
100static struct tps6105x_platform_data mop500_tps61052_data = {
101 .mode = TPS6105X_MODE_VOLTAGE,
102 .regulator_data = &tps61052_regulator,
103};
104
105/*
69 * TC35892 106 * TC35892
70 */ 107 */
71 108
@@ -135,14 +172,21 @@ static struct lp5521_platform_data __initdata lp5521_sec_data = {
135 .clock_mode = LP5521_CLOCK_EXT, 172 .clock_mode = LP5521_CLOCK_EXT,
136}; 173};
137 174
138static struct i2c_board_info mop500_i2c0_devices[] = { 175static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
139 { 176 {
140 I2C_BOARD_INFO("tc3589x", 0x42), 177 I2C_BOARD_INFO("tc3589x", 0x42),
141 .irq = NOMADIK_GPIO_TO_IRQ(217), 178 .irq = NOMADIK_GPIO_TO_IRQ(217),
142 .platform_data = &mop500_tc35892_data, 179 .platform_data = &mop500_tc35892_data,
143 }, 180 },
181 /* I2C0 devices only available prior to HREFv60 */
182 {
183 I2C_BOARD_INFO("tps61052", 0x33),
184 .platform_data = &mop500_tps61052_data,
185 },
144}; 186};
145 187
188#define NUM_PRE_V60_I2C0_DEVICES 1
189
146static struct i2c_board_info __initdata mop500_i2c2_devices[] = { 190static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
147 { 191 {
148 /* lp5521 LED driver, 1st device */ 192 /* lp5521 LED driver, 1st device */
@@ -380,6 +424,8 @@ static void __init mop500_uart_init(void)
380 424
381static void __init mop500_init_machine(void) 425static void __init mop500_init_machine(void)
382{ 426{
427 int i2c0_devs;
428
383 /* 429 /*
384 * The HREFv60 board removed a GPIO expander and routed 430 * The HREFv60 board removed a GPIO expander and routed
385 * all these GPIO pins to the internal GPIO controller 431 * all these GPIO pins to the internal GPIO controller
@@ -403,8 +449,11 @@ static void __init mop500_init_machine(void)
403 449
404 platform_device_register(&ab8500_device); 450 platform_device_register(&ab8500_device);
405 451
406 i2c_register_board_info(0, mop500_i2c0_devices, 452 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
407 ARRAY_SIZE(mop500_i2c0_devices)); 453 if (machine_is_hrefv60())
454 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
455
456 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
408 i2c_register_board_info(2, mop500_i2c2_devices, 457 i2c_register_board_info(2, mop500_i2c2_devices,
409 ARRAY_SIZE(mop500_i2c2_devices)); 458 ARRAY_SIZE(mop500_i2c2_devices));
410} 459}
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index 56722f4be71b..03a31cc9b084 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -27,6 +27,10 @@
27#define GPIO_BU21013_CS MOP500_EGPIO(13) 27#define GPIO_BU21013_CS MOP500_EGPIO(13)
28#define GPIO_SDMMC_EN MOP500_EGPIO(17) 28#define GPIO_SDMMC_EN MOP500_EGPIO(17)
29#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18) 29#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18)
30#define MOP500_EGPIO_END MOP500_EGPIO(24)
31
32/* GPIOs on the AB8500 mixed-signals circuit */
33#define MOP500_AB8500_GPIO(x) (MOP500_EGPIO_END + (x))
30 34
31struct i2c_board_info; 35struct i2c_board_info;
32 36
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 0fefb34c11e4..16647b255378 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -58,7 +58,7 @@
58#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) 58#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000)
59#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) 59#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
60 60
61/* per7 base addressess */ 61/* per7 base addresses */
62#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000) 62#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000)
63#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000) 63#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000)
64#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000) 64#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000)
@@ -68,7 +68,7 @@
68#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) 68#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
69#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) 69#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
70 70
71/* per6 base addressess */ 71/* per6 base addresses */
72#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) 72#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
73#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) 73#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
74#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) 74#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
@@ -79,11 +79,11 @@
79#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) 79#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
80#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) 80#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
81 81
82/* per5 base addressess */ 82/* per5 base addresses */
83#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) 83#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
84#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) 84#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
85 85
86/* per4 base addressess */ 86/* per4 base addresses */
87#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) 87#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000)
88#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) 88#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000)
89#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) 89#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000)
@@ -106,7 +106,7 @@
106#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) 106#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
107#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) 107#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
108 108
109/* per2 base addressess */ 109/* per2 base addresses */
110#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) 110#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
111#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) 111#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
112#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) 112#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
index 7cdeb2af0ebb..97ef55f84934 100644
--- a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
+++ b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
@@ -35,9 +35,20 @@
35#define MOP500_STMPE1601_IRQBASE MOP500_EGPIO_IRQ_END 35#define MOP500_STMPE1601_IRQBASE MOP500_EGPIO_IRQ_END
36#define MOP500_STMPE1601_IRQ(x) (MOP500_STMPE1601_IRQBASE + (x)) 36#define MOP500_STMPE1601_IRQ(x) (MOP500_STMPE1601_IRQBASE + (x))
37 37
38#define MOP500_NR_IRQS MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS) 38#define MOP500_STMPE1601_IRQ_END \
39 MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
39 40
40#define MOP500_IRQ_END MOP500_NR_IRQS 41/* AB8500 virtual gpio IRQ */
42#define AB8500_VIR_GPIO_NR_IRQS 16
43
44#define MOP500_AB8500_VIR_GPIO_IRQ_BASE \
45 MOP500_STMPE1601_IRQ_END
46#define MOP500_AB8500_VIR_GPIO_IRQ_END \
47 (MOP500_AB8500_VIR_GPIO_IRQ_BASE + AB8500_VIR_GPIO_NR_IRQS)
48
49#define MOP500_NR_IRQS MOP500_AB8500_VIR_GPIO_IRQ_END
50
51#define MOP500_IRQ_END MOP500_NR_IRQS
41 52
42#if MOP500_IRQ_END > IRQ_BOARD_END 53#if MOP500_IRQ_END > IRQ_BOARD_END
43#undef IRQ_BOARD_END 54#undef IRQ_BOARD_END
diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c
index 2288f6a7c518..5ba113309a0b 100644
--- a/arch/arm/mach-ux500/localtimer.c
+++ b/arch/arm/mach-ux500/localtimer.c
@@ -21,8 +21,9 @@
21/* 21/*
22 * Setup the local clock events for a CPU. 22 * Setup the local clock events for a CPU.
23 */ 23 */
24void __cpuinit local_timer_setup(struct clock_event_device *evt) 24int __cpuinit local_timer_setup(struct clock_event_device *evt)
25{ 25{
26 evt->irq = IRQ_LOCALTIMER; 26 evt->irq = IRQ_LOCALTIMER;
27 twd_timer_setup(evt); 27 twd_timer_setup(evt);
28 return 0;
28} 29}
diff --git a/arch/arm/mach-ux500/modem-irq-db5500.c b/arch/arm/mach-ux500/modem-irq-db5500.c
index e1296a7447c8..6b86416c94c9 100644
--- a/arch/arm/mach-ux500/modem-irq-db5500.c
+++ b/arch/arm/mach-ux500/modem-irq-db5500.c
@@ -90,8 +90,7 @@ static irqreturn_t modem_cpu_irq_handler(int irq, void *data)
90 90
91static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip) 91static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip)
92{ 92{
93 set_irq_chip(irq, modem_irq_chip); 93 irq_set_chip_and_handler(irq, modem_irq_chip, handle_simple_irq);
94 set_irq_handler(irq, handle_simple_irq);
95 set_irq_flags(irq, IRQF_VALID); 94 set_irq_flags(irq, IRQF_VALID);
96 95
97 pr_debug("modem_irq: Created virtual IRQ %d\n", irq); 96 pr_debug("modem_irq: Created virtual IRQ %d\n", irq);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 136c32e7ed8e..eb7ffa0ee8b5 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -50,6 +50,8 @@
50#include <mach/platform.h> 50#include <mach/platform.h>
51#include <asm/hardware/timer-sp.h> 51#include <asm/hardware/timer-sp.h>
52 52
53#include <plat/clcd.h>
54#include <plat/fpga-irq.h>
53#include <plat/sched_clock.h> 55#include <plat/sched_clock.h>
54 56
55#include "core.h" 57#include "core.h"
@@ -63,47 +65,12 @@
63#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) 65#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
64#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) 66#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
65 67
66static void sic_mask_irq(struct irq_data *d) 68static struct fpga_irq_data sic_irq = {
67{ 69 .base = VA_SIC_BASE,
68 unsigned int irq = d->irq - IRQ_SIC_START; 70 .irq_start = IRQ_SIC_START,
69 71 .chip.name = "SIC",
70 writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
71}
72
73static void sic_unmask_irq(struct irq_data *d)
74{
75 unsigned int irq = d->irq - IRQ_SIC_START;
76
77 writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
78}
79
80static struct irq_chip sic_chip = {
81 .name = "SIC",
82 .irq_ack = sic_mask_irq,
83 .irq_mask = sic_mask_irq,
84 .irq_unmask = sic_unmask_irq,
85}; 72};
86 73
87static void
88sic_handle_irq(unsigned int irq, struct irq_desc *desc)
89{
90 unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
91
92 if (status == 0) {
93 do_bad_IRQ(irq, desc);
94 return;
95 }
96
97 do {
98 irq = ffs(status) - 1;
99 status &= ~(1 << irq);
100
101 irq += IRQ_SIC_START;
102
103 generic_handle_irq(irq);
104 } while (status);
105}
106
107#if 1 74#if 1
108#define IRQ_MMCI0A IRQ_VICSOURCE22 75#define IRQ_MMCI0A IRQ_VICSOURCE22
109#define IRQ_AACI IRQ_VICSOURCE24 76#define IRQ_AACI IRQ_VICSOURCE24
@@ -118,22 +85,11 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
118 85
119void __init versatile_init_irq(void) 86void __init versatile_init_irq(void)
120{ 87{
121 unsigned int i;
122
123 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); 88 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0);
124 89
125 set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
126
127 /* Do second interrupt controller */
128 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 90 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
129 91
130 for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { 92 fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq);
131 if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) {
132 set_irq_chip(i, &sic_chip);
133 set_irq_handler(i, handle_level_irq);
134 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
135 }
136 }
137 93
138 /* 94 /*
139 * Interrupts on secondary controller from 0 to 8 are routed to 95 * Interrupts on secondary controller from 0 to 8 are routed to
@@ -476,127 +432,7 @@ static struct clk_lookup lookups[] = {
476#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) 432#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
477#define SYS_CLCD_ID_VGA (0x1f << 8) 433#define SYS_CLCD_ID_VGA (0x1f << 8)
478 434
479static struct clcd_panel vga = { 435static bool is_sanyo_2_5_lcd;
480 .mode = {
481 .name = "VGA",
482 .refresh = 60,
483 .xres = 640,
484 .yres = 480,
485 .pixclock = 39721,
486 .left_margin = 40,
487 .right_margin = 24,
488 .upper_margin = 32,
489 .lower_margin = 11,
490 .hsync_len = 96,
491 .vsync_len = 2,
492 .sync = 0,
493 .vmode = FB_VMODE_NONINTERLACED,
494 },
495 .width = -1,
496 .height = -1,
497 .tim2 = TIM2_BCD | TIM2_IPC,
498 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
499 .bpp = 16,
500};
501
502static struct clcd_panel sanyo_3_8_in = {
503 .mode = {
504 .name = "Sanyo QVGA",
505 .refresh = 116,
506 .xres = 320,
507 .yres = 240,
508 .pixclock = 100000,
509 .left_margin = 6,
510 .right_margin = 6,
511 .upper_margin = 5,
512 .lower_margin = 5,
513 .hsync_len = 6,
514 .vsync_len = 6,
515 .sync = 0,
516 .vmode = FB_VMODE_NONINTERLACED,
517 },
518 .width = -1,
519 .height = -1,
520 .tim2 = TIM2_BCD,
521 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
522 .bpp = 16,
523};
524
525static struct clcd_panel sanyo_2_5_in = {
526 .mode = {
527 .name = "Sanyo QVGA Portrait",
528 .refresh = 116,
529 .xres = 240,
530 .yres = 320,
531 .pixclock = 100000,
532 .left_margin = 20,
533 .right_margin = 10,
534 .upper_margin = 2,
535 .lower_margin = 2,
536 .hsync_len = 10,
537 .vsync_len = 2,
538 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
539 .vmode = FB_VMODE_NONINTERLACED,
540 },
541 .width = -1,
542 .height = -1,
543 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
544 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
545 .bpp = 16,
546};
547
548static struct clcd_panel epson_2_2_in = {
549 .mode = {
550 .name = "Epson QCIF",
551 .refresh = 390,
552 .xres = 176,
553 .yres = 220,
554 .pixclock = 62500,
555 .left_margin = 3,
556 .right_margin = 2,
557 .upper_margin = 1,
558 .lower_margin = 0,
559 .hsync_len = 3,
560 .vsync_len = 2,
561 .sync = 0,
562 .vmode = FB_VMODE_NONINTERLACED,
563 },
564 .width = -1,
565 .height = -1,
566 .tim2 = TIM2_BCD | TIM2_IPC,
567 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
568 .bpp = 16,
569};
570
571/*
572 * Detect which LCD panel is connected, and return the appropriate
573 * clcd_panel structure. Note: we do not have any information on
574 * the required timings for the 8.4in panel, so we presently assume
575 * VGA timings.
576 */
577static struct clcd_panel *versatile_clcd_panel(void)
578{
579 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
580 struct clcd_panel *panel = &vga;
581 u32 val;
582
583 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
584 if (val == SYS_CLCD_ID_SANYO_3_8)
585 panel = &sanyo_3_8_in;
586 else if (val == SYS_CLCD_ID_SANYO_2_5)
587 panel = &sanyo_2_5_in;
588 else if (val == SYS_CLCD_ID_EPSON_2_2)
589 panel = &epson_2_2_in;
590 else if (val == SYS_CLCD_ID_VGA)
591 panel = &vga;
592 else {
593 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
594 val);
595 panel = &vga;
596 }
597
598 return panel;
599}
600 436
601/* 437/*
602 * Disable all display connectors on the interface module. 438 * Disable all display connectors on the interface module.
@@ -614,7 +450,7 @@ static void versatile_clcd_disable(struct clcd_fb *fb)
614 /* 450 /*
615 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off 451 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off
616 */ 452 */
617 if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { 453 if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
618 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); 454 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
619 unsigned long ctrl; 455 unsigned long ctrl;
620 456
@@ -630,18 +466,22 @@ static void versatile_clcd_disable(struct clcd_fb *fb)
630 */ 466 */
631static void versatile_clcd_enable(struct clcd_fb *fb) 467static void versatile_clcd_enable(struct clcd_fb *fb)
632{ 468{
469 struct fb_var_screeninfo *var = &fb->fb.var;
633 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; 470 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
634 u32 val; 471 u32 val;
635 472
636 val = readl(sys_clcd); 473 val = readl(sys_clcd);
637 val &= ~SYS_CLCD_MODE_MASK; 474 val &= ~SYS_CLCD_MODE_MASK;
638 475
639 switch (fb->fb.var.green.length) { 476 switch (var->green.length) {
640 case 5: 477 case 5:
641 val |= SYS_CLCD_MODE_5551; 478 val |= SYS_CLCD_MODE_5551;
642 break; 479 break;
643 case 6: 480 case 6:
644 val |= SYS_CLCD_MODE_565_RLSB; 481 if (var->red.offset == 0)
482 val |= SYS_CLCD_MODE_565_RLSB;
483 else
484 val |= SYS_CLCD_MODE_565_BLSB;
645 break; 485 break;
646 case 8: 486 case 8:
647 val |= SYS_CLCD_MODE_888; 487 val |= SYS_CLCD_MODE_888;
@@ -663,7 +503,7 @@ static void versatile_clcd_enable(struct clcd_fb *fb)
663 /* 503 /*
664 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on 504 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on
665 */ 505 */
666 if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { 506 if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
667 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); 507 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
668 unsigned long ctrl; 508 unsigned long ctrl;
669 509
@@ -674,50 +514,62 @@ static void versatile_clcd_enable(struct clcd_fb *fb)
674#endif 514#endif
675} 515}
676 516
677static unsigned long framesize = SZ_1M; 517/*
678 518 * Detect which LCD panel is connected, and return the appropriate
519 * clcd_panel structure. Note: we do not have any information on
520 * the required timings for the 8.4in panel, so we presently assume
521 * VGA timings.
522 */
679static int versatile_clcd_setup(struct clcd_fb *fb) 523static int versatile_clcd_setup(struct clcd_fb *fb)
680{ 524{
681 dma_addr_t dma; 525 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
526 const char *panel_name;
527 u32 val;
682 528
683 fb->panel = versatile_clcd_panel(); 529 is_sanyo_2_5_lcd = false;
684 530
685 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 531 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
686 &dma, GFP_KERNEL); 532 if (val == SYS_CLCD_ID_SANYO_3_8)
687 if (!fb->fb.screen_base) { 533 panel_name = "Sanyo TM38QV67A02A";
688 printk(KERN_ERR "CLCD: unable to map framebuffer\n"); 534 else if (val == SYS_CLCD_ID_SANYO_2_5) {
689 return -ENOMEM; 535 panel_name = "Sanyo QVGA Portrait";
536 is_sanyo_2_5_lcd = true;
537 } else if (val == SYS_CLCD_ID_EPSON_2_2)
538 panel_name = "Epson L2F50113T00";
539 else if (val == SYS_CLCD_ID_VGA)
540 panel_name = "VGA";
541 else {
542 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
543 val);
544 panel_name = "VGA";
690 } 545 }
691 546
692 fb->fb.fix.smem_start = dma; 547 fb->panel = versatile_clcd_get_panel(panel_name);
693 fb->fb.fix.smem_len = framesize; 548 if (!fb->panel)
549 return -EINVAL;
694 550
695 return 0; 551 return versatile_clcd_setup_dma(fb, SZ_1M);
696} 552}
697 553
698static int versatile_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) 554static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs)
699{ 555{
700 return dma_mmap_writecombine(&fb->dev->dev, vma, 556 clcdfb_decode(fb, regs);
701 fb->fb.screen_base,
702 fb->fb.fix.smem_start,
703 fb->fb.fix.smem_len);
704}
705 557
706static void versatile_clcd_remove(struct clcd_fb *fb) 558 /* Always clear BGR for RGB565: we do the routing externally */
707{ 559 if (fb->fb.var.green.length == 6)
708 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, 560 regs->cntl &= ~CNTL_BGR;
709 fb->fb.screen_base, fb->fb.fix.smem_start);
710} 561}
711 562
712static struct clcd_board clcd_plat_data = { 563static struct clcd_board clcd_plat_data = {
713 .name = "Versatile", 564 .name = "Versatile",
565 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
714 .check = clcdfb_check, 566 .check = clcdfb_check,
715 .decode = clcdfb_decode, 567 .decode = versatile_clcd_decode,
716 .disable = versatile_clcd_disable, 568 .disable = versatile_clcd_disable,
717 .enable = versatile_clcd_enable, 569 .enable = versatile_clcd_enable,
718 .setup = versatile_clcd_setup, 570 .setup = versatile_clcd_setup,
719 .mmap = versatile_clcd_mmap, 571 .mmap = versatile_clcd_mmap_dma,
720 .remove = versatile_clcd_remove, 572 .remove = versatile_clcd_remove_dma,
721}; 573};
722 574
723static struct pl061_platform_data gpio0_plat_data = { 575static struct pl061_platform_data gpio0_plat_data = {
@@ -737,53 +589,35 @@ static struct pl022_ssp_controller ssp0_plat_data = {
737}; 589};
738 590
739#define AACI_IRQ { IRQ_AACI, NO_IRQ } 591#define AACI_IRQ { IRQ_AACI, NO_IRQ }
740#define AACI_DMA { 0x80, 0x81 }
741#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } 592#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
742#define MMCI0_DMA { 0x84, 0 }
743#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } 593#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ }
744#define KMI0_DMA { 0, 0 }
745#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } 594#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ }
746#define KMI1_DMA { 0, 0 }
747 595
748/* 596/*
749 * These devices are connected directly to the multi-layer AHB switch 597 * These devices are connected directly to the multi-layer AHB switch
750 */ 598 */
751#define SMC_IRQ { NO_IRQ, NO_IRQ } 599#define SMC_IRQ { NO_IRQ, NO_IRQ }
752#define SMC_DMA { 0, 0 }
753#define MPMC_IRQ { NO_IRQ, NO_IRQ } 600#define MPMC_IRQ { NO_IRQ, NO_IRQ }
754#define MPMC_DMA { 0, 0 }
755#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } 601#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
756#define CLCD_DMA { 0, 0 }
757#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } 602#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
758#define DMAC_DMA { 0, 0 }
759 603
760/* 604/*
761 * These devices are connected via the core APB bridge 605 * These devices are connected via the core APB bridge
762 */ 606 */
763#define SCTL_IRQ { NO_IRQ, NO_IRQ } 607#define SCTL_IRQ { NO_IRQ, NO_IRQ }
764#define SCTL_DMA { 0, 0 }
765#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } 608#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
766#define WATCHDOG_DMA { 0, 0 }
767#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } 609#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
768#define GPIO0_DMA { 0, 0 }
769#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } 610#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
770#define GPIO1_DMA { 0, 0 }
771#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } 611#define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
772#define RTC_DMA { 0, 0 }
773 612
774/* 613/*
775 * These devices are connected via the DMA APB bridge 614 * These devices are connected via the DMA APB bridge
776 */ 615 */
777#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } 616#define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
778#define SCI_DMA { 7, 6 }
779#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } 617#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
780#define UART0_DMA { 15, 14 }
781#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } 618#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
782#define UART1_DMA { 13, 12 }
783#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } 619#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
784#define UART2_DMA { 11, 10 }
785#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } 620#define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
786#define SSP_DMA { 9, 8 }
787 621
788/* FPGA Primecells */ 622/* FPGA Primecells */
789AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); 623AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
@@ -865,14 +699,21 @@ static void versatile_leds_event(led_event_t ledevt)
865} 699}
866#endif /* CONFIG_LEDS */ 700#endif /* CONFIG_LEDS */
867 701
868void __init versatile_init(void) 702/* Early initializations */
703void __init versatile_init_early(void)
869{ 704{
870 int i; 705 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
871
872 osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
873 706
707 osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET;
874 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 708 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
875 709
710 versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000);
711}
712
713void __init versatile_init(void)
714{
715 int i;
716
876 platform_device_register(&versatile_flash_device); 717 platform_device_register(&versatile_flash_device);
877 platform_device_register(&versatile_i2c_device); 718 platform_device_register(&versatile_i2c_device);
878 platform_device_register(&smc91x_device); 719 platform_device_register(&smc91x_device);
@@ -889,12 +730,6 @@ void __init versatile_init(void)
889} 730}
890 731
891/* 732/*
892 * The sched_clock counter
893 */
894#define REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + \
895 VERSATILE_SYS_24MHz_OFFSET)
896
897/*
898 * Where is the timer (VA)? 733 * Where is the timer (VA)?
899 */ 734 */
900#define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) 735#define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE)
@@ -909,8 +744,6 @@ static void __init versatile_timer_init(void)
909{ 744{
910 u32 val; 745 u32 val;
911 746
912 versatile_sched_clock_init(REFCOUNTER, 24000000);
913
914 /* 747 /*
915 * set clock frequency: 748 * set clock frequency:
916 * VERSATILE_REFCLK is 32KHz 749 * VERSATILE_REFCLK is 32KHz
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 9d39886a8351..fd6404e5d788 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -25,6 +25,7 @@
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26 26
27extern void __init versatile_init(void); 27extern void __init versatile_init(void);
28extern void __init versatile_init_early(void);
28extern void __init versatile_init_irq(void); 29extern void __init versatile_init_irq(void);
29extern void __init versatile_map_io(void); 30extern void __init versatile_map_io(void);
30extern struct sys_timer versatile_timer; 31extern struct sys_timer versatile_timer;
@@ -44,7 +45,6 @@ static struct amba_device name##_device = { \
44 }, \ 45 }, \
45 .dma_mask = ~0, \ 46 .dma_mask = ~0, \
46 .irq = base##_IRQ, \ 47 .irq = base##_IRQ, \
47 /* .dma = base##_DMA,*/ \
48} 48}
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index b5e75bb44965..6911e1f5f156 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -39,6 +39,6 @@
39/* macro to get at IO space when running virtually */ 39/* macro to get at IO space when running virtually */
40#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 40#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
41 41
42#define __io_address(n) __io(IO_ADDRESS(n)) 42#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
43 43
44#endif 44#endif
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index aa9730fb13bf..f8ae64b3eed0 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -37,6 +37,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
38 .boot_params = 0x00000100, 38 .boot_params = 0x00000100,
39 .map_io = versatile_map_io, 39 .map_io = versatile_map_io,
40 .init_early = versatile_init_early,
40 .init_irq = versatile_init_irq, 41 .init_irq = versatile_init_irq,
41 .timer = &versatile_timer, 42 .timer = &versatile_timer,
42 .init_machine = versatile_init, 43 .init_machine = versatile_init,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index bf469642a3f8..37c23dfeefb7 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -59,19 +59,14 @@ static struct pl061_platform_data gpio3_plat_data = {
59}; 59};
60 60
61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } 61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ }
62#define UART3_DMA { 0x86, 0x87 }
63#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } 62#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ }
64#define SCI1_DMA { 0x88, 0x89 }
65#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } 63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
66#define MMCI1_DMA { 0x85, 0 }
67 64
68/* 65/*
69 * These devices are connected via the core APB bridge 66 * These devices are connected via the core APB bridge
70 */ 67 */
71#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 68#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
72#define GPIO2_DMA { 0, 0 }
73#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 69#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
74#define GPIO3_DMA { 0, 0 }
75 70
76/* 71/*
77 * These devices are connected via the DMA APB bridge 72 * These devices are connected via the DMA APB bridge
@@ -110,6 +105,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
110 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 105 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
111 .boot_params = 0x00000100, 106 .boot_params = 0x00000100,
112 .map_io = versatile_map_io, 107 .map_io = versatile_map_io,
108 .init_early = versatile_init_early,
113 .init_irq = versatile_init_irq, 109 .init_irq = versatile_init_irq,
114 .timer = &versatile_timer, 110 .timer = &versatile_timer,
115 .init_machine = versatile_pb_init, 111 .init_machine = versatile_pb_init,
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 3f19b660a165..931148487f0b 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -5,5 +5,8 @@ config ARCH_VEXPRESS_CA9X4
5 bool "Versatile Express Cortex-A9x4 tile" 5 bool "Versatile Express Cortex-A9x4 tile"
6 select CPU_V7 6 select CPU_V7
7 select ARM_GIC 7 select ARM_GIC
8 select ARM_ERRATA_720789
9 select ARM_ERRATA_751472
10 select ARM_ERRATA_753970
8 11
9endmenu 12endmenu
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile
index 2c0ac7de2814..90551b9780ab 100644
--- a/arch/arm/mach-vexpress/Makefile
+++ b/arch/arm/mach-vexpress/Makefile
@@ -4,6 +4,5 @@
4 4
5obj-y := v2m.o 5obj-y := v2m.o
6obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o 6obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
7obj-$(CONFIG_SMP) += platsmp.o headsmp.o 7obj-$(CONFIG_SMP) += platsmp.o
8obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 8obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
9obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index 362780d868de..f4397159c173 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -17,8 +17,3 @@ struct amba_device name##_device = { \
17 .irq = IRQ_##base, \ 17 .irq = IRQ_##base, \
18 /* .dma = DMA_##base,*/ \ 18 /* .dma = DMA_##base,*/ \
19} 19}
20
21struct map_desc;
22
23void v2m_map_io(struct map_desc *tile, size_t num);
24extern struct sys_timer v2m_timer;
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index e9bccc5230c9..ebc22e759325 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -10,19 +10,17 @@
10#include <linux/amba/clcd.h> 10#include <linux/amba/clcd.h>
11#include <linux/clkdev.h> 11#include <linux/clkdev.h>
12 12
13#include <asm/pgtable.h>
14#include <asm/hardware/arm_timer.h> 13#include <asm/hardware/arm_timer.h>
15#include <asm/hardware/cache-l2x0.h> 14#include <asm/hardware/cache-l2x0.h>
16#include <asm/hardware/gic.h> 15#include <asm/hardware/gic.h>
17#include <asm/mach-types.h>
18#include <asm/pmu.h> 16#include <asm/pmu.h>
17#include <asm/smp_scu.h>
19#include <asm/smp_twd.h> 18#include <asm/smp_twd.h>
20 19
21#include <mach/ct-ca9x4.h> 20#include <mach/ct-ca9x4.h>
22 21
23#include <asm/hardware/timer-sp.h> 22#include <asm/hardware/timer-sp.h>
24 23
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 24#include <asm/mach/map.h>
27#include <asm/mach/time.h> 25#include <asm/mach/time.h>
28 26
@@ -30,6 +28,8 @@
30 28
31#include <mach/motherboard.h> 29#include <mach/motherboard.h>
32 30
31#include <plat/clcd.h>
32
33#define V2M_PA_CS7 0x10000000 33#define V2M_PA_CS7 0x10000000
34 34
35static struct map_desc ct_ca9x4_io_desc[] __initdata = { 35static struct map_desc ct_ca9x4_io_desc[] __initdata = {
@@ -56,7 +56,7 @@ static void __init ct_ca9x4_map_io(void)
56#ifdef CONFIG_LOCAL_TIMERS 56#ifdef CONFIG_LOCAL_TIMERS
57 twd_base = MMIO_P2V(A9_MPCORE_TWD); 57 twd_base = MMIO_P2V(A9_MPCORE_TWD);
58#endif 58#endif
59 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); 59 iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
60} 60}
61 61
62static void __init ct_ca9x4_init_irq(void) 62static void __init ct_ca9x4_init_irq(void)
@@ -80,29 +80,6 @@ static struct sys_timer ct_ca9x4_timer = {
80}; 80};
81#endif 81#endif
82 82
83static struct clcd_panel xvga_panel = {
84 .mode = {
85 .name = "XVGA",
86 .refresh = 60,
87 .xres = 1024,
88 .yres = 768,
89 .pixclock = 15384,
90 .left_margin = 168,
91 .right_margin = 8,
92 .upper_margin = 29,
93 .lower_margin = 3,
94 .hsync_len = 144,
95 .vsync_len = 6,
96 .sync = 0,
97 .vmode = FB_VMODE_NONINTERLACED,
98 },
99 .width = -1,
100 .height = -1,
101 .tim2 = TIM2_BCD | TIM2_IPC,
102 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
103 .bpp = 16,
104};
105
106static void ct_ca9x4_clcd_enable(struct clcd_fb *fb) 83static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
107{ 84{
108 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0); 85 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
@@ -112,42 +89,23 @@ static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
112static int ct_ca9x4_clcd_setup(struct clcd_fb *fb) 89static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
113{ 90{
114 unsigned long framesize = 1024 * 768 * 2; 91 unsigned long framesize = 1024 * 768 * 2;
115 dma_addr_t dma;
116 92
117 fb->panel = &xvga_panel; 93 fb->panel = versatile_clcd_get_panel("XVGA");
94 if (!fb->panel)
95 return -EINVAL;
118 96
119 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 97 return versatile_clcd_setup_dma(fb, framesize);
120 &dma, GFP_KERNEL);
121 if (!fb->fb.screen_base) {
122 printk(KERN_ERR "CLCD: unable to map frame buffer\n");
123 return -ENOMEM;
124 }
125 fb->fb.fix.smem_start = dma;
126 fb->fb.fix.smem_len = framesize;
127
128 return 0;
129}
130
131static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
132{
133 return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
134 fb->fb.fix.smem_start, fb->fb.fix.smem_len);
135}
136
137static void ct_ca9x4_clcd_remove(struct clcd_fb *fb)
138{
139 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
140 fb->fb.screen_base, fb->fb.fix.smem_start);
141} 98}
142 99
143static struct clcd_board ct_ca9x4_clcd_data = { 100static struct clcd_board ct_ca9x4_clcd_data = {
144 .name = "CT-CA9X4", 101 .name = "CT-CA9X4",
102 .caps = CLCD_CAP_5551 | CLCD_CAP_565,
145 .check = clcdfb_check, 103 .check = clcdfb_check,
146 .decode = clcdfb_decode, 104 .decode = clcdfb_decode,
147 .enable = ct_ca9x4_clcd_enable, 105 .enable = ct_ca9x4_clcd_enable,
148 .setup = ct_ca9x4_clcd_setup, 106 .setup = ct_ca9x4_clcd_setup,
149 .mmap = ct_ca9x4_clcd_mmap, 107 .mmap = versatile_clcd_mmap_dma,
150 .remove = ct_ca9x4_clcd_remove, 108 .remove = versatile_clcd_remove_dma,
151}; 109};
152 110
153static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); 111static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
@@ -220,6 +178,11 @@ static struct platform_device pmu_device = {
220 .resource = pmu_resources, 178 .resource = pmu_resources,
221}; 179};
222 180
181static void __init ct_ca9x4_init_early(void)
182{
183 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
184}
185
223static void __init ct_ca9x4_init(void) 186static void __init ct_ca9x4_init(void)
224{ 187{
225 int i; 188 int i;
@@ -234,22 +197,40 @@ static void __init ct_ca9x4_init(void)
234 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff); 197 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
235#endif 198#endif
236 199
237 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
238
239 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++) 200 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
240 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource); 201 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
241 202
242 platform_device_register(&pmu_device); 203 platform_device_register(&pmu_device);
243} 204}
244 205
245MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") 206#ifdef CONFIG_SMP
246 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 207static void ct_ca9x4_init_cpu_map(void)
208{
209 int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
210
211 for (i = 0; i < ncores; ++i)
212 set_cpu_possible(i, true);
213}
214
215static void ct_ca9x4_smp_enable(unsigned int max_cpus)
216{
217 int i;
218 for (i = 0; i < max_cpus; i++)
219 set_cpu_present(i, true);
220
221 scu_enable(MMIO_P2V(A9_MPCORE_SCU));
222}
223#endif
224
225struct ct_desc ct_ca9x4_desc __initdata = {
226 .id = V2M_CT_ID_CA9,
227 .name = "CA9x4",
247 .map_io = ct_ca9x4_map_io, 228 .map_io = ct_ca9x4_map_io,
229 .init_early = ct_ca9x4_init_early,
248 .init_irq = ct_ca9x4_init_irq, 230 .init_irq = ct_ca9x4_init_irq,
249#if 0 231 .init_tile = ct_ca9x4_init,
250 .timer = &ct_ca9x4_timer, 232#ifdef CONFIG_SMP
251#else 233 .init_cpu_map = ct_ca9x4_init_cpu_map,
252 .timer = &v2m_timer, 234 .smp_enable = ct_ca9x4_smp_enable,
253#endif 235#endif
254 .init_machine = ct_ca9x4_init, 236};
255MACHINE_END
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index f9e2f8d22962..a34d3d4faae1 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -45,4 +45,6 @@
45#define IRQ_CT_CA9X4_PMU_CPU2 94 45#define IRQ_CT_CA9X4_PMU_CPU2 94
46#define IRQ_CT_CA9X4_PMU_CPU3 95 46#define IRQ_CT_CA9X4_PMU_CPU3 95
47 47
48extern struct ct_desc ct_ca9x4_desc;
49
48#endif 50#endif
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
index 98a8ded055bf..0a3a37518405 100644
--- a/arch/arm/mach-vexpress/include/mach/motherboard.h
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -118,4 +118,26 @@
118int v2m_cfg_write(u32 devfn, u32 data); 118int v2m_cfg_write(u32 devfn, u32 data);
119int v2m_cfg_read(u32 devfn, u32 *data); 119int v2m_cfg_read(u32 devfn, u32 *data);
120 120
121/*
122 * Core tile IDs
123 */
124#define V2M_CT_ID_CA9 0x0c000191
125#define V2M_CT_ID_UNSUPPORTED 0xff000191
126#define V2M_CT_ID_MASK 0xff000fff
127
128struct ct_desc {
129 u32 id;
130 const char *name;
131 void (*map_io)(void);
132 void (*init_early)(void);
133 void (*init_irq)(void);
134 void (*init_tile)(void);
135#ifdef CONFIG_SMP
136 void (*init_cpu_map)(void);
137 void (*smp_enable)(unsigned int);
138#endif
139};
140
141extern struct ct_desc *ct_desc;
142
121#endif 143#endif
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 634bf1d3a311..2b5f7ac001a3 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -10,114 +10,17 @@
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h> 13#include <linux/smp.h>
17#include <linux/io.h> 14#include <linux/io.h>
18 15
19#include <asm/cacheflush.h>
20#include <asm/smp_scu.h>
21#include <asm/unified.h> 16#include <asm/unified.h>
22 17
23#include <mach/ct-ca9x4.h>
24#include <mach/motherboard.h> 18#include <mach/motherboard.h>
25#define V2M_PA_CS7 0x10000000 19#define V2M_PA_CS7 0x10000000
26 20
27#include "core.h" 21#include "core.h"
28 22
29extern void vexpress_secondary_startup(void); 23extern void versatile_secondary_startup(void);
30
31/*
32 * control for which core is the next to come out of the secondary
33 * boot "holding pen"
34 */
35volatile int __cpuinitdata pen_release = -1;
36
37/*
38 * Write pen_release in a way that is guaranteed to be visible to all
39 * observers, irrespective of whether they're taking part in coherency
40 * or not. This is necessary for the hotplug code to work reliably.
41 */
42static void __cpuinit write_pen_release(int val)
43{
44 pen_release = val;
45 smp_wmb();
46 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
47 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
48}
49
50static void __iomem *scu_base_addr(void)
51{
52 return MMIO_P2V(A9_MPCORE_SCU);
53}
54
55static DEFINE_SPINLOCK(boot_lock);
56
57void __cpuinit platform_secondary_init(unsigned int cpu)
58{
59 /*
60 * if any interrupts are already enabled for the primary
61 * core (e.g. timer irq), then they will not have been enabled
62 * for us: do so
63 */
64 gic_secondary_init(0);
65
66 /*
67 * let the primary processor know we're out of the
68 * pen, then head off into the C entry point
69 */
70 write_pen_release(-1);
71
72 /*
73 * Synchronise with the boot thread.
74 */
75 spin_lock(&boot_lock);
76 spin_unlock(&boot_lock);
77}
78
79int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
80{
81 unsigned long timeout;
82
83 /*
84 * Set synchronisation state between this boot processor
85 * and the secondary one
86 */
87 spin_lock(&boot_lock);
88
89 /*
90 * This is really belt and braces; we hold unintended secondary
91 * CPUs in the holding pen until we're ready for them. However,
92 * since we haven't sent them a soft interrupt, they shouldn't
93 * be there.
94 */
95 write_pen_release(cpu);
96
97 /*
98 * Send the secondary CPU a soft interrupt, thereby causing
99 * the boot monitor to read the system wide flags register,
100 * and branch to the address found there.
101 */
102 smp_cross_call(cpumask_of(cpu), 1);
103
104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) {
106 smp_rmb();
107 if (pen_release == -1)
108 break;
109
110 udelay(10);
111 }
112
113 /*
114 * now the secondary core is starting up let it run its
115 * calibrations, then wait for it to finish
116 */
117 spin_unlock(&boot_lock);
118
119 return pen_release != -1 ? -ENOSYS : 0;
120}
121 24
122/* 25/*
123 * Initialise the CPU possible map early - this describes the CPUs 26 * Initialise the CPU possible map early - this describes the CPUs
@@ -125,36 +28,16 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
125 */ 28 */
126void __init smp_init_cpus(void) 29void __init smp_init_cpus(void)
127{ 30{
128 void __iomem *scu_base = scu_base_addr(); 31 ct_desc->init_cpu_map();
129 unsigned int i, ncores;
130
131 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
132
133 /* sanity check */
134 if (ncores > NR_CPUS) {
135 printk(KERN_WARNING
136 "vexpress: no. of cores (%d) greater than configured "
137 "maximum of %d - clipping\n",
138 ncores, NR_CPUS);
139 ncores = NR_CPUS;
140 }
141
142 for (i = 0; i < ncores; i++)
143 set_cpu_possible(i, true);
144} 32}
145 33
146void __init platform_smp_prepare_cpus(unsigned int max_cpus) 34void __init platform_smp_prepare_cpus(unsigned int max_cpus)
147{ 35{
148 int i;
149
150 /* 36 /*
151 * Initialise the present map, which describes the set of CPUs 37 * Initialise the present map, which describes the set of CPUs
152 * actually populated at the present time. 38 * actually populated at the present time.
153 */ 39 */
154 for (i = 0; i < max_cpus; i++) 40 ct_desc->smp_enable(max_cpus);
155 set_cpu_present(i, true);
156
157 scu_enable(scu_base_addr());
158 41
159 /* 42 /*
160 * Write the address of secondary startup into the 43 * Write the address of secondary startup into the
@@ -163,6 +46,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
163 * secondary CPU branches to this address. 46 * secondary CPU branches to this address.
164 */ 47 */
165 writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR)); 48 writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
166 writel(BSYM(virt_to_phys(vexpress_secondary_startup)), 49 writel(BSYM(virt_to_phys(versatile_secondary_startup)),
167 MMIO_P2V(V2M_SYS_FLAGSSET)); 50 MMIO_P2V(V2M_SYS_FLAGSSET));
168} 51}
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1edae65a0e72..ba46e8e07437 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -7,13 +7,16 @@
7#include <linux/io.h> 7#include <linux/io.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/ata_platform.h>
10#include <linux/smsc911x.h> 11#include <linux/smsc911x.h>
11#include <linux/spinlock.h> 12#include <linux/spinlock.h>
12#include <linux/sysdev.h> 13#include <linux/sysdev.h>
13#include <linux/usb/isp1760.h> 14#include <linux/usb/isp1760.h>
14#include <linux/clkdev.h> 15#include <linux/clkdev.h>
15 16
17#include <asm/mach-types.h>
16#include <asm/sizes.h> 18#include <asm/sizes.h>
19#include <asm/mach/arch.h>
17#include <asm/mach/flash.h> 20#include <asm/mach/flash.h>
18#include <asm/mach/map.h> 21#include <asm/mach/map.h>
19#include <asm/mach/time.h> 22#include <asm/mach/time.h>
@@ -21,6 +24,7 @@
21#include <asm/hardware/timer-sp.h> 24#include <asm/hardware/timer-sp.h>
22#include <asm/hardware/sp810.h> 25#include <asm/hardware/sp810.h>
23 26
27#include <mach/ct-ca9x4.h>
24#include <mach/motherboard.h> 28#include <mach/motherboard.h>
25 29
26#include <plat/sched_clock.h> 30#include <plat/sched_clock.h>
@@ -42,19 +46,16 @@ static struct map_desc v2m_io_desc[] __initdata = {
42 }, 46 },
43}; 47};
44 48
45void __init v2m_map_io(struct map_desc *tile, size_t num) 49static void __init v2m_init_early(void)
46{ 50{
47 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); 51 ct_desc->init_early();
48 iotable_init(tile, num); 52 versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
49} 53}
50 54
51
52static void __init v2m_timer_init(void) 55static void __init v2m_timer_init(void)
53{ 56{
54 u32 scctrl; 57 u32 scctrl;
55 58
56 versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
57
58 /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ 59 /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
59 scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL)); 60 scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
60 scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; 61 scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
@@ -68,7 +69,7 @@ static void __init v2m_timer_init(void)
68 sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0); 69 sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
69} 70}
70 71
71struct sys_timer v2m_timer = { 72static struct sys_timer v2m_timer = {
72 .init = v2m_timer_init, 73 .init = v2m_timer_init,
73}; 74};
74 75
@@ -249,6 +250,29 @@ static struct platform_device v2m_flash_device = {
249 .dev.platform_data = &v2m_flash_data, 250 .dev.platform_data = &v2m_flash_data,
250}; 251};
251 252
253static struct pata_platform_info v2m_pata_data = {
254 .ioport_shift = 2,
255};
256
257static struct resource v2m_pata_resources[] = {
258 {
259 .start = V2M_CF,
260 .end = V2M_CF + 0xff,
261 .flags = IORESOURCE_MEM,
262 }, {
263 .start = V2M_CF + 0x100,
264 .end = V2M_CF + SZ_4K - 1,
265 .flags = IORESOURCE_MEM,
266 },
267};
268
269static struct platform_device v2m_cf_device = {
270 .name = "pata_platform",
271 .id = -1,
272 .resource = v2m_pata_resources,
273 .num_resources = ARRAY_SIZE(v2m_pata_resources),
274 .dev.platform_data = &v2m_pata_data,
275};
252 276
253static unsigned int v2m_mmci_status(struct device *dev) 277static unsigned int v2m_mmci_status(struct device *dev)
254{ 278{
@@ -354,7 +378,44 @@ static void v2m_restart(char str, const char *cmd)
354 printk(KERN_EMERG "Unable to reboot\n"); 378 printk(KERN_EMERG "Unable to reboot\n");
355} 379}
356 380
357static int __init v2m_init(void) 381struct ct_desc *ct_desc;
382
383static struct ct_desc *ct_descs[] __initdata = {
384#ifdef CONFIG_ARCH_VEXPRESS_CA9X4
385 &ct_ca9x4_desc,
386#endif
387};
388
389static void __init v2m_populate_ct_desc(void)
390{
391 int i;
392 u32 current_tile_id;
393
394 ct_desc = NULL;
395 current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;
396
397 for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
398 if (ct_descs[i]->id == current_tile_id)
399 ct_desc = ct_descs[i];
400
401 if (!ct_desc)
402 panic("vexpress: failed to populate core tile description "
403 "for tile ID 0x%8x\n", current_tile_id);
404}
405
406static void __init v2m_map_io(void)
407{
408 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
409 v2m_populate_ct_desc();
410 ct_desc->map_io();
411}
412
413static void __init v2m_init_irq(void)
414{
415 ct_desc->init_irq();
416}
417
418static void __init v2m_init(void)
358{ 419{
359 int i; 420 int i;
360 421
@@ -363,6 +424,7 @@ static int __init v2m_init(void)
363 platform_device_register(&v2m_pcie_i2c_device); 424 platform_device_register(&v2m_pcie_i2c_device);
364 platform_device_register(&v2m_ddc_i2c_device); 425 platform_device_register(&v2m_ddc_i2c_device);
365 platform_device_register(&v2m_flash_device); 426 platform_device_register(&v2m_flash_device);
427 platform_device_register(&v2m_cf_device);
366 platform_device_register(&v2m_eth_device); 428 platform_device_register(&v2m_eth_device);
367 platform_device_register(&v2m_usb_device); 429 platform_device_register(&v2m_usb_device);
368 430
@@ -372,6 +434,14 @@ static int __init v2m_init(void)
372 pm_power_off = v2m_power_off; 434 pm_power_off = v2m_power_off;
373 arm_pm_restart = v2m_restart; 435 arm_pm_restart = v2m_restart;
374 436
375 return 0; 437 ct_desc->init_tile();
376} 438}
377arch_initcall(v2m_init); 439
440MACHINE_START(VEXPRESS, "ARM-Versatile Express")
441 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
442 .map_io = v2m_map_io,
443 .init_early = v2m_init_early,
444 .init_irq = v2m_init_irq,
445 .timer = &v2m_timer,
446 .init_machine = v2m_init,
447MACHINE_END
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c
index 5f4ddde4f02a..245140c0df10 100644
--- a/arch/arm/mach-vt8500/irq.c
+++ b/arch/arm/mach-vt8500/irq.c
@@ -97,15 +97,15 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type)
97 return -EINVAL; 97 return -EINVAL;
98 case IRQF_TRIGGER_HIGH: 98 case IRQF_TRIGGER_HIGH:
99 dctr |= VT8500_TRIGGER_HIGH; 99 dctr |= VT8500_TRIGGER_HIGH;
100 irq_desc[orig_irq].handle_irq = handle_level_irq; 100 __irq_set_handler_locked(orig_irq, handle_level_irq);
101 break; 101 break;
102 case IRQF_TRIGGER_FALLING: 102 case IRQF_TRIGGER_FALLING:
103 dctr |= VT8500_TRIGGER_FALLING; 103 dctr |= VT8500_TRIGGER_FALLING;
104 irq_desc[orig_irq].handle_irq = handle_edge_irq; 104 __irq_set_handler_locked(orig_irq, handle_edge_irq);
105 break; 105 break;
106 case IRQF_TRIGGER_RISING: 106 case IRQF_TRIGGER_RISING:
107 dctr |= VT8500_TRIGGER_RISING; 107 dctr |= VT8500_TRIGGER_RISING;
108 irq_desc[orig_irq].handle_irq = handle_edge_irq; 108 __irq_set_handler_locked(orig_irq, handle_edge_irq);
109 break; 109 break;
110 } 110 }
111 writeb(dctr, base + VT8500_IC_DCTR + irq); 111 writeb(dctr, base + VT8500_IC_DCTR + irq);
@@ -136,8 +136,8 @@ void __init vt8500_init_irq(void)
136 /* Disable all interrupts and route them to IRQ */ 136 /* Disable all interrupts and route them to IRQ */
137 writeb(0x00, ic_regbase + VT8500_IC_DCTR + i); 137 writeb(0x00, ic_regbase + VT8500_IC_DCTR + i);
138 138
139 set_irq_chip(i, &vt8500_irq_chip); 139 irq_set_chip_and_handler(i, &vt8500_irq_chip,
140 set_irq_handler(i, handle_level_irq); 140 handle_level_irq);
141 set_irq_flags(i, IRQF_VALID); 141 set_irq_flags(i, IRQF_VALID);
142 } 142 }
143 } else { 143 } else {
@@ -167,8 +167,8 @@ void __init wm8505_init_irq(void)
167 writeb(0x00, sic_regbase + VT8500_IC_DCTR 167 writeb(0x00, sic_regbase + VT8500_IC_DCTR
168 + i - 64); 168 + i - 64);
169 169
170 set_irq_chip(i, &vt8500_irq_chip); 170 irq_set_chip_and_handler(i, &vt8500_irq_chip,
171 set_irq_handler(i, handle_level_irq); 171 handle_level_irq);
172 set_irq_flags(i, IRQF_VALID); 172 set_irq_flags(i, IRQF_VALID);
173 } 173 }
174 } else { 174 } else {
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index 9c350103dcda..7bf143c443f1 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -207,8 +207,8 @@ void __init nuc900_init_irq(void)
207 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); 207 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
208 208
209 for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) { 209 for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
210 set_irq_chip(irqno, &nuc900_irq_chip); 210 irq_set_chip_and_handler(irqno, &nuc900_irq_chip,
211 set_irq_handler(irqno, handle_level_irq); 211 handle_level_irq);
212 set_irq_flags(irqno, IRQF_VALID); 212 set_irq_flags(irqno, IRQF_VALID);
213 } 213 }
214} 214}
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S
index d3644db467b7..f40c69656d8d 100644
--- a/arch/arm/mm/cache-v4wb.S
+++ b/arch/arm/mm/cache-v4wb.S
@@ -32,7 +32,7 @@
32/* 32/*
33 * This is the size at which it becomes more efficient to 33 * This is the size at which it becomes more efficient to
34 * clean the whole cache, rather than using the individual 34 * clean the whole cache, rather than using the individual
35 * cache line maintainence instructions. 35 * cache line maintenance instructions.
36 * 36 *
37 * Size Clean (ticks) Dirty (ticks) 37 * Size Clean (ticks) Dirty (ticks)
38 * 4096 21 20 21 53 55 54 38 * 4096 21 20 21 53 55 54
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index 49c2b66cf3dd..a7b276dbda11 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -34,7 +34,7 @@
34/* 34/*
35 * This is the size at which it becomes more efficient to 35 * This is the size at which it becomes more efficient to
36 * clean the whole cache, rather than using the individual 36 * clean the whole cache, rather than using the individual
37 * cache line maintainence instructions. 37 * cache line maintenance instructions.
38 * 38 *
39 * *** This needs benchmarking 39 * *** This needs benchmarking
40 */ 40 */
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 6136e68ce953..dc18d81ef8ce 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -96,7 +96,7 @@ ENDPROC(v7_flush_dcache_all)
96 * Flush the entire cache system. 96 * Flush the entire cache system.
97 * The data cache flush is now achieved using atomic clean / invalidates 97 * The data cache flush is now achieved using atomic clean / invalidates
98 * working outwards from L1 cache. This is done using Set/Way based cache 98 * working outwards from L1 cache. This is done using Set/Way based cache
99 * maintainance instructions. 99 * maintenance instructions.
100 * The instruction cache can still be invalidated back to the point of 100 * The instruction cache can still be invalidated back to the point of
101 * unification in a single instruction. 101 * unification in a single instruction.
102 * 102 *
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 4771dba61448..82a093cee09a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -149,6 +149,7 @@ static int __init consistent_init(void)
149{ 149{
150 int ret = 0; 150 int ret = 0;
151 pgd_t *pgd; 151 pgd_t *pgd;
152 pud_t *pud;
152 pmd_t *pmd; 153 pmd_t *pmd;
153 pte_t *pte; 154 pte_t *pte;
154 int i = 0; 155 int i = 0;
@@ -156,7 +157,15 @@ static int __init consistent_init(void)
156 157
157 do { 158 do {
158 pgd = pgd_offset(&init_mm, base); 159 pgd = pgd_offset(&init_mm, base);
159 pmd = pmd_alloc(&init_mm, pgd, base); 160
161 pud = pud_alloc(&init_mm, pgd, base);
162 if (!pud) {
163 printk(KERN_ERR "%s: no pud tables\n", __func__);
164 ret = -ENOMEM;
165 break;
166 }
167
168 pmd = pmd_alloc(&init_mm, pud, base);
160 if (!pmd) { 169 if (!pmd) {
161 printk(KERN_ERR "%s: no pmd tables\n", __func__); 170 printk(KERN_ERR "%s: no pmd tables\n", __func__);
162 ret = -ENOMEM; 171 ret = -ENOMEM;
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 01210dba0221..7cab79179421 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -95,6 +95,7 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
95{ 95{
96 spinlock_t *ptl; 96 spinlock_t *ptl;
97 pgd_t *pgd; 97 pgd_t *pgd;
98 pud_t *pud;
98 pmd_t *pmd; 99 pmd_t *pmd;
99 pte_t *pte; 100 pte_t *pte;
100 int ret; 101 int ret;
@@ -103,7 +104,11 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
103 if (pgd_none_or_clear_bad(pgd)) 104 if (pgd_none_or_clear_bad(pgd))
104 return 0; 105 return 0;
105 106
106 pmd = pmd_offset(pgd, address); 107 pud = pud_offset(pgd, address);
108 if (pud_none_or_clear_bad(pud))
109 return 0;
110
111 pmd = pmd_offset(pud, address);
107 if (pmd_none_or_clear_bad(pmd)) 112 if (pmd_none_or_clear_bad(pmd))
108 return 0; 113 return 0;
109 114
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index f10f9bac2206..bc0e1d88fd3b 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -76,9 +76,11 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
76 76
77 printk(KERN_ALERT "pgd = %p\n", mm->pgd); 77 printk(KERN_ALERT "pgd = %p\n", mm->pgd);
78 pgd = pgd_offset(mm, addr); 78 pgd = pgd_offset(mm, addr);
79 printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd)); 79 printk(KERN_ALERT "[%08lx] *pgd=%08llx",
80 addr, (long long)pgd_val(*pgd));
80 81
81 do { 82 do {
83 pud_t *pud;
82 pmd_t *pmd; 84 pmd_t *pmd;
83 pte_t *pte; 85 pte_t *pte;
84 86
@@ -90,9 +92,21 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
90 break; 92 break;
91 } 93 }
92 94
93 pmd = pmd_offset(pgd, addr); 95 pud = pud_offset(pgd, addr);
96 if (PTRS_PER_PUD != 1)
97 printk(", *pud=%08lx", pud_val(*pud));
98
99 if (pud_none(*pud))
100 break;
101
102 if (pud_bad(*pud)) {
103 printk("(bad)");
104 break;
105 }
106
107 pmd = pmd_offset(pud, addr);
94 if (PTRS_PER_PMD != 1) 108 if (PTRS_PER_PMD != 1)
95 printk(", *pmd=%08lx", pmd_val(*pmd)); 109 printk(", *pmd=%08llx", (long long)pmd_val(*pmd));
96 110
97 if (pmd_none(*pmd)) 111 if (pmd_none(*pmd))
98 break; 112 break;
@@ -107,8 +121,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
107 break; 121 break;
108 122
109 pte = pte_offset_map(pmd, addr); 123 pte = pte_offset_map(pmd, addr);
110 printk(", *pte=%08lx", pte_val(*pte)); 124 printk(", *pte=%08llx", (long long)pte_val(*pte));
111 printk(", *ppte=%08lx", pte_val(pte[PTE_HWTABLE_PTRS])); 125 printk(", *ppte=%08llx",
126 (long long)pte_val(pte[PTE_HWTABLE_PTRS]));
112 pte_unmap(pte); 127 pte_unmap(pte);
113 } while(0); 128 } while(0);
114 129
@@ -388,6 +403,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
388{ 403{
389 unsigned int index; 404 unsigned int index;
390 pgd_t *pgd, *pgd_k; 405 pgd_t *pgd, *pgd_k;
406 pud_t *pud, *pud_k;
391 pmd_t *pmd, *pmd_k; 407 pmd_t *pmd, *pmd_k;
392 408
393 if (addr < TASK_SIZE) 409 if (addr < TASK_SIZE)
@@ -406,12 +422,19 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
406 422
407 if (pgd_none(*pgd_k)) 423 if (pgd_none(*pgd_k))
408 goto bad_area; 424 goto bad_area;
409
410 if (!pgd_present(*pgd)) 425 if (!pgd_present(*pgd))
411 set_pgd(pgd, *pgd_k); 426 set_pgd(pgd, *pgd_k);
412 427
413 pmd_k = pmd_offset(pgd_k, addr); 428 pud = pud_offset(pgd, addr);
414 pmd = pmd_offset(pgd, addr); 429 pud_k = pud_offset(pgd_k, addr);
430
431 if (pud_none(*pud_k))
432 goto bad_area;
433 if (!pud_present(*pud))
434 set_pud(pud, *pud_k);
435
436 pmd = pmd_offset(pud, addr);
437 pmd_k = pmd_offset(pud_k, addr);
415 438
416 /* 439 /*
417 * On ARM one Linux PGD entry contains two hardware entries (see page 440 * On ARM one Linux PGD entry contains two hardware entries (see page
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 57299446f787..2be9139a4ef3 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -4,10 +4,10 @@
4#include <asm/pgalloc.h> 4#include <asm/pgalloc.h>
5#include <asm/pgtable.h> 5#include <asm/pgtable.h>
6 6
7static void idmap_add_pmd(pgd_t *pgd, unsigned long addr, unsigned long end, 7static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
8 unsigned long prot) 8 unsigned long prot)
9{ 9{
10 pmd_t *pmd = pmd_offset(pgd, addr); 10 pmd_t *pmd = pmd_offset(pud, addr);
11 11
12 addr = (addr & PMD_MASK) | prot; 12 addr = (addr & PMD_MASK) | prot;
13 pmd[0] = __pmd(addr); 13 pmd[0] = __pmd(addr);
@@ -16,6 +16,18 @@ static void idmap_add_pmd(pgd_t *pgd, unsigned long addr, unsigned long end,
16 flush_pmd_entry(pmd); 16 flush_pmd_entry(pmd);
17} 17}
18 18
19static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
20 unsigned long prot)
21{
22 pud_t *pud = pud_offset(pgd, addr);
23 unsigned long next;
24
25 do {
26 next = pud_addr_end(addr, end);
27 idmap_add_pmd(pud, addr, next, prot);
28 } while (pud++, addr = next, addr != end);
29}
30
19void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) 31void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
20{ 32{
21 unsigned long prot, next; 33 unsigned long prot, next;
@@ -27,17 +39,28 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
27 pgd += pgd_index(addr); 39 pgd += pgd_index(addr);
28 do { 40 do {
29 next = pgd_addr_end(addr, end); 41 next = pgd_addr_end(addr, end);
30 idmap_add_pmd(pgd, addr, next, prot); 42 idmap_add_pud(pgd, addr, next, prot);
31 } while (pgd++, addr = next, addr != end); 43 } while (pgd++, addr = next, addr != end);
32} 44}
33 45
34#ifdef CONFIG_SMP 46#ifdef CONFIG_SMP
35static void idmap_del_pmd(pgd_t *pgd, unsigned long addr, unsigned long end) 47static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end)
36{ 48{
37 pmd_t *pmd = pmd_offset(pgd, addr); 49 pmd_t *pmd = pmd_offset(pud, addr);
38 pmd_clear(pmd); 50 pmd_clear(pmd);
39} 51}
40 52
53static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end)
54{
55 pud_t *pud = pud_offset(pgd, addr);
56 unsigned long next;
57
58 do {
59 next = pud_addr_end(addr, end);
60 idmap_del_pmd(pud, addr, next);
61 } while (pud++, addr = next, addr != end);
62}
63
41void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end) 64void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
42{ 65{
43 unsigned long next; 66 unsigned long next;
@@ -45,7 +68,7 @@ void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
45 pgd += pgd_index(addr); 68 pgd += pgd_index(addr);
46 do { 69 do {
47 next = pgd_addr_end(addr, end); 70 next = pgd_addr_end(addr, end);
48 idmap_del_pmd(pgd, addr, next); 71 idmap_del_pud(pgd, addr, next);
49 } while (pgd++, addr = next, addr != end); 72 } while (pgd++, addr = next, addr != end);
50} 73}
51#endif 74#endif
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index cddd684364da..e5f6fc428348 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -78,7 +78,7 @@ __tagtable(ATAG_INITRD2, parse_tag_initrd2);
78 */ 78 */
79struct meminfo meminfo; 79struct meminfo meminfo;
80 80
81void show_mem(void) 81void show_mem(unsigned int filter)
82{ 82{
83 int free = 0, total = 0, reserved = 0; 83 int free = 0, total = 0, reserved = 0;
84 int shared = 0, cached = 0, slab = 0, i; 84 int shared = 0, cached = 0, slab = 0, i;
@@ -350,7 +350,7 @@ void __init bootmem_init(void)
350 */ 350 */
351 arm_bootmem_free(min, max_low, max_high); 351 arm_bootmem_free(min, max_low, max_high);
352 352
353 high_memory = __va((max_low << PAGE_SHIFT) - 1) + 1; 353 high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1;
354 354
355 /* 355 /*
356 * This doesn't seem to be used by the Linux memory manager any 356 * This doesn't seem to be used by the Linux memory manager any
@@ -398,8 +398,8 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
398 * Convert to physical addresses, and 398 * Convert to physical addresses, and
399 * round start upwards and end downwards. 399 * round start upwards and end downwards.
400 */ 400 */
401 pg = PAGE_ALIGN(__pa(start_pg)); 401 pg = (unsigned long)PAGE_ALIGN(__pa(start_pg));
402 pgend = __pa(end_pg) & PAGE_MASK; 402 pgend = (unsigned long)__pa(end_pg) & PAGE_MASK;
403 403
404 /* 404 /*
405 * If there are free pages between these, 405 * If there are free pages between these,
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 36960df5fb76..d2384106af9c 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -7,7 +7,7 @@ extern pmd_t *top_pmd;
7 7
8static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt) 8static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
9{ 9{
10 return pmd_offset(pgd, virt); 10 return pmd_offset(pud_offset(pgd, virt), virt);
11} 11}
12 12
13static inline pmd_t *pmd_off_k(unsigned long virt) 13static inline pmd_t *pmd_off_k(unsigned long virt)
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index afe209e1e1f8..74be05f3e03a 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -7,6 +7,7 @@
7#include <linux/shm.h> 7#include <linux/shm.h>
8#include <linux/sched.h> 8#include <linux/sched.h>
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/personality.h>
10#include <linux/random.h> 11#include <linux/random.h>
11#include <asm/cputype.h> 12#include <asm/cputype.h>
12#include <asm/system.h> 13#include <asm/system.h>
@@ -82,7 +83,8 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
82 mm->cached_hole_size = 0; 83 mm->cached_hole_size = 0;
83 } 84 }
84 /* 8 bits of randomness in 20 address space bits */ 85 /* 8 bits of randomness in 20 address space bits */
85 if (current->flags & PF_RANDOMIZE) 86 if ((current->flags & PF_RANDOMIZE) &&
87 !(current->personality & ADDR_NO_RANDOMIZE))
86 addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT; 88 addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT;
87 89
88full_search: 90full_search:
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ff7b43b5885a..6cf76b3b68d1 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -533,7 +533,7 @@ static void __init *early_alloc(unsigned long sz)
533static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot) 533static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot)
534{ 534{
535 if (pmd_none(*pmd)) { 535 if (pmd_none(*pmd)) {
536 pte_t *pte = early_alloc(2 * PTRS_PER_PTE * sizeof(pte_t)); 536 pte_t *pte = early_alloc(PTE_HWTABLE_OFF + PTE_HWTABLE_SIZE);
537 __pmd_populate(pmd, __pa(pte), prot); 537 __pmd_populate(pmd, __pa(pte), prot);
538 } 538 }
539 BUG_ON(pmd_bad(*pmd)); 539 BUG_ON(pmd_bad(*pmd));
@@ -551,11 +551,11 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
551 } while (pte++, addr += PAGE_SIZE, addr != end); 551 } while (pte++, addr += PAGE_SIZE, addr != end);
552} 552}
553 553
554static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, 554static void __init alloc_init_section(pud_t *pud, unsigned long addr,
555 unsigned long end, phys_addr_t phys, 555 unsigned long end, phys_addr_t phys,
556 const struct mem_type *type) 556 const struct mem_type *type)
557{ 557{
558 pmd_t *pmd = pmd_offset(pgd, addr); 558 pmd_t *pmd = pmd_offset(pud, addr);
559 559
560 /* 560 /*
561 * Try a section mapping - end, addr and phys must all be aligned 561 * Try a section mapping - end, addr and phys must all be aligned
@@ -584,6 +584,19 @@ static void __init alloc_init_section(pgd_t *pgd, unsigned long addr,
584 } 584 }
585} 585}
586 586
587static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
588 unsigned long phys, const struct mem_type *type)
589{
590 pud_t *pud = pud_offset(pgd, addr);
591 unsigned long next;
592
593 do {
594 next = pud_addr_end(addr, end);
595 alloc_init_section(pud, addr, next, phys, type);
596 phys += next - addr;
597 } while (pud++, addr = next, addr != end);
598}
599
587static void __init create_36bit_mapping(struct map_desc *md, 600static void __init create_36bit_mapping(struct map_desc *md,
588 const struct mem_type *type) 601 const struct mem_type *type)
589{ 602{
@@ -592,13 +605,13 @@ static void __init create_36bit_mapping(struct map_desc *md,
592 pgd_t *pgd; 605 pgd_t *pgd;
593 606
594 addr = md->virtual; 607 addr = md->virtual;
595 phys = (unsigned long)__pfn_to_phys(md->pfn); 608 phys = __pfn_to_phys(md->pfn);
596 length = PAGE_ALIGN(md->length); 609 length = PAGE_ALIGN(md->length);
597 610
598 if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) { 611 if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) {
599 printk(KERN_ERR "MM: CPU does not support supersection " 612 printk(KERN_ERR "MM: CPU does not support supersection "
600 "mapping for 0x%08llx at 0x%08lx\n", 613 "mapping for 0x%08llx at 0x%08lx\n",
601 __pfn_to_phys((u64)md->pfn), addr); 614 (long long)__pfn_to_phys((u64)md->pfn), addr);
602 return; 615 return;
603 } 616 }
604 617
@@ -611,14 +624,14 @@ static void __init create_36bit_mapping(struct map_desc *md,
611 if (type->domain) { 624 if (type->domain) {
612 printk(KERN_ERR "MM: invalid domain in supersection " 625 printk(KERN_ERR "MM: invalid domain in supersection "
613 "mapping for 0x%08llx at 0x%08lx\n", 626 "mapping for 0x%08llx at 0x%08lx\n",
614 __pfn_to_phys((u64)md->pfn), addr); 627 (long long)__pfn_to_phys((u64)md->pfn), addr);
615 return; 628 return;
616 } 629 }
617 630
618 if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) { 631 if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) {
619 printk(KERN_ERR "MM: cannot create mapping for " 632 printk(KERN_ERR "MM: cannot create mapping for 0x%08llx"
620 "0x%08llx at 0x%08lx invalid alignment\n", 633 " at 0x%08lx invalid alignment\n",
621 __pfn_to_phys((u64)md->pfn), addr); 634 (long long)__pfn_to_phys((u64)md->pfn), addr);
622 return; 635 return;
623 } 636 }
624 637
@@ -631,7 +644,8 @@ static void __init create_36bit_mapping(struct map_desc *md,
631 pgd = pgd_offset_k(addr); 644 pgd = pgd_offset_k(addr);
632 end = addr + length; 645 end = addr + length;
633 do { 646 do {
634 pmd_t *pmd = pmd_offset(pgd, addr); 647 pud_t *pud = pud_offset(pgd, addr);
648 pmd_t *pmd = pmd_offset(pud, addr);
635 int i; 649 int i;
636 650
637 for (i = 0; i < 16; i++) 651 for (i = 0; i < 16; i++)
@@ -652,22 +666,23 @@ static void __init create_36bit_mapping(struct map_desc *md,
652 */ 666 */
653static void __init create_mapping(struct map_desc *md) 667static void __init create_mapping(struct map_desc *md)
654{ 668{
655 unsigned long phys, addr, length, end; 669 unsigned long addr, length, end;
670 phys_addr_t phys;
656 const struct mem_type *type; 671 const struct mem_type *type;
657 pgd_t *pgd; 672 pgd_t *pgd;
658 673
659 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { 674 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) {
660 printk(KERN_WARNING "BUG: not creating mapping for " 675 printk(KERN_WARNING "BUG: not creating mapping for 0x%08llx"
661 "0x%08llx at 0x%08lx in user region\n", 676 " at 0x%08lx in user region\n",
662 __pfn_to_phys((u64)md->pfn), md->virtual); 677 (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
663 return; 678 return;
664 } 679 }
665 680
666 if ((md->type == MT_DEVICE || md->type == MT_ROM) && 681 if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
667 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 682 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
668 printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx " 683 printk(KERN_WARNING "BUG: mapping for 0x%08llx"
669 "overlaps vmalloc space\n", 684 " at 0x%08lx overlaps vmalloc space\n",
670 __pfn_to_phys((u64)md->pfn), md->virtual); 685 (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
671 } 686 }
672 687
673 type = &mem_types[md->type]; 688 type = &mem_types[md->type];
@@ -681,13 +696,13 @@ static void __init create_mapping(struct map_desc *md)
681 } 696 }
682 697
683 addr = md->virtual & PAGE_MASK; 698 addr = md->virtual & PAGE_MASK;
684 phys = (unsigned long)__pfn_to_phys(md->pfn); 699 phys = __pfn_to_phys(md->pfn);
685 length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); 700 length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
686 701
687 if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { 702 if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) {
688 printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " 703 printk(KERN_WARNING "BUG: map for 0x%08llx at 0x%08lx can not "
689 "be mapped using pages, ignoring.\n", 704 "be mapped using pages, ignoring.\n",
690 __pfn_to_phys(md->pfn), addr); 705 (long long)__pfn_to_phys(md->pfn), addr);
691 return; 706 return;
692 } 707 }
693 708
@@ -696,7 +711,7 @@ static void __init create_mapping(struct map_desc *md)
696 do { 711 do {
697 unsigned long next = pgd_addr_end(addr, end); 712 unsigned long next = pgd_addr_end(addr, end);
698 713
699 alloc_init_section(pgd, addr, next, phys, type); 714 alloc_init_pud(pgd, addr, next, phys, type);
700 715
701 phys += next - addr; 716 phys += next - addr;
702 addr = next; 717 addr = next;
@@ -794,9 +809,10 @@ static void __init sanity_check_meminfo(void)
794 */ 809 */
795 if (__va(bank->start) >= vmalloc_min || 810 if (__va(bank->start) >= vmalloc_min ||
796 __va(bank->start) < (void *)PAGE_OFFSET) { 811 __va(bank->start) < (void *)PAGE_OFFSET) {
797 printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " 812 printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
798 "(vmalloc region overlap).\n", 813 "(vmalloc region overlap).\n",
799 bank->start, bank->start + bank->size - 1); 814 (unsigned long long)bank->start,
815 (unsigned long long)bank->start + bank->size - 1);
800 continue; 816 continue;
801 } 817 }
802 818
@@ -807,10 +823,11 @@ static void __init sanity_check_meminfo(void)
807 if (__va(bank->start + bank->size) > vmalloc_min || 823 if (__va(bank->start + bank->size) > vmalloc_min ||
808 __va(bank->start + bank->size) < __va(bank->start)) { 824 __va(bank->start + bank->size) < __va(bank->start)) {
809 unsigned long newsize = vmalloc_min - __va(bank->start); 825 unsigned long newsize = vmalloc_min - __va(bank->start);
810 printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx " 826 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
811 "to -%.8lx (vmalloc region overlap).\n", 827 "to -%.8llx (vmalloc region overlap).\n",
812 bank->start, bank->start + bank->size - 1, 828 (unsigned long long)bank->start,
813 bank->start + newsize - 1); 829 (unsigned long long)bank->start + bank->size - 1,
830 (unsigned long long)bank->start + newsize - 1);
814 bank->size = newsize; 831 bank->size = newsize;
815 } 832 }
816#endif 833#endif
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 709244c66fa3..b2027c154b2a 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -23,6 +23,7 @@
23pgd_t *pgd_alloc(struct mm_struct *mm) 23pgd_t *pgd_alloc(struct mm_struct *mm)
24{ 24{
25 pgd_t *new_pgd, *init_pgd; 25 pgd_t *new_pgd, *init_pgd;
26 pud_t *new_pud, *init_pud;
26 pmd_t *new_pmd, *init_pmd; 27 pmd_t *new_pmd, *init_pmd;
27 pte_t *new_pte, *init_pte; 28 pte_t *new_pte, *init_pte;
28 29
@@ -46,7 +47,11 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
46 * On ARM, first page must always be allocated since it 47 * On ARM, first page must always be allocated since it
47 * contains the machine vectors. 48 * contains the machine vectors.
48 */ 49 */
49 new_pmd = pmd_alloc(mm, new_pgd, 0); 50 new_pud = pud_alloc(mm, new_pgd, 0);
51 if (!new_pud)
52 goto no_pud;
53
54 new_pmd = pmd_alloc(mm, new_pud, 0);
50 if (!new_pmd) 55 if (!new_pmd)
51 goto no_pmd; 56 goto no_pmd;
52 57
@@ -54,7 +59,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
54 if (!new_pte) 59 if (!new_pte)
55 goto no_pte; 60 goto no_pte;
56 61
57 init_pmd = pmd_offset(init_pgd, 0); 62 init_pud = pud_offset(init_pgd, 0);
63 init_pmd = pmd_offset(init_pud, 0);
58 init_pte = pte_offset_map(init_pmd, 0); 64 init_pte = pte_offset_map(init_pmd, 0);
59 set_pte_ext(new_pte, *init_pte, 0); 65 set_pte_ext(new_pte, *init_pte, 0);
60 pte_unmap(init_pte); 66 pte_unmap(init_pte);
@@ -66,6 +72,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
66no_pte: 72no_pte:
67 pmd_free(mm, new_pmd); 73 pmd_free(mm, new_pmd);
68no_pmd: 74no_pmd:
75 pud_free(mm, new_pud);
76no_pud:
69 free_pages((unsigned long)new_pgd, 2); 77 free_pages((unsigned long)new_pgd, 2);
70no_pgd: 78no_pgd:
71 return NULL; 79 return NULL;
@@ -74,6 +82,7 @@ no_pgd:
74void pgd_free(struct mm_struct *mm, pgd_t *pgd_base) 82void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
75{ 83{
76 pgd_t *pgd; 84 pgd_t *pgd;
85 pud_t *pud;
77 pmd_t *pmd; 86 pmd_t *pmd;
78 pgtable_t pte; 87 pgtable_t pte;
79 88
@@ -84,7 +93,11 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
84 if (pgd_none_or_clear_bad(pgd)) 93 if (pgd_none_or_clear_bad(pgd))
85 goto no_pgd; 94 goto no_pgd;
86 95
87 pmd = pmd_offset(pgd, 0); 96 pud = pud_offset(pgd, 0);
97 if (pud_none_or_clear_bad(pud))
98 goto no_pud;
99
100 pmd = pmd_offset(pud, 0);
88 if (pmd_none_or_clear_bad(pmd)) 101 if (pmd_none_or_clear_bad(pmd))
89 goto no_pmd; 102 goto no_pmd;
90 103
@@ -92,8 +105,11 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
92 pmd_clear(pmd); 105 pmd_clear(pmd);
93 pte_free(mm, pte); 106 pte_free(mm, pte);
94no_pmd: 107no_pmd:
95 pgd_clear(pgd); 108 pud_clear(pud);
96 pmd_free(mm, pmd); 109 pmd_free(mm, pmd);
110no_pud:
111 pgd_clear(pgd);
112 pud_free(mm, pud);
97no_pgd: 113no_pgd:
98 free_pages((unsigned long) pgd_base, 2); 114 free_pages((unsigned long) pgd_base, 2);
99} 115}
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 226e3d8351c2..6c4e7fd6c8af 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -64,7 +64,7 @@
64/* 64/*
65 * This is the size at which it becomes more efficient to 65 * This is the size at which it becomes more efficient to
66 * clean the whole cache, rather than using the individual 66 * clean the whole cache, rather than using the individual
67 * cache line maintainence instructions. 67 * cache line maintenance instructions.
68 */ 68 */
69#define CACHE_DLIMIT 32768 69#define CACHE_DLIMIT 32768
70 70
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 86d9c2cf0bce..4ce947c19623 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -64,7 +64,7 @@
64/* 64/*
65 * This is the size at which it becomes more efficient to 65 * This is the size at which it becomes more efficient to
66 * clean the whole cache, rather than using the individual 66 * clean the whole cache, rather than using the individual
67 * cache line maintainence instructions. 67 * cache line maintenance instructions.
68 */ 68 */
69#define CACHE_DLIMIT 32768 69#define CACHE_DLIMIT 32768
70 70
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 83d3dd34f846..c8884c5413a2 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -53,7 +53,7 @@
53/* 53/*
54 * This is the size at which it becomes more efficient to 54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual 55 * clean the whole cache, rather than using the individual
56 * cache line maintainence instructions. 56 * cache line maintenance instructions.
57 */ 57 */
58#define CACHE_DLIMIT 32768 58#define CACHE_DLIMIT 32768
59 59
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 686043ee7281..413684660aad 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -53,7 +53,7 @@
53/* 53/*
54 * This is the size at which it becomes more efficient to 54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual 55 * clean the whole cache, rather than using the individual
56 * cache line maintainence instructions. 56 * cache line maintenance instructions.
57 */ 57 */
58#define CACHE_DLIMIT 32768 58#define CACHE_DLIMIT 32768
59 59
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 665266da143c..7a06e5964f59 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -63,7 +63,7 @@ ENTRY(cpu_arm720_proc_fin)
63/* 63/*
64 * Function: arm720_proc_do_idle(void) 64 * Function: arm720_proc_do_idle(void)
65 * Params : r0 = unused 65 * Params : r0 = unused
66 * Purpose : put the processer in proper idle mode 66 * Purpose : put the processor in proper idle mode
67 */ 67 */
68ENTRY(cpu_arm720_do_idle) 68ENTRY(cpu_arm720_do_idle)
69 mov pc, lr 69 mov pc, lr
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 219980ec8b6e..bf8a1d1cccb6 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -53,7 +53,7 @@
53/* 53/*
54 * This is the size at which it becomes more efficient to 54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual 55 * clean the whole cache, rather than using the individual
56 * cache line maintainence instructions. 56 * cache line maintenance instructions.
57 */ 57 */
58#define CACHE_DLIMIT 65536 58#define CACHE_DLIMIT 65536
59 59
@@ -390,7 +390,7 @@ ENTRY(cpu_arm920_set_pte_ext)
390/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ 390/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
391.globl cpu_arm920_suspend_size 391.globl cpu_arm920_suspend_size
392.equ cpu_arm920_suspend_size, 4 * 3 392.equ cpu_arm920_suspend_size, 4 * 3
393#ifdef CONFIG_PM 393#ifdef CONFIG_PM_SLEEP
394ENTRY(cpu_arm920_do_suspend) 394ENTRY(cpu_arm920_do_suspend)
395 stmfd sp!, {r4 - r7, lr} 395 stmfd sp!, {r4 - r7, lr}
396 mrc p15, 0, r4, c13, c0, 0 @ PID 396 mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 36154b1e792a..95ba1fc56e4d 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -54,7 +54,7 @@
54/* 54/*
55 * This is the size at which it becomes more efficient to 55 * This is the size at which it becomes more efficient to
56 * clean the whole cache, rather than using the individual 56 * clean the whole cache, rather than using the individual
57 * cache line maintainence instructions. (I think this should 57 * cache line maintenance instructions. (I think this should
58 * be 32768). 58 * be 32768).
59 */ 59 */
60#define CACHE_DLIMIT 8192 60#define CACHE_DLIMIT 8192
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 89c5e0009c4c..541e4774eea1 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -77,7 +77,7 @@
77/* 77/*
78 * This is the size at which it becomes more efficient to 78 * This is the size at which it becomes more efficient to
79 * clean the whole cache, rather than using the individual 79 * clean the whole cache, rather than using the individual
80 * cache line maintainence instructions. 80 * cache line maintenance instructions.
81 */ 81 */
82#define CACHE_DLIMIT 8192 82#define CACHE_DLIMIT 8192
83 83
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 6a4bdb2c94a7..0ed85d930c09 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -404,7 +404,7 @@ ENTRY(cpu_arm926_set_pte_ext)
404/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ 404/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
405.globl cpu_arm926_suspend_size 405.globl cpu_arm926_suspend_size
406.equ cpu_arm926_suspend_size, 4 * 3 406.equ cpu_arm926_suspend_size, 4 * 3
407#ifdef CONFIG_PM 407#ifdef CONFIG_PM_SLEEP
408ENTRY(cpu_arm926_do_suspend) 408ENTRY(cpu_arm926_do_suspend)
409 stmfd sp!, {r4 - r7, lr} 409 stmfd sp!, {r4 - r7, lr}
410 mrc p15, 0, r4, c13, c0, 0 @ PID 410 mrc p15, 0, r4, c13, c0, 0 @ PID
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index e32fa499194c..34261f9486b9 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -85,7 +85,7 @@
85 85
86/* 86/*
87 * Sanity check the PTE configuration for the code below - which makes 87 * Sanity check the PTE configuration for the code below - which makes
88 * certain assumptions about how these bits are layed out. 88 * certain assumptions about how these bits are laid out.
89 */ 89 */
90#ifdef CONFIG_MMU 90#ifdef CONFIG_MMU
91#if L_PTE_SHARED != PTE_EXT_SHARED 91#if L_PTE_SHARED != PTE_EXT_SHARED
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 74483d1977fe..184a9c997e36 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -171,7 +171,7 @@ ENTRY(cpu_sa1100_set_pte_ext)
171 171
172.globl cpu_sa1100_suspend_size 172.globl cpu_sa1100_suspend_size
173.equ cpu_sa1100_suspend_size, 4*4 173.equ cpu_sa1100_suspend_size, 4*4
174#ifdef CONFIG_PM 174#ifdef CONFIG_PM_SLEEP
175ENTRY(cpu_sa1100_do_suspend) 175ENTRY(cpu_sa1100_do_suspend)
176 stmfd sp!, {r4 - r7, lr} 176 stmfd sp!, {r4 - r7, lr}
177 mrc p15, 0, r4, c3, c0, 0 @ domain ID 177 mrc p15, 0, r4, c3, c0, 0 @ domain ID
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 832b6bdc192c..7c99cb4c8e4f 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -124,7 +124,7 @@ ENTRY(cpu_v6_set_pte_ext)
124/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */ 124/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
125.globl cpu_v6_suspend_size 125.globl cpu_v6_suspend_size
126.equ cpu_v6_suspend_size, 4 * 8 126.equ cpu_v6_suspend_size, 4 * 8
127#ifdef CONFIG_PM 127#ifdef CONFIG_PM_SLEEP
128ENTRY(cpu_v6_do_suspend) 128ENTRY(cpu_v6_do_suspend)
129 stmfd sp!, {r4 - r11, lr} 129 stmfd sp!, {r4 - r11, lr}
130 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 130 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
@@ -132,7 +132,7 @@ ENTRY(cpu_v6_do_suspend)
132 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 132 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
133 mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 133 mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0
134 mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 134 mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1
135 mrc p15, 0, r9, c1, c0, 1 @ auxillary control register 135 mrc p15, 0, r9, c1, c0, 1 @ auxiliary control register
136 mrc p15, 0, r10, c1, c0, 2 @ co-processor access control 136 mrc p15, 0, r10, c1, c0, 2 @ co-processor access control
137 mrc p15, 0, r11, c1, c0, 0 @ control register 137 mrc p15, 0, r11, c1, c0, 0 @ control register
138 stmia r0, {r4 - r11} 138 stmia r0, {r4 - r11}
@@ -151,7 +151,7 @@ ENTRY(cpu_v6_do_resume)
151 mcr p15, 0, r6, c3, c0, 0 @ Domain ID 151 mcr p15, 0, r6, c3, c0, 0 @ Domain ID
152 mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 152 mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0
153 mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 153 mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1
154 mcr p15, 0, r9, c1, c0, 1 @ auxillary control register 154 mcr p15, 0, r9, c1, c0, 1 @ auxiliary control register
155 mcr p15, 0, r10, c1, c0, 2 @ co-processor access control 155 mcr p15, 0, r10, c1, c0, 2 @ co-processor access control
156 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 156 mcr p15, 0, ip, c2, c0, 2 @ TTB control register
157 mcr p15, 0, ip, c7, c5, 4 @ ISB 157 mcr p15, 0, ip, c7, c5, 4 @ ISB
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 262fa88a7439..babfba09c89f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -211,7 +211,7 @@ cpu_v7_name:
211/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ 211/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
212.globl cpu_v7_suspend_size 212.globl cpu_v7_suspend_size
213.equ cpu_v7_suspend_size, 4 * 8 213.equ cpu_v7_suspend_size, 4 * 8
214#ifdef CONFIG_PM 214#ifdef CONFIG_PM_SLEEP
215ENTRY(cpu_v7_do_suspend) 215ENTRY(cpu_v7_do_suspend)
216 stmfd sp!, {r4 - r11, lr} 216 stmfd sp!, {r4 - r11, lr}
217 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 217 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
@@ -237,7 +237,7 @@ ENTRY(cpu_v7_do_resume)
237 mcr p15, 0, r7, c2, c0, 0 @ TTB 0 237 mcr p15, 0, r7, c2, c0, 0 @ TTB 0
238 mcr p15, 0, r8, c2, c0, 1 @ TTB 1 238 mcr p15, 0, r8, c2, c0, 1 @ TTB 1
239 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 239 mcr p15, 0, ip, c2, c0, 2 @ TTB control register
240 mcr p15, 0, r10, c1, c0, 1 @ Auxillary control register 240 mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register
241 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control 241 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control
242 ldr r4, =PRRR @ PRRR 242 ldr r4, =PRRR @ PRRR
243 ldr r5, =NMRR @ NMRR 243 ldr r5, =NMRR @ NMRR
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 63d8b2044e84..596213699f37 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -417,7 +417,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
417 417
418.globl cpu_xsc3_suspend_size 418.globl cpu_xsc3_suspend_size
419.equ cpu_xsc3_suspend_size, 4 * 8 419.equ cpu_xsc3_suspend_size, 4 * 8
420#ifdef CONFIG_PM 420#ifdef CONFIG_PM_SLEEP
421ENTRY(cpu_xsc3_do_suspend) 421ENTRY(cpu_xsc3_do_suspend)
422 stmfd sp!, {r4 - r10, lr} 422 stmfd sp!, {r4 - r10, lr}
423 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 423 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 086038cd86ab..ce233bcbf506 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -518,7 +518,7 @@ ENTRY(cpu_xscale_set_pte_ext)
518 518
519.globl cpu_xscale_suspend_size 519.globl cpu_xscale_suspend_size
520.equ cpu_xscale_suspend_size, 4 * 7 520.equ cpu_xscale_suspend_size, 4 * 7
521#ifdef CONFIG_PM 521#ifdef CONFIG_PM_SLEEP
522ENTRY(cpu_xscale_do_suspend) 522ENTRY(cpu_xscale_do_suspend)
523 stmfd sp!, {r4 - r10, lr} 523 stmfd sp!, {r4 - r10, lr}
524 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode 524 mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index c856fa397606..f0ba0726306c 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -100,14 +100,9 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
100 100
101 expio_irq = MXC_BOARD_IRQ_START; 101 expio_irq = MXC_BOARD_IRQ_START;
102 for (; int_valid != 0; int_valid >>= 1, expio_irq++) { 102 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
103 struct irq_desc *d;
104 if ((int_valid & 1) == 0) 103 if ((int_valid & 1) == 0)
105 continue; 104 continue;
106 d = irq_desc + expio_irq; 105 generic_handle_irq(expio_irq);
107 if (unlikely(!(d->handle_irq)))
108 pr_err("\nEXPIO irq: %d unhandled\n", expio_irq);
109 else
110 d->handle_irq(expio_irq, d);
111 } 106 }
112 107
113 desc->irq_data.chip->irq_ack(&desc->irq_data); 108 desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -186,12 +181,11 @@ int __init mxc_expio_init(u32 base, u32 p_irq)
186 __raw_writew(0x1F, brd_io + INTR_MASK_REG); 181 __raw_writew(0x1F, brd_io + INTR_MASK_REG);
187 for (i = MXC_EXP_IO_BASE; 182 for (i = MXC_EXP_IO_BASE;
188 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { 183 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) {
189 set_irq_chip(i, &expio_irq_chip); 184 irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
190 set_irq_handler(i, handle_level_irq);
191 set_irq_flags(i, IRQF_VALID); 185 set_irq_flags(i, IRQF_VALID);
192 } 186 }
193 set_irq_type(p_irq, IRQF_TRIGGER_LOW); 187 irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
194 set_irq_chained_handler(p_irq, mxc_expio_irq_handler); 188 irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
195 189
196 /* Register Lan device on the debugboard */ 190 /* Register Lan device on the debugboard */
197 smsc911x_resources[0].start = LAN9217_BASE_ADDR(base); 191 smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index deb284bc7c4b..09e2bd0fcdca 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -139,8 +139,8 @@ void __init mxc_init_irq(void __iomem *irqbase)
139 __raw_writel(0, avic_base + AVIC_INTTYPEH); 139 __raw_writel(0, avic_base + AVIC_INTTYPEH);
140 __raw_writel(0, avic_base + AVIC_INTTYPEL); 140 __raw_writel(0, avic_base + AVIC_INTTYPEL);
141 for (i = 0; i < MXC_INTERNAL_IRQS; i++) { 141 for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
142 set_irq_chip(i, &mxc_avic_chip.base); 142 irq_set_chip_and_handler(i, &mxc_avic_chip.base,
143 set_irq_handler(i, handle_level_irq); 143 handle_level_irq);
144 set_irq_flags(i, IRQF_VALID); 144 set_irq_flags(i, IRQF_VALID);
145 } 145 }
146 146
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index ce81481becf1..4268a2bdf145 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -13,7 +13,7 @@
13 13
14/* 14/*
15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module. 15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module.
16 * The CPUFREQ driver is for controling CPU frequency. It allows you to change 16 * The CPUFREQ driver is for controlling CPU frequency. It allows you to change
17 * the CPU clock speed on the fly. 17 * the CPU clock speed on the fly.
18 */ 18 */
19 19
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c
index 6561c9df5f0d..ccc789e21daa 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/plat-mxc/devices/platform-fec.c
@@ -53,7 +53,7 @@ struct platform_device *__init imx_add_fec(
53 struct resource res[] = { 53 struct resource res[] = {
54 { 54 {
55 .start = data->iobase, 55 .start = data->iobase,
56 .end = data->iobase + SZ_4K, 56 .end = data->iobase + SZ_4K - 1,
57 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
58 }, { 58 }, {
59 .start = data->irq, 59 .start = data->irq,
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
index 10653cc8d1fa..805336fdc252 100644
--- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
+++ b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
@@ -27,7 +27,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
27 struct resource res[] = { 27 struct resource res[] = {
28 { 28 {
29 .start = data->iobase, 29 .start = data->iobase,
30 .end = data->iobase + SZ_16K, 30 .end = data->iobase + SZ_16K - 1,
31 .flags = IORESOURCE_MEM, 31 .flags = IORESOURCE_MEM,
32 }, { 32 }, {
33 .start = data->irq, 33 .start = data->irq,
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 57d59855f9ec..7a107246fd98 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -175,7 +175,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
175static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) 175static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
176{ 176{
177 u32 irq_stat; 177 u32 irq_stat;
178 struct mxc_gpio_port *port = get_irq_data(irq); 178 struct mxc_gpio_port *port = irq_get_handler_data(irq);
179 179
180 irq_stat = __raw_readl(port->base + GPIO_ISR) & 180 irq_stat = __raw_readl(port->base + GPIO_ISR) &
181 __raw_readl(port->base + GPIO_IMR); 181 __raw_readl(port->base + GPIO_IMR);
@@ -188,7 +188,7 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
188{ 188{
189 int i; 189 int i;
190 u32 irq_msk, irq_stat; 190 u32 irq_msk, irq_stat;
191 struct mxc_gpio_port *port = get_irq_data(irq); 191 struct mxc_gpio_port *port = irq_get_handler_data(irq);
192 192
193 /* walk through all interrupt status registers */ 193 /* walk through all interrupt status registers */
194 for (i = 0; i < gpio_table_size; i++) { 194 for (i = 0; i < gpio_table_size; i++) {
@@ -311,8 +311,8 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
311 __raw_writel(~0, port[i].base + GPIO_ISR); 311 __raw_writel(~0, port[i].base + GPIO_ISR);
312 for (j = port[i].virtual_irq_start; 312 for (j = port[i].virtual_irq_start;
313 j < port[i].virtual_irq_start + 32; j++) { 313 j < port[i].virtual_irq_start + 32; j++) {
314 set_irq_chip(j, &gpio_irq_chip); 314 irq_set_chip_and_handler(j, &gpio_irq_chip,
315 set_irq_handler(j, handle_level_irq); 315 handle_level_irq);
316 set_irq_flags(j, IRQF_VALID); 316 set_irq_flags(j, IRQF_VALID);
317 } 317 }
318 318
@@ -331,21 +331,23 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
331 331
332 if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { 332 if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
333 /* setup one handler for each entry */ 333 /* setup one handler for each entry */
334 set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); 334 irq_set_chained_handler(port[i].irq,
335 set_irq_data(port[i].irq, &port[i]); 335 mx3_gpio_irq_handler);
336 irq_set_handler_data(port[i].irq, &port[i]);
336 if (port[i].irq_high) { 337 if (port[i].irq_high) {
337 /* setup handler for GPIO 16 to 31 */ 338 /* setup handler for GPIO 16 to 31 */
338 set_irq_chained_handler(port[i].irq_high, 339 irq_set_chained_handler(port[i].irq_high,
339 mx3_gpio_irq_handler); 340 mx3_gpio_irq_handler);
340 set_irq_data(port[i].irq_high, &port[i]); 341 irq_set_handler_data(port[i].irq_high,
342 &port[i]);
341 } 343 }
342 } 344 }
343 } 345 }
344 346
345 if (cpu_is_mx2()) { 347 if (cpu_is_mx2()) {
346 /* setup one handler for all GPIO interrupts */ 348 /* setup one handler for all GPIO interrupts */
347 set_irq_chained_handler(port[0].irq, mx2_gpio_irq_handler); 349 irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler);
348 set_irq_data(port[0].irq, port); 350 irq_set_handler_data(port[0].irq, port);
349 } 351 }
350 352
351 return 0; 353 return 0;
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h
index 5cd6466964af..6fda788ed0e9 100644
--- a/arch/arm/plat-mxc/include/mach/audmux.h
+++ b/arch/arm/plat-mxc/include/mach/audmux.h
@@ -15,6 +15,14 @@
15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4 15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5 16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5
17 17
18#define MX51_AUDMUX_PORT1_SSI0 0
19#define MX51_AUDMUX_PORT2_SSI1 1
20#define MX51_AUDMUX_PORT3 2
21#define MX51_AUDMUX_PORT4 3
22#define MX51_AUDMUX_PORT5 4
23#define MX51_AUDMUX_PORT6 5
24#define MX51_AUDMUX_PORT7 6
25
18/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ 26/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
19#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) 27#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
20#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) 28#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8)
@@ -28,7 +36,7 @@
28#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) 36#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
29#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) 37#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31)
30 38
31/* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ 39/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
32#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) 40#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
33#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) 41#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
34#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) 42#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index bd9bb9799141..2e49e71b1b98 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -33,9 +33,9 @@
33 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
34 .endm 34 .endm
35 35
36 @ this macro checks which interrupt occured 36 @ this macro checks which interrupt occurred
37 @ and returns its number in irqnr 37 @ and returns its number in irqnr
38 @ and returns if an interrupt occured in irqstat 38 @ and returns if an interrupt occurred in irqstat
39 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 39 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
40#ifndef CONFIG_MXC_TZIC 40#ifndef CONFIG_MXC_TZIC
41 @ Load offset & priority of the highest priority 41 @ Load offset & priority of the highest priority
diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h
index a48a9aaa56b1..86003f411755 100644
--- a/arch/arm/plat-mxc/include/mach/esdhc.h
+++ b/arch/arm/plat-mxc/include/mach/esdhc.h
@@ -10,7 +10,17 @@
10#ifndef __ASM_ARCH_IMX_ESDHC_H 10#ifndef __ASM_ARCH_IMX_ESDHC_H
11#define __ASM_ARCH_IMX_ESDHC_H 11#define __ASM_ARCH_IMX_ESDHC_H
12 12
13/**
14 * struct esdhc_platform_data - optional platform data for esdhc on i.MX
15 *
16 * strongly recommended for i.MX25/35, not needed for other variants
17 *
18 * @wp_gpio: gpio for write_protect (-EINVAL if unused)
19 * @cd_gpio: gpio for card_detect interrupt (-EINVAL if unused)
20 */
21
13struct esdhc_platform_data { 22struct esdhc_platform_data {
14 unsigned int wp_gpio; /* write protect pin */ 23 unsigned int wp_gpio;
24 unsigned int cd_gpio;
15}; 25};
16#endif /* __ASM_ARCH_IMX_ESDHC_H */ 26#endif /* __ASM_ARCH_IMX_ESDHC_H */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
index c4f116d214f2..7a9b20abda09 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
@@ -90,12 +90,12 @@
90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) 90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) 91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) 92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) 93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) 94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) 95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) 96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) 97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23)
98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) 98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) 99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) 100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) 101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h
index aaec2a6e7b3a..5f2da75a47f4 100644
--- a/arch/arm/plat-mxc/include/mach/mx50.h
+++ b/arch/arm/plat-mxc/include/mach/mx50.h
@@ -282,4 +282,8 @@
282#define MX50_INT_APBHDMA_CHAN6 116 282#define MX50_INT_APBHDMA_CHAN6 116
283#define MX50_INT_APBHDMA_CHAN7 117 283#define MX50_INT_APBHDMA_CHAN7 117
284 284
285#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
286extern int mx50_revision(void);
287#endif
288
285#endif /* ifndef __MACH_MX50_H__ */ 289#endif /* ifndef __MACH_MX50_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 1eb339e6c857..dede19a766ff 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -347,6 +347,7 @@
347 347
348#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) 348#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
349extern int mx51_revision(void); 349extern int mx51_revision(void);
350extern void mx51_display_revision(void);
350#endif 351#endif
351 352
352/* tape-out 1 defines */ 353/* tape-out 1 defines */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 7e072637eefa..1aea818d9d31 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -51,6 +51,20 @@
51#define IMX_CHIP_REVISION_3_3 0x33 51#define IMX_CHIP_REVISION_3_3 0x33
52#define IMX_CHIP_REVISION_UNKNOWN 0xff 52#define IMX_CHIP_REVISION_UNKNOWN 0xff
53 53
54#define IMX_CHIP_REVISION_1_0_STRING "1.0"
55#define IMX_CHIP_REVISION_1_1_STRING "1.1"
56#define IMX_CHIP_REVISION_1_2_STRING "1.2"
57#define IMX_CHIP_REVISION_1_3_STRING "1.3"
58#define IMX_CHIP_REVISION_2_0_STRING "2.0"
59#define IMX_CHIP_REVISION_2_1_STRING "2.1"
60#define IMX_CHIP_REVISION_2_2_STRING "2.2"
61#define IMX_CHIP_REVISION_2_3_STRING "2.3"
62#define IMX_CHIP_REVISION_3_0_STRING "3.0"
63#define IMX_CHIP_REVISION_3_1_STRING "3.1"
64#define IMX_CHIP_REVISION_3_2_STRING "3.2"
65#define IMX_CHIP_REVISION_3_3_STRING "3.3"
66#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
67
54#ifndef __ASSEMBLY__ 68#ifndef __ASSEMBLY__
55extern unsigned int __mxc_cpu_type; 69extern unsigned int __mxc_cpu_type;
56#endif 70#endif
@@ -181,6 +195,15 @@ struct cpu_op {
181 u32 cpu_rate; 195 u32 cpu_rate;
182}; 196};
183 197
198int tzic_enable_wake(int is_idle);
199enum mxc_cpu_pwr_mode {
200 WAIT_CLOCKED, /* wfi only */
201 WAIT_UNCLOCKED, /* WAIT */
202 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
203 STOP_POWER_ON, /* just STOP */
204 STOP_POWER_OFF, /* STOP + SRPG */
205};
206
184extern struct cpu_op *(*get_cpu_op)(int *op); 207extern struct cpu_op *(*get_cpu_op)(int *op);
185#endif 208#endif
186 209
diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h
index 04c0d060d814..6bb96ef1600b 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_nand.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h
@@ -24,7 +24,7 @@
24 24
25struct mxc_nand_platform_data { 25struct mxc_nand_platform_data {
26 unsigned int width; /* data bus width in bytes */ 26 unsigned int width; /* data bus width in bytes */
27 unsigned int hw_ecc:1; /* 0 if supress hardware ECC */ 27 unsigned int hw_ecc:1; /* 0 if suppress hardware ECC */
28 unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */ 28 unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */
29 struct mtd_partition *parts; /* partition table */ 29 struct mtd_partition *parts; /* partition table */
30 int nr_parts; /* size of parts */ 30 int nr_parts; /* size of parts */
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 95be51bfe9a9..0417da9f710d 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -20,6 +20,8 @@
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <mach/common.h> 21#include <mach/common.h>
22 22
23extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
24
23static inline void arch_idle(void) 25static inline void arch_idle(void)
24{ 26{
25#ifdef CONFIG_ARCH_MXC91231 27#ifdef CONFIG_ARCH_MXC91231
@@ -54,7 +56,9 @@ static inline void arch_idle(void)
54 "orr %0, %0, #0x00000004\n" 56 "orr %0, %0, #0x00000004\n"
55 "mcr p15, 0, %0, c1, c0, 0\n" 57 "mcr p15, 0, %0, c1, c0, 0\n"
56 : "=r" (reg)); 58 : "=r" (reg));
57 } else 59 } else if (cpu_is_mx51())
60 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
61 else
58 cpu_do_idle(); 62 cpu_do_idle();
59} 63}
60 64
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c
index 0c799ac27730..e1c6eff7258a 100644
--- a/arch/arm/plat-mxc/irq-common.c
+++ b/arch/arm/plat-mxc/irq-common.c
@@ -29,7 +29,7 @@ int imx_irq_set_priority(unsigned char irq, unsigned char prio)
29 29
30 ret = -ENOSYS; 30 ret = -ENOSYS;
31 31
32 base = get_irq_chip(irq); 32 base = irq_get_chip(irq);
33 if (base) { 33 if (base) {
34 chip = container_of(base, struct mxc_irq_chip, base); 34 chip = container_of(base, struct mxc_irq_chip, base);
35 if (chip->set_priority) 35 if (chip->set_priority)
@@ -48,7 +48,7 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
48 48
49 ret = -ENOSYS; 49 ret = -ENOSYS;
50 50
51 base = get_irq_chip(irq); 51 base = irq_get_chip(irq);
52 if (base) { 52 if (base) {
53 chip = container_of(base, struct mxc_irq_chip, base); 53 chip = container_of(base, struct mxc_irq_chip, base);
54 if (chip->set_irq_fiq) 54 if (chip->set_irq_fiq)
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 9f0c2610595e..2237ff8b434f 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -27,6 +27,7 @@
27#include <linux/clk.h> 27#include <linux/clk.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/sched_clock.h>
30#include <asm/mach/time.h> 31#include <asm/mach/time.h>
31#include <mach/common.h> 32#include <mach/common.h>
32 33
@@ -105,6 +106,11 @@ static void gpt_irq_acknowledge(void)
105 __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); 106 __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT);
106} 107}
107 108
109static cycle_t dummy_get_cycles(struct clocksource *cs)
110{
111 return 0;
112}
113
108static cycle_t mx1_2_get_cycles(struct clocksource *cs) 114static cycle_t mx1_2_get_cycles(struct clocksource *cs)
109{ 115{
110 return __raw_readl(timer_base + MX1_2_TCN); 116 return __raw_readl(timer_base + MX1_2_TCN);
@@ -118,18 +124,35 @@ static cycle_t v2_get_cycles(struct clocksource *cs)
118static struct clocksource clocksource_mxc = { 124static struct clocksource clocksource_mxc = {
119 .name = "mxc_timer1", 125 .name = "mxc_timer1",
120 .rating = 200, 126 .rating = 200,
121 .read = mx1_2_get_cycles, 127 .read = dummy_get_cycles,
122 .mask = CLOCKSOURCE_MASK(32), 128 .mask = CLOCKSOURCE_MASK(32),
123 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 129 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
124}; 130};
125 131
132static DEFINE_CLOCK_DATA(cd);
133unsigned long long notrace sched_clock(void)
134{
135 cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
136
137 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
138}
139
140static void notrace mxc_update_sched_clock(void)
141{
142 cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
143 update_sched_clock(&cd, cyc, (u32)~0);
144}
145
126static int __init mxc_clocksource_init(struct clk *timer_clk) 146static int __init mxc_clocksource_init(struct clk *timer_clk)
127{ 147{
128 unsigned int c = clk_get_rate(timer_clk); 148 unsigned int c = clk_get_rate(timer_clk);
129 149
130 if (timer_is_v2()) 150 if (timer_is_v2())
131 clocksource_mxc.read = v2_get_cycles; 151 clocksource_mxc.read = v2_get_cycles;
152 else
153 clocksource_mxc.read = mx1_2_get_cycles;
132 154
155 init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
133 clocksource_register_hz(&clocksource_mxc, c); 156 clocksource_register_hz(&clocksource_mxc, c);
134 157
135 return 0; 158 return 0;
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index bc3a6be8a27f..57f9395f87ce 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -167,8 +167,8 @@ void __init tzic_init_irq(void __iomem *irqbase)
167 /* all IRQ no FIQ Warning :: No selection */ 167 /* all IRQ no FIQ Warning :: No selection */
168 168
169 for (i = 0; i < MXC_INTERNAL_IRQS; i++) { 169 for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
170 set_irq_chip(i, &mxc_tzic_chip.base); 170 irq_set_chip_and_handler(i, &mxc_tzic_chip.base,
171 set_irq_handler(i, handle_level_irq); 171 handle_level_irq);
172 set_irq_flags(i, IRQF_VALID); 172 set_irq_flags(i, IRQF_VALID);
173 } 173 }
174 174
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 70620426ee55..f49748eca1a3 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -54,6 +54,7 @@ struct nmk_gpio_chip {
54 u32 rwimsc; 54 u32 rwimsc;
55 u32 fwimsc; 55 u32 fwimsc;
56 u32 slpm; 56 u32 slpm;
57 u32 enabled;
57}; 58};
58 59
59static struct nmk_gpio_chip * 60static struct nmk_gpio_chip *
@@ -318,7 +319,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
318 struct nmk_gpio_chip *nmk_chip; 319 struct nmk_gpio_chip *nmk_chip;
319 int pin = PIN_NUM(cfgs[i]); 320 int pin = PIN_NUM(cfgs[i]);
320 321
321 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(pin)); 322 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
322 if (!nmk_chip) { 323 if (!nmk_chip) {
323 ret = -EINVAL; 324 ret = -EINVAL;
324 break; 325 break;
@@ -397,7 +398,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
397 struct nmk_gpio_chip *nmk_chip; 398 struct nmk_gpio_chip *nmk_chip;
398 unsigned long flags; 399 unsigned long flags;
399 400
400 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 401 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
401 if (!nmk_chip) 402 if (!nmk_chip)
402 return -EINVAL; 403 return -EINVAL;
403 404
@@ -430,7 +431,7 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
430 struct nmk_gpio_chip *nmk_chip; 431 struct nmk_gpio_chip *nmk_chip;
431 unsigned long flags; 432 unsigned long flags;
432 433
433 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 434 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
434 if (!nmk_chip) 435 if (!nmk_chip)
435 return -EINVAL; 436 return -EINVAL;
436 437
@@ -456,7 +457,7 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode)
456 struct nmk_gpio_chip *nmk_chip; 457 struct nmk_gpio_chip *nmk_chip;
457 unsigned long flags; 458 unsigned long flags;
458 459
459 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 460 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
460 if (!nmk_chip) 461 if (!nmk_chip)
461 return -EINVAL; 462 return -EINVAL;
462 463
@@ -473,7 +474,7 @@ int nmk_gpio_get_mode(int gpio)
473 struct nmk_gpio_chip *nmk_chip; 474 struct nmk_gpio_chip *nmk_chip;
474 u32 afunc, bfunc, bit; 475 u32 afunc, bfunc, bit;
475 476
476 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 477 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
477 if (!nmk_chip) 478 if (!nmk_chip)
478 return -EINVAL; 479 return -EINVAL;
479 480
@@ -541,13 +542,6 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
541static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, 542static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
542 int gpio, bool on) 543 int gpio, bool on)
543{ 544{
544#ifdef CONFIG_ARCH_U8500
545 if (cpu_is_u8500v2()) {
546 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base,
547 on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
548 : NMK_GPIO_SLPM_WAKEUP_DISABLE);
549 }
550#endif
551 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on); 545 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
552} 546}
553 547
@@ -564,6 +558,11 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
564 if (!nmk_chip) 558 if (!nmk_chip)
565 return -EINVAL; 559 return -EINVAL;
566 560
561 if (enable)
562 nmk_chip->enabled |= bitmask;
563 else
564 nmk_chip->enabled &= ~bitmask;
565
567 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); 566 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
568 spin_lock(&nmk_chip->lock); 567 spin_lock(&nmk_chip->lock);
569 568
@@ -590,8 +589,6 @@ static void nmk_gpio_irq_unmask(struct irq_data *d)
590 589
591static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) 590static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
592{ 591{
593 struct irq_desc *desc = irq_to_desc(d->irq);
594 bool enabled = !(desc->status & IRQ_DISABLED);
595 struct nmk_gpio_chip *nmk_chip; 592 struct nmk_gpio_chip *nmk_chip;
596 unsigned long flags; 593 unsigned long flags;
597 u32 bitmask; 594 u32 bitmask;
@@ -606,7 +603,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
606 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); 603 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
607 spin_lock(&nmk_chip->lock); 604 spin_lock(&nmk_chip->lock);
608 605
609 if (!enabled) 606 if (!(nmk_chip->enabled & bitmask))
610 __nmk_gpio_set_wake(nmk_chip, gpio, on); 607 __nmk_gpio_set_wake(nmk_chip, gpio, on);
611 608
612 if (on) 609 if (on)
@@ -622,9 +619,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
622 619
623static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) 620static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
624{ 621{
625 struct irq_desc *desc = irq_to_desc(d->irq); 622 bool enabled, wake = irqd_is_wakeup_set(d);
626 bool enabled = !(desc->status & IRQ_DISABLED);
627 bool wake = desc->wake_depth;
628 int gpio; 623 int gpio;
629 struct nmk_gpio_chip *nmk_chip; 624 struct nmk_gpio_chip *nmk_chip;
630 unsigned long flags; 625 unsigned long flags;
@@ -641,6 +636,8 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
641 if (type & IRQ_TYPE_LEVEL_LOW) 636 if (type & IRQ_TYPE_LEVEL_LOW)
642 return -EINVAL; 637 return -EINVAL;
643 638
639 enabled = nmk_chip->enabled & bitmask;
640
644 spin_lock_irqsave(&nmk_chip->lock, flags); 641 spin_lock_irqsave(&nmk_chip->lock, flags);
645 642
646 if (enabled) 643 if (enabled)
@@ -681,7 +678,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
681 u32 status) 678 u32 status)
682{ 679{
683 struct nmk_gpio_chip *nmk_chip; 680 struct nmk_gpio_chip *nmk_chip;
684 struct irq_chip *host_chip = get_irq_chip(irq); 681 struct irq_chip *host_chip = irq_get_chip(irq);
685 unsigned int first_irq; 682 unsigned int first_irq;
686 683
687 if (host_chip->irq_mask_ack) 684 if (host_chip->irq_mask_ack)
@@ -692,7 +689,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
692 host_chip->irq_ack(&desc->irq_data); 689 host_chip->irq_ack(&desc->irq_data);
693 } 690 }
694 691
695 nmk_chip = get_irq_data(irq); 692 nmk_chip = irq_get_handler_data(irq);
696 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); 693 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
697 while (status) { 694 while (status) {
698 int bit = __ffs(status); 695 int bit = __ffs(status);
@@ -706,7 +703,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
706 703
707static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 704static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
708{ 705{
709 struct nmk_gpio_chip *nmk_chip = get_irq_data(irq); 706 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
710 u32 status = readl(nmk_chip->addr + NMK_GPIO_IS); 707 u32 status = readl(nmk_chip->addr + NMK_GPIO_IS);
711 708
712 __nmk_gpio_irq_handler(irq, desc, status); 709 __nmk_gpio_irq_handler(irq, desc, status);
@@ -715,7 +712,7 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
715static void nmk_gpio_secondary_irq_handler(unsigned int irq, 712static void nmk_gpio_secondary_irq_handler(unsigned int irq,
716 struct irq_desc *desc) 713 struct irq_desc *desc)
717{ 714{
718 struct nmk_gpio_chip *nmk_chip = get_irq_data(irq); 715 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
719 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank); 716 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
720 717
721 __nmk_gpio_irq_handler(irq, desc, status); 718 __nmk_gpio_irq_handler(irq, desc, status);
@@ -728,20 +725,20 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
728 725
729 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); 726 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
730 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) { 727 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
731 set_irq_chip(i, &nmk_gpio_irq_chip); 728 irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
732 set_irq_handler(i, handle_edge_irq); 729 handle_edge_irq);
733 set_irq_flags(i, IRQF_VALID); 730 set_irq_flags(i, IRQF_VALID);
734 set_irq_chip_data(i, nmk_chip); 731 irq_set_chip_data(i, nmk_chip);
735 set_irq_type(i, IRQ_TYPE_EDGE_FALLING); 732 irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
736 } 733 }
737 734
738 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); 735 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
739 set_irq_data(nmk_chip->parent_irq, nmk_chip); 736 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
740 737
741 if (nmk_chip->secondary_parent_irq >= 0) { 738 if (nmk_chip->secondary_parent_irq >= 0) {
742 set_irq_chained_handler(nmk_chip->secondary_parent_irq, 739 irq_set_chained_handler(nmk_chip->secondary_parent_irq,
743 nmk_gpio_secondary_irq_handler); 740 nmk_gpio_secondary_irq_handler);
744 set_irq_data(nmk_chip->secondary_parent_irq, nmk_chip); 741 irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
745 } 742 }
746 743
747 return 0; 744 return 0;
@@ -832,51 +829,6 @@ static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
832 : "? ", 829 : "? ",
833 (mode < 0) ? "unknown" : modes[mode], 830 (mode < 0) ? "unknown" : modes[mode],
834 pull ? "pull" : "none"); 831 pull ? "pull" : "none");
835
836 if (!is_out) {
837 int irq = gpio_to_irq(gpio);
838 struct irq_desc *desc = irq_to_desc(irq);
839
840 /* This races with request_irq(), set_irq_type(),
841 * and set_irq_wake() ... but those are "rare".
842 *
843 * More significantly, trigger type flags aren't
844 * currently maintained by genirq.
845 */
846 if (irq >= 0 && desc->action) {
847 char *trigger;
848
849 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
850 case IRQ_TYPE_NONE:
851 trigger = "(default)";
852 break;
853 case IRQ_TYPE_EDGE_FALLING:
854 trigger = "edge-falling";
855 break;
856 case IRQ_TYPE_EDGE_RISING:
857 trigger = "edge-rising";
858 break;
859 case IRQ_TYPE_EDGE_BOTH:
860 trigger = "edge-both";
861 break;
862 case IRQ_TYPE_LEVEL_HIGH:
863 trigger = "level-high";
864 break;
865 case IRQ_TYPE_LEVEL_LOW:
866 trigger = "level-low";
867 break;
868 default:
869 trigger = "?trigger?";
870 break;
871 }
872
873 seq_printf(s, " irq-%d %s%s",
874 irq, trigger,
875 (desc->status & IRQ_WAKEUP)
876 ? " wakeup" : "");
877 }
878 }
879
880 seq_printf(s, "\n"); 832 seq_printf(s, "\n");
881 } 833 }
882} 834}
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index 4d6dd4c39b75..c44886062f8e 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -104,6 +104,8 @@ struct stedma40_half_channel_info {
104 * 104 *
105 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH 105 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
106 * @high_priority: true if high-priority 106 * @high_priority: true if high-priority
107 * @realtime: true if realtime mode is to be enabled. Only available on DMA40
108 * version 3+, i.e DB8500v2+
107 * @mode: channel mode: physical, logical, or operation 109 * @mode: channel mode: physical, logical, or operation
108 * @mode_opt: options for the chosen channel mode 110 * @mode_opt: options for the chosen channel mode
109 * @src_dev_type: Src device type 111 * @src_dev_type: Src device type
@@ -119,6 +121,7 @@ struct stedma40_half_channel_info {
119struct stedma40_chan_cfg { 121struct stedma40_chan_cfg {
120 enum stedma40_xfer_dir dir; 122 enum stedma40_xfer_dir dir;
121 bool high_priority; 123 bool high_priority;
124 bool realtime;
122 enum stedma40_mode mode; 125 enum stedma40_mode mode;
123 enum stedma40_mode_opt mode_opt; 126 enum stedma40_mode_opt mode_opt;
124 int src_dev_type; 127 int src_dev_type;
@@ -169,25 +172,6 @@ struct stedma40_platform_data {
169bool stedma40_filter(struct dma_chan *chan, void *data); 172bool stedma40_filter(struct dma_chan *chan, void *data);
170 173
171/** 174/**
172 * stedma40_memcpy_sg() - extension of the dma framework, memcpy to/from
173 * scattergatter lists.
174 *
175 * @chan: dmaengine handle
176 * @sgl_dst: Destination scatter list
177 * @sgl_src: Source scatter list
178 * @sgl_len: The length of each scatterlist. Both lists must be of equal length
179 * and each element must match the corresponding element in the other scatter
180 * list.
181 * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
182 */
183
184struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
185 struct scatterlist *sgl_dst,
186 struct scatterlist *sgl_src,
187 unsigned int sgl_len,
188 unsigned long flags);
189
190/**
191 * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave 175 * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
192 * (=device) 176 * (=device)
193 * 177 *
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 7d9f815cedec..ea28f98d5d6a 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -280,7 +280,7 @@ EXPORT_SYMBOL(omap_dsp_get_mempool_base);
280 * Claiming GPIOs, and setting their direction and initial values, is the 280 * Claiming GPIOs, and setting their direction and initial values, is the
281 * responsibility of the device drivers. So is responding to probe(). 281 * responsibility of the device drivers. So is responding to probe().
282 * 282 *
283 * Board-specific knowlege like creating devices or pin setup is to be 283 * Board-specific knowledge like creating devices or pin setup is to be
284 * kept out of drivers as much as possible. In particular, pin setup 284 * kept out of drivers as much as possible. In particular, pin setup
285 * may be handled by the boot loader, and drivers should expect it will 285 * may be handled by the boot loader, and drivers should expect it will
286 * normally have been done by the time they're probed. 286 * normally have been done by the time they're probed.
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 2ec3b5d9f214..c22217c2ee5f 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1019,7 +1019,7 @@ EXPORT_SYMBOL(omap_set_dma_callback);
1019 * If the channel is running the caller must disable interrupts prior calling 1019 * If the channel is running the caller must disable interrupts prior calling
1020 * this function and process the returned value before re-enabling interrupt to 1020 * this function and process the returned value before re-enabling interrupt to
1021 * prevent races with the interrupt handler. Note that in continuous mode there 1021 * prevent races with the interrupt handler. Note that in continuous mode there
1022 * is a chance for CSSA_L register overflow inbetween the two reads resulting 1022 * is a chance for CSSA_L register overflow between the two reads resulting
1023 * in incorrect return value. 1023 * in incorrect return value.
1024 */ 1024 */
1025dma_addr_t omap_get_dma_src_pos(int lch) 1025dma_addr_t omap_get_dma_src_pos(int lch)
@@ -1046,7 +1046,7 @@ EXPORT_SYMBOL(omap_get_dma_src_pos);
1046 * If the channel is running the caller must disable interrupts prior calling 1046 * If the channel is running the caller must disable interrupts prior calling
1047 * this function and process the returned value before re-enabling interrupt to 1047 * this function and process the returned value before re-enabling interrupt to
1048 * prevent races with the interrupt handler. Note that in continuous mode there 1048 * prevent races with the interrupt handler. Note that in continuous mode there
1049 * is a chance for CDSA_L register overflow inbetween the two reads resulting 1049 * is a chance for CDSA_L register overflow between the two reads resulting
1050 * in incorrect return value. 1050 * in incorrect return value.
1051 */ 1051 */
1052dma_addr_t omap_get_dma_dst_pos(int lch) 1052dma_addr_t omap_get_dma_dst_pos(int lch)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 971d18636942..d2adcdda23cf 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -755,18 +755,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
755 bank = irq_data_get_irq_chip_data(d); 755 bank = irq_data_get_irq_chip_data(d);
756 spin_lock_irqsave(&bank->lock, flags); 756 spin_lock_irqsave(&bank->lock, flags);
757 retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); 757 retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
758 if (retval == 0) {
759 struct irq_desc *desc = irq_to_desc(d->irq);
760
761 desc->status &= ~IRQ_TYPE_SENSE_MASK;
762 desc->status |= type;
763 }
764 spin_unlock_irqrestore(&bank->lock, flags); 758 spin_unlock_irqrestore(&bank->lock, flags);
765 759
766 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 760 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
767 __set_irq_handler_unlocked(d->irq, handle_level_irq); 761 __irq_set_handler_locked(d->irq, handle_level_irq);
768 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 762 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
769 __set_irq_handler_unlocked(d->irq, handle_edge_irq); 763 __irq_set_handler_locked(d->irq, handle_edge_irq);
770 764
771 return retval; 765 return retval;
772} 766}
@@ -1146,7 +1140,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1146 1140
1147 desc->irq_data.chip->irq_ack(&desc->irq_data); 1141 desc->irq_data.chip->irq_ack(&desc->irq_data);
1148 1142
1149 bank = get_irq_data(irq); 1143 bank = irq_get_handler_data(irq);
1150#ifdef CONFIG_ARCH_OMAP1 1144#ifdef CONFIG_ARCH_OMAP1
1151 if (bank->method == METHOD_MPUIO) 1145 if (bank->method == METHOD_MPUIO)
1152 isr_reg = bank->base + 1146 isr_reg = bank->base +
@@ -1270,8 +1264,7 @@ static void gpio_unmask_irq(struct irq_data *d)
1270 unsigned int gpio = d->irq - IH_GPIO_BASE; 1264 unsigned int gpio = d->irq - IH_GPIO_BASE;
1271 struct gpio_bank *bank = irq_data_get_irq_chip_data(d); 1265 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
1272 unsigned int irq_mask = 1 << get_gpio_index(gpio); 1266 unsigned int irq_mask = 1 << get_gpio_index(gpio);
1273 struct irq_desc *desc = irq_to_desc(d->irq); 1267 u32 trigger = irqd_get_trigger_type(d);
1274 u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
1275 1268
1276 if (trigger) 1269 if (trigger)
1277 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); 1270 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
@@ -1672,19 +1665,17 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
1672 1665
1673 for (j = bank->virtual_irq_start; 1666 for (j = bank->virtual_irq_start;
1674 j < bank->virtual_irq_start + bank_width; j++) { 1667 j < bank->virtual_irq_start + bank_width; j++) {
1675 struct irq_desc *d = irq_to_desc(j); 1668 irq_set_lockdep_class(j, &gpio_lock_class);
1676 1669 irq_set_chip_data(j, bank);
1677 lockdep_set_class(&d->lock, &gpio_lock_class);
1678 set_irq_chip_data(j, bank);
1679 if (bank_is_mpuio(bank)) 1670 if (bank_is_mpuio(bank))
1680 set_irq_chip(j, &mpuio_irq_chip); 1671 irq_set_chip(j, &mpuio_irq_chip);
1681 else 1672 else
1682 set_irq_chip(j, &gpio_irq_chip); 1673 irq_set_chip(j, &gpio_irq_chip);
1683 set_irq_handler(j, handle_simple_irq); 1674 irq_set_handler(j, handle_simple_irq);
1684 set_irq_flags(j, IRQF_VALID); 1675 set_irq_flags(j, IRQF_VALID);
1685 } 1676 }
1686 set_irq_chained_handler(bank->irq, gpio_irq_handler); 1677 irq_set_chained_handler(bank->irq, gpio_irq_handler);
1687 set_irq_data(bank->irq, bank); 1678 irq_set_handler_data(bank->irq, bank);
1688} 1679}
1689 1680
1690static int __devinit omap_gpio_probe(struct platform_device *pdev) 1681static int __devinit omap_gpio_probe(struct platform_device *pdev)
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h
index 0f140ecedb01..5e04ddc18fa8 100644
--- a/arch/arm/plat-omap/include/plat/display.h
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -58,6 +58,7 @@ enum omap_display_type {
58 OMAP_DISPLAY_TYPE_SDI = 1 << 2, 58 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
59 OMAP_DISPLAY_TYPE_DSI = 1 << 3, 59 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
60 OMAP_DISPLAY_TYPE_VENC = 1 << 4, 60 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
61 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
61}; 62};
62 63
63enum omap_plane { 64enum omap_plane {
@@ -237,6 +238,13 @@ static inline int omap_display_init(struct omap_dss_board_info *board_data)
237} 238}
238#endif 239#endif
239 240
241struct omap_display_platform_data {
242 struct omap_dss_board_info *board_data;
243 /* TODO: Additional members to be added when PM is considered */
244
245 bool (*opt_clock_available)(const char *clk_role);
246};
247
240struct omap_video_timings { 248struct omap_video_timings {
241 /* Unit: pixels */ 249 /* Unit: pixels */
242 u16 x_res; 250 u16 x_res;
@@ -396,8 +404,8 @@ struct omap_dss_device {
396 struct { 404 struct {
397 u16 regn; 405 u16 regn;
398 u16 regm; 406 u16 regm;
399 u16 regm3; 407 u16 regm_dispc;
400 u16 regm4; 408 u16 regm_dsi;
401 409
402 u16 lp_clk_div; 410 u16 lp_clk_div;
403 411
@@ -555,6 +563,9 @@ int omap_dsi_update(struct omap_dss_device *dssdev,
555 int channel, 563 int channel,
556 u16 x, u16 y, u16 w, u16 h, 564 u16 x, u16 y, u16 w, u16 h,
557 void (*callback)(int, void *), void *data); 565 void (*callback)(int, void *), void *data);
566int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
567int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
568void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
558 569
559int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); 570int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
560void omapdss_dsi_display_disable(struct omap_dss_device *dssdev); 571void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index d6f9fa0f62af..cac2e8ac6968 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -93,7 +93,7 @@ extern void omap_gpio_restore_context(void);
93/* Wrappers for "new style" GPIO calls, using the new infrastructure 93/* Wrappers for "new style" GPIO calls, using the new infrastructure
94 * which lets us plug in FPGA, I2C, and other implementations. 94 * which lets us plug in FPGA, I2C, and other implementations.
95 * * 95 * *
96 * The original OMAP-specfic calls should eventually be removed. 96 * The original OMAP-specific calls should eventually be removed.
97 */ 97 */
98 98
99#include <linux/errno.h> 99#include <linux/errno.h>
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 12b316165037..1527929b445a 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -90,7 +90,7 @@ enum omap_ecc {
90 /* 1-bit ecc: stored at end of spare area */ 90 /* 1-bit ecc: stored at end of spare area */
91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */ 91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ 92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
93 /* 1-bit ecc: stored at begining of spare area as romcode */ 93 /* 1-bit ecc: stored at beginning of spare area as romcode */
94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ 94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
95}; 95};
96 96
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index d77928370463..5a25098ea7ea 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -416,7 +416,7 @@
416 416
417/* GPMC related */ 417/* GPMC related */
418#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END) 418#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END)
419#define OMAP_GPMC_NR_IRQS 7 419#define OMAP_GPMC_NR_IRQS 8
420#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) 420#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
421 421
422 422
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index 98fc8b4a4cc4..b9e85886b9d6 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -56,8 +56,12 @@
56#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) 56#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
57#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) 57#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
58#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) 58#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
59#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800) 59#define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800)
60#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970) 60#define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970)
61#define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0)
62#define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00)
63#define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70)
64#define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0)
61 65
62#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) 66#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
63#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) 67#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
@@ -69,8 +73,12 @@
69#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) 73#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
70#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) 74#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
71#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) 75#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
72#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) 76#define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F)
73#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) 77#define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B)
78#define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F)
79#define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F)
80#define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B)
81#define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F)
74 82
75#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) 83#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
76#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) 84#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000)
diff --git a/arch/arm/plat-omap/include/plat/onenand.h b/arch/arm/plat-omap/include/plat/onenand.h
index cbe897ca7f9e..2858667d2e4f 100644
--- a/arch/arm/plat-omap/include/plat/onenand.h
+++ b/arch/arm/plat-omap/include/plat/onenand.h
@@ -32,6 +32,7 @@ struct omap_onenand_platform_data {
32 int dma_channel; 32 int dma_channel;
33 u8 flags; 33 u8 flags;
34 u8 regulator_can_sleep; 34 u8 regulator_can_sleep;
35 u8 skip_initial_unlocking;
35}; 36};
36 37
37#define ONENAND_MAX_PARTITIONS 8 38#define ONENAND_MAX_PARTITIONS 8
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index d598d9fd65ac..5587acf0eb2c 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -1103,7 +1103,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
1103 /* resend */ 1103 /* resend */
1104 return -1; 1104 return -1;
1105 } else { 1105 } else {
1106 /* wait for recieve confirmation */ 1106 /* wait for receive confirmation */
1107 int attemps = 0; 1107 int attemps = 0;
1108 while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { 1108 while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
1109 if (attemps++ > 1000) { 1109 if (attemps++ > 1000) {
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 078894bc3b9a..a431a138f402 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -324,9 +324,8 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
324static void gpio_irq_ack(struct irq_data *d) 324static void gpio_irq_ack(struct irq_data *d)
325{ 325{
326 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); 326 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
327 int type; 327 int type = irqd_get_trigger_type(d);
328 328
329 type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
330 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { 329 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
331 int pin = d->irq - ochip->secondary_irq_base; 330 int pin = d->irq - ochip->secondary_irq_base;
332 331
@@ -337,11 +336,10 @@ static void gpio_irq_ack(struct irq_data *d)
337static void gpio_irq_mask(struct irq_data *d) 336static void gpio_irq_mask(struct irq_data *d)
338{ 337{
339 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); 338 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
340 int type; 339 int type = irqd_get_trigger_type(d);
341 void __iomem *reg; 340 void __iomem *reg;
342 int pin; 341 int pin;
343 342
344 type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
345 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 343 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
346 reg = GPIO_EDGE_MASK(ochip); 344 reg = GPIO_EDGE_MASK(ochip);
347 else 345 else
@@ -355,11 +353,10 @@ static void gpio_irq_mask(struct irq_data *d)
355static void gpio_irq_unmask(struct irq_data *d) 353static void gpio_irq_unmask(struct irq_data *d)
356{ 354{
357 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); 355 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
358 int type; 356 int type = irqd_get_trigger_type(d);
359 void __iomem *reg; 357 void __iomem *reg;
360 int pin; 358 int pin;
361 359
362 type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
363 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 360 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
364 reg = GPIO_EDGE_MASK(ochip); 361 reg = GPIO_EDGE_MASK(ochip);
365 else 362 else
@@ -389,9 +386,9 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
389 * Set edge/level type. 386 * Set edge/level type.
390 */ 387 */
391 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { 388 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
392 set_irq_handler(d->irq, handle_edge_irq); 389 __irq_set_handler_locked(d->irq, handle_edge_irq);
393 } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 390 } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
394 set_irq_handler(d->irq, handle_level_irq); 391 __irq_set_handler_locked(d->irq, handle_level_irq);
395 } else { 392 } else {
396 printk(KERN_ERR "failed to set irq=%d (type=%d)\n", 393 printk(KERN_ERR "failed to set irq=%d (type=%d)\n",
397 d->irq, type); 394 d->irq, type);
@@ -477,10 +474,10 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
477 for (i = 0; i < ngpio; i++) { 474 for (i = 0; i < ngpio; i++) {
478 unsigned int irq = secondary_irq_base + i; 475 unsigned int irq = secondary_irq_base + i;
479 476
480 set_irq_chip(irq, &orion_gpio_irq_chip); 477 irq_set_chip_and_handler(irq, &orion_gpio_irq_chip,
481 set_irq_handler(irq, handle_level_irq); 478 handle_level_irq);
482 set_irq_chip_data(irq, ochip); 479 irq_set_chip_data(irq, ochip);
483 irq_desc[irq].status |= IRQ_LEVEL; 480 irq_set_status_flags(irq, IRQ_LEVEL);
484 set_irq_flags(irq, IRQF_VALID); 481 set_irq_flags(irq, IRQF_VALID);
485 } 482 }
486} 483}
@@ -488,7 +485,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
488void orion_gpio_irq_handler(int pinoff) 485void orion_gpio_irq_handler(int pinoff)
489{ 486{
490 struct orion_gpio_chip *ochip; 487 struct orion_gpio_chip *ochip;
491 u32 cause; 488 u32 cause, type;
492 int i; 489 int i;
493 490
494 ochip = orion_gpio_chip_find(pinoff); 491 ochip = orion_gpio_chip_find(pinoff);
@@ -500,15 +497,14 @@ void orion_gpio_irq_handler(int pinoff)
500 497
501 for (i = 0; i < ochip->chip.ngpio; i++) { 498 for (i = 0; i < ochip->chip.ngpio; i++) {
502 int irq; 499 int irq;
503 struct irq_desc *desc;
504 500
505 irq = ochip->secondary_irq_base + i; 501 irq = ochip->secondary_irq_base + i;
506 502
507 if (!(cause & (1 << i))) 503 if (!(cause & (1 << i)))
508 continue; 504 continue;
509 505
510 desc = irq_desc + irq; 506 type = irqd_get_trigger_type(irq_get_irq_data(irq));
511 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { 507 if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
512 /* Swap polarity (race with GPIO line) */ 508 /* Swap polarity (race with GPIO line) */
513 u32 polarity; 509 u32 polarity;
514 510
@@ -516,7 +512,6 @@ void orion_gpio_irq_handler(int pinoff)
516 polarity ^= 1 << i; 512 polarity ^= 1 << i;
517 writel(polarity, GPIO_IN_POL(ochip)); 513 writel(polarity, GPIO_IN_POL(ochip));
518 } 514 }
519 515 generic_handle_irq(irq);
520 desc_handle_irq(irq, desc);
521 } 516 }
522} 517}
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 7d0c7eb59f09..d8d638e09f8f 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -56,10 +56,10 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
56 for (i = 0; i < 32; i++) { 56 for (i = 0; i < 32; i++) {
57 unsigned int irq = irq_start + i; 57 unsigned int irq = irq_start + i;
58 58
59 set_irq_chip(irq, &orion_irq_chip); 59 irq_set_chip_and_handler(irq, &orion_irq_chip,
60 set_irq_chip_data(irq, maskaddr); 60 handle_level_irq);
61 set_irq_handler(irq, handle_level_irq); 61 irq_set_chip_data(irq, maskaddr);
62 irq_desc[irq].status |= IRQ_LEVEL; 62 irq_set_status_flags(irq, IRQ_LEVEL);
63 set_irq_flags(irq, IRQF_VALID); 63 set_irq_flags(irq, IRQF_VALID);
64 } 64 }
65} 65}
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index e7de6ae2a1e8..dce088f45678 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -284,13 +284,13 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
284 } 284 }
285 285
286 for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { 286 for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
287 set_irq_chip(irq, &pxa_muxed_gpio_chip); 287 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
288 set_irq_handler(irq, handle_edge_irq); 288 handle_edge_irq);
289 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 289 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
290 } 290 }
291 291
292 /* Install handler for GPIO>=2 edge detect interrupts */ 292 /* Install handler for GPIO>=2 edge detect interrupts */
293 set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler); 293 irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler);
294 pxa_muxed_gpio_chip.irq_set_wake = fn; 294 pxa_muxed_gpio_chip.irq_set_wake = fn;
295} 295}
296 296
diff --git a/arch/arm/plat-pxa/include/plat/i2c.h b/arch/arm/plat-pxa/include/plat/i2c.h
deleted file mode 100644
index 1a9f65e6ec0f..000000000000
--- a/arch/arm/plat-pxa/include/plat/i2c.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * i2c_pxa.h
3 *
4 * Copyright (C) 2002 Intrinsyc Software Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#ifndef _I2C_PXA_H_
12#define _I2C_PXA_H_
13
14#if 0
15#define DEF_TIMEOUT 3
16#else
17/* need a longer timeout if we're dealing with the fact we may well be
18 * looking at a multi-master environment
19*/
20#define DEF_TIMEOUT 32
21#endif
22
23#define BUS_ERROR (-EREMOTEIO)
24#define XFER_NAKED (-ECONNREFUSED)
25#define I2C_RETRY (-2000) /* an error has occurred retry transmit */
26
27/* ICR initialize bit values
28*
29* 15. FM 0 (100 Khz operation)
30* 14. UR 0 (No unit reset)
31* 13. SADIE 0 (Disables the unit from interrupting on slave addresses
32* matching its slave address)
33* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
34* in master mode)
35* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
36* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
37* 9. IRFIE 1 (Enable interrupts from full buffer received)
38* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
39* 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
40* 6. IUE 0 (Disable unit until we change settings)
41* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
42* 4. MA 0 (Only send stop with the ICR stop bit)
43* 3. TB 0 (We are not transmitting a byte initially)
44* 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
45* 1. STOP 0 (Do not send a STOP)
46* 0. START 0 (Do not send a START)
47*
48*/
49#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
50
51/* I2C status register init values
52 *
53 * 10. BED 1 (Clear bus error detected)
54 * 9. SAD 1 (Clear slave address detected)
55 * 7. IRF 1 (Clear IDBR Receive Full)
56 * 6. ITE 1 (Clear IDBR Transmit Empty)
57 * 5. ALD 1 (Clear Arbitration Loss Detected)
58 * 4. SSD 1 (Clear Slave Stop Detected)
59 */
60#define I2C_ISR_INIT 0x7FF /* status register init */
61
62struct i2c_slave_client;
63
64struct i2c_pxa_platform_data {
65 unsigned int slave_addr;
66 struct i2c_slave_client *slave;
67 unsigned int class;
68 unsigned int use_pio :1;
69 unsigned int fast_mode :1;
70};
71
72extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
73
74#ifdef CONFIG_PXA27x
75extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
76#endif
77
78#ifdef CONFIG_PXA3xx
79extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
80#endif
81
82#endif
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 75f656471240..89e68e07b0a8 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -434,7 +434,7 @@ typedef unsigned long mfp_cfg_t;
434 * 434 *
435 * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which 435 * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which
436 * represents a range of MFP pins from "start" to "end", with the offset 436 * represents a range of MFP pins from "start" to "end", with the offset
437 * begining at "offset", to define a single pin, let "end" = -1. 437 * beginning at "offset", to define a single pin, let "end" = -1.
438 * 438 *
439 * use 439 * use
440 * 440 *
diff --git a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
index 01a8448e471c..442301fe48b4 100644
--- a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
+++ b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
@@ -30,6 +30,7 @@ struct pxa3xx_nand_cmdset {
30}; 30};
31 31
32struct pxa3xx_nand_flash { 32struct pxa3xx_nand_flash {
33 char *name;
33 uint32_t chip_id; 34 uint32_t chip_id;
34 unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */ 35 unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */
35 unsigned int page_size; /* Page size in bytes (PAGE_SZ) */ 36 unsigned int page_size; /* Page size in bytes (PAGE_SZ) */
@@ -37,7 +38,6 @@ struct pxa3xx_nand_flash {
37 unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */ 38 unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
38 unsigned int num_blocks; /* Number of physical blocks in Flash */ 39 unsigned int num_blocks; /* Number of physical blocks in Flash */
39 40
40 struct pxa3xx_nand_cmdset *cmdset; /* NAND command set */
41 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ 41 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
42}; 42};
43 43
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index c2064c308719..0291bd6e236e 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o
23obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o 23obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o
24obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o 24obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
25 25
26# Architecture dependant builds 26# Architecture dependent builds
27 27
28obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 28obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
29obj-$(CONFIG_PM) += pm.o 29obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/plat-s3c24xx/cpu-freq.c b/arch/arm/plat-s3c24xx/cpu-freq.c
index eea75ff81d15..b3d3d0278997 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq.c
@@ -455,7 +455,7 @@ static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
455 455
456 /* whilst we will be called later on, we try and re-set the 456 /* whilst we will be called later on, we try and re-set the
457 * cpu frequencies as soon as possible so that we do not end 457 * cpu frequencies as soon as possible so that we do not end
458 * up resuming devices and then immediatley having to re-set 458 * up resuming devices and then immediately having to re-set
459 * a number of settings once these devices have restarted. 459 * a number of settings once these devices have restarted.
460 * 460 *
461 * as a note, it is expected devices are not used until they 461 * as a note, it is expected devices are not used until they
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 6ad274e7593d..27ea852e3370 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -557,7 +557,7 @@ s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
557 break; 557 break;
558 558
559 case S3C2410_DMALOAD_1LOADED_1RUNNING: 559 case S3C2410_DMALOAD_1LOADED_1RUNNING:
560 /* I belive in this case we do not have anything to do 560 /* I believe in this case we do not have anything to do
561 * until the next buffer comes along, and we turn off the 561 * until the next buffer comes along, and we turn off the
562 * reload */ 562 * reload */
563 return; 563 return;
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 4434cb56bd9a..9aee7e1668b1 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -592,8 +592,8 @@ void __init s3c24xx_init_irq(void)
592 case IRQ_UART1: 592 case IRQ_UART1:
593 case IRQ_UART2: 593 case IRQ_UART2:
594 case IRQ_ADCPARENT: 594 case IRQ_ADCPARENT:
595 set_irq_chip(irqno, &s3c_irq_level_chip); 595 irq_set_chip_and_handler(irqno, &s3c_irq_level_chip,
596 set_irq_handler(irqno, handle_level_irq); 596 handle_level_irq);
597 break; 597 break;
598 598
599 case IRQ_RESERVED6: 599 case IRQ_RESERVED6:
@@ -603,35 +603,35 @@ void __init s3c24xx_init_irq(void)
603 603
604 default: 604 default:
605 //irqdbf("registering irq %d (s3c irq)\n", irqno); 605 //irqdbf("registering irq %d (s3c irq)\n", irqno);
606 set_irq_chip(irqno, &s3c_irq_chip); 606 irq_set_chip_and_handler(irqno, &s3c_irq_chip,
607 set_irq_handler(irqno, handle_edge_irq); 607 handle_edge_irq);
608 set_irq_flags(irqno, IRQF_VALID); 608 set_irq_flags(irqno, IRQF_VALID);
609 } 609 }
610 } 610 }
611 611
612 /* setup the cascade irq handlers */ 612 /* setup the cascade irq handlers */
613 613
614 set_irq_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint4t7); 614 irq_set_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint4t7);
615 set_irq_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint8); 615 irq_set_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint8);
616 616
617 set_irq_chained_handler(IRQ_UART0, s3c_irq_demux_uart0); 617 irq_set_chained_handler(IRQ_UART0, s3c_irq_demux_uart0);
618 set_irq_chained_handler(IRQ_UART1, s3c_irq_demux_uart1); 618 irq_set_chained_handler(IRQ_UART1, s3c_irq_demux_uart1);
619 set_irq_chained_handler(IRQ_UART2, s3c_irq_demux_uart2); 619 irq_set_chained_handler(IRQ_UART2, s3c_irq_demux_uart2);
620 set_irq_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc); 620 irq_set_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc);
621 621
622 /* external interrupts */ 622 /* external interrupts */
623 623
624 for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { 624 for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
625 irqdbf("registering irq %d (ext int)\n", irqno); 625 irqdbf("registering irq %d (ext int)\n", irqno);
626 set_irq_chip(irqno, &s3c_irq_eint0t4); 626 irq_set_chip_and_handler(irqno, &s3c_irq_eint0t4,
627 set_irq_handler(irqno, handle_edge_irq); 627 handle_edge_irq);
628 set_irq_flags(irqno, IRQF_VALID); 628 set_irq_flags(irqno, IRQF_VALID);
629 } 629 }
630 630
631 for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) { 631 for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) {
632 irqdbf("registering irq %d (extended s3c irq)\n", irqno); 632 irqdbf("registering irq %d (extended s3c irq)\n", irqno);
633 set_irq_chip(irqno, &s3c_irqext_chip); 633 irq_set_chip_and_handler(irqno, &s3c_irqext_chip,
634 set_irq_handler(irqno, handle_edge_irq); 634 handle_edge_irq);
635 set_irq_flags(irqno, IRQF_VALID); 635 set_irq_flags(irqno, IRQF_VALID);
636 } 636 }
637 637
@@ -641,29 +641,28 @@ void __init s3c24xx_init_irq(void)
641 641
642 for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) { 642 for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) {
643 irqdbf("registering irq %d (s3c uart0 irq)\n", irqno); 643 irqdbf("registering irq %d (s3c uart0 irq)\n", irqno);
644 set_irq_chip(irqno, &s3c_irq_uart0); 644 irq_set_chip_and_handler(irqno, &s3c_irq_uart0,
645 set_irq_handler(irqno, handle_level_irq); 645 handle_level_irq);
646 set_irq_flags(irqno, IRQF_VALID); 646 set_irq_flags(irqno, IRQF_VALID);
647 } 647 }
648 648
649 for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) { 649 for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) {
650 irqdbf("registering irq %d (s3c uart1 irq)\n", irqno); 650 irqdbf("registering irq %d (s3c uart1 irq)\n", irqno);
651 set_irq_chip(irqno, &s3c_irq_uart1); 651 irq_set_chip_and_handler(irqno, &s3c_irq_uart1,
652 set_irq_handler(irqno, handle_level_irq); 652 handle_level_irq);
653 set_irq_flags(irqno, IRQF_VALID); 653 set_irq_flags(irqno, IRQF_VALID);
654 } 654 }
655 655
656 for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) { 656 for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) {
657 irqdbf("registering irq %d (s3c uart2 irq)\n", irqno); 657 irqdbf("registering irq %d (s3c uart2 irq)\n", irqno);
658 set_irq_chip(irqno, &s3c_irq_uart2); 658 irq_set_chip_and_handler(irqno, &s3c_irq_uart2,
659 set_irq_handler(irqno, handle_level_irq); 659 handle_level_irq);
660 set_irq_flags(irqno, IRQF_VALID); 660 set_irq_flags(irqno, IRQF_VALID);
661 } 661 }
662 662
663 for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) { 663 for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) {
664 irqdbf("registering irq %d (s3c adc irq)\n", irqno); 664 irqdbf("registering irq %d (s3c adc irq)\n", irqno);
665 set_irq_chip(irqno, &s3c_irq_adc); 665 irq_set_chip_and_handler(irqno, &s3c_irq_adc, handle_edge_irq);
666 set_irq_handler(irqno, handle_edge_irq);
667 set_irq_flags(irqno, IRQF_VALID); 666 set_irq_flags(irqno, IRQF_VALID);
668 } 667 }
669 668
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index c3bfe9b13acf..5cf5e721e6ca 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -39,7 +39,7 @@ static const char name_exynos4210[] = "EXYNOS4210";
39static struct cpu_table cpu_ids[] __initdata = { 39static struct cpu_table cpu_ids[] __initdata = {
40 { 40 {
41 .idcode = 0x56440100, 41 .idcode = 0x56440100,
42 .idmask = 0xffffff00, 42 .idmask = 0xfffff000,
43 .map_io = s5p6440_map_io, 43 .map_io = s5p6440_map_io,
44 .init_clocks = s5p6440_init_clocks, 44 .init_clocks = s5p6440_init_clocks,
45 .init_uarts = s5p6440_init_uarts, 45 .init_uarts = s5p6440_init_uarts,
@@ -47,7 +47,7 @@ static struct cpu_table cpu_ids[] __initdata = {
47 .name = name_s5p6440, 47 .name = name_s5p6440,
48 }, { 48 }, {
49 .idcode = 0x36442000, 49 .idcode = 0x36442000,
50 .idmask = 0xffffff00, 50 .idmask = 0xfffff000,
51 .map_io = s5p6442_map_io, 51 .map_io = s5p6442_map_io,
52 .init_clocks = s5p6442_init_clocks, 52 .init_clocks = s5p6442_init_clocks,
53 .init_uarts = s5p6442_init_uarts, 53 .init_uarts = s5p6442_init_uarts,
@@ -55,7 +55,7 @@ static struct cpu_table cpu_ids[] __initdata = {
55 .name = name_s5p6442, 55 .name = name_s5p6442,
56 }, { 56 }, {
57 .idcode = 0x36450000, 57 .idcode = 0x36450000,
58 .idmask = 0xffffff00, 58 .idmask = 0xfffff000,
59 .map_io = s5p6450_map_io, 59 .map_io = s5p6450_map_io,
60 .init_clocks = s5p6450_init_clocks, 60 .init_clocks = s5p6450_init_clocks,
61 .init_uarts = s5p6450_init_uarts, 61 .init_uarts = s5p6450_init_uarts,
@@ -79,7 +79,7 @@ static struct cpu_table cpu_ids[] __initdata = {
79 .name = name_s5pv210, 79 .name = name_s5pv210,
80 }, { 80 }, {
81 .idcode = 0x43210000, 81 .idcode = 0x43210000,
82 .idmask = 0xfffff000, 82 .idmask = 0xfffe0000,
83 .map_io = exynos4_map_io, 83 .map_io = exynos4_map_io,
84 .init_clocks = exynos4_init_clocks, 84 .init_clocks = exynos4_init_clocks,
85 .init_uarts = exynos4_init_uarts, 85 .init_uarts = exynos4_init_uarts,
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index 225aa25405db..b5bb774985b0 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -205,15 +205,14 @@ int __init s5p_init_irq_eint(void)
205 int irq; 205 int irq;
206 206
207 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) 207 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
208 set_irq_chip(irq, &s5p_irq_vic_eint); 208 irq_set_chip(irq, &s5p_irq_vic_eint);
209 209
210 for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { 210 for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
211 set_irq_chip(irq, &s5p_irq_eint); 211 irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq);
212 set_irq_handler(irq, handle_level_irq);
213 set_irq_flags(irq, IRQF_VALID); 212 set_irq_flags(irq, IRQF_VALID);
214 } 213 }
215 214
216 set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); 215 irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
217 return 0; 216 return 0;
218} 217}
219 218
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index cd87d3256e03..cd6d67c8382a 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -43,13 +43,13 @@ LIST_HEAD(banks);
43 43
44static int s5p_gpioint_get_offset(struct irq_data *data) 44static int s5p_gpioint_get_offset(struct irq_data *data)
45{ 45{
46 struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); 46 struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
47 return data->irq - chip->irq_base; 47 return data->irq - chip->irq_base;
48} 48}
49 49
50static void s5p_gpioint_ack(struct irq_data *data) 50static void s5p_gpioint_ack(struct irq_data *data)
51{ 51{
52 struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); 52 struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
53 int group, offset, pend_offset; 53 int group, offset, pend_offset;
54 unsigned int value; 54 unsigned int value;
55 55
@@ -64,7 +64,7 @@ static void s5p_gpioint_ack(struct irq_data *data)
64 64
65static void s5p_gpioint_mask(struct irq_data *data) 65static void s5p_gpioint_mask(struct irq_data *data)
66{ 66{
67 struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); 67 struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
68 int group, offset, mask_offset; 68 int group, offset, mask_offset;
69 unsigned int value; 69 unsigned int value;
70 70
@@ -79,7 +79,7 @@ static void s5p_gpioint_mask(struct irq_data *data)
79 79
80static void s5p_gpioint_unmask(struct irq_data *data) 80static void s5p_gpioint_unmask(struct irq_data *data)
81{ 81{
82 struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); 82 struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
83 int group, offset, mask_offset; 83 int group, offset, mask_offset;
84 unsigned int value; 84 unsigned int value;
85 85
@@ -100,7 +100,7 @@ static void s5p_gpioint_mask_ack(struct irq_data *data)
100 100
101static int s5p_gpioint_set_type(struct irq_data *data, unsigned int type) 101static int s5p_gpioint_set_type(struct irq_data *data, unsigned int type)
102{ 102{
103 struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); 103 struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
104 int group, offset, con_offset; 104 int group, offset, con_offset;
105 unsigned int value; 105 unsigned int value;
106 106
@@ -149,7 +149,7 @@ static struct irq_chip s5p_gpioint = {
149 149
150static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) 150static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
151{ 151{
152 struct s5p_gpioint_bank *bank = get_irq_data(irq); 152 struct s5p_gpioint_bank *bank = irq_get_handler_data(irq);
153 int group, pend_offset, mask_offset; 153 int group, pend_offset, mask_offset;
154 unsigned int pend, mask; 154 unsigned int pend, mask;
155 155
@@ -200,15 +200,15 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
200 if (!bank->chips) 200 if (!bank->chips)
201 return -ENOMEM; 201 return -ENOMEM;
202 202
203 set_irq_chained_handler(bank->irq, s5p_gpioint_handler); 203 irq_set_chained_handler(bank->irq, s5p_gpioint_handler);
204 set_irq_data(bank->irq, bank); 204 irq_set_handler_data(bank->irq, bank);
205 bank->handler = s5p_gpioint_handler; 205 bank->handler = s5p_gpioint_handler;
206 printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n", 206 printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n",
207 bank->irq); 207 bank->irq);
208 } 208 }
209 209
210 /* 210 /*
211 * chained GPIO irq has been sucessfully registered, allocate new gpio 211 * chained GPIO irq has been successfully registered, allocate new gpio
212 * int group and assign irq nubmers 212 * int group and assign irq nubmers
213 */ 213 */
214 214
@@ -219,9 +219,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
219 bank->chips[group - bank->start] = chip; 219 bank->chips[group - bank->start] = chip;
220 for (i = 0; i < chip->chip.ngpio; i++) { 220 for (i = 0; i < chip->chip.ngpio; i++) {
221 irq = chip->irq_base + i; 221 irq = chip->irq_base + i;
222 set_irq_chip(irq, &s5p_gpioint); 222 irq_set_chip(irq, &s5p_gpioint);
223 set_irq_data(irq, chip); 223 irq_set_handler_data(irq, chip);
224 set_irq_handler(irq, handle_level_irq); 224 irq_set_handler(irq, handle_level_irq);
225 set_irq_flags(irq, IRQF_VALID); 225 set_irq_flags(irq, IRQF_VALID);
226 } 226 }
227 return 0; 227 return 0;
diff --git a/arch/arm/plat-s5p/pm.c b/arch/arm/plat-s5p/pm.c
index d592b6304b48..d15dc47b0e3d 100644
--- a/arch/arm/plat-s5p/pm.c
+++ b/arch/arm/plat-s5p/pm.c
@@ -19,17 +19,6 @@
19 19
20#define PFX "s5p pm: " 20#define PFX "s5p pm: "
21 21
22/* s3c_pm_check_resume_pin
23 *
24 * check to see if the pin is configured correctly for sleep mode, and
25 * make any necessary adjustments if it is not
26*/
27
28static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
29{
30 /* nothing here yet */
31}
32
33/* s3c_pm_configure_extint 22/* s3c_pm_configure_extint
34 * 23 *
35 * configure all external interrupt pins 24 * configure all external interrupt pins
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 9a82b8874918..983c578b8276 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -21,7 +21,7 @@ struct clk;
21 * @set_parent: set the clock's parent, see clk_set_parent(). 21 * @set_parent: set the clock's parent, see clk_set_parent().
22 * 22 *
23 * Group the common clock implementations together so that we 23 * Group the common clock implementations together so that we
24 * don't have to keep setting the same fiels again. We leave 24 * don't have to keep setting the same fields again. We leave
25 * enable in struct clk. 25 * enable in struct clk.
26 * 26 *
27 * Adding an extra layer of indirection into the process should 27 * Adding an extra layer of indirection into the process should
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 5603db0b79bc..3ad8386599c3 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -114,7 +114,7 @@ extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
114 * of control per GPIO, generally in the form of: 114 * of control per GPIO, generally in the form of:
115 * 0000 = Input 115 * 0000 = Input
116 * 0001 = Output 116 * 0001 = Output
117 * others = Special functions (dependant on bank) 117 * others = Special functions (dependent on bank)
118 * 118 *
119 * Note, since the code to deal with the case where there are two control 119 * Note, since the code to deal with the case where there are two control
120 * registers instead of one, we do not have a separate set of functions for 120 * registers instead of one, we do not have a separate set of functions for
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 5e04fa6eda74..1762dcb4cb9e 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -125,7 +125,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
125 * 125 *
126 * These values control the state of the weak pull-{up,down} resistors 126 * These values control the state of the weak pull-{up,down} resistors
127 * available on most pins on the S3C series. Not all chips support both 127 * available on most pins on the S3C series. Not all chips support both
128 * up or down settings, and it may be dependant on the chip that is being 128 * up or down settings, and it may be dependent on the chip that is being
129 * used to whether the particular mode is available. 129 * used to whether the particular mode is available.
130 */ 130 */
131#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) 131#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00)
@@ -138,7 +138,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
138 * @pull: The configuration for the pull resistor. 138 * @pull: The configuration for the pull resistor.
139 * 139 *
140 * This function sets the state of the pull-{up,down} resistor for the 140 * This function sets the state of the pull-{up,down} resistor for the
141 * specified pin. It will return 0 if successfull, or a negative error 141 * specified pin. It will return 0 if successful, or a negative error
142 * code if the pin cannot support the requested pull setting. 142 * code if the pin cannot support the requested pull setting.
143 * 143 *
144 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. 144 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
@@ -202,7 +202,7 @@ extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
202 * @drvstr: The new value of the driver strength 202 * @drvstr: The new value of the driver strength
203 * 203 *
204 * This function sets the driver strength value for the specified pin. 204 * This function sets the driver strength value for the specified pin.
205 * It will return 0 if successfull, or a negative error code if the pin 205 * It will return 0 if successful, or a negative error code if the pin
206 * cannot support the requested setting. 206 * cannot support the requested setting.
207*/ 207*/
208extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); 208extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index dac35d0a711d..8cad4cf19c3c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -108,7 +108,7 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
108 * of control per GPIO, generally in the form of: 108 * of control per GPIO, generally in the form of:
109 * 0000 = Input 109 * 0000 = Input
110 * 0001 = Output 110 * 0001 = Output
111 * others = Special functions (dependant on bank) 111 * others = Special functions (dependent on bank)
112 * 112 *
113 * Note, since the code to deal with the case where there are two control 113 * Note, since the code to deal with the case where there are two control
114 * registers instead of one, we do not have a separate set of function 114 * registers instead of one, we do not have a separate set of function
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index b0bdf16549d5..058e09654fe8 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -57,7 +57,7 @@ enum clk_types {
57 * @cfg_gpio: Configure the GPIO for a specific card bit-width 57 * @cfg_gpio: Configure the GPIO for a specific card bit-width
58 * @cfg_card: Configure the interface for a specific card and speed. This 58 * @cfg_card: Configure the interface for a specific card and speed. This
59 * is necessary the controllers and/or GPIO blocks require the 59 * is necessary the controllers and/or GPIO blocks require the
60 * changing of driver-strength and other controls dependant on 60 * changing of driver-strength and other controls dependent on
61 * the card and speed of operation. 61 * the card and speed of operation.
62 * 62 *
63 * Initialisation data specific to either the machine or the platform 63 * Initialisation data specific to either the machine or the platform
@@ -108,7 +108,7 @@ extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
108extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; 108extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
109extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; 109extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata;
110 110
111/* Helper function availablity */ 111/* Helper function availability */
112 112
113extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 113extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
114extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 114extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index 6790edfaca6f..79d10fca9090 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -36,7 +36,7 @@ static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
36 unsigned int count) 36 unsigned int count)
37{ 37{
38 for (; count != 0; count--, tab++) { 38 for (; count != 0; count--, tab++) {
39 if ((idcode & tab->idmask) == tab->idcode) 39 if ((idcode & tab->idmask) == (tab->idcode & tab->idmask))
40 return tab; 40 return tab;
41 } 41 }
42 42
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 4e770355ccbc..4d4e571af553 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -107,7 +107,6 @@ static struct irq_chip s3c_irq_uart = {
107 107
108static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) 108static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
109{ 109{
110 struct irq_desc *desc = irq_to_desc(uirq->parent_irq);
111 void __iomem *reg_base = uirq->regs; 110 void __iomem *reg_base = uirq->regs;
112 unsigned int irq; 111 unsigned int irq;
113 int offs; 112 int offs;
@@ -118,14 +117,13 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
118 for (offs = 0; offs < 3; offs++) { 117 for (offs = 0; offs < 3; offs++) {
119 irq = uirq->base_irq + offs; 118 irq = uirq->base_irq + offs;
120 119
121 set_irq_chip(irq, &s3c_irq_uart); 120 irq_set_chip_and_handler(irq, &s3c_irq_uart, handle_level_irq);
122 set_irq_chip_data(irq, uirq); 121 irq_set_chip_data(irq, uirq);
123 set_irq_handler(irq, handle_level_irq);
124 set_irq_flags(irq, IRQF_VALID); 122 set_irq_flags(irq, IRQF_VALID);
125 } 123 }
126 124
127 desc->irq_data.handler_data = uirq; 125 irq_set_handler_data(uirq->parent_irq, uirq);
128 set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart); 126 irq_set_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
129} 127}
130 128
131/** 129/**
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index dd8692ae5c4c..d6ad66ab9290 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -77,14 +77,11 @@ static struct irq_chip s3c_irq_timer = {
77void __init s3c_init_vic_timer_irq(unsigned int parent_irq, 77void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
78 unsigned int timer_irq) 78 unsigned int timer_irq)
79{ 79{
80 struct irq_desc *desc = irq_to_desc(parent_irq);
81 80
82 set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer); 81 irq_set_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
82 irq_set_handler_data(parent_irq, (void *)timer_irq);
83 83
84 set_irq_chip(timer_irq, &s3c_irq_timer); 84 irq_set_chip_and_handler(timer_irq, &s3c_irq_timer, handle_level_irq);
85 set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0))); 85 irq_set_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0)));
86 set_irq_handler(timer_irq, handle_level_irq);
87 set_irq_flags(timer_irq, IRQF_VALID); 86 set_irq_flags(timer_irq, IRQF_VALID);
88
89 desc->irq_data.handler_data = (void *)timer_irq;
90} 87}
diff --git a/arch/arm/plat-samsung/pm-check.c b/arch/arm/plat-samsung/pm-check.c
index e4baf76f374a..6b733fafe7cd 100644
--- a/arch/arm/plat-samsung/pm-check.c
+++ b/arch/arm/plat-samsung/pm-check.c
@@ -164,7 +164,6 @@ static inline int in_region(void *ptr, int size, void *what, size_t whatsz)
164 */ 164 */
165static u32 *s3c_pm_runcheck(struct resource *res, u32 *val) 165static u32 *s3c_pm_runcheck(struct resource *res, u32 *val)
166{ 166{
167 void *save_at = phys_to_virt(s3c_sleep_save_phys);
168 unsigned long addr; 167 unsigned long addr;
169 unsigned long left; 168 unsigned long left;
170 void *stkpage; 169 void *stkpage;
@@ -192,11 +191,6 @@ static u32 *s3c_pm_runcheck(struct resource *res, u32 *val)
192 goto skip_check; 191 goto skip_check;
193 } 192 }
194 193
195 if (in_region(ptr, left, save_at, 32*4 )) {
196 S3C_PMDBG("skipping %08lx, has save block in\n", addr);
197 goto skip_check;
198 }
199
200 /* calculate and check the checksum */ 194 /* calculate and check the checksum */
201 195
202 calc = crc32_le(~0, ptr, left); 196 calc = crc32_le(~0, ptr, left);
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index d5b58d31903c..5c0a440d6e16 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -214,8 +214,9 @@ void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
214 * 214 *
215 * print any IRQs asserted at resume time (ie, we woke from) 215 * print any IRQs asserted at resume time (ie, we woke from)
216*/ 216*/
217static void s3c_pm_show_resume_irqs(int start, unsigned long which, 217static void __maybe_unused s3c_pm_show_resume_irqs(int start,
218 unsigned long mask) 218 unsigned long which,
219 unsigned long mask)
219{ 220{
220 int i; 221 int i;
221 222
diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c
index b4ff8d74ac40..f85638c6f5ae 100644
--- a/arch/arm/plat-samsung/s3c-pl330.c
+++ b/arch/arm/plat-samsung/s3c-pl330.c
@@ -68,7 +68,7 @@ struct s3c_pl330_xfer {
68 * @req: Two requests to communicate with the PL330 engine. 68 * @req: Two requests to communicate with the PL330 engine.
69 * @callback_fn: Callback function to the client. 69 * @callback_fn: Callback function to the client.
70 * @rqcfg: Channel configuration for the xfers. 70 * @rqcfg: Channel configuration for the xfers.
71 * @xfer_head: Pointer to the xfer to be next excecuted. 71 * @xfer_head: Pointer to the xfer to be next executed.
72 * @dmac: Pointer to the DMAC that manages this channel, NULL if the 72 * @dmac: Pointer to the DMAC that manages this channel, NULL if the
73 * channel is available to be acquired. 73 * channel is available to be acquired.
74 * @client: Client of this channel. NULL if the 74 * @client: Client of this channel. NULL if the
diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c
index 2e09b6ad84ca..dc814037297b 100644
--- a/arch/arm/plat-samsung/wakeup-mask.c
+++ b/arch/arm/plat-samsung/wakeup-mask.c
@@ -22,7 +22,7 @@
22void samsung_sync_wakemask(void __iomem *reg, 22void samsung_sync_wakemask(void __iomem *reg,
23 struct samsung_wakeup_mask *mask, int nr_mask) 23 struct samsung_wakeup_mask *mask, int nr_mask)
24{ 24{
25 struct irq_desc *desc; 25 struct irq_data *data;
26 u32 val; 26 u32 val;
27 27
28 val = __raw_readl(reg); 28 val = __raw_readl(reg);
@@ -33,10 +33,10 @@ void samsung_sync_wakemask(void __iomem *reg,
33 continue; 33 continue;
34 } 34 }
35 35
36 desc = irq_to_desc(mask->irq); 36 data = irq_get_irq_data(mask->irq);
37 37
38 /* bit of a liberty to read this directly from irq_desc. */ 38 /* bit of a liberty to read this directly from irq_data. */
39 if (desc->wake_depth > 0) 39 if (irqd_is_wakeup_set(data))
40 val &= ~mask->bit; 40 val &= ~mask->bit;
41 else 41 else
42 val |= mask->bit; 42 val |= mask->bit;
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
index 2ae6606930a6..fcc0d0ad4a1f 100644
--- a/arch/arm/plat-spear/include/plat/clock.h
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -89,7 +89,7 @@ struct rate_config {
89 * @sibling: node for list of clocks having same parents 89 * @sibling: node for list of clocks having same parents
90 * @private_data: clock specific private data 90 * @private_data: clock specific private data
91 * @node: list to maintain clocks linearly 91 * @node: list to maintain clocks linearly
92 * @cl: clocklook up assoicated with this clock 92 * @cl: clocklook up associated with this clock
93 * @dent: object for debugfs 93 * @dent: object for debugfs
94 */ 94 */
95struct clk { 95struct clk {
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 78189035e7f1..961fb7261243 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -68,7 +68,7 @@ static struct irq_chip shirq_chip = {
68static void shirq_handler(unsigned irq, struct irq_desc *desc) 68static void shirq_handler(unsigned irq, struct irq_desc *desc)
69{ 69{
70 u32 i, val, mask; 70 u32 i, val, mask;
71 struct spear_shirq *shirq = get_irq_data(irq); 71 struct spear_shirq *shirq = irq_get_handler_data(irq);
72 72
73 desc->irq_data.chip->irq_ack(&desc->irq_data); 73 desc->irq_data.chip->irq_ack(&desc->irq_data);
74 while ((val = readl(shirq->regs.base + shirq->regs.status_reg) & 74 while ((val = readl(shirq->regs.base + shirq->regs.status_reg) &
@@ -105,14 +105,14 @@ int spear_shirq_register(struct spear_shirq *shirq)
105 if (!shirq->dev_count) 105 if (!shirq->dev_count)
106 return -EINVAL; 106 return -EINVAL;
107 107
108 set_irq_chained_handler(shirq->irq, shirq_handler); 108 irq_set_chained_handler(shirq->irq, shirq_handler);
109 for (i = 0; i < shirq->dev_count; i++) { 109 for (i = 0; i < shirq->dev_count; i++) {
110 set_irq_chip(shirq->dev_config[i].virq, &shirq_chip); 110 irq_set_chip_and_handler(shirq->dev_config[i].virq,
111 set_irq_handler(shirq->dev_config[i].virq, handle_simple_irq); 111 &shirq_chip, handle_simple_irq);
112 set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID); 112 set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID);
113 set_irq_chip_data(shirq->dev_config[i].virq, shirq); 113 irq_set_chip_data(shirq->dev_config[i].virq, shirq);
114 } 114 }
115 115
116 set_irq_data(shirq->irq, shirq); 116 irq_set_handler_data(shirq->irq, shirq);
117 return 0; 117 return 0;
118} 118}
diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c
index aaa168683d4e..6fdf9acf82ed 100644
--- a/arch/arm/plat-stmp3xxx/irq.c
+++ b/arch/arm/plat-stmp3xxx/irq.c
@@ -35,8 +35,7 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip)
35 /* Disable all interrupts initially */ 35 /* Disable all interrupts initially */
36 for (i = 0; i < NR_REAL_IRQS; i++) { 36 for (i = 0; i < NR_REAL_IRQS; i++) {
37 chip->irq_mask(irq_get_irq_data(i)); 37 chip->irq_mask(irq_get_irq_data(i));
38 set_irq_chip(i, chip); 38 irq_set_chip_and_handler(i, chip, handle_level_irq);
39 set_irq_handler(i, handle_level_irq);
40 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 39 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
41 } 40 }
42 41
diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c
index 66d5bac3ace2..3def03b3217d 100644
--- a/arch/arm/plat-stmp3xxx/pinmux.c
+++ b/arch/arm/plat-stmp3xxx/pinmux.c
@@ -489,14 +489,13 @@ static void stmp3xxx_gpio_free(struct gpio_chip *chip, unsigned offset)
489 489
490static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc) 490static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc)
491{ 491{
492 struct stmp3xxx_pinmux_bank *pm = get_irq_data(irq); 492 struct stmp3xxx_pinmux_bank *pm = irq_get_handler_data(irq);
493 int gpio_irq = pm->virq; 493 int gpio_irq = pm->virq;
494 u32 stat = __raw_readl(pm->irqstat); 494 u32 stat = __raw_readl(pm->irqstat);
495 495
496 while (stat) { 496 while (stat) {
497 if (stat & 1) 497 if (stat & 1)
498 irq_desc[gpio_irq].handle_irq(gpio_irq, 498 generic_handle_irq(gpio_irq);
499 &irq_desc[gpio_irq]);
500 gpio_irq++; 499 gpio_irq++;
501 stat >>= 1; 500 stat >>= 1;
502 } 501 }
@@ -534,15 +533,15 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start)
534 533
535 for (virq = pm->virq; virq < pm->virq; virq++) { 534 for (virq = pm->virq; virq < pm->virq; virq++) {
536 gpio_irq_chip.irq_mask(irq_get_irq_data(virq)); 535 gpio_irq_chip.irq_mask(irq_get_irq_data(virq));
537 set_irq_chip(virq, &gpio_irq_chip); 536 irq_set_chip_and_handler(virq, &gpio_irq_chip,
538 set_irq_handler(virq, handle_level_irq); 537 handle_level_irq);
539 set_irq_flags(virq, IRQF_VALID); 538 set_irq_flags(virq, IRQF_VALID);
540 } 539 }
541 r = gpiochip_add(&pm->chip); 540 r = gpiochip_add(&pm->chip);
542 if (r < 0) 541 if (r < 0)
543 break; 542 break;
544 set_irq_chained_handler(pm->irq, stmp3xxx_gpio_irq); 543 irq_set_chained_handler(pm->irq, stmp3xxx_gpio_irq);
545 set_irq_data(pm->irq, pm); 544 irq_set_handler_data(pm->irq, pm);
546 } 545 }
547 return r; 546 return r;
548} 547}
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
new file mode 100644
index 000000000000..52353beb369d
--- /dev/null
+++ b/arch/arm/plat-versatile/Kconfig
@@ -0,0 +1,17 @@
1if PLAT_VERSATILE
2
3config PLAT_VERSATILE_CLCD
4 bool
5
6config PLAT_VERSATILE_FPGA_IRQ
7 bool
8
9config PLAT_VERSATILE_LEDS
10 def_bool y if LEDS_CLASS
11 depends on ARCH_REALVIEW || ARCH_VERSATILE
12
13config PLAT_VERSATILE_SCHED_CLOCK
14 def_bool y if !ARCH_INTEGRATOR_AP
15 select HAVE_SCHED_CLOCK
16
17endif
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile
index 16dde0819934..69714db47c33 100644
--- a/arch/arm/plat-versatile/Makefile
+++ b/arch/arm/plat-versatile/Makefile
@@ -1,8 +1,7 @@
1obj-y := clock.o 1obj-y := clock.o
2ifneq ($(CONFIG_ARCH_INTEGRATOR),y) 2obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
3obj-y += sched-clock.o 3obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o
4endif 4obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o
5ifeq ($(CONFIG_LEDS_CLASS),y) 5obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o
6obj-$(CONFIG_ARCH_REALVIEW) += leds.o 6obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o
7obj-$(CONFIG_ARCH_VERSATILE) += leds.o 7obj-$(CONFIG_SMP) += headsmp.o platsmp.o
8endif
diff --git a/arch/arm/plat-versatile/clcd.c b/arch/arm/plat-versatile/clcd.c
new file mode 100644
index 000000000000..6628cc27efc5
--- /dev/null
+++ b/arch/arm/plat-versatile/clcd.c
@@ -0,0 +1,182 @@
1#include <linux/device.h>
2#include <linux/dma-mapping.h>
3#include <linux/amba/bus.h>
4#include <linux/amba/clcd.h>
5#include <plat/clcd.h>
6
7static struct clcd_panel vga = {
8 .mode = {
9 .name = "VGA",
10 .refresh = 60,
11 .xres = 640,
12 .yres = 480,
13 .pixclock = 39721,
14 .left_margin = 40,
15 .right_margin = 24,
16 .upper_margin = 32,
17 .lower_margin = 11,
18 .hsync_len = 96,
19 .vsync_len = 2,
20 .sync = 0,
21 .vmode = FB_VMODE_NONINTERLACED,
22 },
23 .width = -1,
24 .height = -1,
25 .tim2 = TIM2_BCD | TIM2_IPC,
26 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
27 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
28 .bpp = 16,
29};
30
31static struct clcd_panel xvga = {
32 .mode = {
33 .name = "XVGA",
34 .refresh = 60,
35 .xres = 1024,
36 .yres = 768,
37 .pixclock = 15748,
38 .left_margin = 152,
39 .right_margin = 48,
40 .upper_margin = 23,
41 .lower_margin = 3,
42 .hsync_len = 104,
43 .vsync_len = 4,
44 .sync = 0,
45 .vmode = FB_VMODE_NONINTERLACED,
46 },
47 .width = -1,
48 .height = -1,
49 .tim2 = TIM2_BCD | TIM2_IPC,
50 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
51 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
52 .bpp = 16,
53};
54
55/* Sanyo TM38QV67A02A - 3.8 inch QVGA (320x240) Color TFT */
56static struct clcd_panel sanyo_tm38qv67a02a = {
57 .mode = {
58 .name = "Sanyo TM38QV67A02A",
59 .refresh = 116,
60 .xres = 320,
61 .yres = 240,
62 .pixclock = 100000,
63 .left_margin = 6,
64 .right_margin = 6,
65 .upper_margin = 5,
66 .lower_margin = 5,
67 .hsync_len = 6,
68 .vsync_len = 6,
69 .sync = 0,
70 .vmode = FB_VMODE_NONINTERLACED,
71 },
72 .width = -1,
73 .height = -1,
74 .tim2 = TIM2_BCD,
75 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
76 .caps = CLCD_CAP_5551,
77 .bpp = 16,
78};
79
80static struct clcd_panel sanyo_2_5_in = {
81 .mode = {
82 .name = "Sanyo QVGA Portrait",
83 .refresh = 116,
84 .xres = 240,
85 .yres = 320,
86 .pixclock = 100000,
87 .left_margin = 20,
88 .right_margin = 10,
89 .upper_margin = 2,
90 .lower_margin = 2,
91 .hsync_len = 10,
92 .vsync_len = 2,
93 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
94 .vmode = FB_VMODE_NONINTERLACED,
95 },
96 .width = -1,
97 .height = -1,
98 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
99 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
100 .caps = CLCD_CAP_5551,
101 .bpp = 16,
102};
103
104/* Epson L2F50113T00 - 2.2 inch 176x220 Color TFT */
105static struct clcd_panel epson_l2f50113t00 = {
106 .mode = {
107 .name = "Epson L2F50113T00",
108 .refresh = 390,
109 .xres = 176,
110 .yres = 220,
111 .pixclock = 62500,
112 .left_margin = 3,
113 .right_margin = 2,
114 .upper_margin = 1,
115 .lower_margin = 0,
116 .hsync_len = 3,
117 .vsync_len = 2,
118 .sync = 0,
119 .vmode = FB_VMODE_NONINTERLACED,
120 },
121 .width = -1,
122 .height = -1,
123 .tim2 = TIM2_BCD | TIM2_IPC,
124 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
125 .caps = CLCD_CAP_5551,
126 .bpp = 16,
127};
128
129static struct clcd_panel *panels[] = {
130 &vga,
131 &xvga,
132 &sanyo_tm38qv67a02a,
133 &sanyo_2_5_in,
134 &epson_l2f50113t00,
135};
136
137struct clcd_panel *versatile_clcd_get_panel(const char *name)
138{
139 int i;
140
141 for (i = 0; i < ARRAY_SIZE(panels); i++)
142 if (strcmp(panels[i]->mode.name, name) == 0)
143 break;
144
145 if (i < ARRAY_SIZE(panels))
146 return panels[i];
147
148 pr_err("CLCD: couldn't get parameters for panel %s\n", name);
149
150 return NULL;
151}
152
153int versatile_clcd_setup_dma(struct clcd_fb *fb, unsigned long framesize)
154{
155 dma_addr_t dma;
156
157 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
158 &dma, GFP_KERNEL);
159 if (!fb->fb.screen_base) {
160 pr_err("CLCD: unable to map framebuffer\n");
161 return -ENOMEM;
162 }
163
164 fb->fb.fix.smem_start = dma;
165 fb->fb.fix.smem_len = framesize;
166
167 return 0;
168}
169
170int versatile_clcd_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma)
171{
172 return dma_mmap_writecombine(&fb->dev->dev, vma,
173 fb->fb.screen_base,
174 fb->fb.fix.smem_start,
175 fb->fb.fix.smem_len);
176}
177
178void versatile_clcd_remove_dma(struct clcd_fb *fb)
179{
180 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
181 fb->fb.screen_base, fb->fb.fix.smem_start);
182}
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
new file mode 100644
index 000000000000..f0cc8e19b094
--- /dev/null
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -0,0 +1,72 @@
1/*
2 * Support for Versatile FPGA-based IRQ controllers
3 */
4#include <linux/irq.h>
5#include <linux/io.h>
6
7#include <asm/mach/irq.h>
8#include <plat/fpga-irq.h>
9
10#define IRQ_STATUS 0x00
11#define IRQ_RAW_STATUS 0x04
12#define IRQ_ENABLE_SET 0x08
13#define IRQ_ENABLE_CLEAR 0x0c
14
15static void fpga_irq_mask(struct irq_data *d)
16{
17 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
18 u32 mask = 1 << (d->irq - f->irq_start);
19
20 writel(mask, f->base + IRQ_ENABLE_CLEAR);
21}
22
23static void fpga_irq_unmask(struct irq_data *d)
24{
25 struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
26 u32 mask = 1 << (d->irq - f->irq_start);
27
28 writel(mask, f->base + IRQ_ENABLE_SET);
29}
30
31static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc)
32{
33 struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
34 u32 status = readl(f->base + IRQ_STATUS);
35
36 if (status == 0) {
37 do_bad_IRQ(irq, desc);
38 return;
39 }
40
41 do {
42 irq = ffs(status) - 1;
43 status &= ~(1 << irq);
44
45 generic_handle_irq(irq + f->irq_start);
46 } while (status);
47}
48
49void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f)
50{
51 unsigned int i;
52
53 f->chip.irq_ack = fpga_irq_mask;
54 f->chip.irq_mask = fpga_irq_mask;
55 f->chip.irq_unmask = fpga_irq_unmask;
56
57 if (parent_irq != -1) {
58 irq_set_handler_data(parent_irq, f);
59 irq_set_chained_handler(parent_irq, fpga_irq_handle);
60 }
61
62 for (i = 0; i < 32; i++) {
63 if (valid & (1 << i)) {
64 unsigned int irq = f->irq_start + i;
65
66 irq_set_chip_data(irq, f);
67 irq_set_chip_and_handler(irq, &f->chip,
68 handle_level_irq);
69 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
70 }
71 }
72}
diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/plat-versatile/headsmp.S
index 7a3f0632947c..d397a1fb2f54 100644
--- a/arch/arm/mach-vexpress/headsmp.S
+++ b/arch/arm/plat-versatile/headsmp.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-vexpress/headsmp.S 2 * linux/arch/arm/plat-versatile/headsmp.S
3 * 3 *
4 * Copyright (c) 2003 ARM Limited 4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved 5 * All Rights Reserved
@@ -14,11 +14,11 @@
14 __INIT 14 __INIT
15 15
16/* 16/*
17 * Versatile Express specific entry point for secondary CPUs. This 17 * Realview/Versatile Express specific entry point for secondary CPUs.
18 * provides a "holding pen" into which all secondary cores are held 18 * This provides a "holding pen" into which all secondary cores are held
19 * until we're ready for them to initialise. 19 * until we're ready for them to initialise.
20 */ 20 */
21ENTRY(vexpress_secondary_startup) 21ENTRY(versatile_secondary_startup)
22 mrc p15, 0, r0, c0, c0, 5 22 mrc p15, 0, r0, c0, c0, 5
23 and r0, r0, #15 23 and r0, r0, #15
24 adr r4, 1f 24 adr r4, 1f
diff --git a/arch/arm/plat-versatile/include/plat/clcd.h b/arch/arm/plat-versatile/include/plat/clcd.h
new file mode 100644
index 000000000000..6bb6a1d2019b
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/clcd.h
@@ -0,0 +1,9 @@
1#ifndef PLAT_CLCD_H
2#define PLAT_CLCD_H
3
4struct clcd_panel *versatile_clcd_get_panel(const char *);
5int versatile_clcd_setup_dma(struct clcd_fb *, unsigned long);
6int versatile_clcd_mmap_dma(struct clcd_fb *, struct vm_area_struct *);
7void versatile_clcd_remove_dma(struct clcd_fb *);
8
9#endif
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h
new file mode 100644
index 000000000000..627fafd1e595
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h
@@ -0,0 +1,12 @@
1#ifndef PLAT_FPGA_IRQ_H
2#define PLAT_FPGA_IRQ_H
3
4struct fpga_irq_data {
5 void __iomem *base;
6 unsigned int irq_start;
7 struct irq_chip chip;
8};
9
10void fpga_irq_init(int, u32, struct fpga_irq_data *);
11
12#endif
diff --git a/arch/arm/mach-vexpress/localtimer.c b/arch/arm/plat-versatile/localtimer.c
index c0e3a59a0bfc..0fb3961999b5 100644
--- a/arch/arm/mach-vexpress/localtimer.c
+++ b/arch/arm/plat-versatile/localtimer.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-vexpress/localtimer.c 2 * linux/arch/arm/plat-versatile/localtimer.c
3 * 3 *
4 * Copyright (C) 2002 ARM Ltd. 4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved 5 * All Rights Reserved
@@ -19,8 +19,9 @@
19/* 19/*
20 * Setup the local clock events for a CPU. 20 * Setup the local clock events for a CPU.
21 */ 21 */
22void __cpuinit local_timer_setup(struct clock_event_device *evt) 22int __cpuinit local_timer_setup(struct clock_event_device *evt)
23{ 23{
24 evt->irq = IRQ_LOCALTIMER; 24 evt->irq = IRQ_LOCALTIMER;
25 twd_timer_setup(evt); 25 twd_timer_setup(evt);
26 return 0;
26} 27}
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
new file mode 100644
index 000000000000..ba3d471d4bcf
--- /dev/null
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -0,0 +1,104 @@
1/*
2 * linux/arch/arm/plat-versatile/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h>
17
18#include <asm/cacheflush.h>
19
20/*
21 * control for which core is the next to come out of the secondary
22 * boot "holding pen"
23 */
24volatile int __cpuinitdata pen_release = -1;
25
26/*
27 * Write pen_release in a way that is guaranteed to be visible to all
28 * observers, irrespective of whether they're taking part in coherency
29 * or not. This is necessary for the hotplug code to work reliably.
30 */
31static void __cpuinit write_pen_release(int val)
32{
33 pen_release = val;
34 smp_wmb();
35 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
36 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
37}
38
39static DEFINE_SPINLOCK(boot_lock);
40
41void __cpuinit platform_secondary_init(unsigned int cpu)
42{
43 /*
44 * if any interrupts are already enabled for the primary
45 * core (e.g. timer irq), then they will not have been enabled
46 * for us: do so
47 */
48 gic_secondary_init(0);
49
50 /*
51 * let the primary processor know we're out of the
52 * pen, then head off into the C entry point
53 */
54 write_pen_release(-1);
55
56 /*
57 * Synchronise with the boot thread.
58 */
59 spin_lock(&boot_lock);
60 spin_unlock(&boot_lock);
61}
62
63int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
64{
65 unsigned long timeout;
66
67 /*
68 * Set synchronisation state between this boot processor
69 * and the secondary one
70 */
71 spin_lock(&boot_lock);
72
73 /*
74 * This is really belt and braces; we hold unintended secondary
75 * CPUs in the holding pen until we're ready for them. However,
76 * since we haven't sent them a soft interrupt, they shouldn't
77 * be there.
78 */
79 write_pen_release(cpu);
80
81 /*
82 * Send the secondary CPU a soft interrupt, thereby causing
83 * the boot monitor to read the system wide flags register,
84 * and branch to the address found there.
85 */
86 smp_cross_call(cpumask_of(cpu), 1);
87
88 timeout = jiffies + (1 * HZ);
89 while (time_before(jiffies, timeout)) {
90 smp_rmb();
91 if (pen_release == -1)
92 break;
93
94 udelay(10);
95 }
96
97 /*
98 * now the secondary core is starting up let it run its
99 * calibrations, then wait for it to finish
100 */
101 spin_unlock(&boot_lock);
102
103 return pen_release != -1 ? -ENOSYS : 0;
104}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 9d6feaabbe7d..7ca41f0a09b1 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,2745 +12,458 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Feb 7 08:59:27 2011 15# XXX: This is a cut-down version of the file; it contains only machines that
16# XXX: are in mainline or have been submitted to the machine database within
17# XXX: the last 12 months. If your entry is missing please email rmk at
18# XXX: <linux@arm.linux.org.uk>
19#
20# Last update: Sun Mar 20 18:06:11 2011
16# 21#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 22# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 23#
19ebsa110 ARCH_EBSA110 EBSA110 0 24ebsa110 ARCH_EBSA110 EBSA110 0
20riscpc ARCH_RPC RISCPC 1 25riscpc ARCH_RPC RISCPC 1
21nexuspci ARCH_NEXUSPCI NEXUSPCI 3
22ebsa285 ARCH_EBSA285 EBSA285 4 26ebsa285 ARCH_EBSA285 EBSA285 4
23netwinder ARCH_NETWINDER NETWINDER 5 27netwinder ARCH_NETWINDER NETWINDER 5
24cats ARCH_CATS CATS 6 28cats ARCH_CATS CATS 6
25tbox ARCH_TBOX TBOX 7
26co285 ARCH_CO285 CO285 8
27clps7110 ARCH_CLPS7110 CLPS7110 9
28archimedes ARCH_ARC ARCHIMEDES 10
29a5k ARCH_A5K A5K 11
30etoile ARCH_ETOILE ETOILE 12
31lacie_nas ARCH_LACIE_NAS LACIE_NAS 13
32clps7500 ARCH_CLPS7500 CLPS7500 14
33shark ARCH_SHARK SHARK 15 29shark ARCH_SHARK SHARK 15
34brutus SA1100_BRUTUS BRUTUS 16 30brutus SA1100_BRUTUS BRUTUS 16
35personal_server ARCH_PERSONAL_SERVER PERSONAL_SERVER 17 31personal_server ARCH_PERSONAL_SERVER PERSONAL_SERVER 17
36itsy SA1100_ITSY ITSY 18
37l7200 ARCH_L7200 L7200 19 32l7200 ARCH_L7200 L7200 19
38pleb SA1100_PLEB PLEB 20 33pleb SA1100_PLEB PLEB 20
39integrator ARCH_INTEGRATOR INTEGRATOR 21 34integrator ARCH_INTEGRATOR INTEGRATOR 21
40h3600 SA1100_H3600 H3600 22 35h3600 SA1100_H3600 H3600 22
41ixp1200 ARCH_IXP1200 IXP1200 23
42p720t ARCH_P720T P720T 24 36p720t ARCH_P720T P720T 24
43assabet SA1100_ASSABET ASSABET 25 37assabet SA1100_ASSABET ASSABET 25
44victor SA1100_VICTOR VICTOR 26
45lart SA1100_LART LART 27 38lart SA1100_LART LART 27
46ranger SA1100_RANGER RANGER 28
47graphicsclient SA1100_GRAPHICSCLIENT GRAPHICSCLIENT 29 39graphicsclient SA1100_GRAPHICSCLIENT GRAPHICSCLIENT 29
48xp860 SA1100_XP860 XP860 30 40xp860 SA1100_XP860 XP860 30
49cerf SA1100_CERF CERF 31 41cerf SA1100_CERF CERF 31
50nanoengine SA1100_NANOENGINE NANOENGINE 32 42nanoengine SA1100_NANOENGINE NANOENGINE 32
51fpic SA1100_FPIC FPIC 33
52extenex1 SA1100_EXTENEX1 EXTENEX1 34
53sherman SA1100_SHERMAN SHERMAN 35
54accelent_sa SA1100_ACCELENT ACCELENT_SA 36
55accelent_l7200 ARCH_L7200_ACCELENT ACCELENT_L7200 37
56netport SA1100_NETPORT NETPORT 38
57pangolin SA1100_PANGOLIN PANGOLIN 39
58yopy SA1100_YOPY YOPY 40
59coolidge SA1100_COOLIDGE COOLIDGE 41
60huw_webpanel SA1100_HUW_WEBPANEL HUW_WEBPANEL 42
61spotme ARCH_SPOTME SPOTME 43
62freebird ARCH_FREEBIRD FREEBIRD 44
63ti925 ARCH_TI925 TI925 45
64riscstation ARCH_RISCSTATION RISCSTATION 46
65cavy SA1100_CAVY CAVY 47
66jornada720 SA1100_JORNADA720 JORNADA720 48 43jornada720 SA1100_JORNADA720 JORNADA720 48
67omnimeter SA1100_OMNIMETER OMNIMETER 49
68edb7211 ARCH_EDB7211 EDB7211 50 44edb7211 ARCH_EDB7211 EDB7211 50
69citygo SA1100_CITYGO CITYGO 51
70pfs168 SA1100_PFS168 PFS168 52 45pfs168 SA1100_PFS168 PFS168 52
71spot SA1100_SPOT SPOT 53
72flexanet SA1100_FLEXANET FLEXANET 54 46flexanet SA1100_FLEXANET FLEXANET 54
73webpal ARCH_WEBPAL WEBPAL 55
74linpda SA1100_LINPDA LINPDA 56
75anakin ARCH_ANAKIN ANAKIN 57
76mvi SA1100_MVI MVI 58
77jupiter SA1100_JUPITER JUPITER 59
78psionw ARCH_PSIONW PSIONW 60
79aln SA1100_ALN ALN 61
80epxa ARCH_CAMELOT CAMELOT 62
81gds2200 SA1100_GDS2200 GDS2200 63
82netbook SA1100_PSION_SERIES7 PSION_SERIES7 64
83xfile SA1100_XFILE XFILE 65
84accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66
85ic200 ARCH_IC200 IC200 67
86creditlart SA1100_CREDITLART CREDITLART 68
87htm SA1100_HTM HTM 69
88iq80310 ARCH_IQ80310 IQ80310 70
89freebot SA1100_FREEBOT FREEBOT 71
90entel ARCH_ENTEL ENTEL 72
91enp3510 ARCH_ENP3510 ENP3510 73
92trizeps SA1100_TRIZEPS TRIZEPS 74
93nesa SA1100_NESA NESA 75
94venus ARCH_VENUS VENUS 76
95tardis ARCH_TARDIS TARDIS 77
96mercury ARCH_MERCURY MERCURY 78
97empeg SA1100_EMPEG EMPEG 79
98adi_evb ARCH_I80200FCC I80200FCC 80
99itt_cpb SA1100_ITT_CPB ITT_CPB 81
100svc SA1100_SVC SVC 82
101alpha2 SA1100_ALPHA2 ALPHA2 84
102alpha1 SA1100_ALPHA1 ALPHA1 85
103netarm ARCH_NETARM NETARM 86
104simpad SA1100_SIMPAD SIMPAD 87 47simpad SA1100_SIMPAD SIMPAD 87
105pda1 ARCH_PDA1 PDA1 88
106lubbock ARCH_LUBBOCK LUBBOCK 89 48lubbock ARCH_LUBBOCK LUBBOCK 89
107aniko ARCH_ANIKO ANIKO 90
108clep7212 ARCH_CLEP7212 CLEP7212 91 49clep7212 ARCH_CLEP7212 CLEP7212 91
109cs89712 ARCH_CS89712 CS89712 92
110weararm SA1100_WEARARM WEARARM 93
111possio_px SA1100_POSSIO_PX POSSIO_PX 94
112sidearm SA1100_SIDEARM SIDEARM 95
113stork SA1100_STORK STORK 96
114shannon SA1100_SHANNON SHANNON 97 50shannon SA1100_SHANNON SHANNON 97
115ace ARCH_ACE ACE 98
116ballyarm SA1100_BALLYARM BALLYARM 99
117simputer SA1100_SIMPUTER SIMPUTER 100
118nexterm SA1100_NEXTERM NEXTERM 101
119sa1100_elf SA1100_SA1100_ELF SA1100_ELF 102
120gator SA1100_GATOR GATOR 103
121granite ARCH_GRANITE GRANITE 104
122consus SA1100_CONSUS CONSUS 105 51consus SA1100_CONSUS CONSUS 105
123aaed2000 ARCH_AAED2000 AAED2000 106 52aaed2000 ARCH_AAED2000 AAED2000 106
124cdb89712 ARCH_CDB89712 CDB89712 107 53cdb89712 ARCH_CDB89712 CDB89712 107
125graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108 54graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108
126adsbitsy SA1100_ADSBITSY ADSBITSY 109 55adsbitsy SA1100_ADSBITSY ADSBITSY 109
127pxa_idp ARCH_PXA_IDP PXA_IDP 110 56pxa_idp ARCH_PXA_IDP PXA_IDP 110
128plce ARCH_PLCE PLCE 111
129pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112 57pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112
130murphy ARCH_MEDALB MEDALB 113
131eagle ARCH_EAGLE EAGLE 114
132dsc21 ARCH_DSC21 DSC21 115
133dsc24 ARCH_DSC24 DSC24 116
134ti5472 ARCH_TI5472 TI5472 117
135autcpu12 ARCH_AUTCPU12 AUTCPU12 118 58autcpu12 ARCH_AUTCPU12 AUTCPU12 118
136uengine ARCH_UENGINE UENGINE 119
137bluestem SA1100_BLUESTEM BLUESTEM 120
138xingu8 ARCH_XINGU8 XINGU8 121
139bushstb ARCH_BUSHSTB BUSHSTB 122
140epsilon1 SA1100_EPSILON1 EPSILON1 123
141balloon SA1100_BALLOON BALLOON 124
142puppy ARCH_PUPPY PUPPY 125
143elroy SA1100_ELROY ELROY 126
144gms720 ARCH_GMS720 GMS720 127
145s24x ARCH_S24X S24X 128
146jtel_clep7312 ARCH_JTEL_CLEP7312 JTEL_CLEP7312 129
147cx821xx ARCH_CX821XX CX821XX 130
148edb7312 ARCH_EDB7312 EDB7312 131
149bsa1110 SA1100_BSA1110 BSA1110 132
150powerpin ARCH_POWERPIN POWERPIN 133
151openarm ARCH_OPENARM OPENARM 134
152whitechapel SA1100_WHITECHAPEL WHITECHAPEL 135
153h3100 SA1100_H3100 H3100 136 59h3100 SA1100_H3100 H3100 136
154h3800 SA1100_H3800 H3800 137
155blue_v1 ARCH_BLUE_V1 BLUE_V1 138
156pxa_cerf ARCH_PXA_CERF PXA_CERF 139
157arm7tevb ARCH_ARM7TEVB ARM7TEVB 140
158d7400 SA1100_D7400 D7400 141
159piranha ARCH_PIRANHA PIRANHA 142
160sbcamelot SA1100_SBCAMELOT SBCAMELOT 143
161kings SA1100_KINGS KINGS 144
162smdk2400 ARCH_SMDK2400 SMDK2400 145
163collie SA1100_COLLIE COLLIE 146 60collie SA1100_COLLIE COLLIE 146
164idr ARCH_IDR IDR 147
165badge4 SA1100_BADGE4 BADGE4 148 61badge4 SA1100_BADGE4 BADGE4 148
166webnet ARCH_WEBNET WEBNET 149
167d7300 SA1100_D7300 D7300 150
168cep SA1100_CEP CEP 151
169fortunet ARCH_FORTUNET FORTUNET 152 62fortunet ARCH_FORTUNET FORTUNET 152
170vc547x ARCH_VC547X VC547X 153
171filewalker SA1100_FILEWALKER FILEWALKER 154
172netgateway SA1100_NETGATEWAY NETGATEWAY 155
173symbol2800 SA1100_SYMBOL2800 SYMBOL2800 156
174suns SA1100_SUNS SUNS 157
175frodo SA1100_FRODO FRODO 158
176ms301 SA1100_MACH_TYTE_MS301 MACH_TYTE_MS301 159
177mx1ads ARCH_MX1ADS MX1ADS 160 63mx1ads ARCH_MX1ADS MX1ADS 160
178h7201 ARCH_H7201 H7201 161 64h7201 ARCH_H7201 H7201 161
179h7202 ARCH_H7202 H7202 162 65h7202 ARCH_H7202 H7202 162
180amico ARCH_AMICO AMICO 163
181iam SA1100_IAM IAM 164
182tt530 SA1100_TT530 TT530 165
183sam2400 ARCH_SAM2400 SAM2400 166
184jornada56x SA1100_JORNADA56X JORNADA56X 167
185active SA1100_ACTIVE ACTIVE 168
186iq80321 ARCH_IQ80321 IQ80321 169 66iq80321 ARCH_IQ80321 IQ80321 169
187wid SA1100_WID WID 170
188sabinal ARCH_SABINAL SABINAL 171
189ixp425_matacumbe ARCH_IXP425_MATACUMBE IXP425_MATACUMBE 172
190miniprint SA1100_MINIPRINT MINIPRINT 173
191adm510x ARCH_ADM510X ADM510X 174
192svs200 SA1100_SVS200 SVS200 175
193atg_tcu ARCH_ATG_TCU ATG_TCU 176
194jornada820 SA1100_JORNADA820 JORNADA820 177
195s3c44b0 ARCH_S3C44B0 S3C44B0 178
196margis2 ARCH_MARGIS2 MARGIS2 179
197ks8695 ARCH_KS8695 KS8695 180 67ks8695 ARCH_KS8695 KS8695 180
198brh ARCH_BRH BRH 181
199s3c2410 ARCH_S3C2410 S3C2410 182
200possio_px30 ARCH_POSSIO_PX30 POSSIO_PX30 183
201s3c2800 ARCH_S3C2800 S3C2800 184
202fleetwood SA1100_FLEETWOOD FLEETWOOD 185
203omaha ARCH_OMAHA OMAHA 186
204ta7 ARCH_TA7 TA7 187
205nova SA1100_NOVA NOVA 188
206hmk ARCH_HMK HMK 189
207karo ARCH_KARO KARO 190
208fester SA1100_FESTER FESTER 191
209gpi ARCH_GPI GPI 192
210smdk2410 ARCH_SMDK2410 SMDK2410 193 68smdk2410 ARCH_SMDK2410 SMDK2410 193
211i519 ARCH_I519 I519 194
212nexio SA1100_NEXIO NEXIO 195
213bitbox SA1100_BITBOX BITBOX 196
214g200 SA1100_G200 G200 197
215gill SA1100_GILL GILL 198
216pxa_mercury ARCH_PXA_MERCURY PXA_MERCURY 199
217ceiva ARCH_CEIVA CEIVA 200 69ceiva ARCH_CEIVA CEIVA 200
218fret SA1100_FRET FRET 201
219emailphone SA1100_EMAILPHONE EMAILPHONE 202
220h3900 ARCH_H3900 H3900 203
221pxa1 ARCH_PXA1 PXA1 204
222koan369 SA1100_KOAN369 KOAN369 205
223cogent ARCH_COGENT COGENT 206
224esl_simputer ARCH_ESL_SIMPUTER ESL_SIMPUTER 207
225esl_simputer_clr ARCH_ESL_SIMPUTER_CLR ESL_SIMPUTER_CLR 208
226esl_simputer_bw ARCH_ESL_SIMPUTER_BW ESL_SIMPUTER_BW 209
227hhp_cradle ARCH_HHP_CRADLE HHP_CRADLE 210
228he500 ARCH_HE500 HE500 211
229inhandelf2 SA1100_INHANDELF2 INHANDELF2 212
230inhandftip SA1100_INHANDFTIP INHANDFTIP 213
231dnp1110 SA1100_DNP1110 DNP1110 214
232pnp1110 SA1100_PNP1110 PNP1110 215
233csb226 ARCH_CSB226 CSB226 216
234arnold SA1100_ARNOLD ARNOLD 217
235voiceblue MACH_VOICEBLUE VOICEBLUE 218 70voiceblue MACH_VOICEBLUE VOICEBLUE 218
236jz8028 ARCH_JZ8028 JZ8028 219
237h5400 ARCH_H5400 H5400 220 71h5400 ARCH_H5400 H5400 220
238forte SA1100_FORTE FORTE 221
239acam SA1100_ACAM ACAM 222
240abox SA1100_ABOX ABOX 223
241atmel ARCH_ATMEL ATMEL 224
242sitsang ARCH_SITSANG SITSANG 225
243cpu1110lcdnet SA1100_CPU1110LCDNET CPU1110LCDNET 226
244mpl_vcma9 ARCH_MPL_VCMA9 MPL_VCMA9 227
245opus_a1 ARCH_OPUS_A1 OPUS_A1 228
246daytona ARCH_DAYTONA DAYTONA 229
247killbear SA1100_KILLBEAR KILLBEAR 230
248yoho ARCH_YOHO YOHO 231
249jasper ARCH_JASPER JASPER 232
250dsc25 ARCH_DSC25 DSC25 233
251omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234 72omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234
252mnci ARCH_RAMSES RAMSES 235
253s28x ARCH_S28X S28X 236
254mport3 ARCH_MPORT3 MPORT3 237
255pxa_eagle250 ARCH_PXA_EAGLE250 PXA_EAGLE250 238
256pdb ARCH_PDB PDB 239
257blue_2g SA1100_BLUE_2G BLUE_2G 240
258bluearch SA1100_BLUEARCH BLUEARCH 241
259ixdp2400 ARCH_IXDP2400 IXDP2400 242 73ixdp2400 ARCH_IXDP2400 IXDP2400 242
260ixdp2800 ARCH_IXDP2800 IXDP2800 243 74ixdp2800 ARCH_IXDP2800 IXDP2800 243
261explorer SA1100_EXPLORER EXPLORER 244
262ixdp425 ARCH_IXDP425 IXDP425 245 75ixdp425 ARCH_IXDP425 IXDP425 245
263chimp ARCH_CHIMP CHIMP 246
264stork_nest ARCH_STORK_NEST STORK_NEST 247
265stork_egg ARCH_STORK_EGG STORK_EGG 248
266wismo SA1100_WISMO WISMO 249
267ezlinx ARCH_EZLINX EZLINX 250
268at91rm9200 ARCH_AT91RM9200 AT91RM9200 251
269adtech_orion ARCH_ADTECH_ORION ADTECH_ORION 252
270neptune ARCH_NEPTUNE NEPTUNE 253
271hackkit SA1100_HACKKIT HACKKIT 254 76hackkit SA1100_HACKKIT HACKKIT 254
272pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255
273lavinna SA1100_LAVINNA LAVINNA 256
274pxa_uengine ARCH_PXA_UENGINE PXA_UENGINE 257
275innokom ARCH_INNOKOM INNOKOM 258
276bms ARCH_BMS BMS 259
277ixcdp1100 ARCH_IXCDP1100 IXCDP1100 260 77ixcdp1100 ARCH_IXCDP1100 IXCDP1100 260
278prpmc1100 ARCH_PRPMC1100 PRPMC1100 261
279at91rm9200dk ARCH_AT91RM9200DK AT91RM9200DK 262 78at91rm9200dk ARCH_AT91RM9200DK AT91RM9200DK 262
280armstick ARCH_ARMSTICK ARMSTICK 263
281armonie ARCH_ARMONIE ARMONIE 264
282mport1 ARCH_MPORT1 MPORT1 265
283s3c5410 ARCH_S3C5410 S3C5410 266
284zcp320a ARCH_ZCP320A ZCP320A 267
285i_box ARCH_I_BOX I_BOX 268
286stlc1502 ARCH_STLC1502 STLC1502 269
287siren ARCH_SIREN SIREN 270
288greenlake ARCH_GREENLAKE GREENLAKE 271
289argus ARCH_ARGUS ARGUS 272
290combadge SA1100_COMBADGE COMBADGE 273
291rokepxa ARCH_ROKEPXA ROKEPXA 274
292cintegrator ARCH_CINTEGRATOR CINTEGRATOR 275 79cintegrator ARCH_CINTEGRATOR CINTEGRATOR 275
293guidea07 ARCH_GUIDEA07 GUIDEA07 276
294tat257 ARCH_TAT257 TAT257 277
295igp2425 ARCH_IGP2425 IGP2425 278
296bluegrama ARCH_BLUEGRAMMA BLUEGRAMMA 279
297ipod ARCH_IPOD IPOD 280
298adsbitsyx ARCH_ADSBITSYX ADSBITSYX 281
299trizeps2 ARCH_TRIZEPS2 TRIZEPS2 282
300viper ARCH_VIPER VIPER 283 80viper ARCH_VIPER VIPER 283
301adsbitsyplus SA1100_ADSBITSYPLUS ADSBITSYPLUS 284
302adsagc SA1100_ADSAGC ADSAGC 285
303stp7312 ARCH_STP7312 STP7312 286
304nx_phnx MACH_NX_PHNX NX_PHNX 287
305wep_ep250 ARCH_WEP_EP250 WEP_EP250 288
306inhandelf3 ARCH_INHANDELF3 INHANDELF3 289
307adi_coyote ARCH_ADI_COYOTE ADI_COYOTE 290 81adi_coyote ARCH_ADI_COYOTE ADI_COYOTE 290
308iyonix ARCH_IYONIX IYONIX 291
309damicam1 ARCH_DAMICAM_SA1110 DAMICAM_SA1110 292
310meg03 ARCH_MEG03 MEG03 293
311pxa_whitechapel ARCH_PXA_WHITECHAPEL PXA_WHITECHAPEL 294
312nwsc ARCH_NWSC NWSC 295
313nwlarm ARCH_NWLARM NWLARM 296
314ixp425_mguard ARCH_IXP425_MGUARD IXP425_MGUARD 297
315pxa_netdcu4 ARCH_PXA_NETDCU4 PXA_NETDCU4 298
316ixdp2401 ARCH_IXDP2401 IXDP2401 299 82ixdp2401 ARCH_IXDP2401 IXDP2401 299
317ixdp2801 ARCH_IXDP2801 IXDP2801 300 83ixdp2801 ARCH_IXDP2801 IXDP2801 300
318zodiac ARCH_ZODIAC ZODIAC 301
319armmodul ARCH_ARMMODUL ARMMODUL 302
320ketop SA1100_KETOP KETOP 303
321av7200 ARCH_AV7200 AV7200 304
322arch_ti925 ARCH_ARCH_TI925 ARCH_TI925 305
323acq200 ARCH_ACQ200 ACQ200 306
324pt_dafit SA1100_PT_DAFIT PT_DAFIT 307
325ihba ARCH_IHBA IHBA 308
326quinque ARCH_QUINQUE QUINQUE 309
327nimbraone ARCH_NIMBRAONE NIMBRAONE 310
328nimbra29x ARCH_NIMBRA29X NIMBRA29X 311
329nimbra210 ARCH_NIMBRA210 NIMBRA210 312
330hhp_d95xx ARCH_HHP_D95XX HHP_D95XX 313
331labarm ARCH_LABARM LABARM 314
332m825xx ARCH_M825XX M825XX 315
333m7100 SA1100_M7100 M7100 316
334nipc2 ARCH_NIPC2 NIPC2 317
335fu7202 ARCH_FU7202 FU7202 318
336adsagx ARCH_ADSAGX ADSAGX 319
337pxa_pooh ARCH_PXA_POOH PXA_POOH 320
338bandon ARCH_BANDON BANDON 321
339pcm7210 ARCH_PCM7210 PCM7210 322
340nms9200 ARCH_NMS9200 NMS9200 323
341logodl ARCH_LOGODL LOGODL 324
342m7140 SA1100_M7140 M7140 325
343korebot ARCH_KOREBOT KOREBOT 326
344iq31244 ARCH_IQ31244 IQ31244 327 84iq31244 ARCH_IQ31244 IQ31244 327
345koan393 SA1100_KOAN393 KOAN393 328
346inhandftip3 ARCH_INHANDFTIP3 INHANDFTIP3 329
347gonzo ARCH_GONZO GONZO 330
348bast ARCH_BAST BAST 331 85bast ARCH_BAST BAST 331
349scanpass ARCH_SCANPASS SCANPASS 332
350ep7312_pooh ARCH_EP7312_POOH EP7312_POOH 333
351ta7s ARCH_TA7S TA7S 334
352ta7v ARCH_TA7V TA7V 335
353icarus SA1100_ICARUS ICARUS 336
354h1900 ARCH_H1900 H1900 337
355gemini SA1100_GEMINI GEMINI 338
356axim ARCH_AXIM AXIM 339
357audiotron ARCH_AUDIOTRON AUDIOTRON 340
358h2200 ARCH_H2200 H2200 341
359loox600 ARCH_LOOX600 LOOX600 342
360niop ARCH_NIOP NIOP 343
361dm310 ARCH_DM310 DM310 344
362seedpxa_c2 ARCH_SEEDPXA_C2 SEEDPXA_C2 345
363ixp4xx_mguardpci ARCH_IXP4XX_MGUARD_PCI IXP4XX_MGUARD_PCI 346
364h1940 ARCH_H1940 H1940 347 86h1940 ARCH_H1940 H1940 347
365scorpio ARCH_SCORPIO SCORPIO 348
366viva ARCH_VIVA VIVA 349
367pxa_xcard ARCH_PXA_XCARD PXA_XCARD 350
368csb335 ARCH_CSB335 CSB335 351
369ixrd425 ARCH_IXRD425 IXRD425 352
370iq80315 ARCH_IQ80315 IQ80315 353
371nmp7312 ARCH_NMP7312 NMP7312 354
372cx861xx ARCH_CX861XX CX861XX 355
373enp2611 ARCH_ENP2611 ENP2611 356 87enp2611 ARCH_ENP2611 ENP2611 356
374xda SA1100_XDA XDA 357
375csir_ims ARCH_CSIR_IMS CSIR_IMS 358
376ixp421_dnaeeth ARCH_IXP421_DNAEETH IXP421_DNAEETH 359
377pocketserv9200 ARCH_POCKETSERV9200 POCKETSERV9200 360
378toto ARCH_TOTO TOTO 361
379s3c2440 ARCH_S3C2440 S3C2440 362 88s3c2440 ARCH_S3C2440 S3C2440 362
380ks8695p ARCH_KS8695P KS8695P 363
381se4000 ARCH_SE4000 SE4000 364
382quadriceps ARCH_QUADRICEPS QUADRICEPS 365
383bronco ARCH_BRONCO BRONCO 366
384esl_wireless_tab ARCH_ESL_WIRELESS_TAB ESL_WIRELESS_TAB 367
385esl_sofcomp ARCH_ESL_SOFCOMP ESL_SOFCOMP 368
386s5c7375 ARCH_S5C7375 S5C7375 369
387spearhead ARCH_SPEARHEAD SPEARHEAD 370
388pantera ARCH_PANTERA PANTERA 371
389prayoglite ARCH_PRAYOGLITE PRAYOGLITE 372
390gumstix ARCH_GUMSTIX GUMSTIX 373 89gumstix ARCH_GUMSTIX GUMSTIX 373
391rcube ARCH_RCUBE RCUBE 374
392rea_olv ARCH_REA_OLV REA_OLV 375
393pxa_iphone ARCH_PXA_IPHONE PXA_IPHONE 376
394s3c3410 ARCH_S3C3410 S3C3410 377
395espd_4510b ARCH_ESPD_4510B ESPD_4510B 378
396mp1x ARCH_MP1X MP1X 379
397at91rm9200tb ARCH_AT91RM9200TB AT91RM9200TB 380
398adsvgx ARCH_ADSVGX ADSVGX 381
399omap_h2 MACH_OMAP_H2 OMAP_H2 382 90omap_h2 MACH_OMAP_H2 OMAP_H2 382
400pelee ARCH_PELEE PELEE 383
401e740 MACH_E740 E740 384 91e740 MACH_E740 E740 384
402iq80331 ARCH_IQ80331 IQ80331 385 92iq80331 ARCH_IQ80331 IQ80331 385
403versatile_pb ARCH_VERSATILE_PB VERSATILE_PB 387 93versatile_pb ARCH_VERSATILE_PB VERSATILE_PB 387
404kev7a400 MACH_KEV7A400 KEV7A400 388 94kev7a400 MACH_KEV7A400 KEV7A400 388
405lpd7a400 MACH_LPD7A400 LPD7A400 389 95lpd7a400 MACH_LPD7A400 LPD7A400 389
406lpd7a404 MACH_LPD7A404 LPD7A404 390 96lpd7a404 MACH_LPD7A404 LPD7A404 390
407fujitsu_camelot ARCH_FUJITSU_CAMELOT FUJITSU_CAMELOT 391
408janus2m ARCH_JANUS2M JANUS2M 392
409embtf MACH_EMBTF EMBTF 393
410hpm MACH_HPM HPM 394
411smdk2410tk MACH_SMDK2410TK SMDK2410TK 395
412smdk2410aj MACH_SMDK2410AJ SMDK2410AJ 396
413streetracer MACH_STREETRACER STREETRACER 397
414eframe MACH_EFRAME EFRAME 398
415csb337 MACH_CSB337 CSB337 399 97csb337 MACH_CSB337 CSB337 399
416pxa_lark MACH_PXA_LARK PXA_LARK 400
417pxa_pnp2110 MACH_PNP2110 PNP2110 401
418tcc72x MACH_TCC72X TCC72X 402
419altair MACH_ALTAIR ALTAIR 403
420kc3 MACH_KC3 KC3 404
421sinteftd MACH_SINTEFTD SINTEFTD 405
422mainstone MACH_MAINSTONE MAINSTONE 406 98mainstone MACH_MAINSTONE MAINSTONE 406
423aday4x MACH_ADAY4X ADAY4X 407
424lite300 MACH_LITE300 LITE300 408
425s5c7376 MACH_S5C7376 S5C7376 409
426mt02 MACH_MT02 MT02 410
427mport3s MACH_MPORT3S MPORT3S 411
428ra_alpha MACH_RA_ALPHA RA_ALPHA 412
429xcep MACH_XCEP XCEP 413 99xcep MACH_XCEP XCEP 413
430arcom_vulcan MACH_ARCOM_VULCAN ARCOM_VULCAN 414 100arcom_vulcan MACH_ARCOM_VULCAN ARCOM_VULCAN 414
431stargate MACH_STARGATE STARGATE 415
432armadilloj MACH_ARMADILLOJ ARMADILLOJ 416
433elroy_jack MACH_ELROY_JACK ELROY_JACK 417
434backend MACH_BACKEND BACKEND 418
435s5linbox MACH_S5LINBOX S5LINBOX 419
436nomadik MACH_NOMADIK NOMADIK 420 101nomadik MACH_NOMADIK NOMADIK 420
437ia_cpu_9200 MACH_IA_CPU_9200 IA_CPU_9200 421
438at91_bja1 MACH_AT91_BJA1 AT91_BJA1 422
439corgi MACH_CORGI CORGI 423 102corgi MACH_CORGI CORGI 423
440poodle MACH_POODLE POODLE 424 103poodle MACH_POODLE POODLE 424
441ten MACH_TEN TEN 425
442roverp5p MACH_ROVERP5P ROVERP5P 426
443sc2700 MACH_SC2700 SC2700 427
444ex_eagle MACH_EX_EAGLE EX_EAGLE 428
445nx_pxa12 MACH_NX_PXA12 NX_PXA12 429
446nx_pxa5 MACH_NX_PXA5 NX_PXA5 430
447blackboard2 MACH_BLACKBOARD2 BLACKBOARD2 431
448i819 MACH_I819 I819 432
449ixmb995e MACH_IXMB995E IXMB995E 433
450skyrider MACH_SKYRIDER SKYRIDER 434
451skyhawk MACH_SKYHAWK SKYHAWK 435
452enterprise MACH_ENTERPRISE ENTERPRISE 436
453dep2410 MACH_DEP2410 DEP2410 437
454armcore MACH_ARMCORE ARMCORE 438 104armcore MACH_ARMCORE ARMCORE 438
455hobbit MACH_HOBBIT HOBBIT 439
456h7210 MACH_H7210 H7210 440
457pxa_netdcu5 MACH_PXA_NETDCU5 PXA_NETDCU5 441
458acc MACH_ACC ACC 442
459esl_sarva MACH_ESL_SARVA ESL_SARVA 443
460xm250 MACH_XM250 XM250 444
461t6tc1xb MACH_T6TC1XB T6TC1XB 445
462ess710 MACH_ESS710 ESS710 446
463mx31ads MACH_MX31ADS MX31ADS 447 105mx31ads MACH_MX31ADS MX31ADS 447
464himalaya MACH_HIMALAYA HIMALAYA 448 106himalaya MACH_HIMALAYA HIMALAYA 448
465bolfenk MACH_BOLFENK BOLFENK 449
466at91rm9200kr MACH_AT91RM9200KR AT91RM9200KR 450
467edb9312 MACH_EDB9312 EDB9312 451 107edb9312 MACH_EDB9312 EDB9312 451
468omap_generic MACH_OMAP_GENERIC OMAP_GENERIC 452 108omap_generic MACH_OMAP_GENERIC OMAP_GENERIC 452
469aximx3 MACH_AXIMX3 AXIMX3 453
470eb67xdip MACH_EB67XDIP EB67XDIP 454
471webtxs MACH_WEBTXS WEBTXS 455
472hawk MACH_HAWK HAWK 456
473ccat91sbc001 MACH_CCAT91SBC001 CCAT91SBC001 457
474expresso MACH_EXPRESSO EXPRESSO 458
475h4000 MACH_H4000 H4000 459
476dino MACH_DINO DINO 460
477ml675k MACH_ML675K ML675K 461
478edb9301 MACH_EDB9301 EDB9301 462 109edb9301 MACH_EDB9301 EDB9301 462
479edb9315 MACH_EDB9315 EDB9315 463 110edb9315 MACH_EDB9315 EDB9315 463
480reciva_tt MACH_RECIVA_TT RECIVA_TT 464
481cstcb01 MACH_CSTCB01 CSTCB01 465
482cstcb1 MACH_CSTCB1 CSTCB1 466
483shadwell MACH_SHADWELL SHADWELL 467
484goepel263 MACH_GOEPEL263 GOEPEL263 468
485acq100 MACH_ACQ100 ACQ100 469
486mx1fs2 MACH_MX1FS2 MX1FS2 470
487hiptop_g1 MACH_HIPTOP_G1 HIPTOP_G1 471
488sparky MACH_SPARKY SPARKY 472
489ns9750 MACH_NS9750 NS9750 473
490phoenix MACH_PHOENIX PHOENIX 474
491vr1000 MACH_VR1000 VR1000 475 111vr1000 MACH_VR1000 VR1000 475
492deisterpxa MACH_DEISTERPXA DEISTERPXA 476
493bcm1160 MACH_BCM1160 BCM1160 477
494pcm022 MACH_PCM022 PCM022 478
495adsgcx MACH_ADSGCX ADSGCX 479
496dreadnaught MACH_DREADNAUGHT DREADNAUGHT 480
497dm320 MACH_DM320 DM320 481
498markov MACH_MARKOV MARKOV 482
499cos7a400 MACH_COS7A400 COS7A400 483
500milano MACH_MILANO MILANO 484
501ue9328 MACH_UE9328 UE9328 485
502uex255 MACH_UEX255 UEX255 486
503ue2410 MACH_UE2410 UE2410 487
504a620 MACH_A620 A620 488
505ocelot MACH_OCELOT OCELOT 489
506cheetah MACH_CHEETAH CHEETAH 490
507omap_perseus2 MACH_OMAP_PERSEUS2 OMAP_PERSEUS2 491 112omap_perseus2 MACH_OMAP_PERSEUS2 OMAP_PERSEUS2 491
508zvue MACH_ZVUE ZVUE 492
509roverp1 MACH_ROVERP1 ROVERP1 493
510asidial2 MACH_ASIDIAL2 ASIDIAL2 494
511s3c24a0 MACH_S3C24A0 S3C24A0 495
512e800 MACH_E800 E800 496 113e800 MACH_E800 E800 496
513e750 MACH_E750 E750 497 114e750 MACH_E750 E750 497
514s3c5500 MACH_S3C5500 S3C5500 498
515smdk5500 MACH_SMDK5500 SMDK5500 499
516signalsync MACH_SIGNALSYNC SIGNALSYNC 500
517nbc MACH_NBC NBC 501
518kodiak MACH_KODIAK KODIAK 502
519netbookpro MACH_NETBOOKPRO NETBOOKPRO 503
520hw90200 MACH_HW90200 HW90200 504
521condor MACH_CONDOR CONDOR 505
522cup MACH_CUP CUP 506
523kite MACH_KITE KITE 507
524scb9328 MACH_SCB9328 SCB9328 508 115scb9328 MACH_SCB9328 SCB9328 508
525omap_h3 MACH_OMAP_H3 OMAP_H3 509 116omap_h3 MACH_OMAP_H3 OMAP_H3 509
526omap_h4 MACH_OMAP_H4 OMAP_H4 510 117omap_h4 MACH_OMAP_H4 OMAP_H4 510
527n10 MACH_N10 N10 511
528montejade MACH_MONTAJADE MONTAJADE 512
529sg560 MACH_SG560 SG560 513
530dp1000 MACH_DP1000 DP1000 514
531omap_osk MACH_OMAP_OSK OMAP_OSK 515 118omap_osk MACH_OMAP_OSK OMAP_OSK 515
532rg100v3 MACH_RG100V3 RG100V3 516
533mx2ads MACH_MX2ADS MX2ADS 517
534pxa_kilo MACH_PXA_KILO PXA_KILO 518
535ixp4xx_eagle MACH_IXP4XX_EAGLE IXP4XX_EAGLE 519
536tosa MACH_TOSA TOSA 520 119tosa MACH_TOSA TOSA 520
537mb2520f MACH_MB2520F MB2520F 521
538emc1000 MACH_EMC1000 EMC1000 522
539tidsc25 MACH_TIDSC25 TIDSC25 523
540akcpmxl MACH_AKCPMXL AKCPMXL 524
541av3xx MACH_AV3XX AV3XX 525
542avila MACH_AVILA AVILA 526 120avila MACH_AVILA AVILA 526
543pxa_mpm10 MACH_PXA_MPM10 PXA_MPM10 527
544pxa_kyanite MACH_PXA_KYANITE PXA_KYANITE 528
545sgold MACH_SGOLD SGOLD 529
546oscar MACH_OSCAR OSCAR 530
547epxa4usb2 MACH_EPXA4USB2 EPXA4USB2 531
548xsengine MACH_XSENGINE XSENGINE 532
549ip600 MACH_IP600 IP600 533
550mcan2 MACH_MCAN2 MCAN2 534
551ddi_blueridge MACH_DDI_BLUERIDGE DDI_BLUERIDGE 535
552skyminder MACH_SKYMINDER SKYMINDER 536
553lpd79520 MACH_LPD79520 LPD79520 537
554edb9302 MACH_EDB9302 EDB9302 538 121edb9302 MACH_EDB9302 EDB9302 538
555hw90340 MACH_HW90340 HW90340 539
556cip_box MACH_CIP_BOX CIP_BOX 540
557ivpn MACH_IVPN IVPN 541
558rsoc2 MACH_RSOC2 RSOC2 542
559husky MACH_HUSKY HUSKY 543 122husky MACH_HUSKY HUSKY 543
560boxer MACH_BOXER BOXER 544
561shepherd MACH_SHEPHERD SHEPHERD 545 123shepherd MACH_SHEPHERD SHEPHERD 545
562aml42800aa MACH_AML42800AA AML42800AA 546
563lpc2294 MACH_LPC2294 LPC2294 548
564switchgrass MACH_SWITCHGRASS SWITCHGRASS 549
565ens_cmu MACH_ENS_CMU ENS_CMU 550
566mm6_sdb MACH_MM6_SDB MM6_SDB 551
567saturn MACH_SATURN SATURN 552
568i30030evb MACH_I30030EVB I30030EVB 553
569mxc27530evb MACH_MXC27530EVB MXC27530EVB 554
570smdk2800 MACH_SMDK2800 SMDK2800 555
571mtwilson MACH_MTWILSON MTWILSON 556
572ziti MACH_ZITI ZITI 557
573grandfather MACH_GRANDFATHER GRANDFATHER 558
574tengine MACH_TENGINE TENGINE 559
575s3c2460 MACH_S3C2460 S3C2460 560
576pdm MACH_PDM PDM 561
577h4700 MACH_H4700 H4700 562 124h4700 MACH_H4700 H4700 562
578h6300 MACH_H6300 H6300 563
579rz1700 MACH_RZ1700 RZ1700 564
580a716 MACH_A716 A716 565
581estk2440a MACH_ESTK2440A ESTK2440A 566
582atwixp425 MACH_ATWIXP425 ATWIXP425 567
583csb336 MACH_CSB336 CSB336 568
584rirm2 MACH_RIRM2 RIRM2 569
585cx23518 MACH_CX23518 CX23518 570
586cx2351x MACH_CX2351X CX2351X 571
587computime MACH_COMPUTIME COMPUTIME 572
588izarus MACH_IZARUS IZARUS 573
589pxa_rts MACH_RTS RTS 574
590se5100 MACH_SE5100 SE5100 575
591s3c2510 MACH_S3C2510 S3C2510 576
592csb437tl MACH_CSB437TL CSB437TL 577
593slauson MACH_SLAUSON SLAUSON 578
594pearlriver MACH_PEARLRIVER PEARLRIVER 579
595tdc_p210 MACH_TDC_P210 TDC_P210 580
596sg580 MACH_SG580 SG580 581
597wrsbcarm7 MACH_WRSBCARM7 WRSBCARM7 582
598ipd MACH_IPD IPD 583
599pxa_dnp2110 MACH_PXA_DNP2110 PXA_DNP2110 584
600xaeniax MACH_XAENIAX XAENIAX 585
601somn4250 MACH_SOMN4250 SOMN4250 586
602pleb2 MACH_PLEB2 PLEB2 587
603cornwallis MACH_CORNWALLIS CORNWALLIS 588
604gurney_drv MACH_GURNEY_DRV GURNEY_DRV 589
605chaffee MACH_CHAFFEE CHAFFEE 590
606rms101 MACH_RMS101 RMS101 591
607rx3715 MACH_RX3715 RX3715 592 125rx3715 MACH_RX3715 RX3715 592
608swift MACH_SWIFT SWIFT 593
609roverp7 MACH_ROVERP7 ROVERP7 594
610pr818s MACH_PR818S PR818S 595
611trxpro MACH_TRXPRO TRXPRO 596
612nslu2 MACH_NSLU2 NSLU2 597 126nslu2 MACH_NSLU2 NSLU2 597
613e400 MACH_E400 E400 598 127e400 MACH_E400 E400 598
614trab MACH_TRAB TRAB 599
615cmc_pu2 MACH_CMC_PU2 CMC_PU2 600
616fulcrum MACH_FULCRUM FULCRUM 601
617netgate42x MACH_NETGATE42X NETGATE42X 602
618str710 MACH_STR710 STR710 603
619ixdpg425 MACH_IXDPG425 IXDPG425 604 128ixdpg425 MACH_IXDPG425 IXDPG425 604
620tomtomgo MACH_TOMTOMGO TOMTOMGO 605
621versatile_ab MACH_VERSATILE_AB VERSATILE_AB 606 129versatile_ab MACH_VERSATILE_AB VERSATILE_AB 606
622edb9307 MACH_EDB9307 EDB9307 607 130edb9307 MACH_EDB9307 EDB9307 607
623sg565 MACH_SG565 SG565 608
624lpd79524 MACH_LPD79524 LPD79524 609
625lpd79525 MACH_LPD79525 LPD79525 610
626rms100 MACH_RMS100 RMS100 611
627kb9200 MACH_KB9200 KB9200 612 131kb9200 MACH_KB9200 KB9200 612
628sx1 MACH_SX1 SX1 613 132sx1 MACH_SX1 SX1 613
629hms39c7092 MACH_HMS39C7092 HMS39C7092 614
630armadillo MACH_ARMADILLO ARMADILLO 615
631ipcu MACH_IPCU IPCU 616
632loox720 MACH_LOOX720 LOOX720 617
633ixdp465 MACH_IXDP465 IXDP465 618 133ixdp465 MACH_IXDP465 IXDP465 618
634ixdp2351 MACH_IXDP2351 IXDP2351 619 134ixdp2351 MACH_IXDP2351 IXDP2351 619
635adsvix MACH_ADSVIX ADSVIX 620
636dm270 MACH_DM270 DM270 621
637socltplus MACH_SOCLTPLUS SOCLTPLUS 622
638ecia MACH_ECIA ECIA 623
639cm4008 MACH_CM4008 CM4008 624
640p2001 MACH_P2001 P2001 625
641twister MACH_TWISTER TWISTER 626
642mudshark MACH_MUDSHARK MUDSHARK 627
643hb2 MACH_HB2 HB2 628
644iq80332 MACH_IQ80332 IQ80332 629 135iq80332 MACH_IQ80332 IQ80332 629
645sendt MACH_SENDT SENDT 630
646mx2jazz MACH_MX2JAZZ MX2JAZZ 631
647multiio MACH_MULTIIO MULTIIO 632
648hrdisplay MACH_HRDISPLAY HRDISPLAY 633
649mxc27530ads MACH_MXC27530ADS MXC27530ADS 634
650trizeps3 MACH_TRIZEPS3 TRIZEPS3 635
651zefeerdza MACH_ZEFEERDZA ZEFEERDZA 636
652zefeerdzb MACH_ZEFEERDZB ZEFEERDZB 637
653zefeerdzg MACH_ZEFEERDZG ZEFEERDZG 638
654zefeerdzn MACH_ZEFEERDZN ZEFEERDZN 639
655zefeerdzq MACH_ZEFEERDZQ ZEFEERDZQ 640
656gtwx5715 MACH_GTWX5715 GTWX5715 641 136gtwx5715 MACH_GTWX5715 GTWX5715 641
657astro_jack MACH_ASTRO_JACK ASTRO_JACK 643
658tip03 MACH_TIP03 TIP03 644
659a9200ec MACH_A9200EC A9200EC 645
660pnx0105 MACH_PNX0105 PNX0105 646
661adcpoecpu MACH_ADCPOECPU ADCPOECPU 647
662csb637 MACH_CSB637 CSB637 648 137csb637 MACH_CSB637 CSB637 648
663mb9200 MACH_MB9200 MB9200 650
664kulun MACH_KULUN KULUN 651
665snapper MACH_SNAPPER SNAPPER 652
666optima MACH_OPTIMA OPTIMA 653
667dlhsbc MACH_DLHSBC DLHSBC 654
668x30 MACH_X30 X30 655
669n30 MACH_N30 N30 656 138n30 MACH_N30 N30 656
670manga_ks8695 MACH_MANGA_KS8695 MANGA_KS8695 657
671ajax MACH_AJAX AJAX 658
672nec_mp900 MACH_NEC_MP900 NEC_MP900 659 139nec_mp900 MACH_NEC_MP900 NEC_MP900 659
673vvtk1000 MACH_VVTK1000 VVTK1000 661
674kafa MACH_KAFA KAFA 662 140kafa MACH_KAFA KAFA 662
675vvtk3000 MACH_VVTK3000 VVTK3000 663
676pimx1 MACH_PIMX1 PIMX1 664
677ollie MACH_OLLIE OLLIE 665
678skymax MACH_SKYMAX SKYMAX 666
679jazz MACH_JAZZ JAZZ 667
680tel_t3 MACH_TEL_T3 TEL_T3 668
681aisino_fcr255 MACH_AISINO_FCR255 AISINO_FCR255 669
682btweb MACH_BTWEB BTWEB 670
683dbg_lh79520 MACH_DBG_LH79520 DBG_LH79520 671
684cm41xx MACH_CM41XX CM41XX 672
685ts72xx MACH_TS72XX TS72XX 673 141ts72xx MACH_TS72XX TS72XX 673
686nggpxa MACH_NGGPXA NGGPXA 674
687csb535 MACH_CSB535 CSB535 675
688csb536 MACH_CSB536 CSB536 676
689pxa_trakpod MACH_PXA_TRAKPOD PXA_TRAKPOD 677
690praxis MACH_PRAXIS PRAXIS 678
691lh75411 MACH_LH75411 LH75411 679
692otom MACH_OTOM OTOM 680 142otom MACH_OTOM OTOM 680
693nexcoder_2440 MACH_NEXCODER_2440 NEXCODER_2440 681 143nexcoder_2440 MACH_NEXCODER_2440 NEXCODER_2440 681
694loox410 MACH_LOOX410 LOOX410 682
695westlake MACH_WESTLAKE WESTLAKE 683
696nsb MACH_NSB NSB 684
697esl_sarva_stn MACH_ESL_SARVA_STN ESL_SARVA_STN 685
698esl_sarva_tft MACH_ESL_SARVA_TFT ESL_SARVA_TFT 686
699esl_sarva_iad MACH_ESL_SARVA_IAD ESL_SARVA_IAD 687
700esl_sarva_acc MACH_ESL_SARVA_ACC ESL_SARVA_ACC 688
701typhoon MACH_TYPHOON TYPHOON 689
702cnav MACH_CNAV CNAV 690
703a730 MACH_A730 A730 691
704netstar MACH_NETSTAR NETSTAR 692
705supercon MACH_PHASEFALE_SUPERCON PHASEFALE_SUPERCON 693
706shiva1100 MACH_SHIVA1100 SHIVA1100 694
707etexsc MACH_ETEXSC ETEXSC 695
708ixdpg465 MACH_IXDPG465 IXDPG465 696
709a9m2410 MACH_A9M2410 A9M2410 697
710a9m2440 MACH_A9M2440 A9M2440 698
711a9m9750 MACH_A9M9750 A9M9750 699
712a9m9360 MACH_A9M9360 A9M9360 700
713unc90 MACH_UNC90 UNC90 701
714eco920 MACH_ECO920 ECO920 702 144eco920 MACH_ECO920 ECO920 702
715satview MACH_SATVIEW SATVIEW 703
716roadrunner MACH_ROADRUNNER ROADRUNNER 704 145roadrunner MACH_ROADRUNNER ROADRUNNER 704
717at91rm9200ek MACH_AT91RM9200EK AT91RM9200EK 705 146at91rm9200ek MACH_AT91RM9200EK AT91RM9200EK 705
718gp32 MACH_GP32 GP32 706
719gem MACH_GEM GEM 707
720i858 MACH_I858 I858 708
721hx2750 MACH_HX2750 HX2750 709
722mxc91131evb MACH_MXC91131EVB MXC91131EVB 710
723p700 MACH_P700 P700 711
724cpe MACH_CPE CPE 712
725spitz MACH_SPITZ SPITZ 713 147spitz MACH_SPITZ SPITZ 713
726nimbra340 MACH_NIMBRA340 NIMBRA340 714
727lpc22xx MACH_LPC22XX LPC22XX 715
728omap_comet3 MACH_COMET3 COMET3 716
729omap_comet4 MACH_COMET4 COMET4 717
730csb625 MACH_CSB625 CSB625 718
731fortunet2 MACH_FORTUNET2 FORTUNET2 719
732s5h2200 MACH_S5H2200 S5H2200 720
733optorm920 MACH_OPTORM920 OPTORM920 721
734adsbitsyxb MACH_ADSBITSYXB ADSBITSYXB 722
735adssphere MACH_ADSSPHERE ADSSPHERE 723 148adssphere MACH_ADSSPHERE ADSSPHERE 723
736adsportal MACH_ADSPORTAL ADSPORTAL 724
737ln2410sbc MACH_LN2410SBC LN2410SBC 725
738cb3rufc MACH_CB3RUFC CB3RUFC 726
739mp2usb MACH_MP2USB MP2USB 727
740ntnp425c MACH_NTNP425C NTNP425C 728
741colibri MACH_COLIBRI COLIBRI 729 149colibri MACH_COLIBRI COLIBRI 729
742pcm7220 MACH_PCM7220 PCM7220 730
743gateway7001 MACH_GATEWAY7001 GATEWAY7001 731 150gateway7001 MACH_GATEWAY7001 GATEWAY7001 731
744pcm027 MACH_PCM027 PCM027 732 151pcm027 MACH_PCM027 PCM027 732
745cmpxa MACH_CMPXA CMPXA 733
746anubis MACH_ANUBIS ANUBIS 734 152anubis MACH_ANUBIS ANUBIS 734
747ite8152 MACH_ITE8152 ITE8152 735
748lpc3xxx MACH_LPC3XXX LPC3XXX 736
749puppeteer MACH_PUPPETEER PUPPETEER 737
750e570 MACH_E570 E570 739
751x50 MACH_X50 X50 740
752recon MACH_RECON RECON 741
753xboardgp8 MACH_XBOARDGP8 XBOARDGP8 742
754fpic2 MACH_FPIC2 FPIC2 743
755akita MACH_AKITA AKITA 744 153akita MACH_AKITA AKITA 744
756a81 MACH_A81 A81 745
757svm_sc25x MACH_SVM_SC25X SVM_SC25X 746
758vt020 MACH_VADATECH020 VADATECH020 747
759tli MACH_TLI TLI 748
760edb9315lc MACH_EDB9315LC EDB9315LC 749
761passec MACH_PASSEC PASSEC 750
762ds_tiger MACH_DS_TIGER DS_TIGER 751
763e310 MACH_E310 E310 752
764e330 MACH_E330 E330 753 154e330 MACH_E330 E330 753
765rt3000 MACH_RT3000 RT3000 754
766nokia770 MACH_NOKIA770 NOKIA770 755 155nokia770 MACH_NOKIA770 NOKIA770 755
767pnx0106 MACH_PNX0106 PNX0106 756
768hx21xx MACH_HX21XX HX21XX 757
769faraday MACH_FARADAY FARADAY 758
770sbc9312 MACH_SBC9312 SBC9312 759
771batman MACH_BATMAN BATMAN 760
772jpd201 MACH_JPD201 JPD201 761
773mipsa MACH_MIPSA MIPSA 762
774kacom MACH_KACOM KACOM 763
775swarcocpu MACH_SWARCOCPU SWARCOCPU 764
776swarcodsl MACH_SWARCODSL SWARCODSL 765
777blueangel MACH_BLUEANGEL BLUEANGEL 766
778hairygrama MACH_HAIRYGRAMA HAIRYGRAMA 767
779banff MACH_BANFF BANFF 768
780carmeva MACH_CARMEVA CARMEVA 769 156carmeva MACH_CARMEVA CARMEVA 769
781sam255 MACH_SAM255 SAM255 770
782ppm10 MACH_PPM10 PPM10 771
783edb9315a MACH_EDB9315A EDB9315A 772 157edb9315a MACH_EDB9315A EDB9315A 772
784sunset MACH_SUNSET SUNSET 773
785stargate2 MACH_STARGATE2 STARGATE2 774 158stargate2 MACH_STARGATE2 STARGATE2 774
786intelmote2 MACH_INTELMOTE2 INTELMOTE2 775 159intelmote2 MACH_INTELMOTE2 INTELMOTE2 775
787trizeps4 MACH_TRIZEPS4 TRIZEPS4 776 160trizeps4 MACH_TRIZEPS4 TRIZEPS4 776
788mainstone2 MACH_MAINSTONE2 MAINSTONE2 777
789ez_ixp42x MACH_EZ_IXP42X EZ_IXP42X 778
790tapwave_zodiac MACH_TAPWAVE_ZODIAC TAPWAVE_ZODIAC 779
791universalmeter MACH_UNIVERSALMETER UNIVERSALMETER 780
792hicoarm9 MACH_HICOARM9 HICOARM9 781
793pnx4008 MACH_PNX4008 PNX4008 782 161pnx4008 MACH_PNX4008 PNX4008 782
794kws6000 MACH_KWS6000 KWS6000 783
795portux920t MACH_PORTUX920T PORTUX920T 784
796ez_x5 MACH_EZ_X5 EZ_X5 785
797omap_rudolph MACH_OMAP_RUDOLPH OMAP_RUDOLPH 786
798cpuat91 MACH_CPUAT91 CPUAT91 787 162cpuat91 MACH_CPUAT91 CPUAT91 787
799rea9200 MACH_REA9200 REA9200 788
800acts_pune_sa1110 MACH_ACTS_PUNE_SA1110 ACTS_PUNE_SA1110 789
801ixp425 MACH_IXP425 IXP425 790
802i30030ads MACH_I30030ADS I30030ADS 791
803perch MACH_PERCH PERCH 792
804eis05r1 MACH_EIS05R1 EIS05R1 793
805pepperpad MACH_PEPPERPAD PEPPERPAD 794
806sb3010 MACH_SB3010 SB3010 795
807rm9200 MACH_RM9200 RM9200 796
808dma03 MACH_DMA03 DMA03 797
809road_s101 MACH_ROAD_S101 ROAD_S101 798
810iq81340sc MACH_IQ81340SC IQ81340SC 799 163iq81340sc MACH_IQ81340SC IQ81340SC 799
811iq_nextgen_b MACH_IQ_NEXTGEN_B IQ_NEXTGEN_B 800
812iq81340mc MACH_IQ81340MC IQ81340MC 801 164iq81340mc MACH_IQ81340MC IQ81340MC 801
813iq_nextgen_d MACH_IQ_NEXTGEN_D IQ_NEXTGEN_D 802
814iq_nextgen_e MACH_IQ_NEXTGEN_E IQ_NEXTGEN_E 803
815mallow_at91 MACH_MALLOW_AT91 MALLOW_AT91 804
816cybertracker_i MACH_CYBERTRACKER_I CYBERTRACKER_I 805
817gesbc931x MACH_GESBC931X GESBC931X 806
818centipad MACH_CENTIPAD CENTIPAD 807
819armsoc MACH_ARMSOC ARMSOC 808
820se4200 MACH_SE4200 SE4200 809
821ems197a MACH_EMS197A EMS197A 810
822micro9 MACH_MICRO9 MICRO9 811 165micro9 MACH_MICRO9 MICRO9 811
823micro9l MACH_MICRO9L MICRO9L 812 166micro9l MACH_MICRO9L MICRO9L 812
824uc5471dsp MACH_UC5471DSP UC5471DSP 813
825sj5471eng MACH_SJ5471ENG SJ5471ENG 814
826none MACH_CMPXA26X CMPXA26X 815
827nc1 MACH_NC NC 816
828omap_palmte MACH_OMAP_PALMTE OMAP_PALMTE 817 167omap_palmte MACH_OMAP_PALMTE OMAP_PALMTE 817
829ajax52x MACH_AJAX52X AJAX52X 818
830siriustar MACH_SIRIUSTAR SIRIUSTAR 819
831iodata_hdlg MACH_IODATA_HDLG IODATA_HDLG 820
832at91rm9200utl MACH_AT91RM9200UTL AT91RM9200UTL 821
833biosafe MACH_BIOSAFE BIOSAFE 822
834mp1000 MACH_MP1000 MP1000 823
835parsy MACH_PARSY PARSY 824
836ccxp270 MACH_CCXP CCXP 825
837omap_gsample MACH_OMAP_GSAMPLE OMAP_GSAMPLE 826
838realview_eb MACH_REALVIEW_EB REALVIEW_EB 827 168realview_eb MACH_REALVIEW_EB REALVIEW_EB 827
839samoa MACH_SAMOA SAMOA 828
840palmt3 MACH_PALMT3 PALMT3 829
841i878 MACH_I878 I878 830
842borzoi MACH_BORZOI BORZOI 831 169borzoi MACH_BORZOI BORZOI 831
843gecko MACH_GECKO GECKO 832
844ds101 MACH_DS101 DS101 833
845omap_palmtt2 MACH_OMAP_PALMTT2 OMAP_PALMTT2 834
846palmld MACH_PALMLD PALMLD 835 170palmld MACH_PALMLD PALMLD 835
847cc9c MACH_CC9C CC9C 836
848sbc1670 MACH_SBC1670 SBC1670 837
849ixdp28x5 MACH_IXDP28X5 IXDP28X5 838 171ixdp28x5 MACH_IXDP28X5 IXDP28X5 838
850omap_palmtt MACH_OMAP_PALMTT OMAP_PALMTT 839 172omap_palmtt MACH_OMAP_PALMTT OMAP_PALMTT 839
851ml696k MACH_ML696K ML696K 840
852arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841 173arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841
853osiris MACH_OSIRIS OSIRIS 842 174osiris MACH_OSIRIS OSIRIS 842
854maestro MACH_MAESTRO MAESTRO 843
855palmte2 MACH_PALMTE2 PALMTE2 844 175palmte2 MACH_PALMTE2 PALMTE2 844
856ixbbm MACH_IXBBM IXBBM 845
857mx27ads MACH_MX27ADS MX27ADS 846 176mx27ads MACH_MX27ADS MX27ADS 846
858ax8004 MACH_AX8004 AX8004 847
859at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848 177at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848
860loft MACH_LOFT LOFT 849 178loft MACH_LOFT LOFT 849
861magpie MACH_MAGPIE MAGPIE 850
862mx21ads MACH_MX21ADS MX21ADS 851 179mx21ads MACH_MX21ADS MX21ADS 851
863mb87m3400 MACH_MB87M3400 MB87M3400 852
864mguard_delta MACH_MGUARD_DELTA MGUARD_DELTA 853
865davinci_dvdp MACH_DAVINCI_DVDP DAVINCI_DVDP 854
866htcuniversal MACH_HTCUNIVERSAL HTCUNIVERSAL 855
867tpad MACH_TPAD TPAD 856
868roverp3 MACH_ROVERP3 ROVERP3 857
869jornada928 MACH_JORNADA928 JORNADA928 858
870mv88fxx81 MACH_MV88FXX81 MV88FXX81 859
871stmp36xx MACH_STMP36XX STMP36XX 860
872sxni79524 MACH_SXNI79524 SXNI79524 861
873ams_delta MACH_AMS_DELTA AMS_DELTA 862 180ams_delta MACH_AMS_DELTA AMS_DELTA 862
874uranium MACH_URANIUM URANIUM 863
875ucon MACH_UCON UCON 864
876nas100d MACH_NAS100D NAS100D 865 181nas100d MACH_NAS100D NAS100D 865
877l083 MACH_L083_1000 L083_1000 866
878ezx MACH_EZX EZX 867
879pnx5220 MACH_PNX5220 PNX5220 868
880butte MACH_BUTTE BUTTE 869
881srm2 MACH_SRM2 SRM2 870
882dsbr MACH_DSBR DSBR 871
883crystalball MACH_CRYSTALBALL CRYSTALBALL 872
884tinypxa27x MACH_TINYPXA27X TINYPXA27X 873
885herbie MACH_HERBIE HERBIE 874
886magician MACH_MAGICIAN MAGICIAN 875 182magician MACH_MAGICIAN MAGICIAN 875
887cm4002 MACH_CM4002 CM4002 876
888b4 MACH_B4 B4 877
889maui MACH_MAUI MAUI 878
890cybertracker_g MACH_CYBERTRACKER_G CYBERTRACKER_G 879
891nxdkn MACH_NXDKN NXDKN 880 183nxdkn MACH_NXDKN NXDKN 880
892mio8390 MACH_MIO8390 MIO8390 881
893omi_board MACH_OMI_BOARD OMI_BOARD 882
894mx21civ MACH_MX21CIV MX21CIV 883
895mahi_cdac MACH_MAHI_CDAC MAHI_CDAC 884
896palmtx MACH_PALMTX PALMTX 885 184palmtx MACH_PALMTX PALMTX 885
897s3c2413 MACH_S3C2413 S3C2413 887 185s3c2413 MACH_S3C2413 S3C2413 887
898samsys_ep0 MACH_SAMSYS_EP0 SAMSYS_EP0 888
899wg302v1 MACH_WG302V1 WG302V1 889
900wg302v2 MACH_WG302V2 WG302V2 890 186wg302v2 MACH_WG302V2 WG302V2 890
901eb42x MACH_EB42X EB42X 891
902iq331es MACH_IQ331ES IQ331ES 892
903cosydsp MACH_COSYDSP COSYDSP 893
904uplat7d_proto MACH_UPLAT7D UPLAT7D 894
905ptdavinci MACH_PTDAVINCI PTDAVINCI 895
906mbus MACH_MBUS MBUS 896
907nadia2vb MACH_NADIA2VB NADIA2VB 897
908r1000 MACH_R1000 R1000 898
909hw90250 MACH_HW90250 HW90250 899
910omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900 187omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900
911davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901 188davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901
912omap_tornado MACH_OMAP_TORNADO OMAP_TORNADO 902
913olocreek MACH_OLOCREEK OLOCREEK 903
914palmz72 MACH_PALMZ72 PALMZ72 904 189palmz72 MACH_PALMZ72 PALMZ72 904
915nxdb500 MACH_NXDB500 NXDB500 905 190nxdb500 MACH_NXDB500 NXDB500 905
916apf9328 MACH_APF9328 APF9328 906
917omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
918omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
919treo650 MACH_TREO650 TREO650 909
920acumen MACH_ACUMEN ACUMEN 910
921xp100 MACH_XP100 XP100 911
922fs2410 MACH_FS2410 FS2410 912
923pxa270_cerf MACH_PXA270_CERF PXA270_CERF 913
924sq2ftlpalm MACH_SQ2FTLPALM SQ2FTLPALM 914
925bsemserver MACH_BSEMSERVER BSEMSERVER 915
926netclient MACH_NETCLIENT NETCLIENT 916
927palmt5 MACH_PALMT5 PALMT5 917 191palmt5 MACH_PALMT5 PALMT5 917
928palmtc MACH_PALMTC PALMTC 918 192palmtc MACH_PALMTC PALMTC 918
929omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 193omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919
930mxc30030evb MACH_MXC30030EVB MXC30030EVB 920
931rea_cpu2 MACH_REA_2D REA_2D 921
932eti3e524 MACH_TI3E524 TI3E524 922
933ateb9200 MACH_ATEB9200 ATEB9200 923 194ateb9200 MACH_ATEB9200 ATEB9200 923
934auckland MACH_AUCKLAND AUCKLAND 924
935ak3220m MACH_AK3320M AK3320M 925
936duramax MACH_DURAMAX DURAMAX 926
937n35 MACH_N35 N35 927 195n35 MACH_N35 N35 927
938pronghorn MACH_PRONGHORN PRONGHORN 928
939fundy MACH_FUNDY FUNDY 929
940logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930 196logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930
941cpu777 MACH_CPU777 CPU777 931
942simicon9201 MACH_SIMICON9201 SIMICON9201 932
943leap2_hpm MACH_LEAP2_HPM LEAP2_HPM 933
944cm922txa10 MACH_CM922TXA10 CM922TXA10 934
945sandgate MACH_PXA PXA 935
946sandgate2 MACH_SANDGATE2 SANDGATE2 936
947sandgate2g MACH_SANDGATE2G SANDGATE2G 937
948sandgate2p MACH_SANDGATE2P SANDGATE2P 938
949fred_jack MACH_FRED_JACK FRED_JACK 939
950ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940
951nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 197nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941
952netdcu8 MACH_NETDCU8 NETDCU8 942
953ng_fvx538 MACH_NG_FVX538 NG_FVX538 944
954ng_fvs338 MACH_NG_FVS338 NG_FVS338 945
955pnx4103 MACH_PNX4103 PNX4103 946
956hesdb MACH_HESDB HESDB 947
957xsilo MACH_XSILO XSILO 948
958espresso MACH_ESPRESSO ESPRESSO 949 198espresso MACH_ESPRESSO ESPRESSO 949
959emlc MACH_EMLC EMLC 950
960sisteron MACH_SISTERON SISTERON 951
961rx1950 MACH_RX1950 RX1950 952 199rx1950 MACH_RX1950 RX1950 952
962tsc_venus MACH_TSC_VENUS TSC_VENUS 953
963ds101j MACH_DS101J DS101J 954
964mxc30030ads MACH_MXC30030ADS MXC30030ADS 955
965fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956
966dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957
967gesbc9312 MACH_GESBC9312 GESBC9312 958 200gesbc9312 MACH_GESBC9312 GESBC9312 958
968htcapache MACH_HTCAPACHE HTCAPACHE 959
969ixdp435 MACH_IXDP435 IXDP435 960
970catprovt100 MACH_CATPROVT100 CATPROVT100 961
971picotux1xx MACH_PICOTUX1XX PICOTUX1XX 962
972picotux2xx MACH_PICOTUX2XX PICOTUX2XX 963 201picotux2xx MACH_PICOTUX2XX PICOTUX2XX 963
973dsmg600 MACH_DSMG600 DSMG600 964 202dsmg600 MACH_DSMG600 DSMG600 964
974empc2 MACH_EMPC2 EMPC2 965
975ventura MACH_VENTURA VENTURA 966
976phidget_sbc MACH_PHIDGET_SBC PHIDGET_SBC 967
977ij3k MACH_IJ3K IJ3K 968
978pisgah MACH_PISGAH PISGAH 969
979omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970 203omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970
980sg720 MACH_SG720 SG720 971
981redfox MACH_REDFOX REDFOX 972
982mysh_ep9315_1 MACH_MYSH_EP9315_1 MYSH_EP9315_1 973
983tpf106 MACH_TPF106 TPF106 974
984at91rm9200kg MACH_AT91RM9200KG AT91RM9200KG 975
985rcmt2 MACH_SLEDB SLEDB 976
986ontrack MACH_ONTRACK ONTRACK 977
987pm1200 MACH_PM1200 PM1200 978
988ess24562 MACH_ESS24XXX ESS24XXX 979
989coremp7 MACH_COREMP7 COREMP7 980
990nexcoder_6446 MACH_NEXCODER_6446 NEXCODER_6446 981
991stvc8380 MACH_STVC8380 STVC8380 982
992teklynx MACH_TEKLYNX TEKLYNX 983
993carbonado MACH_CARBONADO CARBONADO 984
994sysmos_mp730 MACH_SYSMOS_MP730 SYSMOS_MP730 985
995snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986 204snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986
996pgigim MACH_PGIGIM PGIGIM 987
997ptx9160p2 MACH_PTX9160P2 PTX9160P2 988
998dcore1 MACH_DCORE1 DCORE1 989
999victorpxa MACH_VICTORPXA VICTORPXA 990
1000mx2dtb MACH_MX2DTB MX2DTB 991
1001pxa_irex_er0100 MACH_PXA_IREX_ER0100 PXA_IREX_ER0100 992
1002omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993 205omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993
1003bartec_deg MACH_BARTEC_DEG BARTEC_DEG 994
1004hw50251 MACH_HW50251 HW50251 995
1005ibox MACH_IBOX IBOX 996
1006atlaslh7a404 MACH_ATLASLH7A404 ATLASLH7A404 997
1007pt2026 MACH_PT2026 PT2026 998
1008htcalpine MACH_HTCALPINE HTCALPINE 999
1009bartec_vtu MACH_BARTEC_VTU BARTEC_VTU 1000
1010vcoreii MACH_VCOREII VCOREII 1001
1011pdnb3 MACH_PDNB3 PDNB3 1002
1012htcbeetles MACH_HTCBEETLES HTCBEETLES 1003
1013s3c6400 MACH_S3C6400 S3C6400 1004
1014s3c2443 MACH_S3C2443 S3C2443 1005
1015omap_ldk MACH_OMAP_LDK OMAP_LDK 1006
1016smdk2460 MACH_SMDK2460 SMDK2460 1007
1017smdk2440 MACH_SMDK2440 SMDK2440 1008
1018smdk2412 MACH_SMDK2412 SMDK2412 1009 206smdk2412 MACH_SMDK2412 SMDK2412 1009
1019webbox MACH_WEBBOX WEBBOX 1010
1020cwwndp MACH_CWWNDP CWWNDP 1011
1021i839 MACH_DRAGON DRAGON 1012
1022opendo_cpu_board MACH_OPENDO_CPU_BOARD OPENDO_CPU_BOARD 1013
1023ccm2200 MACH_CCM2200 CCM2200 1014
1024etwarm MACH_ETWARM ETWARM 1015
1025m93030 MACH_M93030 M93030 1016
1026cc7u MACH_CC7U CC7U 1017
1027mtt_ranger MACH_MTT_RANGER MTT_RANGER 1018
1028nexus MACH_NEXUS NEXUS 1019
1029desman MACH_DESMAN DESMAN 1020
1030bkde303 MACH_BKDE303 BKDE303 1021
1031smdk2413 MACH_SMDK2413 SMDK2413 1022 207smdk2413 MACH_SMDK2413 SMDK2413 1022
1032aml_m7200 MACH_AML_M7200 AML_M7200 1023
1033aml_m5900 MACH_AML_M5900 AML_M5900 1024 208aml_m5900 MACH_AML_M5900 AML_M5900 1024
1034sg640 MACH_SG640 SG640 1025
1035edg79524 MACH_EDG79524 EDG79524 1026
1036ai2410 MACH_AI2410 AI2410 1027
1037ixp465 MACH_IXP465 IXP465 1028
1038balloon3 MACH_BALLOON3 BALLOON3 1029 209balloon3 MACH_BALLOON3 BALLOON3 1029
1039heins MACH_HEINS HEINS 1030
1040mpluseva MACH_MPLUSEVA MPLUSEVA 1031
1041rt042 MACH_RT042 RT042 1032
1042cwiem MACH_CWIEM CWIEM 1033
1043cm_x270 MACH_CM_X270 CM_X270 1034
1044cm_x255 MACH_CM_X255 CM_X255 1035
1045esh_at91 MACH_ESH_AT91 ESH_AT91 1036
1046sandgate3 MACH_SANDGATE3 SANDGATE3 1037
1047primo MACH_PRIMO PRIMO 1038
1048gemstone MACH_GEMSTONE GEMSTONE 1039
1049pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040
1050sidewinder MACH_SIDEWINDER SIDEWINDER 1041
1051picomod1 MACH_PICOMOD1 PICOMOD1 1042
1052sg590 MACH_SG590 SG590 1043
1053akai9307 MACH_AKAI9307 AKAI9307 1044
1054fontaine MACH_FONTAINE FONTAINE 1045
1055wombat MACH_WOMBAT WOMBAT 1046
1056acq300 MACH_ACQ300 ACQ300 1047
1057mod272 MACH_MOD_270 MOD_270 1048
1058vmc_vc0820 MACH_VC0820 VC0820 1049
1059ani_aim MACH_ANI_AIM ANI_AIM 1050
1060jellyfish MACH_JELLYFISH JELLYFISH 1051
1061amanita MACH_AMANITA AMANITA 1052
1062vlink MACH_VLINK VLINK 1053
1063dexflex MACH_DEXFLEX DEXFLEX 1054
1064eigen_ttq MACH_EIGEN_TTQ EIGEN_TTQ 1055
1065arcom_titan MACH_ARCOM_TITAN ARCOM_TITAN 1056
1066tabla MACH_TABLA TABLA 1057
1067mdirac3 MACH_MDIRAC3 MDIRAC3 1058
1068mrhfbp2 MACH_MRHFBP2 MRHFBP2 1059
1069at91rm9200rb MACH_AT91RM9200RB AT91RM9200RB 1060
1070ani_apm MACH_ANI_APM ANI_APM 1061
1071ella1 MACH_ELLA1 ELLA1 1062
1072inhand_pxa27x MACH_INHAND_PXA27X INHAND_PXA27X 1063
1073inhand_pxa25x MACH_INHAND_PXA25X INHAND_PXA25X 1064
1074empos_xm MACH_EMPOS_XM EMPOS_XM 1065
1075empos MACH_EMPOS EMPOS 1066
1076empos_tiny MACH_EMPOS_TINY EMPOS_TINY 1067
1077empos_sm MACH_EMPOS_SM EMPOS_SM 1068
1078egret MACH_EGRET EGRET 1069
1079ostrich MACH_OSTRICH OSTRICH 1070
1080n50 MACH_N50 N50 1071
1081ecbat91 MACH_ECBAT91 ECBAT91 1072 210ecbat91 MACH_ECBAT91 ECBAT91 1072
1082stareast MACH_STAREAST STAREAST 1073
1083dspg_dw MACH_DSPG_DW DSPG_DW 1074
1084onearm MACH_ONEARM ONEARM 1075 211onearm MACH_ONEARM ONEARM 1075
1085mrg110_6 MACH_MRG110_6 MRG110_6 1076
1086wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077
1087xm_bulverde MACH_XM_BULVERDE XM_BULVERDE 1078
1088msm6100 MACH_MSM6100 MSM6100 1079
1089eti_b1 MACH_ETI_B1 ETI_B1 1080
1090za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081
1091bit2440 MACH_BIT2440 BIT2440 1082
1092nbi MACH_NBI NBI 1083
1093smdk2443 MACH_SMDK2443 SMDK2443 1084 212smdk2443 MACH_SMDK2443 SMDK2443 1084
1094vdavinci MACH_VDAVINCI VDAVINCI 1085
1095atc6 MACH_ATC6 ATC6 1086
1096multmdw MACH_MULTMDW MULTMDW 1087
1097mba2440 MACH_MBA2440 MBA2440 1088
1098ecsd MACH_ECSD ECSD 1089
1099palmz31 MACH_PALMZ31 PALMZ31 1090
1100fsg MACH_FSG FSG 1091 213fsg MACH_FSG FSG 1091
1101razor101 MACH_RAZOR101 RAZOR101 1092
1102opera_tdm MACH_OPERA_TDM OPERA_TDM 1093
1103comcerto MACH_COMCERTO COMCERTO 1094
1104tb0319 MACH_TB0319 TB0319 1095
1105kws8000 MACH_KWS8000 KWS8000 1096
1106b2 MACH_B2 B2 1097
1107lcl54 MACH_LCL54 LCL54 1098
1108at91sam9260ek MACH_AT91SAM9260EK AT91SAM9260EK 1099 214at91sam9260ek MACH_AT91SAM9260EK AT91SAM9260EK 1099
1109glantank MACH_GLANTANK GLANTANK 1100 215glantank MACH_GLANTANK GLANTANK 1100
1110n2100 MACH_N2100 N2100 1101 216n2100 MACH_N2100 N2100 1101
1111n4100 MACH_N4100 N4100 1102
1112rsc4 MACH_VERTICAL_RSC4 VERTICAL_RSC4 1103
1113sg8100 MACH_SG8100 SG8100 1104
1114im42xx MACH_IM42XX IM42XX 1105
1115ftxx MACH_FTXX FTXX 1106
1116lwfusion MACH_LWFUSION LWFUSION 1107
1117qt2410 MACH_QT2410 QT2410 1108 217qt2410 MACH_QT2410 QT2410 1108
1118kixrp435 MACH_KIXRP435 KIXRP435 1109 218kixrp435 MACH_KIXRP435 KIXRP435 1109
1119ccw9c MACH_CCW9C CCW9C 1110
1120dabhs MACH_DABHS DABHS 1111
1121gzmx MACH_GZMX GZMX 1112
1122ipnw100ap MACH_IPNW100AP IPNW100AP 1113
1123cc9p9360dev MACH_CC9P9360DEV CC9P9360DEV 1114 219cc9p9360dev MACH_CC9P9360DEV CC9P9360DEV 1114
1124cc9p9750dev MACH_CC9P9750DEV CC9P9750DEV 1115
1125cc9p9360val MACH_CC9P9360VAL CC9P9360VAL 1116
1126cc9p9750val MACH_CC9P9750VAL CC9P9750VAL 1117
1127nx70v MACH_NX70V NX70V 1118
1128at91rm9200df MACH_AT91RM9200DF AT91RM9200DF 1119
1129se_pilot2 MACH_SE_PILOT2 SE_PILOT2 1120
1130mtcn_t800 MACH_MTCN_T800 MTCN_T800 1121
1131vcmx212 MACH_VCMX212 VCMX212 1122
1132lynx MACH_LYNX LYNX 1123
1133at91sam9260id MACH_AT91SAM9260ID AT91SAM9260ID 1124
1134hw86052 MACH_HW86052 HW86052 1125
1135pilz_pmi3 MACH_PILZ_PMI3 PILZ_PMI3 1126
1136edb9302a MACH_EDB9302A EDB9302A 1127 220edb9302a MACH_EDB9302A EDB9302A 1127
1137edb9307a MACH_EDB9307A EDB9307A 1128 221edb9307a MACH_EDB9307A EDB9307A 1128
1138ct_dfs MACH_CT_DFS CT_DFS 1129
1139pilz_pmi4 MACH_PILZ_PMI4 PILZ_PMI4 1130
1140xceednp_ixp MACH_XCEEDNP_IXP XCEEDNP_IXP 1131
1141smdk2442b MACH_SMDK2442B SMDK2442B 1132
1142xnode MACH_XNODE XNODE 1133
1143aidx270 MACH_AIDX270 AIDX270 1134
1144rema MACH_REMA REMA 1135
1145bps1000 MACH_BPS1000 BPS1000 1136
1146hw90350 MACH_HW90350 HW90350 1137
1147omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138 222omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138
1148bluetouch MACH_BLUETOUCH BLUETOUCH 1139
1149vstms MACH_VSTMS VSTMS 1140 223vstms MACH_VSTMS VSTMS 1140
1150xsbase270 MACH_XSBASE270 XSBASE270 1141
1151at91sam9260ek_cn MACH_AT91SAM9260EK_CN AT91SAM9260EK_CN 1142
1152adsturboxb MACH_ADSTURBOXB ADSTURBOXB 1143
1153oti4110 MACH_OTI4110 OTI4110 1144
1154hme_pxa MACH_HME_PXA HME_PXA 1145
1155deisterdca MACH_DEISTERDCA DEISTERDCA 1146
1156ces_ssem2 MACH_CES_SSEM2 CES_SSEM2 1147
1157ces_mtr MACH_CES_MTR CES_MTR 1148
1158tds_avng_sbc MACH_TDS_AVNG_SBC TDS_AVNG_SBC 1149
1159everest MACH_EVEREST EVEREST 1150
1160pnx4010 MACH_PNX4010 PNX4010 1151
1161oxnas MACH_OXNAS OXNAS 1152
1162fiori MACH_FIORI FIORI 1153
1163ml1200 MACH_ML1200 ML1200 1154
1164pecos MACH_PECOS PECOS 1155
1165nb2xxx MACH_NB2XXX NB2XXX 1156
1166hw6900 MACH_HW6900 HW6900 1157
1167cdcs_quoll MACH_CDCS_QUOLL CDCS_QUOLL 1158
1168quicksilver MACH_QUICKSILVER QUICKSILVER 1159
1169uplat926 MACH_UPLAT926 UPLAT926 1160
1170dep2410_dep2410 MACH_DEP2410_THOMAS DEP2410_THOMAS 1161
1171dtk2410 MACH_DTK2410 DTK2410 1162
1172chili MACH_CHILI CHILI 1163
1173demeter MACH_DEMETER DEMETER 1164
1174dionysus MACH_DIONYSUS DIONYSUS 1165
1175as352x MACH_AS352X AS352X 1166
1176service MACH_SERVICE SERVICE 1167
1177cs_e9301 MACH_CS_E9301 CS_E9301 1168
1178micro9m MACH_MICRO9M MICRO9M 1169 224micro9m MACH_MICRO9M MICRO9M 1169
1179ia_mospck MACH_IA_MOSPCK IA_MOSPCK 1170
1180ql201b MACH_QL201B QL201B 1171
1181bbm MACH_BBM BBM 1174
1182exxx MACH_EXXX EXXX 1175
1183wma11b MACH_WMA11B WMA11B 1176
1184pelco_atlas MACH_PELCO_ATLAS PELCO_ATLAS 1177
1185g500 MACH_G500 G500 1178
1186bug MACH_BUG BUG 1179 225bug MACH_BUG BUG 1179
1187mx33ads MACH_MX33ADS MX33ADS 1180
1188chub MACH_CHUB CHUB 1181
1189neo1973_gta01 MACH_NEO1973_GTA01 NEO1973_GTA01 1182
1190w90n740 MACH_W90N740 W90N740 1183
1191medallion_sa2410 MACH_MEDALLION_SA2410 MEDALLION_SA2410 1184
1192ia_cpu_9200_2 MACH_IA_CPU_9200_2 IA_CPU_9200_2 1185
1193dimmrm9200 MACH_DIMMRM9200 DIMMRM9200 1186
1194pm9261 MACH_PM9261 PM9261 1187
1195ml7304 MACH_ML7304 ML7304 1189
1196ucp250 MACH_UCP250 UCP250 1190
1197intboard MACH_INTBOARD INTBOARD 1191
1198gulfstream MACH_GULFSTREAM GULFSTREAM 1192
1199labquest MACH_LABQUEST LABQUEST 1193
1200vcmx313 MACH_VCMX313 VCMX313 1194
1201urg200 MACH_URG200 URG200 1195
1202cpux255lcdnet MACH_CPUX255LCDNET CPUX255LCDNET 1196
1203netdcu9 MACH_NETDCU9 NETDCU9 1197
1204netdcu10 MACH_NETDCU10 NETDCU10 1198
1205dspg_dga MACH_DSPG_DGA DSPG_DGA 1199
1206dspg_dvw MACH_DSPG_DVW DSPG_DVW 1200
1207solos MACH_SOLOS SOLOS 1201
1208at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202 226at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202
1209osstbox MACH_OSSTBOX OSSTBOX 1203
1210kbat9261 MACH_KBAT9261 KBAT9261 1204
1211ct1100 MACH_CT1100 CT1100 1205
1212akcppxa MACH_AKCPPXA AKCPPXA 1206
1213ochaya1020 MACH_OCHAYA1020 OCHAYA1020 1207
1214hitrack MACH_HITRACK HITRACK 1208
1215syme1 MACH_SYME1 SYME1 1209
1216syhl1 MACH_SYHL1 SYHL1 1210
1217empca400 MACH_EMPCA400 EMPCA400 1211
1218em7210 MACH_EM7210 EM7210 1212 227em7210 MACH_EM7210 EM7210 1212
1219htchermes MACH_HTCHERMES HTCHERMES 1213
1220eti_c1 MACH_ETI_C1 ETI_C1 1214
1221ac100 MACH_AC100 AC100 1216
1222sneetch MACH_SNEETCH SNEETCH 1217
1223studentmate MACH_STUDENTMATE STUDENTMATE 1218
1224zir2410 MACH_ZIR2410 ZIR2410 1219
1225zir2413 MACH_ZIR2413 ZIR2413 1220
1226dlonip3 MACH_DLONIP3 DLONIP3 1221
1227instream MACH_INSTREAM INSTREAM 1222
1228ambarella MACH_AMBARELLA AMBARELLA 1223
1229nevis MACH_NEVIS NEVIS 1224
1230htc_trinity MACH_HTC_TRINITY HTC_TRINITY 1225
1231ql202b MACH_QL202B QL202B 1226
1232vpac270 MACH_VPAC270 VPAC270 1227 228vpac270 MACH_VPAC270 VPAC270 1227
1233rd129 MACH_RD129 RD129 1228
1234htcwizard MACH_HTCWIZARD HTCWIZARD 1229
1235treo680 MACH_TREO680 TREO680 1230 229treo680 MACH_TREO680 TREO680 1230
1236tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231
1237zylonite MACH_ZYLONITE ZYLONITE 1233 230zylonite MACH_ZYLONITE ZYLONITE 1233
1238gene1270 MACH_GENE1270 GENE1270 1234
1239zir2412 MACH_ZIR2412 ZIR2412 1235
1240mx31lite MACH_MX31LITE MX31LITE 1236 231mx31lite MACH_MX31LITE MX31LITE 1236
1241t700wx MACH_T700WX T700WX 1237
1242vf100 MACH_VF100 VF100 1238
1243nsb2 MACH_NSB2 NSB2 1239
1244nxhmi_bb MACH_NXHMI_BB NXHMI_BB 1240
1245nxhmi_re MACH_NXHMI_RE NXHMI_RE 1241
1246n4100pro MACH_N4100PRO N4100PRO 1242
1247sam9260 MACH_SAM9260 SAM9260 1243
1248omap_treo600 MACH_OMAP_TREO600 OMAP_TREO600 1244
1249indy2410 MACH_INDY2410 INDY2410 1245
1250nelt_a MACH_NELT_A NELT_A 1246
1251n311 MACH_N311 N311 1248
1252at91sam9260vgk MACH_AT91SAM9260VGK AT91SAM9260VGK 1249
1253at91leppe MACH_AT91LEPPE AT91LEPPE 1250
1254at91lepccn MACH_AT91LEPCCN AT91LEPCCN 1251
1255apc7100 MACH_APC7100 APC7100 1252
1256stargazer MACH_STARGAZER STARGAZER 1253
1257sonata MACH_SONATA SONATA 1254
1258schmoogie MACH_SCHMOOGIE SCHMOOGIE 1255
1259aztool MACH_AZTOOL AZTOOL 1256
1260mioa701 MACH_MIOA701 MIOA701 1257 232mioa701 MACH_MIOA701 MIOA701 1257
1261sxni9260 MACH_SXNI9260 SXNI9260 1258
1262mxc27520evb MACH_MXC27520EVB MXC27520EVB 1259
1263armadillo5x0 MACH_ARMADILLO5X0 ARMADILLO5X0 1260 233armadillo5x0 MACH_ARMADILLO5X0 ARMADILLO5X0 1260
1264mb9260 MACH_MB9260 MB9260 1261
1265mb9263 MACH_MB9263 MB9263 1262
1266ipac9302 MACH_IPAC9302 IPAC9302 1263
1267cc9p9360js MACH_CC9P9360JS CC9P9360JS 1264 234cc9p9360js MACH_CC9P9360JS CC9P9360JS 1264
1268gallium MACH_GALLIUM GALLIUM 1265
1269msc2410 MACH_MSC2410 MSC2410 1266
1270ghi270 MACH_GHI270 GHI270 1267
1271davinci_leonardo MACH_DAVINCI_LEONARDO DAVINCI_LEONARDO 1268
1272oiab MACH_OIAB OIAB 1269
1273smdk6400 MACH_SMDK6400 SMDK6400 1270 235smdk6400 MACH_SMDK6400 SMDK6400 1270
1274nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271 236nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271
1275greenphone MACH_GREENPHONE GREENPHONE 1272
1276compex42x MACH_COMPEXWP18 COMPEXWP18 1273
1277xmate MACH_XMATE XMATE 1274
1278energizer MACH_ENERGIZER ENERGIZER 1275
1279ime1 MACH_IME1 IME1 1276
1280sweda_tms MACH_SWEDATMS SWEDATMS 1277
1281ntnp435c MACH_NTNP435C NTNP435C 1278
1282spectro2 MACH_SPECTRO2 SPECTRO2 1279
1283h6039 MACH_H6039 H6039 1280
1284ep80219 MACH_EP80219 EP80219 1281 237ep80219 MACH_EP80219 EP80219 1281
1285samoa_ii MACH_SAMOA_II SAMOA_II 1282
1286cwmxl MACH_CWMXL CWMXL 1283
1287as9200 MACH_AS9200 AS9200 1284
1288sfx1149 MACH_SFX1149 SFX1149 1285
1289navi010 MACH_NAVI010 NAVI010 1286
1290multmdp MACH_MULTMDP MULTMDP 1287
1291scb9520 MACH_SCB9520 SCB9520 1288
1292htcathena MACH_HTCATHENA HTCATHENA 1289
1293xp179 MACH_XP179 XP179 1290
1294h4300 MACH_H4300 H4300 1291
1295goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292 238goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292
1296mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293
1297adsbitsyg5 MACH_ADSBITSYG5 ADSBITSYG5 1294
1298adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295
1299mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296
1300em_x270 MACH_EM_X270 EM_X270 1297 239em_x270 MACH_EM_X270 EM_X270 1297
1301tpp302 MACH_TPP302 TPP302 1298
1302tpp104 MACH_TPM104 TPM104 1299
1303tpm102 MACH_TPM102 TPM102 1300
1304tpm109 MACH_TPM109 TPM109 1301
1305fbxo1 MACH_FBXO1 FBXO1 1302
1306hxd8 MACH_HXD8 HXD8 1303
1307neo1973_gta02 MACH_NEO1973_GTA02 NEO1973_GTA02 1304 240neo1973_gta02 MACH_NEO1973_GTA02 NEO1973_GTA02 1304
1308emtest MACH_EMTEST EMTEST 1305
1309ad6900 MACH_AD6900 AD6900 1306
1310europa MACH_EUROPA EUROPA 1307
1311metroconnect MACH_METROCONNECT METROCONNECT 1308
1312ez_s2410 MACH_EZ_S2410 EZ_S2410 1309
1313ez_s2440 MACH_EZ_S2440 EZ_S2440 1310
1314ez_ep9312 MACH_EZ_EP9312 EZ_EP9312 1311
1315ez_ep9315 MACH_EZ_EP9315 EZ_EP9315 1312
1316ez_x7 MACH_EZ_X7 EZ_X7 1313
1317godotdb MACH_GODOTDB GODOTDB 1314
1318mistral MACH_MISTRAL MISTRAL 1315
1319msm MACH_MSM MSM 1316
1320ct5910 MACH_CT5910 CT5910 1317
1321ct5912 MACH_CT5912 CT5912 1318
1322hynet_ine MACH_HYNET_INE HYNET_INE 1319
1323hynet_app MACH_HYNET_APP HYNET_APP 1320
1324msm7200 MACH_MSM7200 MSM7200 1321
1325msm7600 MACH_MSM7600 MSM7600 1322
1326ceb255 MACH_CEB255 CEB255 1323
1327ciel MACH_CIEL CIEL 1324
1328slm5650 MACH_SLM5650 SLM5650 1325
1329at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326 241at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326
1330comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327
1331sbc2410x MACH_SBC2410X SBC2410X 1328
1332at4x0bd MACH_AT4X0BD AT4X0BD 1329
1333cbifr MACH_CBIFR CBIFR 1330
1334arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331
1335matrix520 MACH_MATRIX520 MATRIX520 1332
1336matrix510 MACH_MATRIX510 MATRIX510 1333
1337matrix500 MACH_MATRIX500 MATRIX500 1334
1338m501 MACH_M501 M501 1335
1339aaeon1270 MACH_AAEON1270 AAEON1270 1336
1340matrix500ev MACH_MATRIX500EV MATRIX500EV 1337
1341pac500 MACH_PAC500 PAC500 1338
1342pnx8181 MACH_PNX8181 PNX8181 1339
1343colibri320 MACH_COLIBRI320 COLIBRI320 1340 242colibri320 MACH_COLIBRI320 COLIBRI320 1340
1344aztoolbb MACH_AZTOOLBB AZTOOLBB 1341
1345aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342
1346dvlhost MACH_DVLHOST DVLHOST 1343
1347zir9200 MACH_ZIR9200 ZIR9200 1344
1348zir9260 MACH_ZIR9260 ZIR9260 1345
1349cocopah MACH_COCOPAH COCOPAH 1346
1350nds MACH_NDS NDS 1347
1351rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348
1352fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349
1353classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350
1354cam60 MACH_CAM60 CAM60 1351 243cam60 MACH_CAM60 CAM60 1351
1355mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352
1356datacall MACH_DATACALL DATACALL 1353
1357at91eb01 MACH_AT91EB01 AT91EB01 1354 244at91eb01 MACH_AT91EB01 AT91EB01 1354
1358rty MACH_RTY RTY 1355
1359dwl2100 MACH_DWL2100 DWL2100 1356
1360vinsi MACH_VINSI VINSI 1357
1361db88f5281 MACH_DB88F5281 DB88F5281 1358 245db88f5281 MACH_DB88F5281 DB88F5281 1358
1362csb726 MACH_CSB726 CSB726 1359 246csb726 MACH_CSB726 CSB726 1359
1363tik27 MACH_TIK27 TIK27 1360
1364mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361
1365rirm3 MACH_RIRM3 RIRM3 1362
1366pelco_odyssey MACH_PELCO_ODYSSEY PELCO_ODYSSEY 1363
1367adx_abox MACH_ADX_ABOX ADX_ABOX 1365
1368adx_tpid MACH_ADX_TPID ADX_TPID 1366
1369minicheck MACH_MINICHECK MINICHECK 1367
1370idam MACH_IDAM IDAM 1368
1371mario_mx MACH_MARIO_MX MARIO_MX 1369
1372vi1888 MACH_VI1888 VI1888 1370
1373zr4230 MACH_ZR4230 ZR4230 1371
1374t1_ix_blue MACH_T1_IX_BLUE T1_IX_BLUE 1372
1375syhq2 MACH_SYHQ2 SYHQ2 1373
1376computime_r3 MACH_COMPUTIME_R3 COMPUTIME_R3 1374
1377oratis MACH_ORATIS ORATIS 1375
1378mikko MACH_MIKKO MIKKO 1376
1379holon MACH_HOLON HOLON 1377
1380olip8 MACH_OLIP8 OLIP8 1378
1381ghi270hg MACH_GHI270HG GHI270HG 1379
1382davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 247davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380
1383davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381 248davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381
1384blackriver MACH_BLACKRIVER BLACKRIVER 1383
1385sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384
1386cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385
1387quark963 MACH_QUARK963 QUARK963 1386
1388csb735 MACH_CSB735 CSB735 1387
1389littleton MACH_LITTLETON LITTLETON 1388 249littleton MACH_LITTLETON LITTLETON 1388
1390mio_p550 MACH_MIO_P550 MIO_P550 1389
1391motion2440 MACH_MOTION2440 MOTION2440 1390
1392imm500 MACH_IMM500 IMM500 1391
1393homematic MACH_HOMEMATIC HOMEMATIC 1392
1394ermine MACH_ERMINE ERMINE 1393
1395kb9202b MACH_KB9202B KB9202B 1394
1396hs1xx MACH_HS1XX HS1XX 1395
1397studentmate2440 MACH_STUDENTMATE2440 STUDENTMATE2440 1396
1398arvoo_l1_z1 MACH_ARVOO_L1_Z1 ARVOO_L1_Z1 1397
1399dep2410k MACH_DEP2410K DEP2410K 1398
1400xxsvideo MACH_XXSVIDEO XXSVIDEO 1399
1401im4004 MACH_IM4004 IM4004 1400
1402ochaya1050 MACH_OCHAYA1050 OCHAYA1050 1401
1403lep9261 MACH_LEP9261 LEP9261 1402
1404svenmeb MACH_SVENMEB SVENMEB 1403
1405fortunet2ne MACH_FORTUNET2NE FORTUNET2NE 1404
1406nxhx MACH_NXHX NXHX 1406
1407realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407 250realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407
1408ids500 MACH_IDS500 IDS500 1408
1409ors_n725 MACH_ORS_N725 ORS_N725 1409
1410hsdarm MACH_HSDARM HSDARM 1410
1411sha_pon003 MACH_SHA_PON003 SHA_PON003 1411
1412sha_pon004 MACH_SHA_PON004 SHA_PON004 1412
1413sha_pon007 MACH_SHA_PON007 SHA_PON007 1413
1414sha_pon011 MACH_SHA_PON011 SHA_PON011 1414
1415h6042 MACH_H6042 H6042 1415
1416h6043 MACH_H6043 H6043 1416
1417looxc550 MACH_LOOXC550 LOOXC550 1417
1418cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418
1419app3xx MACH_APP3XX APP3XX 1419
1420sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420
1421treo700p MACH_TREO700P TREO700P 1421
1422treo700w MACH_TREO700W TREO700W 1422
1423treo750 MACH_TREO750 TREO750 1423
1424treo755p MACH_TREO755P TREO755P 1424
1425ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425
1426sarge MACH_SARGE SARGE 1426
1427a696 MACH_A696 A696 1427
1428turtle1916 MACH_TURTLE TURTLE 1428
1429mx27_3ds MACH_MX27_3DS MX27_3DS 1430 251mx27_3ds MACH_MX27_3DS MX27_3DS 1430
1430bishop MACH_BISHOP BISHOP 1431
1431pxx MACH_PXX PXX 1432
1432redwood MACH_REDWOOD REDWOOD 1433
1433omap_2430dlp MACH_OMAP_2430DLP OMAP_2430DLP 1436
1434omap_2430osk MACH_OMAP_2430OSK OMAP_2430OSK 1437
1435sardine MACH_SARDINE SARDINE 1438
1436halibut MACH_HALIBUT HALIBUT 1439 252halibut MACH_HALIBUT HALIBUT 1439
1437trout MACH_TROUT TROUT 1440 253trout MACH_TROUT TROUT 1440
1438goldfish MACH_GOLDFISH GOLDFISH 1441
1439gesbc2440 MACH_GESBC2440 GESBC2440 1442
1440nomad MACH_NOMAD NOMAD 1443
1441rosalind MACH_ROSALIND ROSALIND 1444
1442cc9p9215 MACH_CC9P9215 CC9P9215 1445
1443cc9p9210 MACH_CC9P9210 CC9P9210 1446
1444cc9p9215js MACH_CC9P9215JS CC9P9215JS 1447
1445cc9p9210js MACH_CC9P9210JS CC9P9210JS 1448
1446nasffe MACH_NASFFE NASFFE 1449
1447tn2x0bd MACH_TN2X0BD TN2X0BD 1450
1448gwmpxa MACH_GWMPXA GWMPXA 1451
1449exyplus MACH_EXYPLUS EXYPLUS 1452
1450jadoo21 MACH_JADOO21 JADOO21 1453
1451looxn560 MACH_LOOXN560 LOOXN560 1454
1452bonsai MACH_BONSAI BONSAI 1455
1453adsmilgato MACH_ADSMILGATO ADSMILGATO 1456
1454gba MACH_GBA GBA 1457
1455h6044 MACH_H6044 H6044 1458
1456app MACH_APP APP 1459
1457tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460 254tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460
1458herald MACH_HERALD HERALD 1461 255herald MACH_HERALD HERALD 1461
1459artemis MACH_ARTEMIS ARTEMIS 1462
1460htctitan MACH_HTCTITAN HTCTITAN 1463
1461qranium MACH_QRANIUM QRANIUM 1464
1462adx_wsc2 MACH_ADX_WSC2 ADX_WSC2 1465
1463adx_medcom MACH_ADX_MEDCOM ADX_MEDCOM 1466
1464bboard MACH_BBOARD BBOARD 1467
1465cambria MACH_CAMBRIA CAMBRIA 1468
1466mt7xxx MACH_MT7XXX MT7XXX 1469
1467matrix512 MACH_MATRIX512 MATRIX512 1470
1468matrix522 MACH_MATRIX522 MATRIX522 1471
1469ipac5010 MACH_IPAC5010 IPAC5010 1472
1470sakura MACH_SAKURA SAKURA 1473
1471grocx MACH_GROCX GROCX 1474
1472pm9263 MACH_PM9263 PM9263 1475
1473sim_one MACH_SIM_ONE SIM_ONE 1476 256sim_one MACH_SIM_ONE SIM_ONE 1476
1474acq132 MACH_ACQ132 ACQ132 1477
1475datr MACH_DATR DATR 1478
1476actux1 MACH_ACTUX1 ACTUX1 1479
1477actux2 MACH_ACTUX2 ACTUX2 1480
1478actux3 MACH_ACTUX3 ACTUX3 1481
1479flexit MACH_FLEXIT FLEXIT 1482
1480bh2x0bd MACH_BH2X0BD BH2X0BD 1483
1481atb2002 MACH_ATB2002 ATB2002 1484
1482xenon MACH_XENON XENON 1485
1483fm607 MACH_FM607 FM607 1486
1484matrix514 MACH_MATRIX514 MATRIX514 1487
1485matrix524 MACH_MATRIX524 MATRIX524 1488
1486inpod MACH_INPOD INPOD 1489
1487jive MACH_JIVE JIVE 1490 257jive MACH_JIVE JIVE 1490
1488tll_mx21 MACH_TLL_MX21 TLL_MX21 1491
1489sbc2800 MACH_SBC2800 SBC2800 1492
1490cc7ucamry MACH_CC7UCAMRY CC7UCAMRY 1493
1491ubisys_p9_sc15 MACH_UBISYS_P9_SC15 UBISYS_P9_SC15 1494
1492ubisys_p9_ssc2d10 MACH_UBISYS_P9_SSC2D10 UBISYS_P9_SSC2D10 1495
1493ubisys_p9_rcu3 MACH_UBISYS_P9_RCU3 UBISYS_P9_RCU3 1496
1494aml_m8000 MACH_AML_M8000 AML_M8000 1497
1495snapper_270 MACH_SNAPPER_270 SNAPPER_270 1498
1496omap_bbx MACH_OMAP_BBX OMAP_BBX 1499
1497ucn2410 MACH_UCN2410 UCN2410 1500
1498sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501 258sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501
1499eti_c2 MACH_ETI_C2 ETI_C2 1502
1500avalanche MACH_AVALANCHE AVALANCHE 1503
1501realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504 259realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504
1502dp1500 MACH_DP1500 DP1500 1505
1503apple_iphone MACH_APPLE_IPHONE APPLE_IPHONE 1506
1504yl9200 MACH_YL9200 YL9200 1507 260yl9200 MACH_YL9200 YL9200 1507
1505rd88f5182 MACH_RD88F5182 RD88F5182 1508 261rd88f5182 MACH_RD88F5182 RD88F5182 1508
1506kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509 262kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509
1507se_poet MACH_SE_POET SE_POET 1510
1508mx31_3ds MACH_MX31_3DS MX31_3DS 1511 263mx31_3ds MACH_MX31_3DS MX31_3DS 1511
1509r270 MACH_R270 R270 1512
1510armour21 MACH_ARMOUR21 ARMOUR21 1513
1511dt2 MACH_DT2 DT2 1514
1512vt4 MACH_VT4 VT4 1515
1513tyco320 MACH_TYCO320 TYCO320 1516
1514adma MACH_ADMA ADMA 1517
1515wp188 MACH_WP188 WP188 1518
1516corsica MACH_CORSICA CORSICA 1519
1517bigeye MACH_BIGEYE BIGEYE 1520
1518tll5000 MACH_TLL5000 TLL5000 1522
1519bebot MACH_BEBOT BEBOT 1523
1520qong MACH_QONG QONG 1524 264qong MACH_QONG QONG 1524
1521tcompact MACH_TCOMPACT TCOMPACT 1525
1522puma5 MACH_PUMA5 PUMA5 1526
1523elara MACH_ELARA ELARA 1527
1524ellington MACH_ELLINGTON ELLINGTON 1528
1525xda_atom MACH_XDA_ATOM XDA_ATOM 1529
1526energizer2 MACH_ENERGIZER2 ENERGIZER2 1530
1527odin MACH_ODIN ODIN 1531
1528actux4 MACH_ACTUX4 ACTUX4 1532
1529esl_omap MACH_ESL_OMAP ESL_OMAP 1533
1530omap2evm MACH_OMAP2EVM OMAP2EVM 1534 265omap2evm MACH_OMAP2EVM OMAP2EVM 1534
1531omap3evm MACH_OMAP3EVM OMAP3EVM 1535 266omap3evm MACH_OMAP3EVM OMAP3EVM 1535
1532adx_pcu57 MACH_ADX_PCU57 ADX_PCU57 1536
1533monaco MACH_MONACO MONACO 1537
1534levante MACH_LEVANTE LEVANTE 1538
1535tmxipx425 MACH_TMXIPX425 TMXIPX425 1539
1536leep MACH_LEEP LEEP 1540
1537raad MACH_RAAD RAAD 1541
1538dns323 MACH_DNS323 DNS323 1542 267dns323 MACH_DNS323 DNS323 1542
1539ap1000 MACH_AP1000 AP1000 1543
1540a9sam6432 MACH_A9SAM6432 A9SAM6432 1544
1541shiny MACH_SHINY SHINY 1545
1542omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 268omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546
1543csr_bdb2 MACH_CSR_BDB2 CSR_BDB2 1547
1544nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 269nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548
1545c270 MACH_C270 C270 1549
1546sentry MACH_SENTRY SENTRY 1550
1547pcm038 MACH_PCM038 PCM038 1551 270pcm038 MACH_PCM038 PCM038 1551
1548anc300 MACH_ANC300 ANC300 1552
1549htckaiser MACH_HTCKAISER HTCKAISER 1553
1550sbat100 MACH_SBAT100 SBAT100 1554
1551modunorm MACH_MODUNORM MODUNORM 1555
1552pelos_twarm MACH_PELOS_TWARM PELOS_TWARM 1556
1553flank MACH_FLANK FLANK 1557
1554sirloin MACH_SIRLOIN SIRLOIN 1558
1555brisket MACH_BRISKET BRISKET 1559
1556chuck MACH_CHUCK CHUCK 1560
1557otter MACH_OTTER OTTER 1561
1558davinci_ldk MACH_DAVINCI_LDK DAVINCI_LDK 1562
1559phreedom MACH_PHREEDOM PHREEDOM 1563
1560sg310 MACH_SG310 SG310 1564
1561ts_x09 MACH_TS209 TS209 1565 271ts_x09 MACH_TS209 TS209 1565
1562at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 272at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566
1563tion9315 MACH_TION9315 TION9315 1567
1564mast MACH_MAST MAST 1568
1565pfw MACH_PFW PFW 1569
1566yl_p2440 MACH_YL_P2440 YL_P2440 1570
1567zsbc32 MACH_ZSBC32 ZSBC32 1571
1568omap_pace2 MACH_OMAP_PACE2 OMAP_PACE2 1572
1569imx_pace2 MACH_IMX_PACE2 IMX_PACE2 1573
1570mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 273mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574
1571mx37_3ds MACH_MX37_3DS MX37_3DS 1575
1572rcc MACH_RCC RCC 1576
1573dmp MACH_ARM9 ARM9 1577
1574vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578
1575scly1000 MACH_SCLY1000 SCLY1000 1579
1576fontel_ep MACH_FONTEL_EP FONTEL_EP 1580
1577voiceblue3g MACH_VOICEBLUE3G VOICEBLUE3G 1581
1578tt9200 MACH_TT9200 TT9200 1582
1579digi2410 MACH_DIGI2410 DIGI2410 1583
1580terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584 274terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584
1581linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585 275linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585
1582motorola_a780 MACH_MOTOROLA_A780 MOTOROLA_A780 1587
1583motorola_e6 MACH_MOTOROLA_E6 MOTOROLA_E6 1588
1584motorola_e2 MACH_MOTOROLA_E2 MOTOROLA_E2 1589
1585motorola_e680 MACH_MOTOROLA_E680 MOTOROLA_E680 1590
1586ur2410 MACH_UR2410 UR2410 1591
1587tas9261 MACH_TAS9261 TAS9261 1592
1588davinci_hermes_hd MACH_HERMES_HD HERMES_HD 1593
1589davinci_perseo_hd MACH_PERSEO_HD PERSEO_HD 1594
1590stargazer2 MACH_STARGAZER2 STARGAZER2 1595
1591e350 MACH_E350 E350 1596 276e350 MACH_E350 E350 1596
1592wpcm450 MACH_WPCM450 WPCM450 1597
1593cartesio MACH_CARTESIO CARTESIO 1598
1594toybox MACH_TOYBOX TOYBOX 1599
1595tx27 MACH_TX27 TX27 1600
1596ts409 MACH_TS409 TS409 1601 277ts409 MACH_TS409 TS409 1601
1597p300 MACH_P300 P300 1602
1598xdacomet MACH_XDACOMET XDACOMET 1603
1599dexflex2 MACH_DEXFLEX2 DEXFLEX2 1604
1600ow MACH_OW OW 1605
1601armebs3 MACH_ARMEBS3 ARMEBS3 1606
1602u3 MACH_U3 U3 1607
1603smdk2450 MACH_SMDK2450 SMDK2450 1608
1604rsi_ews MACH_RSI_EWS RSI_EWS 1609
1605tnb MACH_TNB TNB 1610
1606toepath MACH_TOEPATH TOEPATH 1611
1607kb9263 MACH_KB9263 KB9263 1612
1608mt7108 MACH_MT7108 MT7108 1613
1609smtr2440 MACH_SMTR2440 SMTR2440 1614
1610manao MACH_MANAO MANAO 1615
1611cm_x300 MACH_CM_X300 CM_X300 1616 278cm_x300 MACH_CM_X300 CM_X300 1616
1612gulfstream_kp MACH_GULFSTREAM_KP GULFSTREAM_KP 1617
1613lanreadyfn522 MACH_LANREADYFN522 LANREADYFN522 1618
1614arma37 MACH_ARMA37 ARMA37 1619
1615mendel MACH_MENDEL MENDEL 1620
1616pelco_iliad MACH_PELCO_ILIAD PELCO_ILIAD 1621
1617unit2p MACH_UNIT2P UNIT2P 1622
1618inc20otter MACH_INC20OTTER INC20OTTER 1623
1619at91sam9g20ek MACH_AT91SAM9G20EK AT91SAM9G20EK 1624 279at91sam9g20ek MACH_AT91SAM9G20EK AT91SAM9G20EK 1624
1620sc_ge2 MACH_STORCENTER STORCENTER 1625
1621smdk6410 MACH_SMDK6410 SMDK6410 1626 280smdk6410 MACH_SMDK6410 SMDK6410 1626
1622u300 MACH_U300 U300 1627 281u300 MACH_U300 U300 1627
1623u500 MACH_U500 U500 1628
1624ds9260 MACH_DS9260 DS9260 1629
1625riverrock MACH_RIVERROCK RIVERROCK 1630
1626scibath MACH_SCIBATH SCIBATH 1631
1627at91sam7se MACH_AT91SAM7SE512EK AT91SAM7SE512EK 1632
1628wrt350n_v2 MACH_WRT350N_V2 WRT350N_V2 1633 282wrt350n_v2 MACH_WRT350N_V2 WRT350N_V2 1633
1629multimedia MACH_MULTIMEDIA MULTIMEDIA 1634
1630marvin MACH_MARVIN MARVIN 1635
1631x500 MACH_X500 X500 1636
1632awlug4lcu MACH_AWLUG4LCU AWLUG4LCU 1637
1633palermoc MACH_PALERMOC PALERMOC 1638
1634omap_ldp MACH_OMAP_LDP OMAP_LDP 1639 283omap_ldp MACH_OMAP_LDP OMAP_LDP 1639
1635ip500 MACH_IP500 IP500 1640
1636ase2 MACH_ASE2 ASE2 1642
1637mx35evb MACH_MX35EVB MX35EVB 1643
1638aml_m8050 MACH_AML_M8050 AML_M8050 1644
1639mx35_3ds MACH_MX35_3DS MX35_3DS 1645 284mx35_3ds MACH_MX35_3DS MX35_3DS 1645
1640mars MACH_MARS MARS 1646
1641neuros_osd2 MACH_NEUROS_OSD2 NEUROS_OSD2 1647 285neuros_osd2 MACH_NEUROS_OSD2 NEUROS_OSD2 1647
1642badger MACH_BADGER BADGER 1648
1643trizeps4wl MACH_TRIZEPS4WL TRIZEPS4WL 1649 286trizeps4wl MACH_TRIZEPS4WL TRIZEPS4WL 1649
1644trizeps5 MACH_TRIZEPS5 TRIZEPS5 1650
1645marlin MACH_MARLIN MARLIN 1651
1646ts78xx MACH_TS78XX TS78XX 1652 287ts78xx MACH_TS78XX TS78XX 1652
1647hpipaq214 MACH_HPIPAQ214 HPIPAQ214 1653
1648at572d940dcm MACH_AT572D940DCM AT572D940DCM 1654
1649ne1board MACH_NE1BOARD NE1BOARD 1655
1650zante MACH_ZANTE ZANTE 1656
1651sffsdr MACH_SFFSDR SFFSDR 1657 288sffsdr MACH_SFFSDR SFFSDR 1657
1652tw2662 MACH_TW2662 TW2662 1658
1653vf10xx MACH_VF10XX VF10XX 1659
1654zoran43xx MACH_ZORAN43XX ZORAN43XX 1660
1655sonix926 MACH_SONIX926 SONIX926 1661
1656celestialsemi MACH_CELESTIALSEMI CELESTIALSEMI 1662
1657cc9m2443js MACH_CC9M2443JS CC9M2443JS 1663
1658tw5334 MACH_TW5334 TW5334 1664
1659omap_htcartemis MACH_HTCARTEMIS HTCARTEMIS 1665
1660nal_hlite MACH_NAL_HLITE NAL_HLITE 1666
1661htcvogue MACH_HTCVOGUE HTCVOGUE 1667
1662smartweb MACH_SMARTWEB SMARTWEB 1668
1663mv86xx MACH_MV86XX MV86XX 1669
1664mv87xx MACH_MV87XX MV87XX 1670
1665songyoungho MACH_SONGYOUNGHO SONGYOUNGHO 1671
1666younghotema MACH_YOUNGHOTEMA YOUNGHOTEMA 1672
1667pcm037 MACH_PCM037 PCM037 1673 289pcm037 MACH_PCM037 PCM037 1673
1668mmvp MACH_MMVP MMVP 1674
1669mmap MACH_MMAP MMAP 1675
1670ptid2410 MACH_PTID2410 PTID2410 1676
1671james_926 MACH_JAMES_926 JAMES_926 1677
1672fm6000 MACH_FM6000 FM6000 1678
1673db88f6281_bp MACH_DB88F6281_BP DB88F6281_BP 1680 290db88f6281_bp MACH_DB88F6281_BP DB88F6281_BP 1680
1674rd88f6192_nas MACH_RD88F6192_NAS RD88F6192_NAS 1681 291rd88f6192_nas MACH_RD88F6192_NAS RD88F6192_NAS 1681
1675rd88f6281 MACH_RD88F6281 RD88F6281 1682 292rd88f6281 MACH_RD88F6281 RD88F6281 1682
1676db78x00_bp MACH_DB78X00_BP DB78X00_BP 1683 293db78x00_bp MACH_DB78X00_BP DB78X00_BP 1683
1677smdk2416 MACH_SMDK2416 SMDK2416 1685 294smdk2416 MACH_SMDK2416 SMDK2416 1685
1678oce_spider_si MACH_OCE_SPIDER_SI OCE_SPIDER_SI 1686
1679oce_spider_sk MACH_OCE_SPIDER_SK OCE_SPIDER_SK 1687
1680rovern6 MACH_ROVERN6 ROVERN6 1688
1681pelco_evolution MACH_PELCO_EVOLUTION PELCO_EVOLUTION 1689
1682wbd111 MACH_WBD111 WBD111 1690 295wbd111 MACH_WBD111 WBD111 1690
1683elaracpe MACH_ELARACPE ELARACPE 1691
1684mabv3 MACH_MABV3 MABV3 1692
1685mv2120 MACH_MV2120 MV2120 1693 296mv2120 MACH_MV2120 MV2120 1693
1686csb737 MACH_CSB737 CSB737 1695
1687mx51_3ds MACH_MX51_3DS MX51_3DS 1696 297mx51_3ds MACH_MX51_3DS MX51_3DS 1696
1688g900 MACH_G900 G900 1697
1689apf27 MACH_APF27 APF27 1698
1690ggus2000 MACH_GGUS2000 GGUS2000 1699
1691omap_2430_mimic MACH_OMAP_2430_MIMIC OMAP_2430_MIMIC 1700
1692imx27lite MACH_IMX27LITE IMX27LITE 1701 298imx27lite MACH_IMX27LITE IMX27LITE 1701
1693almex MACH_ALMEX ALMEX 1702
1694control MACH_CONTROL CONTROL 1703
1695mba2410 MACH_MBA2410 MBA2410 1704
1696volcano MACH_VOLCANO VOLCANO 1705
1697zenith MACH_ZENITH ZENITH 1706
1698muchip MACH_MUCHIP MUCHIP 1707
1699magellan MACH_MAGELLAN MAGELLAN 1708
1700usb_a9260 MACH_USB_A9260 USB_A9260 1709 299usb_a9260 MACH_USB_A9260 USB_A9260 1709
1701usb_a9263 MACH_USB_A9263 USB_A9263 1710 300usb_a9263 MACH_USB_A9263 USB_A9263 1710
1702qil_a9260 MACH_QIL_A9260 QIL_A9260 1711 301qil_a9260 MACH_QIL_A9260 QIL_A9260 1711
1703cme9210 MACH_CME9210 CME9210 1712
1704hczh4 MACH_HCZH4 HCZH4 1713
1705spearbasic MACH_SPEARBASIC SPEARBASIC 1714
1706dep2440 MACH_DEP2440 DEP2440 1715
1707hdl_gxr MACH_HDL_GXR HDL_GXR 1716
1708hdl_gt MACH_HDL_GT HDL_GT 1717
1709hdl_4g MACH_HDL_4G HDL_4G 1718
1710s3c6000 MACH_S3C6000 S3C6000 1719
1711mmsp2_mdk MACH_MMSP2_MDK MMSP2_MDK 1720
1712mpx220 MACH_MPX220 MPX220 1721
1713kzm_arm11_01 MACH_KZM_ARM11_01 KZM_ARM11_01 1722 302kzm_arm11_01 MACH_KZM_ARM11_01 KZM_ARM11_01 1722
1714htc_polaris MACH_HTC_POLARIS HTC_POLARIS 1723
1715htc_kaiser MACH_HTC_KAISER HTC_KAISER 1724
1716lg_ks20 MACH_LG_KS20 LG_KS20 1725
1717hhgps MACH_HHGPS HHGPS 1726
1718nokia_n810_wimax MACH_NOKIA_N810_WIMAX NOKIA_N810_WIMAX 1727 303nokia_n810_wimax MACH_NOKIA_N810_WIMAX NOKIA_N810_WIMAX 1727
1719insight MACH_INSIGHT INSIGHT 1728
1720sapphire MACH_SAPPHIRE SAPPHIRE 1729 304sapphire MACH_SAPPHIRE SAPPHIRE 1729
1721csb637xo MACH_CSB637XO CSB637XO 1730
1722evisiong MACH_EVISIONG EVISIONG 1731
1723stmp37xx MACH_STMP37XX STMP37XX 1732 305stmp37xx MACH_STMP37XX STMP37XX 1732
1724stmp378x MACH_STMP378X STMP378X 1733 306stmp378x MACH_STMP378X STMP378X 1733
1725tnt MACH_TNT TNT 1734
1726tbxt MACH_TBXT TBXT 1735
1727playmate MACH_PLAYMATE PLAYMATE 1736
1728pns10 MACH_PNS10 PNS10 1737
1729eznavi MACH_EZNAVI EZNAVI 1738
1730ps4000 MACH_PS4000 PS4000 1739
1731ezx_a780 MACH_EZX_A780 EZX_A780 1740 307ezx_a780 MACH_EZX_A780 EZX_A780 1740
1732ezx_e680 MACH_EZX_E680 EZX_E680 1741 308ezx_e680 MACH_EZX_E680 EZX_E680 1741
1733ezx_a1200 MACH_EZX_A1200 EZX_A1200 1742 309ezx_a1200 MACH_EZX_A1200 EZX_A1200 1742
1734ezx_e6 MACH_EZX_E6 EZX_E6 1743 310ezx_e6 MACH_EZX_E6 EZX_E6 1743
1735ezx_e2 MACH_EZX_E2 EZX_E2 1744 311ezx_e2 MACH_EZX_E2 EZX_E2 1744
1736ezx_a910 MACH_EZX_A910 EZX_A910 1745 312ezx_a910 MACH_EZX_A910 EZX_A910 1745
1737cwmx31 MACH_CWMX31 CWMX31 1746
1738sl2312 MACH_SL2312 SL2312 1747
1739blenny MACH_BLENNY BLENNY 1748
1740ds107 MACH_DS107 DS107 1749
1741dsx07 MACH_DSX07 DSX07 1750
1742picocom1 MACH_PICOCOM1 PICOCOM1 1751
1743lynx_wolverine MACH_LYNX_WOLVERINE LYNX_WOLVERINE 1752
1744ubisys_p9_sc19 MACH_UBISYS_P9_SC19 UBISYS_P9_SC19 1753
1745kratos_low MACH_KRATOS_LOW KRATOS_LOW 1754
1746m700 MACH_M700 M700 1755
1747edmini_v2 MACH_EDMINI_V2 EDMINI_V2 1756 313edmini_v2 MACH_EDMINI_V2 EDMINI_V2 1756
1748zipit2 MACH_ZIPIT2 ZIPIT2 1757 314zipit2 MACH_ZIPIT2 ZIPIT2 1757
1749hslfemtocell MACH_HSLFEMTOCELL HSLFEMTOCELL 1758
1750daintree_at91 MACH_DAINTREE_AT91 DAINTREE_AT91 1759
1751sg560usb MACH_SG560USB SG560USB 1760
1752omap3_pandora MACH_OMAP3_PANDORA OMAP3_PANDORA 1761 315omap3_pandora MACH_OMAP3_PANDORA OMAP3_PANDORA 1761
1753usr8200 MACH_USR8200 USR8200 1762
1754s1s65k MACH_S1S65K S1S65K 1763
1755s2s65a MACH_S2S65A S2S65A 1764
1756icore MACH_ICORE ICORE 1765
1757mss2 MACH_MSS2 MSS2 1766 316mss2 MACH_MSS2 MSS2 1766
1758belmont MACH_BELMONT BELMONT 1767
1759asusp525 MACH_ASUSP525 ASUSP525 1768
1760lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769 317lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769
1761hipxa MACH_HIPXA HIPXA 1770
1762mx25_3ds MACH_MX25_3DS MX25_3DS 1771 318mx25_3ds MACH_MX25_3DS MX25_3DS 1771
1763m800 MACH_M800 M800 1772
1764omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 319omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773
1765prima_evb MACH_PRIMA_EVB PRIMA_EVB 1774
1766mx31bt1 MACH_MX31BT1 MX31BT1 1775
1767atlas4_evb MACH_ATLAS4_EVB ATLAS4_EVB 1776
1768mx31cicada MACH_MX31CICADA MX31CICADA 1777
1769mi424wr MACH_MI424WR MI424WR 1778
1770axs_ultrax MACH_AXS_ULTRAX AXS_ULTRAX 1779
1771at572d940deb MACH_AT572D940DEB AT572D940DEB 1780
1772davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 320davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781
1773ep9302 MACH_EP9302 EP9302 1782
1774at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783 321at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783
1775cybook3 MACH_CYBOOK3 CYBOOK3 1784
1776wdg002 MACH_WDG002 WDG002 1785
1777sg560adsl MACH_SG560ADSL SG560ADSL 1786
1778nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787
1779dove_db MACH_DOVE_DB DOVE_DB 1788 322dove_db MACH_DOVE_DB DOVE_DB 1788
1780marvell_newdb MACH_MARVELL_NEWDB MARVELL_NEWDB 1789
1781vandihud MACH_VANDIHUD VANDIHUD 1790
1782magx_e8 MACH_MAGX_E8 MAGX_E8 1791
1783magx_z6 MACH_MAGX_Z6 MAGX_Z6 1792
1784magx_v8 MACH_MAGX_V8 MAGX_V8 1793
1785magx_u9 MACH_MAGX_U9 MAGX_U9 1794
1786toughcf08 MACH_TOUGHCF08 TOUGHCF08 1795
1787zw4400 MACH_ZW4400 ZW4400 1796
1788marat91 MACH_MARAT91 MARAT91 1797
1789overo MACH_OVERO OVERO 1798 323overo MACH_OVERO OVERO 1798
1790at2440evb MACH_AT2440EVB AT2440EVB 1799 324at2440evb MACH_AT2440EVB AT2440EVB 1799
1791neocore926 MACH_NEOCORE926 NEOCORE926 1800 325neocore926 MACH_NEOCORE926 NEOCORE926 1800
1792wnr854t MACH_WNR854T WNR854T 1801 326wnr854t MACH_WNR854T WNR854T 1801
1793imx27 MACH_IMX27 IMX27 1802
1794moose_db MACH_MOOSE_DB MOOSE_DB 1803
1795fab4 MACH_FAB4 FAB4 1804
1796htcdiamond MACH_HTCDIAMOND HTCDIAMOND 1805
1797fiona MACH_FIONA FIONA 1806
1798mxc30030_x MACH_MXC30030_X MXC30030_X 1807
1799bmp1000 MACH_BMP1000 BMP1000 1808
1800logi9200 MACH_LOGI9200 LOGI9200 1809
1801tqma31 MACH_TQMA31 TQMA31 1810
1802ccw9p9215js MACH_CCW9P9215JS CCW9P9215JS 1811
1803rd88f5181l_ge MACH_RD88F5181L_GE RD88F5181L_GE 1812 327rd88f5181l_ge MACH_RD88F5181L_GE RD88F5181L_GE 1812
1804sifmain MACH_SIFMAIN SIFMAIN 1813
1805sam9_l9261 MACH_SAM9_L9261 SAM9_L9261 1814
1806cc9m2443 MACH_CC9M2443 CC9M2443 1815
1807xaria300 MACH_XARIA300 XARIA300 1816
1808it9200 MACH_IT9200 IT9200 1817
1809rd88f5181l_fxo MACH_RD88F5181L_FXO RD88F5181L_FXO 1818 328rd88f5181l_fxo MACH_RD88F5181L_FXO RD88F5181L_FXO 1818
1810kriss_sensor MACH_KRISS_SENSOR KRISS_SENSOR 1819
1811pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
1812jade MACH_JADE JADE 1821
1813ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
1814gprisc3 MACH_GPRISC3 GPRISC3 1823
1815stamp9g20 MACH_STAMP9G20 STAMP9G20 1824 329stamp9g20 MACH_STAMP9G20 STAMP9G20 1824
1816smdk6430 MACH_SMDK6430 SMDK6430 1825
1817smdkc100 MACH_SMDKC100 SMDKC100 1826 330smdkc100 MACH_SMDKC100 SMDKC100 1826
1818tavorevb MACH_TAVOREVB TAVOREVB 1827 331tavorevb MACH_TAVOREVB TAVOREVB 1827
1819saar MACH_SAAR SAAR 1828 332saar MACH_SAAR SAAR 1828
1820deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829
1821at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830 333at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830
1822linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831
1823hit_b0 MACH_HIT_B0 HIT_B0 1832
1824adx_rmu MACH_ADX_RMU ADX_RMU 1833
1825xg_cpe_main MACH_XG_CPE_MAIN XG_CPE_MAIN 1834
1826edb9407a MACH_EDB9407A EDB9407A 1835
1827dtb9608 MACH_DTB9608 DTB9608 1836
1828em104v1 MACH_EM104V1 EM104V1 1837
1829demo MACH_DEMO DEMO 1838
1830logi9260 MACH_LOGI9260 LOGI9260 1839
1831mx31_exm32 MACH_MX31_EXM32 MX31_EXM32 1840
1832usb_a9g20 MACH_USB_A9G20 USB_A9G20 1841
1833picproje2008 MACH_PICPROJE2008 PICPROJE2008 1842
1834cs_e9315 MACH_CS_E9315 CS_E9315 1843
1835qil_a9g20 MACH_QIL_A9G20 QIL_A9G20 1844
1836sha_pon020 MACH_SHA_PON020 SHA_PON020 1845
1837nad MACH_NAD NAD 1846
1838sbc35_a9260 MACH_SBC35_A9260 SBC35_A9260 1847
1839sbc35_a9g20 MACH_SBC35_A9G20 SBC35_A9G20 1848
1840davinci_beginning MACH_DAVINCI_BEGINNING DAVINCI_BEGINNING 1849
1841uwc MACH_UWC UWC 1850
1842mxlads MACH_MXLADS MXLADS 1851 334mxlads MACH_MXLADS MXLADS 1851
1843htcnike MACH_HTCNIKE HTCNIKE 1852
1844deister_pxa270 MACH_DEISTER_PXA270 DEISTER_PXA270 1853
1845cme9210js MACH_CME9210JS CME9210JS 1854
1846cc9p9360 MACH_CC9P9360 CC9P9360 1855
1847mocha MACH_MOCHA MOCHA 1856
1848wapd170ag MACH_WAPD170AG WAPD170AG 1857
1849linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858 335linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858
1850afeb9260 MACH_AFEB9260 AFEB9260 1859 336afeb9260 MACH_AFEB9260 AFEB9260 1859
1851w90x900 MACH_W90X900 W90X900 1860
1852w90x700 MACH_W90X700 W90X700 1861
1853kt300ip MACH_KT300IP KT300IP 1862
1854kt300ip_g20 MACH_KT300IP_G20 KT300IP_G20 1863
1855srcm MACH_SRCM SRCM 1864
1856wlnx_9260 MACH_WLNX_9260 WLNX_9260 1865
1857openmoko_gta03 MACH_OPENMOKO_GTA03 OPENMOKO_GTA03 1866
1858osprey2 MACH_OSPREY2 OSPREY2 1867
1859kbio9260 MACH_KBIO9260 KBIO9260 1868
1860ginza MACH_GINZA GINZA 1869
1861a636n MACH_A636N A636N 1870
1862imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871 337imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871
1863nemoc MACH_NEMOC NEMOC 1872
1864geneva MACH_GENEVA GENEVA 1873
1865htcpharos MACH_HTCPHAROS HTCPHAROS 1874
1866neonc MACH_NEONC NEONC 1875
1867nas7100 MACH_NAS7100 NAS7100 1876
1868teuphone MACH_TEUPHONE TEUPHONE 1877
1869annax_eth2 MACH_ANNAX_ETH2 ANNAX_ETH2 1878
1870csb733 MACH_CSB733 CSB733 1879
1871bk3 MACH_BK3 BK3 1880
1872omap_em32 MACH_OMAP_EM32 OMAP_EM32 1881
1873et9261cp MACH_ET9261CP ET9261CP 1882
1874jasperc MACH_JASPERC JASPERC 1883
1875issi_arm9 MACH_ISSI_ARM9 ISSI_ARM9 1884
1876ued MACH_UED UED 1885
1877esiblade MACH_ESIBLADE ESIBLADE 1886
1878eye02 MACH_EYE02 EYE02 1887
1879imx27kbd MACH_IMX27KBD IMX27KBD 1888
1880sst61vc010_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889
1881kixvp435 MACH_KIXVP435 KIXVP435 1890
1882kixnp435 MACH_KIXNP435 KIXNP435 1891
1883africa MACH_AFRICA AFRICA 1892
1884nh233 MACH_NH233 NH233 1893
1885rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894 338rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894
1886bcm4760 MACH_BCM4760 BCM4760 1895
1887eddy_v2 MACH_EDDY_V2 EDDY_V2 1896
1888realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897 339realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897
1889hid_a7 MACH_HID_A7 HID_A7 1898
1890hero MACH_HERO HERO 1899
1891omap_poseidon MACH_OMAP_POSEIDON OMAP_POSEIDON 1900
1892realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901 340realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901
1893micro9s MACH_MICRO9S MICRO9S 1902 341micro9s MACH_MICRO9S MICRO9S 1902
1894mako MACH_MAKO MAKO 1903
1895xdaflame MACH_XDAFLAME XDAFLAME 1904
1896phidget_sbc2 MACH_PHIDGET_SBC2 PHIDGET_SBC2 1905
1897limestone MACH_LIMESTONE LIMESTONE 1906
1898iprobe_c32 MACH_IPROBE_C32 IPROBE_C32 1907
1899rut100 MACH_RUT100 RUT100 1908 342rut100 MACH_RUT100 RUT100 1908
1900asusp535 MACH_ASUSP535 ASUSP535 1909
1901htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910
1902sygdg1 MACH_SYGDG1 SYGDG1 1911
1903sygdg2 MACH_SYGDG2 SYGDG2 1912
1904seoul MACH_SEOUL SEOUL 1913
1905salerno MACH_SALERNO SALERNO 1914
1906ucn_s3c64xx MACH_UCN_S3C64XX UCN_S3C64XX 1915
1907msm7201a MACH_MSM7201A MSM7201A 1916
1908lpr1 MACH_LPR1 LPR1 1917
1909armadillo500fx MACH_ARMADILLO500FX ARMADILLO500FX 1918
1910g3evm MACH_G3EVM G3EVM 1919 343g3evm MACH_G3EVM G3EVM 1919
1911z3_dm355 MACH_Z3_DM355 Z3_DM355 1920
1912w90p910evb MACH_W90P910EVB W90P910EVB 1921 344w90p910evb MACH_W90P910EVB W90P910EVB 1921
1913w90p920evb MACH_W90P920EVB W90P920EVB 1922
1914w90p950evb MACH_W90P950EVB W90P950EVB 1923 345w90p950evb MACH_W90P950EVB W90P950EVB 1923
1915w90n960evb MACH_W90N960EVB W90N960EVB 1924 346w90n960evb MACH_W90N960EVB W90N960EVB 1924
1916camhd MACH_CAMHD CAMHD 1925
1917mvc100 MACH_MVC100 MVC100 1926
1918electrum_200 MACH_ELECTRUM_200 ELECTRUM_200 1927
1919htcjade MACH_HTCJADE HTCJADE 1928
1920memphis MACH_MEMPHIS MEMPHIS 1929
1921imx27sbc MACH_IMX27SBC IMX27SBC 1930
1922lextar MACH_LEXTAR LEXTAR 1931
1923mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932 347mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932
1924ncp MACH_NCP NCP 1933 348ncp MACH_NCP NCP 1933
1925z32an_series MACH_Z32AN Z32AN 1934
1926tmq_capd MACH_TMQ_CAPD TMQ_CAPD 1935
1927omap3_wl MACH_OMAP3_WL OMAP3_WL 1936
1928chumby MACH_CHUMBY CHUMBY 1937
1929atsarm9 MACH_ATSARM9 ATSARM9 1938
1930davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939 349davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939
1931bahamas MACH_BAHAMAS BAHAMAS 1940
1932das MACH_DAS DAS 1941
1933minidas MACH_MINIDAS MINIDAS 1942
1934vk1000 MACH_VK1000 VK1000 1943
1935centro MACH_CENTRO CENTRO 1944 350centro MACH_CENTRO CENTRO 1944
1936ctera_2bay MACH_CTERA_2BAY CTERA_2BAY 1945
1937edgeconnect MACH_EDGECONNECT EDGECONNECT 1946
1938nd27000 MACH_ND27000 ND27000 1947
1939cobra MACH_GEMALTO_COBRA GEMALTO_COBRA 1948
1940ingelabs_comet MACH_INGELABS_COMET INGELABS_COMET 1949
1941pollux_wiz MACH_POLLUX_WIZ POLLUX_WIZ 1950
1942blackstone MACH_BLACKSTONE BLACKSTONE 1951
1943topaz MACH_TOPAZ TOPAZ 1952
1944aixle MACH_AIXLE AIXLE 1953
1945mw998 MACH_MW998 MW998 1954
1946nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955 351nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955
1947vsc5605ev MACH_VSC5605EV VSC5605EV 1956
1948nt98700dk MACH_NT98700DK NT98700DK 1957
1949icontact MACH_ICONTACT ICONTACT 1958
1950swarco_frcpu MACH_SWARCO_FRCPU SWARCO_FRCPU 1959
1951swarco_scpu MACH_SWARCO_SCPU SWARCO_SCPU 1960
1952bbox_p16 MACH_BBOX_P16 BBOX_P16 1961
1953bstd MACH_BSTD BSTD 1962
1954sbc2440ii MACH_SBC2440II SBC2440II 1963
1955pcm034 MACH_PCM034 PCM034 1964
1956neso MACH_NESO NESO 1965
1957wlnx_9g20 MACH_WLNX_9G20 WLNX_9G20 1966
1958omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967 352omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967
1959totemnova MACH_TOTEMNOVA TOTEMNOVA 1968
1960c5000 MACH_C5000 C5000 1969
1961unipo_at91sam9263 MACH_UNIPO_AT91SAM9263 UNIPO_AT91SAM9263 1970
1962ethernut5 MACH_ETHERNUT5 ETHERNUT5 1971
1963arm11 MACH_ARM11 ARM11 1972
1964cpuat9260 MACH_CPUAT9260 CPUAT9260 1973 353cpuat9260 MACH_CPUAT9260 CPUAT9260 1973
1965cpupxa255 MACH_CPUPXA255 CPUPXA255 1974
1966eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975 354eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975
1967cheflux MACH_CHEFLUX CHEFLUX 1976
1968eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977
1969opcotec MACH_OPCOTEC OPCOTEC 1978
1970yt MACH_YT YT 1979
1971motoq MACH_MOTOQ MOTOQ 1980
1972bsb1 MACH_BSB1 BSB1 1981
1973acs5k MACH_ACS5K ACS5K 1982 355acs5k MACH_ACS5K ACS5K 1982
1974milan MACH_MILAN MILAN 1983
1975quartzv2 MACH_QUARTZV2 QUARTZV2 1984
1976rsvp MACH_RSVP RSVP 1985
1977rmp200 MACH_RMP200 RMP200 1986
1978snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987 356snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987
1979dsm320 MACH_DSM320 DSM320 1988 357dsm320 MACH_DSM320 DSM320 1988
1980adsgcm MACH_ADSGCM ADSGCM 1989
1981ase2_400 MACH_ASE2_400 ASE2_400 1990
1982pizza MACH_PIZZA PIZZA 1991
1983spot_ngpl MACH_SPOT_NGPL SPOT_NGPL 1992
1984armata MACH_ARMATA ARMATA 1993
1985exeda MACH_EXEDA EXEDA 1994 358exeda MACH_EXEDA EXEDA 1994
1986mx31sf005 MACH_MX31SF005 MX31SF005 1995
1987f5d8231_4_v2 MACH_F5D8231_4_V2 F5D8231_4_V2 1996
1988q2440 MACH_Q2440 Q2440 1997
1989qq2440 MACH_QQ2440 QQ2440 1998
1990mini2440 MACH_MINI2440 MINI2440 1999 359mini2440 MACH_MINI2440 MINI2440 1999
1991colibri300 MACH_COLIBRI300 COLIBRI300 2000 360colibri300 MACH_COLIBRI300 COLIBRI300 2000
1992jades MACH_JADES JADES 2001
1993spark MACH_SPARK SPARK 2002
1994benzina MACH_BENZINA BENZINA 2003
1995blaze MACH_BLAZE BLAZE 2004
1996linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005 361linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005
1997htckovsky MACH_HTCKOVSKY HTCKOVSKY 2006
1998sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007
1999hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008
2000sapphira MACH_SAPPHIRA SAPPHIRA 2009
2001dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010
2002armbox MACH_ARMBOX ARMBOX 2011
2003harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012
2004ribaldo MACH_RIBALDO RIBALDO 2013
2005agora MACH_AGORA AGORA 2014
2006omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015
2007a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016
2008usg2410 MACH_USG2410 USG2410 2017
2009pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018
2010mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019
2011topas910 MACH_TOPAS910 TOPAS910 2020
2012hyena MACH_HYENA HYENA 2021
2013pospax MACH_POSPAX POSPAX 2022
2014hdl_gx MACH_HDL_GX HDL_GX 2023
2015ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024
2016ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025
2017crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026
2018egauge2 MACH_EGAUGE2 EGAUGE2 2027
2019didj MACH_DIDJ DIDJ 2028
2020m_s3c2443 MACH_MEISTER MEISTER 2029
2021htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030
2022cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031 362cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031
2023smdk6440 MACH_SMDK6440 SMDK6440 2032 363smdk6440 MACH_SMDK6440 SMDK6440 2032
2024omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033
2025ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034
2026pvg610_100 MACH_PVG610 PVG610 2035
2027hprw6815 MACH_HPRW6815 HPRW6815 2036
2028omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037
2029nas4220b MACH_NAS4220B NAS4220B 2038 364nas4220b MACH_NAS4220B NAS4220B 2038
2030htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039
2031htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040
2032scaler MACH_SCALER SCALER 2041
2033zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042 365zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042
2034aspenite MACH_ASPENITE ASPENITE 2043 366aspenite MACH_ASPENITE ASPENITE 2043
2035teton MACH_TETON TETON 2044
2036ttc_dkb MACH_TTC_DKB TTC_DKB 2045 367ttc_dkb MACH_TTC_DKB TTC_DKB 2045
2037bishop2 MACH_BISHOP2 BISHOP2 2046
2038ippv5 MACH_IPPV5 IPPV5 2047
2039farm926 MACH_FARM926 FARM926 2048
2040mmccpu MACH_MMCCPU MMCCPU 2049
2041sgmsfl MACH_SGMSFL SGMSFL 2050
2042tt8000 MACH_TT8000 TT8000 2051
2043zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052
2044mptc MACH_MPTC MPTC 2053
2045h6051 MACH_H6051 H6051 2054
2046pvg610_101 MACH_PVG610_101 PVG610_101 2055
2047stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056
2048pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057
2049tny_a9260 MACH_TNY_A9260 TNY_A9260 2058
2050tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059
2051aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060
2052dx900 MACH_DX900 DX900 2061
2053cpodc2 MACH_CPODC2 CPODC2 2062
2054tilt_8925 MACH_TILT_8925 TILT_8925 2063
2055davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064
2056swordfish MACH_SWORDFISH SWORDFISH 2065
2057corvus MACH_CORVUS CORVUS 2066
2058taurus MACH_TAURUS TAURUS 2067
2059axm MACH_AXM AXM 2068
2060axc MACH_AXC AXC 2069
2061baby MACH_BABY BABY 2070
2062mp200 MACH_MP200 MP200 2071
2063pcm043 MACH_PCM043 PCM043 2072 368pcm043 MACH_PCM043 PCM043 2072
2064hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073
2065kbk9g20 MACH_KBK9G20 KBK9G20 2074
2066adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075
2067avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076
2068suc82x MACH_SUC SUC 2077
2069at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078
2070mendoza MACH_MENDOZA MENDOZA 2079
2071kira MACH_KIRA KIRA 2080
2072mx1hbm MACH_MX1HBM MX1HBM 2081
2073quatro43xx MACH_QUATRO43XX QUATRO43XX 2082
2074quatro4230 MACH_QUATRO4230 QUATRO4230 2083
2075nsb400 MACH_NSB400 NSB400 2084
2076drp255 MACH_DRP255 DRP255 2085
2077thoth MACH_THOTH THOTH 2086
2078firestone MACH_FIRESTONE FIRESTONE 2087
2079asusp750 MACH_ASUSP750 ASUSP750 2088
2080ctera_dl MACH_CTERA_DL CTERA_DL 2089
2081socr MACH_SOCR SOCR 2090
2082htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091
2083heroc MACH_HEROC HEROC 2092
2084zeno6800 MACH_ZENO6800 ZENO6800 2093
2085sc2mcs MACH_SC2MCS SC2MCS 2094
2086gene100 MACH_GENE100 GENE100 2095
2087as353x MACH_AS353X AS353X 2096
2088sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097 369sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097
2089at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098
2090mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099
2091cc9200 MACH_CC9200 CC9200 2100
2092sm9200 MACH_SM9200 SM9200 2101
2093tp9200 MACH_TP9200 TP9200 2102
2094snapperdv MACH_SNAPPERDV SNAPPERDV 2103
2095avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104 370avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104
2096avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105
2097omap3axon MACH_OMAP3AXON OMAP3AXON 2106
2098ma8xx MACH_MA8XX MA8XX 2107
2099mp201ek MACH_MP201EK MP201EK 2108
2100davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109
2101mpa1600 MACH_MPA1600 MPA1600 2110
2102pelco_troy MACH_PELCO_TROY PELCO_TROY 2111
2103nsb667 MACH_NSB667 NSB667 2112
2104rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113
2105twocom MACH_TWOCOM TWOCOM 2114
2106ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115
2107hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116
2108afeusb MACH_AFEUSB AFEUSB 2117
2109t830 MACH_T830 T830 2118
2110spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119
2111om_3d7k MACH_OM_3D7K OM_3D7K 2120
2112picocom2 MACH_PICOCOM2 PICOCOM2 2121
2113uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122
2114uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123
2115cherry MACH_CHERRY CHERRY 2124
2116mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125 371mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125
2117s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126
2118tx37 MACH_TX37 TX37 2127
2119sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128
2120benzglb MACH_BENZGLB BENZGLB 2129
2121benztd MACH_BENZTD BENZTD 2130
2122cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131
2123solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132
2124mx27wallace MACH_MX27WALLACE MX27WALLACE 2133
2125fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134
2126rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135 372rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135
2127smallogger MACH_SMALLOGGER SMALLOGGER 2136
2128ccw9p9215 MACH_CCW9P9215 CCW9P9215 2137
2129dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138 373dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138
2130ts219 MACH_TS219 TS219 2139 374ts219 MACH_TS219 TS219 2139
2131tny_a9263 MACH_TNY_A9263 TNY_A9263 2140
2132apollo MACH_APOLLO APOLLO 2141
2133at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142
2134spc300 MACH_SPC300 SPC300 2143
2135eko MACH_EKO EKO 2144
2136ccw9m2443 MACH_CCW9M2443 CCW9M2443 2145
2137ccw9m2443js MACH_CCW9M2443JS CCW9M2443JS 2146
2138m2m_router_device MACH_M2M_ROUTER_DEVICE M2M_ROUTER_DEVICE 2147
2139str9104nas MACH_STAR9104NAS STAR9104NAS 2148
2140pca100 MACH_PCA100 PCA100 2149 375pca100 MACH_PCA100 PCA100 2149
2141z3_dm365_mod_01 MACH_Z3_DM365_MOD_01 Z3_DM365_MOD_01 2150
2142hipox MACH_HIPOX HIPOX 2151
2143omap3_piteds MACH_OMAP3_PITEDS OMAP3_PITEDS 2152
2144bm150r MACH_BM150R BM150R 2153
2145tbone MACH_TBONE TBONE 2154
2146merlin MACH_MERLIN MERLIN 2155
2147falcon MACH_FALCON FALCON 2156
2148davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157 376davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157
2149s5p6440 MACH_S5P6440 S5P6440 2158
2150at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159 377at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159
2151omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160 378omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160
2152lpc313x MACH_LPC313X LPC313X 2161
2153magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162 379magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162
2154magx_em30 MACH_MAGX_EM30 MAGX_EM30 2163
2155magx_ve66 MACH_MAGX_VE66 MAGX_VE66 2164
2156meesc MACH_MEESC MEESC 2165
2157otc570 MACH_OTC570 OTC570 2166
2158bcu2412 MACH_BCU2412 BCU2412 2167
2159beacon MACH_BEACON BEACON 2168
2160actia_tgw MACH_ACTIA_TGW ACTIA_TGW 2169
2161e4430 MACH_E4430 E4430 2170
2162ql300 MACH_QL300 QL300 2171
2163btmavb101 MACH_BTMAVB101 BTMAVB101 2172
2164btmawb101 MACH_BTMAWB101 BTMAWB101 2173
2165sq201 MACH_SQ201 SQ201 2174
2166quatro45xx MACH_QUATRO45XX QUATRO45XX 2175
2167openpad MACH_OPENPAD OPENPAD 2176
2168tx25 MACH_TX25 TX25 2177
2169omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178 380omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178
2170htcraphael_k MACH_HTCRAPHAEL_K HTCRAPHAEL_K 2179
2171lal43 MACH_LAL43 LAL43 2181
2172htcraphael_cdma500 MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500 2182
2173anw6410 MACH_ANW6410 ANW6410 2183 381anw6410 MACH_ANW6410 ANW6410 2183
2174htcprophet MACH_HTCPROPHET HTCPROPHET 2185
2175cfa_10022 MACH_CFA_10022 CFA_10022 2186
2176imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187 382imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187
2177px2imx27 MACH_PX2IMX27 PX2IMX27 2188
2178stm3210e_eval MACH_STM3210E_EVAL STM3210E_EVAL 2189
2179dvs10 MACH_DVS10 DVS10 2190
2180portuxg20 MACH_PORTUXG20 PORTUXG20 2191 383portuxg20 MACH_PORTUXG20 PORTUXG20 2191
2181arm_spv MACH_ARM_SPV ARM_SPV 2192
2182smdkc110 MACH_SMDKC110 SMDKC110 2193 384smdkc110 MACH_SMDKC110 SMDKC110 2193
2183cabespresso MACH_CABESPRESSO CABESPRESSO 2194
2184hmc800 MACH_HMC800 HMC800 2195
2185sholes MACH_SHOLES SHOLES 2196
2186btmxc31 MACH_BTMXC31 BTMXC31 2197
2187dt501 MACH_DT501 DT501 2198
2188ktx MACH_KTX KTX 2199
2189omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200 385omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200
2190netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201 386netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201
2191netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202 387netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202
2192d2net_v2 MACH_D2NET_V2 D2NET_V2 2203 388d2net_v2 MACH_D2NET_V2 D2NET_V2 2203
2193net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204 389net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204
2194net4big_v2 MACH_NET4BIG_V2 NET4BIG_V2 2205
2195net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206 390net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206
2196endb2443 MACH_ENDB2443 ENDB2443 2207
2197inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208 391inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208
2198tros MACH_TROS TROS 2209
2199pelco_homer MACH_PELCO_HOMER PELCO_HOMER 2210
2200ofsp8 MACH_OFSP8 OFSP8 2211
2201at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212 392at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212
2202guf_cupid MACH_GUF_CUPID GUF_CUPID 2213
2203eab1r MACH_EAB1R EAB1R 2214
2204desirec MACH_DESIREC DESIREC 2215
2205cordoba MACH_CORDOBA CORDOBA 2216
2206irvine MACH_IRVINE IRVINE 2217
2207sff772 MACH_SFF772 SFF772 2218
2208pelco_milano MACH_PELCO_MILANO PELCO_MILANO 2219
2209pc7302 MACH_PC7302 PC7302 2220 393pc7302 MACH_PC7302 PC7302 2220
2210bip6000 MACH_BIP6000 BIP6000 2221
2211silvermoon MACH_SILVERMOON SILVERMOON 2222
2212vc0830 MACH_VC0830 VC0830 2223
2213dt430 MACH_DT430 DT430 2224
2214ji42pf MACH_JI42PF JI42PF 2225
2215gnet_ksm MACH_GNET_KSM GNET_KSM 2226
2216gnet_sgm MACH_GNET_SGM GNET_SGM 2227
2217gnet_sgr MACH_GNET_SGR GNET_SGR 2228
2218omap3_icetekevm MACH_OMAP3_ICETEKEVM OMAP3_ICETEKEVM 2229
2219pnp MACH_PNP PNP 2230
2220ctera_2bay_k MACH_CTERA_2BAY_K CTERA_2BAY_K 2231
2221ctera_2bay_u MACH_CTERA_2BAY_U CTERA_2BAY_U 2232
2222sas_c MACH_SAS_C SAS_C 2233
2223vma2315 MACH_VMA2315 VMA2315 2234
2224vcs MACH_VCS VCS 2235
2225spear600 MACH_SPEAR600 SPEAR600 2236 394spear600 MACH_SPEAR600 SPEAR600 2236
2226spear300 MACH_SPEAR300 SPEAR300 2237 395spear300 MACH_SPEAR300 SPEAR300 2237
2227spear1300 MACH_SPEAR1300 SPEAR1300 2238
2228lilly1131 MACH_LILLY1131 LILLY1131 2239 396lilly1131 MACH_LILLY1131 LILLY1131 2239
2229arvoo_ax301 MACH_ARVOO_AX301 ARVOO_AX301 2240
2230mapphone MACH_MAPPHONE MAPPHONE 2241
2231legend MACH_LEGEND LEGEND 2242
2232salsa MACH_SALSA SALSA 2243
2233lounge MACH_LOUNGE LOUNGE 2244
2234vision MACH_VISION VISION 2245
2235vmb20 MACH_VMB20 VMB20 2246
2236hy2410 MACH_HY2410 HY2410 2247
2237hy9315 MACH_HY9315 HY9315 2248
2238bullwinkle MACH_BULLWINKLE BULLWINKLE 2249
2239arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
2240vs_v210 MACH_VS_V210 VS_V210 2252
2241vs_v212 MACH_VS_V212 VS_V212 2253
2242hmt MACH_HMT HMT 2254 397hmt MACH_HMT HMT 2254
2243km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
2244vesper MACH_VESPER VESPER 2256
2245str9 MACH_STR9 STR9 2257
2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
2247simcom MACH_SIMCOM SIMCOM 2259
2248mcwebio MACH_MCWEBIO MCWEBIO 2260
2249omap3_phrazer MACH_OMAP3_PHRAZER OMAP3_PHRAZER 2261
2250darwin MACH_DARWIN DARWIN 2262
2251oratiscomu MACH_ORATISCOMU ORATISCOMU 2263
2252rtsbc20 MACH_RTSBC20 RTSBC20 2264
2253sgh_i780 MACH_I780 I780 2265
2254gemini324 MACH_GEMINI324 GEMINI324 2266
2255oratislan MACH_ORATISLAN ORATISLAN 2267
2256oratisalog MACH_ORATISALOG ORATISALOG 2268
2257oratismadi MACH_ORATISMADI ORATISMADI 2269
2258oratisot16 MACH_ORATISOT16 ORATISOT16 2270
2259oratisdesk MACH_ORATISDESK ORATISDESK 2271
2260vexpress MACH_VEXPRESS VEXPRESS 2272 398vexpress MACH_VEXPRESS VEXPRESS 2272
2261sintexo MACH_SINTEXO SINTEXO 2273
2262cm3389 MACH_CM3389 CM3389 2274
2263omap3_cio MACH_OMAP3_CIO OMAP3_CIO 2275
2264sgh_i900 MACH_SGH_I900 SGH_I900 2276
2265bst100 MACH_BST100 BST100 2277
2266passion MACH_PASSION PASSION 2278
2267indesign_at91sam MACH_INDESIGN_AT91SAM INDESIGN_AT91SAM 2279
2268c4_badger MACH_C4_BADGER C4_BADGER 2280
2269c4_viper MACH_C4_VIPER C4_VIPER 2281
2270d2net MACH_D2NET D2NET 2282 399d2net MACH_D2NET D2NET 2282
2271bigdisk MACH_BIGDISK BIGDISK 2283 400bigdisk MACH_BIGDISK BIGDISK 2283
2272notalvision MACH_NOTALVISION NOTALVISION 2284
2273omap3_kboc MACH_OMAP3_KBOC OMAP3_KBOC 2285
2274cyclone MACH_CYCLONE CYCLONE 2286
2275ninja MACH_NINJA NINJA 2287
2276at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288 401at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288
2277bcmring MACH_BCMRING BCMRING 2289 402bcmring MACH_BCMRING BCMRING 2289
2278resol_dl2 MACH_RESOL_DL2 RESOL_DL2 2290
2279ifosw MACH_IFOSW IFOSW 2291
2280htcrhodium MACH_HTCRHODIUM HTCRHODIUM 2292
2281htctopaz MACH_HTCTOPAZ HTCTOPAZ 2293
2282matrix504 MACH_MATRIX504 MATRIX504 2294
2283mrfsa MACH_MRFSA MRFSA 2295
2284sc_p270 MACH_SC_P270 SC_P270 2296
2285atlas5_evb MACH_ATLAS5_EVB ATLAS5_EVB 2297
2286pelco_lobox MACH_PELCO_LOBOX PELCO_LOBOX 2298
2287dilax_pcu200 MACH_DILAX_PCU200 DILAX_PCU200 2299
2288leonardo MACH_LEONARDO LEONARDO 2300
2289zoran_approach7 MACH_ZORAN_APPROACH7 ZORAN_APPROACH7 2301
2290dp6xx MACH_DP6XX DP6XX 2302
2291bcm2153_vesper MACH_BCM2153_VESPER BCM2153_VESPER 2303
2292mahimahi MACH_MAHIMAHI MAHIMAHI 2304 403mahimahi MACH_MAHIMAHI MAHIMAHI 2304
2293clickc MACH_CLICKC CLICKC 2305
2294zb_gateway MACH_ZB_GATEWAY ZB_GATEWAY 2306
2295tazcard MACH_TAZCARD TAZCARD 2307
2296tazdev MACH_TAZDEV TAZDEV 2308
2297annax_cb_arm MACH_ANNAX_CB_ARM ANNAX_CB_ARM 2309
2298annax_dm3 MACH_ANNAX_DM3 ANNAX_DM3 2310
2299cerebric MACH_CEREBRIC CEREBRIC 2311
2300orca MACH_ORCA ORCA 2312
2301pc9260 MACH_PC9260 PC9260 2313
2302ems285a MACH_EMS285A EMS285A 2314
2303gec2410 MACH_GEC2410 GEC2410 2315
2304gec2440 MACH_GEC2440 GEC2440 2316
2305mw903 MACH_ARCH_MW903 ARCH_MW903 2317
2306mw2440 MACH_MW2440 MW2440 2318
2307ecac2378 MACH_ECAC2378 ECAC2378 2319
2308tazkiosk MACH_TAZKIOSK TAZKIOSK 2320
2309whiterabbit_mch MACH_WHITERABBIT_MCH WHITERABBIT_MCH 2321
2310sbox9263 MACH_SBOX9263 SBOX9263 2322
2311oreo MACH_OREO OREO 2323
2312smdk6442 MACH_SMDK6442 SMDK6442 2324 404smdk6442 MACH_SMDK6442 SMDK6442 2324
2313openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325 405openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325
2314incredible MACH_INCREDIBLE INCREDIBLE 2326
2315incrediblec MACH_INCREDIBLEC INCREDIBLEC 2327
2316heroct MACH_HEROCT HEROCT 2328
2317mmnet1000 MACH_MMNET1000 MMNET1000 2329
2318devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330 406devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330
2319devkit9000 MACH_DEVKIT9000 DEVKIT9000 2331
2320mx31txtr MACH_MX31TXTR MX31TXTR 2332
2321u380 MACH_U380 U380 2333
2322oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334
2323npcmx50 MACH_NPCMX50 NPCMX50 2335
2324mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336 407mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336
2325mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337
2326riom MACH_RIOM RIOM 2338
2327comcas MACH_COMCAS COMCAS 2339
2328wsi_mx27 MACH_WSI_MX27 WSI_MX27 2340
2329cm_t35 MACH_CM_T35 CM_T35 2341 408cm_t35 MACH_CM_T35 CM_T35 2341
2330net2big MACH_NET2BIG NET2BIG 2342 409net2big MACH_NET2BIG NET2BIG 2342
2331motorola_a1600 MACH_MOTOROLA_A1600 MOTOROLA_A1600 2343
2332igep0020 MACH_IGEP0020 IGEP0020 2344 410igep0020 MACH_IGEP0020 IGEP0020 2344
2333igep0010 MACH_IGEP0010 IGEP0010 2345
2334mv6281gtwge2 MACH_MV6281GTWGE2 MV6281GTWGE2 2346
2335scat100 MACH_SCAT100 SCAT100 2347
2336sanmina MACH_SANMINA SANMINA 2348
2337momento MACH_MOMENTO MOMENTO 2349
2338nuc9xx MACH_NUC9XX NUC9XX 2350
2339nuc910evb MACH_NUC910EVB NUC910EVB 2351
2340nuc920evb MACH_NUC920EVB NUC920EVB 2352
2341nuc950evb MACH_NUC950EVB NUC950EVB 2353
2342nuc945evb MACH_NUC945EVB NUC945EVB 2354
2343nuc960evb MACH_NUC960EVB NUC960EVB 2355
2344nuc932evb MACH_NUC932EVB NUC932EVB 2356 411nuc932evb MACH_NUC932EVB NUC932EVB 2356
2345nuc900 MACH_NUC900 NUC900 2357
2346sd1soc MACH_SD1SOC SD1SOC 2358
2347ln2440bc MACH_LN2440BC LN2440BC 2359
2348rsbc MACH_RSBC RSBC 2360
2349openrd_client MACH_OPENRD_CLIENT OPENRD_CLIENT 2361 412openrd_client MACH_OPENRD_CLIENT OPENRD_CLIENT 2361
2350hpipaq11x MACH_HPIPAQ11X HPIPAQ11X 2362
2351wayland MACH_WAYLAND WAYLAND 2363
2352acnbsx102 MACH_ACNBSX102 ACNBSX102 2364
2353hwat91 MACH_HWAT91 HWAT91 2365
2354at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366
2355csb732 MACH_CSB732 CSB732 2367
2356u8500 MACH_U8500 U8500 2368 413u8500 MACH_U8500 U8500 2368
2357huqiu MACH_HUQIU HUQIU 2369
2358mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370 414mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370
2359pmt1g MACH_PMT1G PMT1G 2371
2360htcelf MACH_HTCELF HTCELF 2372
2361armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373
2362armadillo440 MACH_ARMADILLO440 ARMADILLO440 2374
2363u_chip_dual_arm MACH_U_CHIP_DUAL_ARM U_CHIP_DUAL_ARM 2375
2364csr_bdb3 MACH_CSR_BDB3 CSR_BDB3 2376
2365dolby_cat1018 MACH_DOLBY_CAT1018 DOLBY_CAT1018 2377
2366hy9307 MACH_HY9307 HY9307 2378
2367aspire_easystore MACH_A_ES A_ES 2379
2368davinci_irif MACH_DAVINCI_IRIF DAVINCI_IRIF 2380
2369agama9263 MACH_AGAMA9263 AGAMA9263 2381
2370marvell_jasper MACH_MARVELL_JASPER MARVELL_JASPER 2382 415marvell_jasper MACH_MARVELL_JASPER MARVELL_JASPER 2382
2371flint MACH_FLINT FLINT 2383 416flint MACH_FLINT FLINT 2383
2372tavorevb3 MACH_TAVOREVB3 TAVOREVB3 2384 417tavorevb3 MACH_TAVOREVB3 TAVOREVB3 2384
2373sch_m490 MACH_SCH_M490 SCH_M490 2386
2374rbl01 MACH_RBL01 RBL01 2387
2375omnifi MACH_OMNIFI OMNIFI 2388
2376otavalo MACH_OTAVALO OTAVALO 2389
2377sienna MACH_SIENNA SIENNA 2390
2378htc_excalibur_s620 MACH_HTC_EXCALIBUR_S620 HTC_EXCALIBUR_S620 2391
2379htc_opal MACH_HTC_OPAL HTC_OPAL 2392
2380touchbook MACH_TOUCHBOOK TOUCHBOOK 2393 418touchbook MACH_TOUCHBOOK TOUCHBOOK 2393
2381latte MACH_LATTE LATTE 2394
2382xa200 MACH_XA200 XA200 2395
2383nimrod MACH_NIMROD NIMROD 2396
2384cc9p9215_3g MACH_CC9P9215_3G CC9P9215_3G 2397
2385cc9p9215_3gjs MACH_CC9P9215_3GJS CC9P9215_3GJS 2398
2386tk71 MACH_TK71 TK71 2399
2387comham3525 MACH_COMHAM3525 COMHAM3525 2400
2388mx31erebus MACH_MX31EREBUS MX31EREBUS 2401
2389mcardmx27 MACH_MCARDMX27 MCARDMX27 2402
2390paradise MACH_PARADISE PARADISE 2403
2391tide MACH_TIDE TIDE 2404
2392wzl2440 MACH_WZL2440 WZL2440 2405
2393sdrdemo MACH_SDRDEMO SDRDEMO 2406
2394ethercan2 MACH_ETHERCAN2 ETHERCAN2 2407
2395ecmimg20 MACH_ECMIMG20 ECMIMG20 2408
2396omap_dragon MACH_OMAP_DRAGON OMAP_DRAGON 2409
2397halo MACH_HALO HALO 2410
2398huangshan MACH_HUANGSHAN HUANGSHAN 2411
2399vl_ma2sc MACH_VL_MA2SC VL_MA2SC 2412
2400raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413 419raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413
2401raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414 420raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414
2402raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415 421raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415
2403multibus_master MACH_MULTIBUS_MASTER MULTIBUS_MASTER 2416
2404multibus_pbk MACH_MULTIBUS_PBK MULTIBUS_PBK 2417
2405tnetv107x MACH_TNETV107X TNETV107X 2418 422tnetv107x MACH_TNETV107X TNETV107X 2418
2406snake MACH_SNAKE SNAKE 2419
2407cwmx27 MACH_CWMX27 CWMX27 2420
2408sch_m480 MACH_SCH_M480 SCH_M480 2421
2409platypus MACH_PLATYPUS PLATYPUS 2422
2410pss2 MACH_PSS2 PSS2 2423
2411davinci_apm150 MACH_DAVINCI_APM150 DAVINCI_APM150 2424
2412str9100 MACH_STR9100 STR9100 2425
2413net5big MACH_NET5BIG NET5BIG 2426
2414seabed9263 MACH_SEABED9263 SEABED9263 2427
2415mx51_m2id MACH_MX51_M2ID MX51_M2ID 2428
2416octvocplus_eb MACH_OCTVOCPLUS_EB OCTVOCPLUS_EB 2429
2417klk_firefox MACH_KLK_FIREFOX KLK_FIREFOX 2430
2418klk_wirma_module MACH_KLK_WIRMA_MODULE KLK_WIRMA_MODULE 2431
2419klk_wirma_mmi MACH_KLK_WIRMA_MMI KLK_WIRMA_MMI 2432
2420supersonic MACH_SUPERSONIC SUPERSONIC 2433
2421liberty MACH_LIBERTY LIBERTY 2434
2422mh355 MACH_MH355 MH355 2435
2423pc7802 MACH_PC7802 PC7802 2436
2424gnet_sgc MACH_GNET_SGC GNET_SGC 2437
2425einstein15 MACH_EINSTEIN15 EINSTEIN15 2438
2426cmpd MACH_CMPD CMPD 2439
2427davinci_hase1 MACH_DAVINCI_HASE1 DAVINCI_HASE1 2440
2428lgeincitephone MACH_LGEINCITEPHONE LGEINCITEPHONE 2441
2429ea313x MACH_EA313X EA313X 2442
2430fwbd_39064 MACH_FWBD_39064 FWBD_39064 2443
2431fwbd_390128 MACH_FWBD_390128 FWBD_390128 2444
2432pelco_moe MACH_PELCO_MOE PELCO_MOE 2445
2433minimix27 MACH_MINIMIX27 MINIMIX27 2446
2434omap3_thunder MACH_OMAP3_THUNDER OMAP3_THUNDER 2447
2435passionc MACH_PASSIONC PASSIONC 2448
2436mx27amata MACH_MX27AMATA MX27AMATA 2449
2437bgat1 MACH_BGAT1 BGAT1 2450
2438buzz MACH_BUZZ BUZZ 2451
2439mb9g20 MACH_MB9G20 MB9G20 2452
2440yushan MACH_YUSHAN YUSHAN 2453
2441lizard MACH_LIZARD LIZARD 2454
2442omap3polycom MACH_OMAP3POLYCOM OMAP3POLYCOM 2455
2443smdkv210 MACH_SMDKV210 SMDKV210 2456 423smdkv210 MACH_SMDKV210 SMDKV210 2456
2444bravo MACH_BRAVO BRAVO 2457
2445siogentoo1 MACH_SIOGENTOO1 SIOGENTOO1 2458
2446siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459
2447sm3k MACH_SM3K SM3K 2460
2448acer_tempo_f900 MACH_ACER_TEMPO_F900 ACER_TEMPO_F900 2461
2449sst61vc010_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462
2450glittertind MACH_GLITTERTIND GLITTERTIND 2463
2451omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 424omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464
2452omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465 425omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465
2453cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466
2454torino_s MACH_TORINO_S TORINO_S 2467
2455havana MACH_HAVANA HAVANA 2468
2456beaumont_11 MACH_BEAUMONT_11 BEAUMONT_11 2469
2457vanguard MACH_VANGUARD VANGUARD 2470
2458s5pc110_draco MACH_S5PC110_DRACO S5PC110_DRACO 2471
2459cartesio_two MACH_CARTESIO_TWO CARTESIO_TWO 2472
2460aster MACH_ASTER ASTER 2473
2461voguesv210 MACH_VOGUESV210 VOGUESV210 2474
2462acm500x MACH_ACM500X ACM500X 2475
2463km9260 MACH_KM9260 KM9260 2476
2464nideflexg1 MACH_NIDEFLEXG1 NIDEFLEXG1 2477
2465ctera_plug_io MACH_CTERA_PLUG_IO CTERA_PLUG_IO 2478
2466smartq7 MACH_SMARTQ7 SMARTQ7 2479 426smartq7 MACH_SMARTQ7 SMARTQ7 2479
2467at91sam9g10ek2 MACH_AT91SAM9G10EK2 AT91SAM9G10EK2 2480
2468asusp527 MACH_ASUSP527 ASUSP527 2481
2469at91sam9g20mpm2 MACH_AT91SAM9G20MPM2 AT91SAM9G20MPM2 2482
2470topasa900 MACH_TOPASA900 TOPASA900 2483
2471electrum_100 MACH_ELECTRUM_100 ELECTRUM_100 2484
2472mx51grb MACH_MX51GRB MX51GRB 2485
2473xea300 MACH_XEA300 XEA300 2486
2474htcstartrek MACH_HTCSTARTREK HTCSTARTREK 2487
2475lima MACH_LIMA LIMA 2488
2476csb740 MACH_CSB740 CSB740 2489
2477usb_s8815 MACH_USB_S8815 USB_S8815 2490
2478watson_efm_plugin MACH_WATSON_EFM_PLUGIN WATSON_EFM_PLUGIN 2491
2479milkyway MACH_MILKYWAY MILKYWAY 2492
2480g4evm MACH_G4EVM G4EVM 2493 427g4evm MACH_G4EVM G4EVM 2493
2481picomod6 MACH_PICOMOD6 PICOMOD6 2494
2482omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495 428omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495
2483ip6000 MACH_IP6000 IP6000 2496
2484ip6010 MACH_IP6010 IP6010 2497
2485utm400 MACH_UTM400 UTM400 2498
2486omap3_zybex MACH_OMAP3_ZYBEX OMAP3_ZYBEX 2499
2487wireless_space MACH_WIRELESS_SPACE WIRELESS_SPACE 2500
2488sx560 MACH_SX560 SX560 2501
2489ts41x MACH_TS41X TS41X 2502 429ts41x MACH_TS41X TS41X 2502
2490elphel10373 MACH_ELPHEL10373 ELPHEL10373 2503
2491rhobot MACH_RHOBOT RHOBOT 2504
2492mx51_refresh MACH_MX51_REFRESH MX51_REFRESH 2505
2493ls9260 MACH_LS9260 LS9260 2506
2494shank MACH_SHANK SHANK 2507
2495qsd8x50_st1 MACH_QSD8X50_ST1 QSD8X50_ST1 2508
2496at91sam9m10ekes MACH_AT91SAM9M10EKES AT91SAM9M10EKES 2509
2497hiram MACH_HIRAM HIRAM 2510
2498phy3250 MACH_PHY3250 PHY3250 2511 430phy3250 MACH_PHY3250 PHY3250 2511
2499ea3250 MACH_EA3250 EA3250 2512
2500fdi3250 MACH_FDI3250 FDI3250 2513
2501whitestone MACH_WHITESTONE WHITESTONE 2514
2502at91sam9263nit MACH_AT91SAM9263NIT AT91SAM9263NIT 2515
2503ccmx51 MACH_CCMX51 CCMX51 2516
2504ccmx51js MACH_CCMX51JS CCMX51JS 2517
2505ccwmx51 MACH_CCWMX51 CCWMX51 2518
2506ccwmx51js MACH_CCWMX51JS CCWMX51JS 2519
2507mini6410 MACH_MINI6410 MINI6410 2520 431mini6410 MACH_MINI6410 MINI6410 2520
2508tiny6410 MACH_TINY6410 TINY6410 2521
2509nano6410 MACH_NANO6410 NANO6410 2522
2510at572d940hfnldb MACH_AT572D940HFNLDB AT572D940HFNLDB 2523
2511htcleo MACH_HTCLEO HTCLEO 2524
2512avp13 MACH_AVP13 AVP13 2525
2513xxsvideod MACH_XXSVIDEOD XXSVIDEOD 2526
2514vpnext MACH_VPNEXT VPNEXT 2527
2515swarco_itc3 MACH_SWARCO_ITC3 SWARCO_ITC3 2528
2516tx51 MACH_TX51 TX51 2529
2517dolby_cat1021 MACH_DOLBY_CAT1021 DOLBY_CAT1021 2530
2518mx28evk MACH_MX28EVK MX28EVK 2531 432mx28evk MACH_MX28EVK MX28EVK 2531
2519phoenix260 MACH_PHOENIX260 PHOENIX260 2532
2520uvaca_stork MACH_UVACA_STORK UVACA_STORK 2533
2521smartq5 MACH_SMARTQ5 SMARTQ5 2534 433smartq5 MACH_SMARTQ5 SMARTQ5 2534
2522all3078 MACH_ALL3078 ALL3078 2535
2523ctera_2bay_ds MACH_CTERA_2BAY_DS CTERA_2BAY_DS 2536
2524siogentoo3 MACH_SIOGENTOO3 SIOGENTOO3 2537
2525epb5000 MACH_EPB5000 EPB5000 2538
2526hy9263 MACH_HY9263 HY9263 2539
2527acer_tempo_m900 MACH_ACER_TEMPO_M900 ACER_TEMPO_M900 2540
2528acer_tempo_dx650 MACH_ACER_TEMPO_DX900 ACER_TEMPO_DX900 2541
2529acer_tempo_x960 MACH_ACER_TEMPO_X960 ACER_TEMPO_X960 2542
2530acer_eten_v900 MACH_ACER_ETEN_V900 ACER_ETEN_V900 2543
2531acer_eten_x900 MACH_ACER_ETEN_X900 ACER_ETEN_X900 2544
2532bonnell MACH_BONNELL BONNELL 2545
2533oht_mx27 MACH_OHT_MX27 OHT_MX27 2546
2534htcquartz MACH_HTCQUARTZ HTCQUARTZ 2547
2535davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 434davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548
2536c3ax03 MACH_C3AX03 C3AX03 2549
2537mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 435mxt_td60 MACH_MXT_TD60 MXT_TD60 2550
2538esyx MACH_ESYX ESYX 2551
2539dove_db2 MACH_DOVE_DB2 DOVE_DB2 2552
2540bulldog MACH_BULLDOG BULLDOG 2553
2541derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554
2542bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555
2543bcmring_evm MACH_BCMRING_EVM BCMRING_EVM 2556
2544bcmring_evm_jazz MACH_BCMRING_EVM_JAZZ BCMRING_EVM_JAZZ 2557
2545bcmring_sp MACH_BCMRING_SP BCMRING_SP 2558
2546bcmring_sv MACH_BCMRING_SV BCMRING_SV 2559
2547bcmring_sv_jazz MACH_BCMRING_SV_JAZZ BCMRING_SV_JAZZ 2560
2548bcmring_tablet MACH_BCMRING_TABLET BCMRING_TABLET 2561
2549bcmring_vp MACH_BCMRING_VP BCMRING_VP 2562
2550bcmring_evm_seikor MACH_BCMRING_EVM_SEIKOR BCMRING_EVM_SEIKOR 2563
2551bcmring_sp_wqvga MACH_BCMRING_SP_WQVGA BCMRING_SP_WQVGA 2564
2552bcmring_custom MACH_BCMRING_CUSTOM BCMRING_CUSTOM 2565
2553acer_s200 MACH_ACER_S200 ACER_S200 2566
2554bt270 MACH_BT270 BT270 2567
2555iseo MACH_ISEO ISEO 2568
2556cezanne MACH_CEZANNE CEZANNE 2569
2557lucca MACH_LUCCA LUCCA 2570
2558supersmart MACH_SUPERSMART SUPERSMART 2571
2559arm11_board MACH_CS_MISANO CS_MISANO 2572
2560magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573
2561emxx MACH_EMXX EMXX 2574
2562outlaw MACH_OUTLAW OUTLAW 2575
2563riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576
2564riot_vox MACH_RIOT_VOX RIOT_VOX 2577
2565riot_x37 MACH_RIOT_X37 RIOT_X37 2578
2566mega25mx MACH_MEGA25MX MEGA25MX 2579
2567benzina2 MACH_BENZINA2 BENZINA2 2580
2568ignite MACH_IGNITE IGNITE 2581
2569foggia MACH_FOGGIA FOGGIA 2582
2570arezzo MACH_AREZZO AREZZO 2583
2571leica_skywalker MACH_LEICA_SKYWALKER LEICA_SKYWALKER 2584
2572jacinto2_jamr MACH_JACINTO2_JAMR JACINTO2_JAMR 2585
2573gts_nova MACH_GTS_NOVA GTS_NOVA 2586
2574p3600 MACH_P3600 P3600 2587
2575dlt2 MACH_DLT2 DLT2 2588
2576df3120 MACH_DF3120 DF3120 2589
2577ecucore_9g20 MACH_ECUCORE_9G20 ECUCORE_9G20 2590
2578nautel_lpc3240 MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591
2579glacier MACH_GLACIER GLACIER 2592
2580phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593
2581omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594
2582pca101 MACH_PCA101 PCA101 2595
2583buzzc MACH_BUZZC BUZZC 2596
2584sasie2 MACH_SASIE2 SASIE2 2597
2585davinci_cio MACH_DAVINCI_CIO DAVINCI_CIO 2598
2586smartmeter_dl MACH_SMARTMETER_DL SMARTMETER_DL 2599
2587wzl6410 MACH_WZL6410 WZL6410 2600
2588wzl6410m MACH_WZL6410M WZL6410M 2601
2589wzl6410f MACH_WZL6410F WZL6410F 2602
2590wzl6410i MACH_WZL6410I WZL6410I 2603
2591spacecom1 MACH_SPACECOM1 SPACECOM1 2604
2592pingu920 MACH_PINGU920 PINGU920 2605
2593bravoc MACH_BRAVOC BRAVOC 2606
2594cybo2440 MACH_CYBO2440 CYBO2440 2607
2595vdssw MACH_VDSSW VDSSW 2608
2596romulus MACH_ROMULUS ROMULUS 2609
2597omap_magic MACH_OMAP_MAGIC OMAP_MAGIC 2610
2598eltd100 MACH_ELTD100 ELTD100 2611
2599capc7117 MACH_CAPC7117 CAPC7117 2612 436capc7117 MACH_CAPC7117 CAPC7117 2612
2600swan MACH_SWAN SWAN 2613
2601veu MACH_VEU VEU 2614
2602rm2 MACH_RM2 RM2 2615
2603tt2100 MACH_TT2100 TT2100 2616
2604venice MACH_VENICE VENICE 2617
2605pc7323 MACH_PC7323 PC7323 2618
2606masp MACH_MASP MASP 2619
2607fujitsu_tvstbsoc0 MACH_FUJITSU_TVSTBSOC FUJITSU_TVSTBSOC 2620
2608fujitsu_tvstbsoc1 MACH_FUJITSU_TVSTBSOC1 FUJITSU_TVSTBSOC1 2621
2609lexikon MACH_LEXIKON LEXIKON 2622
2610mini2440v2 MACH_MINI2440V2 MINI2440V2 2623
2611icontrol MACH_ICONTROL ICONTROL 2624 437icontrol MACH_ICONTROL ICONTROL 2624
2612gplugd MACH_SHEEVAD SHEEVAD 2625
2613qsd8x50a_st1_1 MACH_QSD8X50A_ST1_1 QSD8X50A_ST1_1 2626
2614qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 438qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627
2615bee MACH_BEE BEE 2628
2616mx23evk MACH_MX23EVK MX23EVK 2629 439mx23evk MACH_MX23EVK MX23EVK 2629
2617ap4evb MACH_AP4EVB AP4EVB 2630 440ap4evb MACH_AP4EVB AP4EVB 2630
2618stockholm MACH_STOCKHOLM STOCKHOLM 2631
2619lpc_h3131 MACH_LPC_H3131 LPC_H3131 2632
2620stingray MACH_STINGRAY STINGRAY 2633
2621kraken MACH_KRAKEN KRAKEN 2634
2622gw2388 MACH_GW2388 GW2388 2635
2623jadecpu MACH_JADECPU JADECPU 2636
2624carlisle MACH_CARLISLE CARLISLE 2637
2625lux_sf9 MACH_LUX_SF9 LUX_SF9 2638
2626nemid_tb MACH_NEMID_TB NEMID_TB 2639
2627terrier MACH_TERRIER TERRIER 2640
2628turbot MACH_TURBOT TURBOT 2641
2629sanddab MACH_SANDDAB SANDDAB 2642
2630mx35_cicada MACH_MX35_CICADA MX35_CICADA 2643
2631ghi2703d MACH_GHI2703D GHI2703D 2644
2632lux_sfx9 MACH_LUX_SFX9 LUX_SFX9 2645
2633lux_sf9g MACH_LUX_SF9G LUX_SF9G 2646
2634lux_edk9 MACH_LUX_EDK9 LUX_EDK9 2647
2635hw90240 MACH_HW90240 HW90240 2648
2636dm365_leopard MACH_DM365_LEOPARD DM365_LEOPARD 2649
2637mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 441mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650
2638scat110 MACH_SCAT110 SCAT110 2651
2639acer_a1 MACH_ACER_A1 ACER_A1 2652
2640cmcontrol MACH_CMCONTROL CMCONTROL 2653
2641pelco_lamar MACH_PELCO_LAMAR PELCO_LAMAR 2654
2642rfp43 MACH_RFP43 RFP43 2655
2643sk86r0301 MACH_SK86R0301 SK86R0301 2656
2644ctpxa MACH_CTPXA CTPXA 2657
2645epb_arm9_a MACH_EPB_ARM9_A EPB_ARM9_A 2658
2646guruplug MACH_GURUPLUG GURUPLUG 2659 442guruplug MACH_GURUPLUG GURUPLUG 2659
2647spear310 MACH_SPEAR310 SPEAR310 2660 443spear310 MACH_SPEAR310 SPEAR310 2660
2648spear320 MACH_SPEAR320 SPEAR320 2661 444spear320 MACH_SPEAR320 SPEAR320 2661
2649robotx MACH_ROBOTX ROBOTX 2662
2650lsxhl MACH_LSXHL LSXHL 2663
2651smartlite MACH_SMARTLITE SMARTLITE 2664
2652cws2 MACH_CWS2 CWS2 2665
2653m619 MACH_M619 M619 2666
2654smartview MACH_SMARTVIEW SMARTVIEW 2667
2655lsa_salsa MACH_LSA_SALSA LSA_SALSA 2668
2656kizbox MACH_KIZBOX KIZBOX 2669
2657htccharmer MACH_HTCCHARMER HTCCHARMER 2670
2658guf_neso_lt MACH_GUF_NESO_LT GUF_NESO_LT 2671
2659pm9g45 MACH_PM9G45 PM9G45 2672
2660htcpanther MACH_HTCPANTHER HTCPANTHER 2673
2661htcpanther_cdma MACH_HTCPANTHER_CDMA HTCPANTHER_CDMA 2674
2662reb01 MACH_REB01 REB01 2675
2663aquila MACH_AQUILA AQUILA 2676 445aquila MACH_AQUILA AQUILA 2676
2664spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677
2665sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 446sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
2666msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 447msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
2667micro2440 MACH_MICRO2440 MICRO2440 2680
2668am2440 MACH_AM2440 AM2440 2681
2669tq2440 MACH_TQ2440 TQ2440 2682
2670lpc2478oem MACH_LPC2478OEM LPC2478OEM 2683
2671ak880x MACH_AK880X AK880X 2684
2672cobra3530 MACH_COBRA3530 COBRA3530 2685
2673pmppb MACH_PMPPB PMPPB 2686
2674u6715 MACH_U6715 U6715 2687
2675axar1500_sender MACH_AXAR1500_SENDER AXAR1500_SENDER 2688
2676g30_dvb MACH_G30_DVB G30_DVB 2689
2677vc088x MACH_VC088X VC088X 2690
2678mioa702 MACH_MIOA702 MIOA702 2691
2679hpmin MACH_HPMIN HPMIN 2692
2680ak880xak MACH_AK880XAK AK880XAK 2693
2681arm926tomap850 MACH_ARM926TOMAP850 ARM926TOMAP850 2694
2682lkevm MACH_LKEVM LKEVM 2695
2683mw6410 MACH_MW6410 MW6410 2696
2684terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 448terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697
2685cpu8000e MACH_CPU8000E CPU8000E 2698
2686catania MACH_CATANIA CATANIA 2699
2687tokyo MACH_TOKYO TOKYO 2700
2688msm7201a_surf MACH_MSM7201A_SURF MSM7201A_SURF 2701
2689msm7201a_ffa MACH_MSM7201A_FFA MSM7201A_FFA 2702
2690msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703 449msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703
2691msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704 450msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704
2692msm7x27_surf MACH_MSM7X27_SURF MSM7X27_SURF 2705 451msm7x27_surf MACH_MSM7X27_SURF MSM7X27_SURF 2705
2693msm7x27_ffa MACH_MSM7X27_FFA MSM7X27_FFA 2706 452msm7x27_ffa MACH_MSM7X27_FFA MSM7X27_FFA 2706
2694msm7x30_ffa MACH_MSM7X30_FFA MSM7X30_FFA 2707 453msm7x30_ffa MACH_MSM7X30_FFA MSM7X30_FFA 2707
2695qsd8x50_surf MACH_QSD8X50_SURF QSD8X50_SURF 2708 454qsd8x50_surf MACH_QSD8X50_SURF QSD8X50_SURF 2708
2696qsd8x50_comet MACH_QSD8X50_COMET QSD8X50_COMET 2709
2697qsd8x50_ffa MACH_QSD8X50_FFA QSD8X50_FFA 2710
2698qsd8x50a_surf MACH_QSD8X50A_SURF QSD8X50A_SURF 2711
2699qsd8x50a_ffa MACH_QSD8X50A_FFA QSD8X50A_FFA 2712
2700adx_xgcp10 MACH_ADX_XGCP10 ADX_XGCP10 2713
2701mcgwumts2a MACH_MCGWUMTS2A MCGWUMTS2A 2714
2702mobikt MACH_MOBIKT MOBIKT 2715
2703mx53_evk MACH_MX53_EVK MX53_EVK 2716 455mx53_evk MACH_MX53_EVK MX53_EVK 2716
2704igep0030 MACH_IGEP0030 IGEP0030 2717 456igep0030 MACH_IGEP0030 IGEP0030 2717
2705axell_h40_h50_ctrl MACH_AXELL_H40_H50_CTRL AXELL_H40_H50_CTRL 2718
2706dtcommod MACH_DTCOMMOD DTCOMMOD 2719
2707gould MACH_GOULD GOULD 2720
2708siberia MACH_SIBERIA SIBERIA 2721
2709sbc3530 MACH_SBC3530 SBC3530 2722 457sbc3530 MACH_SBC3530 SBC3530 2722
2710qarm MACH_QARM QARM 2723
2711mips MACH_MIPS MIPS 2724
2712mx27grb MACH_MX27GRB MX27GRB 2725
2713sbc8100 MACH_SBC8100 SBC8100 2726
2714saarb MACH_SAARB SAARB 2727 458saarb MACH_SAARB SAARB 2727
2715omap3mini MACH_OMAP3MINI OMAP3MINI 2728
2716cnmbook7se MACH_CNMBOOK7SE CNMBOOK7SE 2729
2717catan MACH_CATAN CATAN 2730
2718harmony MACH_HARMONY HARMONY 2731 459harmony MACH_HARMONY HARMONY 2731
2719tonga MACH_TONGA TONGA 2732
2720cybook_orizon MACH_CYBOOK_ORIZON CYBOOK_ORIZON 2733
2721htcrhodiumcdma MACH_HTCRHODIUMCDMA HTCRHODIUMCDMA 2734
2722epc_g45 MACH_EPC_G45 EPC_G45 2735
2723epc_lpc3250 MACH_EPC_LPC3250 EPC_LPC3250 2736
2724mxc91341evb MACH_MXC91341EVB MXC91341EVB 2737
2725rtw1000 MACH_RTW1000 RTW1000 2738
2726bobcat MACH_BOBCAT BOBCAT 2739
2727trizeps6 MACH_TRIZEPS6 TRIZEPS6 2740
2728msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741 460msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741
2729nedap9263 MACH_NEDAP9263 NEDAP9263 2742
2730netgear_ms2110 MACH_NETGEAR_MS2110 NETGEAR_MS2110 2743
2731bmx MACH_BMX BMX 2744
2732netstream MACH_NETSTREAM NETSTREAM 2745
2733vpnext_rcu MACH_VPNEXT_RCU VPNEXT_RCU 2746
2734vpnext_mpu MACH_VPNEXT_MPU VPNEXT_MPU 2747
2735bcmring_tablet_v1 MACH_BCMRING_TABLET_V1 BCMRING_TABLET_V1 2748
2736sgarm10 MACH_SGARM10 SGARM10 2749
2737cm_t3517 MACH_CM_T3517 CM_T3517 2750 461cm_t3517 MACH_CM_T3517 CM_T3517 2750
2738omap3_cps MACH_OMAP3_CPS OMAP3_CPS 2751
2739axar1500_receiver MACH_AXAR1500_RECEIVER AXAR1500_RECEIVER 2752
2740wbd222 MACH_WBD222 WBD222 2753 462wbd222 MACH_WBD222 WBD222 2753
2741mt65xx MACH_MT65XX MT65XX 2754
2742msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755 463msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755
2743msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756 464msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756
2744vmc300 MACH_VMC300 VMC300 2757
2745tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758 465tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758
2746nanos MACH_NANOS NANOS 2759
2747stamp9g10 MACH_STAMP9G10 STAMP9G10 2760
2748stamp9g45 MACH_STAMP9G45 STAMP9G45 2761
2749h6053 MACH_H6053 H6053 2762
2750smint01 MACH_SMINT01 SMINT01 2763
2751prtlvt2 MACH_PRTLVT2 PRTLVT2 2764
2752ap420 MACH_AP420 AP420 2765 466ap420 MACH_AP420 AP420 2765
2753htcshift MACH_HTCSHIFT HTCSHIFT 2766
2754davinci_dm365_fc MACH_DAVINCI_DM365_FC DAVINCI_DM365_FC 2767 467davinci_dm365_fc MACH_DAVINCI_DM365_FC DAVINCI_DM365_FC 2767
2755msm8x55_surf MACH_MSM8X55_SURF MSM8X55_SURF 2768 468msm8x55_surf MACH_MSM8X55_SURF MSM8X55_SURF 2768
2756msm8x55_ffa MACH_MSM8X55_FFA MSM8X55_FFA 2769 469msm8x55_ffa MACH_MSM8X55_FFA MSM8X55_FFA 2769
@@ -2761,7 +474,6 @@ oreo_controller MACH_OREO_CONTROLLER OREO_CONTROLLER 2773
2761kopin_models MACH_KOPIN_MODELS KOPIN_MODELS 2774 474kopin_models MACH_KOPIN_MODELS KOPIN_MODELS 2774
2762ttc_vision2 MACH_TTC_VISION2 TTC_VISION2 2775 475ttc_vision2 MACH_TTC_VISION2 TTC_VISION2 2775
2763cns3420vb MACH_CNS3420VB CNS3420VB 2776 476cns3420vb MACH_CNS3420VB CNS3420VB 2776
2764lpc2 MACH_LPC2 LPC2 2777
2765olympus MACH_OLYMPUS OLYMPUS 2778 477olympus MACH_OLYMPUS OLYMPUS 2778
2766vortex MACH_VORTEX VORTEX 2779 478vortex MACH_VORTEX VORTEX 2779
2767s5pc200 MACH_S5PC200 S5PC200 2780 479s5pc200 MACH_S5PC200 S5PC200 2780
@@ -2788,7 +500,6 @@ ti8168evm MACH_TI8168EVM TI8168EVM 2800
2788neocoreomap MACH_NEOCOREOMAP NEOCOREOMAP 2801 500neocoreomap MACH_NEOCOREOMAP NEOCOREOMAP 2801
2789withings_wbp MACH_WITHINGS_WBP WITHINGS_WBP 2802 501withings_wbp MACH_WITHINGS_WBP WITHINGS_WBP 2802
2790dbps MACH_DBPS DBPS 2803 502dbps MACH_DBPS DBPS 2803
2791sbc9261 MACH_SBC9261 SBC9261 2804
2792pcbfp0001 MACH_PCBFP0001 PCBFP0001 2805 503pcbfp0001 MACH_PCBFP0001 PCBFP0001 2805
2793speedy MACH_SPEEDY SPEEDY 2806 504speedy MACH_SPEEDY SPEEDY 2806
2794chrysaor MACH_CHRYSAOR CHRYSAOR 2807 505chrysaor MACH_CHRYSAOR CHRYSAOR 2807
@@ -2812,7 +523,6 @@ p565 MACH_P565 P565 2824
2812acer_a4 MACH_ACER_A4 ACER_A4 2825 523acer_a4 MACH_ACER_A4 ACER_A4 2825
2813davinci_dm368_bip MACH_DAVINCI_DM368_BIP DAVINCI_DM368_BIP 2826 524davinci_dm368_bip MACH_DAVINCI_DM368_BIP DAVINCI_DM368_BIP 2826
2814eshare MACH_ESHARE ESHARE 2827 525eshare MACH_ESHARE ESHARE 2827
2815hw_omapl138_europa MACH_HW_OMAPL138_EUROPA HW_OMAPL138_EUROPA 2828
2816wlbargn MACH_WLBARGN WLBARGN 2829 526wlbargn MACH_WLBARGN WLBARGN 2829
2817bm170 MACH_BM170 BM170 2830 527bm170 MACH_BM170 BM170 2830
2818netspace_mini_v2 MACH_NETSPACE_MINI_V2 NETSPACE_MINI_V2 2831 528netspace_mini_v2 MACH_NETSPACE_MINI_V2 NETSPACE_MINI_V2 2831
@@ -2879,7 +589,6 @@ davinci_picto MACH_DAVINCI_PICTO DAVINCI_PICTO 2891
2879mecha MACH_MECHA MECHA 2892 589mecha MACH_MECHA MECHA 2892
2880bubba3 MACH_BUBBA3 BUBBA3 2893 590bubba3 MACH_BUBBA3 BUBBA3 2893
2881pupitre MACH_PUPITRE PUPITRE 2894 591pupitre MACH_PUPITRE PUPITRE 2894
2882tegra_harmony MACH_TEGRA_HARMONY TEGRA_HARMONY 2895
2883tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896 592tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896
2884tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897 593tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897
2885simplenet MACH_SIMPLENET SIMPLENET 2898 594simplenet MACH_SIMPLENET SIMPLENET 2898
@@ -2969,7 +678,6 @@ netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983
2969ssc MACH_SSC SSC 2984 678ssc MACH_SSC SSC 2984
2970premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 679premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
2971wasabi MACH_WASABI WASABI 2986 680wasabi MACH_WASABI WASABI 2986
2972vivow MACH_VIVOW VIVOW 2987
2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988 681mx50_rdp MACH_MX50_RDP MX50_RDP 2988
2974universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 682universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989
2975real6410 MACH_REAL6410 REAL6410 2990 683real6410 MACH_REAL6410 REAL6410 2990
@@ -3017,12 +725,10 @@ remus MACH_REMUS REMUS 3031
3017at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 725at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032
3018at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 726at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033
3019kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 727kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034
3020oratisrouter MACH_ORATISROUTER ORATISROUTER 3035
3021armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 728armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036
3022spdm MACH_SPDM SPDM 3037 729spdm MACH_SPDM SPDM 3037
3023gtib MACH_GTIB GTIB 3038 730gtib MACH_GTIB GTIB 3038
3024dgm3240 MACH_DGM3240 DGM3240 3039 731dgm3240 MACH_DGM3240 DGM3240 3039
3025atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040
3026htcmega MACH_HTCMEGA HTCMEGA 3041 732htcmega MACH_HTCMEGA HTCMEGA 3041
3027tricorder MACH_TRICORDER TRICORDER 3042 733tricorder MACH_TRICORDER TRICORDER 3042
3028tx28 MACH_TX28 TX28 3043 734tx28 MACH_TX28 TX28 3043
@@ -3062,7 +768,6 @@ clod MACH_CLOD CLOD 3077
3062rump MACH_RUMP RUMP 3078 768rump MACH_RUMP RUMP 3078
3063tenderloin MACH_TENDERLOIN TENDERLOIN 3079 769tenderloin MACH_TENDERLOIN TENDERLOIN 3079
3064shortloin MACH_SHORTLOIN SHORTLOIN 3080 770shortloin MACH_SHORTLOIN SHORTLOIN 3080
3065crespo MACH_CRESPO CRESPO 3081
3066antares MACH_ANTARES ANTARES 3082 771antares MACH_ANTARES ANTARES 3082
3067wb40n MACH_WB40N WB40N 3083 772wb40n MACH_WB40N WB40N 3083
3068herring MACH_HERRING HERRING 3084 773herring MACH_HERRING HERRING 3084
@@ -3111,7 +816,6 @@ smartqv3 MACH_SMARTQV3 SMARTQV3 3126
3111smartqv7 MACH_SMARTQV7 SMARTQV7 3127 816smartqv7 MACH_SMARTQV7 SMARTQV7 3127
3112paz00 MACH_PAZ00 PAZ00 3128 817paz00 MACH_PAZ00 PAZ00 3128
3113acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 818acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129
3114htcwillow MACH_HTCWILLOW HTCWILLOW 3130
3115fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 819fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131
3116hdgu MACH_HDGU HDGU 3132 820hdgu MACH_HDGU HDGU 3132
3117pyramid MACH_PYRAMID PYRAMID 3133 821pyramid MACH_PYRAMID PYRAMID 3133
@@ -3162,7 +866,6 @@ b5500 MACH_B5500 B5500 3177
3162s5500 MACH_S5500 S5500 3178 866s5500 MACH_S5500 S5500 3178
3163icon MACH_ICON ICON 3179 867icon MACH_ICON ICON 3179
3164elephant MACH_ELEPHANT ELEPHANT 3180 868elephant MACH_ELEPHANT ELEPHANT 3180
3165msm8x60_fusion MACH_MSM8X60_FUSION MSM8X60_FUSION 3181
3166shooter MACH_SHOOTER SHOOTER 3182 869shooter MACH_SHOOTER SHOOTER 3182
3167spade_lte MACH_SPADE_LTE SPADE_LTE 3183 870spade_lte MACH_SPADE_LTE SPADE_LTE 3183
3168philhwani MACH_PHILHWANI PHILHWANI 3184 871philhwani MACH_PHILHWANI PHILHWANI 3184
@@ -3174,13 +877,11 @@ ag5evm MACH_AG5EVM AG5EVM 3189
3174sc575plc MACH_SC575PLC SC575PLC 3190 877sc575plc MACH_SC575PLC SC575PLC 3190
3175sc575hmi MACH_SC575IPC SC575IPC 3191 878sc575hmi MACH_SC575IPC SC575IPC 3191
3176omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 879omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192
3177g7 MACH_G7 G7 3193
3178top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 880top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194
3179top9000_su MACH_TOP9000_SU TOP9000_SU 3195 881top9000_su MACH_TOP9000_SU TOP9000_SU 3195
3180utm300 MACH_UTM300 UTM300 3196 882utm300 MACH_UTM300 UTM300 3196
3181tsunagi MACH_TSUNAGI TSUNAGI 3197 883tsunagi MACH_TSUNAGI TSUNAGI 3197
3182ts75xx MACH_TS75XX TS75XX 3198 884ts75xx MACH_TS75XX TS75XX 3198
3183msm8x60_fusn_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199
3184ts47xx MACH_TS47XX TS47XX 3200 885ts47xx MACH_TS47XX TS47XX 3200
3185da850_k5 MACH_DA850_K5 DA850_K5 3201 886da850_k5 MACH_DA850_K5 DA850_K5 3201
3186ax502 MACH_AX502 AX502 3202 887ax502 MACH_AX502 AX502 3202
@@ -3285,7 +986,6 @@ rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
3285nmh MACH_NMH NMH 3305 986nmh MACH_NMH NMH 3305
3286wn802t MACH_WN802T WN802T 3306 987wn802t MACH_WN802T WN802T 3306
3287dragonet MACH_DRAGONET DRAGONET 3307 988dragonet MACH_DRAGONET DRAGONET 3307
3288geneva_b MACH_GENEVA_B GENEVA_B 3308
3289at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309 989at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
3290bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310 990bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
3291bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311 991bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
@@ -3316,3 +1016,86 @@ rover_g8 MACH_ROVER_G8 ROVER_G8 3335
3316t5388p MACH_T5388P T5388P 3336 1016t5388p MACH_T5388P T5388P 3336
3317dingo MACH_DINGO DINGO 3337 1017dingo MACH_DINGO DINGO 3337
3318goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338 1018goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
1019lanreadyfn511 MACH_LANREADYFN511 LANREADYFN511 3340
1020omap3_baia MACH_OMAP3_BAIA OMAP3_BAIA 3341
1021omap3smartdisplay MACH_OMAP3SMARTDISPLAY OMAP3SMARTDISPLAY 3342
1022xilinx MACH_XILINX XILINX 3343
1023a2f MACH_A2F A2F 3344
1024sky25 MACH_SKY25 SKY25 3345
1025ccmx53 MACH_CCMX53 CCMX53 3346
1026ccmx53js MACH_CCMX53JS CCMX53JS 3347
1027ccwmx53 MACH_CCWMX53 CCWMX53 3348
1028ccwmx53js MACH_CCWMX53JS CCWMX53JS 3349
1029frisms MACH_FRISMS FRISMS 3350
1030msm7x27a_ffa MACH_MSM7X27A_FFA MSM7X27A_FFA 3351
1031msm7x27a_surf MACH_MSM7X27A_SURF MSM7X27A_SURF 3352
1032msm7x27a_rumi3 MACH_MSM7X27A_RUMI3 MSM7X27A_RUMI3 3353
1033dimmsam9g20 MACH_DIMMSAM9G20 DIMMSAM9G20 3354
1034dimm_imx28 MACH_DIMM_IMX28 DIMM_IMX28 3355
1035amk_a4 MACH_AMK_A4 AMK_A4 3356
1036gnet_sgme MACH_GNET_SGME GNET_SGME 3357
1037shooter_u MACH_SHOOTER_U SHOOTER_U 3358
1038vmx53 MACH_VMX53 VMX53 3359
1039rhino MACH_RHINO RHINO 3360
1040armlex4210 MACH_ARMLEX4210 ARMLEX4210 3361
1041swarcoextmodem MACH_SWARCOEXTMODEM SWARCOEXTMODEM 3362
1042snowball MACH_SNOWBALL SNOWBALL 3363
1043pcm049 MACH_PCM049 PCM049 3364
1044vigor MACH_VIGOR VIGOR 3365
1045oslo_amundsen MACH_OSLO_AMUNDSEN OSLO_AMUNDSEN 3366
1046gsl_diamond MACH_GSL_DIAMOND GSL_DIAMOND 3367
1047cv2201 MACH_CV2201 CV2201 3368
1048cv2202 MACH_CV2202 CV2202 3369
1049cv2203 MACH_CV2203 CV2203 3370
1050vit_ibox MACH_VIT_IBOX VIT_IBOX 3371
1051dm6441_esp MACH_DM6441_ESP DM6441_ESP 3372
1052at91sam9x5ek MACH_AT91SAM9X5EK AT91SAM9X5EK 3373
1053libra MACH_LIBRA LIBRA 3374
1054easycrrh MACH_EASYCRRH EASYCRRH 3375
1055tripel MACH_TRIPEL TRIPEL 3376
1056endian_mini MACH_ENDIAN_MINI ENDIAN_MINI 3377
1057xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378
1058nuri MACH_NURI NURI 3379
1059janus MACH_JANUS JANUS 3380
1060ddnas MACH_DDNAS DDNAS 3381
1061tag MACH_TAG TAG 3382
1062tagw MACH_TAGW TAGW 3383
1063nitrogen_vm_imx51 MACH_NITROGEN_VM_IMX51 NITROGEN_VM_IMX51 3384
1064viprinet MACH_VIPRINET VIPRINET 3385
1065bockw MACH_BOCKW BOCKW 3386
1066eva2000 MACH_EVA2000 EVA2000 3387
1067steelyard MACH_STEELYARD STEELYARD 3388
1068sdh001 MACH_MACH_SDH001 MACH_SDH001 3390
1069nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392
1070geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393
1071spear1340 MACH_SPEAR1340 SPEAR1340 3394
1072rexmas MACH_REXMAS REXMAS 3395
1073msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396
1074msm8960_mdp MACH_MSM8960_MDP MSM8960_MDP 3397
1075msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398
1076msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399
1077helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400
1078mif10p MACH_MIF10P MIF10P 3401
1079iam28 MACH_IAM28 IAM28 3402
1080picasso MACH_PICASSO PICASSO 3403
1081mr301a MACH_MR301A MR301A 3404
1082notle MACH_NOTLE NOTLE 3405
1083eelx2 MACH_EELX2 EELX2 3406
1084moon MACH_MOON MOON 3407
1085ruby MACH_RUBY RUBY 3408
1086goldengate MACH_GOLDENGATE GOLDENGATE 3409
1087ctbu_gen2 MACH_CTBU_GEN2 CTBU_GEN2 3410
1088kmp_am17_01 MACH_KMP_AM17_01 KMP_AM17_01 3411
1089wtplug MACH_WTPLUG WTPLUG 3412
1090mx27su2 MACH_MX27SU2 MX27SU2 3413
1091nb31 MACH_NB31 NB31 3414
1092hjsdu MACH_HJSDU HJSDU 3415
1093td3_rev1 MACH_TD3_REV1 TD3_REV1 3416
1094eag_ci4000 MACH_EAG_CI4000 EAG_CI4000 3417
1095net5big_nand_v2 MACH_NET5BIG_NAND_V2 NET5BIG_NAND_V2 3418
1096cpx2 MACH_CPX2 CPX2 3419
1097net2big_nand_v2 MACH_NET2BIG_NAND_V2 NET2BIG_NAND_V2 3420
1098ecuv5 MACH_ECUV5 ECUV5 3421
1099hsgx6d MACH_HSGX6D HSGX6D 3422
1100dawad7 MACH_DAWAD7 DAWAD7 3423
1101sam9repeater MACH_SAM9REPEATER SAM9REPEATER 3424
diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile
index 39f6d8e1af73..6de73aab0195 100644
--- a/arch/arm/vfp/Makefile
+++ b/arch/arm/vfp/Makefile
@@ -4,8 +4,8 @@
4# Copyright (C) 2001 ARM Limited 4# Copyright (C) 2001 ARM Limited
5# 5#
6 6
7# EXTRA_CFLAGS := -DDEBUG 7# ccflags-y := -DDEBUG
8# EXTRA_AFLAGS := -DDEBUG 8# asflags-y := -DDEBUG
9 9
10KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp) 10KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp)
11LDFLAGS +=--no-warn-mismatch 11LDFLAGS +=--no-warn-mismatch
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index bbf3da012afd..f74695075e64 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -78,6 +78,14 @@ static void vfp_thread_exit(struct thread_info *thread)
78 put_cpu(); 78 put_cpu();
79} 79}
80 80
81static void vfp_thread_copy(struct thread_info *thread)
82{
83 struct thread_info *parent = current_thread_info();
84
85 vfp_sync_hwstate(parent);
86 thread->vfpstate = parent->vfpstate;
87}
88
81/* 89/*
82 * When this function is called with the following 'cmd's, the following 90 * When this function is called with the following 'cmd's, the following
83 * is true while this function is being run: 91 * is true while this function is being run:
@@ -104,12 +112,17 @@ static void vfp_thread_exit(struct thread_info *thread)
104static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) 112static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
105{ 113{
106 struct thread_info *thread = v; 114 struct thread_info *thread = v;
115 u32 fpexc;
116#ifdef CONFIG_SMP
117 unsigned int cpu;
118#endif
107 119
108 if (likely(cmd == THREAD_NOTIFY_SWITCH)) { 120 switch (cmd) {
109 u32 fpexc = fmrx(FPEXC); 121 case THREAD_NOTIFY_SWITCH:
122 fpexc = fmrx(FPEXC);
110 123
111#ifdef CONFIG_SMP 124#ifdef CONFIG_SMP
112 unsigned int cpu = thread->cpu; 125 cpu = thread->cpu;
113 126
114 /* 127 /*
115 * On SMP, if VFP is enabled, save the old state in 128 * On SMP, if VFP is enabled, save the old state in
@@ -134,13 +147,20 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
134 * old state. 147 * old state.
135 */ 148 */
136 fmxr(FPEXC, fpexc & ~FPEXC_EN); 149 fmxr(FPEXC, fpexc & ~FPEXC_EN);
137 return NOTIFY_DONE; 150 break;
138 }
139 151
140 if (cmd == THREAD_NOTIFY_FLUSH) 152 case THREAD_NOTIFY_FLUSH:
141 vfp_thread_flush(thread); 153 vfp_thread_flush(thread);
142 else 154 break;
155
156 case THREAD_NOTIFY_EXIT:
143 vfp_thread_exit(thread); 157 vfp_thread_exit(thread);
158 break;
159
160 case THREAD_NOTIFY_COPY:
161 vfp_thread_copy(thread);
162 break;
163 }
144 164
145 return NOTIFY_DONE; 165 return NOTIFY_DONE;
146} 166}